1 /* 2 * 3 * (C) COPYRIGHT 2015-2017 ARM Limited. All rights reserved. 4 * 5 * This program is free software and is provided to you under the terms of the 6 * GNU General Public License version 2 as published by the Free Software 7 * Foundation, and any use by you of this program is subject to the terms 8 * of such GNU licence. 9 * 10 * A copy of the licence is included with the program, and can also be obtained 11 * from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, 12 * Boston, MA 02110-1301, USA. 13 * 14 */ 15 16 17 18 /* AUTOMATICALLY GENERATED FILE. If you want to amend the issues/features, 19 * please update base/tools/hwconfig_generator/hwc_{issues,features}.py 20 * For more information see base/tools/hwconfig_generator/README 21 */ 22 23 #ifndef _BASE_HWCONFIG_ISSUES_H_ 24 #define _BASE_HWCONFIG_ISSUES_H_ 25 26 enum base_hw_issue { 27 BASE_HW_ISSUE_5736, 28 BASE_HW_ISSUE_6367, 29 BASE_HW_ISSUE_6398, 30 BASE_HW_ISSUE_6402, 31 BASE_HW_ISSUE_6787, 32 BASE_HW_ISSUE_7027, 33 BASE_HW_ISSUE_7144, 34 BASE_HW_ISSUE_7304, 35 BASE_HW_ISSUE_8073, 36 BASE_HW_ISSUE_8186, 37 BASE_HW_ISSUE_8215, 38 BASE_HW_ISSUE_8245, 39 BASE_HW_ISSUE_8250, 40 BASE_HW_ISSUE_8260, 41 BASE_HW_ISSUE_8280, 42 BASE_HW_ISSUE_8316, 43 BASE_HW_ISSUE_8381, 44 BASE_HW_ISSUE_8394, 45 BASE_HW_ISSUE_8401, 46 BASE_HW_ISSUE_8408, 47 BASE_HW_ISSUE_8443, 48 BASE_HW_ISSUE_8456, 49 BASE_HW_ISSUE_8564, 50 BASE_HW_ISSUE_8634, 51 BASE_HW_ISSUE_8778, 52 BASE_HW_ISSUE_8791, 53 BASE_HW_ISSUE_8833, 54 BASE_HW_ISSUE_8879, 55 BASE_HW_ISSUE_8896, 56 BASE_HW_ISSUE_8975, 57 BASE_HW_ISSUE_8986, 58 BASE_HW_ISSUE_8987, 59 BASE_HW_ISSUE_9010, 60 BASE_HW_ISSUE_9418, 61 BASE_HW_ISSUE_9423, 62 BASE_HW_ISSUE_9435, 63 BASE_HW_ISSUE_9510, 64 BASE_HW_ISSUE_9566, 65 BASE_HW_ISSUE_9630, 66 BASE_HW_ISSUE_10127, 67 BASE_HW_ISSUE_10327, 68 BASE_HW_ISSUE_10410, 69 BASE_HW_ISSUE_10471, 70 BASE_HW_ISSUE_10472, 71 BASE_HW_ISSUE_10487, 72 BASE_HW_ISSUE_10607, 73 BASE_HW_ISSUE_10632, 74 BASE_HW_ISSUE_10649, 75 BASE_HW_ISSUE_10676, 76 BASE_HW_ISSUE_10682, 77 BASE_HW_ISSUE_10684, 78 BASE_HW_ISSUE_10797, 79 BASE_HW_ISSUE_10817, 80 BASE_HW_ISSUE_10821, 81 BASE_HW_ISSUE_10883, 82 BASE_HW_ISSUE_10931, 83 BASE_HW_ISSUE_10946, 84 BASE_HW_ISSUE_10959, 85 BASE_HW_ISSUE_10969, 86 BASE_HW_ISSUE_10984, 87 BASE_HW_ISSUE_10995, 88 BASE_HW_ISSUE_11012, 89 BASE_HW_ISSUE_11020, 90 BASE_HW_ISSUE_11024, 91 BASE_HW_ISSUE_11035, 92 BASE_HW_ISSUE_11042, 93 BASE_HW_ISSUE_11051, 94 BASE_HW_ISSUE_11054, 95 BASE_HW_ISSUE_T720_1386, 96 BASE_HW_ISSUE_T76X_26, 97 BASE_HW_ISSUE_T76X_1909, 98 BASE_HW_ISSUE_T76X_1963, 99 BASE_HW_ISSUE_T76X_3086, 100 BASE_HW_ISSUE_T76X_3542, 101 BASE_HW_ISSUE_T76X_3556, 102 BASE_HW_ISSUE_T76X_3700, 103 BASE_HW_ISSUE_T76X_3793, 104 BASE_HW_ISSUE_T76X_3953, 105 BASE_HW_ISSUE_T76X_3960, 106 BASE_HW_ISSUE_T76X_3964, 107 BASE_HW_ISSUE_T76X_3966, 108 BASE_HW_ISSUE_T76X_3979, 109 BASE_HW_ISSUE_TMIX_7891, 110 BASE_HW_ISSUE_TMIX_7940, 111 BASE_HW_ISSUE_TMIX_8042, 112 BASE_HW_ISSUE_TMIX_8133, 113 BASE_HW_ISSUE_TMIX_8138, 114 BASE_HW_ISSUE_TMIX_8206, 115 BASE_HW_ISSUE_TMIX_8343, 116 BASE_HW_ISSUE_TMIX_8463, 117 BASE_HW_ISSUE_TMIX_8456, 118 GPUCORE_1619, 119 BASE_HW_ISSUE_TSIX_1116, 120 BASE_HW_ISSUE_TMIX_8438, 121 BASE_HW_ISSUE_END 122 }; 123 124 static const enum base_hw_issue base_hw_issues_generic[] = { 125 BASE_HW_ISSUE_END 126 }; 127 128 static const enum base_hw_issue base_hw_issues_t60x_r0p0_15dev0[] = { 129 BASE_HW_ISSUE_6367, 130 BASE_HW_ISSUE_6398, 131 BASE_HW_ISSUE_6402, 132 BASE_HW_ISSUE_6787, 133 BASE_HW_ISSUE_7027, 134 BASE_HW_ISSUE_7144, 135 BASE_HW_ISSUE_7304, 136 BASE_HW_ISSUE_8073, 137 BASE_HW_ISSUE_8186, 138 BASE_HW_ISSUE_8215, 139 BASE_HW_ISSUE_8245, 140 BASE_HW_ISSUE_8250, 141 BASE_HW_ISSUE_8260, 142 BASE_HW_ISSUE_8280, 143 BASE_HW_ISSUE_8316, 144 BASE_HW_ISSUE_8381, 145 BASE_HW_ISSUE_8394, 146 BASE_HW_ISSUE_8401, 147 BASE_HW_ISSUE_8408, 148 BASE_HW_ISSUE_8443, 149 BASE_HW_ISSUE_8456, 150 BASE_HW_ISSUE_8564, 151 BASE_HW_ISSUE_8634, 152 BASE_HW_ISSUE_8778, 153 BASE_HW_ISSUE_8791, 154 BASE_HW_ISSUE_8833, 155 BASE_HW_ISSUE_8896, 156 BASE_HW_ISSUE_8975, 157 BASE_HW_ISSUE_8986, 158 BASE_HW_ISSUE_8987, 159 BASE_HW_ISSUE_9010, 160 BASE_HW_ISSUE_9418, 161 BASE_HW_ISSUE_9423, 162 BASE_HW_ISSUE_9435, 163 BASE_HW_ISSUE_9510, 164 BASE_HW_ISSUE_9566, 165 BASE_HW_ISSUE_9630, 166 BASE_HW_ISSUE_10410, 167 BASE_HW_ISSUE_10471, 168 BASE_HW_ISSUE_10472, 169 BASE_HW_ISSUE_10487, 170 BASE_HW_ISSUE_10607, 171 BASE_HW_ISSUE_10632, 172 BASE_HW_ISSUE_10649, 173 BASE_HW_ISSUE_10676, 174 BASE_HW_ISSUE_10682, 175 BASE_HW_ISSUE_10684, 176 BASE_HW_ISSUE_10883, 177 BASE_HW_ISSUE_10931, 178 BASE_HW_ISSUE_10946, 179 BASE_HW_ISSUE_10969, 180 BASE_HW_ISSUE_10984, 181 BASE_HW_ISSUE_10995, 182 BASE_HW_ISSUE_11012, 183 BASE_HW_ISSUE_11020, 184 BASE_HW_ISSUE_11035, 185 BASE_HW_ISSUE_11051, 186 BASE_HW_ISSUE_11054, 187 BASE_HW_ISSUE_T76X_1909, 188 BASE_HW_ISSUE_T76X_3964, 189 GPUCORE_1619, 190 BASE_HW_ISSUE_TMIX_8438, 191 BASE_HW_ISSUE_END 192 }; 193 194 static const enum base_hw_issue base_hw_issues_t60x_r0p0_eac[] = { 195 BASE_HW_ISSUE_6367, 196 BASE_HW_ISSUE_6402, 197 BASE_HW_ISSUE_6787, 198 BASE_HW_ISSUE_7027, 199 BASE_HW_ISSUE_7304, 200 BASE_HW_ISSUE_8408, 201 BASE_HW_ISSUE_8564, 202 BASE_HW_ISSUE_8778, 203 BASE_HW_ISSUE_8975, 204 BASE_HW_ISSUE_9010, 205 BASE_HW_ISSUE_9418, 206 BASE_HW_ISSUE_9423, 207 BASE_HW_ISSUE_9435, 208 BASE_HW_ISSUE_9510, 209 BASE_HW_ISSUE_10410, 210 BASE_HW_ISSUE_10471, 211 BASE_HW_ISSUE_10472, 212 BASE_HW_ISSUE_10487, 213 BASE_HW_ISSUE_10607, 214 BASE_HW_ISSUE_10632, 215 BASE_HW_ISSUE_10649, 216 BASE_HW_ISSUE_10676, 217 BASE_HW_ISSUE_10682, 218 BASE_HW_ISSUE_10684, 219 BASE_HW_ISSUE_10883, 220 BASE_HW_ISSUE_10931, 221 BASE_HW_ISSUE_10946, 222 BASE_HW_ISSUE_10969, 223 BASE_HW_ISSUE_11012, 224 BASE_HW_ISSUE_11020, 225 BASE_HW_ISSUE_11035, 226 BASE_HW_ISSUE_11051, 227 BASE_HW_ISSUE_11054, 228 BASE_HW_ISSUE_T76X_1909, 229 BASE_HW_ISSUE_T76X_3964, 230 BASE_HW_ISSUE_TMIX_8438, 231 BASE_HW_ISSUE_END 232 }; 233 234 static const enum base_hw_issue base_hw_issues_t60x_r0p1[] = { 235 BASE_HW_ISSUE_6367, 236 BASE_HW_ISSUE_6402, 237 BASE_HW_ISSUE_6787, 238 BASE_HW_ISSUE_7027, 239 BASE_HW_ISSUE_7304, 240 BASE_HW_ISSUE_8408, 241 BASE_HW_ISSUE_8564, 242 BASE_HW_ISSUE_8778, 243 BASE_HW_ISSUE_8975, 244 BASE_HW_ISSUE_9010, 245 BASE_HW_ISSUE_9435, 246 BASE_HW_ISSUE_9510, 247 BASE_HW_ISSUE_10410, 248 BASE_HW_ISSUE_10471, 249 BASE_HW_ISSUE_10472, 250 BASE_HW_ISSUE_10487, 251 BASE_HW_ISSUE_10607, 252 BASE_HW_ISSUE_10632, 253 BASE_HW_ISSUE_10649, 254 BASE_HW_ISSUE_10676, 255 BASE_HW_ISSUE_10682, 256 BASE_HW_ISSUE_10684, 257 BASE_HW_ISSUE_10883, 258 BASE_HW_ISSUE_10931, 259 BASE_HW_ISSUE_10946, 260 BASE_HW_ISSUE_11012, 261 BASE_HW_ISSUE_11020, 262 BASE_HW_ISSUE_11035, 263 BASE_HW_ISSUE_11051, 264 BASE_HW_ISSUE_11054, 265 BASE_HW_ISSUE_T76X_1909, 266 BASE_HW_ISSUE_T76X_1963, 267 BASE_HW_ISSUE_T76X_3964, 268 BASE_HW_ISSUE_TMIX_8438, 269 BASE_HW_ISSUE_END 270 }; 271 272 static const enum base_hw_issue base_hw_issues_t62x_r0p1[] = { 273 BASE_HW_ISSUE_6402, 274 BASE_HW_ISSUE_9435, 275 BASE_HW_ISSUE_10127, 276 BASE_HW_ISSUE_10327, 277 BASE_HW_ISSUE_10410, 278 BASE_HW_ISSUE_10471, 279 BASE_HW_ISSUE_10472, 280 BASE_HW_ISSUE_10487, 281 BASE_HW_ISSUE_10607, 282 BASE_HW_ISSUE_10632, 283 BASE_HW_ISSUE_10649, 284 BASE_HW_ISSUE_10676, 285 BASE_HW_ISSUE_10682, 286 BASE_HW_ISSUE_10684, 287 BASE_HW_ISSUE_10817, 288 BASE_HW_ISSUE_10821, 289 BASE_HW_ISSUE_10883, 290 BASE_HW_ISSUE_10931, 291 BASE_HW_ISSUE_10946, 292 BASE_HW_ISSUE_10959, 293 BASE_HW_ISSUE_11012, 294 BASE_HW_ISSUE_11020, 295 BASE_HW_ISSUE_11024, 296 BASE_HW_ISSUE_11035, 297 BASE_HW_ISSUE_11042, 298 BASE_HW_ISSUE_11051, 299 BASE_HW_ISSUE_11054, 300 BASE_HW_ISSUE_T76X_1909, 301 BASE_HW_ISSUE_T76X_1963, 302 BASE_HW_ISSUE_TMIX_8438, 303 BASE_HW_ISSUE_END 304 }; 305 306 static const enum base_hw_issue base_hw_issues_t62x_r1p0[] = { 307 BASE_HW_ISSUE_6402, 308 BASE_HW_ISSUE_9435, 309 BASE_HW_ISSUE_10471, 310 BASE_HW_ISSUE_10472, 311 BASE_HW_ISSUE_10649, 312 BASE_HW_ISSUE_10684, 313 BASE_HW_ISSUE_10821, 314 BASE_HW_ISSUE_10883, 315 BASE_HW_ISSUE_10931, 316 BASE_HW_ISSUE_10946, 317 BASE_HW_ISSUE_10959, 318 BASE_HW_ISSUE_11012, 319 BASE_HW_ISSUE_11020, 320 BASE_HW_ISSUE_11024, 321 BASE_HW_ISSUE_11042, 322 BASE_HW_ISSUE_11051, 323 BASE_HW_ISSUE_11054, 324 BASE_HW_ISSUE_T76X_1909, 325 BASE_HW_ISSUE_T76X_1963, 326 BASE_HW_ISSUE_T76X_3964, 327 BASE_HW_ISSUE_TMIX_8438, 328 BASE_HW_ISSUE_END 329 }; 330 331 static const enum base_hw_issue base_hw_issues_t62x_r1p1[] = { 332 BASE_HW_ISSUE_6402, 333 BASE_HW_ISSUE_9435, 334 BASE_HW_ISSUE_10471, 335 BASE_HW_ISSUE_10472, 336 BASE_HW_ISSUE_10649, 337 BASE_HW_ISSUE_10684, 338 BASE_HW_ISSUE_10821, 339 BASE_HW_ISSUE_10883, 340 BASE_HW_ISSUE_10931, 341 BASE_HW_ISSUE_10946, 342 BASE_HW_ISSUE_10959, 343 BASE_HW_ISSUE_11012, 344 BASE_HW_ISSUE_11042, 345 BASE_HW_ISSUE_11051, 346 BASE_HW_ISSUE_11054, 347 BASE_HW_ISSUE_T76X_1909, 348 BASE_HW_ISSUE_T76X_1963, 349 BASE_HW_ISSUE_TMIX_8438, 350 BASE_HW_ISSUE_END 351 }; 352 353 static const enum base_hw_issue base_hw_issues_t76x_r0p0[] = { 354 BASE_HW_ISSUE_9435, 355 BASE_HW_ISSUE_10821, 356 BASE_HW_ISSUE_10883, 357 BASE_HW_ISSUE_10946, 358 BASE_HW_ISSUE_11020, 359 BASE_HW_ISSUE_11024, 360 BASE_HW_ISSUE_11042, 361 BASE_HW_ISSUE_11051, 362 BASE_HW_ISSUE_11054, 363 BASE_HW_ISSUE_T76X_26, 364 BASE_HW_ISSUE_T76X_1909, 365 BASE_HW_ISSUE_T76X_1963, 366 BASE_HW_ISSUE_T76X_3086, 367 BASE_HW_ISSUE_T76X_3542, 368 BASE_HW_ISSUE_T76X_3556, 369 BASE_HW_ISSUE_T76X_3700, 370 BASE_HW_ISSUE_T76X_3793, 371 BASE_HW_ISSUE_T76X_3953, 372 BASE_HW_ISSUE_T76X_3960, 373 BASE_HW_ISSUE_T76X_3964, 374 BASE_HW_ISSUE_T76X_3966, 375 BASE_HW_ISSUE_T76X_3979, 376 BASE_HW_ISSUE_TMIX_7891, 377 BASE_HW_ISSUE_TMIX_8438, 378 BASE_HW_ISSUE_END 379 }; 380 381 static const enum base_hw_issue base_hw_issues_t76x_r0p1[] = { 382 BASE_HW_ISSUE_9435, 383 BASE_HW_ISSUE_10821, 384 BASE_HW_ISSUE_10883, 385 BASE_HW_ISSUE_10946, 386 BASE_HW_ISSUE_11020, 387 BASE_HW_ISSUE_11024, 388 BASE_HW_ISSUE_11042, 389 BASE_HW_ISSUE_11051, 390 BASE_HW_ISSUE_11054, 391 BASE_HW_ISSUE_T76X_26, 392 BASE_HW_ISSUE_T76X_1909, 393 BASE_HW_ISSUE_T76X_1963, 394 BASE_HW_ISSUE_T76X_3086, 395 BASE_HW_ISSUE_T76X_3542, 396 BASE_HW_ISSUE_T76X_3556, 397 BASE_HW_ISSUE_T76X_3700, 398 BASE_HW_ISSUE_T76X_3793, 399 BASE_HW_ISSUE_T76X_3953, 400 BASE_HW_ISSUE_T76X_3960, 401 BASE_HW_ISSUE_T76X_3964, 402 BASE_HW_ISSUE_T76X_3966, 403 BASE_HW_ISSUE_T76X_3979, 404 BASE_HW_ISSUE_TMIX_7891, 405 BASE_HW_ISSUE_TMIX_8438, 406 BASE_HW_ISSUE_END 407 }; 408 409 static const enum base_hw_issue base_hw_issues_t76x_r0p1_50rel0[] = { 410 BASE_HW_ISSUE_9435, 411 BASE_HW_ISSUE_10821, 412 BASE_HW_ISSUE_10883, 413 BASE_HW_ISSUE_10946, 414 BASE_HW_ISSUE_11042, 415 BASE_HW_ISSUE_11051, 416 BASE_HW_ISSUE_11054, 417 BASE_HW_ISSUE_T76X_26, 418 BASE_HW_ISSUE_T76X_1909, 419 BASE_HW_ISSUE_T76X_1963, 420 BASE_HW_ISSUE_T76X_3086, 421 BASE_HW_ISSUE_T76X_3542, 422 BASE_HW_ISSUE_T76X_3556, 423 BASE_HW_ISSUE_T76X_3700, 424 BASE_HW_ISSUE_T76X_3793, 425 BASE_HW_ISSUE_T76X_3953, 426 BASE_HW_ISSUE_T76X_3960, 427 BASE_HW_ISSUE_T76X_3964, 428 BASE_HW_ISSUE_T76X_3966, 429 BASE_HW_ISSUE_T76X_3979, 430 BASE_HW_ISSUE_TMIX_7891, 431 BASE_HW_ISSUE_TMIX_8438, 432 BASE_HW_ISSUE_END 433 }; 434 435 static const enum base_hw_issue base_hw_issues_t76x_r0p2[] = { 436 BASE_HW_ISSUE_9435, 437 BASE_HW_ISSUE_10821, 438 BASE_HW_ISSUE_10883, 439 BASE_HW_ISSUE_10946, 440 BASE_HW_ISSUE_11020, 441 BASE_HW_ISSUE_11024, 442 BASE_HW_ISSUE_11042, 443 BASE_HW_ISSUE_11051, 444 BASE_HW_ISSUE_11054, 445 BASE_HW_ISSUE_T76X_26, 446 BASE_HW_ISSUE_T76X_1909, 447 BASE_HW_ISSUE_T76X_1963, 448 BASE_HW_ISSUE_T76X_3086, 449 BASE_HW_ISSUE_T76X_3542, 450 BASE_HW_ISSUE_T76X_3556, 451 BASE_HW_ISSUE_T76X_3700, 452 BASE_HW_ISSUE_T76X_3793, 453 BASE_HW_ISSUE_T76X_3953, 454 BASE_HW_ISSUE_T76X_3960, 455 BASE_HW_ISSUE_T76X_3964, 456 BASE_HW_ISSUE_T76X_3966, 457 BASE_HW_ISSUE_T76X_3979, 458 BASE_HW_ISSUE_TMIX_7891, 459 BASE_HW_ISSUE_TMIX_8438, 460 BASE_HW_ISSUE_END 461 }; 462 463 static const enum base_hw_issue base_hw_issues_t76x_r0p3[] = { 464 BASE_HW_ISSUE_9435, 465 BASE_HW_ISSUE_10821, 466 BASE_HW_ISSUE_10883, 467 BASE_HW_ISSUE_10946, 468 BASE_HW_ISSUE_11042, 469 BASE_HW_ISSUE_11051, 470 BASE_HW_ISSUE_11054, 471 BASE_HW_ISSUE_T76X_26, 472 BASE_HW_ISSUE_T76X_1909, 473 BASE_HW_ISSUE_T76X_1963, 474 BASE_HW_ISSUE_T76X_3086, 475 BASE_HW_ISSUE_T76X_3542, 476 BASE_HW_ISSUE_T76X_3556, 477 BASE_HW_ISSUE_T76X_3700, 478 BASE_HW_ISSUE_T76X_3793, 479 BASE_HW_ISSUE_T76X_3953, 480 BASE_HW_ISSUE_T76X_3960, 481 BASE_HW_ISSUE_T76X_3964, 482 BASE_HW_ISSUE_T76X_3966, 483 BASE_HW_ISSUE_T76X_3979, 484 BASE_HW_ISSUE_TMIX_7891, 485 BASE_HW_ISSUE_TMIX_8438, 486 BASE_HW_ISSUE_END 487 }; 488 489 static const enum base_hw_issue base_hw_issues_t76x_r1p0[] = { 490 BASE_HW_ISSUE_9435, 491 BASE_HW_ISSUE_10821, 492 BASE_HW_ISSUE_10883, 493 BASE_HW_ISSUE_10946, 494 BASE_HW_ISSUE_11042, 495 BASE_HW_ISSUE_11051, 496 BASE_HW_ISSUE_11054, 497 BASE_HW_ISSUE_T76X_1909, 498 BASE_HW_ISSUE_T76X_1963, 499 BASE_HW_ISSUE_T76X_3086, 500 BASE_HW_ISSUE_T76X_3700, 501 BASE_HW_ISSUE_T76X_3793, 502 BASE_HW_ISSUE_T76X_3953, 503 BASE_HW_ISSUE_T76X_3960, 504 BASE_HW_ISSUE_T76X_3964, 505 BASE_HW_ISSUE_T76X_3966, 506 BASE_HW_ISSUE_T76X_3979, 507 BASE_HW_ISSUE_TMIX_7891, 508 BASE_HW_ISSUE_TMIX_8438, 509 BASE_HW_ISSUE_END 510 }; 511 512 static const enum base_hw_issue base_hw_issues_t72x_r0p0[] = { 513 BASE_HW_ISSUE_6402, 514 BASE_HW_ISSUE_9435, 515 BASE_HW_ISSUE_10471, 516 BASE_HW_ISSUE_10649, 517 BASE_HW_ISSUE_10684, 518 BASE_HW_ISSUE_10797, 519 BASE_HW_ISSUE_10821, 520 BASE_HW_ISSUE_10883, 521 BASE_HW_ISSUE_10946, 522 BASE_HW_ISSUE_11042, 523 BASE_HW_ISSUE_11051, 524 BASE_HW_ISSUE_11054, 525 BASE_HW_ISSUE_T76X_1909, 526 BASE_HW_ISSUE_T76X_1963, 527 BASE_HW_ISSUE_T76X_3964, 528 BASE_HW_ISSUE_TMIX_8438, 529 BASE_HW_ISSUE_END 530 }; 531 532 static const enum base_hw_issue base_hw_issues_t72x_r1p0[] = { 533 BASE_HW_ISSUE_6402, 534 BASE_HW_ISSUE_9435, 535 BASE_HW_ISSUE_10471, 536 BASE_HW_ISSUE_10649, 537 BASE_HW_ISSUE_10684, 538 BASE_HW_ISSUE_10797, 539 BASE_HW_ISSUE_10821, 540 BASE_HW_ISSUE_10883, 541 BASE_HW_ISSUE_10946, 542 BASE_HW_ISSUE_11042, 543 BASE_HW_ISSUE_11051, 544 BASE_HW_ISSUE_11054, 545 BASE_HW_ISSUE_T720_1386, 546 BASE_HW_ISSUE_T76X_1909, 547 BASE_HW_ISSUE_T76X_1963, 548 BASE_HW_ISSUE_T76X_3964, 549 BASE_HW_ISSUE_TMIX_8438, 550 BASE_HW_ISSUE_END 551 }; 552 553 static const enum base_hw_issue base_hw_issues_t72x_r1p1[] = { 554 BASE_HW_ISSUE_6402, 555 BASE_HW_ISSUE_9435, 556 BASE_HW_ISSUE_10471, 557 BASE_HW_ISSUE_10649, 558 BASE_HW_ISSUE_10684, 559 BASE_HW_ISSUE_10797, 560 BASE_HW_ISSUE_10821, 561 BASE_HW_ISSUE_10883, 562 BASE_HW_ISSUE_10946, 563 BASE_HW_ISSUE_11042, 564 BASE_HW_ISSUE_11051, 565 BASE_HW_ISSUE_11054, 566 BASE_HW_ISSUE_T720_1386, 567 BASE_HW_ISSUE_T76X_1909, 568 BASE_HW_ISSUE_T76X_1963, 569 BASE_HW_ISSUE_T76X_3964, 570 BASE_HW_ISSUE_TMIX_8438, 571 BASE_HW_ISSUE_END 572 }; 573 574 static const enum base_hw_issue base_hw_issues_model_t72x[] = { 575 BASE_HW_ISSUE_5736, 576 BASE_HW_ISSUE_6402, 577 BASE_HW_ISSUE_9435, 578 BASE_HW_ISSUE_10471, 579 BASE_HW_ISSUE_10649, 580 BASE_HW_ISSUE_10797, 581 BASE_HW_ISSUE_11042, 582 BASE_HW_ISSUE_11051, 583 BASE_HW_ISSUE_T76X_1909, 584 BASE_HW_ISSUE_T76X_1963, 585 BASE_HW_ISSUE_T76X_3964, 586 GPUCORE_1619, 587 BASE_HW_ISSUE_END 588 }; 589 590 static const enum base_hw_issue base_hw_issues_model_t76x[] = { 591 BASE_HW_ISSUE_5736, 592 BASE_HW_ISSUE_9435, 593 BASE_HW_ISSUE_11020, 594 BASE_HW_ISSUE_11024, 595 BASE_HW_ISSUE_11042, 596 BASE_HW_ISSUE_11051, 597 BASE_HW_ISSUE_T76X_1909, 598 BASE_HW_ISSUE_T76X_1963, 599 BASE_HW_ISSUE_T76X_3086, 600 BASE_HW_ISSUE_T76X_3700, 601 BASE_HW_ISSUE_T76X_3793, 602 BASE_HW_ISSUE_T76X_3964, 603 BASE_HW_ISSUE_T76X_3979, 604 BASE_HW_ISSUE_TMIX_7891, 605 GPUCORE_1619, 606 BASE_HW_ISSUE_END 607 }; 608 609 static const enum base_hw_issue base_hw_issues_model_t60x[] = { 610 BASE_HW_ISSUE_5736, 611 BASE_HW_ISSUE_6402, 612 BASE_HW_ISSUE_8778, 613 BASE_HW_ISSUE_9435, 614 BASE_HW_ISSUE_10472, 615 BASE_HW_ISSUE_10649, 616 BASE_HW_ISSUE_10931, 617 BASE_HW_ISSUE_11012, 618 BASE_HW_ISSUE_11020, 619 BASE_HW_ISSUE_11024, 620 BASE_HW_ISSUE_11051, 621 BASE_HW_ISSUE_T76X_1909, 622 BASE_HW_ISSUE_T76X_1963, 623 BASE_HW_ISSUE_T76X_3964, 624 GPUCORE_1619, 625 BASE_HW_ISSUE_END 626 }; 627 628 static const enum base_hw_issue base_hw_issues_model_t62x[] = { 629 BASE_HW_ISSUE_5736, 630 BASE_HW_ISSUE_6402, 631 BASE_HW_ISSUE_9435, 632 BASE_HW_ISSUE_10472, 633 BASE_HW_ISSUE_10649, 634 BASE_HW_ISSUE_10931, 635 BASE_HW_ISSUE_11012, 636 BASE_HW_ISSUE_11020, 637 BASE_HW_ISSUE_11024, 638 BASE_HW_ISSUE_11042, 639 BASE_HW_ISSUE_11051, 640 BASE_HW_ISSUE_T76X_1909, 641 BASE_HW_ISSUE_T76X_1963, 642 BASE_HW_ISSUE_T76X_3964, 643 GPUCORE_1619, 644 BASE_HW_ISSUE_END 645 }; 646 647 static const enum base_hw_issue base_hw_issues_tFRx_r0p1[] = { 648 BASE_HW_ISSUE_9435, 649 BASE_HW_ISSUE_10821, 650 BASE_HW_ISSUE_10883, 651 BASE_HW_ISSUE_10946, 652 BASE_HW_ISSUE_11051, 653 BASE_HW_ISSUE_11054, 654 BASE_HW_ISSUE_T76X_1909, 655 BASE_HW_ISSUE_T76X_1963, 656 BASE_HW_ISSUE_T76X_3086, 657 BASE_HW_ISSUE_T76X_3700, 658 BASE_HW_ISSUE_T76X_3793, 659 BASE_HW_ISSUE_T76X_3953, 660 BASE_HW_ISSUE_T76X_3960, 661 BASE_HW_ISSUE_T76X_3964, 662 BASE_HW_ISSUE_T76X_3966, 663 BASE_HW_ISSUE_T76X_3979, 664 BASE_HW_ISSUE_TMIX_7891, 665 BASE_HW_ISSUE_TMIX_8438, 666 BASE_HW_ISSUE_END 667 }; 668 669 static const enum base_hw_issue base_hw_issues_tFRx_r0p2[] = { 670 BASE_HW_ISSUE_9435, 671 BASE_HW_ISSUE_10821, 672 BASE_HW_ISSUE_10883, 673 BASE_HW_ISSUE_10946, 674 BASE_HW_ISSUE_11051, 675 BASE_HW_ISSUE_11054, 676 BASE_HW_ISSUE_T76X_1909, 677 BASE_HW_ISSUE_T76X_1963, 678 BASE_HW_ISSUE_T76X_3086, 679 BASE_HW_ISSUE_T76X_3700, 680 BASE_HW_ISSUE_T76X_3793, 681 BASE_HW_ISSUE_T76X_3953, 682 BASE_HW_ISSUE_T76X_3964, 683 BASE_HW_ISSUE_T76X_3966, 684 BASE_HW_ISSUE_T76X_3979, 685 BASE_HW_ISSUE_TMIX_7891, 686 BASE_HW_ISSUE_TMIX_8438, 687 BASE_HW_ISSUE_END 688 }; 689 690 static const enum base_hw_issue base_hw_issues_tFRx_r1p0[] = { 691 BASE_HW_ISSUE_9435, 692 BASE_HW_ISSUE_10821, 693 BASE_HW_ISSUE_10883, 694 BASE_HW_ISSUE_10946, 695 BASE_HW_ISSUE_11051, 696 BASE_HW_ISSUE_11054, 697 BASE_HW_ISSUE_T76X_1963, 698 BASE_HW_ISSUE_T76X_3086, 699 BASE_HW_ISSUE_T76X_3700, 700 BASE_HW_ISSUE_T76X_3793, 701 BASE_HW_ISSUE_T76X_3953, 702 BASE_HW_ISSUE_T76X_3966, 703 BASE_HW_ISSUE_T76X_3979, 704 BASE_HW_ISSUE_TMIX_7891, 705 BASE_HW_ISSUE_TMIX_8438, 706 BASE_HW_ISSUE_END 707 }; 708 709 static const enum base_hw_issue base_hw_issues_tFRx_r2p0[] = { 710 BASE_HW_ISSUE_9435, 711 BASE_HW_ISSUE_10821, 712 BASE_HW_ISSUE_10883, 713 BASE_HW_ISSUE_10946, 714 BASE_HW_ISSUE_11051, 715 BASE_HW_ISSUE_11054, 716 BASE_HW_ISSUE_T76X_1963, 717 BASE_HW_ISSUE_T76X_3086, 718 BASE_HW_ISSUE_T76X_3700, 719 BASE_HW_ISSUE_T76X_3793, 720 BASE_HW_ISSUE_T76X_3953, 721 BASE_HW_ISSUE_T76X_3966, 722 BASE_HW_ISSUE_T76X_3979, 723 BASE_HW_ISSUE_TMIX_7891, 724 BASE_HW_ISSUE_TMIX_8438, 725 BASE_HW_ISSUE_END 726 }; 727 728 static const enum base_hw_issue base_hw_issues_model_tFRx[] = { 729 BASE_HW_ISSUE_5736, 730 BASE_HW_ISSUE_9435, 731 BASE_HW_ISSUE_11051, 732 BASE_HW_ISSUE_T76X_1963, 733 BASE_HW_ISSUE_T76X_3086, 734 BASE_HW_ISSUE_T76X_3700, 735 BASE_HW_ISSUE_T76X_3793, 736 BASE_HW_ISSUE_T76X_3964, 737 BASE_HW_ISSUE_T76X_3979, 738 BASE_HW_ISSUE_TMIX_7891, 739 GPUCORE_1619, 740 BASE_HW_ISSUE_END 741 }; 742 743 static const enum base_hw_issue base_hw_issues_t86x_r0p2[] = { 744 BASE_HW_ISSUE_9435, 745 BASE_HW_ISSUE_10821, 746 BASE_HW_ISSUE_10883, 747 BASE_HW_ISSUE_10946, 748 BASE_HW_ISSUE_11051, 749 BASE_HW_ISSUE_11054, 750 BASE_HW_ISSUE_T76X_1909, 751 BASE_HW_ISSUE_T76X_1963, 752 BASE_HW_ISSUE_T76X_3086, 753 BASE_HW_ISSUE_T76X_3700, 754 BASE_HW_ISSUE_T76X_3793, 755 BASE_HW_ISSUE_T76X_3953, 756 BASE_HW_ISSUE_T76X_3964, 757 BASE_HW_ISSUE_T76X_3966, 758 BASE_HW_ISSUE_T76X_3979, 759 BASE_HW_ISSUE_TMIX_7891, 760 BASE_HW_ISSUE_TMIX_8438, 761 BASE_HW_ISSUE_END 762 }; 763 764 static const enum base_hw_issue base_hw_issues_t86x_r1p0[] = { 765 BASE_HW_ISSUE_9435, 766 BASE_HW_ISSUE_10821, 767 BASE_HW_ISSUE_10883, 768 BASE_HW_ISSUE_10946, 769 BASE_HW_ISSUE_11051, 770 BASE_HW_ISSUE_11054, 771 BASE_HW_ISSUE_T76X_1963, 772 BASE_HW_ISSUE_T76X_3086, 773 BASE_HW_ISSUE_T76X_3700, 774 BASE_HW_ISSUE_T76X_3793, 775 BASE_HW_ISSUE_T76X_3953, 776 BASE_HW_ISSUE_T76X_3966, 777 BASE_HW_ISSUE_T76X_3979, 778 BASE_HW_ISSUE_TMIX_7891, 779 BASE_HW_ISSUE_TMIX_8438, 780 BASE_HW_ISSUE_END 781 }; 782 783 static const enum base_hw_issue base_hw_issues_t86x_r2p0[] = { 784 BASE_HW_ISSUE_9435, 785 BASE_HW_ISSUE_10821, 786 BASE_HW_ISSUE_10883, 787 BASE_HW_ISSUE_10946, 788 BASE_HW_ISSUE_11051, 789 BASE_HW_ISSUE_11054, 790 BASE_HW_ISSUE_T76X_1963, 791 BASE_HW_ISSUE_T76X_3086, 792 BASE_HW_ISSUE_T76X_3700, 793 BASE_HW_ISSUE_T76X_3793, 794 BASE_HW_ISSUE_T76X_3953, 795 BASE_HW_ISSUE_T76X_3966, 796 BASE_HW_ISSUE_T76X_3979, 797 BASE_HW_ISSUE_TMIX_7891, 798 BASE_HW_ISSUE_TMIX_8438, 799 BASE_HW_ISSUE_END 800 }; 801 802 static const enum base_hw_issue base_hw_issues_model_t86x[] = { 803 BASE_HW_ISSUE_5736, 804 BASE_HW_ISSUE_9435, 805 BASE_HW_ISSUE_11051, 806 BASE_HW_ISSUE_T76X_1963, 807 BASE_HW_ISSUE_T76X_3086, 808 BASE_HW_ISSUE_T76X_3700, 809 BASE_HW_ISSUE_T76X_3793, 810 BASE_HW_ISSUE_T76X_3979, 811 BASE_HW_ISSUE_TMIX_7891, 812 GPUCORE_1619, 813 BASE_HW_ISSUE_END 814 }; 815 816 static const enum base_hw_issue base_hw_issues_t83x_r0p1[] = { 817 BASE_HW_ISSUE_9435, 818 BASE_HW_ISSUE_10821, 819 BASE_HW_ISSUE_10883, 820 BASE_HW_ISSUE_10946, 821 BASE_HW_ISSUE_11051, 822 BASE_HW_ISSUE_11054, 823 BASE_HW_ISSUE_T720_1386, 824 BASE_HW_ISSUE_T76X_1909, 825 BASE_HW_ISSUE_T76X_1963, 826 BASE_HW_ISSUE_T76X_3086, 827 BASE_HW_ISSUE_T76X_3700, 828 BASE_HW_ISSUE_T76X_3793, 829 BASE_HW_ISSUE_T76X_3953, 830 BASE_HW_ISSUE_T76X_3960, 831 BASE_HW_ISSUE_T76X_3979, 832 BASE_HW_ISSUE_TMIX_7891, 833 BASE_HW_ISSUE_TMIX_8438, 834 BASE_HW_ISSUE_END 835 }; 836 837 static const enum base_hw_issue base_hw_issues_t83x_r1p0[] = { 838 BASE_HW_ISSUE_9435, 839 BASE_HW_ISSUE_10821, 840 BASE_HW_ISSUE_10883, 841 BASE_HW_ISSUE_10946, 842 BASE_HW_ISSUE_11051, 843 BASE_HW_ISSUE_11054, 844 BASE_HW_ISSUE_T720_1386, 845 BASE_HW_ISSUE_T76X_1963, 846 BASE_HW_ISSUE_T76X_3086, 847 BASE_HW_ISSUE_T76X_3700, 848 BASE_HW_ISSUE_T76X_3793, 849 BASE_HW_ISSUE_T76X_3953, 850 BASE_HW_ISSUE_T76X_3960, 851 BASE_HW_ISSUE_T76X_3979, 852 BASE_HW_ISSUE_TMIX_7891, 853 BASE_HW_ISSUE_TMIX_8438, 854 BASE_HW_ISSUE_END 855 }; 856 857 static const enum base_hw_issue base_hw_issues_model_t83x[] = { 858 BASE_HW_ISSUE_5736, 859 BASE_HW_ISSUE_9435, 860 BASE_HW_ISSUE_11051, 861 BASE_HW_ISSUE_T76X_1963, 862 BASE_HW_ISSUE_T76X_3086, 863 BASE_HW_ISSUE_T76X_3700, 864 BASE_HW_ISSUE_T76X_3793, 865 BASE_HW_ISSUE_T76X_3964, 866 BASE_HW_ISSUE_T76X_3979, 867 BASE_HW_ISSUE_TMIX_7891, 868 GPUCORE_1619, 869 BASE_HW_ISSUE_TMIX_8438, 870 BASE_HW_ISSUE_END 871 }; 872 873 static const enum base_hw_issue base_hw_issues_t82x_r0p0[] = { 874 BASE_HW_ISSUE_9435, 875 BASE_HW_ISSUE_10821, 876 BASE_HW_ISSUE_10883, 877 BASE_HW_ISSUE_10946, 878 BASE_HW_ISSUE_11051, 879 BASE_HW_ISSUE_11054, 880 BASE_HW_ISSUE_T720_1386, 881 BASE_HW_ISSUE_T76X_1909, 882 BASE_HW_ISSUE_T76X_1963, 883 BASE_HW_ISSUE_T76X_3086, 884 BASE_HW_ISSUE_T76X_3700, 885 BASE_HW_ISSUE_T76X_3793, 886 BASE_HW_ISSUE_T76X_3953, 887 BASE_HW_ISSUE_T76X_3960, 888 BASE_HW_ISSUE_T76X_3964, 889 BASE_HW_ISSUE_T76X_3979, 890 BASE_HW_ISSUE_TMIX_7891, 891 BASE_HW_ISSUE_TMIX_8438, 892 BASE_HW_ISSUE_END 893 }; 894 895 static const enum base_hw_issue base_hw_issues_t82x_r0p1[] = { 896 BASE_HW_ISSUE_9435, 897 BASE_HW_ISSUE_10821, 898 BASE_HW_ISSUE_10883, 899 BASE_HW_ISSUE_10946, 900 BASE_HW_ISSUE_11051, 901 BASE_HW_ISSUE_11054, 902 BASE_HW_ISSUE_T720_1386, 903 BASE_HW_ISSUE_T76X_1909, 904 BASE_HW_ISSUE_T76X_1963, 905 BASE_HW_ISSUE_T76X_3086, 906 BASE_HW_ISSUE_T76X_3700, 907 BASE_HW_ISSUE_T76X_3793, 908 BASE_HW_ISSUE_T76X_3953, 909 BASE_HW_ISSUE_T76X_3960, 910 BASE_HW_ISSUE_T76X_3979, 911 BASE_HW_ISSUE_TMIX_7891, 912 BASE_HW_ISSUE_TMIX_8438, 913 BASE_HW_ISSUE_END 914 }; 915 916 static const enum base_hw_issue base_hw_issues_t82x_r1p0[] = { 917 BASE_HW_ISSUE_9435, 918 BASE_HW_ISSUE_10821, 919 BASE_HW_ISSUE_10883, 920 BASE_HW_ISSUE_10946, 921 BASE_HW_ISSUE_11051, 922 BASE_HW_ISSUE_11054, 923 BASE_HW_ISSUE_T720_1386, 924 BASE_HW_ISSUE_T76X_1963, 925 BASE_HW_ISSUE_T76X_3086, 926 BASE_HW_ISSUE_T76X_3700, 927 BASE_HW_ISSUE_T76X_3793, 928 BASE_HW_ISSUE_T76X_3953, 929 BASE_HW_ISSUE_T76X_3960, 930 BASE_HW_ISSUE_T76X_3979, 931 BASE_HW_ISSUE_TMIX_7891, 932 BASE_HW_ISSUE_TMIX_8438, 933 BASE_HW_ISSUE_END 934 }; 935 936 static const enum base_hw_issue base_hw_issues_model_t82x[] = { 937 BASE_HW_ISSUE_5736, 938 BASE_HW_ISSUE_9435, 939 BASE_HW_ISSUE_11051, 940 BASE_HW_ISSUE_T76X_1963, 941 BASE_HW_ISSUE_T76X_3086, 942 BASE_HW_ISSUE_T76X_3700, 943 BASE_HW_ISSUE_T76X_3793, 944 BASE_HW_ISSUE_T76X_3979, 945 BASE_HW_ISSUE_TMIX_7891, 946 GPUCORE_1619, 947 BASE_HW_ISSUE_END 948 }; 949 950 static const enum base_hw_issue base_hw_issues_tMIx_r0p0_05dev0[] = { 951 BASE_HW_ISSUE_9435, 952 BASE_HW_ISSUE_10682, 953 BASE_HW_ISSUE_11054, 954 BASE_HW_ISSUE_T76X_3953, 955 BASE_HW_ISSUE_TMIX_7891, 956 BASE_HW_ISSUE_TMIX_8042, 957 BASE_HW_ISSUE_TMIX_8133, 958 BASE_HW_ISSUE_TMIX_8138, 959 BASE_HW_ISSUE_TMIX_8206, 960 BASE_HW_ISSUE_TMIX_8343, 961 BASE_HW_ISSUE_TMIX_8463, 962 BASE_HW_ISSUE_TMIX_8456, 963 BASE_HW_ISSUE_TMIX_8438, 964 BASE_HW_ISSUE_END 965 }; 966 967 static const enum base_hw_issue base_hw_issues_tMIx_r0p0[] = { 968 BASE_HW_ISSUE_9435, 969 BASE_HW_ISSUE_10682, 970 BASE_HW_ISSUE_11054, 971 BASE_HW_ISSUE_TMIX_7891, 972 BASE_HW_ISSUE_TMIX_7940, 973 BASE_HW_ISSUE_TMIX_8042, 974 BASE_HW_ISSUE_TMIX_8133, 975 BASE_HW_ISSUE_TMIX_8138, 976 BASE_HW_ISSUE_TMIX_8206, 977 BASE_HW_ISSUE_TMIX_8343, 978 BASE_HW_ISSUE_TMIX_8463, 979 BASE_HW_ISSUE_TMIX_8456, 980 BASE_HW_ISSUE_TMIX_8438, 981 BASE_HW_ISSUE_END 982 }; 983 984 static const enum base_hw_issue base_hw_issues_model_tMIx[] = { 985 BASE_HW_ISSUE_5736, 986 BASE_HW_ISSUE_9435, 987 BASE_HW_ISSUE_TMIX_7891, 988 BASE_HW_ISSUE_TMIX_7940, 989 BASE_HW_ISSUE_TMIX_8042, 990 BASE_HW_ISSUE_TMIX_8133, 991 BASE_HW_ISSUE_TMIX_8138, 992 BASE_HW_ISSUE_TMIX_8206, 993 BASE_HW_ISSUE_TMIX_8343, 994 BASE_HW_ISSUE_TMIX_8456, 995 BASE_HW_ISSUE_END 996 }; 997 998 static const enum base_hw_issue base_hw_issues_tHEx_r0p0[] = { 999 BASE_HW_ISSUE_9435, 1000 BASE_HW_ISSUE_10682, 1001 BASE_HW_ISSUE_TMIX_7891, 1002 BASE_HW_ISSUE_TMIX_8042, 1003 BASE_HW_ISSUE_TMIX_8133, 1004 BASE_HW_ISSUE_END 1005 }; 1006 1007 static const enum base_hw_issue base_hw_issues_tHEx_r0p1[] = { 1008 BASE_HW_ISSUE_9435, 1009 BASE_HW_ISSUE_10682, 1010 BASE_HW_ISSUE_TMIX_7891, 1011 BASE_HW_ISSUE_TMIX_8042, 1012 BASE_HW_ISSUE_TMIX_8133, 1013 BASE_HW_ISSUE_END 1014 }; 1015 1016 static const enum base_hw_issue base_hw_issues_model_tHEx[] = { 1017 BASE_HW_ISSUE_5736, 1018 BASE_HW_ISSUE_9435, 1019 BASE_HW_ISSUE_TMIX_7891, 1020 BASE_HW_ISSUE_TMIX_8042, 1021 BASE_HW_ISSUE_TMIX_8133, 1022 BASE_HW_ISSUE_END 1023 }; 1024 1025 static const enum base_hw_issue base_hw_issues_tSIx_r0p0[] = { 1026 BASE_HW_ISSUE_9435, 1027 BASE_HW_ISSUE_TMIX_8133, 1028 BASE_HW_ISSUE_TSIX_1116, 1029 BASE_HW_ISSUE_END 1030 }; 1031 1032 static const enum base_hw_issue base_hw_issues_tSIx_r0p1[] = { 1033 BASE_HW_ISSUE_9435, 1034 BASE_HW_ISSUE_TMIX_8133, 1035 BASE_HW_ISSUE_TSIX_1116, 1036 BASE_HW_ISSUE_END 1037 }; 1038 1039 static const enum base_hw_issue base_hw_issues_tSIx_r1p0[] = { 1040 BASE_HW_ISSUE_9435, 1041 BASE_HW_ISSUE_TMIX_8133, 1042 BASE_HW_ISSUE_TSIX_1116, 1043 BASE_HW_ISSUE_END 1044 }; 1045 1046 static const enum base_hw_issue base_hw_issues_model_tSIx[] = { 1047 BASE_HW_ISSUE_5736, 1048 BASE_HW_ISSUE_9435, 1049 BASE_HW_ISSUE_TMIX_8133, 1050 BASE_HW_ISSUE_TSIX_1116, 1051 BASE_HW_ISSUE_END 1052 }; 1053 1054 1055 1056 #ifdef MALI_INCLUDE_TKAX 1057 static const enum base_hw_issue base_hw_issues_tKAx_r0p0[] = { 1058 BASE_HW_ISSUE_9435, 1059 BASE_HW_ISSUE_TMIX_8133, 1060 BASE_HW_ISSUE_TSIX_1116, 1061 BASE_HW_ISSUE_END 1062 }; 1063 1064 #endif /* MALI_INCLUDE_TKAX */ 1065 1066 #ifdef MALI_INCLUDE_TKAX 1067 static const enum base_hw_issue base_hw_issues_model_tKAx[] = { 1068 BASE_HW_ISSUE_5736, 1069 BASE_HW_ISSUE_9435, 1070 BASE_HW_ISSUE_TMIX_8133, 1071 BASE_HW_ISSUE_TSIX_1116, 1072 BASE_HW_ISSUE_END 1073 }; 1074 1075 #endif /* MALI_INCLUDE_TKAX */ 1076 1077 #ifdef MALI_INCLUDE_TTRX 1078 static const enum base_hw_issue base_hw_issues_tTRx_r0p0[] = { 1079 BASE_HW_ISSUE_9435, 1080 BASE_HW_ISSUE_TMIX_8133, 1081 BASE_HW_ISSUE_TSIX_1116, 1082 BASE_HW_ISSUE_END 1083 }; 1084 1085 #endif /* MALI_INCLUDE_TTRX */ 1086 1087 #ifdef MALI_INCLUDE_TTRX 1088 static const enum base_hw_issue base_hw_issues_model_tTRx[] = { 1089 BASE_HW_ISSUE_5736, 1090 BASE_HW_ISSUE_9435, 1091 BASE_HW_ISSUE_TMIX_8133, 1092 BASE_HW_ISSUE_TSIX_1116, 1093 BASE_HW_ISSUE_END 1094 }; 1095 1096 #endif /* MALI_INCLUDE_TTRX */ 1097 1098 #endif /* _BASE_HWCONFIG_ISSUES_H_ */ 1099