1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 /* 3 * 4 * (C) COPYRIGHT 2014-2023 ARM Limited. All rights reserved. 5 * 6 * This program is free software and is provided to you under the terms of the 7 * GNU General Public License version 2 as published by the Free Software 8 * Foundation, and any use by you of this program is subject to the terms 9 * of such GNU license. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, you can access it online at 18 * http://www.gnu.org/licenses/gpl-2.0.html. 19 * 20 */ 21 22 /* AUTOMATICALLY GENERATED FILE. If you want to amend the issues/features, 23 * please update base/tools/hwconfig_generator/hwc_{issues,features}.py 24 * For more information see base/tools/hwconfig_generator/README 25 */ 26 27 #ifndef _BASE_HWCONFIG_ISSUES_H_ 28 #define _BASE_HWCONFIG_ISSUES_H_ 29 30 enum base_hw_issue { 31 BASE_HW_ISSUE_5736, 32 BASE_HW_ISSUE_9435, 33 BASE_HW_ISSUE_10682, 34 BASE_HW_ISSUE_11054, 35 BASE_HW_ISSUE_T76X_3953, 36 BASE_HW_ISSUE_TMIX_7891, 37 BASE_HW_ISSUE_TMIX_7940, 38 BASE_HW_ISSUE_TMIX_8042, 39 BASE_HW_ISSUE_TMIX_8133, 40 BASE_HW_ISSUE_TMIX_8138, 41 BASE_HW_ISSUE_TMIX_8206, 42 BASE_HW_ISSUE_TMIX_8343, 43 BASE_HW_ISSUE_TMIX_8463, 44 BASE_HW_ISSUE_TMIX_8456, 45 BASE_HW_ISSUE_TSIX_1116, 46 BASE_HW_ISSUE_TSIX_2033, 47 BASE_HW_ISSUE_TMIX_8438, 48 BASE_HW_ISSUE_TNOX_1194, 49 BASE_HW_ISSUE_TGOX_R1_1234, 50 BASE_HW_ISSUE_TTRX_1337, 51 BASE_HW_ISSUE_TSIX_1792, 52 BASE_HW_ISSUE_TTRX_2968_TTRX_3162, 53 BASE_HW_ISSUE_TTRX_3076, 54 BASE_HW_ISSUE_TTRX_921, 55 BASE_HW_ISSUE_TTRX_3414, 56 BASE_HW_ISSUE_GPU2017_1336, 57 BASE_HW_ISSUE_TTRX_3083, 58 BASE_HW_ISSUE_TTRX_3470, 59 BASE_HW_ISSUE_TTRX_3464, 60 BASE_HW_ISSUE_TTRX_3485, 61 BASE_HW_ISSUE_GPU2019_3212, 62 BASE_HW_ISSUE_TURSEHW_1997, 63 BASE_HW_ISSUE_GPU2019_3878, 64 BASE_HW_ISSUE_TURSEHW_2716, 65 BASE_HW_ISSUE_GPU2019_3901, 66 BASE_HW_ISSUE_GPU2021PRO_290, 67 BASE_HW_ISSUE_TITANHW_2710, 68 BASE_HW_ISSUE_TITANHW_2679, 69 BASE_HW_ISSUE_GPU2022PRO_148, 70 BASE_HW_ISSUE_END 71 }; 72 73 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_generic[] = { 74 BASE_HW_ISSUE_END 75 }; 76 77 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tMIx_r0p0_05dev0[] = { 78 BASE_HW_ISSUE_9435, 79 BASE_HW_ISSUE_10682, 80 BASE_HW_ISSUE_11054, 81 BASE_HW_ISSUE_T76X_3953, 82 BASE_HW_ISSUE_TMIX_7891, 83 BASE_HW_ISSUE_TMIX_8042, 84 BASE_HW_ISSUE_TMIX_8133, 85 BASE_HW_ISSUE_TMIX_8138, 86 BASE_HW_ISSUE_TMIX_8206, 87 BASE_HW_ISSUE_TMIX_8343, 88 BASE_HW_ISSUE_TMIX_8463, 89 BASE_HW_ISSUE_TMIX_8456, 90 BASE_HW_ISSUE_TMIX_8438, 91 BASE_HW_ISSUE_TSIX_2033, 92 BASE_HW_ISSUE_TTRX_921, 93 BASE_HW_ISSUE_GPU2017_1336, 94 BASE_HW_ISSUE_TITANHW_2710, 95 BASE_HW_ISSUE_GPU2022PRO_148, 96 BASE_HW_ISSUE_END 97 }; 98 99 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tMIx_r0p0[] = { 100 BASE_HW_ISSUE_9435, 101 BASE_HW_ISSUE_10682, 102 BASE_HW_ISSUE_11054, 103 BASE_HW_ISSUE_TMIX_7891, 104 BASE_HW_ISSUE_TMIX_7940, 105 BASE_HW_ISSUE_TMIX_8042, 106 BASE_HW_ISSUE_TMIX_8133, 107 BASE_HW_ISSUE_TMIX_8138, 108 BASE_HW_ISSUE_TMIX_8206, 109 BASE_HW_ISSUE_TMIX_8343, 110 BASE_HW_ISSUE_TMIX_8463, 111 BASE_HW_ISSUE_TMIX_8456, 112 BASE_HW_ISSUE_TMIX_8438, 113 BASE_HW_ISSUE_TSIX_2033, 114 BASE_HW_ISSUE_TTRX_921, 115 BASE_HW_ISSUE_GPU2017_1336, 116 BASE_HW_ISSUE_TITANHW_2710, 117 BASE_HW_ISSUE_GPU2022PRO_148, 118 BASE_HW_ISSUE_END 119 }; 120 121 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tMIx_r0p1[] = { 122 BASE_HW_ISSUE_9435, 123 BASE_HW_ISSUE_10682, 124 BASE_HW_ISSUE_11054, 125 BASE_HW_ISSUE_TMIX_7891, 126 BASE_HW_ISSUE_TMIX_7940, 127 BASE_HW_ISSUE_TMIX_8042, 128 BASE_HW_ISSUE_TMIX_8133, 129 BASE_HW_ISSUE_TMIX_8138, 130 BASE_HW_ISSUE_TMIX_8206, 131 BASE_HW_ISSUE_TMIX_8343, 132 BASE_HW_ISSUE_TMIX_8463, 133 BASE_HW_ISSUE_TMIX_8456, 134 BASE_HW_ISSUE_TMIX_8438, 135 BASE_HW_ISSUE_TSIX_2033, 136 BASE_HW_ISSUE_TTRX_921, 137 BASE_HW_ISSUE_GPU2017_1336, 138 BASE_HW_ISSUE_TITANHW_2710, 139 BASE_HW_ISSUE_GPU2022PRO_148, 140 BASE_HW_ISSUE_END 141 }; 142 143 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tMIx[] = { 144 BASE_HW_ISSUE_5736, 145 BASE_HW_ISSUE_9435, 146 BASE_HW_ISSUE_TMIX_7891, 147 BASE_HW_ISSUE_TMIX_7940, 148 BASE_HW_ISSUE_TMIX_8042, 149 BASE_HW_ISSUE_TMIX_8133, 150 BASE_HW_ISSUE_TMIX_8138, 151 BASE_HW_ISSUE_TMIX_8206, 152 BASE_HW_ISSUE_TMIX_8343, 153 BASE_HW_ISSUE_TMIX_8456, 154 BASE_HW_ISSUE_TSIX_2033, 155 BASE_HW_ISSUE_TITANHW_2710, 156 BASE_HW_ISSUE_GPU2022PRO_148, 157 BASE_HW_ISSUE_END 158 }; 159 160 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tHEx_r0p0[] = { 161 BASE_HW_ISSUE_9435, 162 BASE_HW_ISSUE_10682, 163 BASE_HW_ISSUE_11054, 164 BASE_HW_ISSUE_TMIX_7891, 165 BASE_HW_ISSUE_TMIX_8042, 166 BASE_HW_ISSUE_TMIX_8133, 167 BASE_HW_ISSUE_TSIX_2033, 168 BASE_HW_ISSUE_TTRX_921, 169 BASE_HW_ISSUE_GPU2017_1336, 170 BASE_HW_ISSUE_TITANHW_2710, 171 BASE_HW_ISSUE_GPU2022PRO_148, 172 BASE_HW_ISSUE_END 173 }; 174 175 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tHEx_r0p1[] = { 176 BASE_HW_ISSUE_9435, 177 BASE_HW_ISSUE_10682, 178 BASE_HW_ISSUE_11054, 179 BASE_HW_ISSUE_TMIX_7891, 180 BASE_HW_ISSUE_TMIX_8042, 181 BASE_HW_ISSUE_TMIX_8133, 182 BASE_HW_ISSUE_TSIX_2033, 183 BASE_HW_ISSUE_TTRX_921, 184 BASE_HW_ISSUE_GPU2017_1336, 185 BASE_HW_ISSUE_TITANHW_2710, 186 BASE_HW_ISSUE_GPU2022PRO_148, 187 BASE_HW_ISSUE_END 188 }; 189 190 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tHEx_r0p2[] = { 191 BASE_HW_ISSUE_9435, 192 BASE_HW_ISSUE_10682, 193 BASE_HW_ISSUE_11054, 194 BASE_HW_ISSUE_TMIX_7891, 195 BASE_HW_ISSUE_TMIX_8042, 196 BASE_HW_ISSUE_TMIX_8133, 197 BASE_HW_ISSUE_TSIX_2033, 198 BASE_HW_ISSUE_TTRX_921, 199 BASE_HW_ISSUE_GPU2017_1336, 200 BASE_HW_ISSUE_TITANHW_2710, 201 BASE_HW_ISSUE_GPU2022PRO_148, 202 BASE_HW_ISSUE_END 203 }; 204 205 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tHEx_r0p3[] = { 206 BASE_HW_ISSUE_9435, 207 BASE_HW_ISSUE_10682, 208 BASE_HW_ISSUE_TMIX_7891, 209 BASE_HW_ISSUE_TMIX_8042, 210 BASE_HW_ISSUE_TMIX_8133, 211 BASE_HW_ISSUE_TSIX_2033, 212 BASE_HW_ISSUE_TTRX_921, 213 BASE_HW_ISSUE_GPU2017_1336, 214 BASE_HW_ISSUE_TITANHW_2710, 215 BASE_HW_ISSUE_GPU2022PRO_148, 216 BASE_HW_ISSUE_END 217 }; 218 219 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tHEx[] = { 220 BASE_HW_ISSUE_5736, 221 BASE_HW_ISSUE_9435, 222 BASE_HW_ISSUE_TMIX_7891, 223 BASE_HW_ISSUE_TMIX_8042, 224 BASE_HW_ISSUE_TMIX_8133, 225 BASE_HW_ISSUE_TSIX_2033, 226 BASE_HW_ISSUE_TITANHW_2710, 227 BASE_HW_ISSUE_GPU2022PRO_148, 228 BASE_HW_ISSUE_END 229 }; 230 231 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tSIx_r0p0[] = { 232 BASE_HW_ISSUE_9435, 233 BASE_HW_ISSUE_11054, 234 BASE_HW_ISSUE_TMIX_8133, 235 BASE_HW_ISSUE_TSIX_1116, 236 BASE_HW_ISSUE_TSIX_2033, 237 BASE_HW_ISSUE_TSIX_1792, 238 BASE_HW_ISSUE_TTRX_921, 239 BASE_HW_ISSUE_GPU2017_1336, 240 BASE_HW_ISSUE_TTRX_3464, 241 BASE_HW_ISSUE_TITANHW_2710, 242 BASE_HW_ISSUE_GPU2022PRO_148, 243 BASE_HW_ISSUE_END 244 }; 245 246 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tSIx_r0p1[] = { 247 BASE_HW_ISSUE_9435, 248 BASE_HW_ISSUE_11054, 249 BASE_HW_ISSUE_TMIX_8133, 250 BASE_HW_ISSUE_TSIX_1116, 251 BASE_HW_ISSUE_TSIX_2033, 252 BASE_HW_ISSUE_TSIX_1792, 253 BASE_HW_ISSUE_TTRX_921, 254 BASE_HW_ISSUE_GPU2017_1336, 255 BASE_HW_ISSUE_TTRX_3464, 256 BASE_HW_ISSUE_TITANHW_2710, 257 BASE_HW_ISSUE_GPU2022PRO_148, 258 BASE_HW_ISSUE_END 259 }; 260 261 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tSIx_r1p0[] = { 262 BASE_HW_ISSUE_9435, 263 BASE_HW_ISSUE_11054, 264 BASE_HW_ISSUE_TMIX_8133, 265 BASE_HW_ISSUE_TSIX_1116, 266 BASE_HW_ISSUE_TSIX_2033, 267 BASE_HW_ISSUE_TTRX_921, 268 BASE_HW_ISSUE_GPU2017_1336, 269 BASE_HW_ISSUE_TTRX_3464, 270 BASE_HW_ISSUE_TITANHW_2710, 271 BASE_HW_ISSUE_GPU2022PRO_148, 272 BASE_HW_ISSUE_END 273 }; 274 275 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tSIx_r1p1[] = { 276 BASE_HW_ISSUE_9435, 277 BASE_HW_ISSUE_TMIX_8133, 278 BASE_HW_ISSUE_TSIX_1116, 279 BASE_HW_ISSUE_TSIX_2033, 280 BASE_HW_ISSUE_TTRX_921, 281 BASE_HW_ISSUE_GPU2017_1336, 282 BASE_HW_ISSUE_TTRX_3464, 283 BASE_HW_ISSUE_TITANHW_2710, 284 BASE_HW_ISSUE_GPU2022PRO_148, 285 BASE_HW_ISSUE_END 286 }; 287 288 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tSIx[] = { 289 BASE_HW_ISSUE_5736, 290 BASE_HW_ISSUE_9435, 291 BASE_HW_ISSUE_TMIX_8133, 292 BASE_HW_ISSUE_TSIX_1116, 293 BASE_HW_ISSUE_TSIX_2033, 294 BASE_HW_ISSUE_TTRX_3464, 295 BASE_HW_ISSUE_TITANHW_2710, 296 BASE_HW_ISSUE_GPU2022PRO_148, 297 BASE_HW_ISSUE_END 298 }; 299 300 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tDVx_r0p0[] = { 301 BASE_HW_ISSUE_9435, 302 BASE_HW_ISSUE_TMIX_8133, 303 BASE_HW_ISSUE_TSIX_1116, 304 BASE_HW_ISSUE_TSIX_2033, 305 BASE_HW_ISSUE_TTRX_921, 306 BASE_HW_ISSUE_GPU2017_1336, 307 BASE_HW_ISSUE_TTRX_3464, 308 BASE_HW_ISSUE_TITANHW_2710, 309 BASE_HW_ISSUE_GPU2022PRO_148, 310 BASE_HW_ISSUE_END 311 }; 312 313 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tDVx[] = { 314 BASE_HW_ISSUE_5736, 315 BASE_HW_ISSUE_9435, 316 BASE_HW_ISSUE_TMIX_8133, 317 BASE_HW_ISSUE_TSIX_1116, 318 BASE_HW_ISSUE_TSIX_2033, 319 BASE_HW_ISSUE_TTRX_3464, 320 BASE_HW_ISSUE_TITANHW_2710, 321 BASE_HW_ISSUE_GPU2022PRO_148, 322 BASE_HW_ISSUE_END 323 }; 324 325 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tNOx_r0p0[] = { 326 BASE_HW_ISSUE_9435, 327 BASE_HW_ISSUE_TMIX_8133, 328 BASE_HW_ISSUE_TSIX_1116, 329 BASE_HW_ISSUE_TSIX_2033, 330 BASE_HW_ISSUE_TNOX_1194, 331 BASE_HW_ISSUE_TTRX_921, 332 BASE_HW_ISSUE_GPU2017_1336, 333 BASE_HW_ISSUE_TTRX_3464, 334 BASE_HW_ISSUE_TITANHW_2710, 335 BASE_HW_ISSUE_GPU2022PRO_148, 336 BASE_HW_ISSUE_END 337 }; 338 339 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tNOx[] = { 340 BASE_HW_ISSUE_5736, 341 BASE_HW_ISSUE_9435, 342 BASE_HW_ISSUE_TMIX_8133, 343 BASE_HW_ISSUE_TSIX_1116, 344 BASE_HW_ISSUE_TSIX_2033, 345 BASE_HW_ISSUE_TTRX_3464, 346 BASE_HW_ISSUE_TITANHW_2710, 347 BASE_HW_ISSUE_GPU2022PRO_148, 348 BASE_HW_ISSUE_END 349 }; 350 351 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tGOx_r0p0[] = { 352 BASE_HW_ISSUE_9435, 353 BASE_HW_ISSUE_TMIX_8133, 354 BASE_HW_ISSUE_TSIX_1116, 355 BASE_HW_ISSUE_TSIX_2033, 356 BASE_HW_ISSUE_TNOX_1194, 357 BASE_HW_ISSUE_TTRX_921, 358 BASE_HW_ISSUE_GPU2017_1336, 359 BASE_HW_ISSUE_TTRX_3464, 360 BASE_HW_ISSUE_TITANHW_2710, 361 BASE_HW_ISSUE_GPU2022PRO_148, 362 BASE_HW_ISSUE_END 363 }; 364 365 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tGOx_r1p0[] = { 366 BASE_HW_ISSUE_9435, 367 BASE_HW_ISSUE_TMIX_8133, 368 BASE_HW_ISSUE_TSIX_1116, 369 BASE_HW_ISSUE_TSIX_2033, 370 BASE_HW_ISSUE_TGOX_R1_1234, 371 BASE_HW_ISSUE_TTRX_921, 372 BASE_HW_ISSUE_GPU2017_1336, 373 BASE_HW_ISSUE_TTRX_3464, 374 BASE_HW_ISSUE_TITANHW_2710, 375 BASE_HW_ISSUE_GPU2022PRO_148, 376 BASE_HW_ISSUE_END 377 }; 378 379 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tGOx[] = { 380 BASE_HW_ISSUE_5736, 381 BASE_HW_ISSUE_9435, 382 BASE_HW_ISSUE_TMIX_8133, 383 BASE_HW_ISSUE_TSIX_1116, 384 BASE_HW_ISSUE_TSIX_2033, 385 BASE_HW_ISSUE_TTRX_3464, 386 BASE_HW_ISSUE_TITANHW_2710, 387 BASE_HW_ISSUE_GPU2022PRO_148, 388 BASE_HW_ISSUE_END 389 }; 390 391 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTRx_r0p0[] = { 392 BASE_HW_ISSUE_9435, 393 BASE_HW_ISSUE_TSIX_2033, 394 BASE_HW_ISSUE_TTRX_1337, 395 BASE_HW_ISSUE_TTRX_2968_TTRX_3162, 396 BASE_HW_ISSUE_TTRX_3076, 397 BASE_HW_ISSUE_TTRX_921, 398 BASE_HW_ISSUE_TTRX_3414, 399 BASE_HW_ISSUE_GPU2017_1336, 400 BASE_HW_ISSUE_TTRX_3083, 401 BASE_HW_ISSUE_TTRX_3470, 402 BASE_HW_ISSUE_TTRX_3464, 403 BASE_HW_ISSUE_TTRX_3485, 404 BASE_HW_ISSUE_TITANHW_2710, 405 BASE_HW_ISSUE_GPU2022PRO_148, 406 BASE_HW_ISSUE_END 407 }; 408 409 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTRx_r0p1[] = { 410 BASE_HW_ISSUE_9435, 411 BASE_HW_ISSUE_TSIX_2033, 412 BASE_HW_ISSUE_TTRX_1337, 413 BASE_HW_ISSUE_TTRX_2968_TTRX_3162, 414 BASE_HW_ISSUE_TTRX_3076, 415 BASE_HW_ISSUE_TTRX_921, 416 BASE_HW_ISSUE_TTRX_3414, 417 BASE_HW_ISSUE_GPU2017_1336, 418 BASE_HW_ISSUE_TTRX_3083, 419 BASE_HW_ISSUE_TTRX_3470, 420 BASE_HW_ISSUE_TTRX_3464, 421 BASE_HW_ISSUE_TTRX_3485, 422 BASE_HW_ISSUE_TITANHW_2710, 423 BASE_HW_ISSUE_GPU2022PRO_148, 424 BASE_HW_ISSUE_END 425 }; 426 427 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTRx_r0p2[] = { 428 BASE_HW_ISSUE_9435, 429 BASE_HW_ISSUE_TSIX_2033, 430 BASE_HW_ISSUE_TTRX_1337, 431 BASE_HW_ISSUE_TTRX_2968_TTRX_3162, 432 BASE_HW_ISSUE_TTRX_3076, 433 BASE_HW_ISSUE_TTRX_921, 434 BASE_HW_ISSUE_TTRX_3414, 435 BASE_HW_ISSUE_GPU2017_1336, 436 BASE_HW_ISSUE_TTRX_3083, 437 BASE_HW_ISSUE_TTRX_3470, 438 BASE_HW_ISSUE_TTRX_3464, 439 BASE_HW_ISSUE_TITANHW_2710, 440 BASE_HW_ISSUE_GPU2022PRO_148, 441 BASE_HW_ISSUE_END 442 }; 443 444 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tTRx[] = { 445 BASE_HW_ISSUE_5736, 446 BASE_HW_ISSUE_9435, 447 BASE_HW_ISSUE_TSIX_2033, 448 BASE_HW_ISSUE_TTRX_1337, 449 BASE_HW_ISSUE_TTRX_3414, 450 BASE_HW_ISSUE_TTRX_3083, 451 BASE_HW_ISSUE_TTRX_3470, 452 BASE_HW_ISSUE_TTRX_3464, 453 BASE_HW_ISSUE_TITANHW_2710, 454 BASE_HW_ISSUE_GPU2022PRO_148, 455 BASE_HW_ISSUE_END 456 }; 457 458 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tNAx_r0p0[] = { 459 BASE_HW_ISSUE_9435, 460 BASE_HW_ISSUE_TSIX_2033, 461 BASE_HW_ISSUE_TTRX_1337, 462 BASE_HW_ISSUE_TTRX_2968_TTRX_3162, 463 BASE_HW_ISSUE_TTRX_3076, 464 BASE_HW_ISSUE_TTRX_921, 465 BASE_HW_ISSUE_TTRX_3414, 466 BASE_HW_ISSUE_GPU2017_1336, 467 BASE_HW_ISSUE_TTRX_3083, 468 BASE_HW_ISSUE_TTRX_3470, 469 BASE_HW_ISSUE_TTRX_3464, 470 BASE_HW_ISSUE_TTRX_3485, 471 BASE_HW_ISSUE_TITANHW_2710, 472 BASE_HW_ISSUE_GPU2022PRO_148, 473 BASE_HW_ISSUE_END 474 }; 475 476 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tNAx_r0p1[] = { 477 BASE_HW_ISSUE_9435, 478 BASE_HW_ISSUE_TSIX_2033, 479 BASE_HW_ISSUE_TTRX_1337, 480 BASE_HW_ISSUE_TTRX_2968_TTRX_3162, 481 BASE_HW_ISSUE_TTRX_3076, 482 BASE_HW_ISSUE_TTRX_921, 483 BASE_HW_ISSUE_TTRX_3414, 484 BASE_HW_ISSUE_GPU2017_1336, 485 BASE_HW_ISSUE_TTRX_3083, 486 BASE_HW_ISSUE_TTRX_3470, 487 BASE_HW_ISSUE_TTRX_3464, 488 BASE_HW_ISSUE_TITANHW_2710, 489 BASE_HW_ISSUE_GPU2022PRO_148, 490 BASE_HW_ISSUE_END 491 }; 492 493 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tNAx[] = { 494 BASE_HW_ISSUE_5736, 495 BASE_HW_ISSUE_9435, 496 BASE_HW_ISSUE_TSIX_2033, 497 BASE_HW_ISSUE_TTRX_1337, 498 BASE_HW_ISSUE_TTRX_3414, 499 BASE_HW_ISSUE_TTRX_3083, 500 BASE_HW_ISSUE_TTRX_3470, 501 BASE_HW_ISSUE_TTRX_3464, 502 BASE_HW_ISSUE_TITANHW_2710, 503 BASE_HW_ISSUE_GPU2022PRO_148, 504 BASE_HW_ISSUE_END 505 }; 506 507 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tBEx_r0p0[] = { 508 BASE_HW_ISSUE_9435, 509 BASE_HW_ISSUE_TSIX_2033, 510 BASE_HW_ISSUE_TTRX_1337, 511 BASE_HW_ISSUE_TTRX_2968_TTRX_3162, 512 BASE_HW_ISSUE_TTRX_921, 513 BASE_HW_ISSUE_TTRX_3414, 514 BASE_HW_ISSUE_TTRX_3083, 515 BASE_HW_ISSUE_TTRX_3470, 516 BASE_HW_ISSUE_TTRX_3464, 517 BASE_HW_ISSUE_TTRX_3485, 518 BASE_HW_ISSUE_TITANHW_2710, 519 BASE_HW_ISSUE_GPU2022PRO_148, 520 BASE_HW_ISSUE_END 521 }; 522 523 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tBEx_r0p1[] = { 524 BASE_HW_ISSUE_9435, 525 BASE_HW_ISSUE_TSIX_2033, 526 BASE_HW_ISSUE_TTRX_1337, 527 BASE_HW_ISSUE_TTRX_2968_TTRX_3162, 528 BASE_HW_ISSUE_TTRX_921, 529 BASE_HW_ISSUE_TTRX_3414, 530 BASE_HW_ISSUE_TTRX_3083, 531 BASE_HW_ISSUE_TTRX_3470, 532 BASE_HW_ISSUE_TTRX_3464, 533 BASE_HW_ISSUE_TITANHW_2710, 534 BASE_HW_ISSUE_GPU2022PRO_148, 535 BASE_HW_ISSUE_END 536 }; 537 538 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tBEx_r1p0[] = { 539 BASE_HW_ISSUE_9435, 540 BASE_HW_ISSUE_TSIX_2033, 541 BASE_HW_ISSUE_TTRX_1337, 542 BASE_HW_ISSUE_TTRX_2968_TTRX_3162, 543 BASE_HW_ISSUE_TTRX_921, 544 BASE_HW_ISSUE_TTRX_3414, 545 BASE_HW_ISSUE_TTRX_3083, 546 BASE_HW_ISSUE_TTRX_3470, 547 BASE_HW_ISSUE_TTRX_3464, 548 BASE_HW_ISSUE_TITANHW_2710, 549 BASE_HW_ISSUE_GPU2022PRO_148, 550 BASE_HW_ISSUE_END 551 }; 552 553 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tBEx_r1p1[] = { 554 BASE_HW_ISSUE_9435, 555 BASE_HW_ISSUE_TSIX_2033, 556 BASE_HW_ISSUE_TTRX_1337, 557 BASE_HW_ISSUE_TTRX_2968_TTRX_3162, 558 BASE_HW_ISSUE_TTRX_921, 559 BASE_HW_ISSUE_TTRX_3414, 560 BASE_HW_ISSUE_TTRX_3083, 561 BASE_HW_ISSUE_TTRX_3470, 562 BASE_HW_ISSUE_TTRX_3464, 563 BASE_HW_ISSUE_TITANHW_2710, 564 BASE_HW_ISSUE_GPU2022PRO_148, 565 BASE_HW_ISSUE_END 566 }; 567 568 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tBEx[] = { 569 BASE_HW_ISSUE_5736, 570 BASE_HW_ISSUE_9435, 571 BASE_HW_ISSUE_TSIX_2033, 572 BASE_HW_ISSUE_TTRX_1337, 573 BASE_HW_ISSUE_TTRX_3414, 574 BASE_HW_ISSUE_TTRX_3083, 575 BASE_HW_ISSUE_TTRX_3470, 576 BASE_HW_ISSUE_TTRX_3464, 577 BASE_HW_ISSUE_TITANHW_2710, 578 BASE_HW_ISSUE_GPU2022PRO_148, 579 BASE_HW_ISSUE_END 580 }; 581 582 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_lBEx_r1p0[] = { 583 BASE_HW_ISSUE_9435, 584 BASE_HW_ISSUE_TSIX_2033, 585 BASE_HW_ISSUE_TTRX_1337, 586 BASE_HW_ISSUE_TTRX_2968_TTRX_3162, 587 BASE_HW_ISSUE_TTRX_921, 588 BASE_HW_ISSUE_TTRX_3414, 589 BASE_HW_ISSUE_TTRX_3083, 590 BASE_HW_ISSUE_TTRX_3470, 591 BASE_HW_ISSUE_TTRX_3464, 592 BASE_HW_ISSUE_TTRX_3485, 593 BASE_HW_ISSUE_TITANHW_2710, 594 BASE_HW_ISSUE_GPU2022PRO_148, 595 BASE_HW_ISSUE_END 596 }; 597 598 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_lBEx_r1p1[] = { 599 BASE_HW_ISSUE_9435, 600 BASE_HW_ISSUE_TSIX_2033, 601 BASE_HW_ISSUE_TTRX_1337, 602 BASE_HW_ISSUE_TTRX_2968_TTRX_3162, 603 BASE_HW_ISSUE_TTRX_921, 604 BASE_HW_ISSUE_TTRX_3414, 605 BASE_HW_ISSUE_TTRX_3083, 606 BASE_HW_ISSUE_TTRX_3470, 607 BASE_HW_ISSUE_TTRX_3464, 608 BASE_HW_ISSUE_TITANHW_2710, 609 BASE_HW_ISSUE_GPU2022PRO_148, 610 BASE_HW_ISSUE_END 611 }; 612 613 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tBAx_r0p0[] = { 614 BASE_HW_ISSUE_9435, 615 BASE_HW_ISSUE_TSIX_2033, 616 BASE_HW_ISSUE_TTRX_1337, 617 BASE_HW_ISSUE_TTRX_2968_TTRX_3162, 618 BASE_HW_ISSUE_TTRX_921, 619 BASE_HW_ISSUE_TTRX_3414, 620 BASE_HW_ISSUE_TTRX_3083, 621 BASE_HW_ISSUE_TTRX_3470, 622 BASE_HW_ISSUE_TTRX_3464, 623 BASE_HW_ISSUE_TITANHW_2710, 624 BASE_HW_ISSUE_GPU2022PRO_148, 625 BASE_HW_ISSUE_END 626 }; 627 628 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tBAx_r1p0[] = { 629 BASE_HW_ISSUE_9435, 630 BASE_HW_ISSUE_TSIX_2033, 631 BASE_HW_ISSUE_TTRX_1337, 632 BASE_HW_ISSUE_TTRX_2968_TTRX_3162, 633 BASE_HW_ISSUE_TTRX_921, 634 BASE_HW_ISSUE_TTRX_3414, 635 BASE_HW_ISSUE_TTRX_3083, 636 BASE_HW_ISSUE_TTRX_3470, 637 BASE_HW_ISSUE_TTRX_3464, 638 BASE_HW_ISSUE_TITANHW_2710, 639 BASE_HW_ISSUE_GPU2022PRO_148, 640 BASE_HW_ISSUE_END 641 }; 642 643 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tBAx[] = { 644 BASE_HW_ISSUE_5736, 645 BASE_HW_ISSUE_9435, 646 BASE_HW_ISSUE_TSIX_2033, 647 BASE_HW_ISSUE_TTRX_1337, 648 BASE_HW_ISSUE_TTRX_3414, 649 BASE_HW_ISSUE_TTRX_3083, 650 BASE_HW_ISSUE_TTRX_3470, 651 BASE_HW_ISSUE_TTRX_3464, 652 BASE_HW_ISSUE_TITANHW_2710, 653 BASE_HW_ISSUE_GPU2022PRO_148, 654 BASE_HW_ISSUE_END 655 }; 656 657 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tODx_r0p0[] = { 658 BASE_HW_ISSUE_TSIX_2033, 659 BASE_HW_ISSUE_TTRX_1337, 660 BASE_HW_ISSUE_GPU2019_3212, 661 BASE_HW_ISSUE_GPU2019_3878, 662 BASE_HW_ISSUE_GPU2019_3901, 663 BASE_HW_ISSUE_TITANHW_2710, 664 BASE_HW_ISSUE_GPU2022PRO_148, 665 BASE_HW_ISSUE_END 666 }; 667 668 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tODx[] = { 669 BASE_HW_ISSUE_TSIX_2033, 670 BASE_HW_ISSUE_TTRX_1337, 671 BASE_HW_ISSUE_GPU2019_3212, 672 BASE_HW_ISSUE_GPU2019_3878, 673 BASE_HW_ISSUE_GPU2019_3901, 674 BASE_HW_ISSUE_TITANHW_2710, 675 BASE_HW_ISSUE_GPU2022PRO_148, 676 BASE_HW_ISSUE_END 677 }; 678 679 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tGRx_r0p0[] = { 680 BASE_HW_ISSUE_TSIX_2033, 681 BASE_HW_ISSUE_TTRX_1337, 682 BASE_HW_ISSUE_GPU2019_3878, 683 BASE_HW_ISSUE_GPU2019_3901, 684 BASE_HW_ISSUE_TITANHW_2710, 685 BASE_HW_ISSUE_GPU2022PRO_148, 686 BASE_HW_ISSUE_END 687 }; 688 689 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tGRx[] = { 690 BASE_HW_ISSUE_TSIX_2033, 691 BASE_HW_ISSUE_TTRX_1337, 692 BASE_HW_ISSUE_GPU2019_3878, 693 BASE_HW_ISSUE_GPU2019_3901, 694 BASE_HW_ISSUE_TITANHW_2710, 695 BASE_HW_ISSUE_GPU2022PRO_148, 696 BASE_HW_ISSUE_END 697 }; 698 699 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tVAx_r0p0[] = { 700 BASE_HW_ISSUE_TSIX_2033, 701 BASE_HW_ISSUE_TTRX_1337, 702 BASE_HW_ISSUE_GPU2019_3878, 703 BASE_HW_ISSUE_GPU2019_3901, 704 BASE_HW_ISSUE_TITANHW_2710, 705 BASE_HW_ISSUE_GPU2022PRO_148, 706 BASE_HW_ISSUE_END 707 }; 708 709 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tVAx[] = { 710 BASE_HW_ISSUE_TSIX_2033, 711 BASE_HW_ISSUE_TTRX_1337, 712 BASE_HW_ISSUE_GPU2019_3878, 713 BASE_HW_ISSUE_GPU2019_3901, 714 BASE_HW_ISSUE_TITANHW_2710, 715 BASE_HW_ISSUE_GPU2022PRO_148, 716 BASE_HW_ISSUE_END 717 }; 718 719 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTUx_r0p0[] = { 720 BASE_HW_ISSUE_TSIX_2033, 721 BASE_HW_ISSUE_TTRX_1337, 722 BASE_HW_ISSUE_TURSEHW_1997, 723 BASE_HW_ISSUE_GPU2019_3878, 724 BASE_HW_ISSUE_TURSEHW_2716, 725 BASE_HW_ISSUE_GPU2019_3901, 726 BASE_HW_ISSUE_GPU2021PRO_290, 727 BASE_HW_ISSUE_TITANHW_2710, 728 BASE_HW_ISSUE_TITANHW_2679, 729 BASE_HW_ISSUE_GPU2022PRO_148, 730 BASE_HW_ISSUE_END 731 }; 732 733 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTUx_r0p1[] = { 734 BASE_HW_ISSUE_TSIX_2033, 735 BASE_HW_ISSUE_TTRX_1337, 736 BASE_HW_ISSUE_TURSEHW_1997, 737 BASE_HW_ISSUE_GPU2019_3878, 738 BASE_HW_ISSUE_TURSEHW_2716, 739 BASE_HW_ISSUE_GPU2019_3901, 740 BASE_HW_ISSUE_GPU2021PRO_290, 741 BASE_HW_ISSUE_TITANHW_2710, 742 BASE_HW_ISSUE_TITANHW_2679, 743 BASE_HW_ISSUE_GPU2022PRO_148, 744 BASE_HW_ISSUE_END 745 }; 746 747 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tTUx[] = { 748 BASE_HW_ISSUE_TSIX_2033, 749 BASE_HW_ISSUE_TTRX_1337, 750 BASE_HW_ISSUE_GPU2019_3878, 751 BASE_HW_ISSUE_TURSEHW_2716, 752 BASE_HW_ISSUE_GPU2019_3901, 753 BASE_HW_ISSUE_GPU2021PRO_290, 754 BASE_HW_ISSUE_TITANHW_2710, 755 BASE_HW_ISSUE_TITANHW_2679, 756 BASE_HW_ISSUE_GPU2022PRO_148, 757 BASE_HW_ISSUE_END 758 }; 759 760 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTUx_r1p0[] = { 761 BASE_HW_ISSUE_TSIX_2033, 762 BASE_HW_ISSUE_TTRX_1337, 763 BASE_HW_ISSUE_GPU2019_3878, 764 BASE_HW_ISSUE_TURSEHW_2716, 765 BASE_HW_ISSUE_GPU2019_3901, 766 BASE_HW_ISSUE_GPU2021PRO_290, 767 BASE_HW_ISSUE_TITANHW_2710, 768 BASE_HW_ISSUE_TITANHW_2679, 769 BASE_HW_ISSUE_GPU2022PRO_148, 770 BASE_HW_ISSUE_END 771 }; 772 773 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTUx_r1p1[] = { 774 BASE_HW_ISSUE_TSIX_2033, 775 BASE_HW_ISSUE_TTRX_1337, 776 BASE_HW_ISSUE_GPU2019_3878, 777 BASE_HW_ISSUE_TURSEHW_2716, 778 BASE_HW_ISSUE_GPU2019_3901, 779 BASE_HW_ISSUE_GPU2021PRO_290, 780 BASE_HW_ISSUE_TITANHW_2710, 781 BASE_HW_ISSUE_TITANHW_2679, 782 BASE_HW_ISSUE_GPU2022PRO_148, 783 BASE_HW_ISSUE_END 784 }; 785 786 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTUx_r1p2[] = { 787 BASE_HW_ISSUE_TSIX_2033, 788 BASE_HW_ISSUE_TTRX_1337, 789 BASE_HW_ISSUE_GPU2019_3878, 790 BASE_HW_ISSUE_TURSEHW_2716, 791 BASE_HW_ISSUE_GPU2019_3901, 792 BASE_HW_ISSUE_GPU2021PRO_290, 793 BASE_HW_ISSUE_TITANHW_2710, 794 BASE_HW_ISSUE_TITANHW_2679, 795 BASE_HW_ISSUE_GPU2022PRO_148, 796 BASE_HW_ISSUE_END 797 }; 798 799 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTUx_r1p3[] = { 800 BASE_HW_ISSUE_TSIX_2033, 801 BASE_HW_ISSUE_TTRX_1337, 802 BASE_HW_ISSUE_GPU2019_3878, 803 BASE_HW_ISSUE_TURSEHW_2716, 804 BASE_HW_ISSUE_GPU2019_3901, 805 BASE_HW_ISSUE_GPU2021PRO_290, 806 BASE_HW_ISSUE_TITANHW_2710, 807 BASE_HW_ISSUE_TITANHW_2679, 808 BASE_HW_ISSUE_GPU2022PRO_148, 809 BASE_HW_ISSUE_END 810 }; 811 812 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_model_tTIx[] = { 813 BASE_HW_ISSUE_TSIX_2033, 814 BASE_HW_ISSUE_TTRX_1337, 815 BASE_HW_ISSUE_TURSEHW_2716, 816 BASE_HW_ISSUE_GPU2021PRO_290, 817 BASE_HW_ISSUE_TITANHW_2710, 818 BASE_HW_ISSUE_TITANHW_2679, 819 BASE_HW_ISSUE_GPU2022PRO_148, 820 BASE_HW_ISSUE_END 821 }; 822 823 __attribute__((unused)) static const enum base_hw_issue base_hw_issues_tTIx_r0p0[] = { 824 BASE_HW_ISSUE_TSIX_2033, 825 BASE_HW_ISSUE_TTRX_1337, 826 BASE_HW_ISSUE_TURSEHW_2716, 827 BASE_HW_ISSUE_GPU2021PRO_290, 828 BASE_HW_ISSUE_TITANHW_2710, 829 BASE_HW_ISSUE_TITANHW_2679, 830 BASE_HW_ISSUE_GPU2022PRO_148, 831 BASE_HW_ISSUE_END 832 }; 833 834 835 #endif /* _BASE_HWCONFIG_ISSUES_H_ */ 836