1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * System Control and Power Interface (SCMI) Protocol based clock driver
4 *
5 * Copyright (C) 2018-2020 ARM Ltd.
6 */
7
8 #include <linux/clk-provider.h>
9 #include <linux/device.h>
10 #include <linux/err.h>
11 #include <linux/of.h>
12 #include <linux/module.h>
13 #include <linux/scmi_protocol.h>
14 #include <asm/div64.h>
15
16 static const struct scmi_clk_proto_ops *clk_ops;
17
18 struct scmi_clk {
19 u32 id;
20 struct clk_hw hw;
21 const struct scmi_clock_info *info;
22 const struct scmi_protocol_handle *ph;
23 };
24
25 #define to_scmi_clk(clk) container_of(clk, struct scmi_clk, hw)
26
scmi_clk_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)27 static unsigned long scmi_clk_recalc_rate(struct clk_hw *hw,
28 unsigned long parent_rate)
29 {
30 int ret;
31 u64 rate;
32 struct scmi_clk *clk = to_scmi_clk(hw);
33
34 ret = clk_ops->rate_get(clk->ph, clk->id, &rate);
35 if (ret)
36 return 0;
37 return rate;
38 }
39
scmi_clk_round_rate(struct clk_hw * hw,unsigned long rate,unsigned long * parent_rate)40 static long scmi_clk_round_rate(struct clk_hw *hw, unsigned long rate,
41 unsigned long *parent_rate)
42 {
43 u64 fmin, fmax, ftmp;
44 struct scmi_clk *clk = to_scmi_clk(hw);
45
46 /*
47 * We can't figure out what rate it will be, so just return the
48 * rate back to the caller. scmi_clk_recalc_rate() will be called
49 * after the rate is set and we'll know what rate the clock is
50 * running at then.
51 */
52 if (clk->info->rate_discrete)
53 return rate;
54
55 fmin = clk->info->range.min_rate;
56 fmax = clk->info->range.max_rate;
57 if (rate <= fmin)
58 return fmin;
59 else if (rate >= fmax)
60 return fmax;
61
62 ftmp = rate - fmin;
63 ftmp += clk->info->range.step_size - 1; /* to round up */
64 do_div(ftmp, clk->info->range.step_size);
65
66 return ftmp * clk->info->range.step_size + fmin;
67 }
68
scmi_clk_set_rate(struct clk_hw * hw,unsigned long rate,unsigned long parent_rate)69 static int scmi_clk_set_rate(struct clk_hw *hw, unsigned long rate,
70 unsigned long parent_rate)
71 {
72 struct scmi_clk *clk = to_scmi_clk(hw);
73
74 return clk_ops->rate_set(clk->ph, clk->id, rate);
75 }
76
scmi_clk_enable(struct clk_hw * hw)77 static int scmi_clk_enable(struct clk_hw *hw)
78 {
79 struct scmi_clk *clk = to_scmi_clk(hw);
80
81 return clk_ops->enable(clk->ph, clk->id);
82 }
83
scmi_clk_disable(struct clk_hw * hw)84 static void scmi_clk_disable(struct clk_hw *hw)
85 {
86 struct scmi_clk *clk = to_scmi_clk(hw);
87
88 clk_ops->disable(clk->ph, clk->id);
89 }
90
91 static const struct clk_ops scmi_clk_ops = {
92 .recalc_rate = scmi_clk_recalc_rate,
93 .round_rate = scmi_clk_round_rate,
94 .set_rate = scmi_clk_set_rate,
95 /*
96 * We can't provide enable/disable callback as we can't perform the same
97 * in atomic context. Since the clock framework provides standard API
98 * clk_prepare_enable that helps cases using clk_enable in non-atomic
99 * context, it should be fine providing prepare/unprepare.
100 */
101 .prepare = scmi_clk_enable,
102 .unprepare = scmi_clk_disable,
103 };
104
scmi_clk_ops_init(struct device * dev,struct scmi_clk * sclk)105 static int scmi_clk_ops_init(struct device *dev, struct scmi_clk *sclk)
106 {
107 int ret;
108 unsigned long min_rate, max_rate;
109
110 struct clk_init_data init = {
111 .flags = CLK_GET_RATE_NOCACHE,
112 .num_parents = 0,
113 .ops = &scmi_clk_ops,
114 .name = sclk->info->name,
115 };
116
117 sclk->hw.init = &init;
118 ret = devm_clk_hw_register(dev, &sclk->hw);
119 if (ret)
120 return ret;
121
122 if (sclk->info->rate_discrete) {
123 int num_rates = sclk->info->list.num_rates;
124
125 if (num_rates <= 0)
126 return -EINVAL;
127
128 min_rate = sclk->info->list.rates[0];
129 max_rate = sclk->info->list.rates[num_rates - 1];
130 } else {
131 min_rate = sclk->info->range.min_rate;
132 max_rate = sclk->info->range.max_rate;
133 }
134
135 clk_hw_set_rate_range(&sclk->hw, min_rate, max_rate);
136 return ret;
137 }
138
scmi_clocks_probe(struct scmi_device * sdev)139 static int scmi_clocks_probe(struct scmi_device *sdev)
140 {
141 int idx, count, err;
142 struct clk_hw **hws;
143 struct clk_hw_onecell_data *clk_data;
144 struct device *dev = &sdev->dev;
145 struct device_node *np = dev->of_node;
146 const struct scmi_handle *handle = sdev->handle;
147 struct scmi_protocol_handle *ph;
148
149 if (!handle)
150 return -ENODEV;
151
152 clk_ops = handle->devm_get_protocol(sdev, SCMI_PROTOCOL_CLOCK, &ph);
153 if (IS_ERR(clk_ops))
154 return PTR_ERR(clk_ops);
155
156 count = clk_ops->count_get(ph);
157 if (count < 0) {
158 dev_err(dev, "%pOFn: invalid clock output count\n", np);
159 return -EINVAL;
160 }
161
162 clk_data = devm_kzalloc(dev, struct_size(clk_data, hws, count),
163 GFP_KERNEL);
164 if (!clk_data)
165 return -ENOMEM;
166
167 clk_data->num = count;
168 hws = clk_data->hws;
169
170 for (idx = 0; idx < count; idx++) {
171 struct scmi_clk *sclk;
172
173 sclk = devm_kzalloc(dev, sizeof(*sclk), GFP_KERNEL);
174 if (!sclk)
175 return -ENOMEM;
176
177 sclk->info = clk_ops->info_get(ph, idx);
178 if (!sclk->info) {
179 dev_dbg(dev, "invalid clock info for idx %d\n", idx);
180 continue;
181 }
182
183 sclk->id = idx;
184 sclk->ph = ph;
185
186 err = scmi_clk_ops_init(dev, sclk);
187 if (err) {
188 dev_err(dev, "failed to register clock %d\n", idx);
189 devm_kfree(dev, sclk);
190 hws[idx] = NULL;
191 } else {
192 dev_dbg(dev, "Registered clock:%s\n", sclk->info->name);
193 hws[idx] = &sclk->hw;
194 }
195 }
196
197 return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
198 clk_data);
199 }
200
201 static const struct scmi_device_id scmi_id_table[] = {
202 { SCMI_PROTOCOL_CLOCK, "clocks" },
203 { },
204 };
205 MODULE_DEVICE_TABLE(scmi, scmi_id_table);
206
207 static struct scmi_driver scmi_clocks_driver = {
208 .name = "scmi-clocks",
209 .probe = scmi_clocks_probe,
210 .id_table = scmi_id_table,
211 };
212 module_scmi_driver(scmi_clocks_driver);
213
214 MODULE_AUTHOR("Sudeep Holla <sudeep.holla@arm.com>");
215 MODULE_DESCRIPTION("ARM SCMI clock driver");
216 MODULE_LICENSE("GPL v2");
217