1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
5 *
6 * Gated clock implementation
7 */
8
9 #include <linux/clk-provider.h>
10 #include <linux/module.h>
11 #include <linux/slab.h>
12 #include <linux/io.h>
13 #include <linux/err.h>
14 #include <linux/string.h>
15
16 static bool clk_always_on;
17 module_param_named(always_on, clk_always_on, bool, 0644);
18 MODULE_PARM_DESC(always_on, "Always keep clks on except for system suspend.");
19
20 /**
21 * DOC: basic gatable clock which can gate and ungate it's ouput
22 *
23 * Traits of this clock:
24 * prepare - clk_(un)prepare only ensures parent is (un)prepared
25 * enable - clk_enable and clk_disable are functional & control gating
26 * rate - inherits rate from parent. No clk_set_rate support
27 * parent - fixed parent. No clk_set_parent support
28 */
29
clk_gate_readl(struct clk_gate * gate)30 static inline u32 clk_gate_readl(struct clk_gate *gate)
31 {
32 if (gate->flags & CLK_GATE_BIG_ENDIAN)
33 return ioread32be(gate->reg);
34
35 return readl(gate->reg);
36 }
37
clk_gate_writel(struct clk_gate * gate,u32 val)38 static inline void clk_gate_writel(struct clk_gate *gate, u32 val)
39 {
40 if (gate->flags & CLK_GATE_BIG_ENDIAN)
41 iowrite32be(val, gate->reg);
42 else
43 writel(val, gate->reg);
44 }
45
46 /*
47 * It works on following logic:
48 *
49 * For enabling clock, enable = 1
50 * set2dis = 1 -> clear bit -> set = 0
51 * set2dis = 0 -> set bit -> set = 1
52 *
53 * For disabling clock, enable = 0
54 * set2dis = 1 -> set bit -> set = 1
55 * set2dis = 0 -> clear bit -> set = 0
56 *
57 * So, result is always: enable xor set2dis.
58 */
clk_gate_endisable(struct clk_hw * hw,int enable)59 static void clk_gate_endisable(struct clk_hw *hw, int enable)
60 {
61 struct clk_gate *gate = to_clk_gate(hw);
62 int set = gate->flags & CLK_GATE_SET_TO_DISABLE ? 1 : 0;
63 unsigned long flags;
64 u32 reg;
65
66 if (clk_always_on && !enable)
67 return;
68
69 set ^= enable;
70
71 if (gate->lock)
72 spin_lock_irqsave(gate->lock, flags);
73 else
74 __acquire(gate->lock);
75
76 if (gate->flags & CLK_GATE_HIWORD_MASK) {
77 reg = BIT(gate->bit_idx + 16);
78 if (set)
79 reg |= BIT(gate->bit_idx);
80 } else {
81 reg = clk_gate_readl(gate);
82
83 if (set)
84 reg |= BIT(gate->bit_idx);
85 else
86 reg &= ~BIT(gate->bit_idx);
87 }
88
89 clk_gate_writel(gate, reg);
90
91 if (gate->lock)
92 spin_unlock_irqrestore(gate->lock, flags);
93 else
94 __release(gate->lock);
95 }
96
clk_gate_enable(struct clk_hw * hw)97 static int clk_gate_enable(struct clk_hw *hw)
98 {
99 clk_gate_endisable(hw, 1);
100
101 return 0;
102 }
103
clk_gate_disable(struct clk_hw * hw)104 static void clk_gate_disable(struct clk_hw *hw)
105 {
106 clk_gate_endisable(hw, 0);
107 }
108
clk_gate_is_enabled(struct clk_hw * hw)109 int clk_gate_is_enabled(struct clk_hw *hw)
110 {
111 u32 reg;
112 struct clk_gate *gate = to_clk_gate(hw);
113
114 reg = clk_gate_readl(gate);
115
116 /* if a set bit disables this clk, flip it before masking */
117 if (gate->flags & CLK_GATE_SET_TO_DISABLE)
118 reg ^= BIT(gate->bit_idx);
119
120 reg &= BIT(gate->bit_idx);
121
122 return reg ? 1 : 0;
123 }
124 EXPORT_SYMBOL_GPL(clk_gate_is_enabled);
125
126 const struct clk_ops clk_gate_ops = {
127 .enable = clk_gate_enable,
128 .disable = clk_gate_disable,
129 .is_enabled = clk_gate_is_enabled,
130 };
131 EXPORT_SYMBOL_GPL(clk_gate_ops);
132
__clk_hw_register_gate(struct device * dev,struct device_node * np,const char * name,const char * parent_name,const struct clk_hw * parent_hw,const struct clk_parent_data * parent_data,unsigned long flags,void __iomem * reg,u8 bit_idx,u8 clk_gate_flags,spinlock_t * lock)133 struct clk_hw *__clk_hw_register_gate(struct device *dev,
134 struct device_node *np, const char *name,
135 const char *parent_name, const struct clk_hw *parent_hw,
136 const struct clk_parent_data *parent_data,
137 unsigned long flags,
138 void __iomem *reg, u8 bit_idx,
139 u8 clk_gate_flags, spinlock_t *lock)
140 {
141 struct clk_gate *gate;
142 struct clk_hw *hw;
143 struct clk_init_data init = {};
144 int ret = -EINVAL;
145
146 if (clk_gate_flags & CLK_GATE_HIWORD_MASK) {
147 if (bit_idx > 15) {
148 pr_err("gate bit exceeds LOWORD field\n");
149 return ERR_PTR(-EINVAL);
150 }
151 }
152
153 /* allocate the gate */
154 gate = kzalloc(sizeof(*gate), GFP_KERNEL);
155 if (!gate)
156 return ERR_PTR(-ENOMEM);
157
158 init.name = name;
159 init.ops = &clk_gate_ops;
160 init.flags = flags;
161 init.parent_names = parent_name ? &parent_name : NULL;
162 init.parent_hws = parent_hw ? &parent_hw : NULL;
163 init.parent_data = parent_data;
164 if (parent_name || parent_hw || parent_data)
165 init.num_parents = 1;
166 else
167 init.num_parents = 0;
168
169 /* struct clk_gate assignments */
170 gate->reg = reg;
171 gate->bit_idx = bit_idx;
172 gate->flags = clk_gate_flags;
173 gate->lock = lock;
174 gate->hw.init = &init;
175
176 hw = &gate->hw;
177 if (dev || !np)
178 ret = clk_hw_register(dev, hw);
179 else if (np)
180 ret = of_clk_hw_register(np, hw);
181 if (ret) {
182 kfree(gate);
183 hw = ERR_PTR(ret);
184 }
185
186 return hw;
187
188 }
189 EXPORT_SYMBOL_GPL(__clk_hw_register_gate);
190
clk_register_gate(struct device * dev,const char * name,const char * parent_name,unsigned long flags,void __iomem * reg,u8 bit_idx,u8 clk_gate_flags,spinlock_t * lock)191 struct clk *clk_register_gate(struct device *dev, const char *name,
192 const char *parent_name, unsigned long flags,
193 void __iomem *reg, u8 bit_idx,
194 u8 clk_gate_flags, spinlock_t *lock)
195 {
196 struct clk_hw *hw;
197
198 hw = clk_hw_register_gate(dev, name, parent_name, flags, reg,
199 bit_idx, clk_gate_flags, lock);
200 if (IS_ERR(hw))
201 return ERR_CAST(hw);
202 return hw->clk;
203 }
204 EXPORT_SYMBOL_GPL(clk_register_gate);
205
clk_unregister_gate(struct clk * clk)206 void clk_unregister_gate(struct clk *clk)
207 {
208 struct clk_gate *gate;
209 struct clk_hw *hw;
210
211 hw = __clk_get_hw(clk);
212 if (!hw)
213 return;
214
215 gate = to_clk_gate(hw);
216
217 clk_unregister(clk);
218 kfree(gate);
219 }
220 EXPORT_SYMBOL_GPL(clk_unregister_gate);
221
clk_hw_unregister_gate(struct clk_hw * hw)222 void clk_hw_unregister_gate(struct clk_hw *hw)
223 {
224 struct clk_gate *gate;
225
226 gate = to_clk_gate(hw);
227
228 clk_hw_unregister(hw);
229 kfree(gate);
230 }
231 EXPORT_SYMBOL_GPL(clk_hw_unregister_gate);
232