1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Copyright (C) 2023 Rockchip Electronics Co. Ltd. 4 */ 5 6 .arch armv8-a 7 .file "fixup_fault.c" 8 .text 9 .align 2 10 .p2align 3,,7 11 .type get_data, %function 12get_data: 13 cmp w0, 31 14 hint 25 // paciasp 15 bls .L39 16 mov x0, 0 17.L1: 18 hint 29 // autiasp 19 ret 20 .p2align 2,,3 21.L39: 22 adrp x2, .L4 23 add x2, x2, :lo12:.L4 24 ldrh w0, [x2,w0,uxtw #1] 25 adr x2, .Lrtx4 26 add x0, x2, w0, sxth #2 27 br x0 28.Lrtx4: 29 .section .rodata 30 .align 0 31 .align 2 32.L4: 33 .2byte (.L35 - .Lrtx4) / 4 34 .2byte (.L34 - .Lrtx4) / 4 35 .2byte (.L33 - .Lrtx4) / 4 36 .2byte (.L32 - .Lrtx4) / 4 37 .2byte (.L31 - .Lrtx4) / 4 38 .2byte (.L30 - .Lrtx4) / 4 39 .2byte (.L29 - .Lrtx4) / 4 40 .2byte (.L28 - .Lrtx4) / 4 41 .2byte (.L27 - .Lrtx4) / 4 42 .2byte (.L26 - .Lrtx4) / 4 43 .2byte (.L25 - .Lrtx4) / 4 44 .2byte (.L24 - .Lrtx4) / 4 45 .2byte (.L23 - .Lrtx4) / 4 46 .2byte (.L22 - .Lrtx4) / 4 47 .2byte (.L21 - .Lrtx4) / 4 48 .2byte (.L20 - .Lrtx4) / 4 49 .2byte (.L19 - .Lrtx4) / 4 50 .2byte (.L18 - .Lrtx4) / 4 51 .2byte (.L17 - .Lrtx4) / 4 52 .2byte (.L16 - .Lrtx4) / 4 53 .2byte (.L15 - .Lrtx4) / 4 54 .2byte (.L14 - .Lrtx4) / 4 55 .2byte (.L13 - .Lrtx4) / 4 56 .2byte (.L12 - .Lrtx4) / 4 57 .2byte (.L11 - .Lrtx4) / 4 58 .2byte (.L10 - .Lrtx4) / 4 59 .2byte (.L9 - .Lrtx4) / 4 60 .2byte (.L8 - .Lrtx4) / 4 61 .2byte (.L7 - .Lrtx4) / 4 62 .2byte (.L6 - .Lrtx4) / 4 63 .2byte (.L5 - .Lrtx4) / 4 64 .2byte (.L3 - .Lrtx4) / 4 65 .text 66 .p2align 2,,3 67.L5: 68#APP 69 cbnz w1, 1f 70 mov x0, v30.d[0] 71 b 2f 72 1: mov x0, v30.d[1] 73 2: 74// 0 "" 2 75#NO_APP 76 b .L1 77 .p2align 2,,3 78.L6: 79#APP 80 cbnz w1, 1f 81 mov x0, v29.d[0] 82 b 2f 83 1: mov x0, v29.d[1] 84 2: 85// 0 "" 2 86#NO_APP 87 b .L1 88 .p2align 2,,3 89.L7: 90#APP 91 cbnz w1, 1f 92 mov x0, v28.d[0] 93 b 2f 94 1: mov x0, v28.d[1] 95 2: 96// 0 "" 2 97#NO_APP 98 b .L1 99 .p2align 2,,3 100.L8: 101#APP 102 cbnz w1, 1f 103 mov x0, v27.d[0] 104 b 2f 105 1: mov x0, v27.d[1] 106 2: 107// 0 "" 2 108#NO_APP 109 b .L1 110 .p2align 2,,3 111.L9: 112#APP 113 cbnz w1, 1f 114 mov x0, v26.d[0] 115 b 2f 116 1: mov x0, v26.d[1] 117 2: 118// 0 "" 2 119#NO_APP 120 b .L1 121 .p2align 2,,3 122.L10: 123#APP 124 cbnz w1, 1f 125 mov x0, v25.d[0] 126 b 2f 127 1: mov x0, v25.d[1] 128 2: 129// 0 "" 2 130#NO_APP 131 b .L1 132 .p2align 2,,3 133.L11: 134#APP 135 cbnz w1, 1f 136 mov x0, v24.d[0] 137 b 2f 138 1: mov x0, v24.d[1] 139 2: 140// 0 "" 2 141#NO_APP 142 b .L1 143 .p2align 2,,3 144.L12: 145#APP 146 cbnz w1, 1f 147 mov x0, v23.d[0] 148 b 2f 149 1: mov x0, v23.d[1] 150 2: 151// 0 "" 2 152#NO_APP 153 b .L1 154 .p2align 2,,3 155.L13: 156#APP 157 cbnz w1, 1f 158 mov x0, v22.d[0] 159 b 2f 160 1: mov x0, v22.d[1] 161 2: 162// 0 "" 2 163#NO_APP 164 b .L1 165 .p2align 2,,3 166.L14: 167#APP 168 cbnz w1, 1f 169 mov x0, v21.d[0] 170 b 2f 171 1: mov x0, v21.d[1] 172 2: 173// 0 "" 2 174#NO_APP 175 b .L1 176 .p2align 2,,3 177.L15: 178#APP 179 cbnz w1, 1f 180 mov x0, v20.d[0] 181 b 2f 182 1: mov x0, v20.d[1] 183 2: 184// 0 "" 2 185#NO_APP 186 b .L1 187 .p2align 2,,3 188.L16: 189#APP 190 cbnz w1, 1f 191 mov x0, v19.d[0] 192 b 2f 193 1: mov x0, v19.d[1] 194 2: 195// 0 "" 2 196#NO_APP 197 b .L1 198 .p2align 2,,3 199.L17: 200#APP 201 cbnz w1, 1f 202 mov x0, v18.d[0] 203 b 2f 204 1: mov x0, v18.d[1] 205 2: 206// 0 "" 2 207#NO_APP 208 b .L1 209 .p2align 2,,3 210.L18: 211#APP 212 cbnz w1, 1f 213 mov x0, v17.d[0] 214 b 2f 215 1: mov x0, v17.d[1] 216 2: 217// 0 "" 2 218#NO_APP 219 b .L1 220 .p2align 2,,3 221.L19: 222#APP 223 cbnz w1, 1f 224 mov x0, v16.d[0] 225 b 2f 226 1: mov x0, v16.d[1] 227 2: 228// 0 "" 2 229#NO_APP 230 b .L1 231 .p2align 2,,3 232.L20: 233#APP 234 cbnz w1, 1f 235 mov x0, v15.d[0] 236 b 2f 237 1: mov x0, v15.d[1] 238 2: 239// 0 "" 2 240#NO_APP 241 b .L1 242 .p2align 2,,3 243.L21: 244#APP 245 cbnz w1, 1f 246 mov x0, v14.d[0] 247 b 2f 248 1: mov x0, v14.d[1] 249 2: 250// 0 "" 2 251#NO_APP 252 b .L1 253 .p2align 2,,3 254.L22: 255#APP 256 cbnz w1, 1f 257 mov x0, v13.d[0] 258 b 2f 259 1: mov x0, v13.d[1] 260 2: 261// 0 "" 2 262#NO_APP 263 b .L1 264 .p2align 2,,3 265.L23: 266#APP 267 cbnz w1, 1f 268 mov x0, v12.d[0] 269 b 2f 270 1: mov x0, v12.d[1] 271 2: 272// 0 "" 2 273#NO_APP 274 b .L1 275 .p2align 2,,3 276.L24: 277#APP 278 cbnz w1, 1f 279 mov x0, v11.d[0] 280 b 2f 281 1: mov x0, v11.d[1] 282 2: 283// 0 "" 2 284#NO_APP 285 b .L1 286 .p2align 2,,3 287.L25: 288#APP 289 cbnz w1, 1f 290 mov x0, v10.d[0] 291 b 2f 292 1: mov x0, v10.d[1] 293 2: 294// 0 "" 2 295#NO_APP 296 b .L1 297 .p2align 2,,3 298.L26: 299#APP 300 cbnz w1, 1f 301 mov x0, v9.d[0] 302 b 2f 303 1: mov x0, v9.d[1] 304 2: 305// 0 "" 2 306#NO_APP 307 b .L1 308 .p2align 2,,3 309.L27: 310#APP 311 cbnz w1, 1f 312 mov x0, v8.d[0] 313 b 2f 314 1: mov x0, v8.d[1] 315 2: 316// 0 "" 2 317#NO_APP 318 b .L1 319 .p2align 2,,3 320.L28: 321#APP 322 cbnz w1, 1f 323 mov x0, v7.d[0] 324 b 2f 325 1: mov x0, v7.d[1] 326 2: 327// 0 "" 2 328#NO_APP 329 b .L1 330 .p2align 2,,3 331.L29: 332#APP 333 cbnz w1, 1f 334 mov x0, v6.d[0] 335 b 2f 336 1: mov x0, v6.d[1] 337 2: 338// 0 "" 2 339#NO_APP 340 b .L1 341 .p2align 2,,3 342.L30: 343#APP 344 cbnz w1, 1f 345 mov x0, v5.d[0] 346 b 2f 347 1: mov x0, v5.d[1] 348 2: 349// 0 "" 2 350#NO_APP 351 b .L1 352 .p2align 2,,3 353.L31: 354#APP 355 cbnz w1, 1f 356 mov x0, v4.d[0] 357 b 2f 358 1: mov x0, v4.d[1] 359 2: 360// 0 "" 2 361#NO_APP 362 b .L1 363 .p2align 2,,3 364.L32: 365#APP 366 cbnz w1, 1f 367 mov x0, v3.d[0] 368 b 2f 369 1: mov x0, v3.d[1] 370 2: 371// 0 "" 2 372#NO_APP 373 b .L1 374 .p2align 2,,3 375.L33: 376#APP 377 cbnz w1, 1f 378 mov x0, v2.d[0] 379 b 2f 380 1: mov x0, v2.d[1] 381 2: 382// 0 "" 2 383#NO_APP 384 b .L1 385 .p2align 2,,3 386.L34: 387#APP 388 cbnz w1, 1f 389 mov x0, v1.d[0] 390 b 2f 391 1: mov x0, v1.d[1] 392 2: 393// 0 "" 2 394#NO_APP 395 b .L1 396 .p2align 2,,3 397.L35: 398#APP 399 cbnz w1, 1f 400 mov x0, v0.d[0] 401 b 2f 402 1: mov x0, v0.d[1] 403 2: 404// 0 "" 2 405#NO_APP 406 b .L1 407 .p2align 2,,3 408.L3: 409#APP 410 cbnz w1, 1f 411 mov x0, v31.d[0] 412 b 2f 413 1: mov x0, v31.d[1] 414 2: 415// 0 "" 2 416#NO_APP 417 b .L1 418 .size get_data, .-get_data 419 .align 2 420 .p2align 3,,7 421 .type set_data, %function 422set_data: 423 cmp w0, 31 424 hint 25 // paciasp 425 bhi .L40 426 adrp x3, .L43 427 add x3, x3, :lo12:.L43 428 ldrh w0, [x3,w0,uxtw #1] 429 adr x3, .Lrtx43 430 add x0, x3, w0, sxth #2 431 br x0 432.Lrtx43: 433 .section .rodata 434 .align 0 435 .align 2 436.L43: 437 .2byte (.L74 - .Lrtx43) / 4 438 .2byte (.L73 - .Lrtx43) / 4 439 .2byte (.L72 - .Lrtx43) / 4 440 .2byte (.L71 - .Lrtx43) / 4 441 .2byte (.L70 - .Lrtx43) / 4 442 .2byte (.L69 - .Lrtx43) / 4 443 .2byte (.L68 - .Lrtx43) / 4 444 .2byte (.L67 - .Lrtx43) / 4 445 .2byte (.L66 - .Lrtx43) / 4 446 .2byte (.L65 - .Lrtx43) / 4 447 .2byte (.L64 - .Lrtx43) / 4 448 .2byte (.L63 - .Lrtx43) / 4 449 .2byte (.L62 - .Lrtx43) / 4 450 .2byte (.L61 - .Lrtx43) / 4 451 .2byte (.L60 - .Lrtx43) / 4 452 .2byte (.L59 - .Lrtx43) / 4 453 .2byte (.L58 - .Lrtx43) / 4 454 .2byte (.L57 - .Lrtx43) / 4 455 .2byte (.L56 - .Lrtx43) / 4 456 .2byte (.L55 - .Lrtx43) / 4 457 .2byte (.L54 - .Lrtx43) / 4 458 .2byte (.L53 - .Lrtx43) / 4 459 .2byte (.L52 - .Lrtx43) / 4 460 .2byte (.L51 - .Lrtx43) / 4 461 .2byte (.L50 - .Lrtx43) / 4 462 .2byte (.L49 - .Lrtx43) / 4 463 .2byte (.L48 - .Lrtx43) / 4 464 .2byte (.L47 - .Lrtx43) / 4 465 .2byte (.L46 - .Lrtx43) / 4 466 .2byte (.L45 - .Lrtx43) / 4 467 .2byte (.L44 - .Lrtx43) / 4 468 .2byte (.L42 - .Lrtx43) / 4 469 .text 470 .p2align 2,,3 471.L42: 472#APP 473 cbnz w1, 1f 474 mov v31.d[0], x2 475 b 2f 476 1: mov v31.d[1], x2 477 2: 478// 0 "" 2 479#NO_APP 480.L40: 481 hint 29 // autiasp 482 ret 483 .p2align 2,,3 484.L44: 485#APP 486 cbnz w1, 1f 487 mov v30.d[0], x2 488 b 2f 489 1: mov v30.d[1], x2 490 2: 491// 0 "" 2 492#NO_APP 493 b .L40 494 .p2align 2,,3 495.L45: 496#APP 497 cbnz w1, 1f 498 mov v29.d[0], x2 499 b 2f 500 1: mov v29.d[1], x2 501 2: 502// 0 "" 2 503#NO_APP 504 b .L40 505 .p2align 2,,3 506.L46: 507#APP 508 cbnz w1, 1f 509 mov v28.d[0], x2 510 b 2f 511 1: mov v28.d[1], x2 512 2: 513// 0 "" 2 514#NO_APP 515 b .L40 516 .p2align 2,,3 517.L47: 518#APP 519 cbnz w1, 1f 520 mov v27.d[0], x2 521 b 2f 522 1: mov v27.d[1], x2 523 2: 524// 0 "" 2 525#NO_APP 526 b .L40 527 .p2align 2,,3 528.L48: 529#APP 530 cbnz w1, 1f 531 mov v26.d[0], x2 532 b 2f 533 1: mov v26.d[1], x2 534 2: 535// 0 "" 2 536#NO_APP 537 b .L40 538 .p2align 2,,3 539.L49: 540#APP 541 cbnz w1, 1f 542 mov v25.d[0], x2 543 b 2f 544 1: mov v25.d[1], x2 545 2: 546// 0 "" 2 547#NO_APP 548 b .L40 549 .p2align 2,,3 550.L50: 551#APP 552 cbnz w1, 1f 553 mov v24.d[0], x2 554 b 2f 555 1: mov v24.d[1], x2 556 2: 557// 0 "" 2 558#NO_APP 559 b .L40 560 .p2align 2,,3 561.L51: 562#APP 563 cbnz w1, 1f 564 mov v23.d[0], x2 565 b 2f 566 1: mov v23.d[1], x2 567 2: 568// 0 "" 2 569#NO_APP 570 b .L40 571 .p2align 2,,3 572.L52: 573#APP 574 cbnz w1, 1f 575 mov v22.d[0], x2 576 b 2f 577 1: mov v22.d[1], x2 578 2: 579// 0 "" 2 580#NO_APP 581 b .L40 582 .p2align 2,,3 583.L53: 584#APP 585 cbnz w1, 1f 586 mov v21.d[0], x2 587 b 2f 588 1: mov v21.d[1], x2 589 2: 590// 0 "" 2 591#NO_APP 592 b .L40 593 .p2align 2,,3 594.L54: 595#APP 596 cbnz w1, 1f 597 mov v20.d[0], x2 598 b 2f 599 1: mov v20.d[1], x2 600 2: 601// 0 "" 2 602#NO_APP 603 b .L40 604 .p2align 2,,3 605.L55: 606#APP 607 cbnz w1, 1f 608 mov v19.d[0], x2 609 b 2f 610 1: mov v19.d[1], x2 611 2: 612// 0 "" 2 613#NO_APP 614 b .L40 615 .p2align 2,,3 616.L56: 617#APP 618 cbnz w1, 1f 619 mov v18.d[0], x2 620 b 2f 621 1: mov v18.d[1], x2 622 2: 623// 0 "" 2 624#NO_APP 625 b .L40 626 .p2align 2,,3 627.L57: 628#APP 629 cbnz w1, 1f 630 mov v17.d[0], x2 631 b 2f 632 1: mov v17.d[1], x2 633 2: 634// 0 "" 2 635#NO_APP 636 b .L40 637 .p2align 2,,3 638.L58: 639#APP 640 cbnz w1, 1f 641 mov v16.d[0], x2 642 b 2f 643 1: mov v16.d[1], x2 644 2: 645// 0 "" 2 646#NO_APP 647 b .L40 648 .p2align 2,,3 649.L59: 650#APP 651 cbnz w1, 1f 652 mov v15.d[0], x2 653 b 2f 654 1: mov v15.d[1], x2 655 2: 656// 0 "" 2 657#NO_APP 658 b .L40 659 .p2align 2,,3 660.L60: 661#APP 662 cbnz w1, 1f 663 mov v14.d[0], x2 664 b 2f 665 1: mov v14.d[1], x2 666 2: 667// 0 "" 2 668#NO_APP 669 b .L40 670 .p2align 2,,3 671.L61: 672#APP 673 cbnz w1, 1f 674 mov v13.d[0], x2 675 b 2f 676 1: mov v13.d[1], x2 677 2: 678// 0 "" 2 679#NO_APP 680 b .L40 681 .p2align 2,,3 682.L62: 683#APP 684 cbnz w1, 1f 685 mov v12.d[0], x2 686 b 2f 687 1: mov v12.d[1], x2 688 2: 689// 0 "" 2 690#NO_APP 691 b .L40 692 .p2align 2,,3 693.L63: 694#APP 695 cbnz w1, 1f 696 mov v11.d[0], x2 697 b 2f 698 1: mov v11.d[1], x2 699 2: 700// 0 "" 2 701#NO_APP 702 b .L40 703 .p2align 2,,3 704.L64: 705#APP 706 cbnz w1, 1f 707 mov v10.d[0], x2 708 b 2f 709 1: mov v10.d[1], x2 710 2: 711// 0 "" 2 712#NO_APP 713 b .L40 714 .p2align 2,,3 715.L65: 716#APP 717 cbnz w1, 1f 718 mov v9.d[0], x2 719 b 2f 720 1: mov v9.d[1], x2 721 2: 722// 0 "" 2 723#NO_APP 724 b .L40 725 .p2align 2,,3 726.L66: 727#APP 728 cbnz w1, 1f 729 mov v8.d[0], x2 730 b 2f 731 1: mov v8.d[1], x2 732 2: 733// 0 "" 2 734#NO_APP 735 b .L40 736 .p2align 2,,3 737.L67: 738#APP 739 cbnz w1, 1f 740 mov v7.d[0], x2 741 b 2f 742 1: mov v7.d[1], x2 743 2: 744// 0 "" 2 745#NO_APP 746 b .L40 747 .p2align 2,,3 748.L68: 749#APP 750 cbnz w1, 1f 751 mov v6.d[0], x2 752 b 2f 753 1: mov v6.d[1], x2 754 2: 755// 0 "" 2 756#NO_APP 757 b .L40 758 .p2align 2,,3 759.L69: 760#APP 761 cbnz w1, 1f 762 mov v5.d[0], x2 763 b 2f 764 1: mov v5.d[1], x2 765 2: 766// 0 "" 2 767#NO_APP 768 b .L40 769 .p2align 2,,3 770.L70: 771#APP 772 cbnz w1, 1f 773 mov v4.d[0], x2 774 b 2f 775 1: mov v4.d[1], x2 776 2: 777// 0 "" 2 778#NO_APP 779 b .L40 780 .p2align 2,,3 781.L71: 782#APP 783 cbnz w1, 1f 784 mov v3.d[0], x2 785 b 2f 786 1: mov v3.d[1], x2 787 2: 788// 0 "" 2 789#NO_APP 790 b .L40 791 .p2align 2,,3 792.L72: 793#APP 794 cbnz w1, 1f 795 mov v2.d[0], x2 796 b 2f 797 1: mov v2.d[1], x2 798 2: 799// 0 "" 2 800#NO_APP 801 b .L40 802 .p2align 2,,3 803.L73: 804#APP 805 cbnz w1, 1f 806 mov v1.d[0], x2 807 b 2f 808 1: mov v1.d[1], x2 809 2: 810// 0 "" 2 811#NO_APP 812 b .L40 813 .p2align 2,,3 814.L74: 815#APP 816 cbnz w1, 1f 817 mov v0.d[0], x2 818 b 2f 819 1: mov v0.d[1], x2 820 2: 821// 0 "" 2 822#NO_APP 823 b .L40 824 .size set_data, .-set_data 825 .align 2 826 .p2align 3,,7 827 .type rk_align_wr, %function 828rk_align_wr: 829 hint 25 // paciasp 830 stp x29, x30, [sp, -48]! 831 cmp w1, 4 832 mov x29, sp 833 str x19, [sp, 16] 834 mrs x19, sp_el0 835 ldr x4, [x19, 1368] 836 str x4, [sp, 40] 837 mov x4,0 838 beq .L77 839 bgt .L78 840 cmp w1, 1 841 beq .L79 842 cmp w1, 2 843 bne .L88 844 strh w2, [sp, 32] 845 mov x3, 4294963200 846#APP 847// 19 "./arch/arm64/include/asm/current.h" 1 848 mrs x2, sp_el0 849// 0 "" 2 850#NO_APP 851 ldr x2, [x2] 852 tst w2, 4194304 853 bne .L84 854.L126: 855 adrp x2, vabits_actual 856 mov x3, 1 857 ldr x2, [x2, #:lo12:vabits_actual] 858 lsl x3, x3, x2 859.L84: 860 sxtw x2, w1 861 cmp x0, x3 862 bcs .L85 863 add x8, sp, 32 864 mov x4, x0 865#APP 866// 19 "./arch/arm64/include/asm/current.h" 1 867 mrs x5, sp_el0 868// 0 "" 2 869#NO_APP 870 lsl x3, x0, 8 871 sub x8, x8, x0 872 ldr w0, [x5, 52] 873 mov x13, x5 874 mov x12, x5 875 adrp x7, cpu_hwcaps 876 mov w11, 0 877 ldr x1, [x5, 8] 878 tbnz x0, 21, .L86 879 .p2align 3,,7 880.L123: 881 ldr x6, [x5] 882 mov x0, x4 883 tbnz x6, 26, .L86 884#APP 885// 79 "./arch/arm64/include/asm/uaccess.h" 1 886 adds x0, x0, 1 887 csel x1, xzr, x1, hi 888 csinv x0, x0, xzr, cc 889 sbcs xzr, x0, x1 890 cset x0, ls 891 892// 0 "" 2 893#NO_APP 894 cbz x0, .L88 895.L124: 896 and x0, x4, x3, asr 8 897 ldr x1, [x13, 8] 898#APP 899// 289 "./arch/arm64/include/asm/uaccess.h" 1 900 bics xzr, x0, x1 901 csel x9, x4, xzr, eq 902 903// 0 "" 2 904// 297 "./arch/arm64/include/asm/uaccess.h" 1 905 hint #20 906// 0 "" 2 907#NO_APP 908 ldrb w6, [x8, x4] 909#APP 910// 38 "./arch/arm64/include/asm/jump_label.h" 1 911 1: b .L89 912 .pushsection __jump_table, "aw" 913 .align 3 914 .long 1b - ., .L89 - . 915 .quad arm64_const_caps_ready+1 - . 916 .popsection 917 918// 0 "" 2 919// 21 "./arch/arm64/include/asm/jump_label.h" 1 920 1: nop 921 .pushsection __jump_table, "aw" 922 .align 3 923 .long 1b - ., .L91 - . 924 .quad cpu_hwcap_keys+64 - . 925 .popsection 926 927// 0 "" 2 928#NO_APP 929.L92: 930#APP 931// 72 "./arch/arm64/include/asm/irqflags.h" 1 932 .if 1 == 1 933661: 934 mrs x0, daif 935662: 936.pushsection .altinstructions,"a" 937 .word 661b - . 938 .word 663f - . 939 .hword 42 940 .byte 662b-661b 941 .byte 664f-663f 942.popsection 943.subsection 1 944663: 945 .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 946 .equ .L__reg_num_x\num, \num 947 .endr 948 .equ .L__reg_num_xzr, 31 949 .macro mrs_s, rt, sreg 950.inst (0xd5200000|(\sreg)|(.L__reg_num_\rt)) 951 .endm 952 mrs_s x0, (((3) << 19) | ((0) << 16) | ((4) << 12) | ((6) << 8) | ((0) << 5)) 953 .purgem mrs_s 954 955664: 956 .org . - (664b-663b) + (662b-661b) 957 .org . - (662b-661b) + (664b-663b) 958 .previous 959.endif 960 961// 0 "" 2 962// 87 "./arch/arm64/include/asm/irqflags.h" 1 963 .if 1 == 1 964661: 965 and w1, w0, #0x00000080 966662: 967.pushsection .altinstructions,"a" 968 .word 661b - . 969 .word 663f - . 970 .hword 42 971 .byte 662b-661b 972 .byte 664f-663f 973.popsection 974.subsection 1 975663: 976 eor w1, w0, #0xe0 977664: 978 .org . - (664b-663b) + (662b-661b) 979 .org . - (662b-661b) + (664b-663b) 980 .previous 981.endif 982 983// 0 "" 2 984#NO_APP 985 cbz w1, .L121 986.L94: 987 ldr x1, [x12, 16] 988#APP 989// 141 "./arch/arm64/include/asm/uaccess.h" 1 990 mrs x10, ttbr1_el1 991// 0 "" 2 992#NO_APP 993 mov x14, x1 994 bfi x14, x10, 0, 48 995#APP 996// 144 "./arch/arm64/include/asm/uaccess.h" 1 997 msr ttbr1_el1, x14 998// 0 "" 2 999// 145 "./arch/arm64/include/asm/uaccess.h" 1 1000 isb 1001// 0 "" 2 1002// 148 "./arch/arm64/include/asm/uaccess.h" 1 1003 msr ttbr0_el1, x1 1004// 0 "" 2 1005// 149 "./arch/arm64/include/asm/uaccess.h" 1 1006 isb 1007// 0 "" 2 1008// 124 "./arch/arm64/include/asm/irqflags.h" 1 1009 .if 1 == 1 1010661: 1011 msr daif, x0 1012662: 1013.pushsection .altinstructions,"a" 1014 .word 661b - . 1015 .word 663f - . 1016 .hword 42 1017 .byte 662b-661b 1018 .byte 664f-663f 1019.popsection 1020.subsection 1 1021663: 1022 .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 1023 .equ .L__reg_num_x\num, \num 1024 .endr 1025 .equ .L__reg_num_xzr, 31 1026 .macro msr_s, sreg, rt 1027.inst (0xd5000000|(\sreg)|(.L__reg_num_\rt)) 1028 .endm 1029 msr_s (((3) << 19) | ((0) << 16) | ((4) << 12) | ((6) << 8) | ((0) << 5)), x0 1030 .purgem msr_s 1031 1032664: 1033 .org . - (664b-663b) + (662b-661b) 1034 .org . - (662b-661b) + (664b-663b) 1035 .previous 1036.endif 1037 1038// 0 "" 2 1039// 21 "./arch/arm64/include/asm/jump_label.h" 1 1040 1: nop 1041 .pushsection __jump_table, "aw" 1042 .align 3 1043 .long 1b - ., .L96 - . 1044 .quad gic_pmr_sync - . 1045 .popsection 1046 1047// 0 "" 2 1048#NO_APP 1049.L93: 1050 mov w0, w11 1051#APP 1052 1: sttrb w6, [x9] 10532: 1054 .section .fixup,"ax" 1055 .align 2 10563: mov w0, -14 1057 b 2b 1058 .previous 1059 .pushsection __ex_table, "a" 1060 .align 3 1061 .long (1b - .), (3b - .) 1062 .popsection 1063 1064// 0 "" 2 1065// 38 "./arch/arm64/include/asm/jump_label.h" 1 1066 1: b .L97 1067 .pushsection __jump_table, "aw" 1068 .align 3 1069 .long 1b - ., .L97 - . 1070 .quad arm64_const_caps_ready+1 - . 1071 .popsection 1072 1073// 0 "" 2 1074// 21 "./arch/arm64/include/asm/jump_label.h" 1 1075 1: nop 1076 .pushsection __jump_table, "aw" 1077 .align 3 1078 .long 1b - ., .L98 - . 1079 .quad cpu_hwcap_keys+64 - . 1080 .popsection 1081 1082// 0 "" 2 1083#NO_APP 1084.L100: 1085#APP 1086// 72 "./arch/arm64/include/asm/irqflags.h" 1 1087 .if 1 == 1 1088661: 1089 mrs x6, daif 1090662: 1091.pushsection .altinstructions,"a" 1092 .word 661b - . 1093 .word 663f - . 1094 .hword 42 1095 .byte 662b-661b 1096 .byte 664f-663f 1097.popsection 1098.subsection 1 1099663: 1100 .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 1101 .equ .L__reg_num_x\num, \num 1102 .endr 1103 .equ .L__reg_num_xzr, 31 1104 .macro mrs_s, rt, sreg 1105.inst (0xd5200000|(\sreg)|(.L__reg_num_\rt)) 1106 .endm 1107 mrs_s x6, (((3) << 19) | ((0) << 16) | ((4) << 12) | ((6) << 8) | ((0) << 5)) 1108 .purgem mrs_s 1109 1110664: 1111 .org . - (664b-663b) + (662b-661b) 1112 .org . - (662b-661b) + (664b-663b) 1113 .previous 1114.endif 1115 1116// 0 "" 2 1117// 87 "./arch/arm64/include/asm/irqflags.h" 1 1118 .if 1 == 1 1119661: 1120 and w1, w6, #0x00000080 1121662: 1122.pushsection .altinstructions,"a" 1123 .word 661b - . 1124 .word 663f - . 1125 .hword 42 1126 .byte 662b-661b 1127 .byte 664f-663f 1128.popsection 1129.subsection 1 1130663: 1131 eor w1, w6, #0xe0 1132664: 1133 .org . - (664b-663b) + (662b-661b) 1134 .org . - (662b-661b) + (664b-663b) 1135 .previous 1136.endif 1137 1138// 0 "" 2 1139#NO_APP 1140 cbz w1, .L122 1141.L102: 1142#APP 1143// 117 "./arch/arm64/include/asm/uaccess.h" 1 1144 mrs x1, ttbr1_el1 1145// 0 "" 2 1146#NO_APP 1147 and x1, x1, 281474976710655 1148 sub x9, x1, #4096 1149#APP 1150// 120 "./arch/arm64/include/asm/uaccess.h" 1 1151 msr ttbr0_el1, x9 1152// 0 "" 2 1153// 121 "./arch/arm64/include/asm/uaccess.h" 1 1154 isb 1155// 0 "" 2 1156// 123 "./arch/arm64/include/asm/uaccess.h" 1 1157 msr ttbr1_el1, x1 1158// 0 "" 2 1159// 124 "./arch/arm64/include/asm/uaccess.h" 1 1160 isb 1161// 0 "" 2 1162// 124 "./arch/arm64/include/asm/irqflags.h" 1 1163 .if 1 == 1 1164661: 1165 msr daif, x6 1166662: 1167.pushsection .altinstructions,"a" 1168 .word 661b - . 1169 .word 663f - . 1170 .hword 42 1171 .byte 662b-661b 1172 .byte 664f-663f 1173.popsection 1174.subsection 1 1175663: 1176 .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 1177 .equ .L__reg_num_x\num, \num 1178 .endr 1179 .equ .L__reg_num_xzr, 31 1180 .macro msr_s, sreg, rt 1181.inst (0xd5000000|(\sreg)|(.L__reg_num_\rt)) 1182 .endm 1183 msr_s (((3) << 19) | ((0) << 16) | ((4) << 12) | ((6) << 8) | ((0) << 5)), x6 1184 .purgem msr_s 1185 1186664: 1187 .org . - (664b-663b) + (662b-661b) 1188 .org . - (662b-661b) + (664b-663b) 1189 .previous 1190.endif 1191 1192// 0 "" 2 1193// 21 "./arch/arm64/include/asm/jump_label.h" 1 1194 1: nop 1195 .pushsection __jump_table, "aw" 1196 .align 3 1197 .long 1b - ., .L104 - . 1198 .quad gic_pmr_sync - . 1199 .popsection 1200 1201// 0 "" 2 1202#NO_APP 1203.L101: 1204 cbnz w0, .L88 1205 add x4, x4, 1 1206 add x3, x3, 256 1207 subs x2, x2, #1 1208 beq .L76 1209 ldr w0, [x5, 52] 1210 ldr x1, [x5, 8] 1211 tbz x0, 21, .L123 1212.L86: 1213 and x0, x4, x3, asr 8 1214#APP 1215// 79 "./arch/arm64/include/asm/uaccess.h" 1 1216 adds x0, x0, 1 1217 csel x1, xzr, x1, hi 1218 csinv x0, x0, xzr, cc 1219 sbcs xzr, x0, x1 1220 cset x0, ls 1221 1222// 0 "" 2 1223#NO_APP 1224 cbnz x0, .L124 1225 .p2align 3,,7 1226.L88: 1227 mov w0, 1 1228.L76: 1229 add x19, x19, 1368 1230 ldr x1, [sp, 40] 1231 ldr x2, [x19] 1232 subs x1, x1, x2 1233 mov x2, 0 1234 bne .L125 1235 ldr x19, [sp, 16] 1236 ldp x29, x30, [sp], 48 1237 hint 29 // autiasp 1238 ret 1239 .p2align 2,,3 1240.L78: 1241 cmp w1, 8 1242 bne .L88 1243 str x2, [sp, 32] 1244 mov x3, 4294963200 1245#APP 1246// 19 "./arch/arm64/include/asm/current.h" 1 1247 mrs x2, sp_el0 1248// 0 "" 2 1249#NO_APP 1250 ldr x2, [x2] 1251 tst w2, 4194304 1252 bne .L84 1253 b .L126 1254 .p2align 2,,3 1255.L85: 1256 add x1, sp, 32 1257 bl __memcpy_toio 1258 mov w0, 0 1259 b .L76 1260 .p2align 2,,3 1261.L97: 1262 ldr x1, [x7, #:lo12:cpu_hwcaps] 1263 tst w1, 16 1264 beq .L100 1265.L98: 1266#APP 1267// 271 "./arch/arm64/include/asm/uaccess.h" 1 1268 .if 1 == 1 1269661: 1270 nop 1271662: 1272.pushsection .altinstructions,"a" 1273 .word 661b - . 1274 .word 663f - . 1275 .hword 10 1276 .byte 662b-661b 1277 .byte 664f-663f 1278.popsection 1279.subsection 1 1280663: 1281 .inst (0xd500401f | ((0) << 16 | (4) << 5) | ((!!1) << 8)) 1282 1283664: 1284 .org . - (664b-663b) + (662b-661b) 1285 .org . - (662b-661b) + (664b-663b) 1286 .previous 1287.endif 1288 1289// 0 "" 2 1290#NO_APP 1291 b .L101 1292 .p2align 2,,3 1293.L89: 1294 ldr x0, [x7, #:lo12:cpu_hwcaps] 1295 tst w0, 16 1296 beq .L92 1297.L91: 1298#APP 1299// 276 "./arch/arm64/include/asm/uaccess.h" 1 1300 .if 1 == 1 1301661: 1302 nop 1303662: 1304.pushsection .altinstructions,"a" 1305 .word 661b - . 1306 .word 663f - . 1307 .hword 10 1308 .byte 662b-661b 1309 .byte 664f-663f 1310.popsection 1311.subsection 1 1312663: 1313 .inst (0xd500401f | ((0) << 16 | (4) << 5) | ((!!0) << 8)) 1314 1315664: 1316 .org . - (664b-663b) + (662b-661b) 1317 .org . - (662b-661b) + (664b-663b) 1318 .previous 1319.endif 1320 1321// 0 "" 2 1322#NO_APP 1323 b .L93 1324 .p2align 2,,3 1325.L96: 1326#APP 1327// 132 "./arch/arm64/include/asm/irqflags.h" 1 1328 dsb sy 1329// 0 "" 2 1330#NO_APP 1331 b .L93 1332 .p2align 2,,3 1333.L104: 1334#APP 1335// 132 "./arch/arm64/include/asm/irqflags.h" 1 1336 dsb sy 1337// 0 "" 2 1338#NO_APP 1339 b .L101 1340 .p2align 2,,3 1341.L122: 1342#APP 1343// 21 "./arch/arm64/include/asm/jump_label.h" 1 1344 1: nop 1345 .pushsection __jump_table, "aw" 1346 .align 3 1347 .long 1b - ., .L110 - . 1348 .quad gic_nonsecure_priorities - . 1349 .popsection 1350 1351// 0 "" 2 1352#NO_APP 1353 mov x1, 96 1354.L103: 1355#APP 1356// 56 "./arch/arm64/include/asm/irqflags.h" 1 1357 .if 1 == 1 1358661: 1359 msr daifset, #2 // arch_local_irq_disable 1360662: 1361.pushsection .altinstructions,"a" 1362 .word 661b - . 1363 .word 663f - . 1364 .hword 42 1365 .byte 662b-661b 1366 .byte 664f-663f 1367.popsection 1368.subsection 1 1369663: 1370 .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 1371 .equ .L__reg_num_x\num, \num 1372 .endr 1373 .equ .L__reg_num_xzr, 31 1374 .macro msr_s, sreg, rt 1375.inst (0xd5000000|(\sreg)|(.L__reg_num_\rt)) 1376 .endm 1377 msr_s (((3) << 19) | ((0) << 16) | ((4) << 12) | ((6) << 8) | ((0) << 5)), x1 1378 .purgem msr_s 1379 1380664: 1381 .org . - (664b-663b) + (662b-661b) 1382 .org . - (662b-661b) + (664b-663b) 1383 .previous 1384.endif 1385 1386// 0 "" 2 1387#NO_APP 1388 b .L102 1389 .p2align 2,,3 1390.L121: 1391#APP 1392// 21 "./arch/arm64/include/asm/jump_label.h" 1 1393 1: nop 1394 .pushsection __jump_table, "aw" 1395 .align 3 1396 .long 1b - ., .L109 - . 1397 .quad gic_nonsecure_priorities - . 1398 .popsection 1399 1400// 0 "" 2 1401#NO_APP 1402 mov x1, 96 1403.L95: 1404#APP 1405// 56 "./arch/arm64/include/asm/irqflags.h" 1 1406 .if 1 == 1 1407661: 1408 msr daifset, #2 // arch_local_irq_disable 1409662: 1410.pushsection .altinstructions,"a" 1411 .word 661b - . 1412 .word 663f - . 1413 .hword 42 1414 .byte 662b-661b 1415 .byte 664f-663f 1416.popsection 1417.subsection 1 1418663: 1419 .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 1420 .equ .L__reg_num_x\num, \num 1421 .endr 1422 .equ .L__reg_num_xzr, 31 1423 .macro msr_s, sreg, rt 1424.inst (0xd5000000|(\sreg)|(.L__reg_num_\rt)) 1425 .endm 1426 msr_s (((3) << 19) | ((0) << 16) | ((4) << 12) | ((6) << 8) | ((0) << 5)), x1 1427 .purgem msr_s 1428 1429664: 1430 .org . - (664b-663b) + (662b-661b) 1431 .org . - (662b-661b) + (664b-663b) 1432 .previous 1433.endif 1434 1435// 0 "" 2 1436#NO_APP 1437 b .L94 1438 .p2align 2,,3 1439.L110: 1440 mov x1, 160 1441 b .L103 1442 .p2align 2,,3 1443.L109: 1444 mov x1, 160 1445 b .L95 1446 .p2align 2,,3 1447.L79: 1448 strb w2, [sp, 32] 1449 mov x3, 4294963200 1450#APP 1451// 19 "./arch/arm64/include/asm/current.h" 1 1452 mrs x2, sp_el0 1453// 0 "" 2 1454#NO_APP 1455 ldr x2, [x2] 1456 tst w2, 4194304 1457 bne .L84 1458 b .L126 1459 .p2align 2,,3 1460.L77: 1461 str w2, [sp, 32] 1462 mov x3, 4294963200 1463#APP 1464// 19 "./arch/arm64/include/asm/current.h" 1 1465 mrs x2, sp_el0 1466// 0 "" 2 1467#NO_APP 1468 ldr x2, [x2] 1469 tst w2, 4194304 1470 bne .L84 1471 b .L126 1472.L125: 1473 bl __stack_chk_fail 1474 .size rk_align_wr, .-rk_align_wr 1475 .align 2 1476 .p2align 3,,7 1477 .type rk_align_rd, %function 1478rk_align_rd: 1479 hint 25 // paciasp 1480 stp x29, x30, [sp, -64]! 1481 mov x29, sp 1482 stp x19, x20, [sp, 16] 1483 mrs x20, sp_el0 1484 mov w19, w1 1485 ldr x1, [x20, 1368] 1486 str x1, [sp, 56] 1487 mov x1,0 1488 sub w3, w19, #1 1489 sub w1, w19, #4 1490 tst w1, -5 1491 ccmp w3, 1, 0, ne 1492 bhi .L158 1493 str x21, [sp, 32] 1494 mov x1, x0 1495 mov x21, x2 1496#APP 1497// 19 "./arch/arm64/include/asm/current.h" 1 1498 mrs x0, sp_el0 1499// 0 "" 2 1500#NO_APP 1501 ldr x2, [x0] 1502 mov x0, 4294963200 1503 tst w2, 4194304 1504 bne .L130 1505 adrp x2, vabits_actual 1506 mov x0, 1 1507 ldr x2, [x2, #:lo12:vabits_actual] 1508 lsl x0, x0, x2 1509.L130: 1510 cmp x1, x0 1511 sxtw x2, w19 1512 bcc .L176 1513 add x0, sp, 48 1514 bl __memcpy_fromio 1515.L152: 1516 cmp w19, 4 1517 beq .L153 1518 bgt .L154 1519 cmp w19, 1 1520 beq .L155 1521 cmp w19, 2 1522 bne .L174 1523 ldrh w1, [sp, 48] 1524 mov w0, 0 1525 str x1, [x21] 1526 ldr x21, [sp, 32] 1527 .p2align 3,,7 1528.L127: 1529 add x20, x20, 1368 1530 ldr x1, [sp, 56] 1531 ldr x2, [x20] 1532 subs x1, x1, x2 1533 mov x2, 0 1534 bne .L177 1535 ldp x19, x20, [sp, 16] 1536 ldp x29, x30, [sp], 64 1537 hint 29 // autiasp 1538 ret 1539 .p2align 2,,3 1540.L176: 1541#APP 1542// 19 "./arch/arm64/include/asm/current.h" 1 1543 mrs x5, sp_el0 1544// 0 "" 2 1545#NO_APP 1546 ldr w0, [x5, 52] 1547 lsl x4, x1, 8 1548 mov x13, x5 1549 mov x12, x5 1550 add x9, sp, 48 1551 adrp x8, cpu_hwcaps 1552 mov w11, 0 1553 ldr x3, [x5, 8] 1554 tbnz x0, 21, .L132 1555 .p2align 3,,7 1556.L180: 1557 ldr x6, [x5] 1558 mov x0, x1 1559 tbnz x6, 26, .L132 1560#APP 1561// 79 "./arch/arm64/include/asm/uaccess.h" 1 1562 adds x0, x0, 1 1563 csel x3, xzr, x3, hi 1564 csinv x0, x0, xzr, cc 1565 sbcs xzr, x0, x3 1566 cset x0, ls 1567 1568// 0 "" 2 1569#NO_APP 1570 cbz x0, .L173 1571.L181: 1572 and x0, x1, x4, asr 8 1573 ldr x6, [x13, 8] 1574#APP 1575// 289 "./arch/arm64/include/asm/uaccess.h" 1 1576 bics xzr, x0, x6 1577 csel x3, x1, xzr, eq 1578 1579// 0 "" 2 1580// 297 "./arch/arm64/include/asm/uaccess.h" 1 1581 hint #20 1582// 0 "" 2 1583// 38 "./arch/arm64/include/asm/jump_label.h" 1 1584 1: b .L135 1585 .pushsection __jump_table, "aw" 1586 .align 3 1587 .long 1b - ., .L135 - . 1588 .quad arm64_const_caps_ready+1 - . 1589 .popsection 1590 1591// 0 "" 2 1592// 21 "./arch/arm64/include/asm/jump_label.h" 1 1593 1: nop 1594 .pushsection __jump_table, "aw" 1595 .align 3 1596 .long 1b - ., .L137 - . 1597 .quad cpu_hwcap_keys+64 - . 1598 .popsection 1599 1600// 0 "" 2 1601#NO_APP 1602.L138: 1603#APP 1604// 72 "./arch/arm64/include/asm/irqflags.h" 1 1605 .if 1 == 1 1606661: 1607 mrs x0, daif 1608662: 1609.pushsection .altinstructions,"a" 1610 .word 661b - . 1611 .word 663f - . 1612 .hword 42 1613 .byte 662b-661b 1614 .byte 664f-663f 1615.popsection 1616.subsection 1 1617663: 1618 .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 1619 .equ .L__reg_num_x\num, \num 1620 .endr 1621 .equ .L__reg_num_xzr, 31 1622 .macro mrs_s, rt, sreg 1623.inst (0xd5200000|(\sreg)|(.L__reg_num_\rt)) 1624 .endm 1625 mrs_s x0, (((3) << 19) | ((0) << 16) | ((4) << 12) | ((6) << 8) | ((0) << 5)) 1626 .purgem mrs_s 1627 1628664: 1629 .org . - (664b-663b) + (662b-661b) 1630 .org . - (662b-661b) + (664b-663b) 1631 .previous 1632.endif 1633 1634// 0 "" 2 1635// 87 "./arch/arm64/include/asm/irqflags.h" 1 1636 .if 1 == 1 1637661: 1638 and w6, w0, #0x00000080 1639662: 1640.pushsection .altinstructions,"a" 1641 .word 661b - . 1642 .word 663f - . 1643 .hword 42 1644 .byte 662b-661b 1645 .byte 664f-663f 1646.popsection 1647.subsection 1 1648663: 1649 eor w6, w0, #0xe0 1650664: 1651 .org . - (664b-663b) + (662b-661b) 1652 .org . - (662b-661b) + (664b-663b) 1653 .previous 1654.endif 1655 1656// 0 "" 2 1657#NO_APP 1658 cbz w6, .L178 1659.L140: 1660 ldr x6, [x12, 16] 1661#APP 1662// 141 "./arch/arm64/include/asm/uaccess.h" 1 1663 mrs x7, ttbr1_el1 1664// 0 "" 2 1665#NO_APP 1666 mov x10, x6 1667 bfi x10, x7, 0, 48 1668#APP 1669// 144 "./arch/arm64/include/asm/uaccess.h" 1 1670 msr ttbr1_el1, x10 1671// 0 "" 2 1672// 145 "./arch/arm64/include/asm/uaccess.h" 1 1673 isb 1674// 0 "" 2 1675// 148 "./arch/arm64/include/asm/uaccess.h" 1 1676 msr ttbr0_el1, x6 1677// 0 "" 2 1678// 149 "./arch/arm64/include/asm/uaccess.h" 1 1679 isb 1680// 0 "" 2 1681// 124 "./arch/arm64/include/asm/irqflags.h" 1 1682 .if 1 == 1 1683661: 1684 msr daif, x0 1685662: 1686.pushsection .altinstructions,"a" 1687 .word 661b - . 1688 .word 663f - . 1689 .hword 42 1690 .byte 662b-661b 1691 .byte 664f-663f 1692.popsection 1693.subsection 1 1694663: 1695 .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 1696 .equ .L__reg_num_x\num, \num 1697 .endr 1698 .equ .L__reg_num_xzr, 31 1699 .macro msr_s, sreg, rt 1700.inst (0xd5000000|(\sreg)|(.L__reg_num_\rt)) 1701 .endm 1702 msr_s (((3) << 19) | ((0) << 16) | ((4) << 12) | ((6) << 8) | ((0) << 5)), x0 1703 .purgem msr_s 1704 1705664: 1706 .org . - (664b-663b) + (662b-661b) 1707 .org . - (662b-661b) + (664b-663b) 1708 .previous 1709.endif 1710 1711// 0 "" 2 1712// 21 "./arch/arm64/include/asm/jump_label.h" 1 1713 1: nop 1714 .pushsection __jump_table, "aw" 1715 .align 3 1716 .long 1b - ., .L142 - . 1717 .quad gic_pmr_sync - . 1718 .popsection 1719 1720// 0 "" 2 1721#NO_APP 1722.L139: 1723 mov w0, w11 1724#APP 1725 1: ldtrb w6, [x3] 17262: 1727 .section .fixup, "ax" 1728 .align 2 17293: mov w0, -14 1730 mov x6, #0 1731 b 2b 1732 .previous 1733 .pushsection __ex_table, "a" 1734 .align 3 1735 .long (1b - .), (3b - .) 1736 .popsection 1737 1738// 0 "" 2 1739#NO_APP 1740 and w6, w6, 255 1741#APP 1742// 38 "./arch/arm64/include/asm/jump_label.h" 1 1743 1: b .L143 1744 .pushsection __jump_table, "aw" 1745 .align 3 1746 .long 1b - ., .L143 - . 1747 .quad arm64_const_caps_ready+1 - . 1748 .popsection 1749 1750// 0 "" 2 1751// 21 "./arch/arm64/include/asm/jump_label.h" 1 1752 1: nop 1753 .pushsection __jump_table, "aw" 1754 .align 3 1755 .long 1b - ., .L144 - . 1756 .quad cpu_hwcap_keys+64 - . 1757 .popsection 1758 1759// 0 "" 2 1760#NO_APP 1761.L146: 1762#APP 1763// 72 "./arch/arm64/include/asm/irqflags.h" 1 1764 .if 1 == 1 1765661: 1766 mrs x7, daif 1767662: 1768.pushsection .altinstructions,"a" 1769 .word 661b - . 1770 .word 663f - . 1771 .hword 42 1772 .byte 662b-661b 1773 .byte 664f-663f 1774.popsection 1775.subsection 1 1776663: 1777 .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 1778 .equ .L__reg_num_x\num, \num 1779 .endr 1780 .equ .L__reg_num_xzr, 31 1781 .macro mrs_s, rt, sreg 1782.inst (0xd5200000|(\sreg)|(.L__reg_num_\rt)) 1783 .endm 1784 mrs_s x7, (((3) << 19) | ((0) << 16) | ((4) << 12) | ((6) << 8) | ((0) << 5)) 1785 .purgem mrs_s 1786 1787664: 1788 .org . - (664b-663b) + (662b-661b) 1789 .org . - (662b-661b) + (664b-663b) 1790 .previous 1791.endif 1792 1793// 0 "" 2 1794// 87 "./arch/arm64/include/asm/irqflags.h" 1 1795 .if 1 == 1 1796661: 1797 and w3, w7, #0x00000080 1798662: 1799.pushsection .altinstructions,"a" 1800 .word 661b - . 1801 .word 663f - . 1802 .hword 42 1803 .byte 662b-661b 1804 .byte 664f-663f 1805.popsection 1806.subsection 1 1807663: 1808 eor w3, w7, #0xe0 1809664: 1810 .org . - (664b-663b) + (662b-661b) 1811 .org . - (662b-661b) + (664b-663b) 1812 .previous 1813.endif 1814 1815// 0 "" 2 1816#NO_APP 1817 cbz w3, .L179 1818.L148: 1819#APP 1820// 117 "./arch/arm64/include/asm/uaccess.h" 1 1821 mrs x3, ttbr1_el1 1822// 0 "" 2 1823#NO_APP 1824 and x3, x3, 281474976710655 1825 sub x10, x3, #4096 1826#APP 1827// 120 "./arch/arm64/include/asm/uaccess.h" 1 1828 msr ttbr0_el1, x10 1829// 0 "" 2 1830// 121 "./arch/arm64/include/asm/uaccess.h" 1 1831 isb 1832// 0 "" 2 1833// 123 "./arch/arm64/include/asm/uaccess.h" 1 1834 msr ttbr1_el1, x3 1835// 0 "" 2 1836// 124 "./arch/arm64/include/asm/uaccess.h" 1 1837 isb 1838// 0 "" 2 1839// 124 "./arch/arm64/include/asm/irqflags.h" 1 1840 .if 1 == 1 1841661: 1842 msr daif, x7 1843662: 1844.pushsection .altinstructions,"a" 1845 .word 661b - . 1846 .word 663f - . 1847 .hword 42 1848 .byte 662b-661b 1849 .byte 664f-663f 1850.popsection 1851.subsection 1 1852663: 1853 .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 1854 .equ .L__reg_num_x\num, \num 1855 .endr 1856 .equ .L__reg_num_xzr, 31 1857 .macro msr_s, sreg, rt 1858.inst (0xd5000000|(\sreg)|(.L__reg_num_\rt)) 1859 .endm 1860 msr_s (((3) << 19) | ((0) << 16) | ((4) << 12) | ((6) << 8) | ((0) << 5)), x7 1861 .purgem msr_s 1862 1863664: 1864 .org . - (664b-663b) + (662b-661b) 1865 .org . - (662b-661b) + (664b-663b) 1866 .previous 1867.endif 1868 1869// 0 "" 2 1870// 21 "./arch/arm64/include/asm/jump_label.h" 1 1871 1: nop 1872 .pushsection __jump_table, "aw" 1873 .align 3 1874 .long 1b - ., .L150 - . 1875 .quad gic_pmr_sync - . 1876 .popsection 1877 1878// 0 "" 2 1879#NO_APP 1880.L147: 1881 strb w6, [x9], 1 1882 cbnz w0, .L173 1883 add x1, x1, 1 1884 add x4, x4, 256 1885 subs x2, x2, #1 1886 beq .L152 1887 ldr w0, [x5, 52] 1888 ldr x3, [x5, 8] 1889 tbz x0, 21, .L180 1890.L132: 1891 and x0, x1, x4, asr 8 1892#APP 1893// 79 "./arch/arm64/include/asm/uaccess.h" 1 1894 adds x0, x0, 1 1895 csel x3, xzr, x3, hi 1896 csinv x0, x0, xzr, cc 1897 sbcs xzr, x0, x3 1898 cset x0, ls 1899 1900// 0 "" 2 1901#NO_APP 1902 cbnz x0, .L181 1903.L173: 1904 ldr x21, [sp, 32] 1905.L158: 1906 mov w0, 1 1907 b .L127 1908 .p2align 2,,3 1909.L143: 1910 ldr x3, [x8, #:lo12:cpu_hwcaps] 1911 tst w3, 16 1912 beq .L146 1913.L144: 1914#APP 1915// 271 "./arch/arm64/include/asm/uaccess.h" 1 1916 .if 1 == 1 1917661: 1918 nop 1919662: 1920.pushsection .altinstructions,"a" 1921 .word 661b - . 1922 .word 663f - . 1923 .hword 10 1924 .byte 662b-661b 1925 .byte 664f-663f 1926.popsection 1927.subsection 1 1928663: 1929 .inst (0xd500401f | ((0) << 16 | (4) << 5) | ((!!1) << 8)) 1930 1931664: 1932 .org . - (664b-663b) + (662b-661b) 1933 .org . - (662b-661b) + (664b-663b) 1934 .previous 1935.endif 1936 1937// 0 "" 2 1938#NO_APP 1939 b .L147 1940 .p2align 2,,3 1941.L135: 1942 ldr x0, [x8, #:lo12:cpu_hwcaps] 1943 tst w0, 16 1944 beq .L138 1945.L137: 1946#APP 1947// 276 "./arch/arm64/include/asm/uaccess.h" 1 1948 .if 1 == 1 1949661: 1950 nop 1951662: 1952.pushsection .altinstructions,"a" 1953 .word 661b - . 1954 .word 663f - . 1955 .hword 10 1956 .byte 662b-661b 1957 .byte 664f-663f 1958.popsection 1959.subsection 1 1960663: 1961 .inst (0xd500401f | ((0) << 16 | (4) << 5) | ((!!0) << 8)) 1962 1963664: 1964 .org . - (664b-663b) + (662b-661b) 1965 .org . - (662b-661b) + (664b-663b) 1966 .previous 1967.endif 1968 1969// 0 "" 2 1970#NO_APP 1971 b .L139 1972 .p2align 2,,3 1973.L142: 1974#APP 1975// 132 "./arch/arm64/include/asm/irqflags.h" 1 1976 dsb sy 1977// 0 "" 2 1978#NO_APP 1979 b .L139 1980 .p2align 2,,3 1981.L150: 1982#APP 1983// 132 "./arch/arm64/include/asm/irqflags.h" 1 1984 dsb sy 1985// 0 "" 2 1986#NO_APP 1987 b .L147 1988 .p2align 2,,3 1989.L154: 1990 cmp w19, 8 1991 bne .L174 1992 ldr x1, [sp, 48] 1993 str x1, [x21] 1994 mov w0, 0 1995 ldr x21, [sp, 32] 1996 b .L127 1997 .p2align 2,,3 1998.L178: 1999#APP 2000// 21 "./arch/arm64/include/asm/jump_label.h" 1 2001 1: nop 2002 .pushsection __jump_table, "aw" 2003 .align 3 2004 .long 1b - ., .L162 - . 2005 .quad gic_nonsecure_priorities - . 2006 .popsection 2007 2008// 0 "" 2 2009#NO_APP 2010 mov x6, 96 2011.L141: 2012#APP 2013// 56 "./arch/arm64/include/asm/irqflags.h" 1 2014 .if 1 == 1 2015661: 2016 msr daifset, #2 // arch_local_irq_disable 2017662: 2018.pushsection .altinstructions,"a" 2019 .word 661b - . 2020 .word 663f - . 2021 .hword 42 2022 .byte 662b-661b 2023 .byte 664f-663f 2024.popsection 2025.subsection 1 2026663: 2027 .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 2028 .equ .L__reg_num_x\num, \num 2029 .endr 2030 .equ .L__reg_num_xzr, 31 2031 .macro msr_s, sreg, rt 2032.inst (0xd5000000|(\sreg)|(.L__reg_num_\rt)) 2033 .endm 2034 msr_s (((3) << 19) | ((0) << 16) | ((4) << 12) | ((6) << 8) | ((0) << 5)), x6 2035 .purgem msr_s 2036 2037664: 2038 .org . - (664b-663b) + (662b-661b) 2039 .org . - (662b-661b) + (664b-663b) 2040 .previous 2041.endif 2042 2043// 0 "" 2 2044#NO_APP 2045 b .L140 2046 .p2align 2,,3 2047.L179: 2048#APP 2049// 21 "./arch/arm64/include/asm/jump_label.h" 1 2050 1: nop 2051 .pushsection __jump_table, "aw" 2052 .align 3 2053 .long 1b - ., .L163 - . 2054 .quad gic_nonsecure_priorities - . 2055 .popsection 2056 2057// 0 "" 2 2058#NO_APP 2059 mov x3, 96 2060.L149: 2061#APP 2062// 56 "./arch/arm64/include/asm/irqflags.h" 1 2063 .if 1 == 1 2064661: 2065 msr daifset, #2 // arch_local_irq_disable 2066662: 2067.pushsection .altinstructions,"a" 2068 .word 661b - . 2069 .word 663f - . 2070 .hword 42 2071 .byte 662b-661b 2072 .byte 664f-663f 2073.popsection 2074.subsection 1 2075663: 2076 .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 2077 .equ .L__reg_num_x\num, \num 2078 .endr 2079 .equ .L__reg_num_xzr, 31 2080 .macro msr_s, sreg, rt 2081.inst (0xd5000000|(\sreg)|(.L__reg_num_\rt)) 2082 .endm 2083 msr_s (((3) << 19) | ((0) << 16) | ((4) << 12) | ((6) << 8) | ((0) << 5)), x3 2084 .purgem msr_s 2085 2086664: 2087 .org . - (664b-663b) + (662b-661b) 2088 .org . - (662b-661b) + (664b-663b) 2089 .previous 2090.endif 2091 2092// 0 "" 2 2093#NO_APP 2094 b .L148 2095 .p2align 2,,3 2096.L162: 2097 mov x6, 160 2098 b .L141 2099 .p2align 2,,3 2100.L163: 2101 mov x3, 160 2102 b .L149 2103 .p2align 2,,3 2104.L174: 2105 mov w0, 1 2106 ldr x21, [sp, 32] 2107 b .L127 2108 .p2align 2,,3 2109.L153: 2110 ldr w1, [sp, 48] 2111 mov w0, 0 2112 str x1, [x21] 2113 ldr x21, [sp, 32] 2114 b .L127 2115 .p2align 2,,3 2116.L155: 2117 ldrb w1, [sp, 48] 2118 mov w0, 0 2119 str x1, [x21] 2120 ldr x21, [sp, 32] 2121 b .L127 2122.L177: 2123 str x21, [sp, 32] 2124 bl __stack_chk_fail 2125 .size rk_align_rd, .-rk_align_rd 2126 .align 2 2127 .p2align 3,,7 2128 .global alignment_fixup_helper 2129 .type alignment_fixup_helper, %function 2130alignment_fixup_helper: 2131 hint 25 // paciasp 2132 stp x29, x30, [sp, -176]! 2133 mov x29, sp 2134 stp x19, x20, [sp, 16] 2135 mov x20, x2 2136 mrs x19, sp_el0 2137 stp x21, x22, [sp, 32] 2138 mov x22, x0 2139 ldr x1, [x20, 264] 2140 ldr x2, [x19, 1368] 2141 str x2, [sp, 168] 2142 mov x2,0 2143 tst x1, 15 2144 bne .L183 2145#APP 2146// 19 "./arch/arm64/include/asm/current.h" 1 2147 mrs x0, sp_el0 2148// 0 "" 2 2149#NO_APP 2150 ldr x0, [x0] 2151 mov x1, 4294963200 2152 tst w0, 4194304 2153 bne .L184 2154 adrp x0, vabits_actual 2155 mov x1, 1 2156 ldr x0, [x0, #:lo12:vabits_actual] 2157 lsl x1, x1, x0 2158.L184: 2159 cmp x22, x1 2160 bcc .L185 2161.L189: 2162 mov w0, 1 2163.L182: 2164 add x19, x19, 1368 2165 ldr x1, [sp, 168] 2166 ldr x2, [x19] 2167 subs x1, x1, x2 2168 mov x2, 0 2169 bne .L442 2170 ldp x19, x20, [sp, 16] 2171 ldp x21, x22, [sp, 32] 2172 ldp x29, x30, [sp], 176 2173 hint 29 // autiasp 2174 ret 2175 .p2align 2,,3 2176.L185: 2177#APP 2178// 19 "./arch/arm64/include/asm/current.h" 1 2179 mrs x1, sp_el0 2180// 0 "" 2 2181#NO_APP 2182 ldr w3, [x1, 52] 2183 ldr x0, [x1, 8] 2184 ldr x2, [x20, 256] 2185 tbz x3, 21, .L443 2186.L187: 2187 sbfx x1, x2, 0, 56 2188 and x1, x1, x2 2189.L188: 2190#APP 2191// 79 "./arch/arm64/include/asm/uaccess.h" 1 2192 adds x1, x1, 4 2193 csel x0, xzr, x0, hi 2194 csinv x1, x1, xzr, cc 2195 sbcs xzr, x1, x0 2196 cset x1, ls 2197 2198// 0 "" 2 2199#NO_APP 2200 cbz x1, .L189 2201 sbfx x0, x2, 0, 56 2202#APP 2203// 19 "./arch/arm64/include/asm/current.h" 1 2204 mrs x1, sp_el0 2205// 0 "" 2 2206#NO_APP 2207 and x0, x0, x2 2208 ldr x3, [x1, 8] 2209#APP 2210// 289 "./arch/arm64/include/asm/uaccess.h" 1 2211 bics xzr, x0, x3 2212 csel x1, x2, xzr, eq 2213 2214// 0 "" 2 2215// 297 "./arch/arm64/include/asm/uaccess.h" 1 2216 hint #20 2217// 0 "" 2 2218// 38 "./arch/arm64/include/asm/jump_label.h" 1 2219 1: b .L190 2220 .pushsection __jump_table, "aw" 2221 .align 3 2222 .long 1b - ., .L190 - . 2223 .quad arm64_const_caps_ready+1 - . 2224 .popsection 2225 2226// 0 "" 2 2227// 21 "./arch/arm64/include/asm/jump_label.h" 1 2228 1: nop 2229 .pushsection __jump_table, "aw" 2230 .align 3 2231 .long 1b - ., .L192 - . 2232 .quad cpu_hwcap_keys+64 - . 2233 .popsection 2234 2235// 0 "" 2 2236#NO_APP 2237.L193: 2238#APP 2239// 72 "./arch/arm64/include/asm/irqflags.h" 1 2240 .if 1 == 1 2241661: 2242 mrs x0, daif 2243662: 2244.pushsection .altinstructions,"a" 2245 .word 661b - . 2246 .word 663f - . 2247 .hword 42 2248 .byte 662b-661b 2249 .byte 664f-663f 2250.popsection 2251.subsection 1 2252663: 2253 .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 2254 .equ .L__reg_num_x\num, \num 2255 .endr 2256 .equ .L__reg_num_xzr, 31 2257 .macro mrs_s, rt, sreg 2258.inst (0xd5200000|(\sreg)|(.L__reg_num_\rt)) 2259 .endm 2260 mrs_s x0, (((3) << 19) | ((0) << 16) | ((4) << 12) | ((6) << 8) | ((0) << 5)) 2261 .purgem mrs_s 2262 2263664: 2264 .org . - (664b-663b) + (662b-661b) 2265 .org . - (662b-661b) + (664b-663b) 2266 .previous 2267.endif 2268 2269// 0 "" 2 2270// 87 "./arch/arm64/include/asm/irqflags.h" 1 2271 .if 1 == 1 2272661: 2273 and w2, w0, #0x00000080 2274662: 2275.pushsection .altinstructions,"a" 2276 .word 661b - . 2277 .word 663f - . 2278 .hword 42 2279 .byte 662b-661b 2280 .byte 664f-663f 2281.popsection 2282.subsection 1 2283663: 2284 eor w2, w0, #0xe0 2285664: 2286 .org . - (664b-663b) + (662b-661b) 2287 .org . - (662b-661b) + (664b-663b) 2288 .previous 2289.endif 2290 2291// 0 "" 2 2292#NO_APP 2293 cbz w2, .L444 2294.L195: 2295#APP 2296// 19 "./arch/arm64/include/asm/current.h" 1 2297 mrs x2, sp_el0 2298// 0 "" 2 2299#NO_APP 2300 ldr x2, [x2, 16] 2301#APP 2302// 141 "./arch/arm64/include/asm/uaccess.h" 1 2303 mrs x3, ttbr1_el1 2304// 0 "" 2 2305#NO_APP 2306 mov x4, x2 2307 bfi x4, x3, 0, 48 2308#APP 2309// 144 "./arch/arm64/include/asm/uaccess.h" 1 2310 msr ttbr1_el1, x4 2311// 0 "" 2 2312// 145 "./arch/arm64/include/asm/uaccess.h" 1 2313 isb 2314// 0 "" 2 2315// 148 "./arch/arm64/include/asm/uaccess.h" 1 2316 msr ttbr0_el1, x2 2317// 0 "" 2 2318// 149 "./arch/arm64/include/asm/uaccess.h" 1 2319 isb 2320// 0 "" 2 2321// 124 "./arch/arm64/include/asm/irqflags.h" 1 2322 .if 1 == 1 2323661: 2324 msr daif, x0 2325662: 2326.pushsection .altinstructions,"a" 2327 .word 661b - . 2328 .word 663f - . 2329 .hword 42 2330 .byte 662b-661b 2331 .byte 664f-663f 2332.popsection 2333.subsection 1 2334663: 2335 .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 2336 .equ .L__reg_num_x\num, \num 2337 .endr 2338 .equ .L__reg_num_xzr, 31 2339 .macro msr_s, sreg, rt 2340.inst (0xd5000000|(\sreg)|(.L__reg_num_\rt)) 2341 .endm 2342 msr_s (((3) << 19) | ((0) << 16) | ((4) << 12) | ((6) << 8) | ((0) << 5)), x0 2343 .purgem msr_s 2344 2345664: 2346 .org . - (664b-663b) + (662b-661b) 2347 .org . - (662b-661b) + (664b-663b) 2348 .previous 2349.endif 2350 2351// 0 "" 2 2352// 21 "./arch/arm64/include/asm/jump_label.h" 1 2353 1: nop 2354 .pushsection __jump_table, "aw" 2355 .align 3 2356 .long 1b - ., .L197 - . 2357 .quad gic_pmr_sync - . 2358 .popsection 2359 2360// 0 "" 2 2361#NO_APP 2362 b .L194 2363 .p2align 2,,3 2364.L183: 2365 ldr x0, [x20, 256] 2366 add x1, sp, 132 2367 bl aarch64_insn_read 2368 cbnz w0, .L189 2369 ldr w0, [sp, 132] 2370.L206: 2371 bl aarch64_get_insn_class 2372 cmp w0, 4 2373 beq .L207 2374 cmp w0, 5 2375 mov w0, 1 2376 bne .L182 2377 ldr w1, [sp, 132] 2378 mov w2, 29728 2379 movk w2, 0xd50b, lsl 16 2380 and w1, w1, -32 2381 cmp w1, w2 2382 bne .L189 2383#APP 2384 .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 2385 .equ .L__reg_num_x\num, \num 2386 .endr 2387 .equ .L__reg_num_xzr, 31 2388 .macro mrs_s, rt, sreg 2389.inst (0xd5200000|(\sreg)|(.L__reg_num_\rt)) 2390 .endm 2391 mrs_s x21, (((3) << 19) | ((3) << 16) | ((0) << 12) | ((0) << 8) | ((7) << 5)) 2392 .purgem mrs_s 2393 2394// 0 "" 2 2395#NO_APP 2396 and w21, w21, 15 2397 mov x1, 4294963200 2398 add w21, w21, 2 2399#APP 2400// 19 "./arch/arm64/include/asm/current.h" 1 2401 mrs x2, sp_el0 2402// 0 "" 2 2403#NO_APP 2404 ldr x2, [x2] 2405 lsl w21, w0, w21 2406 neg w0, w21 2407 sxtw x0, w0 2408 tst w2, 4194304 2409 and x22, x0, x22 2410 bne .L208 2411 adrp x0, vabits_actual 2412 mov x1, 1 2413 ldr x0, [x0, #:lo12:vabits_actual] 2414 lsl x1, x1, x0 2415.L208: 2416 cmp x22, x1 2417 bcs .L209 2418 .p2align 3,,7 2419.L210: 2420 mov x0, x22 2421 mov x2, 0 2422 mov w1, 1 2423 bl rk_align_wr 2424 cbnz w0, .L189 2425 subs w21, w21, #1 2426 bne .L210 2427.L211: 2428 ldr x1, [x20, 256] 2429 mov w0, 0 2430 add x1, x1, 4 2431 str x1, [x20, 256] 2432 b .L182 2433 .p2align 2,,3 2434.L443: 2435 ldr x3, [x1] 2436 mov x1, x2 2437 tst w3, 67108864 2438 beq .L188 2439 b .L187 2440 .p2align 2,,3 2441.L207: 2442 ldr w21, [sp, 132] 2443 stp x23, x24, [sp, 48] 2444 uxtw x0, w21 2445 ubfx x22, x21, 28, 2 2446 ubfx x23, x21, 26, 1 2447 cmp w22, 2 2448 beq .L445 2449 cmp w22, 3 2450 beq .L446 2451 ldp x23, x24, [sp, 48] 2452 b .L189 2453 .p2align 2,,3 2454.L190: 2455 adrp x0, cpu_hwcaps 2456 ldr x0, [x0, #:lo12:cpu_hwcaps] 2457 tst w0, 16 2458 beq .L193 2459.L192: 2460#APP 2461// 276 "./arch/arm64/include/asm/uaccess.h" 1 2462 .if 1 == 1 2463661: 2464 nop 2465662: 2466.pushsection .altinstructions,"a" 2467 .word 661b - . 2468 .word 663f - . 2469 .hword 10 2470 .byte 662b-661b 2471 .byte 664f-663f 2472.popsection 2473.subsection 1 2474663: 2475 .inst (0xd500401f | ((0) << 16 | (4) << 5) | ((!!0) << 8)) 2476 2477664: 2478 .org . - (664b-663b) + (662b-661b) 2479 .org . - (662b-661b) + (664b-663b) 2480 .previous 2481.endif 2482 2483// 0 "" 2 2484#NO_APP 2485.L194: 2486 mov w0, 0 2487#APP 2488 1: ldtr w2, [x1] 24892: 2490 .section .fixup, "ax" 2491 .align 2 24923: mov w0, -14 2493 mov x2, #0 2494 b 2b 2495 .previous 2496 .pushsection __ex_table, "a" 2497 .align 3 2498 .long (1b - .), (3b - .) 2499 .popsection 2500 2501// 0 "" 2 2502// 38 "./arch/arm64/include/asm/jump_label.h" 1 2503 1: b .L198 2504 .pushsection __jump_table, "aw" 2505 .align 3 2506 .long 1b - ., .L198 - . 2507 .quad arm64_const_caps_ready+1 - . 2508 .popsection 2509 2510// 0 "" 2 2511// 21 "./arch/arm64/include/asm/jump_label.h" 1 2512 1: nop 2513 .pushsection __jump_table, "aw" 2514 .align 3 2515 .long 1b - ., .L199 - . 2516 .quad cpu_hwcap_keys+64 - . 2517 .popsection 2518 2519// 0 "" 2 2520#NO_APP 2521.L201: 2522#APP 2523// 72 "./arch/arm64/include/asm/irqflags.h" 1 2524 .if 1 == 1 2525661: 2526 mrs x3, daif 2527662: 2528.pushsection .altinstructions,"a" 2529 .word 661b - . 2530 .word 663f - . 2531 .hword 42 2532 .byte 662b-661b 2533 .byte 664f-663f 2534.popsection 2535.subsection 1 2536663: 2537 .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 2538 .equ .L__reg_num_x\num, \num 2539 .endr 2540 .equ .L__reg_num_xzr, 31 2541 .macro mrs_s, rt, sreg 2542.inst (0xd5200000|(\sreg)|(.L__reg_num_\rt)) 2543 .endm 2544 mrs_s x3, (((3) << 19) | ((0) << 16) | ((4) << 12) | ((6) << 8) | ((0) << 5)) 2545 .purgem mrs_s 2546 2547664: 2548 .org . - (664b-663b) + (662b-661b) 2549 .org . - (662b-661b) + (664b-663b) 2550 .previous 2551.endif 2552 2553// 0 "" 2 2554// 87 "./arch/arm64/include/asm/irqflags.h" 1 2555 .if 1 == 1 2556661: 2557 and w1, w3, #0x00000080 2558662: 2559.pushsection .altinstructions,"a" 2560 .word 661b - . 2561 .word 663f - . 2562 .hword 42 2563 .byte 662b-661b 2564 .byte 664f-663f 2565.popsection 2566.subsection 1 2567663: 2568 eor w1, w3, #0xe0 2569664: 2570 .org . - (664b-663b) + (662b-661b) 2571 .org . - (662b-661b) + (664b-663b) 2572 .previous 2573.endif 2574 2575// 0 "" 2 2576#NO_APP 2577 cbz w1, .L447 2578.L203: 2579#APP 2580// 117 "./arch/arm64/include/asm/uaccess.h" 1 2581 mrs x1, ttbr1_el1 2582// 0 "" 2 2583#NO_APP 2584 and x1, x1, 281474976710655 2585 sub x4, x1, #4096 2586#APP 2587// 120 "./arch/arm64/include/asm/uaccess.h" 1 2588 msr ttbr0_el1, x4 2589// 0 "" 2 2590// 121 "./arch/arm64/include/asm/uaccess.h" 1 2591 isb 2592// 0 "" 2 2593// 123 "./arch/arm64/include/asm/uaccess.h" 1 2594 msr ttbr1_el1, x1 2595// 0 "" 2 2596// 124 "./arch/arm64/include/asm/uaccess.h" 1 2597 isb 2598// 0 "" 2 2599// 124 "./arch/arm64/include/asm/irqflags.h" 1 2600 .if 1 == 1 2601661: 2602 msr daif, x3 2603662: 2604.pushsection .altinstructions,"a" 2605 .word 661b - . 2606 .word 663f - . 2607 .hword 42 2608 .byte 662b-661b 2609 .byte 664f-663f 2610.popsection 2611.subsection 1 2612663: 2613 .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 2614 .equ .L__reg_num_x\num, \num 2615 .endr 2616 .equ .L__reg_num_xzr, 31 2617 .macro msr_s, sreg, rt 2618.inst (0xd5000000|(\sreg)|(.L__reg_num_\rt)) 2619 .endm 2620 msr_s (((3) << 19) | ((0) << 16) | ((4) << 12) | ((6) << 8) | ((0) << 5)), x3 2621 .purgem msr_s 2622 2623664: 2624 .org . - (664b-663b) + (662b-661b) 2625 .org . - (662b-661b) + (664b-663b) 2626 .previous 2627.endif 2628 2629// 0 "" 2 2630// 21 "./arch/arm64/include/asm/jump_label.h" 1 2631 1: nop 2632 .pushsection __jump_table, "aw" 2633 .align 3 2634 .long 1b - ., .L205 - . 2635 .quad gic_pmr_sync - . 2636 .popsection 2637 2638// 0 "" 2 2639#NO_APP 2640.L202: 2641 cbnz w0, .L189 2642 mov w0, w2 2643 str w2, [sp, 132] 2644 b .L206 2645 .p2align 2,,3 2646.L198: 2647 adrp x1, cpu_hwcaps 2648 ldr x1, [x1, #:lo12:cpu_hwcaps] 2649 tst w1, 16 2650 beq .L201 2651.L199: 2652#APP 2653// 271 "./arch/arm64/include/asm/uaccess.h" 1 2654 .if 1 == 1 2655661: 2656 nop 2657662: 2658.pushsection .altinstructions,"a" 2659 .word 661b - . 2660 .word 663f - . 2661 .hword 10 2662 .byte 662b-661b 2663 .byte 664f-663f 2664.popsection 2665.subsection 1 2666663: 2667 .inst (0xd500401f | ((0) << 16 | (4) << 5) | ((!!1) << 8)) 2668 2669664: 2670 .org . - (664b-663b) + (662b-661b) 2671 .org . - (662b-661b) + (664b-663b) 2672 .previous 2673.endif 2674 2675// 0 "" 2 2676#NO_APP 2677 b .L202 2678 .p2align 2,,3 2679.L197: 2680#APP 2681// 132 "./arch/arm64/include/asm/irqflags.h" 1 2682 dsb sy 2683// 0 "" 2 2684#NO_APP 2685 b .L194 2686 .p2align 2,,3 2687.L205: 2688#APP 2689// 132 "./arch/arm64/include/asm/irqflags.h" 1 2690 dsb sy 2691// 0 "" 2 2692#NO_APP 2693 b .L202 2694 .p2align 2,,3 2695.L446: 2696 stp x25, x26, [sp, 64] 2697 ubfx x24, x0, 10, 2 2698 tbnz x0, 24, .L252 2699 cmp x24, 2 2700 ubfx x0, x0, 16, 6 2701 cset w25, ne 2702 ands w0, w0, 32 2703 csel w25, w25, wzr, eq 2704 cbnz w25, .L252 2705 cmp w0, 0 2706 ccmp x24, 2, 0, ne 2707 beq .L448 2708 ldp x23, x24, [sp, 48] 2709 ldp x25, x26, [sp, 64] 2710 b .L189 2711 .p2align 2,,3 2712.L445: 2713 and w0, w21, 16777216 2714 stp x25, x26, [sp, 64] 2715 lsr w24, w21, 30 2716 stp x27, x28, [sp, 80] 2717 and w26, w21, 8388608 2718 ubfx x25, x21, 22, 1 2719 str w0, [sp, 108] 2720 mov w1, w21 2721 mov w0, 1 2722 cbnz x23, .L213 2723 bl aarch64_insn_decode_register 2724 mov w27, w0 2725 mov w1, w21 2726 mov w0, 0 2727 bl aarch64_insn_decode_register 2728 mov w28, w0 2729 mov w1, w21 2730 mov w0, w22 2731 bl aarch64_insn_decode_register 2732 mov w22, w0 2733 mov w1, w21 2734 mov w0, 7 2735 bl aarch64_insn_decode_immediate 2736 eor w1, w25, 1 2737 and w7, w24, 1 2738 tst w24, w1 2739 mov w5, w1 2740 bne .L320 2741 cmp w24, 3 2742 beq .L320 2743 cbz w26, .L215 2744 cmp w27, w28 2745 ccmp w27, w22, 4, ne 2746 ccmp w27, 31, 4, eq 2747 bne .L320 2748.L215: 2749 cmp w28, w22 2750 csel w2, w25, wzr, eq 2751 cbnz w2, .L320 2752 asr w4, w24, 1 2753 mov w6, 8 2754 add w4, w4, 2 2755 and w2, w27, 536870911 2756 cmp w2, 32 2757 lsl w6, w6, w4 2758 asr w1, w6, 3 2759 sxtw x24, w1 2760 beq .L216 2761 bhi .L217 2762 cmp w2, 30 2763 bhi .L449 2764 ldr x25, [x20, x2, lsl 3] 2765.L220: 2766 sbfx x21, x0, 0, 7 2767 ldr w0, [sp, 108] 2768 lsl x21, x21, x4 2769 cmp w0, 0 2770 add x0, x25, x21 2771 csel x25, x0, x25, ne 2772 cbz w5, .L223 2773 cmp w28, 31 2774 mov x2, 0 2775 beq .L224 2776 ldr x2, [x20, w28, sxtw 3] 2777.L224: 2778 str x2, [sp, 152] 2779 cmp w22, 31 2780 beq .L225 2781 ldr x23, [x20, w22, sxtw 3] 2782.L225: 2783 mov x0, x25 2784 str w1, [sp, 112] 2785 str x23, [sp, 160] 2786 bl rk_align_wr 2787 ldr w1, [sp, 112] 2788 cbnz w0, .L320 2789 ldr x2, [sp, 160] 2790 add x0, x24, x25 2791 bl rk_align_wr 2792 cbnz w0, .L320 2793.L227: 2794 cbz w26, .L435 2795 ldr w0, [sp, 108] 2796 cbnz w0, .L232 2797 add x25, x25, x21 2798.L232: 2799 cmp w27, 31 2800 beq .L450 2801 str x25, [x20, w27, sxtw 3] 2802 ldp x23, x24, [sp, 48] 2803 ldp x25, x26, [sp, 64] 2804 ldp x27, x28, [sp, 80] 2805 b .L211 2806.L460: 2807 cbnz x24, .L320 2808 tbz x25, 0, .L435 2809 .p2align 3,,7 2810.L320: 2811 mov w0, 1 2812 ldp x23, x24, [sp, 48] 2813 ldp x25, x26, [sp, 64] 2814 ldp x27, x28, [sp, 80] 2815 b .L182 2816 .p2align 2,,3 2817.L447: 2818#APP 2819// 21 "./arch/arm64/include/asm/jump_label.h" 1 2820 1: nop 2821 .pushsection __jump_table, "aw" 2822 .align 3 2823 .long 1b - ., .L339 - . 2824 .quad gic_nonsecure_priorities - . 2825 .popsection 2826 2827// 0 "" 2 2828#NO_APP 2829 mov x1, 96 2830.L204: 2831#APP 2832// 56 "./arch/arm64/include/asm/irqflags.h" 1 2833 .if 1 == 1 2834661: 2835 msr daifset, #2 // arch_local_irq_disable 2836662: 2837.pushsection .altinstructions,"a" 2838 .word 661b - . 2839 .word 663f - . 2840 .hword 42 2841 .byte 662b-661b 2842 .byte 664f-663f 2843.popsection 2844.subsection 1 2845663: 2846 .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 2847 .equ .L__reg_num_x\num, \num 2848 .endr 2849 .equ .L__reg_num_xzr, 31 2850 .macro msr_s, sreg, rt 2851.inst (0xd5000000|(\sreg)|(.L__reg_num_\rt)) 2852 .endm 2853 msr_s (((3) << 19) | ((0) << 16) | ((4) << 12) | ((6) << 8) | ((0) << 5)), x1 2854 .purgem msr_s 2855 2856664: 2857 .org . - (664b-663b) + (662b-661b) 2858 .org . - (662b-661b) + (664b-663b) 2859 .previous 2860.endif 2861 2862// 0 "" 2 2863#NO_APP 2864 b .L203 2865 .p2align 2,,3 2866.L444: 2867#APP 2868// 21 "./arch/arm64/include/asm/jump_label.h" 1 2869 1: nop 2870 .pushsection __jump_table, "aw" 2871 .align 3 2872 .long 1b - ., .L338 - . 2873 .quad gic_nonsecure_priorities - . 2874 .popsection 2875 2876// 0 "" 2 2877#NO_APP 2878 mov x2, 96 2879.L196: 2880#APP 2881// 56 "./arch/arm64/include/asm/irqflags.h" 1 2882 .if 1 == 1 2883661: 2884 msr daifset, #2 // arch_local_irq_disable 2885662: 2886.pushsection .altinstructions,"a" 2887 .word 661b - . 2888 .word 663f - . 2889 .hword 42 2890 .byte 662b-661b 2891 .byte 664f-663f 2892.popsection 2893.subsection 1 2894663: 2895 .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 2896 .equ .L__reg_num_x\num, \num 2897 .endr 2898 .equ .L__reg_num_xzr, 31 2899 .macro msr_s, sreg, rt 2900.inst (0xd5000000|(\sreg)|(.L__reg_num_\rt)) 2901 .endm 2902 msr_s (((3) << 19) | ((0) << 16) | ((4) << 12) | ((6) << 8) | ((0) << 5)), x2 2903 .purgem msr_s 2904 2905664: 2906 .org . - (664b-663b) + (662b-661b) 2907 .org . - (662b-661b) + (664b-663b) 2908 .previous 2909.endif 2910 2911// 0 "" 2 2912#NO_APP 2913 b .L195 2914 .p2align 2,,3 2915.L213: 2916 bl aarch64_insn_decode_register 2917 mov w27, w0 2918 mov w1, w21 2919 mov w0, 0 2920 bl aarch64_insn_decode_register 2921 mov w23, w0 2922 mov w1, w21 2923 mov w0, w22 2924 bl aarch64_insn_decode_register 2925 mov w22, w0 2926 mov w1, w21 2927 mov w0, 7 2928 bl aarch64_insn_decode_immediate 2929 cmp w24, 3 2930 beq .L320 2931 cmp w23, w22 2932 csel w1, w25, wzr, eq 2933 cbnz w1, .L320 2934 add w24, w24, 2 2935 mov w3, 8 2936 and w1, w27, 536870911 2937 lsl w3, w3, w24 2938 cmp w1, 32 2939 asr w3, w3, 3 2940 sxtw x2, w3 2941 str x2, [sp, 112] 2942 beq .L235 2943 bhi .L236 2944 cmp w1, 30 2945 bhi .L451 2946 ldr x28, [x20, x1, lsl 3] 2947.L239: 2948 sbfx x0, x0, 0, 7 2949 ldr w1, [sp, 108] 2950 lsl x21, x0, x24 2951 add x0, x28, x21 2952 cmp w1, 0 2953 csel x28, x0, x28, ne 2954 cbnz w25, .L242 2955 mov w1, 0 2956 mov w0, w23 2957 str w3, [sp, 120] 2958 bl get_data 2959 mov x5, x0 2960 mov w1, 0 2961 mov w0, w22 2962 str x5, [sp, 136] 2963 bl get_data 2964 str x0, [sp, 152] 2965 ldr w3, [sp, 120] 2966 cmp w24, 4 2967 beq .L452 2968 mov x2, x5 2969 mov w1, w3 2970 mov x0, x28 2971 str w3, [sp, 120] 2972 bl rk_align_wr 2973 cbnz w0, .L320 2974 ldr w3, [sp, 120] 2975 ldr x2, [sp, 152] 2976 mov w1, w3 2977 ldr x0, [sp, 112] 2978 add x0, x0, x28 2979 bl rk_align_wr 2980 cbnz w0, .L320 2981.L245: 2982 cbz w26, .L435 2983 ldr w0, [sp, 108] 2984 cbnz w0, .L250 2985 add x28, x28, x21 2986.L250: 2987 cmp w27, 31 2988 beq .L453 2989 str x28, [x20, w27, sxtw 3] 2990 ldp x23, x24, [sp, 48] 2991 ldp x25, x26, [sp, 64] 2992 ldp x27, x28, [sp, 80] 2993 b .L211 2994 .p2align 2,,3 2995.L252: 2996 and w22, w21, 33553408 2997 stp x27, x28, [sp, 80] 2998 and w22, w22, -16775169 2999 lsr w28, w21, 30 3000 lsr w25, w21, 22 3001 cmp w22, 1024 3002 eor x2, x21, 2048 3003 cbnz x23, .L254 3004 ubfx x2, x2, 11, 1 3005 mov w1, w21 3006 csel w2, w2, wzr, eq 3007 mov w0, 1 3008 str w2, [sp, 108] 3009 bl aarch64_insn_decode_register 3010 mov w27, w0 3011 mov w1, w21 3012 mov w0, 0 3013 bl aarch64_insn_decode_register 3014 mov w26, w0 3015 mov w1, w21 3016 tbnz x21, 24, .L256 3017 mov w0, 6 3018 bl aarch64_insn_decode_immediate 3019 sbfx x21, x0, 0, 9 3020.L257: 3021 tbnz x25, 1, .L258 3022 mvn w0, w25 3023 cmp w28, 3 3024 mov w25, 64 3025 mov w1, 32 3026 and w0, w0, 1 3027 csel w25, w25, w1, eq 3028 mov w4, 0 3029.L259: 3030 cmp w27, w26 3031 ccmp w27, 31, 4, eq 3032 bne .L320 3033 and w1, w27, 536870911 3034 cmp w1, 32 3035 beq .L263 3036 bhi .L264 3037 cmp w1, 30 3038 bhi .L454 3039 ldr x24, [x20, x1, lsl 3] 3040.L267: 3041 mov w1, 8 3042 ldr w2, [sp, 108] 3043 lsl w28, w1, w28 3044 asr w1, w28, 3 3045 cmp w2, 0 3046 add x2, x24, x21 3047 csel x24, x2, x24, eq 3048 cbz w0, .L270 3049 cmp w26, 31 3050 beq .L271 3051 ldr x23, [x20, w26, sxtw 3] 3052.L271: 3053 mov x2, x23 3054 mov x0, x24 3055 str x23, [sp, 160] 3056 bl rk_align_wr 3057 cbnz w0, .L320 3058.L272: 3059 cmp w22, 1024 3060 beq .L455 3061.L435: 3062 ldp x23, x24, [sp, 48] 3063 ldp x25, x26, [sp, 64] 3064 ldp x27, x28, [sp, 80] 3065 b .L211 3066 .p2align 2,,3 3067.L339: 3068 mov x1, 160 3069 b .L204 3070 .p2align 2,,3 3071.L338: 3072 mov x2, 160 3073 b .L196 3074.L209: 3075 sxtw x2, w21 3076 mov x0, x22 3077 mov w1, 0 3078 bl __memset_io 3079 b .L211 3080.L451: 3081 cmp w1, 31 3082 bne .L437 3083 ldr x28, [x20, 248] 3084 b .L239 3085.L236: 3086 cmp w1, 33 3087 bne .L437 3088 ldr x28, [x20, 264] 3089 b .L239 3090.L254: 3091 ubfx x2, x2, 11, 1 3092 lsl w0, w25, 1 3093 and w0, w0, 4 3094 csel w24, w2, wzr, eq 3095 mov w1, w21 3096 orr w23, w0, w28 3097 mov w0, 1 3098 bl aarch64_insn_decode_register 3099 mov w1, w21 3100 mov w26, w0 3101 mov w0, 0 3102 bl aarch64_insn_decode_register 3103 cmp w23, 4 3104 mov w27, w0 3105 bhi .L320 3106 mov w1, w21 3107 tbnz x21, 24, .L281 3108 mov w0, 6 3109 bl aarch64_insn_decode_immediate 3110 sbfx x28, x0, 0, 9 3111.L282: 3112 and w0, w26, 536870911 3113 mov w1, 8 3114 cmp w0, 32 3115 lsl w3, w1, w23 3116 beq .L283 3117 bhi .L284 3118 cmp w0, 30 3119 bhi .L456 3120 ldr x21, [x20, x0, lsl 3] 3121.L287: 3122 cmp w24, 0 3123 add x0, x21, x28 3124 csel x21, x0, x21, eq 3125 tbnz x25, 0, .L290 3126 mov w0, w27 3127 mov w1, 0 3128 bl get_data 3129 str x0, [sp, 152] 3130 mov x4, x0 3131 cmp w23, 4 3132 beq .L457 3133 mov x2, x0 3134 asr w1, w3, 3 3135 mov x0, x21 3136 bl rk_align_wr 3137 cbnz w0, .L320 3138.L293: 3139 cmp w22, 1024 3140 bne .L435 3141 cbz w24, .L298 3142 add x21, x21, x28 3143.L298: 3144 cmp w26, 31 3145 beq .L458 3146 str x21, [x20, w26, sxtw 3] 3147 ldp x23, x24, [sp, 48] 3148 ldp x25, x26, [sp, 64] 3149 ldp x27, x28, [sp, 80] 3150 b .L211 3151 .p2align 2,,3 3152.L448: 3153 stp x27, x28, [sp, 80] 3154 ubfx x1, x21, 13, 1 3155 lsr w26, w21, 30 3156 lsr w28, w21, 22 3157 ubfx x0, x21, 12, 1 3158 cmp w1, 0 3159 cbnz x23, .L300 3160 mov w1, 64 3161 mov w27, 32 3162 csel w27, w27, w1, eq 3163 cmp w0, 0 3164 csel w0, w26, wzr, ne 3165 mov w1, w21 3166 str w0, [sp, 108] 3167 mov w0, 1 3168 bl aarch64_insn_decode_register 3169 mov w24, w0 3170 mov w1, w21 3171 mov w0, 0 3172 bl aarch64_insn_decode_register 3173 mov w1, w21 3174 mov w21, w0 3175 mov w0, w22 3176 bl aarch64_insn_decode_register 3177 mov w1, w0 3178 tbnz x28, 1, .L303 3179 mvn w25, w28 3180 and w25, w25, 1 3181.L304: 3182 cmp w24, w21 3183 ccmp w24, 31, 4, eq 3184 bne .L320 3185 cmp w1, 31 3186 mov x0, 0 3187 beq .L308 3188 ldr x0, [x20, w1, sxtw 3] 3189.L308: 3190 cmp w27, 32 3191 and x1, x0, 4294967295 3192 and w24, w24, 536870911 3193 csel x0, x1, x0, eq 3194 ldrb w1, [sp, 108] 3195 cmp w24, 32 3196 lsl x0, x0, x1 3197 beq .L310 3198 bhi .L311 3199 cmp w24, 30 3200 bhi .L459 3201 ldr x3, [x20, x24, lsl 3] 3202.L314: 3203 mov w1, 8 3204 lsl w1, w1, w26 3205 add x0, x0, x3 3206 asr w1, w1, 3 3207 cbz w25, .L316 3208 cmp w21, 31 3209 beq .L317 3210 ldr x23, [x20, w21, sxtw 3] 3211.L317: 3212 mov x2, x23 3213 str x23, [sp, 160] 3214 bl rk_align_wr 3215 cbz w0, .L435 3216 b .L320 3217 .p2align 2,,3 3218.L449: 3219 cmp w2, 31 3220 bne .L436 3221 ldr x25, [x20, 248] 3222 b .L220 3223.L217: 3224 cmp w2, 33 3225 bne .L436 3226 ldr x25, [x20, 264] 3227 b .L220 3228.L456: 3229 cmp w0, 31 3230 bne .L439 3231 ldr x21, [x20, 248] 3232 b .L287 3233.L284: 3234 cmp w0, 33 3235 bne .L439 3236 ldr x21, [x20, 264] 3237 b .L287 3238.L437: 3239 mov x28, 0 3240 b .L239 3241.L258: 3242 cmp w28, 3 3243 beq .L460 3244 and w25, w25, 1 3245 cmp w28, 2 3246 beq .L461 3247 cmp w25, 0 3248 mov w0, 32 3249 mov w25, 64 3250 mov w4, 1 3251 csel w25, w25, w0, eq 3252 mov w0, 0 3253 b .L259 3254.L256: 3255 mov w0, 5 3256 bl aarch64_insn_decode_immediate 3257 lsl x21, x0, x28 3258 b .L257 3259.L242: 3260 add x2, sp, 136 3261 cmp w24, 4 3262 beq .L462 3263 mov w1, w3 3264 mov x0, x28 3265 str w3, [sp, 120] 3266 bl rk_align_rd 3267 cbnz w0, .L320 3268 ldr w3, [sp, 120] 3269 add x2, sp, 152 3270 ldr x0, [sp, 112] 3271 mov w1, w3 3272 add x0, x0, x28 3273 bl rk_align_rd 3274 cbnz w0, .L320 3275 str xzr, [sp, 144] 3276 str xzr, [sp, 160] 3277.L248: 3278 ldr x2, [sp, 136] 3279 mov w0, w23 3280 mov w1, 0 3281 bl set_data 3282 ldr x2, [sp, 144] 3283 mov w0, w23 3284 mov w1, 1 3285 bl set_data 3286 ldr x2, [sp, 152] 3287 mov w0, w22 3288 mov w1, 0 3289 bl set_data 3290 ldr x2, [sp, 160] 3291 mov w0, w22 3292 mov w1, 1 3293 bl set_data 3294 b .L245 3295.L300: 3296 mov w1, 64 3297 lsl w23, w28, 1 3298 mov w25, 32 3299 csel w25, w25, w1, eq 3300 cmp w0, 0 3301 and w23, w23, 4 3302 orr w23, w23, w26 3303 mov w1, w21 3304 csel w26, w23, wzr, ne 3305 mov w0, 1 3306 bl aarch64_insn_decode_register 3307 mov w24, w0 3308 mov w1, w21 3309 mov w0, 0 3310 bl aarch64_insn_decode_register 3311 mov w27, w0 3312 mov w1, w21 3313 mov w0, w22 3314 bl aarch64_insn_decode_register 3315 mov w1, w0 3316 tbz x28, 1, .L320 3317 cmp w24, w27 3318 ccmp w24, 31, 4, eq 3319 bne .L320 3320 cmp w0, 31 3321 mov x0, 0 3322 beq .L321 3323 ldr x0, [x20, w1, sxtw 3] 3324.L321: 3325 cmp w25, 32 3326 and x1, x0, 4294967295 3327 and w24, w24, 536870911 3328 csel x0, x1, x0, eq 3329 cmp w24, 32 3330 lsl x0, x0, x26 3331 beq .L323 3332 bhi .L324 3333 cmp w24, 30 3334 bhi .L463 3335 ldr x21, [x20, x24, lsl 3] 3336.L327: 3337 mov w22, 8 3338 add x21, x0, x21 3339 lsl w4, w22, w23 3340 tbnz x28, 0, .L329 3341 mov w0, w27 3342 mov w1, 0 3343 bl get_data 3344 str x0, [sp, 152] 3345 mov x3, x0 3346 cmp w23, 4 3347 beq .L464 3348 mov x2, x0 3349 asr w1, w4, 3 3350 mov x0, x21 3351 bl rk_align_wr 3352 cbz w0, .L435 3353 b .L320 3354 .p2align 2,,3 3355.L436: 3356 mov x25, 0 3357 b .L220 3358.L454: 3359 cmp w1, 31 3360 bne .L438 3361 ldr x24, [x20, 248] 3362 b .L267 3363.L264: 3364 cmp w1, 33 3365 bne .L438 3366 ldr x24, [x20, 264] 3367 b .L267 3368.L439: 3369 mov x21, 0 3370 b .L287 3371.L281: 3372 mov w0, 5 3373 bl aarch64_insn_decode_immediate 3374 lsl x28, x0, x23 3375 b .L282 3376.L290: 3377 cmp w23, 4 3378 beq .L465 3379 asr w1, w3, 3 3380 add x2, sp, 152 3381 mov x0, x21 3382 bl rk_align_rd 3383 cbnz w0, .L320 3384 str xzr, [sp, 160] 3385.L296: 3386 ldr x2, [sp, 152] 3387 mov w0, w27 3388 mov w1, 0 3389 bl set_data 3390 ldr x2, [sp, 160] 3391 mov w0, w27 3392 mov w1, 1 3393 bl set_data 3394 b .L293 3395.L223: 3396 add x2, sp, 152 3397 mov x0, x25 3398 str w1, [sp, 112] 3399 stp w6, w7, [sp, 120] 3400 bl rk_align_rd 3401 cbnz w0, .L320 3402 ldr w1, [sp, 112] 3403 add x0, x24, x25 3404 add x2, sp, 160 3405 bl rk_align_rd 3406 cbnz w0, .L320 3407 ldr w7, [sp, 124] 3408 cbz w7, .L228 3409 ldp x2, x1, [sp, 152] 3410 mov w0, 64 3411 ldr w6, [sp, 120] 3412 sub w6, w0, w6 3413 lsl x2, x2, x6 3414 lsl x0, x1, x6 3415 asr x1, x2, x6 3416 asr x6, x0, x6 3417 stp x1, x6, [sp, 152] 3418.L228: 3419 cmp w28, 31 3420 beq .L229 3421 ldr x0, [sp, 152] 3422 str x0, [x20, w28, sxtw 3] 3423.L229: 3424 cmp w22, 31 3425 beq .L227 3426 ldr x0, [sp, 160] 3427 str x0, [x20, w22, sxtw 3] 3428 b .L227 3429.L459: 3430 cmp w24, 31 3431 bne .L440 3432 ldr x3, [x20, 248] 3433 b .L314 3434.L311: 3435 cmp w24, 33 3436 bne .L440 3437 ldr x3, [x20, 264] 3438 b .L314 3439.L303: 3440 cmp w26, 3 3441 beq .L466 3442 cmp w26, 2 3443 bne .L304 3444 tbz x28, 0, .L304 3445 b .L320 3446 .p2align 2,,3 3447.L438: 3448 mov x24, 0 3449 b .L267 3450.L235: 3451 ldr x28, [x20, 256] 3452 b .L239 3453.L463: 3454 cmp w24, 31 3455 bne .L441 3456 ldr x21, [x20, 248] 3457 b .L327 3458.L324: 3459 cmp w24, 33 3460 bne .L441 3461 ldr x21, [x20, 264] 3462 b .L327 3463.L462: 3464 mov x0, x28 3465 mov w1, 8 3466 bl rk_align_rd 3467 cbnz w0, .L320 3468 add x2, sp, 144 3469 add x0, x28, 8 3470 mov w1, 8 3471 bl rk_align_rd 3472 cbnz w0, .L320 3473 add x2, sp, 152 3474 add x0, x28, 16 3475 mov w1, 8 3476 bl rk_align_rd 3477 cbnz w0, .L320 3478 add x2, sp, 160 3479 add x0, x28, 24 3480 mov w1, 8 3481 bl rk_align_rd 3482 cbz w0, .L248 3483 b .L320 3484 .p2align 2,,3 3485.L452: 3486 mov w1, 1 3487 mov w0, w23 3488 bl get_data 3489 mov x2, x0 3490 mov w1, 1 3491 mov w0, w22 3492 str x2, [sp, 144] 3493 bl get_data 3494 mov x3, x0 3495 mov x2, x5 3496 mov x0, x28 3497 mov w1, 8 3498 str x3, [sp, 160] 3499 bl rk_align_wr 3500 cbnz w0, .L320 3501 ldr x2, [sp, 144] 3502 add x0, x28, 8 3503 mov w1, 8 3504 bl rk_align_wr 3505 cbnz w0, .L320 3506 ldr x2, [sp, 152] 3507 add x0, x28, 16 3508 mov w1, 8 3509 bl rk_align_wr 3510 cbnz w0, .L320 3511 ldr x2, [sp, 160] 3512 add x0, x28, 24 3513 mov w1, 8 3514 bl rk_align_wr 3515 cbz w0, .L245 3516 b .L320 3517 .p2align 2,,3 3518.L216: 3519 ldr x25, [x20, 256] 3520 b .L220 3521.L283: 3522 ldr x21, [x20, 256] 3523 b .L287 3524.L440: 3525 mov x3, 0 3526 b .L314 3527.L270: 3528 add x2, sp, 160 3529 mov x0, x24 3530 str w4, [sp, 112] 3531 bl rk_align_rd 3532 cbnz w0, .L320 3533 ldr w4, [sp, 112] 3534 cbz w4, .L273 3535 sub w28, w28, #1 3536 mov w0, 31 3537 ldr x1, [sp, 160] 3538 sub w2, w0, w28, sxtb 3539 mov w0, 63 3540 cmp w25, 32 3541 sub w28, w0, w28, sxtb 3542 lsl w0, w1, w2 3543 asr w0, w0, w2 3544 sxtw x0, w0 3545 lsl x1, x1, x28 3546 asr x1, x1, x28 3547 csel x0, x0, x1, eq 3548 str x0, [sp, 160] 3549.L273: 3550 cmp w26, 31 3551 beq .L272 3552 ldr x0, [sp, 160] 3553 str x0, [x20, w26, sxtw 3] 3554 b .L272 3555.L465: 3556 add x2, sp, 152 3557 mov x0, x21 3558 mov w1, 8 3559 bl rk_align_rd 3560 cbnz w0, .L320 3561 add x2, sp, 160 3562 add x0, x21, 8 3563 mov w1, 8 3564 bl rk_align_rd 3565 cbz w0, .L296 3566 b .L320 3567.L457: 3568 mov w1, 1 3569 mov w0, w27 3570 bl get_data 3571 mov x3, x0 3572 mov x2, x4 3573 mov x0, x21 3574 mov w1, 8 3575 str x3, [sp, 160] 3576 bl rk_align_wr 3577 cbnz w0, .L320 3578 ldr x2, [sp, 160] 3579 add x0, x21, 8 3580 mov w1, 8 3581 bl rk_align_wr 3582 cbz w0, .L293 3583 b .L320 3584.L461: 3585 cbnz w25, .L320 3586 mov w25, 64 3587 mov w4, 1 3588 mov w0, 0 3589 b .L259 3590.L329: 3591 cmp w23, 4 3592 beq .L467 3593 asr w1, w4, 3 3594 mov x0, x21 3595 add x2, sp, 152 3596 bl rk_align_rd 3597 cbnz w0, .L320 3598 str xzr, [sp, 160] 3599.L334: 3600 ldr x2, [sp, 152] 3601 mov w0, w27 3602 mov w1, 0 3603 bl set_data 3604 ldr x2, [sp, 160] 3605 mov w0, w27 3606 mov w1, 1 3607 bl set_data 3608 ldp x23, x24, [sp, 48] 3609 ldp x25, x26, [sp, 64] 3610 ldp x27, x28, [sp, 80] 3611 b .L211 3612.L441: 3613 mov x21, 0 3614 b .L327 3615.L455: 3616 ldr w0, [sp, 108] 3617 cbz w0, .L277 3618 add x24, x24, x21 3619.L277: 3620 cmp w27, 31 3621 beq .L468 3622 str x24, [x20, w27, sxtw 3] 3623 ldp x23, x24, [sp, 48] 3624 ldp x25, x26, [sp, 64] 3625 ldp x27, x28, [sp, 80] 3626 b .L211 3627.L316: 3628 add x2, sp, 160 3629 bl rk_align_rd 3630 cbz w0, .L435 3631 b .L320 3632.L263: 3633 ldr x24, [x20, 256] 3634 b .L267 3635.L466: 3636 tbz x28, 0, .L435 3637 b .L320 3638.L442: 3639 stp x23, x24, [sp, 48] 3640 stp x25, x26, [sp, 64] 3641 stp x27, x28, [sp, 80] 3642 bl __stack_chk_fail 3643.L453: 3644 str x28, [x20, 248] 3645 ldp x23, x24, [sp, 48] 3646 ldp x25, x26, [sp, 64] 3647 ldp x27, x28, [sp, 80] 3648 b .L211 3649.L458: 3650 str x21, [x20, 248] 3651 ldp x23, x24, [sp, 48] 3652 ldp x25, x26, [sp, 64] 3653 ldp x27, x28, [sp, 80] 3654 b .L211 3655.L310: 3656 ldr x3, [x20, 256] 3657 b .L314 3658.L450: 3659 str x25, [x20, 248] 3660 ldp x23, x24, [sp, 48] 3661 ldp x25, x26, [sp, 64] 3662 ldp x27, x28, [sp, 80] 3663 b .L211 3664.L323: 3665 ldr x21, [x20, 256] 3666 b .L327 3667.L467: 3668 add x2, sp, 152 3669 mov w1, w22 3670 mov x0, x21 3671 bl rk_align_rd 3672 cbnz w0, .L320 3673 mov w1, w22 3674 add x0, x21, 8 3675 add x2, sp, 160 3676 bl rk_align_rd 3677 cbz w0, .L334 3678 b .L320 3679.L464: 3680 mov w1, 1 3681 mov w0, w27 3682 bl get_data 3683 mov x4, x0 3684 mov x2, x3 3685 mov w1, w22 3686 mov x0, x21 3687 str x4, [sp, 160] 3688 bl rk_align_wr 3689 cbnz w0, .L320 3690 ldr x2, [sp, 160] 3691 mov w1, w22 3692 add x0, x21, 8 3693 bl rk_align_wr 3694 cbz w0, .L435 3695 b .L320 3696.L468: 3697 str x24, [x20, 248] 3698 ldp x23, x24, [sp, 48] 3699 ldp x25, x26, [sp, 64] 3700 ldp x27, x28, [sp, 80] 3701 b .L211 3702 .size alignment_fixup_helper, .-alignment_fixup_helper 3703 .ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.1) 9.4.0" 3704 .section .note.GNU-stack,"",@progbits 3705 .section .note.gnu.property,"a" 3706 .align 3 3707 .word 4 3708 .word 16 3709 .word 5 3710 .string "GNU" 3711 .word 3221225472 3712 .word 4 3713 .word 2 3714 .align 3 3715