1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Based on arch/arm/mm/fault.c
4 *
5 * Copyright (C) 1995 Linus Torvalds
6 * Copyright (C) 1995-2004 Russell King
7 * Copyright (C) 2012 ARM Ltd.
8 */
9
10 #include <linux/acpi.h>
11 #include <linux/bitfield.h>
12 #include <linux/extable.h>
13 #include <linux/kfence.h>
14 #include <linux/signal.h>
15 #include <linux/mm.h>
16 #include <linux/hardirq.h>
17 #include <linux/init.h>
18 #include <linux/kasan.h>
19 #include <linux/kprobes.h>
20 #include <linux/uaccess.h>
21 #include <linux/page-flags.h>
22 #include <linux/sched/signal.h>
23 #include <linux/sched/debug.h>
24 #include <linux/highmem.h>
25 #include <linux/perf_event.h>
26 #include <linux/preempt.h>
27 #include <linux/hugetlb.h>
28
29 #include <asm/acpi.h>
30 #include <asm/bug.h>
31 #include <asm/cmpxchg.h>
32 #include <asm/cpufeature.h>
33 #include <asm/exception.h>
34 #include <asm/daifflags.h>
35 #include <asm/debug-monitors.h>
36 #include <asm/esr.h>
37 #include <asm/kprobes.h>
38 #include <asm/mte.h>
39 #include <asm/processor.h>
40 #include <asm/sysreg.h>
41 #include <asm/system_misc.h>
42 #include <asm/tlbflush.h>
43 #include <asm/traps.h>
44
45 #include <trace/hooks/fault.h>
46
47 struct fault_info {
48 int (*fn)(unsigned long far, unsigned int esr,
49 struct pt_regs *regs);
50 int sig;
51 int code;
52 const char *name;
53 };
54
55 static const struct fault_info fault_info[];
56 static struct fault_info debug_fault_info[];
57
esr_to_fault_info(unsigned int esr)58 static inline const struct fault_info *esr_to_fault_info(unsigned int esr)
59 {
60 return fault_info + (esr & ESR_ELx_FSC);
61 }
62
esr_to_debug_fault_info(unsigned int esr)63 static inline const struct fault_info *esr_to_debug_fault_info(unsigned int esr)
64 {
65 return debug_fault_info + DBG_ESR_EVT(esr);
66 }
67
data_abort_decode(unsigned int esr)68 static void data_abort_decode(unsigned int esr)
69 {
70 pr_alert("Data abort info:\n");
71
72 if (esr & ESR_ELx_ISV) {
73 pr_alert(" Access size = %u byte(s)\n",
74 1U << ((esr & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT));
75 pr_alert(" SSE = %lu, SRT = %lu\n",
76 (esr & ESR_ELx_SSE) >> ESR_ELx_SSE_SHIFT,
77 (esr & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT);
78 pr_alert(" SF = %lu, AR = %lu\n",
79 (esr & ESR_ELx_SF) >> ESR_ELx_SF_SHIFT,
80 (esr & ESR_ELx_AR) >> ESR_ELx_AR_SHIFT);
81 } else {
82 pr_alert(" ISV = 0, ISS = 0x%08lx\n", esr & ESR_ELx_ISS_MASK);
83 }
84
85 pr_alert(" CM = %lu, WnR = %lu\n",
86 (esr & ESR_ELx_CM) >> ESR_ELx_CM_SHIFT,
87 (esr & ESR_ELx_WNR) >> ESR_ELx_WNR_SHIFT);
88 }
89
mem_abort_decode(unsigned int esr)90 static void mem_abort_decode(unsigned int esr)
91 {
92 pr_alert("Mem abort info:\n");
93
94 pr_alert(" ESR = 0x%08x\n", esr);
95 pr_alert(" EC = 0x%02lx: %s, IL = %u bits\n",
96 ESR_ELx_EC(esr), esr_get_class_string(esr),
97 (esr & ESR_ELx_IL) ? 32 : 16);
98 pr_alert(" SET = %lu, FnV = %lu\n",
99 (esr & ESR_ELx_SET_MASK) >> ESR_ELx_SET_SHIFT,
100 (esr & ESR_ELx_FnV) >> ESR_ELx_FnV_SHIFT);
101 pr_alert(" EA = %lu, S1PTW = %lu\n",
102 (esr & ESR_ELx_EA) >> ESR_ELx_EA_SHIFT,
103 (esr & ESR_ELx_S1PTW) >> ESR_ELx_S1PTW_SHIFT);
104
105 if (esr_is_data_abort(esr))
106 data_abort_decode(esr);
107 }
108
mm_to_pgd_phys(struct mm_struct * mm)109 static inline unsigned long mm_to_pgd_phys(struct mm_struct *mm)
110 {
111 /* Either init_pg_dir or swapper_pg_dir */
112 if (mm == &init_mm)
113 return __pa_symbol(mm->pgd);
114
115 return (unsigned long)virt_to_phys(mm->pgd);
116 }
117
118 /*
119 * Dump out the page tables associated with 'addr' in the currently active mm.
120 */
show_pte(unsigned long addr)121 static void show_pte(unsigned long addr)
122 {
123 struct mm_struct *mm;
124 pgd_t *pgdp;
125 pgd_t pgd;
126
127 if (is_ttbr0_addr(addr)) {
128 /* TTBR0 */
129 mm = current->active_mm;
130 if (mm == &init_mm) {
131 pr_alert("[%016lx] user address but active_mm is swapper\n",
132 addr);
133 return;
134 }
135 } else if (is_ttbr1_addr(addr)) {
136 /* TTBR1 */
137 mm = &init_mm;
138 } else {
139 pr_alert("[%016lx] address between user and kernel address ranges\n",
140 addr);
141 return;
142 }
143
144 pr_alert("%s pgtable: %luk pages, %llu-bit VAs, pgdp=%016lx\n",
145 mm == &init_mm ? "swapper" : "user", PAGE_SIZE / SZ_1K,
146 vabits_actual, mm_to_pgd_phys(mm));
147 pgdp = pgd_offset(mm, addr);
148 pgd = READ_ONCE(*pgdp);
149 pr_alert("[%016lx] pgd=%016llx", addr, pgd_val(pgd));
150
151 do {
152 p4d_t *p4dp, p4d;
153 pud_t *pudp, pud;
154 pmd_t *pmdp, pmd;
155 pte_t *ptep, pte;
156
157 if (pgd_none(pgd) || pgd_bad(pgd))
158 break;
159
160 p4dp = p4d_offset(pgdp, addr);
161 p4d = READ_ONCE(*p4dp);
162 pr_cont(", p4d=%016llx", p4d_val(p4d));
163 if (p4d_none(p4d) || p4d_bad(p4d))
164 break;
165
166 pudp = pud_offset(p4dp, addr);
167 pud = READ_ONCE(*pudp);
168 pr_cont(", pud=%016llx", pud_val(pud));
169 if (pud_none(pud) || pud_bad(pud))
170 break;
171
172 pmdp = pmd_offset(pudp, addr);
173 pmd = READ_ONCE(*pmdp);
174 pr_cont(", pmd=%016llx", pmd_val(pmd));
175 if (pmd_none(pmd) || pmd_bad(pmd))
176 break;
177
178 ptep = pte_offset_map(pmdp, addr);
179 pte = READ_ONCE(*ptep);
180 pr_cont(", pte=%016llx", pte_val(pte));
181 pte_unmap(ptep);
182 } while(0);
183
184 pr_cont("\n");
185 }
186
187 /*
188 * This function sets the access flags (dirty, accessed), as well as write
189 * permission, and only to a more permissive setting.
190 *
191 * It needs to cope with hardware update of the accessed/dirty state by other
192 * agents in the system and can safely skip the __sync_icache_dcache() call as,
193 * like set_pte_at(), the PTE is never changed from no-exec to exec here.
194 *
195 * Returns whether or not the PTE actually changed.
196 */
ptep_set_access_flags(struct vm_area_struct * vma,unsigned long address,pte_t * ptep,pte_t entry,int dirty)197 int ptep_set_access_flags(struct vm_area_struct *vma,
198 unsigned long address, pte_t *ptep,
199 pte_t entry, int dirty)
200 {
201 pteval_t old_pteval, pteval;
202 pte_t pte = READ_ONCE(*ptep);
203
204 if (pte_same(pte, entry))
205 return 0;
206
207 /* only preserve the access flags and write permission */
208 pte_val(entry) &= PTE_RDONLY | PTE_AF | PTE_WRITE | PTE_DIRTY;
209
210 /*
211 * Setting the flags must be done atomically to avoid racing with the
212 * hardware update of the access/dirty state. The PTE_RDONLY bit must
213 * be set to the most permissive (lowest value) of *ptep and entry
214 * (calculated as: a & b == ~(~a | ~b)).
215 */
216 pte_val(entry) ^= PTE_RDONLY;
217 pteval = pte_val(pte);
218 do {
219 old_pteval = pteval;
220 pteval ^= PTE_RDONLY;
221 pteval |= pte_val(entry);
222 pteval ^= PTE_RDONLY;
223 pteval = cmpxchg_relaxed(&pte_val(*ptep), old_pteval, pteval);
224 } while (pteval != old_pteval);
225
226 /* Invalidate a stale read-only entry */
227 if (dirty)
228 flush_tlb_page(vma, address);
229 return 1;
230 }
231
is_el1_instruction_abort(unsigned int esr)232 static bool is_el1_instruction_abort(unsigned int esr)
233 {
234 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_CUR;
235 }
236
is_el1_permission_fault(unsigned long addr,unsigned int esr,struct pt_regs * regs)237 static inline bool is_el1_permission_fault(unsigned long addr, unsigned int esr,
238 struct pt_regs *regs)
239 {
240 unsigned int ec = ESR_ELx_EC(esr);
241 unsigned int fsc_type = esr & ESR_ELx_FSC_TYPE;
242
243 if (ec != ESR_ELx_EC_DABT_CUR && ec != ESR_ELx_EC_IABT_CUR)
244 return false;
245
246 if (fsc_type == ESR_ELx_FSC_PERM)
247 return true;
248
249 if (is_ttbr0_addr(addr) && system_uses_ttbr0_pan())
250 return fsc_type == ESR_ELx_FSC_FAULT &&
251 (regs->pstate & PSR_PAN_BIT);
252
253 return false;
254 }
255
is_spurious_el1_translation_fault(unsigned long addr,unsigned int esr,struct pt_regs * regs)256 static bool __kprobes is_spurious_el1_translation_fault(unsigned long addr,
257 unsigned int esr,
258 struct pt_regs *regs)
259 {
260 unsigned long flags;
261 u64 par, dfsc;
262
263 if (ESR_ELx_EC(esr) != ESR_ELx_EC_DABT_CUR ||
264 (esr & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT)
265 return false;
266
267 local_irq_save(flags);
268 asm volatile("at s1e1r, %0" :: "r" (addr));
269 isb();
270 par = read_sysreg_par();
271 local_irq_restore(flags);
272
273 /*
274 * If we now have a valid translation, treat the translation fault as
275 * spurious.
276 */
277 if (!(par & SYS_PAR_EL1_F))
278 return true;
279
280 /*
281 * If we got a different type of fault from the AT instruction,
282 * treat the translation fault as spurious.
283 */
284 dfsc = FIELD_GET(SYS_PAR_EL1_FST, par);
285 return (dfsc & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT;
286 }
287
die_kernel_fault(const char * msg,unsigned long addr,unsigned int esr,struct pt_regs * regs)288 static void die_kernel_fault(const char *msg, unsigned long addr,
289 unsigned int esr, struct pt_regs *regs)
290 {
291 bust_spinlocks(1);
292
293 pr_alert("Unable to handle kernel %s at virtual address %016lx\n", msg,
294 addr);
295
296 trace_android_rvh_die_kernel_fault(regs, esr, addr, msg);
297 mem_abort_decode(esr);
298
299 show_pte(addr);
300 die("Oops", regs, esr);
301 bust_spinlocks(0);
302 do_exit(SIGKILL);
303 }
304
305 #ifdef CONFIG_KASAN_HW_TAGS
report_tag_fault(unsigned long addr,unsigned int esr,struct pt_regs * regs)306 static void report_tag_fault(unsigned long addr, unsigned int esr,
307 struct pt_regs *regs)
308 {
309 static bool reported;
310 bool is_write;
311
312 if (READ_ONCE(reported))
313 return;
314
315 /*
316 * This is used for KASAN tests and assumes that no MTE faults
317 * happened before running the tests.
318 */
319 if (mte_report_once())
320 WRITE_ONCE(reported, true);
321
322 /*
323 * SAS bits aren't set for all faults reported in EL1, so we can't
324 * find out access size.
325 */
326 is_write = !!(esr & ESR_ELx_WNR);
327 kasan_report(addr, 0, is_write, regs->pc);
328 }
329 #else
330 /* Tag faults aren't enabled without CONFIG_KASAN_HW_TAGS. */
report_tag_fault(unsigned long addr,unsigned int esr,struct pt_regs * regs)331 static inline void report_tag_fault(unsigned long addr, unsigned int esr,
332 struct pt_regs *regs) { }
333 #endif
334
do_tag_recovery(unsigned long addr,unsigned int esr,struct pt_regs * regs)335 static void do_tag_recovery(unsigned long addr, unsigned int esr,
336 struct pt_regs *regs)
337 {
338
339 report_tag_fault(addr, esr, regs);
340
341 /*
342 * Disable MTE Tag Checking on the local CPU for the current EL.
343 * It will be done lazily on the other CPUs when they will hit a
344 * tag fault.
345 */
346 sysreg_clear_set(sctlr_el1, SCTLR_ELx_TCF_MASK, SCTLR_ELx_TCF_NONE);
347 isb();
348 }
349
is_el1_mte_sync_tag_check_fault(unsigned int esr)350 static bool is_el1_mte_sync_tag_check_fault(unsigned int esr)
351 {
352 unsigned int ec = ESR_ELx_EC(esr);
353 unsigned int fsc = esr & ESR_ELx_FSC;
354
355 if (ec != ESR_ELx_EC_DABT_CUR)
356 return false;
357
358 if (fsc == ESR_ELx_FSC_MTE)
359 return true;
360
361 return false;
362 }
363
__do_kernel_fault(unsigned long addr,unsigned int esr,struct pt_regs * regs)364 static void __do_kernel_fault(unsigned long addr, unsigned int esr,
365 struct pt_regs *regs)
366 {
367 const char *msg;
368
369 /*
370 * Are we prepared to handle this kernel fault?
371 * We are almost certainly not prepared to handle instruction faults.
372 */
373 if (!is_el1_instruction_abort(esr) && fixup_exception(regs))
374 return;
375
376 if (WARN_RATELIMIT(is_spurious_el1_translation_fault(addr, esr, regs),
377 "Ignoring spurious kernel translation fault at virtual address %016lx\n", addr))
378 return;
379
380 if (is_el1_mte_sync_tag_check_fault(esr)) {
381 do_tag_recovery(addr, esr, regs);
382
383 return;
384 }
385
386 if (is_el1_permission_fault(addr, esr, regs)) {
387 if (esr & ESR_ELx_WNR)
388 msg = "write to read-only memory";
389 else if (is_el1_instruction_abort(esr))
390 msg = "execute from non-executable memory";
391 else
392 msg = "read from unreadable memory";
393 } else if (addr < PAGE_SIZE) {
394 msg = "NULL pointer dereference";
395 } else {
396 if (kfence_handle_page_fault(addr, esr & ESR_ELx_WNR, regs))
397 return;
398
399 msg = "paging request";
400 }
401
402 die_kernel_fault(msg, addr, esr, regs);
403 }
404
set_thread_esr(unsigned long address,unsigned int esr)405 static void set_thread_esr(unsigned long address, unsigned int esr)
406 {
407 current->thread.fault_address = address;
408
409 /*
410 * If the faulting address is in the kernel, we must sanitize the ESR.
411 * From userspace's point of view, kernel-only mappings don't exist
412 * at all, so we report them as level 0 translation faults.
413 * (This is not quite the way that "no mapping there at all" behaves:
414 * an alignment fault not caused by the memory type would take
415 * precedence over translation fault for a real access to empty
416 * space. Unfortunately we can't easily distinguish "alignment fault
417 * not caused by memory type" from "alignment fault caused by memory
418 * type", so we ignore this wrinkle and just return the translation
419 * fault.)
420 */
421 if (!is_ttbr0_addr(current->thread.fault_address)) {
422 switch (ESR_ELx_EC(esr)) {
423 case ESR_ELx_EC_DABT_LOW:
424 /*
425 * These bits provide only information about the
426 * faulting instruction, which userspace knows already.
427 * We explicitly clear bits which are architecturally
428 * RES0 in case they are given meanings in future.
429 * We always report the ESR as if the fault was taken
430 * to EL1 and so ISV and the bits in ISS[23:14] are
431 * clear. (In fact it always will be a fault to EL1.)
432 */
433 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL |
434 ESR_ELx_CM | ESR_ELx_WNR;
435 esr |= ESR_ELx_FSC_FAULT;
436 break;
437 case ESR_ELx_EC_IABT_LOW:
438 /*
439 * Claim a level 0 translation fault.
440 * All other bits are architecturally RES0 for faults
441 * reported with that DFSC value, so we clear them.
442 */
443 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL;
444 esr |= ESR_ELx_FSC_FAULT;
445 break;
446 default:
447 /*
448 * This should never happen (entry.S only brings us
449 * into this code for insn and data aborts from a lower
450 * exception level). Fail safe by not providing an ESR
451 * context record at all.
452 */
453 WARN(1, "ESR 0x%x is not DABT or IABT from EL0\n", esr);
454 esr = 0;
455 break;
456 }
457 }
458
459 current->thread.fault_code = esr;
460 }
461
do_bad_area(unsigned long far,unsigned int esr,struct pt_regs * regs)462 static void do_bad_area(unsigned long far, unsigned int esr,
463 struct pt_regs *regs)
464 {
465 unsigned long addr = untagged_addr(far);
466
467 /*
468 * If we are in kernel mode at this point, we have no context to
469 * handle this fault with.
470 */
471 if (user_mode(regs)) {
472 const struct fault_info *inf = esr_to_fault_info(esr);
473
474 set_thread_esr(addr, esr);
475 arm64_force_sig_fault(inf->sig, inf->code, far, inf->name);
476 } else {
477 __do_kernel_fault(addr, esr, regs);
478 }
479 }
480
481 #define VM_FAULT_BADMAP 0x010000
482 #define VM_FAULT_BADACCESS 0x020000
483
__do_page_fault(struct vm_area_struct * vma,unsigned long addr,unsigned int mm_flags,unsigned long vm_flags,struct pt_regs * regs)484 static int __do_page_fault(struct vm_area_struct *vma, unsigned long addr,
485 unsigned int mm_flags, unsigned long vm_flags,
486 struct pt_regs *regs)
487 {
488
489 if (unlikely(!vma))
490 return VM_FAULT_BADMAP;
491
492 /*
493 * Ok, we have a good vm_area for this memory access, so we can handle
494 * it.
495 */
496 if (unlikely(vma->vm_start > addr)) {
497 if (!(vma->vm_flags & VM_GROWSDOWN))
498 return VM_FAULT_BADMAP;
499 if (expand_stack(vma, addr))
500 return VM_FAULT_BADMAP;
501 }
502
503 /*
504 * Check that the permissions on the VMA allow for the fault which
505 * occurred.
506 */
507 if (!(vma->vm_flags & vm_flags))
508 return VM_FAULT_BADACCESS;
509 return handle_mm_fault(vma, addr & PAGE_MASK, mm_flags, regs);
510 }
511
is_el0_instruction_abort(unsigned int esr)512 static bool is_el0_instruction_abort(unsigned int esr)
513 {
514 return ESR_ELx_EC(esr) == ESR_ELx_EC_IABT_LOW;
515 }
516
517 /*
518 * Note: not valid for EL1 DC IVAC, but we never use that such that it
519 * should fault. EL0 cannot issue DC IVAC (undef).
520 */
is_write_abort(unsigned int esr)521 static bool is_write_abort(unsigned int esr)
522 {
523 return (esr & ESR_ELx_WNR) && !(esr & ESR_ELx_CM);
524 }
525
do_page_fault(unsigned long far,unsigned int esr,struct pt_regs * regs)526 static int __kprobes do_page_fault(unsigned long far, unsigned int esr,
527 struct pt_regs *regs)
528 {
529 const struct fault_info *inf;
530 struct mm_struct *mm = current->mm;
531 vm_fault_t fault;
532 unsigned long vm_flags = VM_ACCESS_FLAGS;
533 unsigned int mm_flags = FAULT_FLAG_DEFAULT;
534 struct vm_area_struct *vma = NULL;
535 unsigned long addr = untagged_addr(far);
536
537 if (kprobe_page_fault(regs, esr))
538 return 0;
539
540 /*
541 * If we're in an interrupt or have no user context, we must not take
542 * the fault.
543 */
544 if (faulthandler_disabled() || !mm)
545 goto no_context;
546
547 if (user_mode(regs))
548 mm_flags |= FAULT_FLAG_USER;
549
550 if (is_el0_instruction_abort(esr)) {
551 vm_flags = VM_EXEC;
552 mm_flags |= FAULT_FLAG_INSTRUCTION;
553 } else if (is_write_abort(esr)) {
554 vm_flags = VM_WRITE;
555 mm_flags |= FAULT_FLAG_WRITE;
556 }
557
558 if (is_ttbr0_addr(addr) && is_el1_permission_fault(addr, esr, regs)) {
559 /* regs->orig_addr_limit may be 0 if we entered from EL0 */
560 if (regs->orig_addr_limit == KERNEL_DS)
561 die_kernel_fault("access to user memory with fs=KERNEL_DS",
562 addr, esr, regs);
563
564 if (is_el1_instruction_abort(esr))
565 die_kernel_fault("execution of user memory",
566 addr, esr, regs);
567
568 if (!search_exception_tables(regs->pc))
569 die_kernel_fault("access to user memory outside uaccess routines",
570 addr, esr, regs);
571 }
572
573 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
574
575 /*
576 * let's try a speculative page fault without grabbing the
577 * mmap_sem.
578 */
579 fault = handle_speculative_fault(mm, addr, mm_flags, &vma, regs);
580 if (fault != VM_FAULT_RETRY)
581 goto done;
582
583 /*
584 * As per x86, we may deadlock here. However, since the kernel only
585 * validly references user space from well defined areas of the code,
586 * we can bug out early if this is from code which shouldn't.
587 */
588 if (!mmap_read_trylock(mm)) {
589 if (!user_mode(regs) && !search_exception_tables(regs->pc))
590 goto no_context;
591 retry:
592 mmap_read_lock(mm);
593 } else {
594 /*
595 * The above down_read_trylock() might have succeeded in which
596 * case, we'll have missed the might_sleep() from down_read().
597 */
598 might_sleep();
599 #ifdef CONFIG_DEBUG_VM
600 if (!user_mode(regs) && !search_exception_tables(regs->pc)) {
601 mmap_read_unlock(mm);
602 goto no_context;
603 }
604 #endif
605 }
606
607 if (!vma || !can_reuse_spf_vma(vma, addr))
608 vma = find_vma(mm, addr);
609 fault = __do_page_fault(vma, addr, mm_flags, vm_flags, regs);
610
611 /* Quick path to respond to signals */
612 if (fault_signal_pending(fault, regs)) {
613 if (!user_mode(regs))
614 goto no_context;
615 return 0;
616 }
617
618 if (fault & VM_FAULT_RETRY) {
619 if (mm_flags & FAULT_FLAG_ALLOW_RETRY) {
620 mm_flags |= FAULT_FLAG_TRIED;
621
622 /*
623 * Do not try to reuse this vma and fetch it
624 * again since we will release the mmap_sem.
625 */
626 vma = NULL;
627
628 goto retry;
629 }
630 }
631 mmap_read_unlock(mm);
632
633 done:
634
635 /*
636 * Handle the "normal" (no error) case first.
637 */
638 if (likely(!(fault & (VM_FAULT_ERROR | VM_FAULT_BADMAP |
639 VM_FAULT_BADACCESS))))
640 return 0;
641
642 /*
643 * If we are in kernel mode at this point, we have no context to
644 * handle this fault with.
645 */
646 if (!user_mode(regs))
647 goto no_context;
648
649 if (fault & VM_FAULT_OOM) {
650 /*
651 * We ran out of memory, call the OOM killer, and return to
652 * userspace (which will retry the fault, or kill us if we got
653 * oom-killed).
654 */
655 pagefault_out_of_memory();
656 return 0;
657 }
658
659 inf = esr_to_fault_info(esr);
660 set_thread_esr(addr, esr);
661 if (fault & VM_FAULT_SIGBUS) {
662 /*
663 * We had some memory, but were unable to successfully fix up
664 * this page fault.
665 */
666 arm64_force_sig_fault(SIGBUS, BUS_ADRERR, far, inf->name);
667 } else if (fault & (VM_FAULT_HWPOISON_LARGE | VM_FAULT_HWPOISON)) {
668 unsigned int lsb;
669
670 lsb = PAGE_SHIFT;
671 if (fault & VM_FAULT_HWPOISON_LARGE)
672 lsb = hstate_index_to_shift(VM_FAULT_GET_HINDEX(fault));
673
674 arm64_force_sig_mceerr(BUS_MCEERR_AR, far, lsb, inf->name);
675 } else {
676 /*
677 * Something tried to access memory that isn't in our memory
678 * map.
679 */
680 arm64_force_sig_fault(SIGSEGV,
681 fault == VM_FAULT_BADACCESS ? SEGV_ACCERR : SEGV_MAPERR,
682 far, inf->name);
683 }
684
685 return 0;
686
687 no_context:
688 __do_kernel_fault(addr, esr, regs);
689 return 0;
690 }
691
do_translation_fault(unsigned long far,unsigned int esr,struct pt_regs * regs)692 static int __kprobes do_translation_fault(unsigned long far,
693 unsigned int esr,
694 struct pt_regs *regs)
695 {
696 unsigned long addr = untagged_addr(far);
697
698 if (is_ttbr0_addr(addr))
699 return do_page_fault(far, esr, regs);
700
701 do_bad_area(far, esr, regs);
702 return 0;
703 }
704
705 #ifdef CONFIG_ROCKCHIP_ARM64_ALIGN_FAULT_FIX
706 extern int alignment_fixup_helper(unsigned long addr, unsigned int esr,
707 struct pt_regs *regs);
708 #endif
do_alignment_fault(unsigned long far,unsigned int esr,struct pt_regs * regs)709 static int do_alignment_fault(unsigned long far, unsigned int esr,
710 struct pt_regs *regs)
711 {
712 #ifdef CONFIG_ROCKCHIP_ARM64_ALIGN_FAULT_FIX
713 if (!alignment_fixup_helper(far, esr, regs))
714 return 0;
715 #endif
716 do_bad_area(far, esr, regs);
717 return 0;
718 }
719
do_bad(unsigned long far,unsigned int esr,struct pt_regs * regs)720 static int do_bad(unsigned long far, unsigned int esr, struct pt_regs *regs)
721 {
722 unsigned long addr = untagged_addr(far);
723 int ret = 1;
724
725 trace_android_vh_handle_tlb_conf(addr, esr, &ret);
726 return ret;
727 }
728
do_sea(unsigned long far,unsigned int esr,struct pt_regs * regs)729 static int do_sea(unsigned long far, unsigned int esr, struct pt_regs *regs)
730 {
731 const struct fault_info *inf;
732 unsigned long siaddr;
733
734 inf = esr_to_fault_info(esr);
735
736 if (user_mode(regs) && apei_claim_sea(regs) == 0) {
737 /*
738 * APEI claimed this as a firmware-first notification.
739 * Some processing deferred to task_work before ret_to_user().
740 */
741 return 0;
742 }
743
744 if (esr & ESR_ELx_FnV) {
745 siaddr = 0;
746 } else {
747 /*
748 * The architecture specifies that the tag bits of FAR_EL1 are
749 * UNKNOWN for synchronous external aborts. Mask them out now
750 * so that userspace doesn't see them.
751 */
752 siaddr = untagged_addr(far);
753 }
754 trace_android_rvh_do_sea(regs, esr, siaddr, inf->name);
755 arm64_notify_die(inf->name, regs, inf->sig, inf->code, siaddr, esr);
756
757 return 0;
758 }
759
do_tag_check_fault(unsigned long far,unsigned int esr,struct pt_regs * regs)760 static int do_tag_check_fault(unsigned long far, unsigned int esr,
761 struct pt_regs *regs)
762 {
763 /*
764 * The architecture specifies that bits 63:60 of FAR_EL1 are UNKNOWN
765 * for tag check faults. Set them to corresponding bits in the untagged
766 * address.
767 */
768 far = (__untagged_addr(far) & ~MTE_TAG_MASK) | (far & MTE_TAG_MASK);
769 do_bad_area(far, esr, regs);
770 return 0;
771 }
772
773 static const struct fault_info fault_info[] = {
774 { do_bad, SIGKILL, SI_KERNEL, "ttbr address size fault" },
775 { do_bad, SIGKILL, SI_KERNEL, "level 1 address size fault" },
776 { do_bad, SIGKILL, SI_KERNEL, "level 2 address size fault" },
777 { do_bad, SIGKILL, SI_KERNEL, "level 3 address size fault" },
778 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 0 translation fault" },
779 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 1 translation fault" },
780 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 2 translation fault" },
781 { do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" },
782 { do_bad, SIGKILL, SI_KERNEL, "unknown 8" },
783 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 access flag fault" },
784 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 access flag fault" },
785 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 access flag fault" },
786 { do_bad, SIGKILL, SI_KERNEL, "unknown 12" },
787 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 1 permission fault" },
788 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 2 permission fault" },
789 { do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 permission fault" },
790 { do_sea, SIGBUS, BUS_OBJERR, "synchronous external abort" },
791 { do_tag_check_fault, SIGSEGV, SEGV_MTESERR, "synchronous tag check fault" },
792 { do_bad, SIGKILL, SI_KERNEL, "unknown 18" },
793 { do_bad, SIGKILL, SI_KERNEL, "unknown 19" },
794 { do_sea, SIGKILL, SI_KERNEL, "level 0 (translation table walk)" },
795 { do_sea, SIGKILL, SI_KERNEL, "level 1 (translation table walk)" },
796 { do_sea, SIGKILL, SI_KERNEL, "level 2 (translation table walk)" },
797 { do_sea, SIGKILL, SI_KERNEL, "level 3 (translation table walk)" },
798 { do_sea, SIGBUS, BUS_OBJERR, "synchronous parity or ECC error" }, // Reserved when RAS is implemented
799 { do_bad, SIGKILL, SI_KERNEL, "unknown 25" },
800 { do_bad, SIGKILL, SI_KERNEL, "unknown 26" },
801 { do_bad, SIGKILL, SI_KERNEL, "unknown 27" },
802 { do_sea, SIGKILL, SI_KERNEL, "level 0 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
803 { do_sea, SIGKILL, SI_KERNEL, "level 1 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
804 { do_sea, SIGKILL, SI_KERNEL, "level 2 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
805 { do_sea, SIGKILL, SI_KERNEL, "level 3 synchronous parity error (translation table walk)" }, // Reserved when RAS is implemented
806 { do_bad, SIGKILL, SI_KERNEL, "unknown 32" },
807 { do_alignment_fault, SIGBUS, BUS_ADRALN, "alignment fault" },
808 { do_bad, SIGKILL, SI_KERNEL, "unknown 34" },
809 { do_bad, SIGKILL, SI_KERNEL, "unknown 35" },
810 { do_bad, SIGKILL, SI_KERNEL, "unknown 36" },
811 { do_bad, SIGKILL, SI_KERNEL, "unknown 37" },
812 { do_bad, SIGKILL, SI_KERNEL, "unknown 38" },
813 { do_bad, SIGKILL, SI_KERNEL, "unknown 39" },
814 { do_bad, SIGKILL, SI_KERNEL, "unknown 40" },
815 { do_bad, SIGKILL, SI_KERNEL, "unknown 41" },
816 { do_bad, SIGKILL, SI_KERNEL, "unknown 42" },
817 { do_bad, SIGKILL, SI_KERNEL, "unknown 43" },
818 { do_bad, SIGKILL, SI_KERNEL, "unknown 44" },
819 { do_bad, SIGKILL, SI_KERNEL, "unknown 45" },
820 { do_bad, SIGKILL, SI_KERNEL, "unknown 46" },
821 { do_bad, SIGKILL, SI_KERNEL, "unknown 47" },
822 { do_bad, SIGKILL, SI_KERNEL, "TLB conflict abort" },
823 { do_bad, SIGKILL, SI_KERNEL, "Unsupported atomic hardware update fault" },
824 { do_bad, SIGKILL, SI_KERNEL, "unknown 50" },
825 { do_bad, SIGKILL, SI_KERNEL, "unknown 51" },
826 { do_bad, SIGKILL, SI_KERNEL, "implementation fault (lockdown abort)" },
827 { do_bad, SIGBUS, BUS_OBJERR, "implementation fault (unsupported exclusive)" },
828 { do_bad, SIGKILL, SI_KERNEL, "unknown 54" },
829 { do_bad, SIGKILL, SI_KERNEL, "unknown 55" },
830 { do_bad, SIGKILL, SI_KERNEL, "unknown 56" },
831 { do_bad, SIGKILL, SI_KERNEL, "unknown 57" },
832 { do_bad, SIGKILL, SI_KERNEL, "unknown 58" },
833 { do_bad, SIGKILL, SI_KERNEL, "unknown 59" },
834 { do_bad, SIGKILL, SI_KERNEL, "unknown 60" },
835 { do_bad, SIGKILL, SI_KERNEL, "section domain fault" },
836 { do_bad, SIGKILL, SI_KERNEL, "page domain fault" },
837 { do_bad, SIGKILL, SI_KERNEL, "unknown 63" },
838 };
839
do_mem_abort(unsigned long far,unsigned int esr,struct pt_regs * regs)840 void do_mem_abort(unsigned long far, unsigned int esr, struct pt_regs *regs)
841 {
842 const struct fault_info *inf = esr_to_fault_info(esr);
843 unsigned long addr = untagged_addr(far);
844
845 if (!inf->fn(far, esr, regs))
846 return;
847
848 if (!user_mode(regs)) {
849 pr_alert("Unhandled fault at 0x%016lx\n", addr);
850 trace_android_rvh_do_mem_abort(regs, esr, addr, inf->name);
851 mem_abort_decode(esr);
852 show_pte(addr);
853 }
854
855 /*
856 * At this point we have an unrecognized fault type whose tag bits may
857 * have been defined as UNKNOWN. Therefore we only expose the untagged
858 * address to the signal handler.
859 */
860 arm64_notify_die(inf->name, regs, inf->sig, inf->code, addr, esr);
861 }
862 NOKPROBE_SYMBOL(do_mem_abort);
863
do_el0_irq_bp_hardening(void)864 void do_el0_irq_bp_hardening(void)
865 {
866 /* PC has already been checked in entry.S */
867 arm64_apply_bp_hardening();
868 }
869 NOKPROBE_SYMBOL(do_el0_irq_bp_hardening);
870
do_sp_pc_abort(unsigned long addr,unsigned int esr,struct pt_regs * regs)871 void do_sp_pc_abort(unsigned long addr, unsigned int esr, struct pt_regs *regs)
872 {
873 trace_android_rvh_do_sp_pc_abort(regs, esr, addr, user_mode(regs));
874
875 arm64_notify_die("SP/PC alignment exception", regs, SIGBUS, BUS_ADRALN,
876 addr, esr);
877 }
878 NOKPROBE_SYMBOL(do_sp_pc_abort);
879
880 int __init early_brk64(unsigned long addr, unsigned int esr,
881 struct pt_regs *regs);
882
883 /*
884 * __refdata because early_brk64 is __init, but the reference to it is
885 * clobbered at arch_initcall time.
886 * See traps.c and debug-monitors.c:debug_traps_init().
887 */
888 static struct fault_info __refdata debug_fault_info[] = {
889 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware breakpoint" },
890 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware single-step" },
891 { do_bad, SIGTRAP, TRAP_HWBKPT, "hardware watchpoint" },
892 { do_bad, SIGKILL, SI_KERNEL, "unknown 3" },
893 { do_bad, SIGTRAP, TRAP_BRKPT, "aarch32 BKPT" },
894 { do_bad, SIGKILL, SI_KERNEL, "aarch32 vector catch" },
895 { early_brk64, SIGTRAP, TRAP_BRKPT, "aarch64 BRK" },
896 { do_bad, SIGKILL, SI_KERNEL, "unknown 7" },
897 };
898
hook_debug_fault_code(int nr,int (* fn)(unsigned long,unsigned int,struct pt_regs *),int sig,int code,const char * name)899 void __init hook_debug_fault_code(int nr,
900 int (*fn)(unsigned long, unsigned int, struct pt_regs *),
901 int sig, int code, const char *name)
902 {
903 BUG_ON(nr < 0 || nr >= ARRAY_SIZE(debug_fault_info));
904
905 debug_fault_info[nr].fn = fn;
906 debug_fault_info[nr].sig = sig;
907 debug_fault_info[nr].code = code;
908 debug_fault_info[nr].name = name;
909 }
910
911 /*
912 * In debug exception context, we explicitly disable preemption despite
913 * having interrupts disabled.
914 * This serves two purposes: it makes it much less likely that we would
915 * accidentally schedule in exception context and it will force a warning
916 * if we somehow manage to schedule by accident.
917 */
debug_exception_enter(struct pt_regs * regs)918 static void debug_exception_enter(struct pt_regs *regs)
919 {
920 preempt_disable();
921
922 /* This code is a bit fragile. Test it. */
923 RCU_LOCKDEP_WARN(!rcu_is_watching(), "exception_enter didn't work");
924 }
925 NOKPROBE_SYMBOL(debug_exception_enter);
926
debug_exception_exit(struct pt_regs * regs)927 static void debug_exception_exit(struct pt_regs *regs)
928 {
929 preempt_enable_no_resched();
930 }
931 NOKPROBE_SYMBOL(debug_exception_exit);
932
933 #ifdef CONFIG_ARM64_ERRATUM_1463225
934 DECLARE_PER_CPU(int, __in_cortex_a76_erratum_1463225_wa);
935
cortex_a76_erratum_1463225_debug_handler(struct pt_regs * regs)936 static int cortex_a76_erratum_1463225_debug_handler(struct pt_regs *regs)
937 {
938 if (user_mode(regs))
939 return 0;
940
941 if (!__this_cpu_read(__in_cortex_a76_erratum_1463225_wa))
942 return 0;
943
944 /*
945 * We've taken a dummy step exception from the kernel to ensure
946 * that interrupts are re-enabled on the syscall path. Return back
947 * to cortex_a76_erratum_1463225_svc_handler() with debug exceptions
948 * masked so that we can safely restore the mdscr and get on with
949 * handling the syscall.
950 */
951 regs->pstate |= PSR_D_BIT;
952 return 1;
953 }
954 #else
cortex_a76_erratum_1463225_debug_handler(struct pt_regs * regs)955 static int cortex_a76_erratum_1463225_debug_handler(struct pt_regs *regs)
956 {
957 return 0;
958 }
959 #endif /* CONFIG_ARM64_ERRATUM_1463225 */
960 NOKPROBE_SYMBOL(cortex_a76_erratum_1463225_debug_handler);
961
do_debug_exception(unsigned long addr_if_watchpoint,unsigned int esr,struct pt_regs * regs)962 void do_debug_exception(unsigned long addr_if_watchpoint, unsigned int esr,
963 struct pt_regs *regs)
964 {
965 const struct fault_info *inf = esr_to_debug_fault_info(esr);
966 unsigned long pc = instruction_pointer(regs);
967
968 if (cortex_a76_erratum_1463225_debug_handler(regs))
969 return;
970
971 debug_exception_enter(regs);
972
973 if (user_mode(regs) && !is_ttbr0_addr(pc))
974 arm64_apply_bp_hardening();
975
976 if (inf->fn(addr_if_watchpoint, esr, regs)) {
977 arm64_notify_die(inf->name, regs, inf->sig, inf->code, pc, esr);
978 }
979
980 debug_exception_exit(regs);
981 }
982 NOKPROBE_SYMBOL(do_debug_exception);
983
984 /*
985 * Used during anonymous page fault handling.
986 */
alloc_zeroed_user_highpage_movable(struct vm_area_struct * vma,unsigned long vaddr)987 struct page *alloc_zeroed_user_highpage_movable(struct vm_area_struct *vma,
988 unsigned long vaddr)
989 {
990 gfp_t flags = GFP_HIGHUSER_MOVABLE | __GFP_ZERO | __GFP_CMA;
991
992 /*
993 * If the page is mapped with PROT_MTE, initialise the tags at the
994 * point of allocation and page zeroing as this is usually faster than
995 * separate DC ZVA and STGM.
996 */
997 if (vma->vm_flags & VM_MTE)
998 flags |= __GFP_ZEROTAGS;
999
1000 return alloc_page_vma(flags, vma, vaddr);
1001 }
1002
tag_clear_highpage(struct page * page)1003 void tag_clear_highpage(struct page *page)
1004 {
1005 mte_zero_clear_page_tags(page_address(page));
1006 page_kasan_tag_reset(page);
1007 set_bit(PG_mte_tagged, &page->flags);
1008 }
1009