1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2015 - ARM Ltd
4 * Author: Marc Zyngier <marc.zyngier@arm.com>
5 */
6
7 #include <hyp/adjust_pc.h>
8 #include <hyp/switch.h>
9
10 #include <linux/arm-smccc.h>
11 #include <linux/kvm_host.h>
12 #include <linux/types.h>
13 #include <linux/jump_label.h>
14 #include <linux/percpu.h>
15 #include <uapi/linux/psci.h>
16
17 #include <kvm/arm_psci.h>
18
19 #include <asm/barrier.h>
20 #include <asm/cpufeature.h>
21 #include <asm/kprobes.h>
22 #include <asm/kvm_asm.h>
23 #include <asm/kvm_emulate.h>
24 #include <asm/kvm_hyp.h>
25 #include <asm/kvm_mmu.h>
26 #include <asm/fpsimd.h>
27 #include <asm/debug-monitors.h>
28 #include <asm/processor.h>
29 #include <asm/thread_info.h>
30 #include <asm/vectors.h>
31
32 const char __hyp_panic_string[] = "HYP panic:\nPS:%08llx PC:%016llx ESR:%08llx\nFAR:%016llx HPFAR:%016llx PAR:%016llx\nVCPU:%p\n";
33
34 /* VHE specific context */
35 DEFINE_PER_CPU(struct kvm_host_data, kvm_host_data);
36 DEFINE_PER_CPU(struct kvm_cpu_context, kvm_hyp_ctxt);
37 DEFINE_PER_CPU(unsigned long, kvm_hyp_vector);
38
__activate_traps(struct kvm_vcpu * vcpu)39 static void __activate_traps(struct kvm_vcpu *vcpu)
40 {
41 u64 val;
42
43 ___activate_traps(vcpu);
44
45 val = read_sysreg(cpacr_el1);
46 val |= CPACR_EL1_TTA;
47 val &= ~CPACR_EL1_ZEN;
48
49 /*
50 * With VHE (HCR.E2H == 1), accesses to CPACR_EL1 are routed to
51 * CPTR_EL2. In general, CPACR_EL1 has the same layout as CPTR_EL2,
52 * except for some missing controls, such as TAM.
53 * In this case, CPTR_EL2.TAM has the same position with or without
54 * VHE (HCR.E2H == 1) which allows us to use here the CPTR_EL2.TAM
55 * shift value for trapping the AMU accesses.
56 */
57
58 val |= CPTR_EL2_TAM;
59
60 if (update_fp_enabled(vcpu)) {
61 if (vcpu_has_sve(vcpu))
62 val |= CPACR_EL1_ZEN;
63 } else {
64 val &= ~CPACR_EL1_FPEN;
65 __activate_traps_fpsimd32(vcpu);
66 }
67
68 write_sysreg(val, cpacr_el1);
69
70 write_sysreg(__this_cpu_read(kvm_hyp_vector), vbar_el1);
71 }
72 NOKPROBE_SYMBOL(__activate_traps);
73
__deactivate_traps(struct kvm_vcpu * vcpu)74 static void __deactivate_traps(struct kvm_vcpu *vcpu)
75 {
76 const char *host_vectors = vectors;
77
78 ___deactivate_traps(vcpu);
79
80 write_sysreg(HCR_HOST_VHE_FLAGS, hcr_el2);
81
82 /*
83 * ARM errata 1165522 and 1530923 require the actual execution of the
84 * above before we can switch to the EL2/EL0 translation regime used by
85 * the host.
86 */
87 asm(ALTERNATIVE("nop", "isb", ARM64_WORKAROUND_SPECULATIVE_AT));
88
89 write_sysreg(CPACR_EL1_DEFAULT, cpacr_el1);
90
91 if (!arm64_kernel_unmapped_at_el0())
92 host_vectors = __this_cpu_read(this_cpu_vector);
93 write_sysreg(host_vectors, vbar_el1);
94 }
95 NOKPROBE_SYMBOL(__deactivate_traps);
96
activate_traps_vhe_load(struct kvm_vcpu * vcpu)97 void activate_traps_vhe_load(struct kvm_vcpu *vcpu)
98 {
99 __activate_traps_common(vcpu);
100 }
101
deactivate_traps_vhe_put(void)102 void deactivate_traps_vhe_put(void)
103 {
104 u64 mdcr_el2 = read_sysreg(mdcr_el2);
105
106 mdcr_el2 &= MDCR_EL2_HPMN_MASK |
107 MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT |
108 MDCR_EL2_TPMS;
109
110 write_sysreg(mdcr_el2, mdcr_el2);
111
112 __deactivate_traps_common();
113 }
114
115 /* Switch to the guest for VHE systems running in EL2 */
__kvm_vcpu_run_vhe(struct kvm_vcpu * vcpu)116 static int __kvm_vcpu_run_vhe(struct kvm_vcpu *vcpu)
117 {
118 struct kvm_cpu_context *host_ctxt;
119 struct kvm_cpu_context *guest_ctxt;
120 u64 exit_code;
121
122 host_ctxt = &this_cpu_ptr(&kvm_host_data)->host_ctxt;
123 host_ctxt->__hyp_running_vcpu = vcpu;
124 guest_ctxt = &vcpu->arch.ctxt;
125
126 sysreg_save_host_state_vhe(host_ctxt);
127
128 /*
129 * ARM erratum 1165522 requires us to configure both stage 1 and
130 * stage 2 translation for the guest context before we clear
131 * HCR_EL2.TGE.
132 *
133 * We have already configured the guest's stage 1 translation in
134 * kvm_vcpu_load_sysregs_vhe above. We must now call
135 * __load_guest_stage2 before __activate_traps, because
136 * __load_guest_stage2 configures stage 2 translation, and
137 * __activate_traps clear HCR_EL2.TGE (among other things).
138 */
139 __load_guest_stage2(vcpu->arch.hw_mmu);
140 __activate_traps(vcpu);
141
142 __adjust_pc(vcpu);
143
144 sysreg_restore_guest_state_vhe(guest_ctxt);
145 __debug_switch_to_guest(vcpu);
146
147 do {
148 /* Jump in the fire! */
149 exit_code = __guest_enter(vcpu);
150
151 /* And we're baaack! */
152 } while (fixup_guest_exit(vcpu, &exit_code));
153
154 sysreg_save_guest_state_vhe(guest_ctxt);
155
156 __deactivate_traps(vcpu);
157
158 sysreg_restore_host_state_vhe(host_ctxt);
159
160 if (vcpu->arch.flags & KVM_ARM64_FP_ENABLED)
161 __fpsimd_save_fpexc32(vcpu);
162
163 __debug_switch_to_host(vcpu);
164
165 return exit_code;
166 }
167 NOKPROBE_SYMBOL(__kvm_vcpu_run_vhe);
168
__kvm_vcpu_run(struct kvm_vcpu * vcpu)169 int __kvm_vcpu_run(struct kvm_vcpu *vcpu)
170 {
171 int ret;
172
173 local_daif_mask();
174
175 /*
176 * Having IRQs masked via PMR when entering the guest means the GIC
177 * will not signal the CPU of interrupts of lower priority, and the
178 * only way to get out will be via guest exceptions.
179 * Naturally, we want to avoid this.
180 *
181 * local_daif_mask() already sets GIC_PRIO_PSR_I_SET, we just need a
182 * dsb to ensure the redistributor is forwards EL2 IRQs to the CPU.
183 */
184 pmr_sync();
185
186 ret = __kvm_vcpu_run_vhe(vcpu);
187
188 /*
189 * local_daif_restore() takes care to properly restore PSTATE.DAIF
190 * and the GIC PMR if the host is using IRQ priorities.
191 */
192 local_daif_restore(DAIF_PROCCTX_NOIRQ);
193
194 /*
195 * When we exit from the guest we change a number of CPU configuration
196 * parameters, such as traps. Make sure these changes take effect
197 * before running the host or additional guests.
198 */
199 isb();
200
201 return ret;
202 }
203
__hyp_call_panic(u64 spsr,u64 elr,u64 par)204 static void __hyp_call_panic(u64 spsr, u64 elr, u64 par)
205 {
206 struct kvm_cpu_context *host_ctxt;
207 struct kvm_vcpu *vcpu;
208
209 host_ctxt = &this_cpu_ptr(&kvm_host_data)->host_ctxt;
210 vcpu = host_ctxt->__hyp_running_vcpu;
211
212 __deactivate_traps(vcpu);
213 sysreg_restore_host_state_vhe(host_ctxt);
214
215 panic(__hyp_panic_string,
216 spsr, elr,
217 read_sysreg_el2(SYS_ESR), read_sysreg_el2(SYS_FAR),
218 read_sysreg(hpfar_el2), par, vcpu);
219 }
220 NOKPROBE_SYMBOL(__hyp_call_panic);
221
hyp_panic(void)222 void __noreturn hyp_panic(void)
223 {
224 u64 spsr = read_sysreg_el2(SYS_SPSR);
225 u64 elr = read_sysreg_el2(SYS_ELR);
226 u64 par = read_sysreg_par();
227
228 __hyp_call_panic(spsr, elr, par);
229 unreachable();
230 }
231
kvm_unexpected_el2_exception(void)232 asmlinkage void kvm_unexpected_el2_exception(void)
233 {
234 __kvm_unexpected_el2_exception();
235 }
236