xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3588-vehicle-evb-v20.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
4 *
5 */
6
7/dts-v1/;
8
9#include "rk3588-vehicle-evb-v20.dtsi"
10#include "rk3588-vehicle-evb-mipi-nvp6188.dtsi"
11#include "rk3588-vehicle-evb-image-reverse.dtsi"
12#include "rk3588-vehicle-serdes-display-v20.dtsi"
13#include "rk3588-android.dtsi"
14
15/ {
16	model = "Rockchip RK3588 VEHICLE EVB V20 Board";
17	compatible = "rockchip,rk3588-vehicle-evb-v20", "rockchip,rk3588";
18
19	bt-sound {
20		compatible = "simple-audio-card";
21		simple-audio-card,format = "dsp_a";
22		simple-audio-card,bitclock-inversion = <1>;
23		simple-audio-card,mclk-fs = <256>;
24		simple-audio-card,name = "rockchip,bt";
25		simple-audio-card,cpu {
26			sound-dai = <&i2s2_2ch>;
27		};
28
29		simple-audio-card,codec {
30			sound-dai = <&bt_sco 1>;
31		};
32	};
33
34	bt_sco: bt-sco {
35		compatible = "delta,dfbmcs320";
36		#sound-dai-cells = <1>;
37		status = "okay";
38	};
39
40	nvp6188_osc: oscillator {
41		compatible = "fixed-clock";
42		#clock-cells = <1>;
43		clock-frequency  = <27000000>;
44		clock-output-names = "nvp6188-osc";
45	};
46};
47
48&cif_sensor {
49	nvp6188 {
50		powerdown-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
51	};
52};
53
54&i2c7 {
55	status = "okay";
56	/delete-node/ nvp6188@33;
57	nvp6188: nvp6188@31 {
58		compatible = "nvp6188";
59		status = "okay";
60		reg = <0x31>;
61		clocks = <&nvp6188_osc 0>;
62		clock-names = "xvclk";
63		power-domains = <&power RK3588_PD_VI>;
64		rockchip,grf = <&sys_grf>;
65		/*power-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;*/
66		reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
67		rockchip,camera-module-index = <0>;
68		rockchip,camera-module-facing = "back";
69		rockchip,camera-module-name = "nvp6188";
70		rockchip,camera-module-lens-name = "nvp6188";
71
72		port {
73			nvp6188_out: endpoint {
74				remote-endpoint = <&mipi_dphy0_in_nvp6188>;
75				data-lanes = <1 2 3 4>;
76			};
77		};
78	};
79};
80
81&i2s2_2ch {
82	pinctrl-0 = <&i2s2m1_lrck
83		     &i2s2m1_sclk
84		     &i2s2m1_sdi
85		     &i2s2m1_sdo>;
86	status = "okay";
87};
88
89&rockchip_suspend {
90	rockchip,sleep-mode-config = <
91		(0
92		| RKPM_SLP_ARMOFF_DDRPD
93		| RKPM_SLP_PMU_PMUALIVE_32K
94		| RKPM_SLP_PMU_DIS_OSC
95		| RKPM_SLP_32K_EXT
96		)
97	>;
98	rockchip,wakeup-config = <
99		(0
100		| RKPM_GPIO_WKUP_EN
101		)
102	>;
103	status = "okay";
104};
105
106&vdd_log_s0 {
107	regulator-state-mem {
108		regulator-on-in-suspend;
109		regulator-suspend-microvolt = <800000>;
110	};
111};
112
113&vcc_3v3_s0 {
114	regulator-state-mem {
115		regulator-on-in-suspend;
116		regulator-suspend-microvolt = <3300000>;
117	};
118};
119
120&vcc_1v8_s0 {
121	regulator-state-mem {
122		regulator-on-in-suspend;
123		regulator-suspend-microvolt = <1800000>;
124	};
125};
126