xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3588-toybrick.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
4 *
5 */
6
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/pwm/pwm.h>
9#include <dt-bindings/pinctrl/rockchip.h>
10#include <dt-bindings/input/rk-input.h>
11#include <dt-bindings/display/drm_mipi_dsi.h>
12#include <dt-bindings/display/rockchip_vop.h>
13#include <dt-bindings/sensor-dev.h>
14
15/ {
16	adc_keys: adc-keys {
17		compatible = "adc-keys";
18		io-channels = <&saradc 1>;
19		io-channel-names = "buttons";
20		keyup-threshold-microvolt = <1800000>;
21		poll-interval = <100>;
22
23		vol-up-key {
24			label = "volume up";
25			linux,code = <KEY_VOLUMEUP>;
26			press-threshold-microvolt = <17000>;
27		};
28
29		vol-down-key {
30			label = "volume down";
31			linux,code = <KEY_VOLUMEDOWN>;
32			press-threshold-microvolt = <417000>;
33		};
34
35		menu-key {
36			label = "menu";
37			linux,code = <KEY_MENU>;
38			press-threshold-microvolt = <890000>;
39		};
40
41		back-key {
42			label = "back";
43			linux,code = <KEY_BACK>;
44			press-threshold-microvolt = <1235000>;
45		};
46	};
47
48	backlight: backlight {
49		compatible = "pwm-backlight";
50		brightness-levels = <
51			  0  20  20  21  21  22  22  23
52			 23  24  24  25  25  26  26  27
53			 27  28  28  29  29  30  30  31
54			 31  32  32  33  33  34  34  35
55			 35  36  36  37  37  38  38  39
56			 40  41  42  43  44  45  46  47
57			 48  49  50  51  52  53  54  55
58			 56  57  58  59  60  61  62  63
59			 64  65  66  67  68  69  70  71
60			 72  73  74  75  76  77  78  79
61			 80  81  82  83  84  85  86  87
62			 88  89  90  91  92  93  94  95
63			 96  97  98  99 100 101 102 103
64			104 105 106 107 108 109 110 111
65			112 113 114 115 116 117 118 119
66			120 121 122 123 124 125 126 127
67			128 129 130 131 132 133 134 135
68			136 137 138 139 140 141 142 143
69			144 145 146 147 148 149 150 151
70			152 153 154 155 156 157 158 159
71			160 161 162 163 164 165 166 167
72			168 169 170 171 172 173 174 175
73			176 177 178 179 180 181 182 183
74			184 185 186 187 188 189 190 191
75			192 193 194 195 196 197 198 199
76			200 201 202 203 204 205 206 207
77			208 209 210 211 212 213 214 215
78			216 217 218 219 220 221 222 223
79			224 225 226 227 228 229 230 231
80			232 233 234 235 236 237 238 239
81			240 241 242 243 244 245 246 247
82			248 249 250 251 252 253 254 255
83		>;
84		default-brightness-level = <200>;
85	};
86
87	dp0_sound: dp0-sound {
88		status = "disabled";
89		compatible = "rockchip,hdmi";
90		rockchip,card-name= "rockchip-dp0";
91		rockchip,mclk-fs = <512>;
92		rockchip,cpu = <&spdif_tx2>;
93		rockchip,codec = <&dp0 1>;
94		rockchip,jack-det;
95	};
96
97	dp1_sound: dp1-sound {
98		status = "disabled";
99		compatible = "rockchip,hdmi";
100		rockchip,card-name= "rockchip-dp1";
101		rockchip,mclk-fs = <512>;
102		rockchip,cpu = <&spdif_tx5>;
103		rockchip,codec = <&dp1 1>;
104		rockchip,jack-det;
105	};
106
107	hdmi0_sound: hdmi0-sound {
108		status = "disabled";
109		compatible = "rockchip,hdmi";
110		rockchip,mclk-fs = <128>;
111		rockchip,card-name = "rockchip-hdmi0";
112		rockchip,cpu = <&i2s5_8ch>;
113		rockchip,codec = <&hdmi0>;
114		rockchip,jack-det;
115	};
116
117	hdmi1_sound: hdmi1-sound {
118		status = "disabled";
119		compatible = "rockchip,hdmi";
120		rockchip,mclk-fs = <128>;
121		rockchip,card-name = "rockchip-hdmi1";
122		rockchip,cpu = <&i2s6_8ch>;
123		rockchip,codec = <&hdmi1>;
124		rockchip,jack-det;
125	};
126
127	leds: leds {
128		compatible = "gpio-leds";
129		work_led: work {
130			gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
131			linux,default-trigger = "heartbeat";
132		};
133	};
134
135	spdif_tx1_dc: spdif-tx1-dc {
136		status = "disabled";
137		compatible = "linux,spdif-dit";
138		#sound-dai-cells = <0>;
139	};
140
141	spdif_tx1_sound: spdif-tx1-sound {
142		status = "disabled";
143		compatible = "simple-audio-card";
144		simple-audio-card,name = "rockchip,spdif-tx1";
145		simple-audio-card,mclk-fs = <128>;
146		simple-audio-card,cpu {
147			sound-dai = <&spdif_tx1>;
148		};
149		simple-audio-card,codec {
150			sound-dai = <&spdif_tx1_dc>;
151		};
152	};
153
154	test-power {
155		status = "okay";
156	};
157
158	vcc12v_dcin: vcc12v-dcin {
159		compatible = "regulator-fixed";
160		regulator-name = "vcc12v_dcin";
161		regulator-always-on;
162		regulator-boot-on;
163		regulator-min-microvolt = <12000000>;
164		regulator-max-microvolt = <12000000>;
165	};
166
167	vcc5v0_sys: vcc5v0-sys {
168		compatible = "regulator-fixed";
169		regulator-name = "vcc5v0_sys";
170		regulator-always-on;
171		regulator-boot-on;
172		regulator-min-microvolt = <5000000>;
173		regulator-max-microvolt = <5000000>;
174		vin-supply = <&vcc12v_dcin>;
175	};
176
177	vcc5v0_usbdcin: vcc5v0-usbdcin {
178		compatible = "regulator-fixed";
179		regulator-name = "vcc5v0_usbdcin";
180		regulator-always-on;
181		regulator-boot-on;
182		regulator-min-microvolt = <5000000>;
183		regulator-max-microvolt = <5000000>;
184		vin-supply = <&vcc12v_dcin>;
185	};
186
187	vcc5v0_usb: vcc5v0-usb {
188		compatible = "regulator-fixed";
189		regulator-name = "vcc5v0_usb";
190		regulator-always-on;
191		regulator-boot-on;
192		regulator-min-microvolt = <5000000>;
193		regulator-max-microvolt = <5000000>;
194		vin-supply = <&vcc5v0_usbdcin>;
195	};
196
197	/*
198	 *in TB-RK3588 gpio0 RK_PB6 for MIPI dsi tp
199	 */
200
201	spi2: spi@feb20000 {
202		compatible = "rockchip,rk3066-spi";
203		reg = <0x0 0xfeb20000 0x0 0x1000>;
204		interrupts = <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>;
205		#address-cells = <1>;
206		#size-cells = <0>;
207		clocks = <&cru CLK_SPI2>, <&cru PCLK_SPI2>;
208		clock-names = "spiclk", "apb_pclk";
209		dmas = <&dmac1 15>, <&dmac1 16>;
210		dma-names = "tx", "rx";
211		pinctrl-names = "default";
212		pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
213		num-cs = <2>;
214		status = "okay";
215	};
216
217
218	/*
219	 *just for rk3588s-evb4 in rk3588-rk806-single.dtsi
220	 *in TB-RK3588 gpio1 RK_PA6 for edp tp
221	 */
222	vcc_1v2_cam_s0: vcc-1v2-cam-s0 {
223		status = "disabled";
224		compatible = "regulator-fixed";
225		regulator-name = "vcc_1v2_cam_s0";
226		regulator-min-microvolt = <1200000>;
227		regulator-max-microvolt = <1200000>;
228		gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;
229		enable-active-high;
230		vin-supply = <&vcc_3v3_s3>;
231		regulator-state-mem {
232			regulator-off-in-suspend;
233		};
234
235	};
236
237	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 {
238		compatible = "regulator-fixed";
239		regulator-name = "vcc_1v1_nldo_s3";
240		regulator-always-on;
241		regulator-boot-on;
242		regulator-min-microvolt = <1100000>;
243		regulator-max-microvolt = <1100000>;
244		vin-supply = <&vcc5v0_sys>;
245	};
246
247	vcc_3v3_sd_s0: vcc-3v3-sd-s0 {
248		compatible = "regulator-fixed";
249		regulator-name = "vcc_3v3_sd_s0";
250		regulator-min-microvolt = <3300000>;
251		regulator-max-microvolt = <3300000>;
252		gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_LOW>;
253		enable-active-low;
254		vin-supply = <&vcc_3v3_s3>;
255			regulator-state-mem {
256			regulator-off-in-suspend;
257		};
258	};
259};
260
261&av1d_mmu {
262	status = "okay";
263};
264
265&dsi0 {
266	status = "disabled";
267	//rockchip,lane-rate = <1000>;
268	dsi0_panel: panel@0 {
269		status = "okay";
270		compatible = "simple-panel-dsi";
271		reg = <0>;
272		backlight = <&backlight>;
273		reset-delay-ms = <60>;
274		enable-delay-ms = <60>;
275		prepare-delay-ms = <60>;
276		unprepare-delay-ms = <60>;
277		disable-delay-ms = <60>;
278		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
279			MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
280		dsi,format = <MIPI_DSI_FMT_RGB888>;
281		dsi,lanes  = <4>;
282		panel-init-sequence = [
283			23 00 02 FE 21
284			23 00 02 04 00
285			23 00 02 00 64
286			23 00 02 2A 00
287			23 00 02 26 64
288			23 00 02 54 00
289			23 00 02 50 64
290			23 00 02 7B 00
291			23 00 02 77 64
292			23 00 02 A2 00
293			23 00 02 9D 64
294			23 00 02 C9 00
295			23 00 02 C5 64
296			23 00 02 01 71
297			23 00 02 27 71
298			23 00 02 51 71
299			23 00 02 78 71
300			23 00 02 9E 71
301			23 00 02 C6 71
302			23 00 02 02 89
303			23 00 02 28 89
304			23 00 02 52 89
305			23 00 02 79 89
306			23 00 02 9F 89
307			23 00 02 C7 89
308			23 00 02 03 9E
309			23 00 02 29 9E
310			23 00 02 53 9E
311			23 00 02 7A 9E
312			23 00 02 A0 9E
313			23 00 02 C8 9E
314			23 00 02 09 00
315			23 00 02 05 B0
316			23 00 02 31 00
317			23 00 02 2B B0
318			23 00 02 5A 00
319			23 00 02 55 B0
320			23 00 02 80 00
321			23 00 02 7C B0
322			23 00 02 A7 00
323			23 00 02 A3 B0
324			23 00 02 CE 00
325			23 00 02 CA B0
326			23 00 02 06 C0
327			23 00 02 2D C0
328			23 00 02 56 C0
329			23 00 02 7D C0
330			23 00 02 A4 C0
331			23 00 02 CB C0
332			23 00 02 07 CF
333			23 00 02 2F CF
334			23 00 02 58 CF
335			23 00 02 7E CF
336			23 00 02 A5 CF
337			23 00 02 CC CF
338			23 00 02 08 DD
339			23 00 02 30 DD
340			23 00 02 59 DD
341			23 00 02 7F DD
342			23 00 02 A6 DD
343			23 00 02 CD DD
344			23 00 02 0E 15
345			23 00 02 0A E9
346			23 00 02 36 15
347			23 00 02 32 E9
348			23 00 02 5F 15
349			23 00 02 5B E9
350			23 00 02 85 15
351			23 00 02 81 E9
352			23 00 02 AD 15
353			23 00 02 A9 E9
354			23 00 02 D3 15
355			23 00 02 CF E9
356			23 00 02 0B 14
357			23 00 02 33 14
358			23 00 02 5C 14
359			23 00 02 82 14
360			23 00 02 AA 14
361			23 00 02 D0 14
362			23 00 02 0C 36
363			23 00 02 34 36
364			23 00 02 5D 36
365			23 00 02 83 36
366			23 00 02 AB 36
367			23 00 02 D1 36
368			23 00 02 0D 6B
369			23 00 02 35 6B
370			23 00 02 5E 6B
371			23 00 02 84 6B
372			23 00 02 AC 6B
373			23 00 02 D2 6B
374			23 00 02 13 5A
375			23 00 02 0F 94
376			23 00 02 3B 5A
377			23 00 02 37 94
378			23 00 02 64 5A
379			23 00 02 60 94
380			23 00 02 8A 5A
381			23 00 02 86 94
382			23 00 02 B2 5A
383			23 00 02 AE 94
384			23 00 02 D8 5A
385			23 00 02 D4 94
386			23 00 02 10 D1
387			23 00 02 38 D1
388			23 00 02 61 D1
389			23 00 02 87 D1
390			23 00 02 AF D1
391			23 00 02 D5 D1
392			23 00 02 11 04
393			23 00 02 39 04
394			23 00 02 62 04
395			23 00 02 88 04
396			23 00 02 B0 04
397			23 00 02 D6 04
398			23 00 02 12 05
399			23 00 02 3A 05
400			23 00 02 63 05
401			23 00 02 89 05
402			23 00 02 B1 05
403			23 00 02 D7 05
404			23 00 02 18 AA
405			23 00 02 14 36
406			23 00 02 42 AA
407			23 00 02 3D 36
408			23 00 02 69 AA
409			23 00 02 65 36
410			23 00 02 8F AA
411			23 00 02 8B 36
412			23 00 02 B7 AA
413			23 00 02 B3 36
414			23 00 02 DD AA
415			23 00 02 D9 36
416			23 00 02 15 74
417			23 00 02 3F 74
418			23 00 02 66 74
419			23 00 02 8C 74
420			23 00 02 B4 74
421			23 00 02 DA 74
422			23 00 02 16 9F
423			23 00 02 40 9F
424			23 00 02 67 9F
425			23 00 02 8D 9F
426			23 00 02 B5 9F
427			23 00 02 DB 9F
428			23 00 02 17 DC
429			23 00 02 41 DC
430			23 00 02 68 DC
431			23 00 02 8E DC
432			23 00 02 B6 DC
433			23 00 02 DC DC
434			23 00 02 1D FF
435			23 00 02 19 03
436			23 00 02 47 FF
437			23 00 02 43 03
438			23 00 02 6E FF
439			23 00 02 6A 03
440			23 00 02 94 FF
441			23 00 02 90 03
442			23 00 02 BC FF
443			23 00 02 B8 03
444			23 00 02 E2 FF
445			23 00 02 DE 03
446			23 00 02 1A 35
447			23 00 02 44 35
448			23 00 02 6B 35
449			23 00 02 91 35
450			23 00 02 B9 35
451			23 00 02 DF 35
452			23 00 02 1B 45
453			23 00 02 45 45
454			23 00 02 6C 45
455			23 00 02 92 45
456			23 00 02 BA 45
457			23 00 02 E0 45
458			23 00 02 1C 55
459			23 00 02 46 55
460			23 00 02 6D 55
461			23 00 02 93 55
462			23 00 02 BB 55
463			23 00 02 E1 55
464			23 00 02 22 FF
465			23 00 02 1E 68
466			23 00 02 4C FF
467			23 00 02 48 68
468			23 00 02 73 FF
469			23 00 02 6F 68
470			23 00 02 99 FF
471			23 00 02 95 68
472			23 00 02 C1 FF
473			23 00 02 BD 68
474			23 00 02 E7 FF
475			23 00 02 E3 68
476			23 00 02 1F 7E
477			23 00 02 49 7E
478			23 00 02 70 7E
479			23 00 02 96 7E
480			23 00 02 BE 7E
481			23 00 02 E4 7E
482			23 00 02 20 97
483			23 00 02 4A 97
484			23 00 02 71 97
485			23 00 02 97 97
486			23 00 02 BF 97
487			23 00 02 E5 97
488			23 00 02 21 B5
489			23 00 02 4B B5
490			23 00 02 72 B5
491			23 00 02 98 B5
492			23 00 02 C0 B5
493			23 00 02 E6 B5
494			23 00 02 25 F0
495			23 00 02 23 E8
496			23 00 02 4F F0
497			23 00 02 4D E8
498			23 00 02 76 F0
499			23 00 02 74 E8
500			23 00 02 9C F0
501			23 00 02 9A E8
502			23 00 02 C4 F0
503			23 00 02 C2 E8
504			23 00 02 EA F0
505			23 00 02 E8 E8
506			23 00 02 24 FF
507			23 00 02 4E FF
508			23 00 02 75 FF
509			23 00 02 9B FF
510			23 00 02 C3 FF
511			23 00 02 E9 FF
512			23 00 02 FE 3D
513			23 00 02 00 04
514			23 00 02 FE 23
515			23 00 02 08 82
516			23 00 02 0A 00
517			23 00 02 0B 00
518			23 00 02 0C 01
519			23 00 02 16 00
520			23 00 02 18 02
521			23 00 02 1B 04
522			23 00 02 19 04
523			23 00 02 1C 81
524			23 00 02 1F 00
525			23 00 02 20 03
526			23 00 02 23 04
527			23 00 02 21 01
528			23 00 02 54 63
529			23 00 02 55 54
530			23 00 02 6E 45
531			23 00 02 6D 36
532			23 00 02 FE 3D
533			23 00 02 55 78
534			23 00 02 FE 20
535			23 00 02 26 30
536			23 00 02 FE 3D
537			23 00 02 20 71
538			23 00 02 50 8F
539			23 00 02 51 8F
540			23 00 02 FE 00
541			23 00 02 35 00
542			05 78 01 11
543			05 1E 01 29
544		];
545
546		panel-exit-sequence = [
547			05 00 01 28
548			05 00 01 10
549		];
550
551		disp_timings0: display-timings {
552			native-mode = <&dsi0_timing0>;
553			dsi0_timing0: timing0 {
554				clock-frequency = <132000000>;
555				hactive = <1080>;
556				vactive = <1920>;
557				hfront-porch = <15>;
558				hsync-len = <4>;
559				hback-porch = <30>;
560				vfront-porch = <15>;
561				vsync-len = <2>;
562				vback-porch = <15>;
563				hsync-active = <0>;
564				vsync-active = <0>;
565				de-active = <0>;
566				pixelclk-active = <0>;
567			};
568		};
569
570		ports {
571			#address-cells = <1>;
572			#size-cells = <0>;
573
574			port@0 {
575				reg = <0>;
576				panel_in_dsi: endpoint {
577					remote-endpoint = <&dsi_out_panel>;
578				};
579			};
580		};
581	};
582
583	ports {
584		#address-cells = <1>;
585		#size-cells = <0>;
586
587		port@1 {
588			reg = <1>;
589			dsi_out_panel: endpoint {
590				remote-endpoint = <&panel_in_dsi>;
591			};
592		};
593	};
594
595};
596
597&dsi1 {
598	status = "disabled";
599	//rockchip,lane-rate = <1000>;
600	dsi1_panel: panel@0 {
601		status = "okay";
602		compatible = "simple-panel-dsi";
603		reg = <0>;
604		backlight = <&backlight>;
605		reset-delay-ms = <60>;
606		enable-delay-ms = <60>;
607		prepare-delay-ms = <60>;
608		unprepare-delay-ms = <60>;
609		disable-delay-ms = <60>;
610		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
611			MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
612		dsi,format = <MIPI_DSI_FMT_RGB888>;
613		dsi,lanes  = <4>;
614		panel-init-sequence = [
615			23 00 02 FE 21
616			23 00 02 04 00
617			23 00 02 00 64
618			23 00 02 2A 00
619			23 00 02 26 64
620			23 00 02 54 00
621			23 00 02 50 64
622			23 00 02 7B 00
623			23 00 02 77 64
624			23 00 02 A2 00
625			23 00 02 9D 64
626			23 00 02 C9 00
627			23 00 02 C5 64
628			23 00 02 01 71
629			23 00 02 27 71
630			23 00 02 51 71
631			23 00 02 78 71
632			23 00 02 9E 71
633			23 00 02 C6 71
634			23 00 02 02 89
635			23 00 02 28 89
636			23 00 02 52 89
637			23 00 02 79 89
638			23 00 02 9F 89
639			23 00 02 C7 89
640			23 00 02 03 9E
641			23 00 02 29 9E
642			23 00 02 53 9E
643			23 00 02 7A 9E
644			23 00 02 A0 9E
645			23 00 02 C8 9E
646			23 00 02 09 00
647			23 00 02 05 B0
648			23 00 02 31 00
649			23 00 02 2B B0
650			23 00 02 5A 00
651			23 00 02 55 B0
652			23 00 02 80 00
653			23 00 02 7C B0
654			23 00 02 A7 00
655			23 00 02 A3 B0
656			23 00 02 CE 00
657			23 00 02 CA B0
658			23 00 02 06 C0
659			23 00 02 2D C0
660			23 00 02 56 C0
661			23 00 02 7D C0
662			23 00 02 A4 C0
663			23 00 02 CB C0
664			23 00 02 07 CF
665			23 00 02 2F CF
666			23 00 02 58 CF
667			23 00 02 7E CF
668			23 00 02 A5 CF
669			23 00 02 CC CF
670			23 00 02 08 DD
671			23 00 02 30 DD
672			23 00 02 59 DD
673			23 00 02 7F DD
674			23 00 02 A6 DD
675			23 00 02 CD DD
676			23 00 02 0E 15
677			23 00 02 0A E9
678			23 00 02 36 15
679			23 00 02 32 E9
680			23 00 02 5F 15
681			23 00 02 5B E9
682			23 00 02 85 15
683			23 00 02 81 E9
684			23 00 02 AD 15
685			23 00 02 A9 E9
686			23 00 02 D3 15
687			23 00 02 CF E9
688			23 00 02 0B 14
689			23 00 02 33 14
690			23 00 02 5C 14
691			23 00 02 82 14
692			23 00 02 AA 14
693			23 00 02 D0 14
694			23 00 02 0C 36
695			23 00 02 34 36
696			23 00 02 5D 36
697			23 00 02 83 36
698			23 00 02 AB 36
699			23 00 02 D1 36
700			23 00 02 0D 6B
701			23 00 02 35 6B
702			23 00 02 5E 6B
703			23 00 02 84 6B
704			23 00 02 AC 6B
705			23 00 02 D2 6B
706			23 00 02 13 5A
707			23 00 02 0F 94
708			23 00 02 3B 5A
709			23 00 02 37 94
710			23 00 02 64 5A
711			23 00 02 60 94
712			23 00 02 8A 5A
713			23 00 02 86 94
714			23 00 02 B2 5A
715			23 00 02 AE 94
716			23 00 02 D8 5A
717			23 00 02 D4 94
718			23 00 02 10 D1
719			23 00 02 38 D1
720			23 00 02 61 D1
721			23 00 02 87 D1
722			23 00 02 AF D1
723			23 00 02 D5 D1
724			23 00 02 11 04
725			23 00 02 39 04
726			23 00 02 62 04
727			23 00 02 88 04
728			23 00 02 B0 04
729			23 00 02 D6 04
730			23 00 02 12 05
731			23 00 02 3A 05
732			23 00 02 63 05
733			23 00 02 89 05
734			23 00 02 B1 05
735			23 00 02 D7 05
736			23 00 02 18 AA
737			23 00 02 14 36
738			23 00 02 42 AA
739			23 00 02 3D 36
740			23 00 02 69 AA
741			23 00 02 65 36
742			23 00 02 8F AA
743			23 00 02 8B 36
744			23 00 02 B7 AA
745			23 00 02 B3 36
746			23 00 02 DD AA
747			23 00 02 D9 36
748			23 00 02 15 74
749			23 00 02 3F 74
750			23 00 02 66 74
751			23 00 02 8C 74
752			23 00 02 B4 74
753			23 00 02 DA 74
754			23 00 02 16 9F
755			23 00 02 40 9F
756			23 00 02 67 9F
757			23 00 02 8D 9F
758			23 00 02 B5 9F
759			23 00 02 DB 9F
760			23 00 02 17 DC
761			23 00 02 41 DC
762			23 00 02 68 DC
763			23 00 02 8E DC
764			23 00 02 B6 DC
765			23 00 02 DC DC
766			23 00 02 1D FF
767			23 00 02 19 03
768			23 00 02 47 FF
769			23 00 02 43 03
770			23 00 02 6E FF
771			23 00 02 6A 03
772			23 00 02 94 FF
773			23 00 02 90 03
774			23 00 02 BC FF
775			23 00 02 B8 03
776			23 00 02 E2 FF
777			23 00 02 DE 03
778			23 00 02 1A 35
779			23 00 02 44 35
780			23 00 02 6B 35
781			23 00 02 91 35
782			23 00 02 B9 35
783			23 00 02 DF 35
784			23 00 02 1B 45
785			23 00 02 45 45
786			23 00 02 6C 45
787			23 00 02 92 45
788			23 00 02 BA 45
789			23 00 02 E0 45
790			23 00 02 1C 55
791			23 00 02 46 55
792			23 00 02 6D 55
793			23 00 02 93 55
794			23 00 02 BB 55
795			23 00 02 E1 55
796			23 00 02 22 FF
797			23 00 02 1E 68
798			23 00 02 4C FF
799			23 00 02 48 68
800			23 00 02 73 FF
801			23 00 02 6F 68
802			23 00 02 99 FF
803			23 00 02 95 68
804			23 00 02 C1 FF
805			23 00 02 BD 68
806			23 00 02 E7 FF
807			23 00 02 E3 68
808			23 00 02 1F 7E
809			23 00 02 49 7E
810			23 00 02 70 7E
811			23 00 02 96 7E
812			23 00 02 BE 7E
813			23 00 02 E4 7E
814			23 00 02 20 97
815			23 00 02 4A 97
816			23 00 02 71 97
817			23 00 02 97 97
818			23 00 02 BF 97
819			23 00 02 E5 97
820			23 00 02 21 B5
821			23 00 02 4B B5
822			23 00 02 72 B5
823			23 00 02 98 B5
824			23 00 02 C0 B5
825			23 00 02 E6 B5
826			23 00 02 25 F0
827			23 00 02 23 E8
828			23 00 02 4F F0
829			23 00 02 4D E8
830			23 00 02 76 F0
831			23 00 02 74 E8
832			23 00 02 9C F0
833			23 00 02 9A E8
834			23 00 02 C4 F0
835			23 00 02 C2 E8
836			23 00 02 EA F0
837			23 00 02 E8 E8
838			23 00 02 24 FF
839			23 00 02 4E FF
840			23 00 02 75 FF
841			23 00 02 9B FF
842			23 00 02 C3 FF
843			23 00 02 E9 FF
844			23 00 02 FE 3D
845			23 00 02 00 04
846			23 00 02 FE 23
847			23 00 02 08 82
848			23 00 02 0A 00
849			23 00 02 0B 00
850			23 00 02 0C 01
851			23 00 02 16 00
852			23 00 02 18 02
853			23 00 02 1B 04
854			23 00 02 19 04
855			23 00 02 1C 81
856			23 00 02 1F 00
857			23 00 02 20 03
858			23 00 02 23 04
859			23 00 02 21 01
860			23 00 02 54 63
861			23 00 02 55 54
862			23 00 02 6E 45
863			23 00 02 6D 36
864			23 00 02 FE 3D
865			23 00 02 55 78
866			23 00 02 FE 20
867			23 00 02 26 30
868			23 00 02 FE 3D
869			23 00 02 20 71
870			23 00 02 50 8F
871			23 00 02 51 8F
872			23 00 02 FE 00
873			23 00 02 35 00
874			05 78 01 11
875			05 1E 01 29
876		];
877
878		panel-exit-sequence = [
879			05 00 01 28
880			05 00 01 10
881		];
882
883		disp_timings1: display-timings {
884			native-mode = <&dsi1_timing0>;
885			dsi1_timing0: timing0 {
886				clock-frequency = <132000000>;
887				hactive = <1080>;
888				vactive = <1920>;
889				hfront-porch = <15>;
890				hsync-len = <4>;
891				hback-porch = <30>;
892				vfront-porch = <15>;
893				vsync-len = <2>;
894				vback-porch = <15>;
895				hsync-active = <0>;
896				vsync-active = <0>;
897				de-active = <0>;
898				pixelclk-active = <0>;
899			};
900		};
901
902		ports {
903			#address-cells = <1>;
904			#size-cells = <0>;
905
906			port@0 {
907				reg = <0>;
908				panel_in_dsi1: endpoint {
909					remote-endpoint = <&dsi1_out_panel>;
910				};
911			};
912		};
913	};
914
915	ports {
916		#address-cells = <1>;
917		#size-cells = <0>;
918
919		port@1 {
920			reg = <1>;
921			dsi1_out_panel: endpoint {
922				remote-endpoint = <&panel_in_dsi1>;
923			};
924		};
925	};
926
927};
928
929&gpu {
930	mali-supply = <&vdd_gpu_s0>;
931	mem-supply = <&vdd_gpu_mem_s0>;
932	status = "okay";
933};
934
935&i2s0_8ch {
936	status = "okay";
937	pinctrl-0 = <&i2s0_lrck
938		     &i2s0_sclk
939		     &i2s0_sdi0
940		     &i2s0_sdo0>;
941};
942
943&iep {
944	status = "okay";
945};
946
947&iep_mmu {
948	status = "okay";
949};
950
951&jpegd {
952	status = "okay";
953};
954
955&jpegd_mmu {
956	status = "okay";
957};
958
959&jpege_ccu {
960	status = "okay";
961};
962&jpege0 {
963	status = "okay";
964};
965
966&jpege0_mmu {
967	status = "okay";
968};
969
970&jpege1 {
971	status = "okay";
972};
973
974&jpege1_mmu {
975	status = "okay";
976};
977
978&jpege2 {
979	status = "okay";
980};
981
982&jpege2_mmu {
983	status = "okay";
984};
985
986&jpege3 {
987	status = "okay";
988};
989
990&jpege3_mmu {
991	status = "okay";
992};
993
994&mpp_srv {
995	status = "okay";
996};
997
998&rga3_core0 {
999	status = "okay";
1000};
1001
1002&rga3_0_mmu {
1003	status = "okay";
1004};
1005
1006&rga3_core1 {
1007	status = "okay";
1008};
1009
1010&rga3_1_mmu {
1011	status = "okay";
1012};
1013
1014&rga2 {
1015	status = "okay";
1016};
1017
1018&rknpu {
1019	rknpu-supply = <&vdd_npu_s0>;
1020	mem-supply = <&vdd_npu_mem_s0>;
1021	status = "okay";
1022};
1023
1024&rknpu_mmu {
1025	status = "okay";
1026};
1027
1028&rkvdec_ccu {
1029	status = "okay";
1030};
1031&rkvdec0 {
1032	status = "okay";
1033};
1034
1035&rkvdec0_mmu {
1036	status = "okay";
1037};
1038
1039&rkvdec1 {
1040	status = "okay";
1041};
1042
1043&rkvdec1_mmu {
1044	status = "okay";
1045};
1046
1047&rkvenc_ccu {
1048	status = "okay";
1049};
1050
1051&rkvenc0 {
1052	venc-supply = <&vdd_vdenc_s0>;
1053	mem-supply = <&vdd_vdenc_mem_s0>;
1054	status = "okay";
1055};
1056
1057&rkvenc0_mmu {
1058	status = "okay";
1059};
1060
1061&rkvenc1 {
1062	venc-supply = <&vdd_vdenc_s0>;
1063	mem-supply = <&vdd_vdenc_mem_s0>;
1064	status = "okay";
1065};
1066
1067&rkvenc1_mmu {
1068	status = "okay";
1069};
1070
1071&rockchip_suspend {
1072	status = "okay";
1073	rockchip,sleep-debug-en = <1>;
1074};
1075
1076&saradc {
1077	status = "okay";
1078	vref-supply = <&vcc_1v8_s0>;
1079};
1080
1081&sdhci {
1082	bus-width = <8>;
1083	no-sdio;
1084	no-sd;
1085	non-removable;
1086	max-frequency = <200000000>;
1087	mmc-hs400-1_8v;
1088	mmc-hs400-enhanced-strobe;
1089	status = "okay";
1090};
1091
1092&sdmmc {
1093	max-frequency = <150000000>;
1094	no-sdio;
1095	no-mmc;
1096	bus-width = <4>;
1097	cap-mmc-highspeed;
1098	cap-sd-highspeed;
1099	disable-wp;
1100	sd-uhs-sdr104;
1101	vmmc-supply = <&vcc_3v3_sd_s0>;
1102	vqmmc-supply = <&vccio_sd_s0>;
1103	status = "disabled";
1104};
1105
1106&tsadc {
1107	status = "okay";
1108};
1109
1110&u2phy0 {
1111	status = "okay";
1112};
1113
1114&u2phy1 {
1115	status = "okay";
1116};
1117
1118&u2phy2 {
1119	status = "okay";
1120};
1121
1122&u2phy3 {
1123	status = "okay";
1124};
1125
1126&u2phy0_otg {
1127	rockchip,typec-vbus-det;
1128	status = "okay";
1129};
1130
1131&u2phy1_otg {
1132	status = "okay";
1133};
1134
1135&u2phy2_host {
1136	status = "okay";
1137};
1138
1139&u2phy3_host {
1140	status = "okay";
1141};
1142
1143&usb_host0_ehci {
1144	status = "okay";
1145};
1146
1147&usb_host0_ohci {
1148	status = "okay";
1149};
1150
1151&usb_host1_ehci {
1152	status = "okay";
1153};
1154
1155&usb_host1_ohci {
1156	status = "okay";
1157};
1158
1159&usbdp_phy0 {
1160	status = "okay";
1161};
1162
1163&usbdp_phy0_dp {
1164	status = "okay";
1165};
1166
1167&usbdp_phy0_u3 {
1168	status = "okay";
1169};
1170
1171&usbdp_phy1 {
1172	status = "okay";
1173};
1174
1175&usbdp_phy1_dp {
1176	status = "okay";
1177};
1178
1179&usbdp_phy1_u3 {
1180	status = "okay";
1181};
1182
1183&usbdrd3_0 {
1184	status = "okay";
1185};
1186
1187&usbdrd_dwc3_0 {
1188	dr_mode = "peripheral";
1189	status = "okay";
1190};
1191
1192&usbhost3_0 {
1193	status = "okay";
1194};
1195
1196&usbhost_dwc3_0 {
1197	status = "okay";
1198};
1199
1200&usbdrd3_1 {
1201	status = "okay";
1202};
1203
1204&usbdrd_dwc3_1 {
1205	status = "okay";
1206};
1207
1208&vdpu {
1209	status = "okay";
1210};
1211
1212&vdpu_mmu {
1213	status = "okay";
1214};
1215
1216&vepu {
1217	status = "okay";
1218};
1219
1220&vop {
1221	status = "okay";
1222};
1223
1224&vop_mmu {
1225	status = "okay";
1226};
1227
1228/* vp0 & vp1 splice for 8K output */
1229&vp0 {
1230	rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>;
1231	rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART0>;
1232};
1233
1234&vp1 {
1235	rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>;
1236	rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART1>;
1237};
1238
1239&vp2 {
1240	rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2)>;
1241	rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART2>;
1242};
1243
1244&vp3 {
1245	rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>;
1246	rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART3>;
1247};
1248
1249&i2c0 {
1250	pinctrl-names = "default";
1251	pinctrl-0 = <&i2c0m2_xfer>;
1252};
1253
1254&cpu_l0 {
1255	cpu-supply = <&vdd_cpu_lit_s0>;
1256	mem-supply = <&vdd_cpu_lit_mem_s0>;
1257};
1258
1259&cpu_b0 {
1260	cpu-supply = <&vdd_cpu_big0_s0>;
1261	mem-supply = <&vdd_cpu_big0_mem_s0>;
1262};
1263
1264&cpu_b2 {
1265	cpu-supply = <&vdd_cpu_big1_s0>;
1266	mem-supply = <&vdd_cpu_big1_mem_s0>;
1267};
1268