xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3588-rk806-single.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
8*4882a593Smuzhiyun#include <dt-bindings/pinctrl/rockchip.h>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun&spi2 {
11*4882a593Smuzhiyun	status = "okay";
12*4882a593Smuzhiyun	assigned-clocks = <&cru CLK_SPI2>;
13*4882a593Smuzhiyun	assigned-clock-rates = <200000000>;
14*4882a593Smuzhiyun	pinctrl-names = "default";
15*4882a593Smuzhiyun	pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
16*4882a593Smuzhiyun	num-cs = <1>;
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	rk806single: rk806single@0 {
19*4882a593Smuzhiyun		compatible = "rockchip,rk806";
20*4882a593Smuzhiyun		spi-max-frequency = <1000000>;
21*4882a593Smuzhiyun		reg = <0x0>;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
24*4882a593Smuzhiyun		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun		pinctrl-names = "default", "pmic-power-off";
27*4882a593Smuzhiyun		pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, <&rk806_dvs2_null>, <&rk806_dvs3_null>;
28*4882a593Smuzhiyun		pinctrl-1 = <&rk806_dvs1_pwrdn>;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun		/* 2800mv-3500mv */
31*4882a593Smuzhiyun		low_voltage_threshold = <3000>;
32*4882a593Smuzhiyun		/* 2700mv-3400mv */
33*4882a593Smuzhiyun		shutdown_voltage_threshold = <2700>;
34*4882a593Smuzhiyun		/* 140 160 */
35*4882a593Smuzhiyun		shutdown_temperture_threshold = <160>;
36*4882a593Smuzhiyun		hotdie_temperture_threshold = <115>;
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun		/* 0: restart PMU;
39*4882a593Smuzhiyun		 * 1: reset all the power off reset registers,
40*4882a593Smuzhiyun		 *    forcing the state to switch to ACTIVE mode;
41*4882a593Smuzhiyun		 * 2: Reset all the power off reset registers,
42*4882a593Smuzhiyun		 *    forcing the state to switch to ACTIVE mode,
43*4882a593Smuzhiyun		 *    and simultaneously pull down the RESETB PIN for 5mS before releasing
44*4882a593Smuzhiyun		 */
45*4882a593Smuzhiyun		pmic-reset-func = <1>;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun		vcc1-supply = <&vcc5v0_sys>;
48*4882a593Smuzhiyun		vcc2-supply = <&vcc5v0_sys>;
49*4882a593Smuzhiyun		vcc3-supply = <&vcc5v0_sys>;
50*4882a593Smuzhiyun		vcc4-supply = <&vcc5v0_sys>;
51*4882a593Smuzhiyun		vcc5-supply = <&vcc5v0_sys>;
52*4882a593Smuzhiyun		vcc6-supply = <&vcc5v0_sys>;
53*4882a593Smuzhiyun		vcc7-supply = <&vcc5v0_sys>;
54*4882a593Smuzhiyun		vcc8-supply = <&vcc5v0_sys>;
55*4882a593Smuzhiyun		vcc9-supply = <&vcc5v0_sys>;
56*4882a593Smuzhiyun		vcc10-supply = <&vcc5v0_sys>;
57*4882a593Smuzhiyun		vcc11-supply = <&vcc_2v0_pldo_s3>;
58*4882a593Smuzhiyun		vcc12-supply = <&vcc5v0_sys>;
59*4882a593Smuzhiyun		vcc13-supply = <&vcc_1v1_nldo_s3>;
60*4882a593Smuzhiyun		vcc14-supply = <&vcc_1v1_nldo_s3>;
61*4882a593Smuzhiyun		vcca-supply = <&vcc5v0_sys>;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun		pwrkey {
64*4882a593Smuzhiyun			status = "okay";
65*4882a593Smuzhiyun		};
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun		pinctrl_rk806: pinctrl_rk806 {
68*4882a593Smuzhiyun			gpio-controller;
69*4882a593Smuzhiyun			#gpio-cells = <2>;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun			rk806_dvs1_null: rk806_dvs1_null {
72*4882a593Smuzhiyun				pins = "gpio_pwrctrl2";
73*4882a593Smuzhiyun				function = "pin_fun0";
74*4882a593Smuzhiyun			};
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun			rk806_dvs1_slp: rk806_dvs1_slp {
77*4882a593Smuzhiyun				pins = "gpio_pwrctrl1";
78*4882a593Smuzhiyun				function = "pin_fun1";
79*4882a593Smuzhiyun			};
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun			rk806_dvs1_pwrdn: rk806_dvs1_pwrdn {
82*4882a593Smuzhiyun				pins = "gpio_pwrctrl1";
83*4882a593Smuzhiyun				function = "pin_fun2";
84*4882a593Smuzhiyun			};
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun			rk806_dvs1_rst: rk806_dvs1_rst {
87*4882a593Smuzhiyun				pins = "gpio_pwrctrl1";
88*4882a593Smuzhiyun				function = "pin_fun3";
89*4882a593Smuzhiyun			};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun			rk806_dvs2_null: rk806_dvs2_null {
92*4882a593Smuzhiyun				pins = "gpio_pwrctrl2";
93*4882a593Smuzhiyun				function = "pin_fun0";
94*4882a593Smuzhiyun			};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun			rk806_dvs2_slp: rk806_dvs2_slp {
97*4882a593Smuzhiyun				pins = "gpio_pwrctrl2";
98*4882a593Smuzhiyun				function = "pin_fun1";
99*4882a593Smuzhiyun			};
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun			rk806_dvs2_pwrdn: rk806_dvs2_pwrdn {
102*4882a593Smuzhiyun				pins = "gpio_pwrctrl2";
103*4882a593Smuzhiyun				function = "pin_fun2";
104*4882a593Smuzhiyun			};
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun			rk806_dvs2_rst: rk806_dvs2_rst {
107*4882a593Smuzhiyun				pins = "gpio_pwrctrl2";
108*4882a593Smuzhiyun				function = "pin_fun3";
109*4882a593Smuzhiyun			};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun			rk806_dvs2_dvs: rk806_dvs2_dvs {
112*4882a593Smuzhiyun				pins = "gpio_pwrctrl2";
113*4882a593Smuzhiyun				function = "pin_fun4";
114*4882a593Smuzhiyun			};
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun			rk806_dvs2_gpio: rk806_dvs2_gpio {
117*4882a593Smuzhiyun				pins = "gpio_pwrctrl2";
118*4882a593Smuzhiyun				function = "pin_fun5";
119*4882a593Smuzhiyun			};
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun			rk806_dvs3_null: rk806_dvs3_null {
122*4882a593Smuzhiyun				pins = "gpio_pwrctrl3";
123*4882a593Smuzhiyun				function = "pin_fun0";
124*4882a593Smuzhiyun			};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun			rk806_dvs3_slp: rk806_dvs3_slp {
127*4882a593Smuzhiyun				pins = "gpio_pwrctrl3";
128*4882a593Smuzhiyun				function = "pin_fun1";
129*4882a593Smuzhiyun			};
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun			rk806_dvs3_pwrdn: rk806_dvs3_pwrdn {
132*4882a593Smuzhiyun				pins = "gpio_pwrctrl3";
133*4882a593Smuzhiyun				function = "pin_fun2";
134*4882a593Smuzhiyun			};
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun			rk806_dvs3_rst: rk806_dvs3_rst {
137*4882a593Smuzhiyun				pins = "gpio_pwrctrl3";
138*4882a593Smuzhiyun				function = "pin_fun3";
139*4882a593Smuzhiyun			};
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun			rk806_dvs3_dvs: rk806_dvs3_dvs {
142*4882a593Smuzhiyun				pins = "gpio_pwrctrl3";
143*4882a593Smuzhiyun				function = "pin_fun4";
144*4882a593Smuzhiyun			};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun			rk806_dvs3_gpio: rk806_dvs3_gpio {
147*4882a593Smuzhiyun				pins = "gpio_pwrctrl3";
148*4882a593Smuzhiyun				function = "pin_fun5";
149*4882a593Smuzhiyun			};
150*4882a593Smuzhiyun		};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun		regulators {
153*4882a593Smuzhiyun			vdd_gpu_s0: vdd_gpu_mem_s0: DCDC_REG1 {
154*4882a593Smuzhiyun				regulator-boot-on;
155*4882a593Smuzhiyun				regulator-min-microvolt = <550000>;
156*4882a593Smuzhiyun				regulator-max-microvolt = <950000>;
157*4882a593Smuzhiyun				regulator-ramp-delay = <12500>;
158*4882a593Smuzhiyun				regulator-name = "vdd_gpu_s0";
159*4882a593Smuzhiyun				regulator-enable-ramp-delay = <400>;
160*4882a593Smuzhiyun				regulator-state-mem {
161*4882a593Smuzhiyun					regulator-off-in-suspend;
162*4882a593Smuzhiyun				};
163*4882a593Smuzhiyun			};
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: DCDC_REG2 {
166*4882a593Smuzhiyun				regulator-always-on;
167*4882a593Smuzhiyun				regulator-boot-on;
168*4882a593Smuzhiyun				regulator-min-microvolt = <550000>;
169*4882a593Smuzhiyun				regulator-max-microvolt = <950000>;
170*4882a593Smuzhiyun				regulator-ramp-delay = <12500>;
171*4882a593Smuzhiyun				regulator-name = "vdd_cpu_lit_s0";
172*4882a593Smuzhiyun				regulator-state-mem {
173*4882a593Smuzhiyun					regulator-off-in-suspend;
174*4882a593Smuzhiyun				};
175*4882a593Smuzhiyun			};
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun			vdd_log_s0: DCDC_REG3 {
178*4882a593Smuzhiyun				regulator-always-on;
179*4882a593Smuzhiyun				regulator-boot-on;
180*4882a593Smuzhiyun				regulator-min-microvolt = <675000>;
181*4882a593Smuzhiyun				regulator-max-microvolt = <750000>;
182*4882a593Smuzhiyun				regulator-ramp-delay = <12500>;
183*4882a593Smuzhiyun				regulator-name = "vdd_log_s0";
184*4882a593Smuzhiyun				regulator-state-mem {
185*4882a593Smuzhiyun					regulator-off-in-suspend;
186*4882a593Smuzhiyun					regulator-suspend-microvolt = <750000>;
187*4882a593Smuzhiyun				};
188*4882a593Smuzhiyun			};
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun			vdd_vdenc_s0: vdd_vdenc_mem_s0: DCDC_REG4 {
191*4882a593Smuzhiyun				regulator-always-on;
192*4882a593Smuzhiyun				regulator-boot-on;
193*4882a593Smuzhiyun				regulator-min-microvolt = <550000>;
194*4882a593Smuzhiyun				regulator-max-microvolt = <950000>;
195*4882a593Smuzhiyun				regulator-init-microvolt = <750000>;
196*4882a593Smuzhiyun				regulator-ramp-delay = <12500>;
197*4882a593Smuzhiyun				regulator-name = "vdd_vdenc_s0";
198*4882a593Smuzhiyun				regulator-state-mem {
199*4882a593Smuzhiyun					regulator-off-in-suspend;
200*4882a593Smuzhiyun				};
201*4882a593Smuzhiyun			};
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun			vdd_ddr_s0: DCDC_REG5 {
204*4882a593Smuzhiyun				regulator-always-on;
205*4882a593Smuzhiyun				regulator-boot-on;
206*4882a593Smuzhiyun				regulator-min-microvolt = <675000>;
207*4882a593Smuzhiyun				regulator-max-microvolt = <900000>;
208*4882a593Smuzhiyun				regulator-ramp-delay = <12500>;
209*4882a593Smuzhiyun				regulator-name = "vdd_ddr_s0";
210*4882a593Smuzhiyun				regulator-state-mem {
211*4882a593Smuzhiyun					regulator-off-in-suspend;
212*4882a593Smuzhiyun					regulator-suspend-microvolt = <850000>;
213*4882a593Smuzhiyun				};
214*4882a593Smuzhiyun			};
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun			vdd2_ddr_s3: DCDC_REG6 {
217*4882a593Smuzhiyun				regulator-always-on;
218*4882a593Smuzhiyun				regulator-boot-on;
219*4882a593Smuzhiyun				regulator-name = "vdd2_ddr_s3";
220*4882a593Smuzhiyun				regulator-state-mem {
221*4882a593Smuzhiyun					regulator-on-in-suspend;
222*4882a593Smuzhiyun				};
223*4882a593Smuzhiyun			};
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun			vcc_2v0_pldo_s3: DCDC_REG7 {
226*4882a593Smuzhiyun				regulator-always-on;
227*4882a593Smuzhiyun				regulator-boot-on;
228*4882a593Smuzhiyun				regulator-min-microvolt = <2000000>;
229*4882a593Smuzhiyun				regulator-max-microvolt = <2000000>;
230*4882a593Smuzhiyun				regulator-name = "vdd_2v0_pldo_s3";
231*4882a593Smuzhiyun				regulator-state-mem {
232*4882a593Smuzhiyun					regulator-on-in-suspend;
233*4882a593Smuzhiyun					regulator-suspend-microvolt = <2000000>;
234*4882a593Smuzhiyun				};
235*4882a593Smuzhiyun			};
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun			vcc_3v3_s3: DCDC_REG8 {
238*4882a593Smuzhiyun				regulator-always-on;
239*4882a593Smuzhiyun				regulator-boot-on;
240*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
241*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
242*4882a593Smuzhiyun				regulator-name = "vcc_3v3_s3";
243*4882a593Smuzhiyun				regulator-state-mem {
244*4882a593Smuzhiyun					regulator-on-in-suspend;
245*4882a593Smuzhiyun					regulator-suspend-microvolt = <3300000>;
246*4882a593Smuzhiyun				};
247*4882a593Smuzhiyun			};
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun			vddq_ddr_s0: DCDC_REG9 {
250*4882a593Smuzhiyun				regulator-always-on;
251*4882a593Smuzhiyun				regulator-boot-on;
252*4882a593Smuzhiyun				regulator-name = "vddq_ddr_s0";
253*4882a593Smuzhiyun				regulator-state-mem {
254*4882a593Smuzhiyun					regulator-off-in-suspend;
255*4882a593Smuzhiyun				};
256*4882a593Smuzhiyun			};
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun			vcc_1v8_s3: DCDC_REG10 {
259*4882a593Smuzhiyun				regulator-always-on;
260*4882a593Smuzhiyun				regulator-boot-on;
261*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
262*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
263*4882a593Smuzhiyun				regulator-name = "vcc_1v8_s3";
264*4882a593Smuzhiyun				regulator-state-mem {
265*4882a593Smuzhiyun					regulator-on-in-suspend;
266*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
267*4882a593Smuzhiyun				};
268*4882a593Smuzhiyun			};
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun			avcc_1v8_s0: PLDO_REG1 {
271*4882a593Smuzhiyun				regulator-always-on;
272*4882a593Smuzhiyun				regulator-boot-on;
273*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
274*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
275*4882a593Smuzhiyun				regulator-name = "avcc_1v8_s0";
276*4882a593Smuzhiyun				regulator-state-mem {
277*4882a593Smuzhiyun					regulator-off-in-suspend;
278*4882a593Smuzhiyun				};
279*4882a593Smuzhiyun			};
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun			vcc_1v8_s0: PLDO_REG2 {
282*4882a593Smuzhiyun				regulator-always-on;
283*4882a593Smuzhiyun				regulator-boot-on;
284*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
285*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
286*4882a593Smuzhiyun				regulator-name = "vcc_1v8_s0";
287*4882a593Smuzhiyun				regulator-state-mem {
288*4882a593Smuzhiyun					regulator-off-in-suspend;
289*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
290*4882a593Smuzhiyun				};
291*4882a593Smuzhiyun			};
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun			avdd_1v2_s0: PLDO_REG3 {
294*4882a593Smuzhiyun				regulator-always-on;
295*4882a593Smuzhiyun				regulator-boot-on;
296*4882a593Smuzhiyun				regulator-min-microvolt = <1200000>;
297*4882a593Smuzhiyun				regulator-max-microvolt = <1200000>;
298*4882a593Smuzhiyun				regulator-name = "avdd_1v2_s0";
299*4882a593Smuzhiyun				regulator-state-mem {
300*4882a593Smuzhiyun					regulator-off-in-suspend;
301*4882a593Smuzhiyun				};
302*4882a593Smuzhiyun			};
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun			vcc_3v3_s0: PLDO_REG4 {
305*4882a593Smuzhiyun				regulator-always-on;
306*4882a593Smuzhiyun				regulator-boot-on;
307*4882a593Smuzhiyun				regulator-min-microvolt = <3300000>;
308*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
309*4882a593Smuzhiyun				regulator-name = "vcc_3v3_s0";
310*4882a593Smuzhiyun				regulator-state-mem {
311*4882a593Smuzhiyun					regulator-off-in-suspend;
312*4882a593Smuzhiyun				};
313*4882a593Smuzhiyun			};
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun			vccio_sd_s0: PLDO_REG5 {
316*4882a593Smuzhiyun				regulator-always-on;
317*4882a593Smuzhiyun				regulator-boot-on;
318*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
319*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
320*4882a593Smuzhiyun				regulator-name = "vccio_sd_s0";
321*4882a593Smuzhiyun				regulator-state-mem {
322*4882a593Smuzhiyun					regulator-off-in-suspend;
323*4882a593Smuzhiyun				};
324*4882a593Smuzhiyun			};
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun			pldo6_s3: PLDO_REG6 {
327*4882a593Smuzhiyun				regulator-always-on;
328*4882a593Smuzhiyun				regulator-boot-on;
329*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
330*4882a593Smuzhiyun				regulator-max-microvolt = <1800000>;
331*4882a593Smuzhiyun				regulator-name = "pldo6_s3";
332*4882a593Smuzhiyun				regulator-state-mem {
333*4882a593Smuzhiyun					regulator-on-in-suspend;
334*4882a593Smuzhiyun					regulator-suspend-microvolt = <1800000>;
335*4882a593Smuzhiyun				};
336*4882a593Smuzhiyun			};
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun			vdd_0v75_s3: NLDO_REG1 {
339*4882a593Smuzhiyun				regulator-always-on;
340*4882a593Smuzhiyun				regulator-boot-on;
341*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
342*4882a593Smuzhiyun				regulator-max-microvolt = <750000>;
343*4882a593Smuzhiyun				regulator-name = "vdd_0v75_s3";
344*4882a593Smuzhiyun				regulator-state-mem {
345*4882a593Smuzhiyun					regulator-on-in-suspend;
346*4882a593Smuzhiyun					regulator-suspend-microvolt = <750000>;
347*4882a593Smuzhiyun				};
348*4882a593Smuzhiyun			};
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun			vdd_ddr_pll_s0: NLDO_REG2 {
351*4882a593Smuzhiyun				regulator-always-on;
352*4882a593Smuzhiyun				regulator-boot-on;
353*4882a593Smuzhiyun				regulator-min-microvolt = <850000>;
354*4882a593Smuzhiyun				regulator-max-microvolt = <850000>;
355*4882a593Smuzhiyun				regulator-name = "vdd_ddr_pll_s0";
356*4882a593Smuzhiyun				regulator-state-mem {
357*4882a593Smuzhiyun					regulator-off-in-suspend;
358*4882a593Smuzhiyun					regulator-suspend-microvolt = <850000>;
359*4882a593Smuzhiyun				};
360*4882a593Smuzhiyun			};
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun			avdd_0v75_s0: NLDO_REG3 {
363*4882a593Smuzhiyun				regulator-always-on;
364*4882a593Smuzhiyun				regulator-boot-on;
365*4882a593Smuzhiyun				regulator-min-microvolt = <837500>;
366*4882a593Smuzhiyun				regulator-max-microvolt = <837500>;
367*4882a593Smuzhiyun				regulator-name = "avdd_0v75_s0";
368*4882a593Smuzhiyun				regulator-state-mem {
369*4882a593Smuzhiyun					regulator-off-in-suspend;
370*4882a593Smuzhiyun				};
371*4882a593Smuzhiyun			};
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun			vdd_0v85_s0: NLDO_REG4 {
374*4882a593Smuzhiyun				regulator-always-on;
375*4882a593Smuzhiyun				regulator-boot-on;
376*4882a593Smuzhiyun				regulator-min-microvolt = <850000>;
377*4882a593Smuzhiyun				regulator-max-microvolt = <850000>;
378*4882a593Smuzhiyun				regulator-name = "vdd_0v85_s0";
379*4882a593Smuzhiyun				regulator-state-mem {
380*4882a593Smuzhiyun					regulator-off-in-suspend;
381*4882a593Smuzhiyun				};
382*4882a593Smuzhiyun			};
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun			vdd_0v75_s0: NLDO_REG5 {
385*4882a593Smuzhiyun				regulator-always-on;
386*4882a593Smuzhiyun				regulator-boot-on;
387*4882a593Smuzhiyun				regulator-min-microvolt = <750000>;
388*4882a593Smuzhiyun				regulator-max-microvolt = <750000>;
389*4882a593Smuzhiyun				regulator-name = "vdd_0v75_s0";
390*4882a593Smuzhiyun				regulator-state-mem {
391*4882a593Smuzhiyun					regulator-off-in-suspend;
392*4882a593Smuzhiyun				};
393*4882a593Smuzhiyun			};
394*4882a593Smuzhiyun		};
395*4882a593Smuzhiyun	};
396*4882a593Smuzhiyun};
397