1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7#include <dt-bindings/gpio/gpio.h> 8#include <dt-bindings/pinctrl/rockchip.h> 9 10&spi2 { 11 status = "okay"; 12 assigned-clocks = <&cru CLK_SPI2>; 13 assigned-clock-rates = <200000000>; 14 pinctrl-names = "default"; 15 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 16 num-cs = <1>; 17 18 rk806single: rk806single@0 { 19 compatible = "rockchip,rk806"; 20 spi-max-frequency = <1000000>; 21 reg = <0x0>; 22 23 interrupt-parent = <&gpio0>; 24 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 25 26 pinctrl-names = "default", "pmic-power-off"; 27 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, <&rk806_dvs2_null>, <&rk806_dvs3_null>; 28 pinctrl-1 = <&rk806_dvs1_pwrdn>; 29 30 /* 2800mv-3500mv */ 31 low_voltage_threshold = <3000>; 32 /* 2700mv-3400mv */ 33 shutdown_voltage_threshold = <2700>; 34 /* 140 160 */ 35 shutdown_temperture_threshold = <160>; 36 hotdie_temperture_threshold = <115>; 37 38 /* 0: restart PMU; 39 * 1: reset all the power off reset registers, 40 * forcing the state to switch to ACTIVE mode; 41 * 2: Reset all the power off reset registers, 42 * forcing the state to switch to ACTIVE mode, 43 * and simultaneously pull down the RESETB PIN for 5mS before releasing 44 */ 45 pmic-reset-func = <1>; 46 47 vcc1-supply = <&vcc5v0_sys>; 48 vcc2-supply = <&vcc5v0_sys>; 49 vcc3-supply = <&vcc5v0_sys>; 50 vcc4-supply = <&vcc5v0_sys>; 51 vcc5-supply = <&vcc5v0_sys>; 52 vcc6-supply = <&vcc5v0_sys>; 53 vcc7-supply = <&vcc5v0_sys>; 54 vcc8-supply = <&vcc5v0_sys>; 55 vcc9-supply = <&vcc5v0_sys>; 56 vcc10-supply = <&vcc5v0_sys>; 57 vcc11-supply = <&vcc_2v0_pldo_s3>; 58 vcc12-supply = <&vcc5v0_sys>; 59 vcc13-supply = <&vcc_1v1_nldo_s3>; 60 vcc14-supply = <&vcc_1v1_nldo_s3>; 61 vcca-supply = <&vcc5v0_sys>; 62 63 pwrkey { 64 status = "okay"; 65 }; 66 67 pinctrl_rk806: pinctrl_rk806 { 68 gpio-controller; 69 #gpio-cells = <2>; 70 71 rk806_dvs1_null: rk806_dvs1_null { 72 pins = "gpio_pwrctrl2"; 73 function = "pin_fun0"; 74 }; 75 76 rk806_dvs1_slp: rk806_dvs1_slp { 77 pins = "gpio_pwrctrl1"; 78 function = "pin_fun1"; 79 }; 80 81 rk806_dvs1_pwrdn: rk806_dvs1_pwrdn { 82 pins = "gpio_pwrctrl1"; 83 function = "pin_fun2"; 84 }; 85 86 rk806_dvs1_rst: rk806_dvs1_rst { 87 pins = "gpio_pwrctrl1"; 88 function = "pin_fun3"; 89 }; 90 91 rk806_dvs2_null: rk806_dvs2_null { 92 pins = "gpio_pwrctrl2"; 93 function = "pin_fun0"; 94 }; 95 96 rk806_dvs2_slp: rk806_dvs2_slp { 97 pins = "gpio_pwrctrl2"; 98 function = "pin_fun1"; 99 }; 100 101 rk806_dvs2_pwrdn: rk806_dvs2_pwrdn { 102 pins = "gpio_pwrctrl2"; 103 function = "pin_fun2"; 104 }; 105 106 rk806_dvs2_rst: rk806_dvs2_rst { 107 pins = "gpio_pwrctrl2"; 108 function = "pin_fun3"; 109 }; 110 111 rk806_dvs2_dvs: rk806_dvs2_dvs { 112 pins = "gpio_pwrctrl2"; 113 function = "pin_fun4"; 114 }; 115 116 rk806_dvs2_gpio: rk806_dvs2_gpio { 117 pins = "gpio_pwrctrl2"; 118 function = "pin_fun5"; 119 }; 120 121 rk806_dvs3_null: rk806_dvs3_null { 122 pins = "gpio_pwrctrl3"; 123 function = "pin_fun0"; 124 }; 125 126 rk806_dvs3_slp: rk806_dvs3_slp { 127 pins = "gpio_pwrctrl3"; 128 function = "pin_fun1"; 129 }; 130 131 rk806_dvs3_pwrdn: rk806_dvs3_pwrdn { 132 pins = "gpio_pwrctrl3"; 133 function = "pin_fun2"; 134 }; 135 136 rk806_dvs3_rst: rk806_dvs3_rst { 137 pins = "gpio_pwrctrl3"; 138 function = "pin_fun3"; 139 }; 140 141 rk806_dvs3_dvs: rk806_dvs3_dvs { 142 pins = "gpio_pwrctrl3"; 143 function = "pin_fun4"; 144 }; 145 146 rk806_dvs3_gpio: rk806_dvs3_gpio { 147 pins = "gpio_pwrctrl3"; 148 function = "pin_fun5"; 149 }; 150 }; 151 152 regulators { 153 vdd_gpu_s0: vdd_gpu_mem_s0: DCDC_REG1 { 154 regulator-boot-on; 155 regulator-min-microvolt = <550000>; 156 regulator-max-microvolt = <950000>; 157 regulator-ramp-delay = <12500>; 158 regulator-name = "vdd_gpu_s0"; 159 regulator-enable-ramp-delay = <400>; 160 regulator-state-mem { 161 regulator-off-in-suspend; 162 }; 163 }; 164 165 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: DCDC_REG2 { 166 regulator-always-on; 167 regulator-boot-on; 168 regulator-min-microvolt = <550000>; 169 regulator-max-microvolt = <950000>; 170 regulator-ramp-delay = <12500>; 171 regulator-name = "vdd_cpu_lit_s0"; 172 regulator-state-mem { 173 regulator-off-in-suspend; 174 }; 175 }; 176 177 vdd_log_s0: DCDC_REG3 { 178 regulator-always-on; 179 regulator-boot-on; 180 regulator-min-microvolt = <675000>; 181 regulator-max-microvolt = <750000>; 182 regulator-ramp-delay = <12500>; 183 regulator-name = "vdd_log_s0"; 184 regulator-state-mem { 185 regulator-off-in-suspend; 186 regulator-suspend-microvolt = <750000>; 187 }; 188 }; 189 190 vdd_vdenc_s0: vdd_vdenc_mem_s0: DCDC_REG4 { 191 regulator-always-on; 192 regulator-boot-on; 193 regulator-min-microvolt = <550000>; 194 regulator-max-microvolt = <950000>; 195 regulator-init-microvolt = <750000>; 196 regulator-ramp-delay = <12500>; 197 regulator-name = "vdd_vdenc_s0"; 198 regulator-state-mem { 199 regulator-off-in-suspend; 200 }; 201 }; 202 203 vdd_ddr_s0: DCDC_REG5 { 204 regulator-always-on; 205 regulator-boot-on; 206 regulator-min-microvolt = <675000>; 207 regulator-max-microvolt = <900000>; 208 regulator-ramp-delay = <12500>; 209 regulator-name = "vdd_ddr_s0"; 210 regulator-state-mem { 211 regulator-off-in-suspend; 212 regulator-suspend-microvolt = <850000>; 213 }; 214 }; 215 216 vdd2_ddr_s3: DCDC_REG6 { 217 regulator-always-on; 218 regulator-boot-on; 219 regulator-name = "vdd2_ddr_s3"; 220 regulator-state-mem { 221 regulator-on-in-suspend; 222 }; 223 }; 224 225 vcc_2v0_pldo_s3: DCDC_REG7 { 226 regulator-always-on; 227 regulator-boot-on; 228 regulator-min-microvolt = <2000000>; 229 regulator-max-microvolt = <2000000>; 230 regulator-name = "vdd_2v0_pldo_s3"; 231 regulator-state-mem { 232 regulator-on-in-suspend; 233 regulator-suspend-microvolt = <2000000>; 234 }; 235 }; 236 237 vcc_3v3_s3: DCDC_REG8 { 238 regulator-always-on; 239 regulator-boot-on; 240 regulator-min-microvolt = <3300000>; 241 regulator-max-microvolt = <3300000>; 242 regulator-name = "vcc_3v3_s3"; 243 regulator-state-mem { 244 regulator-on-in-suspend; 245 regulator-suspend-microvolt = <3300000>; 246 }; 247 }; 248 249 vddq_ddr_s0: DCDC_REG9 { 250 regulator-always-on; 251 regulator-boot-on; 252 regulator-name = "vddq_ddr_s0"; 253 regulator-state-mem { 254 regulator-off-in-suspend; 255 }; 256 }; 257 258 vcc_1v8_s3: DCDC_REG10 { 259 regulator-always-on; 260 regulator-boot-on; 261 regulator-min-microvolt = <1800000>; 262 regulator-max-microvolt = <1800000>; 263 regulator-name = "vcc_1v8_s3"; 264 regulator-state-mem { 265 regulator-on-in-suspend; 266 regulator-suspend-microvolt = <1800000>; 267 }; 268 }; 269 270 avcc_1v8_s0: PLDO_REG1 { 271 regulator-always-on; 272 regulator-boot-on; 273 regulator-min-microvolt = <1800000>; 274 regulator-max-microvolt = <1800000>; 275 regulator-name = "avcc_1v8_s0"; 276 regulator-state-mem { 277 regulator-off-in-suspend; 278 }; 279 }; 280 281 vcc_1v8_s0: PLDO_REG2 { 282 regulator-always-on; 283 regulator-boot-on; 284 regulator-min-microvolt = <1800000>; 285 regulator-max-microvolt = <1800000>; 286 regulator-name = "vcc_1v8_s0"; 287 regulator-state-mem { 288 regulator-off-in-suspend; 289 regulator-suspend-microvolt = <1800000>; 290 }; 291 }; 292 293 avdd_1v2_s0: PLDO_REG3 { 294 regulator-always-on; 295 regulator-boot-on; 296 regulator-min-microvolt = <1200000>; 297 regulator-max-microvolt = <1200000>; 298 regulator-name = "avdd_1v2_s0"; 299 regulator-state-mem { 300 regulator-off-in-suspend; 301 }; 302 }; 303 304 vcc_3v3_s0: PLDO_REG4 { 305 regulator-always-on; 306 regulator-boot-on; 307 regulator-min-microvolt = <3300000>; 308 regulator-max-microvolt = <3300000>; 309 regulator-name = "vcc_3v3_s0"; 310 regulator-state-mem { 311 regulator-off-in-suspend; 312 }; 313 }; 314 315 vccio_sd_s0: PLDO_REG5 { 316 regulator-always-on; 317 regulator-boot-on; 318 regulator-min-microvolt = <1800000>; 319 regulator-max-microvolt = <3300000>; 320 regulator-name = "vccio_sd_s0"; 321 regulator-state-mem { 322 regulator-off-in-suspend; 323 }; 324 }; 325 326 pldo6_s3: PLDO_REG6 { 327 regulator-always-on; 328 regulator-boot-on; 329 regulator-min-microvolt = <1800000>; 330 regulator-max-microvolt = <1800000>; 331 regulator-name = "pldo6_s3"; 332 regulator-state-mem { 333 regulator-on-in-suspend; 334 regulator-suspend-microvolt = <1800000>; 335 }; 336 }; 337 338 vdd_0v75_s3: NLDO_REG1 { 339 regulator-always-on; 340 regulator-boot-on; 341 regulator-min-microvolt = <750000>; 342 regulator-max-microvolt = <750000>; 343 regulator-name = "vdd_0v75_s3"; 344 regulator-state-mem { 345 regulator-on-in-suspend; 346 regulator-suspend-microvolt = <750000>; 347 }; 348 }; 349 350 vdd_ddr_pll_s0: NLDO_REG2 { 351 regulator-always-on; 352 regulator-boot-on; 353 regulator-min-microvolt = <850000>; 354 regulator-max-microvolt = <850000>; 355 regulator-name = "vdd_ddr_pll_s0"; 356 regulator-state-mem { 357 regulator-off-in-suspend; 358 regulator-suspend-microvolt = <850000>; 359 }; 360 }; 361 362 avdd_0v75_s0: NLDO_REG3 { 363 regulator-always-on; 364 regulator-boot-on; 365 regulator-min-microvolt = <837500>; 366 regulator-max-microvolt = <837500>; 367 regulator-name = "avdd_0v75_s0"; 368 regulator-state-mem { 369 regulator-off-in-suspend; 370 }; 371 }; 372 373 vdd_0v85_s0: NLDO_REG4 { 374 regulator-always-on; 375 regulator-boot-on; 376 regulator-min-microvolt = <850000>; 377 regulator-max-microvolt = <850000>; 378 regulator-name = "vdd_0v85_s0"; 379 regulator-state-mem { 380 regulator-off-in-suspend; 381 }; 382 }; 383 384 vdd_0v75_s0: NLDO_REG5 { 385 regulator-always-on; 386 regulator-boot-on; 387 regulator-min-microvolt = <750000>; 388 regulator-max-microvolt = <750000>; 389 regulator-name = "vdd_0v75_s0"; 390 regulator-state-mem { 391 regulator-off-in-suspend; 392 }; 393 }; 394 }; 395 }; 396}; 397