1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8 9#include "rk3588-nvr-demo.dtsi" 10#include "rk3588-ipc.dtsi" 11#include "rk3588-nvr-demo-v10-cam-4x.dtsi" 12 13/ { 14 model = "Rockchip RK3588 NVR DEMO LP4 V10 Board"; 15 compatible = "rockchip,rk3588-nvr-demo-v10-ipc-4x", 16 "rockchip,rk3588-nvr-demo-v10", "rockchip,rk3588"; 17}; 18 19&combphy0_ps { 20 status = "disabled"; 21}; 22 23&combphy1_ps { 24 status = "disabled"; 25}; 26 27&combphy2_psu { 28 status = "disabled"; 29}; 30 31&dp0 { 32 status = "disabled"; 33}; 34 35&dp0_in_vp0 { 36 status = "disabled"; 37}; 38 39&dp0_in_vp1 { 40 status = "disabled"; 41}; 42 43&dp0_in_vp2 { 44 status = "disabled"; 45}; 46 47&dp1 { 48 status = "disabled"; 49}; 50 51&dp1_in_vp0 { 52 status = "disabled"; 53}; 54 55&dp1_in_vp1 { 56 status = "disabled"; 57}; 58 59&dp1_in_vp2 { 60 status = "disabled"; 61}; 62 63&gmac1 { 64 status = "disabled"; 65}; 66 67&hdmi0 { 68 status = "disabled"; 69}; 70 71&hdmi0_in_vp0 { 72 status = "disabled"; 73}; 74 75&hdmi0_in_vp1 { 76 status = "disabled"; 77}; 78 79&hdmi0_in_vp2 { 80 status = "disabled"; 81}; 82 83&hdmi0_sound { 84 status = "disabled"; 85}; 86 87&hdmi1 { 88 status = "disabled"; 89}; 90 91&hdmi0_in_vp0 { 92 status = "disabled"; 93}; 94 95&hdmi0_in_vp1 { 96 status = "disabled"; 97}; 98 99&hdmi0_in_vp2 { 100 status = "disabled"; 101}; 102 103&hdmi1_sound { 104 status = "disabled"; 105}; 106 107&hdptxphy_hdmi0 { 108 status = "disabled"; 109}; 110 111&hdptxphy_hdmi1 { 112 status = "disabled"; 113}; 114 115&i2s5_8ch { 116 status = "disabled"; 117}; 118 119&pcie2x1l0 { 120 status = "disabled"; 121}; 122 123&pcie2x1l1 { 124 status = "disabled"; 125}; 126 127&pcie30phy { 128 status = "disabled"; 129}; 130 131&pcie3x4 { 132 status = "disabled"; 133}; 134 135&rkvdec_ccu { 136 status = "disabled"; 137}; 138 139&rkvdec0 { 140 status = "disabled"; 141}; 142 143&rkvdec0_mmu { 144 status = "disabled"; 145}; 146 147&rkvdec1 { 148 status = "disabled"; 149}; 150 151&rkvdec1_mmu { 152 status = "disabled"; 153}; 154 155&sata0 { 156 status = "disabled"; 157}; 158 159&sata1 { 160 status = "disabled"; 161}; 162 163&usbdp_phy1 { 164 status = "disabled"; 165}; 166 167&usbdrd3_1 { 168 status = "disabled"; 169}; 170 171&usbdrd_dwc3_1 { 172 status = "disabled"; 173}; 174 175&usb_host0_ehci { 176 status = "disabled"; 177}; 178 179&usb_host0_ohci { 180 status = "disabled"; 181}; 182 183&usb_host1_ehci { 184 status = "disabled"; 185}; 186 187&usb_host1_ohci { 188 status = "disabled"; 189}; 190 191&u2phy1 { 192 status = "disabled"; 193}; 194 195&u2phy1_otg { 196 status = "disabled"; 197}; 198 199&u2phy2 { 200 status = "disabled"; 201}; 202 203&u2phy2_host { 204 status = "disabled"; 205}; 206 207&u2phy3 { 208 status = "disabled"; 209}; 210 211&u2phy3_host { 212 status = "disabled"; 213}; 214