1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2023 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include "rk3562j-electric.dtsi" 12 13/ { 14 model = "Rockchip RK3562J CORE DDR4 V10 Board"; 15 compatible = "rockchip,rk3562j-core-ddr4-v10", "rockchip,rk3562"; 16 17 chosen: chosen { 18 bootargs = "earlycon=uart8250,mmio32,0xff210000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rw rootwait"; 19 }; 20 21 fiq-debugger { 22 compatible = "rockchip,fiq-debugger"; 23 rockchip,serial-id = <0>; 24 rockchip,wake-irq = <0>; 25 /* If enable uart uses irq instead of fiq */ 26 rockchip,irq-mode-enable = <1>; 27 rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ 28 interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>; 29 pinctrl-names = "default"; 30 pinctrl-0 = <&uart0m0_xfer>; 31 status = "okay"; 32 }; 33 34 dc_12v: dc-12v { 35 compatible = "regulator-fixed"; 36 regulator-name = "dc_12v"; 37 regulator-always-on; 38 regulator-boot-on; 39 regulator-min-microvolt = <12000000>; 40 regulator-max-microvolt = <12000000>; 41 }; 42 43 vcc5v0_sys: vcc5v0-sys { 44 compatible = "regulator-fixed"; 45 regulator-name = "vcc5v0_sys"; 46 regulator-always-on; 47 regulator-boot-on; 48 regulator-min-microvolt = <5000000>; 49 regulator-max-microvolt = <5000000>; 50 vin-supply = <&dc_12v>; 51 }; 52 53 vcc5v0_host: vcc5v0-host-regulator { 54 compatible = "regulator-fixed"; 55 regulator-name = "vcc5v0_host"; 56 regulator-boot-on; 57 regulator-always-on; 58 regulator-min-microvolt = <5000000>; 59 regulator-max-microvolt = <5000000>; 60 enable-active-high; 61 gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; 62 vin-supply = <&vcc5v0_sys>; 63 pinctrl-names = "default"; 64 pinctrl-0 = <&vcc5v0_host_en>; 65 }; 66 67 vcc5v0_otg: vcc5v0-otg-regulator { 68 compatible = "regulator-fixed"; 69 regulator-name = "vcc5v0_otg"; 70 regulator-min-microvolt = <5000000>; 71 regulator-max-microvolt = <5000000>; 72 enable-active-high; 73 gpio = <&expander0 11 GPIO_ACTIVE_HIGH>; 74 vin-supply = <&vcc5v0_sys>; 75 }; 76}; 77 78&combphy_pu { 79 status = "disabled"; 80}; 81 82&cpu0 { 83 cpu-supply = <&vdd_cpu>; 84}; 85 86&gmac0 { 87 phy-mode = "rmii"; 88 clock_in_out = "input"; 89 90 snps,reset-gpio = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; 91 snps,reset-active-low; 92 /* Reset time is 20ms, 100ms for rtl8211f */ 93 snps,reset-delays-us = <0 20000 100000>; 94 95 pinctrl-names = "default"; 96 pinctrl-0 = <&rgmiim0_miim 97 &rgmiim0_tx_bus2 98 &rgmiim0_rx_bus2 99 &rgmiim0_clk>; 100 101 phy-handle = <&rmii_phy>; 102 status = "okay"; 103}; 104 105&i2c0 { 106 status = "okay"; 107 108 expander0: pca953x@26 { 109 vcc-supply = <&vcc_3v3>; 110 compatible = "nxp,pca9555"; 111 reg = <0x26>; 112 gpio-controller; 113 #gpio-cells = <2>; 114 status = "okay"; 115 }; 116 117 rk809: pmic@20 { 118 compatible = "rockchip,rk809"; 119 reg = <0x20>; 120 interrupt-parent = <&gpio0>; 121 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 122 123 pinctrl-names = "default", "pmic-sleep", 124 "pmic-power-off", "pmic-reset"; 125 pinctrl-0 = <&pmic_int>; 126 pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; 127 pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; 128 pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; 129 rockchip,system-power-controller; 130 wakeup-source; 131 #clock-cells = <1>; 132 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 133 /* 1: rst regs (default in codes), 0: rst the pmic */ 134 pmic-reset-func = <0>; 135 /* not save the PMIC_POWER_EN register in uboot */ 136 not-save-power-en = <1>; 137 138 vcc1-supply = <&vcc5v0_sys>; 139 vcc2-supply = <&vcc5v0_sys>; 140 vcc3-supply = <&vcc5v0_sys>; 141 vcc4-supply = <&vcc5v0_sys>; 142 vcc5-supply = <&vcc3v3_sys>; 143 vcc6-supply = <&vcc3v3_sys>; 144 vcc7-supply = <&vcc3v3_sys>; 145 vcc8-supply = <&vcc3v3_sys>; 146 vcc9-supply = <&vcc5v0_sys>; 147 148 pwrkey { 149 status = "okay"; 150 }; 151 152 pinctrl_rk8xx: pinctrl_rk8xx { 153 gpio-controller; 154 #gpio-cells = <2>; 155 156 rk817_slppin_null: rk817_slppin_null { 157 pins = "gpio_slp"; 158 function = "pin_fun0"; 159 }; 160 161 rk817_slppin_slp: rk817_slppin_slp { 162 pins = "gpio_slp"; 163 function = "pin_fun1"; 164 }; 165 166 rk817_slppin_pwrdn: rk817_slppin_pwrdn { 167 pins = "gpio_slp"; 168 function = "pin_fun2"; 169 }; 170 171 rk817_slppin_rst: rk817_slppin_rst { 172 pins = "gpio_slp"; 173 function = "pin_fun3"; 174 }; 175 }; 176 177 regulators { 178 vdd_logic: DCDC_REG1 { 179 regulator-always-on; 180 regulator-boot-on; 181 regulator-min-microvolt = <500000>; 182 regulator-max-microvolt = <1350000>; 183 regulator-init-microvolt = <900000>; 184 regulator-ramp-delay = <6001>; 185 regulator-initial-mode = <0x2>; 186 regulator-name = "vdd_logic"; 187 regulator-state-mem { 188 regulator-off-in-suspend; 189 }; 190 }; 191 192 vdd_cpu: DCDC_REG2 { 193 regulator-always-on; 194 regulator-boot-on; 195 regulator-min-microvolt = <500000>; 196 regulator-max-microvolt = <1350000>; 197 regulator-init-microvolt = <900000>; 198 regulator-ramp-delay = <6001>; 199 regulator-initial-mode = <0x2>; 200 regulator-name = "vdd_cpu"; 201 regulator-state-mem { 202 regulator-off-in-suspend; 203 }; 204 }; 205 206 vcc_ddr: DCDC_REG3 { 207 regulator-always-on; 208 regulator-boot-on; 209 regulator-initial-mode = <0x2>; 210 regulator-name = "vcc_ddr"; 211 regulator-state-mem { 212 regulator-on-in-suspend; 213 }; 214 }; 215 216 vdd_buck4: DCDC_REG4 { 217 regulator-ramp-delay = <6001>; 218 regulator-initial-mode = <0x2>; 219 regulator-name = "vdd_buck4"; 220 regulator-state-mem { 221 regulator-off-in-suspend; 222 }; 223 }; 224 225 vdda_0v9: LDO_REG1 { 226 regulator-boot-on; 227 regulator-always-on; 228 regulator-min-microvolt = <900000>; 229 regulator-max-microvolt = <900000>; 230 regulator-name = "vdda_0v9"; 231 regulator-state-mem { 232 regulator-off-in-suspend; 233 }; 234 }; 235 236 vcca_1v8: LDO_REG2 { 237 regulator-always-on; 238 regulator-boot-on; 239 regulator-min-microvolt = <1800000>; 240 regulator-max-microvolt = <1800000>; 241 regulator-name = "vcca_1v8"; 242 regulator-state-mem { 243 regulator-off-in-suspend; 244 }; 245 }; 246 247 vcc_ldo3: LDO_REG3 { 248 regulator-name = "vcc_ldo3"; 249 regulator-state-mem { 250 regulator-off-in-suspend; 251 }; 252 }; 253 254 vcc_1v8: LDO_REG4 { 255 regulator-always-on; 256 regulator-boot-on; 257 regulator-min-microvolt = <1800000>; 258 regulator-max-microvolt = <1800000>; 259 regulator-name = "vcc_1v8"; 260 regulator-state-mem { 261 regulator-off-in-suspend; 262 }; 263 }; 264 265 vcc_ldo5: LDO_REG5 { 266 regulator-name = "vcc_ldo5"; 267 regulator-state-mem { 268 regulator-off-in-suspend; 269 }; 270 }; 271 272 vcc_ldo6: LDO_REG6 { 273 regulator-name = "vcc_ldo6"; 274 regulator-state-mem { 275 regulator-off-in-suspend; 276 }; 277 }; 278 279 vcc_ldo7: LDO_REG7 { 280 regulator-name = "vcc_ldo7"; 281 regulator-state-mem { 282 regulator-off-in-suspend; 283 }; 284 }; 285 286 vcc_ldo8: LDO_REG8 { 287 regulator-name = "vcc_ldo8"; 288 regulator-state-mem { 289 regulator-off-in-suspend; 290 }; 291 }; 292 293 vcc_ldo9: LDO_REG9 { 294 regulator-name = "vcc_ldo9"; 295 regulator-state-mem { 296 regulator-off-in-suspend; 297 }; 298 }; 299 300 vcc3v3_sys: DCDC_REG5 { 301 regulator-always-on; 302 regulator-boot-on; 303 regulator-min-microvolt = <3300000>; 304 regulator-max-microvolt = <3300000>; 305 regulator-name = "vcc3v3_sys"; 306 regulator-state-mem { 307 regulator-off-in-suspend; 308 }; 309 }; 310 311 vcc_sw1: SWITCH_REG1 { 312 regulator-name = "vcc_sw1"; 313 regulator-state-mem { 314 regulator-off-in-suspend; 315 }; 316 }; 317 318 vcc_3v3: SWITCH_REG2 { 319 regulator-always-on; 320 regulator-boot-on; 321 regulator-name = "vcc_3v3"; 322 regulator-state-mem { 323 regulator-off-in-suspend; 324 }; 325 }; 326 }; 327 }; 328}; 329 330&i2c1 { 331 status = "okay"; 332 pinctrl-0 = <&i2c1m0_xfer>; 333}; 334 335&i2c2 { 336 status = "okay"; 337 pinctrl-0 = <&i2c2m0_xfer>; 338}; 339 340&i2c4 { 341 status = "okay"; 342 pinctrl-0 = <&i2c4m1_xfer>; 343}; 344 345&mdio0 { 346 rmii_phy: phy@1 { 347 compatible = "ethernet-phy-ieee802.3-c22"; 348 reg = <0x1>; 349 clocks = <&cru CLK_GMAC_ETH_OUT2IO>; 350 assigned-clocks = <&cru CLK_GMAC_ETH_OUT2IO>; 351 assigned-clock-rates = <25000000>; 352 }; 353}; 354 355&pinctrl { 356 usb { 357 vcc5v0_host_en: vcc5v0-host-en { 358 rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 359 }; 360 }; 361}; 362 363&pwm0 { 364 status = "okay"; 365 pinctrl-0 = <&pwm0m1_pins>; 366}; 367 368&pwm3 { 369 status = "okay"; 370 pinctrl-0 = <&pwm3m0_pins>; 371}; 372 373&pwm4 { 374 status = "okay"; 375 pinctrl-0 = <&pwm4m0_pins>; 376}; 377 378&pwm7 { 379 status = "okay"; 380 pinctrl-0 = <&pwm7m0_pins>; 381}; 382 383&pwm8 { 384 status = "okay"; 385 pinctrl-0 = <&pwm8m0_pins>; 386}; 387 388&pwm9 { 389 status = "okay"; 390 pinctrl-0 = <&pwm9m0_pins>; 391}; 392 393&rng { 394 status = "okay"; 395}; 396 397&saradc0 { 398 status = "okay"; 399 vref-supply = <&vcca_1v8>; 400}; 401 402&sdhci { 403 status = "okay"; 404}; 405 406&spi1 { 407 status = "okay"; 408 pinctrl-0 = <&spi1m1_csn0 &spi1m1_pins>; 409}; 410 411&spi2 { 412 status = "okay"; 413 pinctrl-0 = <&spi2m1_csn0 &spi2m1_pins>; 414}; 415 416&tsadc { 417 status = "okay"; 418}; 419 420&u2phy { 421 status = "okay"; 422}; 423 424&u2phy_host { 425 phy-supply = <&vcc5v0_host>; 426 status = "okay"; 427}; 428 429&u2phy_otg { 430 vbus-supply = <&vcc5v0_otg>; 431 status = "okay"; 432}; 433 434&uart2 { 435 status = "okay"; 436 pinctrl-0 = <&uart2m1_xfer &uart2m1_ctsn &uart2m1_rtsn>; 437}; 438 439&uart4 { 440 status = "okay"; 441 pinctrl-0 = <&uart4m0_xfer &uart4m0_ctsn &uart4m0_rtsn>; 442}; 443 444&uart5 { 445 status = "okay"; 446 pinctrl-0 = <&uart5m1_xfer>; 447}; 448 449&uart6 { 450 status = "okay"; 451 pinctrl-0 = <&uart6m0_xfer>; 452}; 453 454&uart7 { 455 status = "okay"; 456 pinctrl-0 = <&uart7m0_xfer>; 457}; 458 459&uart8 { 460 status = "okay"; 461 pinctrl-0 = <&uart8m0_xfer>; 462}; 463 464&uart9 { 465 status = "okay"; 466 pinctrl-0 = <&uart9m1_xfer>; 467}; 468 469&usb_host0_ehci { 470 status = "okay"; 471}; 472 473&usb_host0_ohci { 474 status = "okay"; 475}; 476 477&usbdrd30 { 478 status = "okay"; 479}; 480 481&usbdrd_dwc3 { 482 status = "okay"; 483 dr_mode = "otg"; 484 extcon = <&u2phy>; 485 maximum-speed = "high-speed"; 486 phys = <&u2phy_otg>; 487 phy-names = "usb2-phy"; 488 snps,dis_u2_susphy_quirk; 489 snps,usb2-lpm-disable; 490}; 491