1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd 4 */ 5 6/dts-v1/; 7 8#include "rk3399-evb-ind.dtsi" 9#include "rk3399-android.dtsi" 10 11/ { 12 model = "Rockchip RK3399 EVB IND LPDDR4 Board edp (Android)"; 13 compatible = "rockchip,android", "rockchip,rk3399-evb-ind-v13-lpddr4-android", "rockchip,rk3399"; 14 chosen: chosen { 15 bootargs = "earlycon=uart8250,mmio32,0xff1a0000 console=ttyFIQ0 init=/init initrd=0x62000001,0x00800000 coherent_pool=1m"; 16 }; 17 18 iram: sram@ff8d0000 { 19 compatible = "mmio-sram"; 20 reg = <0x0 0xff8d0000 0x0 0x20000>; 21 }; 22 23 hub_reset: hub_reset { 24 compatible = "regulator-fixed"; 25 enable-active-high; 26 gpio = <&gpio4 18 GPIO_ACTIVE_HIGH>; 27 regulator-name = "hub_reset"; 28 regulator-always-on; 29 regulator-boot-on; 30 regulator-min-microvolt = <5000000>; 31 regulator-max-microvolt = <5000000>; 32 }; 33 34 vcc_lcd: vcc-lcd { 35 compatible = "regulator-fixed"; 36 regulator-name = "vcc_lcd"; 37 startup-delay-us = <20000>; 38 enable-active-high; 39 regulator-min-microvolt = <3300000>; 40 regulator-max-microvolt = <3300000>; 41 regulator-boot-on; 42 vin-supply = <&vcc5v0_sys>; 43 }; 44 45 panel: panel { 46 compatible = "simple-panel"; 47 backlight = <&backlight>; 48 power-supply = <&vcc_lcd>; 49 reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; 50 prepare-delay-ms = <20>; 51 reset-delay-ms = <20>; 52 enable-delay-ms = <20>; 53 54 display-timings { 55 native-mode = <&timing0>; 56 57 timing0: timing0 { 58 clock-frequency = <200000000>; 59 hactive = <1536>; 60 vactive = <2048>; 61 hfront-porch = <12>; 62 hsync-len = <16>; 63 hback-porch = <48>; 64 vfront-porch = <8>; 65 vsync-len = <4>; 66 vback-porch = <8>; 67 hsync-active = <0>; 68 vsync-active = <0>; 69 de-active = <0>; 70 pixelclk-active = <0>; 71 }; 72 }; 73 74 ports { 75 panel_in: endpoint { 76 remote-endpoint = <&edp_out>; 77 }; 78 }; 79 }; 80 81 test-power { 82 status = "okay"; 83 }; 84}; 85 86&backlight { 87 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; 88}; 89 90&dmac_bus { 91 iram = <&iram>; 92 rockchip,force-iram; 93}; 94 95&dp_sound { 96 status = "disabled"; 97}; 98 99&edp { 100 status = "okay"; 101 force-hpd; 102 103 ports { 104 port@1 { 105 reg = <1>; 106 107 edp_out: endpoint { 108 remote-endpoint = <&panel_in>; 109 }; 110 }; 111 }; 112}; 113 114&edp_in_vopl { 115 status = "disabled"; 116}; 117 118&i2c1 { 119 status = "okay"; 120 121 sgm3784: sgm3784@30 { 122 #address-cells = <1>; 123 #size-cells = <0>; 124 compatible = "sgmicro,gsm3784"; 125 reg = <0x30>; 126 rockchip,camera-module-index = <0>; 127 rockchip,camera-module-facing = "back"; 128 //enable-gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; 129 //strobe-gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; 130 status = "okay"; 131 sgm3784_led0: led@0 { 132 reg = <0x0>; 133 led-max-microamp = <299200>; 134 flash-max-microamp = <1122000>; 135 flash-max-timeout-us = <1600000>; 136 }; 137 138 sgm3784_led1: led@1 { 139 reg = <0x1>; 140 led-max-microamp = <299200>; 141 flash-max-microamp = <1122000>; 142 flash-max-timeout-us = <1600000>; 143 }; 144 }; 145 146 vm149c: vm149c@0c { 147 compatible = "silicon touch,vm149c"; 148 status = "okay"; 149 reg = <0x0c>; 150 rockchip,camera-module-index = <0>; 151 rockchip,camera-module-facing = "back"; 152 }; 153 154 gc2145: gc2145@3c{ 155 status = "okay"; 156 compatible = "galaxycore,gc2145"; 157 reg = <0x3c>; 158 pinctrl-names = "rockchip,camera_default"; 159 pinctrl-0 = <&cif_clkout>; 160 161 clocks = <&cru SCLK_CIF_OUT>; 162 clock-names = "xvclk"; 163 164 /* avdd-supply = <>; */ 165 /* dvdd-supply = <>; */ 166 /* dovdd-supply = <>; */ 167 power-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; 168 pwdn-gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; 169 rockchip,camera-module-index = <1>; 170 rockchip,camera-module-facing = "front"; 171 rockchip,camera-module-name = "CameraKing"; 172 rockchip,camera-module-lens-name = "Largan"; 173 port { 174 gc2145_out: endpoint { 175 remote-endpoint = <&dvp_in_fcam>; 176 }; 177 }; 178 }; 179 180 ov13850: ov13850@10 { 181 compatible = "ovti,ov13850"; 182 status = "okay"; 183 reg = <0x10>; 184 clocks = <&cru SCLK_CIF_OUT>; 185 clock-names = "xvclk"; 186 /* avdd-supply = <>; */ 187 /* dvdd-supply = <>; */ 188 /* dovdd-supply = <>; */ 189 /* reset-gpios = <>; */ 190 reset-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; 191 pwdn-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; 192 pinctrl-names = "rockchip,camera_default"; 193 pinctrl-0 = <&cif_clkout>; 194 rockchip,camera-module-index = <0>; 195 rockchip,camera-module-facing = "back"; 196 rockchip,camera-module-name = "CMK-CT0116"; 197 rockchip,camera-module-lens-name = "Largan-50013A1"; 198 lens-focus = <&vm149c>; 199 flash-leds = <&sgm3784_led0 &sgm3784_led1>; 200 port { 201 ucam_out0: endpoint { 202 remote-endpoint = <&mipi_in_ucam0>; 203 //remote-endpoint = <&mipi_in_ucam1>; 204 data-lanes = <1 2>; 205 }; 206 }; 207 }; 208 209 ov4689: ov4689@36 { 210 compatible = "ovti,ov4689"; 211 status = "disabled"; 212 reg = <0x36>; 213 clocks = <&cru SCLK_CIF_OUT>; 214 clock-names = "xvclk"; 215 /* avdd-supply = <>; */ 216 /* dvdd-supply = <>; */ 217 /* dovdd-supply = <>; */ 218 /* reset-gpios = <>; */ 219 reset-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; 220 pwdn-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; 221 pinctrl-names = "rockchip,camera_default"; 222 pinctrl-0 = <&cif_clkout>; 223 rockchip,camera-module-index = <1>; 224 rockchip,camera-module-facing = "front"; 225 rockchip,camera-module-name = "JSD3425-C1"; 226 rockchip,camera-module-lens-name = "JSD3425-C1"; 227 port { 228 ucam_out1: endpoint { 229 //remote-endpoint = <&mipi_in_ucam0>; 230 remote-endpoint = <&mipi_in_ucam1>; 231 data-lanes = <1 2>; 232 }; 233 }; 234 }; 235}; 236 237&i2s2 { 238 #sound-dai-cells = <0>; 239 status = "okay"; 240}; 241 242&isp0_mmu { 243 status = "okay"; 244}; 245 246&isp1_mmu { 247 status = "okay"; 248}; 249 250&mipi_dphy_rx0 { 251 status = "okay"; 252 253 ports { 254 #address-cells = <1>; 255 #size-cells = <0>; 256 257 port@0 { 258 reg = <0>; 259 #address-cells = <1>; 260 #size-cells = <0>; 261 262 mipi_in_ucam0: endpoint@1 { 263 reg = <1>; 264 remote-endpoint = <&ucam_out0>; 265 data-lanes = <1 2>; 266 }; 267 }; 268 269 port@1 { 270 reg = <1>; 271 #address-cells = <1>; 272 #size-cells = <0>; 273 274 dphy_rx0_out: endpoint@0 { 275 reg = <0>; 276 remote-endpoint = <&isp0_mipi_in>; 277 }; 278 }; 279 }; 280}; 281 282&mipi_dphy_tx1rx1 { 283 status = "okay"; 284 285 ports { 286 #address-cells = <1>; 287 #size-cells = <0>; 288 289 port@0 { 290 reg = <0>; 291 #address-cells = <1>; 292 #size-cells = <0>; 293 294 mipi_in_ucam1: endpoint@1 { 295 reg = <1>; 296 remote-endpoint = <&ucam_out1>; 297 data-lanes = <1 2>; 298 }; 299 }; 300 301 port@1 { 302 reg = <1>; 303 #address-cells = <1>; 304 #size-cells = <0>; 305 306 dphy_tx1rx1_out: endpoint@0 { 307 reg = <0>; 308 remote-endpoint = <&isp1_mipi_in>; 309 }; 310 }; 311 }; 312}; 313 314&hdmi_sound { 315 status = "okay"; 316}; 317 318&route_edp { 319 status = "okay"; 320}; 321 322&route_hdmi { 323 status = "okay"; 324 connect = <&vopl_out_hdmi>; 325}; 326 327&i2s1 { 328 #sound-dai-cells = <0>; 329 status = "okay"; 330}; 331 332&rk809_sound { 333 status = "okay"; 334}; 335 336&hdmi_in_vopb { 337 status = "disabled"; 338}; 339 340&rkisp1_0 { 341 status = "okay"; 342 343 port { 344 #address-cells = <1>; 345 #size-cells = <0>; 346 347 isp0_mipi_in: endpoint@0 { 348 reg = <0>; 349 remote-endpoint = <&dphy_rx0_out>; 350 }; 351 }; 352}; 353 354&rkisp1_1 { 355 status = "okay"; 356 pinctrl-names = "default"; 357 pinctrl-0 = <&cif_clkout &isp_dvp_d0d7>; 358 port { 359 #address-cells = <1>; 360 #size-cells = <0>; 361 362 isp1_mipi_in: endpoint@0 { 363 reg = <0>; 364 remote-endpoint = <&dphy_tx1rx1_out>; 365 }; 366 dvp_in_fcam: endpoint@1 { 367 reg = <1>; 368 remote-endpoint = <&gc2145_out>; 369 }; 370 }; 371}; 372 373 374&vcca_0v9 { 375 regulator-always-on; 376 regulator-boot-on; 377 regulator-min-microvolt = <900000>; 378 regulator-max-microvolt = <900000>; 379 regulator-name = "vcca_0v9"; 380 regulator-state-mem { 381 regulator-on-in-suspend; 382 regulator-suspend-microvolt = <900000>; 383 }; 384}; 385 386&vcc0v9_soc { 387 regulator-always-on; 388 regulator-boot-on; 389 regulator-min-microvolt = <900000>; 390 regulator-max-microvolt = <900000>; 391 392 regulator-name = "vcc0v9_soc"; 393 regulator-state-mem { 394 regulator-off-in-suspend; 395 }; 396}; 397 398/* 399 * if enable dp_sound, should disable spdif_sound and spdif_out 400 */ 401&spdif_out { 402 status = "disabled"; 403}; 404 405&spdif_sound { 406 status = "disabled"; 407}; 408 409&i2s0 { 410 #sound-dai-cells = <0>; 411 status = "disabled"; 412}; 413 414&tc358749x_sound { 415 status = "disabled"; 416}; 417 418&pinctrl { 419 lcd-panel { 420 lcd_panel_reset: lcd-panel-reset { 421 rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; 422 }; 423 }; 424}; 425 426