xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/rk3368-sziauto-rk618.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
4 *
5 */
6
7/dts-v1/;
8#include "rk3368.dtsi"
9#include "rk3368-android.dtsi"
10#include <dt-bindings/pwm/pwm.h>
11#include <dt-bindings/clock/rk618-cru.h>
12
13/ {
14	model = "Rockchip rk3368 Sziauto board";
15	compatible = "rockchip,sziauto", "rockchip,rk3368";
16
17	panel {
18		compatible = "simple-panel";
19		backlight = <&backlight>;
20		enable-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
21		prepare-delay-ms = <20>;
22		enable-delay-ms = <20>;
23		disable-delay-ms = <20>;
24		unprepare-delay-ms = <20>;
25		bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_SPWG>;
26
27		display-timings {
28			native-mode = <&timing0>;
29
30			timing0: timing0 {
31				clock-frequency = <136000000>;
32				hactive = <1920>;
33				vactive = <1080>;
34				hback-porch = <60>;
35				hfront-porch = <60>;
36				hsync-len = <40>;
37				vback-porch = <4>;
38				vfront-porch = <4>;
39				vsync-len = <3>;
40				hsync-active = <0>;
41				vsync-active = <0>;
42				de-active = <0>;
43				pixelclk-active = <0>;
44			};
45		};
46
47		port {
48			panel_in_lvds: endpoint {
49				remote-endpoint = <&lvds_out_panel>;
50			};
51		};
52	};
53
54	sdio_pwrseq: sdio-pwrseq {
55		compatible = "mmc-pwrseq-simple";
56		clocks = <&rk818 1>;
57		clock-names = "ext_clock";
58		pinctrl-names = "default";
59		pinctrl-0 = <&wifi_enable_h>;
60
61		/*
62		 * On the module itself this is one of these (depending
63		 * on the actual card populated):
64		 * - SDIO_RESET_L_WL_REG_ON
65		 * - PDN (power down when low)
66		 */
67		 reset-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>;
68	};
69
70	backlight: backlight {
71		compatible = "pwm-backlight";
72		pwms = <&pwm0 0 50000 0>;
73		brightness-levels = <
74			 32  32  34  34  36  36  38  38  40  40
75			 42  42  44  44  46  46  48  48  50  50
76			 52  52  54  54  56  56  58  58  60  60
77			 62  62  64  64  66  66  68  68  70  70
78			 72  72  74  74  76  76  78  78  80  80
79			 82  82  84  84  86  86  88  88  90  90
80			 92  92  94  94  96  96  98  98 100 100
81			102 102 104 104 106 106 108 108 110 110
82			112 112 114 114 116 116 118 118 120 120
83			122 122 124 124 126 126 128 128 130 130
84			132 132 134 134 136 136 138 138 140 140
85			142 142 144 144 146 146 148 148 150 150
86			152 152 154 154 156 156 158 158 160 160
87			162 162 164 164 166 166 168 168 170 170
88			172 172 174 174 176 176 178 178 180 180
89			182 182 184 184 186 186 188 188 190 190
90			192 192 194 194 196 196 198 198 200 200
91			202 202 204 204 206 206 208 208 210 210
92			212 212 214 214 216 216 218 218 220 220
93			222 222 224 224 225 225 226 226 227 227
94			228 228 229 229 230 230 231 231 232 232
95			233 233 234 234 235 235 236 236 237 237
96			238 238 239 239 240 240 241 241 242 242
97			243 243 244 244 245 245 246 246 247 247
98			248 248 249 249 250 250 251 251 252 252
99			253 253 254 254 255 255>;
100		default-brightness-level = <120>;
101		enable-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
102	};
103
104	rockchip-key {
105		compatible = "rockchip,key";
106		io-channels = <&saradc 1>;
107		status = "okay";
108
109		vol-up-key {
110			linux,code = <115>;
111			label = "volume up";
112			rockchip,adc_value = <1>;
113		};
114
115		vol-down-key {
116			linux,code = <114>;
117			label = "volume down";
118			rockchip,adc_value = <170>;
119		};
120
121		power-key {
122			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
123			linux,code = <116>;
124			label = "power";
125			gpio-key,wakeup;
126		};
127
128		menu-key {
129			linux,code = <59>;
130			label = "menu";
131			rockchip,adc_value = <355>;
132		};
133
134		home-key {
135			linux,code = <102>;
136			label = "home";
137			rockchip,adc_value = <746>;
138		};
139
140		back-key {
141			linux,code = <158>;
142			label = "back";
143			rockchip,adc_value = <560>;
144		};
145
146		camera-key {
147			linux,code = <212>;
148			label = "camera";
149			rockchip,adc_value = <450>;
150		};
151	};
152
153	vcc_sys: vcc-sys {
154		compatible = "regulator-fixed";
155		regulator-name = "vcc_sys";
156		regulator-always-on;
157		regulator-boot-on;
158		regulator-min-microvolt = <3800000>;
159		regulator-max-microvolt = <3800000>;
160	};
161
162	vcc_host: vcc-host {
163		compatible = "regulator-fixed";
164		enable-active-high;
165		gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
166		pinctrl-names = "default";
167		pinctrl-0 = <&host_vbus_drv>;
168		regulator-name = "vcc_host";
169		regulator-always-on;
170	};
171
172	xin32k: xin32k {
173		compatible = "fixed-clock";
174		clock-frequency = <32768>;
175		clock-output-names = "xin32k";
176		#clock-cells = <0>;
177	};
178};
179
180&firmware_android {
181	compatible = "android,firmware";
182	fstab {
183		compatible = "android,fstab";
184		system {
185			compatible = "android,system";
186			dev = "/dev/block/by-name/system";
187			type = "ext4";
188			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
189			fsmgr_flags = "wait,verify";
190		};
191		vendor {
192			compatible = "android,vendor";
193			dev = "/dev/block/by-name/vendor";
194			type = "ext4";
195			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
196			fsmgr_flags = "wait,verify";
197		};
198	};
199};
200
201&i2c5 {
202	status = "okay";
203
204	rk618@50 {
205		compatible = "rockchip,rk618";
206		reg = <0x50>;
207		pinctrl-names = "default";
208		pinctrl-0 = <&i2s_8ch_mclk>;
209		clocks = <&cru SCLK_I2S_8CH_OUT>;
210		clock-names = "clkin";
211		assigned-clocks = <&cru SCLK_I2S_8CH_OUT>;
212		assigned-clock-rates = <11289600>;
213		reset-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
214		status = "okay";
215
216		clock: cru {
217			compatible = "rockchip,rk618-cru";
218			clocks = <&cru SCLK_I2S_8CH_OUT>, <&cru DCLK_VOP>;
219			clock-names = "clkin", "lcdc0_dclkp";
220			assigned-clocks = <&clock SCALER_PLLIN_CLK>, <&clock VIF_PLLIN_CLK>,
221					  <&clock SCALER_CLK>, <&clock VIF0_PRE_CLK>,
222					  <&clock CODEC_CLK>, <&clock DITHER_CLK>;
223			assigned-clock-parents = <&cru SCLK_I2S_8CH_OUT>, <&clock LCDC0_CLK>,
224						 <&clock SCALER_PLL_CLK>, <&clock VIF_PLL_CLK>,
225						 <&cru SCLK_I2S_8CH_OUT>, <&clock VIF0_CLK>;
226			#clock-cells = <1>;
227			status = "okay";
228		};
229
230		hdmi {
231			compatible = "rockchip,rk618-hdmi";
232			clocks = <&clock HDMI_CLK>;
233			clock-names = "hdmi";
234			assigned-clocks = <&clock HDMI_CLK>;
235			assigned-clock-parents = <&clock VIF0_CLK>;
236			interrupt-parent = <&gpio3>;
237			interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
238			status = "okay";
239
240			ports {
241				#address-cells = <1>;
242				#size-cells = <0>;
243
244				port@0 {
245					reg = <0>;
246
247					hdmi_in_vif: endpoint {
248						remote-endpoint = <&vif_out_hdmi>;
249					};
250				};
251
252				port@1 {
253					reg = <1>;
254
255					hdmi_out_scaler: endpoint {
256						remote-endpoint = <&scaler_in_hdmi>;
257					};
258				};
259			};
260		};
261
262		lvds {
263			compatible = "rockchip,rk618-lvds";
264			clocks = <&clock LVDS_CLK>;
265			clock-names = "lvds";
266			dual-channel;
267			status = "okay";
268
269			ports {
270				#address-cells = <1>;
271				#size-cells = <0>;
272
273				port@0 {
274					reg = <0>;
275
276					lvds_in_scaler: endpoint {
277						remote-endpoint = <&scaler_out_lvds>;
278					};
279				};
280
281				port@1 {
282					reg = <1>;
283
284					lvds_out_panel: endpoint {
285						remote-endpoint = <&panel_in_lvds>;
286					};
287				};
288			};
289		};
290
291		scaler {
292			compatible = "rockchip,rk618-scaler";
293			clocks = <&clock SCALER_CLK>, <&clock VIF0_CLK>,
294				 <&clock DITHER_CLK>;
295			clock-names = "scaler", "vif", "dither";
296			status = "okay";
297
298			ports {
299				#address-cells = <1>;
300				#size-cells = <0>;
301
302				port@0 {
303					reg = <0>;
304
305					scaler_in_hdmi: endpoint {
306						remote-endpoint = <&hdmi_out_scaler>;
307					};
308				};
309
310				port@1 {
311					reg = <1>;
312
313					scaler_out_lvds: endpoint {
314						remote-endpoint = <&lvds_in_scaler>;
315					};
316				};
317			};
318		};
319
320		vif {
321			compatible = "rockchip,rk618-vif";
322			clocks = <&clock VIF0_CLK>, <&clock VIF0_PRE_CLK>;
323			clock-names = "vif", "vif_pre";
324			status = "okay";
325
326			ports {
327				#address-cells = <1>;
328				#size-cells = <0>;
329
330				port@0 {
331					reg = <0>;
332
333					vif_in_rgb: endpoint {
334						remote-endpoint = <&rgb_out_vif>;
335					};
336				};
337
338				port@1 {
339					reg = <1>;
340
341					vif_out_hdmi: endpoint {
342						remote-endpoint = <&hdmi_in_vif>;
343					};
344				};
345			};
346		};
347	};
348};
349
350&rgb {
351	status = "okay";
352
353	ports {
354		port@1 {
355			reg = <1>;
356
357			rgb_out_vif: endpoint {
358				remote-endpoint = <&vif_in_rgb>;
359			};
360		};
361	};
362};
363
364&route_rgb {
365	status = "okay";
366};
367
368&emmc {
369	status = "okay";
370	bus-width = <8>;
371	cap-mmc-highspeed;
372	mmc-hs200-1_8v;
373	no-sdio;
374	no-sd;
375	disable-wp;
376	non-removable;
377	num-slots = <1>;
378	pinctrl-names = "default";
379	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
380};
381
382&sdmmc {
383	status = "disabled";
384	clock-frequency = <37500000>;
385	clock-freq-min-max = <400000 37500000>;
386	no-sdio;
387	no-mmc;
388	cap-mmc-highspeed;
389	cap-sd-highspeed;
390	card-detect-delay = <200>;
391	disable-wp;
392	num-slots = <1>;
393	pinctrl-names = "default";
394	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
395};
396
397&sdio0 {
398	clock-frequency = <50000000>;
399	clock-freq-min-max = <200000 50000000>;
400	no-sd;
401	no-mmc;
402	bus-width = <4>;
403	disable-wp;
404	cap-sd-highspeed;
405	cap-sdio-irq;
406	keep-power-in-suspend;
407	mmc-pwrseq = <&sdio_pwrseq>;
408	non-removable;
409	num-slots = <1>;
410	pinctrl-names = "default";
411	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
412	sd-uhs-sdr104;
413	status = "okay";
414};
415
416&i2c0 {
417	status = "okay";
418
419	syr827: syr827@40 {
420		compatible = "silergy,syr827";
421		reg = <0x40>;
422		fcs,suspend-voltage-selector = <1>;
423
424		regulator-compatible = "fan53555-reg";
425		regulator-name = "vdd_arm";
426		regulator-min-microvolt = <712500>;
427		regulator-max-microvolt = <1500000>;
428		regulator-ramp-delay = <1000>;
429		regulator-always-on;
430		regulator-boot-on;
431		regulator-initial-state = <3>;
432
433		regulator-state-mem {
434			regulator-off-in-suspend;
435			regulator-suspend-microvolt = <900000>;
436		};
437	};
438
439	rk818: pmic@1c {
440		compatible = "rockchip,rk818";
441		reg = <0x1c>;
442		clock-output-names = "rk818-clkout1", "wifibt_32kin";
443		interrupt-parent = <&gpio0>;
444		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
445		pinctrl-names = "default";
446		pinctrl-0 = <&pmic_int_l>;
447		rockchip,system-power-controller;
448		wakeup-source;
449		#clock-cells = <1>;
450
451		vcc1-supply = <&vcc_sys>;
452		vcc2-supply = <&vcc_sys>;
453		vcc3-supply = <&vcc_sys>;
454		vcc4-supply = <&vcc_sys>;
455		vcc6-supply = <&vcc_sys>;
456		vcc7-supply = <&vcc_sys>;
457		vcc8-supply = <&vcc_sys>;
458		vcc9-supply = <&vcc_io>;
459
460		regulators {
461			vdd_logic: DCDC_REG1 {
462				regulator-name = "vdd_logic";
463				regulator-always-on;
464				regulator-boot-on;
465				regulator-min-microvolt = <750000>;
466				regulator-max-microvolt = <1450000>;
467				regulator-ramp-delay = <6001>;
468
469				regulator-state-mem {
470					regulator-on-in-suspend;
471					regulator-suspend-microvolt = <1000000>;
472				};
473			};
474
475			vdd_gpu: DCDC_REG2 {
476				regulator-name = "vdd_gpu";
477				regulator-always-on;
478				regulator-boot-on;
479				regulator-min-microvolt = <800000>;
480				regulator-max-microvolt = <1250000>;
481				regulator-ramp-delay = <6001>;
482
483				regulator-state-mem {
484					regulator-on-in-suspend;
485					regulator-suspend-microvolt = <1000000>;
486				};
487			};
488
489			vcc_ddr: DCDC_REG3 {
490				regulator-always-on;
491				regulator-boot-on;
492				regulator-name = "vcc_ddr";
493
494				regulator-state-mem {
495					regulator-on-in-suspend;
496				};
497			};
498
499			vcc_io: DCDC_REG4 {
500				regulator-always-on;
501				regulator-boot-on;
502				regulator-min-microvolt = <3300000>;
503				regulator-max-microvolt = <3300000>;
504				regulator-name = "vcc_io";
505
506				regulator-state-mem {
507					regulator-on-in-suspend;
508					regulator-suspend-microvolt = <3300000>;
509				};
510			};
511
512			vcca_codec: LDO_REG1 {
513				regulator-always-on;
514				regulator-boot-on;
515				regulator-min-microvolt = <3300000>;
516				regulator-max-microvolt = <3300000>;
517				regulator-name = "vcca_codec";
518
519				regulator-state-mem {
520					regulator-on-in-suspend;
521					regulator-suspend-microvolt = <3300000>;
522				};
523			};
524
525			vcc_tp: LDO_REG2 {
526				regulator-always-on;
527				regulator-boot-on;
528				regulator-min-microvolt = <3000000>;
529				regulator-max-microvolt = <3000000>;
530				regulator-name = "vcc_tp";
531
532				regulator-state-mem {
533					regulator-off-in-suspend;
534				};
535			};
536
537			vdd_10: LDO_REG3 {
538				regulator-always-on;
539				regulator-boot-on;
540				regulator-min-microvolt = <1000000>;
541				regulator-max-microvolt = <1000000>;
542				regulator-name = "vdd_10";
543
544				regulator-state-mem {
545					regulator-on-in-suspend;
546					regulator-suspend-microvolt = <1000000>;
547				};
548			};
549
550			vcc18_lcd: LDO_REG4 {
551				regulator-always-on;
552				regulator-boot-on;
553				regulator-min-microvolt = <1800000>;
554				regulator-max-microvolt = <1800000>;
555				regulator-name = "vcc18_lcd";
556
557				regulator-state-mem {
558					regulator-on-in-suspend;
559					regulator-suspend-microvolt = <1800000>;
560				};
561			};
562
563			vccio_pmu: LDO_REG5 {
564				regulator-always-on;
565				regulator-boot-on;
566				regulator-min-microvolt = <1800000>;
567				regulator-max-microvolt = <1800000>;
568				regulator-name = "vccio_pmu";
569
570				regulator-state-mem {
571					regulator-on-in-suspend;
572					regulator-suspend-microvolt = <1800000>;
573				};
574			};
575
576			vdd10_lcd: LDO_REG6 {
577				regulator-always-on;
578				regulator-boot-on;
579				regulator-min-microvolt = <1000000>;
580				regulator-max-microvolt = <1000000>;
581				regulator-name = "vdd10_lcd";
582
583				regulator-state-mem {
584					regulator-on-in-suspend;
585					regulator-suspend-microvolt = <1000000>;
586				};
587			};
588
589			vcc_18: LDO_REG7 {
590				regulator-always-on;
591				regulator-boot-on;
592				regulator-min-microvolt = <1800000>;
593				regulator-max-microvolt = <1800000>;
594				regulator-name = "vcc_18";
595
596				regulator-state-mem {
597					regulator-on-in-suspend;
598					regulator-suspend-microvolt = <1800000>;
599				};
600			};
601
602			vccio_wl: LDO_REG8 {
603				regulator-always-on;
604				regulator-boot-on;
605				regulator-min-microvolt = <1800000>;
606				regulator-max-microvolt = <3300000>;
607				regulator-name = "vccio_wl";
608
609				regulator-state-mem {
610					regulator-on-in-suspend;
611					regulator-suspend-microvolt = <3300000>;
612				};
613			};
614
615			vccio_sd: LDO_REG9 {
616				regulator-always-on;
617				regulator-boot-on;
618				regulator-min-microvolt = <1800000>;
619				regulator-max-microvolt = <3300000>;
620				regulator-name = "vccio_sd";
621
622				regulator-state-mem {
623					regulator-on-in-suspend;
624					regulator-suspend-microvolt = <3300000>;
625				};
626			};
627
628			vcc_sd: SWITCH_REG {
629				regulator-always-on;
630				regulator-boot-on;
631				regulator-name = "vcc_sd";
632
633				regulator-state-mem {
634					regulator-on-in-suspend;
635				};
636			};
637
638			boost_otg: DCDC_BOOST {
639				regulator-name = "boost_otg";
640				regulator-always-on;
641				regulator-boot-on;
642				regulator-min-microvolt = <5000000>;
643				regulator-max-microvolt = <5000000>;
644
645				regulator-state-mem {
646					regulator-on-in-suspend;
647					regulator-suspend-microvolt = <5000000>;
648				};
649			};
650		};
651	};
652};
653
654&cpu_l0 {
655	cpu-supply = <&syr827>;
656};
657
658&cpu_l1 {
659	cpu-supply = <&syr827>;
660};
661
662&cpu_l2 {
663	cpu-supply = <&syr827>;
664};
665
666&cpu_l3 {
667	cpu-supply = <&syr827>;
668};
669
670&cpu_b0 {
671	cpu-supply = <&syr827>;
672};
673
674&cpu_b1 {
675	cpu-supply = <&syr827>;
676};
677
678&cpu_b2 {
679	cpu-supply = <&syr827>;
680};
681
682&cpu_b3 {
683	cpu-supply = <&syr827>;
684};
685
686&gpu {
687	logic-supply = <&vdd_logic>;
688};
689
690&io_domains {
691	dvp-supply = <&vcc_18>;
692	audio-supply = <&vcc_io>;
693	gpio30-supply = <&vcc_io>;
694	gpio1830-supply = <&vcc_io>;
695	sdcard-supply = <&vccio_sd>;
696	wifi-supply = <&vccio_wl>;
697	status = "okay";
698};
699
700&pmu_io_domains {
701	pmu-supply = <&vcc_io>;
702	vop-supply = <&vcc_io>;
703	status = "okay";
704};
705
706&pwm0 {
707	status = "okay";
708};
709
710&pwm1 {
711	status = "okay";
712};
713
714&uart0 {
715	pinctrl-names = "default";
716	pinctrl-0 = <&uart0_xfer &uart0_cts>;
717	status = "okay";
718};
719
720&u2phy {
721	status = "okay";
722
723	u2phy_host: host-port {
724		phy-supply = <&vcc_host>;
725		status = "okay";
726	};
727};
728
729&usb_host0_ehci {
730	status = "okay";
731};
732
733&usb_host0_ohci {
734	status = "okay";
735};
736
737&mailbox {
738	status = "okay";
739};
740
741&mailbox_scpi {
742	status = "okay";
743};
744
745&saradc {
746	status = "okay";
747};
748
749&tsadc {
750	tsadc-supply = <&syr827>;
751	status = "okay";
752};
753
754&pinctrl {
755	pmic {
756		pmic_int_l: pmic-int-l {
757			rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
758		};
759	};
760
761	usb2 {
762		host_vbus_drv: host-vbus-drv {
763			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
764		};
765	};
766
767	sdio-pwrseq {
768		wifi_enable_h: wifi-enable-h {
769			rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
770		};
771	};
772};
773