1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 4 */ 5 6/dts-v1/; 7#include <dt-bindings/gpio/gpio.h> 8#include <dt-bindings/pinctrl/rockchip.h> 9#include <dt-bindings/input/input.h> 10#include <dt-bindings/display/drm_mipi_dsi.h> 11#include <dt-bindings/sensor-dev.h> 12#include "px30.dtsi" 13#include "px30-android.dtsi" 14 15/ { 16 model = "Rockchip PX30 AD D6 board"; 17 compatible = "rockchip,px30-ad-d6", "rockchip,px30"; 18 19 dvdd12_anx: dvdd12-anx { 20 compatible = "regulator-fixed"; 21 regulator-name = "dvdd12-anx"; 22 regulator-boot-on; 23 gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; 24 enable-active-high; 25 26 regulator-state-mem { 27 regulator-off-in-suspend; 28 }; 29 }; 30 31 adc-keys { 32 compatible = "adc-keys"; 33 io-channels = <&saradc 2>; 34 io-channel-names = "buttons"; 35 poll-interval = <100>; 36 keyup-threshold-microvolt = <1800000>; 37 38 esc-key { 39 linux,code = <KEY_ESC>; 40 label = "esc"; 41 press-threshold-microvolt = <1310000>; 42 }; 43 44 home-key { 45 linux,code = <KEY_HOME>; 46 label = "home"; 47 press-threshold-microvolt = <624000>; 48 }; 49 50 menu-key { 51 linux,code = <KEY_MENU>; 52 label = "menu"; 53 press-threshold-microvolt = <987000>; 54 }; 55 56 vol-down-key { 57 linux,code = <KEY_VOLUMEDOWN>; 58 label = "volume down"; 59 press-threshold-microvolt = <300000>; 60 }; 61 62 vol-up-key { 63 linux,code = <KEY_VOLUMEUP>; 64 label = "volume up"; 65 press-threshold-microvolt = <17000>; 66 }; 67 }; 68 69 backlight: backlight { 70 compatible = "pwm-backlight"; 71 pwms = <&pwm1 0 25000 0>; 72 brightness-levels = < 73 0 1 2 3 4 5 6 7 74 8 9 10 11 12 13 14 15 75 16 17 18 19 20 21 22 23 76 24 25 26 27 28 29 30 31 77 32 33 34 35 36 37 38 39 78 40 41 42 43 44 45 46 47 79 48 49 50 51 52 53 54 55 80 56 57 58 59 60 61 62 63 81 64 65 66 67 68 69 70 71 82 72 73 74 75 76 77 78 79 83 80 81 82 83 84 85 86 87 84 88 89 90 91 92 93 94 95 85 96 97 98 99 100 101 102 103 86 104 105 106 107 108 109 110 111 87 112 113 114 115 116 117 118 119 88 120 121 122 123 124 125 126 127 89 128 129 130 131 132 133 134 135 90 136 137 138 139 140 141 142 143 91 144 145 146 147 148 149 150 151 92 152 153 154 155 156 157 158 159 93 160 161 162 163 164 165 166 167 94 168 169 170 171 172 173 174 175 95 176 177 178 179 180 181 182 183 96 184 185 186 187 188 189 190 191 97 192 193 194 195 196 197 198 199 98 200 201 202 203 204 205 206 207 99 208 209 210 211 212 213 214 215 100 216 217 218 219 220 221 222 223 101 224 225 226 227 228 229 230 231 102 232 233 234 235 236 237 238 239 103 240 241 242 243 244 245 246 247 104 248 249 250 251 252 253 254 255>; 105 default-brightness-level = <200>; 106 enable-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; 107 }; 108 109 sdio_pwrseq: sdio-pwrseq { 110 compatible = "mmc-pwrseq-simple"; 111 pinctrl-names = "default"; 112 pinctrl-0 = <&wifi_enable_h>; 113 114 /* 115 * On the module itself this is one of these (depending 116 * on the actual card populated): 117 * - SDIO_RESET_L_WL_REG_ON 118 * - PDN (power down when low) 119 */ 120 reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; 121 }; 122 123 vcc_phy: vcc-phy-regulator { 124 compatible = "regulator-fixed"; 125 regulator-name = "vcc_phy"; 126 regulator-always-on; 127 regulator-boot-on; 128 }; 129 130 vcc5v0_sys: vccsys { 131 compatible = "regulator-fixed"; 132 regulator-name = "vcc5v0_sys"; 133 regulator-always-on; 134 regulator-boot-on; 135 regulator-min-microvolt = <5000000>; 136 regulator-max-microvolt = <5000000>; 137 }; 138}; 139 140&bus_apll { 141 bus-supply = <&vdd_logic>; 142 status = "okay"; 143}; 144 145&cpu0 { 146 cpu-supply = <&vdd_arm>; 147}; 148 149&dfi { 150 status = "okay"; 151}; 152 153&dmc { 154 auto-freq-en = <0>; 155 center-supply = <&vdd_logic>; 156 status = "okay"; 157}; 158 159&emmc { 160 bus-width = <8>; 161 cap-mmc-highspeed; 162 mmc-hs200-1_8v; 163 no-sdio; 164 no-sd; 165 disable-wp; 166 non-removable; 167 num-slots = <1>; 168 status = "okay"; 169}; 170 171&gpu { 172 mali-supply = <&vdd_logic>; 173 status = "okay"; 174}; 175 176&i2c0 { 177 status = "okay"; 178 179 rk809: pmic@20 { 180 compatible = "rockchip,rk809"; 181 reg = <0x20>; 182 interrupt-parent = <&gpio0>; 183 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 184 pinctrl-names = "default", "pmic-sleep", 185 "pmic-power-off", "pmic-reset"; 186 pinctrl-0 = <&pmic_int>; 187 pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; 188 pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; 189 pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>; 190 rockchip,system-power-controller; 191 wakeup-source; 192 #clock-cells = <1>; 193 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 194 pmic-reset-func = <1>; 195 196 vcc1-supply = <&vcc5v0_sys>; 197 vcc2-supply = <&vcc5v0_sys>; 198 vcc3-supply = <&vcc5v0_sys>; 199 vcc4-supply = <&vcc5v0_sys>; 200 vcc5-supply = <&vcc3v3_sys>; 201 vcc6-supply = <&vcc3v3_sys>; 202 vcc7-supply = <&vcc3v3_sys>; 203 vcc8-supply = <&vcc3v3_sys>; 204 vcc9-supply = <&vcc5v0_sys>; 205 206 pwrkey { 207 status = "okay"; 208 }; 209 210 pinctrl_rk8xx: pinctrl_rk8xx { 211 gpio-controller; 212 #gpio-cells = <2>; 213 214 rk817_slppin_null: rk817_slppin_null { 215 pins = "gpio_slp"; 216 function = "pin_fun0"; 217 }; 218 219 rk817_slppin_slp: rk817_slppin_slp { 220 pins = "gpio_slp"; 221 function = "pin_fun1"; 222 }; 223 224 rk817_slppin_pwrdn: rk817_slppin_pwrdn { 225 pins = "gpio_slp"; 226 function = "pin_fun2"; 227 }; 228 229 rk817_slppin_rst: rk817_slppin_rst { 230 pins = "gpio_slp"; 231 function = "pin_fun3"; 232 }; 233 }; 234 235 regulators { 236 vdd_logic: DCDC_REG1 { 237 regulator-always-on; 238 regulator-boot-on; 239 regulator-min-microvolt = <850000>; 240 regulator-max-microvolt = <1350000>; 241 regulator-ramp-delay = <6001>; 242 regulator-initial-mode = <0x2>; 243 regulator-name = "vdd_logic"; 244 245 regulator-state-mem { 246 regulator-on-in-suspend; 247 regulator-suspend-microvolt = <950000>; 248 }; 249 }; 250 251 vdd_arm: DCDC_REG2 { 252 regulator-always-on; 253 regulator-boot-on; 254 regulator-min-microvolt = <850000>; 255 regulator-max-microvolt = <1350000>; 256 regulator-ramp-delay = <6001>; 257 regulator-initial-mode = <0x2>; 258 regulator-name = "vdd_arm"; 259 260 regulator-state-mem { 261 regulator-off-in-suspend; 262 regulator-suspend-microvolt = <950000>; 263 }; 264 }; 265 266 vcc_ddr: DCDC_REG3 { 267 regulator-always-on; 268 regulator-boot-on; 269 regulator-name = "vcc_ddr"; 270 regulator-initial-mode = <0x2>; 271 272 regulator-state-mem { 273 regulator-on-in-suspend; 274 }; 275 }; 276 277 vcc_3v0: DCDC_REG4 { 278 regulator-always-on; 279 regulator-boot-on; 280 regulator-min-microvolt = <3000000>; 281 regulator-max-microvolt = <3000000>; 282 regulator-initial-mode = <0x2>; 283 regulator-name = "vcc_3v0"; 284 285 regulator-state-mem { 286 regulator-on-in-suspend; 287 regulator-suspend-microvolt = <3000000>; 288 }; 289 }; 290 291 vcc_1v0: LDO_REG1 { 292 regulator-always-on; 293 regulator-boot-on; 294 regulator-min-microvolt = <1000000>; 295 regulator-max-microvolt = <1000000>; 296 regulator-name = "vcc_1v0"; 297 298 regulator-state-mem { 299 regulator-on-in-suspend; 300 regulator-suspend-microvolt = <1000000>; 301 }; 302 }; 303 304 vcc1v8_soc: LDO_REG2 { 305 regulator-always-on; 306 regulator-boot-on; 307 regulator-min-microvolt = <1800000>; 308 regulator-max-microvolt = <1800000>; 309 regulator-name = "vcc1v8_soc"; 310 311 regulator-state-mem { 312 regulator-on-in-suspend; 313 regulator-suspend-microvolt = <1800000>; 314 }; 315 }; 316 317 vdd1v0_soc: LDO_REG3 { 318 regulator-always-on; 319 regulator-boot-on; 320 regulator-min-microvolt = <1000000>; 321 regulator-max-microvolt = <1000000>; 322 regulator-name = "vcc1v0_soc"; 323 324 regulator-state-mem { 325 regulator-on-in-suspend; 326 regulator-suspend-microvolt = <1000000>; 327 }; 328 }; 329 330 vcc3v0_pmu: LDO_REG4 { 331 regulator-always-on; 332 regulator-boot-on; 333 regulator-min-microvolt = <3300000>; 334 regulator-max-microvolt = <3300000>; 335 regulator-name = "vcc3v0_pmu"; 336 337 regulator-state-mem { 338 regulator-on-in-suspend; 339 regulator-suspend-microvolt = <3300000>; 340 341 }; 342 }; 343 344 vccio_sd: LDO_REG5 { 345 regulator-always-on; 346 regulator-boot-on; 347 regulator-min-microvolt = <1800000>; 348 regulator-max-microvolt = <3300000>; 349 regulator-name = "vccio_sd"; 350 351 regulator-state-mem { 352 regulator-on-in-suspend; 353 regulator-suspend-microvolt = <3300000>; 354 }; 355 }; 356 357 vcc_sd: LDO_REG6 { 358 regulator-min-microvolt = <3300000>; 359 regulator-max-microvolt = <3300000>; 360 regulator-name = "vcc_sd"; 361 362 regulator-state-mem { 363 regulator-on-in-suspend; 364 regulator-suspend-microvolt = <3300000>; 365 366 }; 367 }; 368 369 vcc2v8_dvp: LDO_REG7 { 370 regulator-always-on; 371 regulator-boot-on; 372 regulator-min-microvolt = <2800000>; 373 regulator-max-microvolt = <2800000>; 374 regulator-name = "vcc2v8_dvp"; 375 376 regulator-state-mem { 377 regulator-off-in-suspend; 378 regulator-suspend-microvolt = <2800000>; 379 }; 380 }; 381 382 vcc1v8_dvp: LDO_REG8 { 383 regulator-always-on; 384 regulator-boot-on; 385 regulator-min-microvolt = <1800000>; 386 regulator-max-microvolt = <1800000>; 387 regulator-name = "vcc1v8_dvp"; 388 389 regulator-state-mem { 390 regulator-on-in-suspend; 391 regulator-suspend-microvolt = <1800000>; 392 }; 393 }; 394 395 vdd1v5_dvp: LDO_REG9 { 396 regulator-always-on; 397 regulator-boot-on; 398 regulator-min-microvolt = <1500000>; 399 regulator-max-microvolt = <1500000>; 400 regulator-name = "vdd1v5_dvp"; 401 402 regulator-state-mem { 403 regulator-off-in-suspend; 404 regulator-suspend-microvolt = <1500000>; 405 }; 406 }; 407 408 vcc3v3_sys: DCDC_REG5 { 409 regulator-always-on; 410 regulator-boot-on; 411 regulator-min-microvolt = <3300000>; 412 regulator-max-microvolt = <3300000>; 413 regulator-name = "vcc3v3_sys"; 414 415 regulator-state-mem { 416 regulator-on-in-suspend; 417 regulator-suspend-microvolt = <3300000>; 418 }; 419 }; 420 421 vcc5v0_host: SWITCH_REG1 { 422 regulator-name = "vcc5v0_host"; 423 }; 424 425 vcc3v3_lcd: SWITCH_REG2 { 426 regulator-boot-on; 427 regulator-name = "vcc3v3_lcd"; 428 429 regulator-state-mem { 430 regulator-off-in-suspend; 431 }; 432 }; 433 }; 434 }; 435}; 436 437&io_domains { 438 vccio1-supply = <&vcc1v8_soc>; 439 vccio2-supply = <&vccio_sd>; 440 vccio3-supply = <&vcc_3v0>; 441 vccio4-supply = <&vcc3v0_pmu>; 442 vccio5-supply = <&vcc_3v0>; 443 status = "okay"; 444}; 445 446&nandc0 { 447 status = "okay"; 448}; 449 450&pmu_io_domains { 451 pmuio1-supply = <&vcc3v0_pmu>; 452 pmuio2-supply = <&vcc3v0_pmu>; 453 status = "okay"; 454}; 455 456&pwm1 { 457 status = "okay"; 458}; 459 460&rk_rga { 461 status = "okay"; 462}; 463 464&rockchip_suspend { 465 rockchip,sleep-debug-en = <1>; 466 status = "okay"; 467}; 468 469&saradc { 470 vref-supply = <&vcc1v8_soc>; 471 status = "okay"; 472}; 473 474&sdmmc { 475 bus-width = <4>; 476 cap-mmc-highspeed; 477 cap-sd-highspeed; 478 no-sdio; 479 no-mmc; 480 card-detect-delay = <800>; 481 ignore-pm-notify; 482 sd-uhs-sdr12; 483 sd-uhs-sdr25; 484 sd-uhs-sdr50; 485 sd-uhs-sdr104; 486 vqmmc-supply = <&vccio_sd>; 487 vmmc-supply = <&vcc_sd>; 488 status = "okay"; 489}; 490 491&sdio { 492 bus-width = <4>; 493 cap-sd-highspeed; 494 no-sd; 495 no-mmc; 496 ignore-pm-notify; 497 keep-power-in-suspend; 498 non-removable; 499 mmc-pwrseq = <&sdio_pwrseq>; 500 sd-uhs-sdr104; 501 status = "okay"; 502}; 503 504&tsadc { 505 pinctrl-names = "init", "default"; 506 pinctrl-0 = <&tsadc_otp_gpio>; 507 pinctrl-1 = <&tsadc_otp_out>; 508 status = "okay"; 509}; 510 511&uart1 { 512 pinctrl-names = "default"; 513 pinctrl-0 = <&uart1_xfer &uart1_cts>; 514 status = "okay"; 515}; 516 517&u2phy { 518 status = "okay"; 519 520 u2phy_host: host-port { 521 status = "okay"; 522 }; 523 524 u2phy_otg: otg-port { 525 status = "okay"; 526 }; 527}; 528 529&usb20_otg { 530 status = "okay"; 531}; 532 533&usb_host0_ehci { 534 status = "okay"; 535}; 536 537&usb_host0_ohci { 538 status = "okay"; 539}; 540 541&display_subsystem { 542 status = "okay"; 543}; 544 545&vopb { 546 status = "okay"; 547}; 548 549&vopb_mmu { 550 status = "okay"; 551}; 552 553&vopl { 554 status = "okay"; 555}; 556 557&vopl_mmu { 558 status = "okay"; 559}; 560 561&mpp_srv { 562 status = "okay"; 563}; 564 565&vdpu { 566 status = "okay"; 567}; 568 569&vepu { 570 status = "okay"; 571}; 572 573&vpu_mmu { 574 status = "okay"; 575}; 576 577&hevc { 578 status = "okay"; 579}; 580 581&hevc_mmu { 582 status = "okay"; 583}; 584 585&i2c1 { 586 status = "okay"; 587 588 anx6345@38 { 589 compatible = "analogix,anx6345"; 590 reg = <0x38>; 591 reset-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; 592 panel-supply = <&vcc3v3_lcd>; 593 dvdd25-supply = <&vcc3v3_lcd>; 594 dvdd12-supply = <&dvdd12_anx>; 595 596 ports { 597 #address-cells = <1>; 598 #size-cells = <0>; 599 600 port@0 { 601 reg = <0>; 602 603 anx6345_in_rgb: endpoint { 604 remote-endpoint = <&rgb_out_anx6345>; 605 }; 606 }; 607 }; 608 }; 609}; 610 611&rgb { 612 pinctrl-names = "default", "sleep"; 613 pinctrl-0 = <&lcdc_rgb_pins>; 614 pinctrl-1 = <&lcdc_sleep_pins>; 615 status = "okay"; 616 617 ports { 618 port@1 { 619 reg = <1>; 620 621 rgb_out_anx6345: endpoint { 622 remote-endpoint = <&anx6345_in_rgb>; 623 }; 624 }; 625 }; 626}; 627 628&rgb_in_vopb { 629 status = "okay"; 630}; 631 632&rgb_in_vopl { 633 status = "disabled"; 634}; 635 636&route_rgb { 637 connect = <&vopb_out_rgb>; 638 status = "okay"; 639}; 640 641&pinctrl { 642 lcdc { 643 lcdc_rgb_pins: lcdc-rgb-pins { 644 rockchip,pins = 645 <3 RK_PA0 1 &pcfg_pull_none_8ma>, /* LCDC_DCLK */ 646 <3 RK_PA1 1 &pcfg_pull_none_8ma>, /* LCDC_HSYNC */ 647 <3 RK_PA2 1 &pcfg_pull_none_8ma>, /* LCDC_VSYNC */ 648 <3 RK_PA3 1 &pcfg_pull_none_8ma>, /* LCDC_DEN */ 649 <3 RK_PD3 1 &pcfg_pull_none_8ma>, /* LCDC_D23 */ 650 <3 RK_PD2 1 &pcfg_pull_none_8ma>, /* LCDC_D22 */ 651 <3 RK_PD1 1 &pcfg_pull_none_8ma>, /* LCDC_D21 */ 652 <3 RK_PD0 1 &pcfg_pull_none_8ma>, /* LCDC_D20 */ 653 <3 RK_PC7 1 &pcfg_pull_none_8ma>, /* LCDC_D19 */ 654 <3 RK_PC6 1 &pcfg_pull_none_8ma>, /* LCDC_D18 */ 655 <3 RK_PC5 1 &pcfg_pull_none_8ma>, /* LCDC_D17 */ 656 <3 RK_PC4 1 &pcfg_pull_none_8ma>, /* LCDC_D16 */ 657 <3 RK_PC3 1 &pcfg_pull_none_8ma>, /* LCDC_D15 */ 658 <3 RK_PC2 1 &pcfg_pull_none_8ma>, /* LCDC_D14 */ 659 <3 RK_PC1 1 &pcfg_pull_none_8ma>, /* LCDC_D13 */ 660 <3 RK_PC0 1 &pcfg_pull_none_8ma>, /* LCDC_D12 */ 661 <3 RK_PB7 1 &pcfg_pull_none_8ma>, /* LCDC_D11 */ 662 <3 RK_PB6 1 &pcfg_pull_none_8ma>, /* LCDC_D10 */ 663 <3 RK_PB5 1 &pcfg_pull_none_8ma>, /* LCDC_D9 */ 664 <3 RK_PB4 1 &pcfg_pull_none_8ma>, /* LCDC_D8 */ 665 <3 RK_PB3 1 &pcfg_pull_none_8ma>, /* LCDC_D7 */ 666 <3 RK_PB2 1 &pcfg_pull_none_8ma>, /* LCDC_D6 */ 667 <3 RK_PB1 1 &pcfg_pull_none_8ma>, /* LCDC_D5 */ 668 <3 RK_PB0 1 &pcfg_pull_none_8ma>, /* LCDC_D4 */ 669 <3 RK_PA7 1 &pcfg_pull_none_8ma>, /* LCDC_D3 */ 670 <3 RK_PA6 1 &pcfg_pull_none_8ma>, /* LCDC_D2 */ 671 <3 RK_PA5 1 &pcfg_pull_none_8ma>, /* LCDC_D1 */ 672 <3 RK_PA4 1 &pcfg_pull_none_8ma>; /* LCDC_D0 */ 673 }; 674 675 lcdc_sleep_pins: lcdc-sleep-pins { 676 rockchip,pins = 677 <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DCLK */ 678 <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_HSYNC */ 679 <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_VSYNC */ 680 <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_DEN */ 681 <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D23 */ 682 <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D22 */ 683 <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D21 */ 684 <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D20 */ 685 <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D19 */ 686 <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D18 */ 687 <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D17 */ 688 <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D16 */ 689 <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D15 */ 690 <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D14 */ 691 <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D13 */ 692 <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D12 */ 693 <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D11 */ 694 <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D10 */ 695 <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D9 */ 696 <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D8 */ 697 <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D7 */ 698 <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D6 */ 699 <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D5 */ 700 <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D4 */ 701 <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D3 */ 702 <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D2 */ 703 <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>, /* LCDC_D1 */ 704 <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; /* LCDC_D0 */ 705 }; 706 }; 707 708 pmic { 709 pmic_int: pmic_int { 710 rockchip,pins = 711 <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; 712 }; 713 714 soc_slppin_gpio: soc_slppin_gpio { 715 rockchip,pins = 716 <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>; 717 }; 718 719 soc_slppin_slp: soc_slppin_slp { 720 rockchip,pins = 721 <0 RK_PA4 1 &pcfg_pull_none>; 722 }; 723 724 soc_slppin_rst: soc_slppin_rst { 725 rockchip,pins = 726 <0 RK_PA4 2 &pcfg_pull_none>; 727 }; 728 }; 729 730 sdio-pwrseq { 731 wifi_enable_h: wifi-enable-h { 732 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 733 }; 734 }; 735}; 736 737&firmware_android { 738 compatible = "android,firmware"; 739 740 fstab { 741 compatible = "android,fstab"; 742 743 system { 744 compatible = "android,system"; 745 dev = "/dev/block/by-name/system"; 746 type = "ext4"; 747 mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; 748 fsmgr_flags = "wait"; 749 }; 750 751 vendor { 752 compatible = "android,vendor"; 753 dev = "/dev/block/by-name/vendor"; 754 type = "ext4"; 755 mnt_flags = "ro,barrier=1,inode_readahead_blks=8"; 756 fsmgr_flags = "wait"; 757 }; 758 }; 759}; 760