1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd. 4 */ 5 6/dts-v1/; 7#include "rv1126.dtsi" 8#include "rv1126-ipc.dtsi" 9#include <dt-bindings/input/input.h> 10 11/ { 12 model = "Rockchip RV1126 SPHERICALIPC DDR3 V10 Board"; 13 compatible = "rockchip,rv1126-sphericalipc-ddr3-v10", "rockchip,rv1126"; 14 15 adc-keys { 16 compatible = "adc-keys"; 17 io-channels = <&saradc 0>; 18 io-channel-names = "buttons"; 19 poll-interval = <100>; 20 keyup-threshold-microvolt = <1800000>; 21 22 recovery { 23 label = "Volum_up"; 24 linux,code = <KEY_VOLUMEUP>; 25 press-threshold-microvolt = <0>; 26 }; 27 }; 28 29 rk809_sound: rk809-sound { 30 compatible = "simple-audio-card"; 31 simple-audio-card,format = "i2s"; 32 simple-audio-card,name = "rockchip,rk809-codec"; 33 simple-audio-card,mclk-fs = <256>; 34 simple-audio-card,widgets = 35 "Microphone", "Mic Jack", 36 "Headphone", "Headphone Jack"; 37 simple-audio-card,routing = 38 "Mic Jack", "MICBIAS1", 39 "IN1P", "Mic Jack", 40 "Headphone Jack", "HPOL", 41 "Headphone Jack", "HPOR"; 42 simple-audio-card,cpu { 43 sound-dai = <&i2s0_8ch>; 44 }; 45 simple-audio-card,codec { 46 sound-dai = <&rk809_codec>; 47 }; 48 }; 49}; 50 51&csi_dphy0 { 52 status = "okay"; 53 54 ports { 55 #address-cells = <1>; 56 #size-cells = <0>; 57 58 port@0 { 59 reg = <0>; 60 #address-cells = <1>; 61 #size-cells = <0>; 62 63 mipi_in_ucam0: endpoint@1 { 64 reg = <1>; 65 remote-endpoint = <&ucam_out0>; 66 data-lanes = <1 2 3 4>; 67 }; 68 }; 69 70 port@1 { 71 reg = <1>; 72 #address-cells = <1>; 73 #size-cells = <0>; 74 75 csidphy0_out: endpoint@0 { 76 reg = <0>; 77 remote-endpoint = <&isp_in>; 78 }; 79 }; 80 81 }; 82}; 83 84&emmc { 85 bus-width = <8>; 86 cap-mmc-highspeed; 87 non-removable; 88 mmc-hs200-1_8v; 89 rockchip,default-sample-phase = <90>; 90 no-sdio; 91 no-sd; 92 /delete-property/ pinctrl-names; 93 /delete-property/ pinctrl-0; 94 status = "okay"; 95}; 96 97&gmac { 98 phy-mode = "rmii"; 99 clock_in_out = "output"; 100 101 snps,reset-gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; 102 snps,reset-active-low; 103 snps,reset-delays-us = <0 50000 50000>; 104 105 assigned-clocks = <&cru CLK_GMAC_SRC>, <&cru CLK_GMAC_TX_RX>; 106 assigned-clock-parents = <&cru CLK_GMAC_SRC_M0>, <&cru RMII_MODE_CLK>; 107 assigned-clock-rates = <50000000>; 108 109 pinctrl-names = "default"; 110 pinctrl-0 = <&rmiim0_miim &rgmiim0_rxer &rmiim0_bus2 &rgmiim0_mclkinout_level0>; 111 112 phy-handle = <&phy>; 113 status = "okay"; 114}; 115 116&i2c0 { 117 status = "okay"; 118 clock-frequency = <400000>; 119 120 rk809: pmic@20 { 121 compatible = "rockchip,rk809"; 122 reg = <0x20>; 123 interrupt-parent = <&gpio0>; 124 interrupts = <9 IRQ_TYPE_LEVEL_LOW>; 125 pinctrl-names = "default", "pmic-sleep", 126 "pmic-power-off", "pmic-reset"; 127 pinctrl-0 = <&pmic_int>; 128 pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; 129 pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; 130 pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>; 131 rockchip,system-power-controller; 132 wakeup-source; 133 #clock-cells = <1>; 134 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 135 /* 0: rst the pmic, 1: rst regs (default in codes) */ 136 pmic-reset-func = <0>; 137 138 vcc1-supply = <&vcc5v0_sys>; 139 vcc2-supply = <&vcc5v0_sys>; 140 vcc3-supply = <&vcc5v0_sys>; 141 vcc4-supply = <&vcc5v0_sys>; 142 vcc5-supply = <&vcc_buck5>; 143 vcc6-supply = <&vcc_buck5>; 144 vcc7-supply = <&vcc5v0_sys>; 145 vcc8-supply = <&vcc3v3_sys>; 146 vcc9-supply = <&vcc5v0_sys>; 147 148 pwrkey { 149 status = "okay"; 150 }; 151 152 pinctrl_rk8xx: pinctrl_rk8xx { 153 gpio-controller; 154 #gpio-cells = <2>; 155 156 /omit-if-no-ref/ 157 rk817_slppin_null: rk817_slppin_null { 158 pins = "gpio_slp"; 159 function = "pin_fun0"; 160 }; 161 162 /omit-if-no-ref/ 163 rk817_slppin_slp: rk817_slppin_slp { 164 pins = "gpio_slp"; 165 function = "pin_fun1"; 166 }; 167 168 /omit-if-no-ref/ 169 rk817_slppin_pwrdn: rk817_slppin_pwrdn { 170 pins = "gpio_slp"; 171 function = "pin_fun2"; 172 }; 173 174 /omit-if-no-ref/ 175 rk817_slppin_rst: rk817_slppin_rst { 176 pins = "gpio_slp"; 177 function = "pin_fun3"; 178 }; 179 }; 180 181 regulators { 182 vdd_logic: DCDC_REG1 { 183 regulator-always-on; 184 regulator-boot-on; 185 regulator-min-microvolt = <800000>; 186 regulator-max-microvolt = <1350000>; 187 regulator-ramp-delay = <6001>; 188 regulator-initial-mode = <0x2>; 189 regulator-name = "vdd_logic"; 190 regulator-state-mem { 191 regulator-on-in-suspend; 192 regulator-suspend-microvolt = <800000>; 193 }; 194 }; 195 196 vdd_arm: DCDC_REG2 { 197 regulator-always-on; 198 regulator-boot-on; 199 regulator-min-microvolt = <800000>; 200 regulator-max-microvolt = <1350000>; 201 regulator-ramp-delay = <6001>; 202 regulator-initial-mode = <0x2>; 203 regulator-name = "vdd_arm"; 204 regulator-state-mem { 205 regulator-off-in-suspend; 206 }; 207 }; 208 209 vcc_ddr: DCDC_REG3 { 210 regulator-always-on; 211 regulator-boot-on; 212 regulator-initial-mode = <0x2>; 213 regulator-name = "vcc_ddr"; 214 regulator-state-mem { 215 regulator-on-in-suspend; 216 }; 217 }; 218 219 vcc3v3_sys: DCDC_REG4 { 220 regulator-always-on; 221 regulator-boot-on; 222 regulator-min-microvolt = <3300000>; 223 regulator-max-microvolt = <3300000>; 224 regulator-initial-mode = <0x2>; 225 regulator-name = "vcc3v3_sys"; 226 regulator-state-mem { 227 regulator-on-in-suspend; 228 regulator-suspend-microvolt = <3300000>; 229 }; 230 }; 231 232 vcc_buck5: DCDC_REG5 { 233 regulator-always-on; 234 regulator-boot-on; 235 regulator-min-microvolt = <2200000>; 236 regulator-max-microvolt = <2200000>; 237 regulator-name = "vcc_buck5"; 238 regulator-state-mem { 239 regulator-on-in-suspend; 240 regulator-suspend-microvolt = <2200000>; 241 }; 242 }; 243 244 vcc_0v8: LDO_REG1 { 245 regulator-always-on; 246 regulator-boot-on; 247 regulator-min-microvolt = <800000>; 248 regulator-max-microvolt = <800000>; 249 regulator-name = "vcc_0v8"; 250 regulator-state-mem { 251 regulator-off-in-suspend; 252 }; 253 }; 254 255 vcc1v8_pmu: LDO_REG2 { 256 regulator-always-on; 257 regulator-boot-on; 258 regulator-min-microvolt = <1800000>; 259 regulator-max-microvolt = <1800000>; 260 regulator-name = "vcc1v8_pmu"; 261 regulator-state-mem { 262 regulator-on-in-suspend; 263 regulator-suspend-microvolt = <1800000>; 264 }; 265 }; 266 267 vdd0v8_pmu: LDO_REG3 { 268 regulator-always-on; 269 regulator-boot-on; 270 regulator-min-microvolt = <800000>; 271 regulator-max-microvolt = <800000>; 272 regulator-name = "vcc0v8_pmu"; 273 regulator-state-mem { 274 regulator-on-in-suspend; 275 regulator-suspend-microvolt = <800000>; 276 }; 277 }; 278 279 vcc_1v8: LDO_REG4 { 280 regulator-always-on; 281 regulator-boot-on; 282 regulator-min-microvolt = <1800000>; 283 regulator-max-microvolt = <1800000>; 284 regulator-name = "vcc_1v8"; 285 regulator-state-mem { 286 regulator-on-in-suspend; 287 regulator-suspend-microvolt = <1800000>; 288 }; 289 }; 290 291 vcc_dovdd: LDO_REG5 { 292 regulator-boot-on; 293 regulator-min-microvolt = <1800000>; 294 regulator-max-microvolt = <1800000>; 295 regulator-name = "vcc_dovdd"; 296 regulator-state-mem { 297 regulator-off-in-suspend; 298 }; 299 }; 300 301 vcc_dvdd: LDO_REG6 { 302 regulator-min-microvolt = <1200000>; 303 regulator-max-microvolt = <1200000>; 304 regulator-name = "vcc_dvdd"; 305 regulator-state-mem { 306 regulator-off-in-suspend; 307 }; 308 }; 309 310 vcc_avdd: LDO_REG7 { 311 regulator-min-microvolt = <2800000>; 312 regulator-max-microvolt = <2800000>; 313 regulator-name = "vcc_avdd"; 314 regulator-state-mem { 315 regulator-off-in-suspend; 316 }; 317 }; 318 319 vccio_sd: LDO_REG8 { 320 regulator-always-on; 321 regulator-boot-on; 322 regulator-min-microvolt = <1800000>; 323 regulator-max-microvolt = <3300000>; 324 regulator-name = "vccio_sd"; 325 regulator-state-mem { 326 regulator-off-in-suspend; 327 }; 328 }; 329 330 vcc_ldo9: LDO_REG9 { 331 regulator-always-off; 332 regulator-boot-off; 333 regulator-name = "vcc_ldo9"; 334 regulator-state-mem { 335 regulator-off-in-suspend; 336 }; 337 }; 338 339 vcc_sw1: SWITCH_REG1 { 340 regulator-always-off; 341 regulator-boot-off; 342 regulator-name = "vcc_sw1"; 343 }; 344 345 vcc_3v3: SWITCH_REG2 { 346 regulator-always-on; 347 regulator-boot-on; 348 regulator-name = "vcc_3v3"; 349 }; 350 }; 351 352 rk809_codec: codec { 353 #sound-dai-cells = <0>; 354 compatible = "rockchip,rk809-codec", "rockchip,rk817-codec"; 355 clocks = <&cru MCLK_I2S0_TX_OUT2IO>; 356 clock-names = "mclk"; 357 pinctrl-names = "default"; 358 assigned-clocks = <&cru MCLK_I2S0_TX_OUT2IO>; 359 assigned-clock-parents = <&cru MCLK_I2S0_TX>; 360 pinctrl-0 = <&i2s0m0_mclk>; 361 hp-volume = <20>; 362 spk-volume = <3>; 363 }; 364 }; 365}; 366 367&i2c1 { 368 status = "okay"; 369 clock-frequency = <400000>; 370 i2c-scl-rising-time-ns = <280>; 371 i2c-scl-falling-time-ns = <16>; 372 373 imx347: imx347@37 { 374 compatible = "sony,imx347"; 375 reg = <0x37>; 376 clocks = <&cru CLK_MIPICSI_OUT>; 377 clock-names = "xvclk"; 378 power-domains = <&power RV1126_PD_VI>; 379 pinctrl-names = "default"; 380 pinctrl-0 = <&mipicsi_clk0>; 381 avdd-supply = <&vcc_avdd>; 382 dovdd-supply = <&vcc_dovdd>; 383 dvdd-supply = <&vcc_dvdd>; 384 pwdn-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; 385 rockchip,camera-module-index = <1>; 386 rockchip,camera-module-facing = "front"; 387 rockchip,camera-module-name = "JSD3425-C1"; 388 rockchip,camera-module-lens-name = "40IRC"; 389 port { 390 ucam_out0: endpoint { 391 remote-endpoint = <&mipi_in_ucam0>; 392 data-lanes = <1 2 3 4>; 393 }; 394 }; 395 }; 396}; 397 398&i2s0_8ch { 399 status = "okay"; 400 #sound-dai-cells = <0>; 401 rockchip,clk-trcm = <1>; 402 rockchip,i2s-rx-route = <3 1 2 0>; 403 pinctrl-names = "default"; 404 pinctrl-0 = <&i2s0m0_sclk_tx 405 &i2s0m0_lrck_tx 406 &i2s0m0_sdo0 407 &i2s0m0_sdo1_sdi3>; 408}; 409 410&mdio { 411 phy: phy@0 { 412 compatible = "ethernet-phy-ieee802.3-c22"; 413 reg = <0x0>; 414 }; 415}; 416 417&mipi_dphy { 418 status = "okay"; 419}; 420 421&pmu_io_domains { 422 status = "okay"; 423 424 pmuio0-supply = <&vcc1v8_pmu>; 425 pmuio1-supply = <&vcc3v3_sys>; 426 vccio2-supply = <&vccio_sd>; 427 vccio4-supply = <&vcc_1v8>; 428 vccio5-supply = <&vcc_3v3>; 429 vccio6-supply = <&vcc_3v3>; 430 vccio7-supply = <&vcc_1v8>; 431}; 432 433&rkisp_vir0 { 434 status = "okay"; 435 436 ports { 437 port@0 { 438 reg = <0>; 439 #address-cells = <1>; 440 #size-cells = <0>; 441 442 isp_in: endpoint@0 { 443 reg = <0>; 444 remote-endpoint = <&csidphy0_out>; 445 }; 446 }; 447 }; 448}; 449 450&saradc { 451 status = "okay"; 452 vref-supply = <&vcc_1v8>; 453}; 454 455&sdmmc { 456 bus-width = <4>; 457 cap-mmc-highspeed; 458 cap-sd-highspeed; 459 card-detect-delay = <200>; 460 rockchip,default-sample-phase = <90>; 461 no-sdio; 462 no-mmc; 463 sd-uhs-sdr12; 464 sd-uhs-sdr25; 465 sd-uhs-sdr104; 466 vqmmc-supply = <&vccio_sd>; 467 status = "okay"; 468}; 469