1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2020 Rockchip Electronics Co., Ltd. 4 */ 5 6/dts-v1/; 7#include "rv1126.dtsi" 8#include "rv1126-rmsl.dtsi" 9#include <dt-bindings/display/media-bus-format.h> 10 11#define LINK_FREQ 400000000 12 13/ { 14 model = "Rockchip RV1126 RMSL DDR3L Board"; 15 compatible = "rockchip,rv1126-rmsl-ddr3L-v1", "rockchip,rv1126"; 16 17 chosen { 18 bootargs = "earlycon=uart8250,mmio32,0xff570000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=ext4 rootwait snd_aloop.index=7"; 19 }; 20 21 gpio-leds { 22 compatible = "gpio-leds"; 23 24 work-led { 25 gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>; 26 linux,default-trigger = "timer"; 27 }; 28 }; 29 30 mipidphy0: mipidphy0 { 31 compatible = "rockchip,rk1608-dphy"; 32 status = "okay"; 33 rockchip,grf = <&grf>; 34 id = <0>; 35 36 cam_nums = <1>; 37 in_mipi = <0>; 38 out_mipi = <0>; 39 link-freqs = /bits/ 64 <LINK_FREQ>; 40 41 sensor_i2c_bus = <0>; 42 sensor_i2c_addr = <0xC0>; 43 sensor-name = "OV9282"; 44 45 rockchip,camera-module-index = <0>; 46 rockchip,camera-module-facing = "back"; 47 rockchip,camera-module-name = "TongJu"; 48 rockchip,camera-module-lens-name = "CHT842-MD"; 49 50 format-config-0 { 51 data_type = <0x2b>; 52 mipi_lane = <2>; 53 field = <1>; 54 colorspace = <8>; 55 code = <MEDIA_BUS_FMT_SBGGR10_1X10>; 56 width = <2560>; 57 height= <1000>; 58 hactive = <2560>; 59 vactive = <1000>; 60 htotal = <3000>; 61 vtotal = <1400>; 62 inch0-info = <1280 800 0x2b 0x2b 1>; 63 outch0-info = <2560 1000 0x2b 0x2b 1>; 64 }; 65 66 ports { 67 #address-cells = <1>; 68 #size-cells = <0>; 69 70 port@0 { 71 rk1608_dphy0_in: endpoint { 72 remote-endpoint = <&rk1608_out0>; 73 data-lanes = <1 2>; 74 }; 75 }; 76 port@1 { 77 rk1608_dphy0_out: endpoint { 78 remote-endpoint = <&mipi_in_ucam0>; 79 clock-lanes = <0>; 80 data-lanes = <1 2>; 81 clock-noncontinuous; 82 link-freqs = /bits/ 64 <LINK_FREQ>; 83 }; 84 }; 85 }; 86 }; 87}; 88 89&csi_dphy0 { 90 status = "okay"; 91 92 ports { 93 #address-cells = <1>; 94 #size-cells = <0>; 95 port@0 { 96 reg = <0>; 97 #address-cells = <1>; 98 #size-cells = <0>; 99 100 mipi_in_ucam0: endpoint@1 { 101 reg = <1>; 102 remote-endpoint = <&rk1608_dphy0_out>; 103 data-lanes = <1 2>; 104 }; 105 }; 106 port@1 { 107 reg = <1>; 108 #address-cells = <1>; 109 #size-cells = <0>; 110 111 csidphy0_out: endpoint@0 { 112 reg = <0>; 113 remote-endpoint = <&mipi_csi2_input>; 114 data-lanes = <1 2>; 115 }; 116 }; 117 }; 118}; 119 120&csi_dphy1 { 121 status = "okay"; 122 123 ports { 124 #address-cells = <1>; 125 #size-cells = <0>; 126 127 port@0 { 128 reg = <0>; 129 #address-cells = <1>; 130 #size-cells = <0>; 131 132 mipi_in_ucam1: endpoint@1 { 133 reg = <1>; 134 remote-endpoint = <&ucam_out1>; 135 data-lanes = <1 2>; 136 }; 137 }; 138 139 port@1 { 140 reg = <1>; 141 #address-cells = <1>; 142 #size-cells = <0>; 143 144 csidphy1_out: endpoint@0 { 145 reg = <0>; 146 remote-endpoint = <&isp_in>; 147 data-lanes = <1 2>; 148 }; 149 }; 150 }; 151}; 152 153&i2c1 { 154 status = "okay"; 155 clock-frequency = <400000>; 156 157 ov02k10: ov02k10@36 { 158 compatible = "ovti,ov02k10"; 159 reg = <0x36>; 160 clocks = <&cru CLK_MIPICSI_OUT>; 161 clock-names = "xvclk"; 162 power-domains = <&power RV1126_PD_VI>; 163 pinctrl-names = "rockchip,camera_default"; 164 pinctrl-0 = <&mipicsi_clk0>; 165 pwren-gpios= <&gpio2 RK_PD7 GPIO_ACTIVE_HIGH>; 166 pwdn-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; 167 reset-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; 168 rockchip,camera-module-index = <1>; 169 rockchip,camera-module-facing = "front"; 170 rockchip,camera-module-name = "ORCF-0249-00-PD-V1"; 171 rockchip,camera-module-lens-name = "xuye"; 172 // NO_HDR:0 HDR_X2:5 HDR_X3:6 173 rockchip,camera-hdr-mode = <0>; 174 port { 175 ucam_out1: endpoint { 176 remote-endpoint = <&mipi_in_ucam1>; 177 data-lanes = <1 2>; 178 }; 179 }; 180 }; 181 182 pisp_dmy: pisp_dmy@37 { 183 compatible = "pisp_dmy"; 184 reg = <0x37>; 185 186 clocks = <&pmucru CLK_WIFI>; 187 clock-names = "xvclk"; 188 189 rockchip,camera-module-index = <0>; 190 rockchip,camera-module-facing = "back"; 191 rockchip,camera-module-name = "TongJu"; 192 rockchip,camera-module-lens-name = "CHT842-MD"; 193 194 port { 195 cam0_out: endpoint { 196 remote-endpoint = <&rk1608_in0>; 197 data-lanes = <1 2>; 198 }; 199 }; 200 }; 201}; 202 203&spi0 { 204 status = "okay"; 205 //assigned-clocks = <&cru SCLK_SPI0>; 206 //assigned-clock-rates = <100000000>; 207 //rx-sample-delay-ns = <10>; 208 //dma-names = "tx", "rx"; 209 pinctrl-names = "default", "high_speed"; 210 pinctrl-0 = <&spi0m1_cs0 &spi1m0_pins>; 211 pinctrl-1 = <&spi0m1_cs0 &spi1m0_pins_hs>; 212 213 spi_rk1608@00 { 214 compatible = "rockchip,rk1608"; 215 status = "okay"; 216 reg = <0>; 217 spi-max-frequency = <50000000>; 218 spi-min-frequency = <16000000>; 219 220 clocks = <&pmucru CLK_WIFI>; 221 clock-names = "mclk"; 222 223 firmware-names = "rk1608.rkl"; 224 225 reset-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; // 226 irq-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; // 227 228 pinctrl-names = "default"; 229 pinctrl-0 = <&preisp_irq_gpios &preisp_reset_gpios &preisp_24m_mclk>; 230 231 /* regulator config */ 232 //vdd-core-regulator = "vdd_preisp"; 233 //vdd-core-microvolt = <1150000>; 234 235 ports { 236 #address-cells = <1>; 237 #size-cells = <0>; 238 port@0 { 239 #address-cells = <1>; 240 #size-cells = <0>; 241 242 reg = <0>; 243 rk1608_out0: endpoint@0 { 244 reg = <0>; 245 remote-endpoint = <&rk1608_dphy0_in>; 246 }; 247 }; 248 249 port@1 { 250 #address-cells = <1>; 251 #size-cells = <0>; 252 253 reg = <1>; 254 rk1608_in0: endpoint@0 { 255 reg = <0>; 256 remote-endpoint = <&cam0_out>; 257 }; 258 }; 259 }; 260 }; 261}; 262 263&pinctrl { 264 rk1608_gpios { 265 preisp_irq_gpios: preisp-irq-gpios { 266 rockchip,pins = 267 <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; 268 }; 269 270 preisp_reset_gpios: preisp-reset-gpios { 271 rockchip,pins = 272 <0 RK_PA5 RK_FUNC_GPIO &pcfg_output_low>; 273 }; 274 275 preisp_24m_mclk: preisp-24m-mclk { 276 rockchip,pins = 277 <0 RK_PA0 1 &pcfg_pull_none>; 278 }; 279 }; 280}; 281