1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd. 4 */ 5 6/ { 7 chosen { 8 bootargs = "earlycon=uart8250,mmio32,0xff570000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=ext4 rootwait snd_aloop.index=7"; 9 }; 10 11 vcc5v0_sys: vccsys { 12 compatible = "regulator-fixed"; 13 regulator-name = "vcc5v0_sys"; 14 regulator-always-on; 15 regulator-boot-on; 16 regulator-min-microvolt = <5000000>; 17 regulator-max-microvolt = <5000000>; 18 }; 19 20 vdd_npu: vdd-npu { 21 compatible = "pwm-regulator"; 22 pwms = <&pwm0 0 5000 1>; 23 regulator-name = "vdd_npu"; 24 regulator-min-microvolt = <650000>; 25 regulator-max-microvolt = <950000>; 26 regulator-init-microvolt = <800000>; 27 regulator-always-on; 28 regulator-boot-on; 29 regulator-settling-time-up-us = <250>; 30 pwm-supply = <&vcc5v0_sys>; 31 status = "okay"; 32 }; 33 34 vdd_vepu: vdd-vepu { 35 compatible = "pwm-regulator"; 36 pwms = <&pwm1 0 5000 1>; 37 regulator-name = "vdd_vepu"; 38 regulator-min-microvolt = <650000>; 39 regulator-max-microvolt = <950000>; 40 regulator-init-microvolt = <800000>; 41 regulator-always-on; 42 regulator-boot-on; 43 regulator-settling-time-up-us = <250>; 44 pwm-supply = <&vcc5v0_sys>; 45 status = "okay"; 46 }; 47}; 48 49&cpu0 { 50 cpu-supply = <&vdd_arm>; 51}; 52 53&cpu_tsadc { 54 status = "okay"; 55}; 56 57&display_subsystem { 58 status = "okay"; 59}; 60 61&fiq_debugger { 62 status = "okay"; 63}; 64 65&mpp_srv { 66 status = "okay"; 67}; 68 69&nandc { 70 /delete-property/ pinctrl-names; 71 /delete-property/ pinctrl-0; 72 status = "disabled"; 73 #address-cells = <1>; 74 #size-cells = <0>; 75 76 nand@0 { 77 reg = <0>; 78 nand-bus-width = <8>; 79 nand-ecc-mode = "hw"; 80 nand-ecc-strength = <16>; 81 nand-ecc-step-size = <1024>; 82 }; 83}; 84 85&npu { 86 npu-supply = <&vdd_npu>; 87 status = "okay"; 88}; 89 90&npu_tsadc { 91 status = "okay"; 92}; 93 94&optee { 95 status = "disabled"; 96}; 97 98&otp { 99 status = "okay"; 100}; 101 102&pinctrl { 103 pmic { 104 /omit-if-no-ref/ 105 pmic_int: pmic_int { 106 rockchip,pins = 107 <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; 108 }; 109 110 /omit-if-no-ref/ 111 soc_slppin_gpio: soc_slppin_gpio { 112 rockchip,pins = 113 <0 RK_PB2 RK_FUNC_GPIO &pcfg_output_low>; 114 }; 115 116 /omit-if-no-ref/ 117 soc_slppin_slp: soc_slppin_slp { 118 rockchip,pins = 119 <0 RK_PB2 1 &pcfg_pull_none>; 120 }; 121 122 /omit-if-no-ref/ 123 soc_slppin_rst: soc_slppin_rst { 124 rockchip,pins = 125 <0 RK_PB2 2 &pcfg_pull_none>; 126 }; 127 }; 128}; 129 130&pwm0 { 131 status = "okay"; 132 pinctrl-names = "active"; 133 pinctrl-0 = <&pwm0m0_pins_pull_down>; 134}; 135 136&pwm1 { 137 status = "okay"; 138 pinctrl-names = "active"; 139 pinctrl-0 = <&pwm1m0_pins_pull_down>; 140}; 141 142&ramoops { 143 status = "okay"; 144}; 145 146&rk_rga { 147 status = "okay"; 148}; 149 150&rkisp { 151 status = "okay"; 152}; 153 154&rkisp_vir0 { 155 status = "okay"; 156}; 157 158&rkisp_mmu { 159 status = "disabled"; 160}; 161 162&rkispp { 163 rockchip,restart-monitor-en; 164 status = "okay"; 165}; 166 167&rkispp_vir0 { 168 status = "okay"; 169}; 170 171&rkispp_mmu { 172 status = "okay"; 173}; 174 175&rkvdec { 176 status = "okay"; 177}; 178 179&rkvdec_mmu { 180 status = "okay"; 181}; 182 183&rkvenc { 184 venc-supply = <&vdd_vepu>; 185 status = "okay"; 186}; 187 188&rkvenc_mmu { 189 status = "okay"; 190}; 191 192&rng { 193 status = "okay"; 194}; 195 196&sfc { 197 /delete-property/ pinctrl-names; 198 /delete-property/ pinctrl-0; 199 status = "disabled"; 200}; 201 202&u2phy0 { 203 status = "okay"; 204 u2phy_otg: otg-port { 205 status = "okay"; 206 }; 207}; 208 209&usbdrd { 210 status = "okay"; 211}; 212 213&usbdrd_dwc3 { 214 status = "okay"; 215 extcon = <&u2phy0>; 216}; 217 218&vdpu { 219 status = "okay"; 220}; 221 222&vepu { 223 status = "okay"; 224}; 225 226&vpu_mmu { 227 status = "okay"; 228}; 229 230&vop { 231 status = "okay"; 232}; 233