1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2020 Rockchip Electronics Co., Ltd. 4 */ 5 6/dts-v1/; 7#include "rv1109.dtsi" 8#include "rv1126-ipc.dtsi" 9 10/ { 11 model = "Rockchip RV1109 38 V10 SPI NAND DDR3 Board"; 12 compatible = "rockchip,rv1109-38-v10-spi-nand", "rockchip,rv1109"; 13 14 chosen { 15 bootargs = "earlycon=uart8250,mmio32,0xff570000 console=ttyFIQ0 ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs snd_aloop.index=7"; 16 }; 17 18 /delete-node/ vdd-npu; 19 /delete-node/ vdd-vepu; 20 21 cam_ircut0: cam_ircut { 22 compatible = "rockchip,ircut"; 23 status = "okay"; 24 ircut-open-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; 25 ircut-close-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; 26 pinctrl-names = "default"; 27 pinctrl-0 = <&ircut_pins>; 28 rockchip,camera-module-index = <1>; 29 rockchip,camera-module-facing = "front"; 30 }; 31 32 vcc_1v8: vcc-1v8 { 33 compatible = "regulator-fixed"; 34 regulator-name = "vcc_1v8"; 35 regulator-always-on; 36 regulator-boot-on; 37 regulator-min-microvolt = <1800000>; 38 regulator-max-microvolt = <1800000>; 39 }; 40 41 vcc_dvdd: vcc-dvdd { 42 compatible = "regulator-fixed"; 43 regulator-name = "vcc_dvdd"; 44 regulator-always-on; 45 regulator-boot-on; 46 regulator-min-microvolt = <1200000>; 47 regulator-max-microvolt = <1200000>; 48 }; 49 50 vcc3v3_sys: vcc33sys { 51 compatible = "regulator-fixed"; 52 regulator-name = "vcc3v3_sys"; 53 regulator-always-on; 54 regulator-boot-on; 55 regulator-min-microvolt = <3300000>; 56 regulator-max-microvolt = <3300000>; 57 }; 58 59 vcc_sd: vcc-sd { 60 compatible = "regulator-fixed"; 61 gpio = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; 62 pinctrl-0 = <&sdmmc_pwr>; 63 pinctrl-names = "default"; 64 regulator-name = "vcc_sd"; 65 regulator-min-microvolt = <3300000>; 66 regulator-max-microvolt = <3300000>; 67 startup-delay-us = <100000>; 68 vin-supply = <&vcc3v3_sys>; 69 enable-active-high; 70 }; 71 72 vdd_arm: vdd-arm { 73 compatible = "pwm-regulator"; 74 pwms = <&pwm0 0 5000 1>; 75 regulator-name = "vdd_arm"; 76 regulator-min-microvolt = <720000>; 77 regulator-max-microvolt = <1000000>; 78 regulator-init-microvolt = <825000>; 79 regulator-always-on; 80 regulator-boot-on; 81 regulator-settling-time-up-us = <250>; 82 pwm-supply = <&vcc3v3_sys>; 83 status = "okay"; 84 }; 85 86 /* 87 * pwm1 is reserved as voltage adjustment in hardware 88 * use fixed regulator to avoid voltage adjustment by software 89 */ 90 vdd_logic_npu_vepu: vdd-logic-npu-vepu { 91 compatible = "pwm-regulator"; 92 pwms = <&pwm1 0 5000 1>; 93 regulator-name = "vdd_logic_npu_vepu"; 94 regulator-min-microvolt = <720000>; 95 regulator-max-microvolt = <880000>; 96 regulator-init-microvolt = <825000>; 97 regulator-always-on; 98 regulator-boot-on; 99 regulator-settling-time-up-us = <250>; 100 pwm-supply = <&vcc3v3_sys>; 101 status = "okay"; 102 }; 103 104 vdd_logic_npu_vepu_fixed: vdd-logic-npu-vepu-fixed { 105 compatible = "regulator-fixed"; 106 regulator-name = "vdd_logic_npu_vepu-fixed"; 107 regulator-always-on; 108 regulator-boot-on; 109 regulator-min-microvolt = <825000>; 110 regulator-max-microvolt = <825000>; 111 }; 112 113 wireless_wlan: wireless-wlan { 114 compatible = "wlan-platdata"; 115 rockchip,grf = <&grf>; 116 wifi_chip_type = "rtl8188fu"; 117 WIFI,poweren_gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>; 118 status = "okay"; 119 }; 120 121}; 122 123&csi_dphy0 { 124 status = "okay"; 125 126 ports { 127 #address-cells = <1>; 128 #size-cells = <0>; 129 port@0 { 130 reg = <0>; 131 #address-cells = <1>; 132 #size-cells = <0>; 133 134 mipi_in_ucam0: endpoint@1 { 135 reg = <1>; 136 remote-endpoint = <&ucam_out0>; 137 data-lanes = <1 2 3 4>; 138 }; 139 }; 140 port@1 { 141 reg = <1>; 142 #address-cells = <1>; 143 #size-cells = <0>; 144 145 csidphy0_out: endpoint@0 { 146 reg = <0>; 147 remote-endpoint = <&isp_in>; 148 }; 149 }; 150 }; 151}; 152 153&gmac { 154 phy-mode = "rmii"; 155 clock_in_out = "output"; 156 157 snps,reset-gpio = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>; 158 snps,reset-active-low; 159 snps,reset-delays-us = <0 50000 50000>; 160 161 assigned-clocks = <&cru CLK_GMAC_SRC>, <&cru CLK_GMAC_TX_RX>; 162 assigned-clock-parents = <&cru CLK_GMAC_SRC_M0>, <&cru RMII_MODE_CLK>; 163 assigned-clock-rates = <50000000>; 164 165 pinctrl-names = "default"; 166 pinctrl-0 = <&rmiim0_miim &rgmiim0_rxer &rmiim0_bus2 &rgmiim0_mclkinout_level0>; 167 168 phy-handle = <&phy>; 169 status = "okay"; 170}; 171 172&i2c1 { 173 status = "okay"; 174 clock-frequency = <400000>; 175 176 os04a10: os04a10@36 { 177 compatible = "ovti,os04a10"; 178 reg = <0x36>; 179 clocks = <&cru CLK_MIPICSI_OUT>; 180 clock-names = "xvclk"; 181 power-domains = <&power RV1126_PD_VI>; 182 pinctrl-names = "rockchip,camera_default"; 183 pinctrl-0 = <&mipicsi_clk0>; 184 avdd-supply = <&vcc3v3_sys>; 185 dovdd-supply = <&vcc_1v8>; 186 dvdd-supply = <&vcc_dvdd>; 187 pwdn-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; 188 reset-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; 189 rockchip,camera-module-index = <1>; 190 rockchip,camera-module-facing = "front"; 191 rockchip,camera-module-name = "CMK-OT1607-FV1"; 192 rockchip,camera-module-lens-name = "M12-40IRC-4MP-F16"; 193 ir-cut = <&cam_ircut0>; 194 195 port { 196 ucam_out0: endpoint { 197 remote-endpoint = <&mipi_in_ucam0>; 198 data-lanes = <1 2 3 4>; 199 }; 200 }; 201 }; 202}; 203 204&mdio { 205 phy: phy@0 { 206 compatible = "ethernet-phy-ieee802.3-c22"; 207 reg = <0x0>; 208 }; 209}; 210 211&npu { 212 npu-supply = <&vdd_logic_npu_vepu_fixed>; 213}; 214 215&pinctrl { 216 ircut { 217 /omit-if-no-ref/ 218 ircut_pins: ircut-pins { 219 rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>, 220 <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; 221 }; 222 }; 223 224 sdmmc-pwr { 225 /omit-if-no-ref/ 226 sdmmc_pwr: sdmmc-pwr { 227 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 228 }; 229 }; 230}; 231 232&pmu_io_domains { 233 status = "okay"; 234 235 pmuio0-supply = <&vcc3v3_sys>; 236 pmuio1-supply = <&vcc3v3_sys>; 237 vccio2-supply = <&vcc3v3_sys>; 238 vccio4-supply = <&vcc_1v8>; 239 vccio5-supply = <&vcc3v3_sys>; 240 vccio6-supply = <&vcc3v3_sys>; 241 vccio7-supply = <&vcc3v3_sys>; 242}; 243 244&rkisp_vir0 { 245 status = "okay"; 246 247 ports { 248 port@0 { 249 reg = <0>; 250 #address-cells = <1>; 251 #size-cells = <0>; 252 253 isp_in: endpoint@0 { 254 reg = <0>; 255 remote-endpoint = <&csidphy0_out>; 256 }; 257 }; 258 }; 259}; 260 261&rkvenc { 262 venc-supply = <&vdd_logic_npu_vepu_fixed>; 263}; 264 265&rockchip_suspend { 266 status = "okay"; 267 rockchip,sleep-debug-en = <1>; 268 rockchip,sleep-mode-config = < 269 (0 270 | RKPM_SLP_ARMOFF 271 | RKPM_SLP_PMU_PMUALIVE_32K 272 | RKPM_SLP_PMU_DIS_OSC 273 ) 274 >; 275}; 276 277&sdmmc0_bus4 { 278 rockchip,pins = 279 /* sdmmc0_d0 */ 280 <1 RK_PA4 1 &pcfg_pull_up_drv_level_0>, 281 /* sdmmc0_d1 */ 282 <1 RK_PA5 1 &pcfg_pull_up_drv_level_0>, 283 /* sdmmc0_d2 */ 284 <1 RK_PA6 1 &pcfg_pull_up_drv_level_0>, 285 /* sdmmc0_d3 */ 286 <1 RK_PA7 1 &pcfg_pull_up_drv_level_0>; 287}; 288 289&sdmmc0_clk { 290 rockchip,pins = 291 /* sdmmc0_clk */ 292 <1 RK_PB0 1 &pcfg_pull_up_drv_level_3>; 293}; 294 295&sdmmc0_cmd { 296 rockchip,pins = 297 /* sdmmc0_cmd */ 298 <1 RK_PB1 1 &pcfg_pull_up_drv_level_0>; 299}; 300 301&sdmmc { 302 bus-width = <4>; 303 cap-mmc-highspeed; 304 cap-sd-highspeed; 305 card-detect-delay = <200>; 306 rockchip,default-sample-phase = <90>; 307 no-sdio; 308 no-mmc; 309 status = "okay"; 310 vmmc-supply = <&vcc_sd>; 311}; 312 313&sfc { 314 status = "okay"; 315 316 flash@0 { 317 compatible = "spi-nand"; 318 reg = <0>; 319 spi-max-frequency = <80000000>; 320 spi-rx-bus-width = <4>; 321 spi-tx-bus-width = <1>; 322 }; 323}; 324 325&u2phy_host { 326 status = "okay"; 327}; 328 329&u2phy1 { 330 status = "okay"; 331}; 332 333&usb_host0_ehci { 334 status = "okay"; 335}; 336 337&usb_host0_ohci { 338 status = "okay"; 339}; 340