1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2022 Rockchip Electronics Co., Ltd. 4 */ 5 6/ { 7 memory: memory { 8 device_type = "memory"; 9 reg = <0x00000000 0x08000000>; 10 }; 11 12 ramdisk: ramdisk { 13 compatible = "rockchip,ramdisk"; 14 memory-region = <&ramdisk_r>; 15 }; 16 17 reserved-memory { 18 #address-cells = <1>; 19 #size-cells = <1>; 20 ranges; 21 22 rtos: rtos@40000 { 23 reg = <0x40000 0x40000>; 24 }; 25 26 meta: meta@800000 { 27 /* reg's offset MUST match with RTOS */ 28 reg = <0x00800000 0x60000>; 29 }; 30 31 rkisp_thunderboot: rkisp@860000 { 32 /* reg's offset MUST match with RTOS */ 33 /* 34 * vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num) 35 * e.g. 1920x1080: 0xa8c000 36 */ 37 reg = <0x00860000 0xa8c000>; 38 }; 39 40 ramdisk_r: ramdisk_r { 41 reg = <0x12ec000 (10 * 0x00100000)>; 42 }; 43 44 ramdisk_c: ramdisk_c { 45 reg = <0x1cec000 (5 * 0x00100000)>; 46 }; 47 48 rkisp1_thunderboot: rkisp1_thunderboot { 49 /* vicap capture for other camera */ 50 }; 51 }; 52 53 thunder_boot_rkisp: thunder-boot-rkisp { 54 compatible = "rockchip,thunder-boot-rkisp"; 55 clocks = <&cru ACLK_ISP3P2>, <&cru HCLK_ISP3P2>, 56 <&cru CLK_CORE_ISP3P2>, <&cru ISP0CLK_VICAP>, 57 <&cru ACLK_VICAP>, <&cru HCLK_VICAP>, 58 <&cru DCLK_VICAP>, <&cru PCLK_VICAP>, 59 <&cru I0CLK_VICAP>, <&cru I1CLK_VICAP>, 60 <&cru RX0PCLK_VICAP>, <&cru RX1PCLK_VICAP>, 61 <&cru ISP0CLK_VICAP>, <&cru SCLK_VICAP_M0>, 62 <&cru SCLK_VICAP_M1>, <&cru PCLK_VICAP_VEPU>, 63 <&cru PCLK_CSIHOST0>, <&cru CLK_RXBYTECLKHS_0>, 64 <&cru PCLK_CSIHOST1>, <&cru CLK_RXBYTECLKHS_1>, 65 <&cru CLK_I2C4>, <&cru PCLK_I2C4>; 66 clock-names = "aclk_isp", "hclk_isp", 67 "clk_isp_core", "clk_isp_core_vicap", 68 "aclk_cif","hclk_cif", 69 "dclk_cif", "pclk_cif", 70 "i0clk_cif", "i1clk_cif", 71 "rx0clk_cif", "rx1clk_cif", 72 "isp0clk_cif", "sclk_m0_cif", 73 "sclk_m1_cif", "pclk_vepu_cif", 74 "pclk_csi2host0", "clk_rxbyte_hs0", 75 "pclk_csi2host1", "clk_rxbyte_hs1", 76 "i2c", "pclk"; 77 status = "okay"; 78 }; 79 80 thunder_boot_service: thunder-boot-service { 81 compatible = "rockchip,thunder-boot-service"; 82 mbox-names = "amp-rx"; 83 mboxes = <&mailbox 1>; 84 resets = <&cru SRST_CORE_MCU>, <&cru SRST_CORE_MCU_PWRUP>, 85 <&cru SRST_CORE_MCU_CPU>, <&cru SRST_T_CORE_MCU_CPU>; 86 reset-names = "core_mcu", "core_mcu_pwrup", 87 "core_mcu_cpu", "t_core_mcu_cpu"; 88 memory-region = <&rtos>; 89 status = "disabled"; 90 }; 91}; 92 93&hw_decompress { 94 status = "okay"; 95 memory-region = <&ramdisk_c>; 96}; 97 98&rkisp_vir0 { 99 memory-region-thunderboot = <&rkisp_thunderboot>; 100}; 101