1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2022 Rockchip Electronics Co., Ltd. 4 */ 5#include "rv1106-amp.dtsi" 6 7/ { 8 chosen { 9 bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyFIQ0 rootwait snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0"; 10 }; 11 12 acodec_sound: acodec-sound { 13 compatible = "simple-audio-card"; 14 simple-audio-card,name = "rv-acodec"; 15 simple-audio-card,format = "i2s"; 16 simple-audio-card,mclk-fs = <256>; 17 simple-audio-card,cpu { 18 sound-dai = <&i2s0_8ch>; 19 }; 20 simple-audio-card,codec { 21 sound-dai = <&acodec>; 22 }; 23 }; 24 25 vcc_1v8: vcc-1v8 { 26 compatible = "regulator-fixed"; 27 regulator-name = "vcc_1v8"; 28 regulator-always-on; 29 regulator-boot-on; 30 regulator-min-microvolt = <1800000>; 31 regulator-max-microvolt = <1800000>; 32 }; 33 34 vcc_3v3: vcc-3v3 { 35 compatible = "regulator-fixed"; 36 regulator-name = "vcc_3v3"; 37 regulator-always-on; 38 regulator-boot-on; 39 regulator-min-microvolt = <3300000>; 40 regulator-max-microvolt = <3300000>; 41 }; 42 43 vdd_arm: vdd-arm { 44 compatible = "pwm-regulator"; 45 pwms = <&pwm0 0 5000 1>; 46 regulator-name = "vdd_arm"; 47 regulator-min-microvolt = <724000>; 48 regulator-max-microvolt = <1078000>; 49 regulator-init-microvolt = <950000>; 50 regulator-always-on; 51 regulator-boot-on; 52 regulator-settling-time-up-us = <250>; 53 }; 54}; 55 56&acodec { 57 #sound-dai-cells = <0>; 58 pa-ctl-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>; 59 status = "okay"; 60}; 61 62&cpu0 { 63 cpu-supply = <&vdd_arm>; 64}; 65 66&csi2_dphy_hw { 67 status = "okay"; 68}; 69 70&csi2_dphy0 { 71 status = "okay"; 72 73 ports { 74 #address-cells = <1>; 75 #size-cells = <0>; 76 77 port@0 { 78 reg = <0>; 79 #address-cells = <1>; 80 #size-cells = <0>; 81 82 csi_dphy_input0: endpoint@0 { 83 reg = <0>; 84 remote-endpoint = <&sc3336_out>; 85 data-lanes = <1 2>; 86 }; 87 88 csi_dphy_input1: endpoint@1 { 89 reg = <1>; 90 remote-endpoint = <&sc4336_out>; 91 data-lanes = <1 2>; 92 }; 93 94 csi_dphy_input2: endpoint@2 { 95 reg = <2>; 96 remote-endpoint = <&sc530ai_out>; 97 data-lanes = <1 2>; 98 }; 99 }; 100 101 port@1 { 102 reg = <1>; 103 #address-cells = <1>; 104 #size-cells = <0>; 105 106 csi_dphy_output: endpoint@0 { 107 reg = <0>; 108 remote-endpoint = <&mipi_csi2_input>; 109 }; 110 }; 111 }; 112}; 113 114&i2c4 { 115 status = "okay"; 116 clock-frequency = <400000>; 117 pinctrl-names = "default"; 118 pinctrl-0 = <&i2c4m2_xfer>; 119 120 sc3336: sc3336@30 { 121 compatible = "smartsens,sc3336"; 122 status = "okay"; 123 reg = <0x30>; 124 clocks = <&cru MCLK_REF_MIPI0>; 125 clock-names = "xvclk"; 126 pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; 127 pinctrl-names = "default"; 128 pinctrl-0 = <&mipi_refclk_out0>; 129 rockchip,camera-module-index = <0>; 130 rockchip,camera-module-facing = "back"; 131 rockchip,camera-module-name = "CMK-OT2119-PC1"; 132 rockchip,camera-module-lens-name = "30IRC-F16"; 133 port { 134 sc3336_out: endpoint { 135 remote-endpoint = <&csi_dphy_input0>; 136 data-lanes = <1 2>; 137 }; 138 }; 139 }; 140 141 sc4336: sc4336@30 { 142 compatible = "smartsens,sc4336"; 143 status = "okay"; 144 reg = <0x30>; 145 clocks = <&cru MCLK_REF_MIPI0>; 146 clock-names = "xvclk"; 147 pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; 148 pinctrl-names = "default"; 149 pinctrl-0 = <&mipi_refclk_out0>; 150 rockchip,camera-module-index = <0>; 151 rockchip,camera-module-facing = "back"; 152 rockchip,camera-module-name = "OT01"; 153 rockchip,camera-module-lens-name = "40IRC_F16"; 154 port { 155 sc4336_out: endpoint { 156 remote-endpoint = <&csi_dphy_input1>; 157 data-lanes = <1 2>; 158 }; 159 }; 160 }; 161 162 sc530ai: sc530ai@30 { 163 compatible = "smartsens,sc530ai"; 164 status = "okay"; 165 reg = <0x30>; 166 clocks = <&cru MCLK_REF_MIPI0>; 167 clock-names = "xvclk"; 168 pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; 169 pinctrl-names = "default"; 170 pinctrl-0 = <&mipi_refclk_out0>; 171 rockchip,camera-module-index = <0>; 172 rockchip,camera-module-facing = "back"; 173 rockchip,camera-module-name = "CMK-OT2115-PC1"; 174 rockchip,camera-module-lens-name = "30IRC-F16"; 175 port { 176 sc530ai_out: endpoint { 177 remote-endpoint = <&csi_dphy_input2>; 178 data-lanes = <1 2>; 179 }; 180 }; 181 }; 182}; 183 184&i2s0_8ch { 185 #sound-dai-cells = <0>; 186 status = "okay"; 187}; 188 189&mipi0_csi2 { 190 status = "okay"; 191 192 ports { 193 #address-cells = <1>; 194 #size-cells = <0>; 195 196 port@0 { 197 reg = <0>; 198 #address-cells = <1>; 199 #size-cells = <0>; 200 201 mipi_csi2_input: endpoint@1 { 202 reg = <1>; 203 remote-endpoint = <&csi_dphy_output>; 204 }; 205 }; 206 207 port@1 { 208 reg = <1>; 209 #address-cells = <1>; 210 #size-cells = <0>; 211 212 mipi_csi2_output: endpoint@0 { 213 reg = <0>; 214 remote-endpoint = <&cif_mipi_in>; 215 }; 216 }; 217 }; 218}; 219 220&pwm0 { 221 status = "okay"; 222}; 223 224&rkcif { 225 status = "okay"; 226}; 227 228&rkcif_mipi_lvds { 229 status = "okay"; 230 231 pinctrl-names = "default"; 232 pinctrl-0 = <&mipi_pins>; 233 port { 234 /* MIPI CSI-2 endpoint */ 235 cif_mipi_in: endpoint { 236 remote-endpoint = <&mipi_csi2_output>; 237 }; 238 }; 239}; 240 241&rkcif_mipi_lvds_sditf { 242 status = "okay"; 243 244 port { 245 /* MIPI CSI-2 endpoint */ 246 mipi_lvds_sditf: endpoint { 247 remote-endpoint = <&isp_in>; 248 }; 249 }; 250}; 251 252&rkisp { 253 status = "okay"; 254}; 255 256&rkisp_vir0 { 257 status = "okay"; 258 259 port@0 { 260 isp_in: endpoint { 261 remote-endpoint = <&mipi_lvds_sditf>; 262 }; 263 }; 264}; 265 266&saradc { 267 status = "okay"; 268 vref-supply = <&vcc_1v8>; 269}; 270 271&sfc { 272 status = "okay"; 273 274 flash@0 { 275 compatible = "jedec,spi-nor"; 276 reg = <0>; 277 spi-max-frequency = <80000000>; 278 spi-rx-bus-width = <4>; 279 spi-tx-bus-width = <1>; 280 }; 281}; 282 283&sdmmc { 284 max-frequency = <50000000>; 285 no-sdio; 286 no-mmc; 287 bus-width = <4>; 288 cap-mmc-highspeed; 289 cap-sd-highspeed; 290 disable-wp; 291 pinctrl-names = "normal", "idle"; 292 pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>; 293 pinctrl-1 = <&sdmmc0_idle_pins &sdmmc0_det>; 294 status = "okay"; 295}; 296 297&tsadc { 298 status = "okay"; 299}; 300 301&u2phy { 302 status = "disabled"; 303}; 304 305&u2phy_otg { 306 status = "disabled"; 307}; 308 309&usbdrd { 310 status = "disabled"; 311}; 312 313&usbdrd_dwc3 { 314 status = "disabled"; 315}; 316