xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/rv1106-evb-ext-rgb-v10.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun#include <dt-bindings/display/media-bus-format.h>
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/ {
9*4882a593Smuzhiyun	backlight: backlight {
10*4882a593Smuzhiyun		status = "okay";
11*4882a593Smuzhiyun		compatible = "pwm-backlight";
12*4882a593Smuzhiyun		pwms = <&pwm3 0 25000 0>;
13*4882a593Smuzhiyun		brightness-levels = <
14*4882a593Smuzhiyun			  0   1   2   3   4   5   6   7
15*4882a593Smuzhiyun			  8   9  10  11  12  13  14  15
16*4882a593Smuzhiyun			 16  17  18  19  20  21  22  23
17*4882a593Smuzhiyun			 24  25  26  27  28  29  30  31
18*4882a593Smuzhiyun			 32  33  34  35  36  37  38  39
19*4882a593Smuzhiyun			 40  41  42  43  44  45  46  47
20*4882a593Smuzhiyun			 48  49  50  51  52  53  54  55
21*4882a593Smuzhiyun			 56  57  58  59  60  61  62  63
22*4882a593Smuzhiyun			 64  65  66  67  68  69  70  71
23*4882a593Smuzhiyun			 72  73  74  75  76  77  78  79
24*4882a593Smuzhiyun			 80  81  82  83  84  85  86  87
25*4882a593Smuzhiyun			 88  89  90  91  92  93  94  95
26*4882a593Smuzhiyun			 96  97  98  99 100 101 102 103
27*4882a593Smuzhiyun			104 105 106 107 108 109 110 111
28*4882a593Smuzhiyun			112 113 114 115 116 117 118 119
29*4882a593Smuzhiyun			120 121 122 123 124 125 126 127
30*4882a593Smuzhiyun			128 129 130 131 132 133 134 135
31*4882a593Smuzhiyun			136 137 138 139 140 141 142 143
32*4882a593Smuzhiyun			144 145 146 147 148 149 150 151
33*4882a593Smuzhiyun			152 153 154 155 156 157 158 159
34*4882a593Smuzhiyun			160 161 162 163 164 165 166 167
35*4882a593Smuzhiyun			168 169 170 171 172 173 174 175
36*4882a593Smuzhiyun			176 177 178 179 180 181 182 183
37*4882a593Smuzhiyun			184 185 186 187 188 189 190 191
38*4882a593Smuzhiyun			192 193 194 195 196 197 198 199
39*4882a593Smuzhiyun			200 201 202 203 204 205 206 207
40*4882a593Smuzhiyun			208 209 210 211 212 213 214 215
41*4882a593Smuzhiyun			216 217 218 219 220 221 222 223
42*4882a593Smuzhiyun			224 225 226 227 228 229 230 231
43*4882a593Smuzhiyun			232 233 234 235 236 237 238 239
44*4882a593Smuzhiyun			240 241 242 243 244 245 246 247
45*4882a593Smuzhiyun			248 249 250 251 252 253 254 255>;
46*4882a593Smuzhiyun		default-brightness-level = <200>;
47*4882a593Smuzhiyun	};
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun	panel: panel {
50*4882a593Smuzhiyun		compatible = "simple-panel";
51*4882a593Smuzhiyun		bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
52*4882a593Smuzhiyun		backlight = <&backlight>;
53*4882a593Smuzhiyun		enable-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_LOW>;
54*4882a593Smuzhiyun		enable-delay-ms = <20>;
55*4882a593Smuzhiyun		reset-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_LOW>;
56*4882a593Smuzhiyun		reset-value = <0>;
57*4882a593Smuzhiyun		reset-delay-ms = <10>;
58*4882a593Smuzhiyun		status = "okay";
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun		display-timings {
61*4882a593Smuzhiyun			native-mode = <&fx070_dhm11boe_timing>;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun			fx070_dhm11boe_timing: timing0 {
64*4882a593Smuzhiyun				clock-frequency = <50000000>;
65*4882a593Smuzhiyun				hactive = <1024>;
66*4882a593Smuzhiyun				vactive = <600>;
67*4882a593Smuzhiyun				hback-porch = <140>;
68*4882a593Smuzhiyun				hfront-porch = <160>;
69*4882a593Smuzhiyun				vback-porch = <20>;
70*4882a593Smuzhiyun				vfront-porch = <20>;
71*4882a593Smuzhiyun				hsync-len = <20>;
72*4882a593Smuzhiyun				vsync-len = <2>; //value range <2~22>
73*4882a593Smuzhiyun				hsync-active = <0>;
74*4882a593Smuzhiyun				vsync-active = <0>;
75*4882a593Smuzhiyun				de-active = <0>;
76*4882a593Smuzhiyun				pixelclk-active = <0>;
77*4882a593Smuzhiyun			};
78*4882a593Smuzhiyun		};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun		port {
81*4882a593Smuzhiyun			panel_in_rgb: endpoint {
82*4882a593Smuzhiyun				remote-endpoint = <&rgb_out_panel>;
83*4882a593Smuzhiyun			};
84*4882a593Smuzhiyun		};
85*4882a593Smuzhiyun	};
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun	reserved-memory {
88*4882a593Smuzhiyun		#address-cells = <1>;
89*4882a593Smuzhiyun		#size-cells = <1>;
90*4882a593Smuzhiyun		ranges;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun		linux,cma {
93*4882a593Smuzhiyun			compatible = "shared-dma-pool";
94*4882a593Smuzhiyun			inactive;
95*4882a593Smuzhiyun			reusable;
96*4882a593Smuzhiyun			size = <0x1000000>;
97*4882a593Smuzhiyun			linux,cma-default;
98*4882a593Smuzhiyun		};
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun		drm_logo: drm-logo@00000000 {
101*4882a593Smuzhiyun			compatible = "rockchip,drm-logo";
102*4882a593Smuzhiyun			reg = <0x0 0x0>;
103*4882a593Smuzhiyun		};
104*4882a593Smuzhiyun	};
105*4882a593Smuzhiyun};
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun&display_subsystem {
108*4882a593Smuzhiyun	status = "okay";
109*4882a593Smuzhiyun	logo-memory-region = <&drm_logo>;
110*4882a593Smuzhiyun};
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun&pwm3 {
113*4882a593Smuzhiyun	status = "okay";
114*4882a593Smuzhiyun	pinctrl-names = "active";
115*4882a593Smuzhiyun	pinctrl-0 = <&pwm3m1_pins>;
116*4882a593Smuzhiyun};
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun&rgb {
119*4882a593Smuzhiyun	status = "okay";
120*4882a593Smuzhiyun	pinctrl-names = "default";
121*4882a593Smuzhiyun	pinctrl-0 = <&lcd_pins>;
122*4882a593Smuzhiyun	ports {
123*4882a593Smuzhiyun		rgb_out: port@1 {
124*4882a593Smuzhiyun			reg = <1>;
125*4882a593Smuzhiyun			#address-cells = <1>;
126*4882a593Smuzhiyun			#size-cells = <0>;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun			rgb_out_panel: endpoint@0 {
129*4882a593Smuzhiyun				reg = <0>;
130*4882a593Smuzhiyun				remote-endpoint = <&panel_in_rgb>;
131*4882a593Smuzhiyun			};
132*4882a593Smuzhiyun		};
133*4882a593Smuzhiyun	};
134*4882a593Smuzhiyun};
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun&rgb_in_vop {
137*4882a593Smuzhiyun	status = "okay";
138*4882a593Smuzhiyun};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun&route_rgb {
141*4882a593Smuzhiyun	status = "disabled";
142*4882a593Smuzhiyun};
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun/*
145*4882a593Smuzhiyun * The pins of sdmmc1 and lcd are multiplexed
146*4882a593Smuzhiyun */
147*4882a593Smuzhiyun&sdio {
148*4882a593Smuzhiyun	status = "disabled";
149*4882a593Smuzhiyun};
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun&sdio_pwrseq {
152*4882a593Smuzhiyun	status = "disabled";
153*4882a593Smuzhiyun};
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun&vop {
156*4882a593Smuzhiyun	status = "okay";
157*4882a593Smuzhiyun};
158