1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2022 Rockchip Electronics Co., Ltd. 4 */ 5 6#include <dt-bindings/display/media-bus-format.h> 7 8/ { 9 backlight: backlight { 10 status = "okay"; 11 compatible = "pwm-backlight"; 12 pwms = <&pwm3 0 25000 0>; 13 brightness-levels = < 14 0 1 2 3 4 5 6 7 15 8 9 10 11 12 13 14 15 16 16 17 18 19 20 21 22 23 17 24 25 26 27 28 29 30 31 18 32 33 34 35 36 37 38 39 19 40 41 42 43 44 45 46 47 20 48 49 50 51 52 53 54 55 21 56 57 58 59 60 61 62 63 22 64 65 66 67 68 69 70 71 23 72 73 74 75 76 77 78 79 24 80 81 82 83 84 85 86 87 25 88 89 90 91 92 93 94 95 26 96 97 98 99 100 101 102 103 27 104 105 106 107 108 109 110 111 28 112 113 114 115 116 117 118 119 29 120 121 122 123 124 125 126 127 30 128 129 130 131 132 133 134 135 31 136 137 138 139 140 141 142 143 32 144 145 146 147 148 149 150 151 33 152 153 154 155 156 157 158 159 34 160 161 162 163 164 165 166 167 35 168 169 170 171 172 173 174 175 36 176 177 178 179 180 181 182 183 37 184 185 186 187 188 189 190 191 38 192 193 194 195 196 197 198 199 39 200 201 202 203 204 205 206 207 40 208 209 210 211 212 213 214 215 41 216 217 218 219 220 221 222 223 42 224 225 226 227 228 229 230 231 43 232 233 234 235 236 237 238 239 44 240 241 242 243 244 245 246 247 45 248 249 250 251 252 253 254 255>; 46 default-brightness-level = <200>; 47 }; 48 49 panel: panel { 50 compatible = "simple-panel"; 51 bus-format = <MEDIA_BUS_FMT_RGB666_1X18>; 52 backlight = <&backlight>; 53 enable-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_LOW>; 54 enable-delay-ms = <20>; 55 reset-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_LOW>; 56 reset-value = <0>; 57 reset-delay-ms = <10>; 58 status = "okay"; 59 60 display-timings { 61 native-mode = <&fx070_dhm11boe_timing>; 62 63 fx070_dhm11boe_timing: timing0 { 64 clock-frequency = <50000000>; 65 hactive = <1024>; 66 vactive = <600>; 67 hback-porch = <140>; 68 hfront-porch = <160>; 69 vback-porch = <20>; 70 vfront-porch = <20>; 71 hsync-len = <20>; 72 vsync-len = <2>; //value range <2~22> 73 hsync-active = <0>; 74 vsync-active = <0>; 75 de-active = <0>; 76 pixelclk-active = <0>; 77 }; 78 }; 79 80 port { 81 panel_in_rgb: endpoint { 82 remote-endpoint = <&rgb_out_panel>; 83 }; 84 }; 85 }; 86 87 reserved-memory { 88 #address-cells = <1>; 89 #size-cells = <1>; 90 ranges; 91 92 linux,cma { 93 compatible = "shared-dma-pool"; 94 inactive; 95 reusable; 96 size = <0x1000000>; 97 linux,cma-default; 98 }; 99 100 drm_logo: drm-logo@00000000 { 101 compatible = "rockchip,drm-logo"; 102 reg = <0x0 0x0>; 103 }; 104 }; 105}; 106 107&display_subsystem { 108 status = "okay"; 109 logo-memory-region = <&drm_logo>; 110}; 111 112&pwm3 { 113 status = "okay"; 114 pinctrl-names = "active"; 115 pinctrl-0 = <&pwm3m1_pins>; 116}; 117 118&rgb { 119 status = "okay"; 120 pinctrl-names = "default"; 121 pinctrl-0 = <&lcd_pins>; 122 ports { 123 rgb_out: port@1 { 124 reg = <1>; 125 #address-cells = <1>; 126 #size-cells = <0>; 127 128 rgb_out_panel: endpoint@0 { 129 reg = <0>; 130 remote-endpoint = <&panel_in_rgb>; 131 }; 132 }; 133 }; 134}; 135 136&rgb_in_vop { 137 status = "okay"; 138}; 139 140&route_rgb { 141 status = "disabled"; 142}; 143 144/* 145 * The pins of sdmmc1 and lcd are multiplexed 146 */ 147&sdio { 148 status = "disabled"; 149}; 150 151&sdio_pwrseq { 152 status = "disabled"; 153}; 154 155&vop { 156 status = "okay"; 157}; 158