xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/rv1103.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
4 */
5
6#include "rv1106.dtsi"
7
8/ {
9	compatible = "rockchip,rv1103";
10
11	aliases {
12		/delete-property/ gpio2;
13	};
14};
15
16/delete-node/ &gpio2;
17
18&acodec {
19	compatible = "rockchip,rv1103-codec";
20};
21
22&cpu0_opp_table {
23	/delete-node/ opp-1200000000;
24	/delete-node/ opp-1296000000;
25	/delete-node/ opp-1416000000;
26	/delete-node/ opp-1512000000;
27	/delete-node/ opp-1608000000;
28};
29
30&cru {
31	assigned-clocks =
32		<&cru PLL_GPLL>, <&cru PLL_CPLL>,
33		<&cru ARMCLK>,
34		<&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>,
35		<&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>,
36		<&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>,
37		<&cru HCLK_PMU_ROOT>, <&cru CLK_339M_SRC>;
38	assigned-clock-rates =
39		<1188000000>, <1000000000>,
40		<1104000000>,
41		<400000000>, <200000000>,
42		<100000000>, <300000000>,
43		<100000000>, <100000000>,
44		<200000000>, <264000000>;
45};
46
47&i2c3 {
48	pinctrl-names = "default";
49	pinctrl-0 = <&i2c3m1_xfer>;
50};
51
52&i2c4 {
53	pinctrl-names = "default";
54	pinctrl-0 = <&i2c3m1_xfer>;
55};
56
57&u2phy_otg {
58	rockchip,vbus-always-on;
59};
60