xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/rv1103-evb-ext-sii902x-bt656-to-hdmi-v10.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun#include <dt-bindings/display/media-bus-format.h>
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/ {
9*4882a593Smuzhiyun	gpio_i2c: i2c@0 {
10*4882a593Smuzhiyun		compatible = "i2c-gpio";
11*4882a593Smuzhiyun		gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>, /* sda */
12*4882a593Smuzhiyun			<&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; /* scl */
13*4882a593Smuzhiyun		i2c-gpio,delay-us = <2>;		  /* ~100 kHz */
14*4882a593Smuzhiyun		#address-cells = <1>;
15*4882a593Smuzhiyun		#size-cells = <0>;
16*4882a593Smuzhiyun		pinctrl-names = "default";
17*4882a593Smuzhiyun		pinctrl-0 = <&gpio_i2c_pins>;
18*4882a593Smuzhiyun		status = "okay";
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun		sii9022: sii9022@39 {
21*4882a593Smuzhiyun			compatible = "sil,sii9022";
22*4882a593Smuzhiyun			reg = <0x39>;
23*4882a593Smuzhiyun			pinctrl-names = "default";
24*4882a593Smuzhiyun			pinctrl-0 = <&sii902x_hdmi_int>;
25*4882a593Smuzhiyun			interrupt-parent = <&gpio1>;
26*4882a593Smuzhiyun			interrupts = <RK_PB0 IRQ_TYPE_LEVEL_HIGH>;
27*4882a593Smuzhiyun			reset-gpio = <&gpio1 RK_PD1 GPIO_ACTIVE_LOW>;
28*4882a593Smuzhiyun			enable-gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
29*4882a593Smuzhiyun			/*
30*4882a593Smuzhiyun			 * MEDIA_BUS_FMT_YUYV8_1X16 for bt1120
31*4882a593Smuzhiyun			 * MEDIA_BUS_FMT_UYVY8_2X8  for bt656
32*4882a593Smuzhiyun			 */
33*4882a593Smuzhiyun			bus-format = <MEDIA_BUS_FMT_UYVY8_2X8>;
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun			ports {
36*4882a593Smuzhiyun			#address-cells = <1>;
37*4882a593Smuzhiyun			#size-cells = <0>;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun				port@0 {
40*4882a593Smuzhiyun					reg = <0>;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun					sii9022_in_rgb: endpoint {
43*4882a593Smuzhiyun						remote-endpoint = <&rgb_out_sii9022>;
44*4882a593Smuzhiyun					};
45*4882a593Smuzhiyun				};
46*4882a593Smuzhiyun			};
47*4882a593Smuzhiyun		};
48*4882a593Smuzhiyun	};
49*4882a593Smuzhiyun};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun&display_subsystem {
52*4882a593Smuzhiyun	status = "okay";
53*4882a593Smuzhiyun};
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun&pinctrl {
56*4882a593Smuzhiyun	sii902x {
57*4882a593Smuzhiyun		sii902x_hdmi_int: sii902x-hdmi-int {
58*4882a593Smuzhiyun			rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
59*4882a593Smuzhiyun		};
60*4882a593Smuzhiyun	};
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun	gpio_i2c {
63*4882a593Smuzhiyun		gpio_i2c_pins: gpio-i2c-pins {
64*4882a593Smuzhiyun			rockchip,pins =
65*4882a593Smuzhiyun				/* gpio_i2c_sda */
66*4882a593Smuzhiyun				<3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none_smt>,
67*4882a593Smuzhiyun				/* gpio_i2c_scl */
68*4882a593Smuzhiyun				<3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none_smt>;
69*4882a593Smuzhiyun		};
70*4882a593Smuzhiyun	};
71*4882a593Smuzhiyun};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun&rgb {
74*4882a593Smuzhiyun	status = "okay";
75*4882a593Smuzhiyun	pinctrl-names = "default";
76*4882a593Smuzhiyun	pinctrl-0 = <&bt656_pins>;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun	ports {
79*4882a593Smuzhiyun		port@1 {
80*4882a593Smuzhiyun			reg = <1>;
81*4882a593Smuzhiyun			#address-cells = <1>;
82*4882a593Smuzhiyun			#size-cells = <0>;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun			rgb_out_sii9022: endpoint@0 {
85*4882a593Smuzhiyun				reg = <0>;
86*4882a593Smuzhiyun				remote-endpoint = <&sii9022_in_rgb>;
87*4882a593Smuzhiyun			};
88*4882a593Smuzhiyun		};
89*4882a593Smuzhiyun	};
90*4882a593Smuzhiyun};
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun&rgb_in_vop {
93*4882a593Smuzhiyun	status = "okay";
94*4882a593Smuzhiyun};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun&vop {
97*4882a593Smuzhiyun	status = "okay";
98*4882a593Smuzhiyun};
99