1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2022 Rockchip Electronics Co., Ltd. 4 */ 5 6#include <dt-bindings/display/media-bus-format.h> 7 8/ { 9 gpio_i2c: i2c@0 { 10 compatible = "i2c-gpio"; 11 gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>, /* sda */ 12 <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; /* scl */ 13 i2c-gpio,delay-us = <2>; /* ~100 kHz */ 14 #address-cells = <1>; 15 #size-cells = <0>; 16 pinctrl-names = "default"; 17 pinctrl-0 = <&gpio_i2c_pins>; 18 status = "okay"; 19 20 sii9022: sii9022@39 { 21 compatible = "sil,sii9022"; 22 reg = <0x39>; 23 pinctrl-names = "default"; 24 pinctrl-0 = <&sii902x_hdmi_int>; 25 interrupt-parent = <&gpio1>; 26 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_HIGH>; 27 reset-gpio = <&gpio1 RK_PD1 GPIO_ACTIVE_LOW>; 28 enable-gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; 29 /* 30 * MEDIA_BUS_FMT_YUYV8_1X16 for bt1120 31 * MEDIA_BUS_FMT_UYVY8_2X8 for bt656 32 */ 33 bus-format = <MEDIA_BUS_FMT_UYVY8_2X8>; 34 35 ports { 36 #address-cells = <1>; 37 #size-cells = <0>; 38 39 port@0 { 40 reg = <0>; 41 42 sii9022_in_rgb: endpoint { 43 remote-endpoint = <&rgb_out_sii9022>; 44 }; 45 }; 46 }; 47 }; 48 }; 49}; 50 51&display_subsystem { 52 status = "okay"; 53}; 54 55&pinctrl { 56 sii902x { 57 sii902x_hdmi_int: sii902x-hdmi-int { 58 rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; 59 }; 60 }; 61 62 gpio_i2c { 63 gpio_i2c_pins: gpio-i2c-pins { 64 rockchip,pins = 65 /* gpio_i2c_sda */ 66 <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none_smt>, 67 /* gpio_i2c_scl */ 68 <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none_smt>; 69 }; 70 }; 71}; 72 73&rgb { 74 status = "okay"; 75 pinctrl-names = "default"; 76 pinctrl-0 = <&bt656_pins>; 77 78 ports { 79 port@1 { 80 reg = <1>; 81 #address-cells = <1>; 82 #size-cells = <0>; 83 84 rgb_out_sii9022: endpoint@0 { 85 reg = <0>; 86 remote-endpoint = <&sii9022_in_rgb>; 87 }; 88 }; 89 }; 90}; 91 92&rgb_in_vop { 93 status = "okay"; 94}; 95 96&vop { 97 status = "okay"; 98}; 99