1/* 2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * This file is dual-licensed: you can use it either under the terms 5 * of the GPL or the X11 license, at your option. Note that this dual 6 * licensing only applies to this file, and not this project as a 7 * whole. 8 * 9 * a) This file is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of the 12 * License, or (at your option) any later version. 13 * 14 * This file is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * Or, alternatively, 20 * 21 * b) Permission is hereby granted, free of charge, to any person 22 * obtaining a copy of this software and associated documentation 23 * files (the "Software"), to deal in the Software without 24 * restriction, including without limitation the rights to use, 25 * copy, modify, merge, publish, distribute, sublicense, and/or 26 * sell copies of the Software, and to permit persons to whom the 27 * Software is furnished to do so, subject to the following 28 * conditions: 29 * 30 * The above copyright notice and this permission notice shall be 31 * included in all copies or substantial portions of the Software. 32 * 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40 * OTHER DEALINGS IN THE SOFTWARE. 41 */ 42 43/dts-v1/; 44#include <dt-bindings/input/input.h> 45#include <dt-bindings/pwm/pwm.h> 46#include <dt-bindings/display/media-bus-format.h> 47#include "rk3288-firefly.dtsi" 48#include "rk3288-android.dtsi" 49 50/ { 51 model = "Firefly-RK3288"; 52 compatible = "firefly,firefly-rk3288", "rockchip,rk3288"; 53 54 chosen { 55 bootargs = "earlycon=uart8250,mmio32,0xff690000"; 56 }; 57 58 sdio_pwrseq: sdio-pwrseq { 59 clocks = <&rk808 1>; 60 }; 61 62 wireless-bluetooth { 63 clocks = <&rk808 1>; 64 clock-names = "ext_clock"; 65 }; 66 67 /delete-node/ sdmmc-regulator; 68 vcc_sd: sdmmc-regulator { 69 compatible = "regulator-fixed"; 70 gpio = <&gpio7 11 GPIO_ACTIVE_LOW>; 71 pinctrl-names = "default"; 72 pinctrl-0 = <&sdmmc_pwr>; 73 regulator-name = "vcc_sd"; 74 regulator-min-microvolt = <3300000>; 75 regulator-max-microvolt = <3300000>; 76 startup-delay-us = <100000>; 77 vin-supply = <&vcc_io>; 78 }; 79 80 vcc_lcd: vcc-lcd { 81 compatible = "regulator-fixed"; 82 regulator-boot-on; 83 enable-active-high; 84 pinctrl-names = "default"; 85 pinctrl-0 = <&lcd_en>; 86 regulator-name = "vcc_lcd"; 87 vin-supply = <&vcc_io>; 88 }; 89 90 sound: sound { 91 status = "okay"; 92 compatible = "simple-audio-card"; 93 simple-audio-card,format = "i2s"; 94 simple-audio-card,name = "rockchip,firefly-codec"; 95 simple-audio-card,mclk-fs = <512>; 96 simple-audio-card,widgets = 97 "Microphone", "Microphone Jack", 98 "Headphone", "Headphone Jack"; 99 simple-audio-card,routing = 100 "MIC1", "Microphone Jack", 101 "MIC2", "Microphone Jack", 102 "Microphone Jack", "micbias1", 103 "Headphone Jack", "HPOL", 104 "Headphone Jack", "HPOR"; 105 106 simple-audio-card,dai-link@0 { 107 format = "i2s"; 108 cpu { 109 sound-dai = <&i2s>; 110 }; 111 112 codec { 113 sound-dai = <&es8323>; 114 }; 115 }; 116 117 simple-audio-card,dai-link@1 { 118 format = "i2s"; 119 cpu { 120 sound-dai = <&i2s>; 121 }; 122 123 codec { 124 sound-dai = <&hdmi>; 125 }; 126 }; 127 }; 128 129 spdif-sound { 130 status = "okay"; 131 compatible = "simple-audio-card"; 132 simple-audio-card,name = "ROCKCHIP,SPDIF"; 133 simple-audio-card,mclk-fs = <128>; 134 simple-audio-card,cpu { 135 sound-dai = <&spdif>; 136 }; 137 simple-audio-card,codec { 138 sound-dai = <&spdif_out>; 139 }; 140 }; 141 142 backlight: backlight { 143 pwms = <&pwm1 0 1000000 0>; 144 }; 145 146 hdmi_analog_sound: hdmi-analog-sound { 147 status = "disabled"; 148 rockchip,codec = <&es8323>, <&hdmi>; 149 }; 150 151 reserved-memory { 152 ramoops: ramoops@8000000 { 153 compatible = "ramoops"; 154 reg = <0x0 0x8000000 0x0 0xF0000>; 155 record-size = <0x0 0x20000>; 156 console-size = <0x0 0x80000>; 157 ftrace-size = <0x0 0x00000>; 158 pmsg-size = <0x0 0x50000>; 159 }; 160 161 drm_logo: drm-logo@00000000 { 162 compatible = "rockchip,drm-logo"; 163 reg = <0x0 0x0 0x0 0x0>; 164 }; 165 }; 166 167 fiq-debugger { 168 compatible = "rockchip,fiq-debugger"; 169 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 170 rockchip,serial-id = <2>; 171 rockchip,wake-irq = <0>; 172 /* If enable uart uses irq instead of fiq */ 173 rockchip,irq-mode-enable = <1>; 174 rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */ 175 pinctrl-names = "default"; 176 pinctrl-0 = <&uart2_xfer>; 177 }; 178 179 xin32k: xin32k { 180 compatible = "fixed-clock"; 181 clock-frequency = <32768>; 182 clock-output-names = "xin32k"; 183 #clock-cells = <0>; 184 }; 185 186 vccadc_ref: vccadc-ref { 187 compatible = "regulator-fixed"; 188 regulator-name = "vcc1v8_sys"; 189 regulator-always-on; 190 regulator-boot-on; 191 regulator-min-microvolt = <1800000>; 192 regulator-max-microvolt = <1800000>; 193 }; 194 195 /* This turns on USB vbus for both host0 (ehci) and host1 (dwc2) */ 196 197 vcc_phy: vcc-phy-regulator { 198 compatible = "regulator-fixed"; 199 enable-active-high; 200 gpio = <&gpio0 6 GPIO_ACTIVE_HIGH>; 201 pinctrl-names = "default"; 202 pinctrl-0 = <ð_phy_pwr>; 203 regulator-name = "vcc_phy"; 204 regulator-min-microvolt = <3300000>; 205 regulator-max-microvolt = <3300000>; 206 regulator-always-on; 207 regulator-boot-on; 208 }; 209 210 /* 211 * NOTE: vcc_sd isn't hooked up on v1.0 boards where power comes from 212 * vcc_io directly. Those boards won't be able to power cycle SD cards 213 * but it shouldn't hurt to toggle this pin there anyway. 214 */ 215 216 wireless-bluetooth { 217 clocks = <&hym8563>; 218 clock-names = "ext_clock"; 219 }; 220 221 rk_key: rockchip-key { 222 compatible = "rockchip,key"; 223 status = "okay"; 224 225 io-channels = <&saradc 1>; 226 227 vol-up-key { 228 linux,code = <115>; 229 label = "volume up"; 230 rockchip,adc_value = <1>; 231 }; 232 233 vol-down-key { 234 linux,code = <114>; 235 label = "volume down"; 236 rockchip,adc_value = <170>; 237 }; 238 239 power-key { 240 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; 241 linux,code = <116>; 242 pinctrl-names = "default"; 243 pinctrl-0 = <&pwrbtn>; 244 label = "power"; 245 gpio-key,wakeup; 246 }; 247 248 menu-key { 249 linux,code = <59>; 250 label = "menu"; 251 rockchip,adc_value = <355>; 252 }; 253 254 home-key { 255 linux,code = <102>; 256 label = "home"; 257 rockchip,adc_value = <746>; 258 }; 259 260 back-key { 261 linux,code = <158>; 262 label = "back"; 263 rockchip,adc_value = <560>; 264 }; 265 266 camera-key { 267 linux,code = <212>; 268 label = "camera"; 269 rockchip,adc_value = <450>; 270 }; 271 }; 272 273 /delete-node/ usb-otg-regulator; 274 275}; 276 277&ir{ 278 /delete-property/ pinctrl-0; 279}; 280 281&gmac { 282 phy-supply = <&vcc_phy>; 283 snps,reset-gpio = <&gpio4 7 0>; 284 pinctrl-0 = <&rgmii_pins>; 285 max-speed = <100>; 286 status = "okay"; 287}; 288 289&saradc { 290 vref-supply = <&vccadc_ref>; 291 status = "okay"; 292}; 293 294&sdmmc { 295 sd-uhs-sdr12; 296 sd-uhs-sdr25; 297 sd-uhs-sdr50; 298 sd-uhs-sdr104; 299 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 300 status = "okay"; 301}; 302 303&hdmi { 304 status = "okay"; 305}; 306 307&edp { 308 force-hpd; 309 status = "okay"; 310}; 311 312&edp_panel { 313 compatible ="lg,lp079qx1-sp0v", "simple-panel"; 314 bus-format = <MEDIA_BUS_FMT_RGB666_1X18>; 315 bpc = <6>; 316 backlight = <&backlight>; 317 enable-gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>; 318 reset-gpios = <&gpio5 17 GPIO_ACTIVE_LOW>; 319 pinctrl-0 = <&lcd_cs>; 320 power-supply = <&vcc_lcd>; 321 delay,prepare = <120>; 322 status = "okay"; 323 324 disp_timings: display-timings { 325 native-mode = <&timing0>; 326 327 timing0: timing0 { 328 clock-frequency = <205000000>; 329 hactive = <1536>; 330 vactive = <2048>; 331 hfront-porch = <12>; 332 hsync-len = <16>; 333 hback-porch = <48>; 334 vfront-porch = <8>; 335 vsync-len = <4>; 336 vback-porch = <8>; 337 hsync-active = <0>; 338 vsync-active = <0>; 339 de-active = <0>; 340 pixelclk-active = <0>; 341 }; 342 }; 343}; 344 345&route_edp { 346 status = "okay"; 347}; 348 349&i2c0{ 350 /delete-node/ syr828@41; 351 /delete-node/ act8846@5a; 352}; 353 354&i2c0 { 355 rk808: pmic@1b { 356 compatible = "rockchip,rk808"; 357 reg = <0x1b>; 358 interrupt-parent = <&gpio0>; 359 interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 360 pinctrl-names = "default"; 361 pinctrl-0 = <&pmic_int &global_pwroff>; 362 //pinctrl-0 = <&pmic_vsel>, <&pwr_hold>; 363 rockchip,system-power-controller; 364 wakeup-source; 365 #clock-cells = <1>; 366 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 367 vcc1-supply = <&vcc_sys>; 368 vcc2-supply = <&vcc_sys>; 369 vcc3-supply = <&vcc_sys>; 370 vcc4-supply = <&vcc_sys>; 371 vcc6-supply = <&vcc_sys>; 372 vcc7-supply = <&vcc_sys>; 373 vcc8-supply = <&vcc_18>; 374 vcc9-supply = <&vcc_io>; 375 vcc10-supply = <&vcc_io>; 376 vcc11-supply = <&vcc_sys>; 377 vcc12-supply = <&vcc_io>; 378 vddio-supply = <&vccio_pmu>; 379 380 regulators { 381 rk808_dcdc1_reg: DCDC_REG1 { 382 regulator-always-on; 383 regulator-boot-on; 384 regulator-min-microvolt = <750000>; 385 regulator-max-microvolt = <1500000>; 386 regulator-name = "vdd_arm"; 387 regulator-state-mem { 388 regulator-on-in-suspend; 389 regulator-suspend-microvolt = <1000000>; 390 }; 391 }; 392 393 vdd_gpu: DCDC_REG2 { 394 regulator-always-on; 395 regulator-boot-on; 396 regulator-min-microvolt = <712500>; 397 regulator-max-microvolt = <1500000>; 398 regulator-name = "vdd_gpu"; 399 regulator-ramp-delay = <6000>; 400 regulator-state-mem { 401 regulator-on-in-suspend; 402 regulator-suspend-microvolt = <1000000>; 403 }; 404 }; 405 406 vcc_ddr: DCDC_REG3 { 407 regulator-always-on; 408 regulator-boot-on; 409 regulator-name = "vcc_ddr"; 410 regulator-state-mem { 411 regulator-on-in-suspend; 412 }; 413 }; 414 415 vcc_io: DCDC_REG4 { 416 regulator-always-on; 417 regulator-boot-on; 418 regulator-min-microvolt = <3300000>; 419 regulator-max-microvolt = <3300000>; 420 regulator-name = "vcc_io"; 421 regulator-state-mem { 422 regulator-on-in-suspend; 423 regulator-suspend-microvolt = <3300000>; 424 }; 425 }; 426 427 vccio_pmu: LDO_REG1 { 428 regulator-always-on; 429 regulator-boot-on; 430 regulator-min-microvolt = <3300000>; 431 regulator-max-microvolt = <3300000>; 432 regulator-name = "vccio_pmu"; 433 regulator-state-mem { 434 regulator-on-in-suspend; 435 regulator-suspend-microvolt = <3300000>; 436 }; 437 }; 438 439 vcca_33: LDO_REG2 { 440 regulator-always-on; 441 regulator-boot-on; 442 regulator-min-microvolt = <3300000>; 443 regulator-max-microvolt = <3300000>; 444 regulator-name = "vcca_33"; 445 regulator-state-mem { 446 regulator-off-in-suspend; 447 }; 448 }; 449 450 vdd_10: LDO_REG3 { 451 regulator-always-on; 452 regulator-boot-on; 453 regulator-min-microvolt = <1000000>; 454 regulator-max-microvolt = <1000000>; 455 regulator-name = "vdd_10"; 456 regulator-state-mem { 457 regulator-on-in-suspend; 458 regulator-suspend-microvolt = <1000000>; 459 }; 460 }; 461 462 vcc18_lcd: LDO_REG4 { 463 regulator-always-on; 464 regulator-boot-on; 465 regulator-min-microvolt = <1800000>; 466 regulator-max-microvolt = <1800000>; 467 regulator-name = "vcc18_lcd"; 468 regulator-state-mem { 469 regulator-on-in-suspend; 470 regulator-suspend-microvolt = <1800000>; 471 }; 472 }; 473 474 vccio_sd: LDO_REG5 { 475 regulator-always-on; 476 regulator-boot-on; 477 regulator-min-microvolt = <3300000>; 478 regulator-max-microvolt = <3300000>; 479 regulator-name = "vccio_sd"; 480 regulator-state-mem { 481 regulator-on-in-suspend; 482 regulator-suspend-microvolt = <3300000>; 483 }; 484 }; 485 486 vdd10_lcd: LDO_REG6 { 487 regulator-always-on; 488 regulator-boot-on; 489 regulator-min-microvolt = <1000000>; 490 regulator-max-microvolt = <1000000>; 491 regulator-name = "vdd10_lcd"; 492 regulator-state-mem { 493 regulator-on-in-suspend; 494 regulator-suspend-microvolt = <1000000>; 495 }; 496 }; 497 498 vcc_18: LDO_REG7 { 499 regulator-always-on; 500 regulator-boot-on; 501 regulator-min-microvolt = <1800000>; 502 regulator-max-microvolt = <1800000>; 503 regulator-name = "vcc_18"; 504 regulator-state-mem { 505 regulator-on-in-suspend; 506 regulator-suspend-microvolt = <1800000>; 507 }; 508 }; 509 510 vcc_lan: LDO_REG8 { 511 regulator-always-on; 512 regulator-boot-on; 513 regulator-min-microvolt = <1800000>; 514 regulator-max-microvolt = <1800000>; 515 regulator-name = "vcc_lan"; 516 regulator-state-mem { 517 regulator-on-in-suspend; 518 regulator-suspend-microvolt = <1800000>; 519 }; 520 }; 521 522 vccio_wl: SWITCH_REG1 { 523 regulator-always-on; 524 regulator-boot-on; 525 regulator-name = "vcc_18"; 526 regulator-state-mem { 527 regulator-on-in-suspend; 528 }; 529 }; 530 531 rk808_ldo10_reg: SWITCH_REG2 { 532 regulator-always-on; 533 regulator-boot-on; 534 regulator-name = "rk_ldo10"; 535 regulator-state-mem { 536 regulator-on-in-suspend; 537 }; 538 }; 539 }; 540 }; 541}; 542 543&i2c1 { 544 status = "okay"; 545 clock-frequency = <400000>; 546 547 tc358749x: tc358749x@0f { 548 compatible = "toshiba,tc358749x"; 549 reg = <0x0f>; 550 power-gpios = <&gpio7 21 GPIO_ACTIVE_HIGH>; 551 stanby-gpios = <&gpio7 5 GPIO_ACTIVE_HIGH>; 552 reset-gpios = <&gpio8 8 GPIO_ACTIVE_HIGH>; 553 int-gpios = <&gpio8 9 GPIO_ACTIVE_HIGH>; 554 pinctrl-names = "default"; 555 pinctrl-0 = <&hdmiin_gpios>; 556 status = "okay"; 557 }; 558}; 559 560&i2c2 { 561 status = "okay"; 562 563 es8323: es8323@10 { 564 status = "okay"; 565 compatible = "everest,es8323"; 566 reg = <0x10>; 567 spk-con-gpio = <&gpio7 3 GPIO_ACTIVE_HIGH>; 568 hp-det-gpio = <&gpio7 15 GPIO_ACTIVE_LOW>; 569 clock-names = "mclk"; 570 clocks = <&cru SCLK_I2S0_OUT>; 571 pinctrl-names = "default"; 572 pinctrl-0 = <&i2s0_mclk>; 573 #sound-dai-cells = <0>; 574 }; 575}; 576 577&i2c3 { 578 status = "okay"; 579}; 580 581&i2c4 { 582 status = "okay"; 583 584 gsl3680: gsl3680@40 { 585 status = "okay"; 586 compatible = "gslX680"; 587 reg = <0x40>; 588 screen_max_x = <1536>; 589 screen_max_y = <2048>; 590 flip-x = <1>; 591 flip-y = <1>; 592 touch-gpio = <&gpio7 13 IRQ_TYPE_EDGE_RISING>; 593 }; 594}; 595 596&i2s { 597 #sound-dai-cells = <0>; 598 status = "okay"; 599}; 600 601&pwm1 { 602 status = "okay"; 603}; 604 605&isp { 606 /delete-property/ rockchip,gpios; 607 status = "okay"; 608}; 609 610&isp_mmu { 611 status = "okay"; 612}; 613 614&vpu_service { 615 status = "okay"; 616}; 617 618&usb_host0_ehci { 619 rockchip-relinquish-port; 620 status = "okay"; 621}; 622 623&vopb { 624 status = "okay"; 625}; 626 627&vopl { 628 status = "okay"; 629}; 630 631&dfi { 632 status = "okay"; 633}; 634 635&dmac_bus_s { 636 /* change to non-secure dmac */ 637 reg = <0x0 0xff600000 0x0 0x4000>; 638}; 639 640&dmc { 641 center-supply = <&vdd_gpu>; 642 status = "okay"; 643}; 644 645&efuse { 646 compatible = "rockchip,rk3288-secure-efuse"; 647}; 648 649&rga { 650 compatible = "rockchip,rga2"; 651 clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>; 652 clock-names = "aclk_rga", "hclk_rga", "clk_rga"; 653}; 654 655&rockchip_suspend { 656 status = "okay"; 657}; 658 659&pwm0 { 660 status = "okay"; 661 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 662 compatible = "rockchip,remotectl-pwm"; 663 remote_pwm_id = <0>; 664 handle_cpu_id = <0>; 665 666 ir_key1{ 667 rockchip,usercode = <0xff00>; 668 rockchip,key_table = 669 <0xeb KEY_POWER>, 670 <0xec KEY_MENU>, 671 <0xfe KEY_BACK>, 672 <0xb7 KEY_HOME>, 673 <0xa3 KEY_WWW>, 674 <0xf4 KEY_VOLUMEUP>, 675 <0xa7 KEY_VOLUMEDOWN>, 676 <0xf8 KEY_REPLY>, 677 <0xfc KEY_UP>, 678 <0xfd KEY_DOWN>, 679 <0xf1 KEY_LEFT>, 680 <0xe5 KEY_RIGHT>; 681 }; 682}; 683 684&tsadc { 685 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ 686}; 687 688&pinctrl { 689 690 /* sata:gpio0 c1 */ 691 init-gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; 692 693 pcfg_output_high: pcfg-output-high { 694 output-high; 695 }; 696 697 pcfg_output_low: pcfg-output-low { 698 output-low; 699 }; 700 701 pmic { 702 pmic_int: pmic-int { 703 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; 704 }; 705 }; 706 707 eth_phy { 708 eth_phy_pwr: eth-phy-pwr { 709 rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 710 }; 711 }; 712 713 lcd { 714 lcd_cs: lcd-cs { 715 rockchip,pins = <7 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 716 }; 717 718 lcd_en: lcd-en { 719 rockchip,pins = <7 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 720 }; 721 }; 722 723 act8846 { 724 pmic_vsel: pmic-vsel { 725 rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_output_low>; 726 }; 727 728 pwr_hold: pwr-hold { 729 rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_output_high>; 730 }; 731 }; 732 733 backlight { 734 bl_en: bl-en { 735 rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 736 }; 737 }; 738 739 buttons { 740 pwrbtn: pwrbtn { 741 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; 742 }; 743 }; 744 745 hdmiin { 746 hdmiin_gpios: hdmiin_gpios { 747 rockchip,pins = 748 <7 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>, 749 <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, 750 <8 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, 751 <8 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 752 }; 753 }; 754}; 755