xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/rk322x-android.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)

/*
 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 *  Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/input/input.h>

/ {
	chosen: chosen {
		bootargs = "earlycon=uart8250,mmio32,0x11030000";
	};

	fiq-debugger {
		compatible = "rockchip,fiq-debugger";
		interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
		rockchip,serial-id = <2>;
		rockchip,signal-irq = <159>;
		rockchip,wake-irq = <0>;
		rockchip,irq-mode-enable = <0>; /* If enable uart uses irq instead of fiq */
		rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
		pinctrl-names = "default";
		pinctrl-0 = <&uart21_xfer>;
	};

	firmware {
		firmware_android: android {};

		optee: optee {
			compatible = "linaro,optee-tz";
			method = "smc";
		};
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		drm_logo: drm-logo@00000000 {
			compatible = "rockchip,drm-logo";
			reg = <0x0 0x0>;
		};

		secure_memory: secure-memory@80000000 {
			compatible = "rockchip,secure-memory";
			reg = <0x80000000 0x0>;
		};

		ramoops: ramoops@62e00000 {
			compatible = "ramoops";
			reg = <0x62e00000 0xf0000>;
			record-size = <0x20000>;
			console-size = <0x80000>;
			ftrace-size = <0x00000>;
			pmsg-size = <0x50000>;
		};
	};

	psci {
		compatible = "arm,psci-1.0";
		method = "smc";
	};
};

&cpu0 {
	enable-method = "psci";
};

&cpu1 {
	enable-method = "psci";
};

&cpu2 {
	enable-method = "psci";
};

&cpu3 {
	enable-method = "psci";
};

&emmc {
	broken-cd;
	bus-width = <8>;
	cap-mmc-highspeed;
	mmc-hs200-1_8v;
	no-sdio;
	no-sd;
	disable-wp;
	non-removable;
	num-slots = <1>;
	/delete-property/ default-sample-phase;
	/delete-property/ pinctrl-names;
	/delete-property/ pinctrl-0;
	status = "okay";
};

&hdmi {
	status = "okay";
};

&hdmi_phy {
	status = "okay";
};

&sdmmc {
	bus-width = <4>;
	cap-mmc-highspeed;
	cap-sd-highspeed;
	card-detect-delay = <200>;
	disable-wp;
	max-frequency = <50000000>;
	num-slots = <1>;
	no-sdio;
	no-mmc;
};

&sdio {
	bus-width = <4>;
	cap-mmc-highspeed;
	cap-sd-highspeed;
	cap-sdio-irq;
	non-removable;
	ignore-pm-notify;
	keep-power-in-suspend;
	max-frequency = <150000000>;
	no-sd;
	no-mmc;
};

&tsadc {
	rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
	status = "okay";
};

&u2phy0 {
	status = "okay";

	u2phy0_otg: otg-port {
		status = "okay";
	};

	u2phy0_host: host-port {
		status = "okay";
	};
};

&u2phy1 {
	status = "okay";

	u2phy1_otg: otg-port {
		status = "okay";
	};

	u2phy1_host: host-port {
		status = "okay";
	};
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart11_xfer &uart11_cts>;
	status = "okay";
};

&usb_otg {
	status = "okay";
};

&vop {
	assigned-clocks = <&cru DCLK_VOP>;
	assigned-clock-parents = <&cru HDMIPHY>;
	status = "okay";
};

&vop_mmu {
	status = "okay";
};

&rockchip_suspend {
	status = "okay";
};

&rng {
	status = "okay";
};