1/* 2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * This file is dual-licensed: you can use it either under the terms 5 * of the GPL or the X11 license, at your option. Note that this dual 6 * licensing only applies to this file, and not this project as a 7 * whole. 8 * 9 * a) This file is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of the 12 * License, or (at your option) any later version. 13 * 14 * This file is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * Or, alternatively, 20 * 21 * b) Permission is hereby granted, free of charge, to any person 22 * obtaining a copy of this software and associated documentation 23 * files (the "Software"), to deal in the Software without 24 * restriction, including without limitation the rights to use, 25 * copy, modify, merge, publish, distribute, sublicense, and/or 26 * sell copies of the Software, and to permit persons to whom the 27 * Software is furnished to do so, subject to the following 28 * conditions: 29 * 30 * The above copyright notice and this permission notice shall be 31 * included in all copies or substantial portions of the Software. 32 * 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40 * OTHER DEALINGS IN THE SOFTWARE. 41 */ 42#include <dt-bindings/pwm/pwm.h> 43#include <dt-bindings/input/input.h> 44 45/ { 46 chosen: chosen { 47 bootargs = "earlycon=uart8250,mmio32,0x11030000"; 48 }; 49 50 fiq-debugger { 51 compatible = "rockchip,fiq-debugger"; 52 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 53 rockchip,serial-id = <2>; 54 rockchip,signal-irq = <159>; 55 rockchip,wake-irq = <0>; 56 rockchip,irq-mode-enable = <0>; /* If enable uart uses irq instead of fiq */ 57 rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ 58 pinctrl-names = "default"; 59 pinctrl-0 = <&uart21_xfer>; 60 }; 61 62 firmware { 63 firmware_android: android {}; 64 65 optee: optee { 66 compatible = "linaro,optee-tz"; 67 method = "smc"; 68 }; 69 }; 70 71 reserved-memory { 72 #address-cells = <1>; 73 #size-cells = <1>; 74 ranges; 75 76 drm_logo: drm-logo@00000000 { 77 compatible = "rockchip,drm-logo"; 78 reg = <0x0 0x0>; 79 }; 80 81 secure_memory: secure-memory@80000000 { 82 compatible = "rockchip,secure-memory"; 83 reg = <0x80000000 0x0>; 84 }; 85 86 ramoops: ramoops@62e00000 { 87 compatible = "ramoops"; 88 reg = <0x62e00000 0xf0000>; 89 record-size = <0x20000>; 90 console-size = <0x80000>; 91 ftrace-size = <0x00000>; 92 pmsg-size = <0x50000>; 93 }; 94 }; 95 96 psci { 97 compatible = "arm,psci-1.0"; 98 method = "smc"; 99 }; 100}; 101 102&cpu0 { 103 enable-method = "psci"; 104}; 105 106&cpu1 { 107 enable-method = "psci"; 108}; 109 110&cpu2 { 111 enable-method = "psci"; 112}; 113 114&cpu3 { 115 enable-method = "psci"; 116}; 117 118&emmc { 119 broken-cd; 120 bus-width = <8>; 121 cap-mmc-highspeed; 122 mmc-hs200-1_8v; 123 no-sdio; 124 no-sd; 125 disable-wp; 126 non-removable; 127 num-slots = <1>; 128 /delete-property/ default-sample-phase; 129 /delete-property/ pinctrl-names; 130 /delete-property/ pinctrl-0; 131 status = "okay"; 132}; 133 134&hdmi { 135 status = "okay"; 136}; 137 138&hdmi_phy { 139 status = "okay"; 140}; 141 142&sdmmc { 143 bus-width = <4>; 144 cap-mmc-highspeed; 145 cap-sd-highspeed; 146 card-detect-delay = <200>; 147 disable-wp; 148 max-frequency = <50000000>; 149 num-slots = <1>; 150 no-sdio; 151 no-mmc; 152}; 153 154&sdio { 155 bus-width = <4>; 156 cap-mmc-highspeed; 157 cap-sd-highspeed; 158 cap-sdio-irq; 159 non-removable; 160 ignore-pm-notify; 161 keep-power-in-suspend; 162 max-frequency = <150000000>; 163 no-sd; 164 no-mmc; 165}; 166 167&tsadc { 168 rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ 169 status = "okay"; 170}; 171 172&u2phy0 { 173 status = "okay"; 174 175 u2phy0_otg: otg-port { 176 status = "okay"; 177 }; 178 179 u2phy0_host: host-port { 180 status = "okay"; 181 }; 182}; 183 184&u2phy1 { 185 status = "okay"; 186 187 u2phy1_otg: otg-port { 188 status = "okay"; 189 }; 190 191 u2phy1_host: host-port { 192 status = "okay"; 193 }; 194}; 195 196&uart1 { 197 pinctrl-names = "default"; 198 pinctrl-0 = <&uart11_xfer &uart11_cts>; 199 status = "okay"; 200}; 201 202&usb_otg { 203 status = "okay"; 204}; 205 206&vop { 207 assigned-clocks = <&cru DCLK_VOP>; 208 assigned-clock-parents = <&cru HDMIPHY>; 209 status = "okay"; 210}; 211 212&vop_mmu { 213 status = "okay"; 214}; 215 216&rockchip_suspend { 217 status = "okay"; 218}; 219 220&rng { 221 status = "okay"; 222}; 223