1/* 2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * This file is dual-licensed: you can use it either under the terms 5 * of the GPL or the X11 license, at your option. Note that this dual 6 * licensing only applies to this file, and not this project as a 7 * whole. 8 * 9 * a) This library is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of the 12 * License, or (at your option) any later version. 13 * 14 * This library is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * Or, alternatively, 20 * 21 * b) Permission is hereby granted, free of charge, to any person 22 * obtaining a copy of this software and associated documentation 23 * files (the "Software"), to deal in the Software without 24 * restriction, including without limitation the rights to use, 25 * copy, modify, merge, publish, distribute, sublicense, and/or 26 * sell copies of the Software, and to permit persons to whom the 27 * Software is furnished to do so, subject to the following 28 * conditions: 29 * 30 * The above copyright notice and this permission notice shall be 31 * included in all copies or substantial portions of the Software. 32 * 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40 * OTHER DEALINGS IN THE SOFTWARE. 41 */ 42 43/ { 44 /delete-node/ opp-table0; 45 46 cpu0_opp_table: opp_table0 { 47 compatible = "operating-points-v2"; 48 opp-shared; 49 50 clocks = <&cru PLL_APLL>; 51 rockchip,max-volt = <1350000>; 52 rockchip,leakage-voltage-sel = < 53 1 8 0 54 9 254 1 55 >; 56 nvmem-cells = <&cpu_leakage>; 57 nvmem-cell-names = "cpu_leakage"; 58 59 opp-408000000 { 60 opp-hz = /bits/ 64 <408000000>; 61 opp-microvolt = <950000 950000 1400000>; 62 opp-microvolt-L0 = <950000 950000 1400000>; 63 opp-microvolt-L1 = <950000 950000 1400000>; 64 clock-latency-ns = <40000>; 65 opp-suspend; 66 }; 67 opp-600000000 { 68 opp-hz = /bits/ 64 <600000000>; 69 opp-microvolt = <975000 975000 1400000>; 70 opp-microvolt-L0 = <975000 975000 1400000>; 71 opp-microvolt-L1 = <975000 975000 1400000>; 72 }; 73 opp-816000000 { 74 opp-hz = /bits/ 64 <816000000>; 75 opp-microvolt = <1000000 1000000 1400000>; 76 opp-microvolt-L0 = <1000000 1000000 1400000>; 77 opp-microvolt-L1 = <1000000 1000000 1400000>; 78 }; 79 opp-1008000000 { 80 opp-hz = /bits/ 64 <1008000000>; 81 opp-microvolt = <1175000 1175000 1400000>; 82 opp-microvolt-L0 = <1175000 1175000 1400000>; 83 opp-microvolt-L1 = <1125000 1125000 1400000>; 84 }; 85 opp-1200000000 { 86 opp-hz = /bits/ 64 <1200000000>; 87 opp-microvolt = <1275000 1275000 1400000>; 88 opp-microvolt-L0 = <1275000 1275000 1400000>; 89 opp-microvolt-L1 = <1225000 1225000 1400000>; 90 }; 91 opp-1296000000 { 92 opp-hz = /bits/ 64 <1296000000>; 93 opp-microvolt = <1325000 1325000 1400000>; 94 opp-microvolt-L0 = <1325000 1325000 1400000>; 95 opp-microvolt-L1 = <1275000 1275000 1400000>; 96 }; 97 opp-1392000000 { 98 opp-hz = /bits/ 64 <1392000000>; 99 opp-microvolt = <1350000 1350000 1400000>; 100 opp-microvolt-L0 = <1350000 1350000 1400000>; 101 opp-microvolt-L1 = <1325000 1325000 1400000>; 102 }; 103 opp-1464000000 { 104 opp-hz = /bits/ 64 <1464000000>; 105 opp-microvolt = <1400000 1400000 1400000>; 106 opp-microvolt-L0 = <1400000 1400000 1400000>; 107 opp-microvolt-L1 = <1350000 1350000 1400000>; 108 }; 109 }; 110}; 111