1/* 2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * This file is dual-licensed: you can use it either under the terms 5 * of the GPL or the X11 license, at your option. Note that this dual 6 * licensing only applies to this file, and not this project as a 7 * whole. 8 * 9 * a) This file is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of the 12 * License, or (at your option) any later version. 13 * 14 * This file is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * Or, alternatively, 20 * 21 * b) Permission is hereby granted, free of charge, to any person 22 * obtaining a copy of this software and associated documentation 23 * files (the "Software"), to deal in the Software without 24 * restriction, including without limitation the rights to use, 25 * copy, modify, merge, publish, distribute, sublicense, and/or 26 * sell copies of the Software, and to permit persons to whom the 27 * Software is furnished to do so, subject to the following 28 * conditions: 29 * 30 * The above copyright notice and this permission notice shall be 31 * included in all copies or substantial portions of the Software. 32 * 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40 * OTHER DEALINGS IN THE SOFTWARE. 41 */ 42 43#include "rk322x.dtsi" 44#include "rk3229-cpu-opp.dtsi" 45 46/ { 47 chosen { 48 bootargs = "earlycon=uart8250,mmio32,0x11030000"; 49 }; 50 51 fiq-debugger { 52 compatible = "rockchip,fiq-debugger"; 53 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 54 rockchip,serial-id = <2>; 55 rockchip,signal-irq = <159>; 56 rockchip,wake-irq = <0>; 57 rockchip,irq-mode-enable = <0>; /* If enable uart uses irq instead of fiq */ 58 rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ 59 pinctrl-names = "default"; 60 pinctrl-0 = <&uart21_xfer>; 61 }; 62 63 psci { 64 compatible = "arm,psci-1.0"; 65 method = "smc"; 66 }; 67 68 xin32k: xin32k { 69 compatible = "fixed-clock"; 70 clock-frequency = <32768>; 71 clock-output-names = "xin32k"; 72 #clock-cells = <0>; 73 }; 74}; 75 76&cpu0 { 77 enable-method = "psci"; 78}; 79 80&cpu1 { 81 enable-method = "psci"; 82}; 83 84&cpu2 { 85 enable-method = "psci"; 86}; 87 88&cpu3 { 89 enable-method = "psci"; 90}; 91 92&emmc { 93 max-frequency = <125000000>; 94 broken-cd; 95 bus-width = <8>; 96 cap-mmc-highspeed; 97 no-sdio; 98 no-sd; 99 disable-wp; 100 non-removable; 101 num-slots = <1>; 102 /delete-property/ default-sample-phase; 103 /delete-property/ pinctrl-names; 104 /delete-property/ pinctrl-0; 105 status = "okay"; 106}; 107 108&cpu0 { 109 cpu-supply = <&vdd_arm>; 110}; 111 112&gpu { 113 mali-supply = <&vdd_logic>; 114}; 115 116&i2c0 { 117 status = "okay"; 118 119 rk805: rk805@18 { 120 compatible = "rockchip,rk805"; 121 status = "okay"; 122 reg = <0x18>; 123 interrupt-parent = <&gpio1>; 124 interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 125 spinctrl-names = "default"; 126 pinctrl-0 = <&pmic_int_l>; 127 rockchip,system-power-controller; 128 wakeup-source; 129 gpio-controller; 130 #gpio-cells = <2>; 131 #clock-cells = <1>; 132 clock-output-names = "rk805-clkout1", "rk805-clkout2"; 133 134 rtc { 135 status = "okay"; 136 }; 137 138 pwrkey { 139 status = "okay"; 140 }; 141 142 gpio { 143 status = "okay"; 144 }; 145 146 regulators { 147 vdd_arm: DCDC_REG1 { 148 regulator-name = "vdd_arm"; 149 regulator-min-microvolt = <712500>; 150 regulator-max-microvolt = <1450000>; 151 regulator-initial-mode = <0x1>; 152 regulator-ramp-delay = <12500>; 153 regulator-boot-on; 154 regulator-always-on; 155 regulator-state-mem { 156 regulator-mode = <0x2>; 157 regulator-on-in-suspend; 158 regulator-suspend-microvolt = <950000>; 159 }; 160 }; 161 162 vdd_logic: DCDC_REG2 { 163 regulator-name = "vdd_logic"; 164 regulator-min-microvolt = <712500>; 165 regulator-max-microvolt = <1450000>; 166 regulator-initial-mode = <0x1>; 167 regulator-ramp-delay = <12500>; 168 regulator-boot-on; 169 regulator-always-on; 170 regulator-state-mem { 171 regulator-mode = <0x2>; 172 regulator-on-in-suspend; 173 regulator-suspend-microvolt = <1000000>; 174 }; 175 }; 176 177 vcc_ddr: DCDC_REG3 { 178 regulator-name = "vcc_ddr"; 179 regulator-boot-on; 180 regulator-always-on; 181 regulator-state-mem { 182 regulator-mode = <0x2>; 183 regulator-on-in-suspend; 184 }; 185 }; 186 187 vcc_io: DCDC_REG4 { 188 regulator-name = "vcc_io"; 189 regulator-min-microvolt = <3300000>; 190 regulator-max-microvolt = <3300000>; 191 regulator-initial-mode = <0x1>; 192 regulator-boot-on; 193 regulator-always-on; 194 regulator-state-mem { 195 regulator-mode = <0x2>; 196 regulator-on-in-suspend; 197 regulator-suspend-microvolt = <3300000>; 198 }; 199 }; 200 201 vcc_18: LDO_REG1 { 202 regulator-name = "vcc_18"; 203 regulator-min-microvolt = <1800000>; 204 regulator-max-microvolt = <1800000>; 205 regulator-boot-on; 206 regulator-always-on; 207 regulator-state-mem { 208 regulator-on-in-suspend; 209 regulator-suspend-microvolt = <1800000>; 210 }; 211 }; 212 213 vcc_18emmc: LDO_REG2 { 214 regulator-name = "vcc_18emmc"; 215 regulator-min-microvolt = <1800000>; 216 regulator-max-microvolt = <1800000>; 217 regulator-boot-on; 218 regulator-always-on; 219 regulator-state-mem { 220 regulator-on-in-suspend; 221 regulator-suspend-microvolt = <1800000>; 222 }; 223 }; 224 225 vdd_10: LDO_REG3 { 226 regulator-name = "vdd_10"; 227 regulator-min-microvolt = <1000000>; 228 regulator-max-microvolt = <1000000>; 229 regulator-boot-on; 230 regulator-always-on; 231 regulator-state-mem { 232 regulator-on-in-suspend; 233 regulator-suspend-microvolt = <1000000>; 234 }; 235 }; 236 }; 237 }; 238}; 239 240&io_domains { 241 status = "okay"; 242 243 vccio1-supply = <&vcc_io>; 244 vccio2-supply = <&vcc_18>; 245 vccio4-supply = <&vcc_io>; 246}; 247 248&pinctrl { 249 pmic { 250 pmic_int_l: pmic-int-l { 251 rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; /* gpio1_a1 */ 252 }; 253 }; 254 255}; 256 257&tsadc { 258 rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ 259 status = "okay"; 260}; 261