xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/omap3-gta04.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (C) 2013 Marek Belisko <marek@goldelico.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Based on omap3-beagle-xm.dts
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun/dts-v1/;
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun#include "omap36xx.dtsi"
10*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	model = "OMAP3 GTA04";
14*4882a593Smuzhiyun	compatible = "ti,omap3-gta04", "ti,omap3630", "ti,omap36xx", "ti,omap3";
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	cpus {
17*4882a593Smuzhiyun		cpu@0 {
18*4882a593Smuzhiyun			cpu0-supply = <&vcc>;
19*4882a593Smuzhiyun		};
20*4882a593Smuzhiyun	};
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun	memory@80000000 {
23*4882a593Smuzhiyun		device_type = "memory";
24*4882a593Smuzhiyun		reg = <0x80000000 0x20000000>; /* 512 MB */
25*4882a593Smuzhiyun	};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	chosen {
28*4882a593Smuzhiyun		stdout-path = &uart3;
29*4882a593Smuzhiyun	};
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun	aliases {
32*4882a593Smuzhiyun		display0 = &lcd;
33*4882a593Smuzhiyun		display1 = &tv0;
34*4882a593Smuzhiyun		/delete-property/ mmc2;
35*4882a593Smuzhiyun		/delete-property/ mmc3;
36*4882a593Smuzhiyun	};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun	ldo_3v3: fixedregulator {
39*4882a593Smuzhiyun		compatible = "regulator-fixed";
40*4882a593Smuzhiyun		regulator-name = "ldo_3v3";
41*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
42*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
43*4882a593Smuzhiyun		regulator-always-on;
44*4882a593Smuzhiyun	};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun	/* fixed 26MHz oscillator */
47*4882a593Smuzhiyun	hfclk_26m: oscillator {
48*4882a593Smuzhiyun		#clock-cells = <0>;
49*4882a593Smuzhiyun		compatible = "fixed-clock";
50*4882a593Smuzhiyun		clock-frequency = <26000000>;
51*4882a593Smuzhiyun	};
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun	gpio-keys {
54*4882a593Smuzhiyun		compatible = "gpio-keys";
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun		aux-button {
57*4882a593Smuzhiyun			label = "aux";
58*4882a593Smuzhiyun			linux,code = <KEY_PHONE>;
59*4882a593Smuzhiyun			gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
60*4882a593Smuzhiyun			wakeup-source;
61*4882a593Smuzhiyun		};
62*4882a593Smuzhiyun	};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun	antenna-detect {
65*4882a593Smuzhiyun		compatible = "gpio-keys";
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun		gps_antenna_button: gps-antenna-button {
68*4882a593Smuzhiyun			label = "GPS_EXT_ANT";
69*4882a593Smuzhiyun			linux,input-type = <EV_SW>;
70*4882a593Smuzhiyun			linux,code = <SW_LINEIN_INSERT>;
71*4882a593Smuzhiyun			gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; /* GPIO144 */
72*4882a593Smuzhiyun			interrupt-parent = <&gpio5>;
73*4882a593Smuzhiyun			interrupts = <16 IRQ_TYPE_EDGE_BOTH>;
74*4882a593Smuzhiyun			debounce-interval = <10>;
75*4882a593Smuzhiyun			wakeup-source;
76*4882a593Smuzhiyun		};
77*4882a593Smuzhiyun	};
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun	sound {
80*4882a593Smuzhiyun		compatible = "ti,omap-twl4030";
81*4882a593Smuzhiyun		ti,model = "gta04";
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun		ti,mcbsp = <&mcbsp2>;
84*4882a593Smuzhiyun	};
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun	/* GSM audio */
87*4882a593Smuzhiyun	sound_telephony {
88*4882a593Smuzhiyun		compatible = "simple-audio-card";
89*4882a593Smuzhiyun		simple-audio-card,name = "GTA04 voice";
90*4882a593Smuzhiyun		simple-audio-card,bitclock-master = <&telephony_link_master>;
91*4882a593Smuzhiyun		simple-audio-card,frame-master = <&telephony_link_master>;
92*4882a593Smuzhiyun		simple-audio-card,format = "i2s";
93*4882a593Smuzhiyun		simple-audio-card,bitclock-inversion;
94*4882a593Smuzhiyun		simple-audio-card,frame-inversion;
95*4882a593Smuzhiyun		simple-audio-card,cpu {
96*4882a593Smuzhiyun			sound-dai = <&mcbsp4>;
97*4882a593Smuzhiyun		};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun		telephony_link_master: simple-audio-card,codec {
100*4882a593Smuzhiyun			sound-dai = <&gtm601_codec>;
101*4882a593Smuzhiyun		};
102*4882a593Smuzhiyun	};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun	gtm601_codec: gsm_codec {
105*4882a593Smuzhiyun		compatible = "option,gtm601";
106*4882a593Smuzhiyun		#sound-dai-cells = <0>;
107*4882a593Smuzhiyun	};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun	spi_lcd: spi_lcd {
110*4882a593Smuzhiyun		compatible = "spi-gpio";
111*4882a593Smuzhiyun		#address-cells = <0x1>;
112*4882a593Smuzhiyun		#size-cells = <0x0>;
113*4882a593Smuzhiyun		pinctrl-names = "default";
114*4882a593Smuzhiyun		pinctrl-0 = <&spi_gpio_pins>;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun		gpio-sck = <&gpio1 12 GPIO_ACTIVE_HIGH>;
117*4882a593Smuzhiyun		gpio-miso = <&gpio1 18 GPIO_ACTIVE_HIGH>;
118*4882a593Smuzhiyun		gpio-mosi = <&gpio1 20 GPIO_ACTIVE_HIGH>;
119*4882a593Smuzhiyun		cs-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
120*4882a593Smuzhiyun		num-chipselects = <1>;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun		/* lcd panel */
123*4882a593Smuzhiyun		lcd: td028ttec1@0 {
124*4882a593Smuzhiyun			compatible = "tpo,td028ttec1";
125*4882a593Smuzhiyun			reg = <0>;
126*4882a593Smuzhiyun			spi-max-frequency = <100000>;
127*4882a593Smuzhiyun			spi-cpol;
128*4882a593Smuzhiyun			spi-cpha;
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun			backlight= <&backlight>;
131*4882a593Smuzhiyun			label = "lcd";
132*4882a593Smuzhiyun			port {
133*4882a593Smuzhiyun				lcd_in: endpoint {
134*4882a593Smuzhiyun					remote-endpoint = <&dpi_out>;
135*4882a593Smuzhiyun				};
136*4882a593Smuzhiyun			};
137*4882a593Smuzhiyun		};
138*4882a593Smuzhiyun	};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun	backlight: backlight {
141*4882a593Smuzhiyun		compatible = "pwm-backlight";
142*4882a593Smuzhiyun		pwms = <&pwm11 0 12000000 0>;
143*4882a593Smuzhiyun		pwm-names = "backlight";
144*4882a593Smuzhiyun		brightness-levels = <0 11 20 30 40 50 60 70 80 90 100>;
145*4882a593Smuzhiyun		default-brightness-level = <9>;	/* => 90 */
146*4882a593Smuzhiyun		pinctrl-names = "default";
147*4882a593Smuzhiyun		pinctrl-0 = <&backlight_pins>;
148*4882a593Smuzhiyun	};
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun	pwm11: dmtimer-pwm {
151*4882a593Smuzhiyun		compatible = "ti,omap-dmtimer-pwm";
152*4882a593Smuzhiyun		ti,timers = <&timer11>;
153*4882a593Smuzhiyun		#pwm-cells = <3>;
154*4882a593Smuzhiyun		ti,clock-source = <0x01>;
155*4882a593Smuzhiyun	};
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun	hsusb2_phy: hsusb2_phy {
158*4882a593Smuzhiyun		compatible = "usb-nop-xceiv";
159*4882a593Smuzhiyun		reset-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
160*4882a593Smuzhiyun		#phy-cells = <0>;
161*4882a593Smuzhiyun	};
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun	tv0: connector {
164*4882a593Smuzhiyun		compatible = "composite-video-connector";
165*4882a593Smuzhiyun		label = "tv";
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun		port {
168*4882a593Smuzhiyun			tv_connector_in: endpoint {
169*4882a593Smuzhiyun				remote-endpoint = <&opa_out>;
170*4882a593Smuzhiyun			};
171*4882a593Smuzhiyun		};
172*4882a593Smuzhiyun	};
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun	tv_amp: opa362 {
175*4882a593Smuzhiyun		compatible = "ti,opa362";
176*4882a593Smuzhiyun		enable-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;	/* GPIO_23 to enable video out amplifier */
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun		ports {
179*4882a593Smuzhiyun			#address-cells = <1>;
180*4882a593Smuzhiyun			#size-cells = <0>;
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun			port@0 {
183*4882a593Smuzhiyun				reg = <0>;
184*4882a593Smuzhiyun				opa_in: endpoint {
185*4882a593Smuzhiyun					remote-endpoint = <&venc_out>;
186*4882a593Smuzhiyun				};
187*4882a593Smuzhiyun			};
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun			port@1 {
190*4882a593Smuzhiyun				reg = <1>;
191*4882a593Smuzhiyun				opa_out: endpoint {
192*4882a593Smuzhiyun					remote-endpoint = <&tv_connector_in>;
193*4882a593Smuzhiyun				};
194*4882a593Smuzhiyun			};
195*4882a593Smuzhiyun		};
196*4882a593Smuzhiyun	};
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun	wifi_pwrseq: wifi_pwrseq {
199*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
200*4882a593Smuzhiyun		reset-gpios = <&tca6507 0 GPIO_ACTIVE_LOW>;	/* W2CBW003 reset through tca6507 */
201*4882a593Smuzhiyun	};
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun	/* devconf0 setup for mcbsp1 clock pins */
204*4882a593Smuzhiyun	pinmux_mcbsp1@48002274 {
205*4882a593Smuzhiyun		compatible = "pinctrl-single";
206*4882a593Smuzhiyun		reg = <0x48002274 4>;   /* CONTROL_DEVCONF0 */
207*4882a593Smuzhiyun		#address-cells = <1>;
208*4882a593Smuzhiyun		#size-cells = <0>;
209*4882a593Smuzhiyun		pinctrl-single,bit-per-mux;
210*4882a593Smuzhiyun		pinctrl-single,register-width = <32>;
211*4882a593Smuzhiyun		pinctrl-single,function-mask = <0x7>;	/* MCBSP1 CLK pinmux */
212*4882a593Smuzhiyun		#pinctrl-cells = <2>;
213*4882a593Smuzhiyun		pinctrl-names = "default";
214*4882a593Smuzhiyun		pinctrl-0 = <&mcbsp1_devconf0_pins>;
215*4882a593Smuzhiyun		mcbsp1_devconf0_pins: pinmux_mcbsp1_devconf0_pins {
216*4882a593Smuzhiyun			/*                   offset bits mask */
217*4882a593Smuzhiyun			pinctrl-single,bits = <0x00 0x08 0x1c>;	/* set MCBSP1_CLKR */
218*4882a593Smuzhiyun		};
219*4882a593Smuzhiyun	};
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun	/* devconf1 setup for tvout pins */
222*4882a593Smuzhiyun	pinmux_tv_out@480022d8 {
223*4882a593Smuzhiyun		compatible = "pinctrl-single";
224*4882a593Smuzhiyun		reg = <0x480022d8 4>;	/* CONTROL_DEVCONF1 */
225*4882a593Smuzhiyun		#address-cells = <1>;
226*4882a593Smuzhiyun		#size-cells = <0>;
227*4882a593Smuzhiyun		pinctrl-single,bit-per-mux;
228*4882a593Smuzhiyun		pinctrl-single,register-width = <32>;
229*4882a593Smuzhiyun		pinctrl-single,function-mask = <0x81>;	/* TV out pin control */
230*4882a593Smuzhiyun		#pinctrl-cells = <2>;
231*4882a593Smuzhiyun		pinctrl-names = "default";
232*4882a593Smuzhiyun		pinctrl-0 = <&tv_acbias_devconf1_pins>;
233*4882a593Smuzhiyun		tv_acbias_devconf1_pins: pinmux_tv_acbias_devconf1_pins {
234*4882a593Smuzhiyun			/*			offset	bits	mask */
235*4882a593Smuzhiyun			pinctrl-single,bits = <0x00 0x40800 0x40800>;	/* set TVOUTBYPASS and TVOUTACEN */
236*4882a593Smuzhiyun		};
237*4882a593Smuzhiyun	};
238*4882a593Smuzhiyun};
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun&omap3_pmx_wkup {
241*4882a593Smuzhiyun	gpio1_pins: pinmux_gpio1_pins {
242*4882a593Smuzhiyun		pinctrl-single,pins = <
243*4882a593Smuzhiyun			OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */
244*4882a593Smuzhiyun			OMAP3_WKUP_IOPAD(0x2a1a, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_clkout.gpio_10 */
245*4882a593Smuzhiyun		>;
246*4882a593Smuzhiyun	};
247*4882a593Smuzhiyun};
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun&omap3_pmx_core {
250*4882a593Smuzhiyun	pinctrl-names = "default";
251*4882a593Smuzhiyun	pinctrl-0 = <
252*4882a593Smuzhiyun			&hsusb2_pins
253*4882a593Smuzhiyun	>;
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun	hsusb2_pins: pinmux_hsusb2_pins {
256*4882a593Smuzhiyun		pinctrl-single,pins = <
257*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi1_cs3.hsusb2_data2 */
258*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_clk.hsusb2_data7 */
259*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_simo.hsusb2_data4 */
260*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_somi.hsusb2_data5 */
261*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs0.hsusb2_data6 */
262*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* mcspi2_cs1.hsusb2_data3 */
263*4882a593Smuzhiyun		>;
264*4882a593Smuzhiyun	};
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun	uart1_pins: pinmux_uart1_pins {
267*4882a593Smuzhiyun		pinctrl-single,pins = <
268*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0)		/* uart1_rx.uart1_rx */
269*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0)		/* uart1_tx.uart1_tx */
270*4882a593Smuzhiyun		>;
271*4882a593Smuzhiyun	};
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun	uart2_pins: pinmux_uart2_pins {
274*4882a593Smuzhiyun		pinctrl-single,pins = <
275*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)		/* uart2_rx.uart2_rx */
276*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)		/* uart2_tx.uart2_tx */
277*4882a593Smuzhiyun		>;
278*4882a593Smuzhiyun	};
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun	uart3_pins: pinmux_uart3_pins {
281*4882a593Smuzhiyun		pinctrl-single,pins = <
282*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)		/* uart3_rx.uart3_rx */
283*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)		/* uart3_tx.uart3_tx */
284*4882a593Smuzhiyun		>;
285*4882a593Smuzhiyun	};
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun	mmc1_pins: pinmux_mmc1_pins {
288*4882a593Smuzhiyun		pinctrl-single,pins = <
289*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_clk.sdmmc1_clk */
290*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_cmd.sdmmc1_cmd */
291*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_dat0.sdmmc1_dat0 */
292*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_dat1.sdmmc1_dat1 */
293*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_dat2.sdmmc1_dat2 */
294*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)		/* sdmmc1_dat3.sdmmc1_dat3 */
295*4882a593Smuzhiyun		>;
296*4882a593Smuzhiyun	};
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun	backlight_pins: backlight_pins_pinmux {
299*4882a593Smuzhiyun		pinctrl-single,pins = <
300*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20ba, MUX_MODE3)		/* gpt11/gpio57 */
301*4882a593Smuzhiyun		>;
302*4882a593Smuzhiyun	};
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun	dss_dpi_pins: pinmux_dss_dpi_pins {
305*4882a593Smuzhiyun		pinctrl-single,pins = <
306*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0)   /* dss_pclk.dss_pclk */
307*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0)   /* dss_hsync.dss_hsync */
308*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0)   /* dss_vsync.dss_vsync */
309*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0)   /* dss_acbias.dss_acbias */
310*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0)   /* dss_data0.dss_data0 */
311*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0)   /* dss_data1.dss_data1 */
312*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0)   /* dss_data2.dss_data2 */
313*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0)   /* dss_data3.dss_data3 */
314*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0)   /* dss_data4.dss_data4 */
315*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0)   /* dss_data5.dss_data5 */
316*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0)   /* dss_data6.dss_data6 */
317*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0)   /* dss_data7.dss_data7 */
318*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0)   /* dss_data8.dss_data8 */
319*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0)   /* dss_data9.dss_data9 */
320*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0)   /* dss_data10.dss_data10 */
321*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0)   /* dss_data11.dss_data11 */
322*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0)   /* dss_data12.dss_data12 */
323*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0)   /* dss_data13.dss_data13 */
324*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0)   /* dss_data14.dss_data14 */
325*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)   /* dss_data15.dss_data15 */
326*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0)   /* dss_data16.dss_data16 */
327*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0)   /* dss_data17.dss_data17 */
328*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0)   /* dss_data18.dss_data18 */
329*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0)   /* dss_data19.dss_data19 */
330*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0)   /* dss_data20.dss_data20 */
331*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0)   /* dss_data21.dss_data21 */
332*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0)   /* dss_data22.dss_data22 */
333*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0)   /* dss_data23.dss_data23 */
334*4882a593Smuzhiyun		>;
335*4882a593Smuzhiyun       };
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun	gps_pins: pinmux_gps_pins {
338*4882a593Smuzhiyun		pinctrl-single,pins = <
339*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* gpio145 */
340*4882a593Smuzhiyun		>;
341*4882a593Smuzhiyun	};
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun	hdq_pins: hdq_pins {
344*4882a593Smuzhiyun		pinctrl-single,pins = <
345*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x21c6, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda.hdq */
346*4882a593Smuzhiyun		>;
347*4882a593Smuzhiyun	};
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun	bmp085_pins: pinmux_bmp085_pins {
350*4882a593Smuzhiyun		pinctrl-single,pins = <
351*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2136, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio113 */
352*4882a593Smuzhiyun		>;
353*4882a593Smuzhiyun	};
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun	bma180_pins: pinmux_bma180_pins {
356*4882a593Smuzhiyun		pinctrl-single,pins = <
357*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x213a, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio115 */
358*4882a593Smuzhiyun		>;
359*4882a593Smuzhiyun	};
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun	itg3200_pins: pinmux_itg3200_pins {
362*4882a593Smuzhiyun		pinctrl-single,pins = <
363*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x20b8, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio56 */
364*4882a593Smuzhiyun		>;
365*4882a593Smuzhiyun	};
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun	hmc5843_pins: pinmux_hmc5843_pins {
368*4882a593Smuzhiyun		pinctrl-single,pins = <
369*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2134, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio112 */
370*4882a593Smuzhiyun		>;
371*4882a593Smuzhiyun	};
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun	penirq_pins: pinmux_penirq_pins {
374*4882a593Smuzhiyun		pinctrl-single,pins = <
375*4882a593Smuzhiyun			/* here we could enable to wakeup the cpu from suspend by a pen touch */
376*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2194, PIN_INPUT_PULLUP | MUX_MODE4) /* gpio160 */
377*4882a593Smuzhiyun		>;
378*4882a593Smuzhiyun	};
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun	camera_pins: pinmux_camera_pins {
381*4882a593Smuzhiyun		pinctrl-single,pins = <
382*4882a593Smuzhiyun			/* set up parallel camera interface */
383*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x210c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_hs */
384*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x210e, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_vs */
385*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2110, PIN_OUTPUT | MUX_MODE0) /* cam_xclka */
386*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2112, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_pclk */
387*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2114, PIN_OUTPUT | MUX_MODE4) /* cam_fld = gpio_98 */
388*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2116, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d0 */
389*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2118, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d1 */
390*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x211a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d2 */
391*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d3 */
392*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d4 */
393*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d5 */
394*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d6 */
395*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d7 */
396*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d8 */
397*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d9 */
398*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x212a, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d10 */
399*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x212c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* cam_d10 */
400*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x212e, PIN_OUTPUT | MUX_MODE0) /* cam_xclkb */
401*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* cam_wen = gpio_167 */
402*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2132, PIN_INPUT_PULLDOWN | MUX_MODE4) /* cam_strobe */
403*4882a593Smuzhiyun		>;
404*4882a593Smuzhiyun	};
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun	mcbsp1_pins: pinmux_mcbsp1_pins {
407*4882a593Smuzhiyun		pinctrl-single,pins = <
408*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT | MUX_MODE4)	/* mcbsp1_clkr.mcbsp1_clkr - gpio_156 FM interrupt */
409*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE0)	/* mcbsp1_clkr.mcbsp1_fsr */
410*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE0)	/* mcbsp1_dx.mcbsp1_dx */
411*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT | MUX_MODE0)	/* mcbsp1_dx.mcbsp1_dr */
412*4882a593Smuzhiyun			/* mcbsp_clks is used as PENIRQ */
413*4882a593Smuzhiyun			/* OMAP3_CORE1_IOPAD(0x2194, PIN_INPUT | MUX_MODE0)	   mcbsp_clks.mcbsp_clks */
414*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2196, PIN_INPUT | MUX_MODE0)	/* mcbsp_clks.mcbsp1_fsx */
415*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2198, PIN_INPUT | MUX_MODE0)	/* mcbsp1_clkx.mcbsp1_clkx */
416*4882a593Smuzhiyun		>;
417*4882a593Smuzhiyun	};
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun	mcbsp2_pins: pinmux_mcbsp2_pins {
420*4882a593Smuzhiyun		pinctrl-single,pins = <
421*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0)	/* mcbsp2_fsx.mcbsp2_fsx */
422*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0)	/* mcbsp2_fsx.mcbsp2_clkx */
423*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0)	/* mcbsp2_dr.mcbsp2_dr */
424*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0)	/* mcbsp2_dr.mcbsp2_dx */
425*4882a593Smuzhiyun		>;
426*4882a593Smuzhiyun	};
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun	mcbsp3_pins: pinmux_mcbsp3_pins {
429*4882a593Smuzhiyun		pinctrl-single,pins = <
430*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x216c, PIN_OUTPUT | MUX_MODE0)	/* mcbsp3_dx.mcbsp3_dx */
431*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x216e, PIN_INPUT | MUX_MODE0)	/* mcbsp3_dx.mcbsp3_dr */
432*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2170, PIN_INPUT | MUX_MODE0)	/* mcbsp3_clkx.mcbsp3_clkx */
433*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE0)	/* mcbsp3_clkx.mcbsp3_fsx */
434*4882a593Smuzhiyun		>;
435*4882a593Smuzhiyun	};
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun	mcbsp4_pins: pinmux_mcbsp4_pins {
438*4882a593Smuzhiyun		pinctrl-single,pins = <
439*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* mcbsp4_clkx.mcbsp4_clkx */
440*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* mcbsp4_clkx.mcbsp4_dr */
441*4882a593Smuzhiyun			OMAP3_CORE1_IOPAD(0x218a, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* mcbsp4_dx.mcbsp4_fsx */
442*4882a593Smuzhiyun		>;
443*4882a593Smuzhiyun	};
444*4882a593Smuzhiyun};
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun&omap3_pmx_core2 {
447*4882a593Smuzhiyun	pinctrl-names = "default";
448*4882a593Smuzhiyun	pinctrl-0 = <
449*4882a593Smuzhiyun			&hsusb2_2_pins
450*4882a593Smuzhiyun	>;
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun	hsusb2_2_pins: pinmux_hsusb2_2_pins {
453*4882a593Smuzhiyun		pinctrl-single,pins = <
454*4882a593Smuzhiyun			OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)		/* etk_d10.hsusb2_clk */
455*4882a593Smuzhiyun			OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)		/* etk_d11.hsusb2_stp */
456*4882a593Smuzhiyun			OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d12.hsusb2_dir */
457*4882a593Smuzhiyun			OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d13.hsusb2_nxt */
458*4882a593Smuzhiyun			OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d14.hsusb2_data0 */
459*4882a593Smuzhiyun			OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)	/* etk_d15.hsusb2_data1 */
460*4882a593Smuzhiyun		>;
461*4882a593Smuzhiyun	};
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun	spi_gpio_pins: spi_gpio_pinmux {
464*4882a593Smuzhiyun		pinctrl-single,pins = <
465*4882a593Smuzhiyun			OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE4) /* clk */
466*4882a593Smuzhiyun			OMAP3630_CORE2_IOPAD(0x25e6, PIN_OUTPUT | MUX_MODE4) /* cs */
467*4882a593Smuzhiyun			OMAP3630_CORE2_IOPAD(0x25e8, PIN_OUTPUT | MUX_MODE4) /* tx */
468*4882a593Smuzhiyun			OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT | MUX_MODE4) /* rx */
469*4882a593Smuzhiyun		>;
470*4882a593Smuzhiyun	};
471*4882a593Smuzhiyun};
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun&i2c1 {
474*4882a593Smuzhiyun	clock-frequency = <2600000>;
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun	twl: twl@48 {
477*4882a593Smuzhiyun		reg = <0x48>;
478*4882a593Smuzhiyun		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
479*4882a593Smuzhiyun		interrupt-parent = <&intc>;
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun		clocks = <&hfclk_26m>;
482*4882a593Smuzhiyun		clock-names = "fck";
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun		twl_audio: audio {
485*4882a593Smuzhiyun			compatible = "ti,twl4030-audio";
486*4882a593Smuzhiyun			ti,enable-vibra = <1>;
487*4882a593Smuzhiyun			codec {
488*4882a593Smuzhiyun				ti,ramp_delay_value = <3>;
489*4882a593Smuzhiyun			};
490*4882a593Smuzhiyun		};
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun		twl_power: power {
493*4882a593Smuzhiyun			compatible = "ti,twl4030-power";
494*4882a593Smuzhiyun			ti,use_poweroff;
495*4882a593Smuzhiyun		};
496*4882a593Smuzhiyun	};
497*4882a593Smuzhiyun};
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun#include "twl4030.dtsi"
500*4882a593Smuzhiyun#include "twl4030_omap3.dtsi"
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun&i2c2 {
503*4882a593Smuzhiyun	clock-frequency = <400000>;
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun	/* pressure sensor */
506*4882a593Smuzhiyun	bmp085@77 {
507*4882a593Smuzhiyun		compatible = "bosch,bmp085";
508*4882a593Smuzhiyun		reg = <0x77>;
509*4882a593Smuzhiyun		pinctrl-names = "default";
510*4882a593Smuzhiyun		pinctrl-0 = <&bmp085_pins>;
511*4882a593Smuzhiyun		interrupt-parent = <&gpio4>;
512*4882a593Smuzhiyun		interrupts = <17 IRQ_TYPE_EDGE_RISING>; /* GPIO_113 */
513*4882a593Smuzhiyun	};
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun	/* accelerometer */
516*4882a593Smuzhiyun	bma180@41 {
517*4882a593Smuzhiyun		compatible = "bosch,bma180";
518*4882a593Smuzhiyun		reg = <0x41>;
519*4882a593Smuzhiyun		pinctrl-names = "default";
520*4882a593Smuzhiyun		pinctrl-0 = <&bma180_pins>;
521*4882a593Smuzhiyun		interrupt-parent = <&gpio4>;
522*4882a593Smuzhiyun		interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; /* GPIO_115 */
523*4882a593Smuzhiyun	};
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun	/* gyroscope */
526*4882a593Smuzhiyun	itg3200@68 {
527*4882a593Smuzhiyun		compatible = "invensense,itg3200";
528*4882a593Smuzhiyun		reg = <0x68>;
529*4882a593Smuzhiyun		pinctrl-names = "default";
530*4882a593Smuzhiyun		pinctrl-0 = <&itg3200_pins>;
531*4882a593Smuzhiyun		interrupt-parent = <&gpio2>;
532*4882a593Smuzhiyun		interrupts = <24 IRQ_TYPE_EDGE_FALLING>; /* GPIO_56 */
533*4882a593Smuzhiyun	};
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun	/* leds + gpios */
536*4882a593Smuzhiyun	tca6507: tca6507@45 {
537*4882a593Smuzhiyun		compatible = "ti,tca6507";
538*4882a593Smuzhiyun		#address-cells = <1>;
539*4882a593Smuzhiyun		#size-cells = <0>;
540*4882a593Smuzhiyun		reg = <0x45>;
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun		gpio-controller;
543*4882a593Smuzhiyun		#gpio-cells = <2>;
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun		gta04_led0: red_aux@0 {
546*4882a593Smuzhiyun			label = "gta04:red:aux";
547*4882a593Smuzhiyun			reg = <0x0>;
548*4882a593Smuzhiyun		};
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun		gta04_led1: green_aux@1 {
551*4882a593Smuzhiyun			label = "gta04:green:aux";
552*4882a593Smuzhiyun			reg = <0x1>;
553*4882a593Smuzhiyun		};
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun		gta04_led3: red_power@3 {
556*4882a593Smuzhiyun			label = "gta04:red:power";
557*4882a593Smuzhiyun			reg = <0x3>;
558*4882a593Smuzhiyun			linux,default-trigger = "default-on";
559*4882a593Smuzhiyun		};
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun		gta04_led4: green_power@4 {
562*4882a593Smuzhiyun			label = "gta04:green:power";
563*4882a593Smuzhiyun			reg = <0x4>;
564*4882a593Smuzhiyun		};
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun		wifi_reset: wifi_reset@6 { /* reference as <&tca_gpios 0 0> since it is currently the only GPIO */
567*4882a593Smuzhiyun			reg = <0x6>;
568*4882a593Smuzhiyun			compatible = "gpio";
569*4882a593Smuzhiyun		};
570*4882a593Smuzhiyun	};
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun	/* compass aka magnetometer */
573*4882a593Smuzhiyun	hmc5843@1e {
574*4882a593Smuzhiyun		compatible = "honeywell,hmc5883l";
575*4882a593Smuzhiyun		reg = <0x1e>;
576*4882a593Smuzhiyun		pinctrl-names = "default";
577*4882a593Smuzhiyun		pinctrl-0 = <&hmc5843_pins>;
578*4882a593Smuzhiyun		interrupt-parent = <&gpio4>;
579*4882a593Smuzhiyun		interrupts = <16 IRQ_TYPE_EDGE_FALLING>;	/* gpio112 */
580*4882a593Smuzhiyun	};
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun	/* touchscreen */
583*4882a593Smuzhiyun	tsc2007@48 {
584*4882a593Smuzhiyun		compatible = "ti,tsc2007";
585*4882a593Smuzhiyun		reg = <0x48>;
586*4882a593Smuzhiyun		pinctrl-names = "default";
587*4882a593Smuzhiyun		pinctrl-0 = <&penirq_pins>;
588*4882a593Smuzhiyun		interrupt-parent = <&gpio6>;
589*4882a593Smuzhiyun		interrupts = <0 IRQ_TYPE_EDGE_FALLING>; /* GPIO_160 */
590*4882a593Smuzhiyun		gpios = <&gpio6 0 GPIO_ACTIVE_LOW>;	/* GPIO_160 */
591*4882a593Smuzhiyun		ti,x-plate-ohms = <600>;
592*4882a593Smuzhiyun		touchscreen-size-x = <480>;
593*4882a593Smuzhiyun		touchscreen-size-y = <640>;
594*4882a593Smuzhiyun		touchscreen-max-pressure = <1000>;
595*4882a593Smuzhiyun		touchscreen-fuzz-x = <3>;
596*4882a593Smuzhiyun		touchscreen-fuzz-y = <8>;
597*4882a593Smuzhiyun		touchscreen-fuzz-pressure = <10>;
598*4882a593Smuzhiyun		touchscreen-inverted-y;
599*4882a593Smuzhiyun	};
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun	/* RFID EEPROM */
602*4882a593Smuzhiyun	m24lr64@50 {
603*4882a593Smuzhiyun		compatible = "atmel,24c64";
604*4882a593Smuzhiyun		reg = <0x50>;
605*4882a593Smuzhiyun	};
606*4882a593Smuzhiyun};
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun&i2c3 {
609*4882a593Smuzhiyun	clock-frequency = <100000>;
610*4882a593Smuzhiyun};
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun&usb_otg_hs {
613*4882a593Smuzhiyun	interface-type = <0>;
614*4882a593Smuzhiyun	usb-phy = <&usb2_phy>;
615*4882a593Smuzhiyun	phys = <&usb2_phy>;
616*4882a593Smuzhiyun	phy-names = "usb2-phy";
617*4882a593Smuzhiyun	mode = <3>;
618*4882a593Smuzhiyun	power = <50>;
619*4882a593Smuzhiyun};
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun&usbhshost {
622*4882a593Smuzhiyun	port2-mode = "ehci-phy";
623*4882a593Smuzhiyun};
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun&usbhsehci {
626*4882a593Smuzhiyun	phys = <0 &hsusb2_phy>;
627*4882a593Smuzhiyun};
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun&mmc1 {
630*4882a593Smuzhiyun	pinctrl-names = "default";
631*4882a593Smuzhiyun	pinctrl-0 = <&mmc1_pins>;
632*4882a593Smuzhiyun	vmmc-supply = <&vmmc1>;
633*4882a593Smuzhiyun	bus-width = <4>;
634*4882a593Smuzhiyun	ti,non-removable;
635*4882a593Smuzhiyun	broken-cd;	/* hardware has no CD */
636*4882a593Smuzhiyun};
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun&mmc2 {
639*4882a593Smuzhiyun	vmmc-supply = <&vaux4>;
640*4882a593Smuzhiyun	bus-width = <4>;
641*4882a593Smuzhiyun	ti,non-removable;
642*4882a593Smuzhiyun	cap-power-off-card;
643*4882a593Smuzhiyun	mmc-pwrseq = <&wifi_pwrseq>;
644*4882a593Smuzhiyun};
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun&mmc3 {
647*4882a593Smuzhiyun	status = "disabled";
648*4882a593Smuzhiyun};
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun#define BIT(x) (1 << (x))
651*4882a593Smuzhiyun&twl_gpio {
652*4882a593Smuzhiyun	/* pullups: BIT(2) */
653*4882a593Smuzhiyun	ti,pullups = <BIT(2)>;
654*4882a593Smuzhiyun	/*
655*4882a593Smuzhiyun	 * pulldowns:
656*4882a593Smuzhiyun	 * BIT(0),  BIT(1), BIT(6), BIT(7), BIT(8), BIT(13)
657*4882a593Smuzhiyun	 * BIT(15), BIT(16), BIT(17)
658*4882a593Smuzhiyun	 */
659*4882a593Smuzhiyun	ti,pulldowns = <(BIT(0) | BIT(1) | BIT(6) | BIT(7) | BIT(8) |
660*4882a593Smuzhiyun			 BIT(13) | BIT(15) | BIT(16) | BIT(17))>;
661*4882a593Smuzhiyun};
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun&twl_keypad {
664*4882a593Smuzhiyun	status = "disabled";
665*4882a593Smuzhiyun};
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun&gpio1 {
668*4882a593Smuzhiyun	pinctrl-names = "default";
669*4882a593Smuzhiyun	pinctrl-0 = <&gpio1_pins>;
670*4882a593Smuzhiyun};
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun&uart1 {
673*4882a593Smuzhiyun	pinctrl-names = "default";
674*4882a593Smuzhiyun	pinctrl-0 = <&uart1_pins>;
675*4882a593Smuzhiyun};
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun&uart2 {
678*4882a593Smuzhiyun	pinctrl-names = "default";
679*4882a593Smuzhiyun	pinctrl-0 = <&uart2_pins>;
680*4882a593Smuzhiyun	gnss: gnss {
681*4882a593Smuzhiyun		compatible = "wi2wi,w2sg0004";
682*4882a593Smuzhiyun		pinctrl-names = "default";
683*4882a593Smuzhiyun		pinctrl-0 = <&gps_pins>;
684*4882a593Smuzhiyun		sirf,onoff-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
685*4882a593Smuzhiyun		lna-supply = <&vsim>;
686*4882a593Smuzhiyun		vcc-supply = <&ldo_3v3>;
687*4882a593Smuzhiyun	};
688*4882a593Smuzhiyun};
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun&uart3 {
691*4882a593Smuzhiyun	pinctrl-names = "default";
692*4882a593Smuzhiyun	pinctrl-0 = <&uart3_pins>;
693*4882a593Smuzhiyun	interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
694*4882a593Smuzhiyun};
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun&charger {
697*4882a593Smuzhiyun	ti,bb-uvolt = <3200000>;
698*4882a593Smuzhiyun	ti,bb-uamp = <150>;
699*4882a593Smuzhiyun};
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun/* spare */
702*4882a593Smuzhiyun&vaux1 {
703*4882a593Smuzhiyun	regulator-min-microvolt = <2500000>;
704*4882a593Smuzhiyun	regulator-max-microvolt = <3000000>;
705*4882a593Smuzhiyun};
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun/* sensors */
708*4882a593Smuzhiyun&vaux2 {
709*4882a593Smuzhiyun	regulator-min-microvolt = <2800000>;
710*4882a593Smuzhiyun	regulator-max-microvolt = <2800000>;
711*4882a593Smuzhiyun	regulator-always-on;	/* we should never switch off while vio is on! */
712*4882a593Smuzhiyun};
713*4882a593Smuzhiyun
714*4882a593Smuzhiyun/* camera */
715*4882a593Smuzhiyun&vaux3 {
716*4882a593Smuzhiyun	regulator-min-microvolt = <2500000>;
717*4882a593Smuzhiyun	regulator-max-microvolt = <2500000>;
718*4882a593Smuzhiyun};
719*4882a593Smuzhiyun
720*4882a593Smuzhiyun/* WLAN/BT */
721*4882a593Smuzhiyun&vaux4 {
722*4882a593Smuzhiyun	regulator-min-microvolt = <2800000>;
723*4882a593Smuzhiyun	regulator-max-microvolt = <3150000>;
724*4882a593Smuzhiyun};
725*4882a593Smuzhiyun
726*4882a593Smuzhiyun/* GPS LNA */
727*4882a593Smuzhiyun&vsim {
728*4882a593Smuzhiyun	regulator-min-microvolt = <2800000>;
729*4882a593Smuzhiyun	regulator-max-microvolt = <3150000>;
730*4882a593Smuzhiyun};
731*4882a593Smuzhiyun
732*4882a593Smuzhiyun/* Needed to power the DPI pins */
733*4882a593Smuzhiyun
734*4882a593Smuzhiyun&vpll2 {
735*4882a593Smuzhiyun	regulator-always-on;
736*4882a593Smuzhiyun};
737*4882a593Smuzhiyun
738*4882a593Smuzhiyun&dss {
739*4882a593Smuzhiyun	pinctrl-names = "default";
740*4882a593Smuzhiyun	pinctrl-0 = < &dss_dpi_pins >;
741*4882a593Smuzhiyun
742*4882a593Smuzhiyun	status = "okay";
743*4882a593Smuzhiyun	vdds_dsi-supply = <&vpll2>;
744*4882a593Smuzhiyun
745*4882a593Smuzhiyun	port {
746*4882a593Smuzhiyun		dpi_out: endpoint {
747*4882a593Smuzhiyun			remote-endpoint = <&lcd_in>;
748*4882a593Smuzhiyun			data-lines = <24>;
749*4882a593Smuzhiyun		};
750*4882a593Smuzhiyun	};
751*4882a593Smuzhiyun};
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun&venc {
754*4882a593Smuzhiyun	status = "okay";
755*4882a593Smuzhiyun
756*4882a593Smuzhiyun	vdda-supply = <&vdac>;
757*4882a593Smuzhiyun
758*4882a593Smuzhiyun	port {
759*4882a593Smuzhiyun		venc_out: endpoint {
760*4882a593Smuzhiyun			remote-endpoint = <&opa_in>;
761*4882a593Smuzhiyun			ti,channels = <1>;
762*4882a593Smuzhiyun			ti,invert-polarity;
763*4882a593Smuzhiyun		};
764*4882a593Smuzhiyun	};
765*4882a593Smuzhiyun};
766*4882a593Smuzhiyun
767*4882a593Smuzhiyun&gpmc {
768*4882a593Smuzhiyun	ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
769*4882a593Smuzhiyun
770*4882a593Smuzhiyun	nand@0,0 {
771*4882a593Smuzhiyun		compatible = "ti,omap2-nand";
772*4882a593Smuzhiyun		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
773*4882a593Smuzhiyun		interrupt-parent = <&gpmc>;
774*4882a593Smuzhiyun		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
775*4882a593Smuzhiyun			     <1 IRQ_TYPE_NONE>;	/* termcount */
776*4882a593Smuzhiyun		ti,nand-ecc-opt = "ham1";
777*4882a593Smuzhiyun		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
778*4882a593Smuzhiyun		nand-bus-width = <16>;
779*4882a593Smuzhiyun		#address-cells = <1>;
780*4882a593Smuzhiyun		#size-cells = <1>;
781*4882a593Smuzhiyun
782*4882a593Smuzhiyun		gpmc,device-width = <2>;
783*4882a593Smuzhiyun		gpmc,cs-on-ns = <0>;
784*4882a593Smuzhiyun		gpmc,cs-rd-off-ns = <44>;
785*4882a593Smuzhiyun		gpmc,cs-wr-off-ns = <44>;
786*4882a593Smuzhiyun		gpmc,adv-on-ns = <6>;
787*4882a593Smuzhiyun		gpmc,adv-rd-off-ns = <34>;
788*4882a593Smuzhiyun		gpmc,adv-wr-off-ns = <44>;
789*4882a593Smuzhiyun		gpmc,oe-off-ns = <54>;
790*4882a593Smuzhiyun		gpmc,we-off-ns = <40>;
791*4882a593Smuzhiyun		gpmc,access-ns = <64>;
792*4882a593Smuzhiyun		gpmc,rd-cycle-ns = <82>;
793*4882a593Smuzhiyun		gpmc,wr-cycle-ns = <82>;
794*4882a593Smuzhiyun		gpmc,wr-access-ns = <40>;
795*4882a593Smuzhiyun		gpmc,wr-data-mux-bus-ns = <0>;
796*4882a593Smuzhiyun		gpmc,sync-clk-ps = <0>;
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun		x-loader@0 {
799*4882a593Smuzhiyun			label = "X-Loader";
800*4882a593Smuzhiyun			reg = <0 0x80000>;
801*4882a593Smuzhiyun		};
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun		bootloaders@80000 {
804*4882a593Smuzhiyun			label = "U-Boot";
805*4882a593Smuzhiyun			reg = <0x80000 0x1c0000>;
806*4882a593Smuzhiyun		};
807*4882a593Smuzhiyun
808*4882a593Smuzhiyun		bootloaders_env@240000 {
809*4882a593Smuzhiyun			label = "U-Boot Env";
810*4882a593Smuzhiyun			reg = <0x240000 0x40000>;
811*4882a593Smuzhiyun		};
812*4882a593Smuzhiyun
813*4882a593Smuzhiyun		kernel@280000 {
814*4882a593Smuzhiyun			label = "Kernel";
815*4882a593Smuzhiyun			reg = <0x280000 0x600000>;
816*4882a593Smuzhiyun		};
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun		filesystem@880000 {
819*4882a593Smuzhiyun			label = "File System";
820*4882a593Smuzhiyun			reg = <0x880000 0>;	/* 0 = MTDPART_SIZ_FULL */
821*4882a593Smuzhiyun		};
822*4882a593Smuzhiyun	};
823*4882a593Smuzhiyun};
824*4882a593Smuzhiyun
825*4882a593Smuzhiyun&mcbsp1 { /* FM Transceiver PCM */
826*4882a593Smuzhiyun	status = "okay";
827*4882a593Smuzhiyun	#sound-dai-cells = <0>;
828*4882a593Smuzhiyun	pinctrl-names = "default";
829*4882a593Smuzhiyun	pinctrl-0 = <&mcbsp1_pins>;
830*4882a593Smuzhiyun};
831*4882a593Smuzhiyun
832*4882a593Smuzhiyun&mcbsp2 { /* TPS65950 I2S */
833*4882a593Smuzhiyun	status = "okay";
834*4882a593Smuzhiyun	pinctrl-names = "default";
835*4882a593Smuzhiyun	pinctrl-0 = <&mcbsp2_pins>;
836*4882a593Smuzhiyun};
837*4882a593Smuzhiyun
838*4882a593Smuzhiyun&mcbsp3 { /* Bluetooth PCM */
839*4882a593Smuzhiyun	status = "okay";
840*4882a593Smuzhiyun	#sound-dai-cells = <0>;
841*4882a593Smuzhiyun	pinctrl-names = "default";
842*4882a593Smuzhiyun	pinctrl-0 = <&mcbsp3_pins>;
843*4882a593Smuzhiyun};
844*4882a593Smuzhiyun
845*4882a593Smuzhiyun&mcbsp4 { /* GSM voice PCM */
846*4882a593Smuzhiyun	status = "okay";
847*4882a593Smuzhiyun	#sound-dai-cells = <0>;
848*4882a593Smuzhiyun	pinctrl-names = "default";
849*4882a593Smuzhiyun	pinctrl-0 = <&mcbsp4_pins>;
850*4882a593Smuzhiyun};
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun&hdqw1w {
853*4882a593Smuzhiyun        pinctrl-names = "default";
854*4882a593Smuzhiyun        pinctrl-0 = <&hdq_pins>;
855*4882a593Smuzhiyun};
856*4882a593Smuzhiyun
857*4882a593Smuzhiyun/* image signal processor within OMAP3 SoC */
858*4882a593Smuzhiyun&isp {
859*4882a593Smuzhiyun	ports {
860*4882a593Smuzhiyun		port@0 {
861*4882a593Smuzhiyun			reg = <0>;
862*4882a593Smuzhiyun			parallel_ep: endpoint {
863*4882a593Smuzhiyun				ti,isp-clock-divisor = <1>;
864*4882a593Smuzhiyun				ti,strobe-mode;
865*4882a593Smuzhiyun				bus-width = <8>;/* Used data lines */
866*4882a593Smuzhiyun				data-shift = <2>; /* Lines 9:2 are used */
867*4882a593Smuzhiyun				hsync-active = <0>; /* Active low */
868*4882a593Smuzhiyun				vsync-active = <1>; /* Active high */
869*4882a593Smuzhiyun				data-active = <1>;/* Active high */
870*4882a593Smuzhiyun				pclk-sample = <1>;/* Falling */
871*4882a593Smuzhiyun			};
872*4882a593Smuzhiyun		};
873*4882a593Smuzhiyun		/* port@1 and port@2 are not used by GTA04 */
874*4882a593Smuzhiyun	};
875*4882a593Smuzhiyun};
876