xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/rng/rockchip,rng.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1Rockchip Hardware Random Number Generator
2
3Required properties:
4
5- compatible  : should be one of the following.
6		"rockchip,cryptov1-rng" for crypto v1
7		"rockchip,cryptov2-rng" for crypto v2
8		"rockchip,trngv1" for independent trng, such as rk3588.
9- reg         : Specifies base physical address and size of the registers map.
10- clocks      : Phandle to clock-controller plus clock-specifier pair.
11- clock-names : "clk_crypto", "clk_crypto_apk", "aclk_crypto", "hclk_crypto" as a clock name.
12- assigned-clocks: Main clock, should be <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>,
13		<&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>
14- assigned-clock-rates : The rng core clk frequency, shall be: <150000000>, <150000000>,
15		<200000000>, <100000000>
16- resets      : Used for module reset
17- reset-names : Reset names, should be "reset"
18Example:
19
20	rng: rng@100fc000 {
21		compatible = "rockchip,cryptov1-rng";
22		reg = <0x100fc000 0x4000>;
23		clocks = <&cru SCLK_CRYPTO>, <&cru HCLK_CRYPTO>;
24		clock-names = "clk_crypto", "hclk_crypto";
25		assigned-clocks = <&cru SCLK_CRYPTO>, <&cru HCLK_CRYPTO>;
26		assigned-clock-rates = <150000000>, <100000000>;
27		resets = <&cru SRST_CRYPTO>;
28		reset-names = "reset";
29		status = "disabled";
30	};
31
32	rng: rng@ff2f0000 {
33		compatible = "rockchip,cryptov2-rng";
34		reg = <0x0 0xff2f0000 0x0 0x4000>;
35		clocks = <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>,
36			<&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>;
37		clock-names = "clk_crypto", "clk_crypto_apk",
38			"aclk_crypto", "hclk_crypto";
39		assigned-clocks = <&cru SCLK_CRYPTO>, <&cru SCLK_CRYPTO_APK>,
40				<&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>;
41		assigned-clock-rates = <150000000>, <150000000>,
42					<200000000>, <100000000>;
43		resets = <&cru SRST_CRYPTO>;
44		reset-names = "reset";
45	};
46
47