1ROCKCHIP MIPI DPHY WITH INNO IP BLOCK 2 3Required properties: 4 - compatible : must be one of: 5 "rockchip,rk1808-mipi-dphy"; 6 "rockchip,rv1126-mipi-dphy"; 7 - reg : the address offset of register for mipi-dphy configuration. 8 - #phy-cells : must be 0. See ./phy-bindings.txt for details. 9 - clocks and clock-names: 10 - the "pclk" clock is required by the phy module, used to register 11 configuration 12 - the "ref" clock is used to get the rate of the reference clock 13 provided to the PHY module 14 - clock-output-names: from common clock binding. 15 See ../clocks/clock-bindings.txt for details. 16 - #clock-cells : from common clock binding; shall be set to 0. 17 - resets : phandle to the reset of MIPI DSI PHY APB clock. 18 - reset-names : should be "apb". 19 20Example: 21 mipi_dphy: mipi-dphy@ff370000 { 22 compatible = "rockchip,rk1808-mipi-dphy"; 23 reg = <0x0 0xff370000 0x0 0x500>; 24 clocks = <&cru SCLK_MIPIDSIPHY_REF>, <&cru PCLK_MIPIDSIPHY>; 25 clock-names = "ref", "pclk"; 26 clock-output-names = "mipi_dphy_pll"; 27 #clock-cells = <0>; 28 resets = <&cru SRST_MIPIDSIPHY_P>; 29 reset-names = "apb"; 30 #phy-cells = <0>; 31 rockchip,grf = <&grf>; 32 status = "disabled"; 33 }; 34