1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/clock/rockchip,rv1106-cru.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: ROCKCHIP rv1106 Family Clock Control Module Binding 8 9maintainers: 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 12 13description: | 14 The RV1106 clock controller generates the clock and also implements a 15 reset controller for SoC peripherals. 16 (examples: provide SCLK_UART2\PCLK_UART2 and SRST_P_UART2\SRST_S_UART2 for UART module) 17 Each clock is assigned an identifier and client nodes can use this identifier 18 to specify the clock which they consume. All available clocks are defined as 19 preprocessor macros in the dt-bindings/clock/rv1106-cru.h headers and can be 20 used in device tree sources. 21 22properties: 23 compatible: 24 enum: 25 - rockchip,rv1106-cru 26 27 reg: 28 maxItems: 1 29 30 "#clock-cells": 31 const: 1 32 33 "#reset-cells": 34 const: 1 35 36 clocks: true 37 38 assigned-clocks: 39 minItems: 1 40 41 assigned-clock-parents: 42 minItems: 1 43 44 assigned-clock-rates: 45 minItems: 1 46 47required: 48 - compatible 49 - reg 50 - "#clock-cells" 51 - "#reset-cells" 52 53additionalProperties: false 54 55examples: 56 # Clock Control Module node: 57 - | 58 cru: clock-controller@ff3a0000 { 59 compatible = "rockchip,rv1106-cru"; 60 reg = <0xff3a0000 0x20000>; 61 #clock-cells = <1>; 62 #reset-cells = <1>; 63 }; 64