1/* 2 * 3 * (C) COPYRIGHT 2022 ARM Limited. All rights reserved. 4 * 5 * This program is free software and is provided to you under the terms of the 6 * GNU General Public License version 2 as published by the Free Software 7 * Foundation) and any use by you of this program is subject to the terms 8 * of such GNU licence. 9 * 10 * A copy of the licence is included with the program) and can also be obtained 11 * from Free Software Foundation) Inc.) 51 Franklin Street) Fifth Floor) 12 * Boston) MA 02110-1301) USA. 13 * 14 */ 15 16What: /sys/bus/coresight/devices/mali-source-etm/enable_source 17Description: 18 Attribute used to enable Coresight Source ETM. 19 20What: /sys/bus/coresight/devices/mali-source-etm/is_enabled 21Description: 22 Attribute used to check if Coresight Source ITM is enabled. 23 24What: /sys/bus/coresight/devices/mali-source-etm/trcconfigr 25Description: 26 Coresight Source ETM trace configuration to enable global 27 timestamping, and data value tracing. 28 29What: /sys/bus/coresight/devices/mali-source-etm/trctraceidr 30Description: 31 Coresight Source ETM trace ID. 32 33What: /sys/bus/coresight/devices/mali-source-etm/trcvdarcctlr 34Description: 35 Coresight Source ETM viewData include/exclude address 36 range comparators. 37 38What: /sys/bus/coresight/devices/mali-source-etm/trcviiectlr 39Description: 40 Coresight Source ETM viewInst include and exclude control. 41 42What: /sys/bus/coresight/devices/mali-source-etm/trcstallctlr 43Description: 44 Coresight Source ETM stall control register. 45 46What: /sys/bus/coresight/devices/mali-source-itm/enable_source 47Description: 48 Attribute used to enable Coresight Source ITM. 49 50What: /sys/bus/coresight/devices/mali-source-itm/is_enabled 51Description: 52 Attribute used to check if Coresight Source ITM is enabled. 53 54What: /sys/bus/coresight/devices/mali-source-itm/dwt_ctrl 55Description: 56 Coresight Source DWT configuration: 57 [0] = 1, enable cycle counter 58 [4:1] = 4, set PC sample rate pf 256 cycles 59 [8:5] = 1, set initial post count value 60 [9] = 1, select position of post count tap on the cycle counter 61 [10:11] = 1, enable sync packets 62 [12] = 1, enable periodic PC sample packets 63 64What: /sys/bus/coresight/devices/mali-source-itm/itm_tcr 65Description: 66 Coresight Source ITM configuration: 67 [0] = 1, Enable ITM 68 [1] = 1, Enable Time stamp generation 69 [2] = 1, Enable sync packet transmission 70 [3] = 1, Enable HW event forwarding 71 [11:10] = 1, Generate TS request approx every 128 cycles 72 [22:16] = 1, Trace bus ID 73 74What: /sys/bus/coresight/devices/mali-source-ela/enable_source 75Description: 76 Attribute used to enable Coresight Source ELA. 77 78What: /sys/bus/coresight/devices/mali-source-ela/is_enabled 79Description: 80 Attribute used to check if Coresight Source ELA is enabled. 81 82What: /sys/bus/coresight/devices/mali-source-ela/select 83Description: 84 Coresight Source ELA select trace mode: 85 [0], NONE 86 [1], JCN 87 [2], CEU_EXEC 88 [3], CEU_CMDS 89 [4], MCU_AHBP 90 [5], HOST_AXI 91 [6], NR_TRACEMODE 92 93 Refer to specification for more details. 94 95What: /sys/bus/coresight/devices/mali-source-ela/sigmask0 96Description: 97 Coresight Source ELA SIGMASK0 register set/get. 98 Refer to specification for more details. 99 100What: /sys/bus/coresight/devices/mali-source-ela/sigmask4 101Description: 102 Coresight Source ELA SIGMASK4 register set/get. 103 Refer to specification for more details. 104 105What: /sys/bus/coresight/devices/mali-source-ela/sigcomp0 106Description: 107 Coresight Source ELA SIGCOMP0 register set/get. 108 Refer to specification for more details. 109 110What: /sys/bus/coresight/devices/mali-source-ela/sigcomp4 111Description: 112 Coresight Source ELA SIGCOMP4 register set/get. 113 Refer to specification for more details. 114