1 /****************************************************************************** 2 * 3 * Copyright(c) 2019 - 2021 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 *****************************************************************************/ 15 #ifndef _PHL_STRUCT_H_ 16 #define _PHL_STRUCT_H_ 17 #define PHL_MACID_MAX_ARRAY_NUM 8 /* 8x32=256 */ 18 #define PHL_MACID_MAX_NUM (PHL_MACID_MAX_ARRAY_NUM * 32) 19 20 #define PHL_STA_TID_NUM (16) /* TODO: */ 21 22 struct hci_info_t { 23 /* enum rtw_hci_type hci_type; */ 24 25 #if defined(CONFIG_PCI_HCI) 26 27 u8 total_txch_num; 28 u8 total_rxch_num; 29 u8 *txbd_buf; 30 u8 *rxbd_buf; 31 #if defined(PCIE_TRX_MIT_EN) 32 u8 fixed_mitigation; /*no watchdog dynamic setting*/ 33 #endif 34 #elif defined(CONFIG_USB_HCI) 35 u16 usb_bulkout_size; 36 #elif defined(CONFIG_SDIO_HCI) 37 u32 tx_drop_cnt; /* bit31 means overflow or not */ 38 #ifdef SDIO_TX_THREAD 39 _os_sema tx_thrd_sema; 40 _os_thread tx_thrd; 41 #ifdef CONFIG_PHL_SDIO_TX_CB_THREAD 42 #ifndef RTW_WKARD_SDIO_TX_USE_YIELD 43 _os_lock tx_buf_lock; 44 _os_event *tx_buf_event; 45 #endif /* !RTW_WKARD_SDIO_TX_USE_YIELD */ 46 #endif /* CONFIG_PHL_SDIO_TX_CB_THREAD */ 47 #endif /* SDIO_TX_THREAD */ 48 #endif 49 50 u8 *wd_ring; 51 u8 *txbuf_pool; 52 u8 *rxbuf_pool; 53 u8 *wp_tag; 54 u16 wp_seq[PHL_MACID_MAX_NUM]; /* maximum macid number */ 55 56 }; 57 58 59 #define MAX_PHL_RING_STATUS_NUMBER 64 60 #define RX_REORDER_RING_NUMBER PHL_MACID_MAX_NUM 61 #define PCIE_BUS_EFFICIENCY 4 62 #define ETH_ALEN 6 63 64 struct phl_ring_status { 65 _os_list list; 66 u16 macid; 67 u8 band;/*0 or 1*/ 68 u8 wmm;/*0 or 1*/ 69 u8 port; 70 /*u8 mbssid*/ 71 u16 req_busy; 72 struct rtw_phl_tx_ring *ring_ptr; 73 }; 74 75 struct phl_ring_sts_pool { 76 struct phl_ring_status ring_sts[MAX_PHL_RING_STATUS_NUMBER]; 77 _os_list idle; 78 _os_list busy; 79 _os_lock idle_lock; 80 _os_lock busy_lock; 81 }; 82 83 /** 84 * struct phl_hci_trx_ops - interface specific operations 85 * 86 * @hci_trx_init: the function for HCI trx init 87 * @hci_trx_deinit: the function for HCI trx deinit 88 * @prepare_tx: prepare packets for hal transmission 89 * @recycle_rx_buf: recycle rx buffer 90 * @tx: tx packet to hw 91 * @rx: rx packet to sw 92 */ 93 struct phl_info_t; 94 struct phl_hci_trx_ops { 95 enum rtw_phl_status (*hci_trx_init)(struct phl_info_t *phl); 96 void (*hci_trx_deinit)(struct phl_info_t *phl); 97 enum rtw_phl_status (*prepare_tx)(struct phl_info_t *phl, 98 struct rtw_xmit_req *tx_req); 99 enum rtw_phl_status (*recycle_rx_buf)(struct phl_info_t *phl, 100 void *r, u8 ch, enum rtw_rx_type type); 101 enum rtw_phl_status (*tx)(struct phl_info_t *phl); 102 enum rtw_phl_status (*rx)(struct phl_info_t *phl); 103 enum rtw_phl_status (*trx_cfg)(struct phl_info_t *phl); 104 void (*trx_stop)(struct phl_info_t *phl); 105 enum rtw_phl_status (*pltfm_tx)(struct phl_info_t *phl, void *pkt); 106 void (*free_h2c_pkt_buf)(struct phl_info_t *phl_info, 107 struct rtw_h2c_pkt *_h2c_pkt); 108 enum rtw_phl_status (*alloc_h2c_pkt_buf)(struct phl_info_t *phl_info, 109 struct rtw_h2c_pkt *_h2c_pkt, u32 buf_len); 110 void (*trx_reset)(struct phl_info_t *phl, u8 type); 111 void (*trx_resume)(struct phl_info_t *phl, u8 type); 112 void (*req_tx_stop)(struct phl_info_t *phl); 113 void (*req_rx_stop)(struct phl_info_t *phl); 114 bool (*is_tx_pause)(struct phl_info_t *phl); 115 bool (*is_rx_pause)(struct phl_info_t *phl); 116 void *(*get_txbd_buf)(struct phl_info_t *phl); 117 void *(*get_rxbd_buf)(struct phl_info_t *phl); 118 void (*recycle_rx_pkt)(struct phl_info_t *phl, 119 struct rtw_phl_rx_pkt *phl_rx); 120 enum rtw_phl_status (*register_trx_hdlr)(struct phl_info_t *phl); 121 void (*rx_handle_normal)(struct phl_info_t *phl_info, 122 struct rtw_phl_rx_pkt *phl_rx); 123 void (*tx_watchdog)(struct phl_info_t *phl_info); 124 125 #ifdef CONFIG_PCI_HCI 126 enum rtw_phl_status (*recycle_busy_wd)(struct phl_info_t *phl); 127 enum rtw_phl_status (*recycle_busy_h2c)(struct phl_info_t *phl); 128 #endif 129 130 #ifdef CONFIG_USB_HCI 131 enum rtw_phl_status (*pend_rxbuf)(struct phl_info_t *phl, void *rxobj, 132 u32 inbuf_len, u8 status_code); 133 enum rtw_phl_status (*recycle_tx_buf)(void *phl, u8 *tx_buf_ptr); 134 #endif 135 136 #if defined(CONFIG_SDIO_HCI) && defined(CONFIG_PHL_SDIO_READ_RXFF_IN_INT) 137 enum rtw_phl_status (*recv_rxfifo)(struct phl_info_t *phl); 138 #endif 139 }; 140 141 /** 142 * struct phl_tid_ampdu_rx - TID aggregation information (Rx). 143 * 144 * @reorder_buf: buffer to reorder incoming aggregated MPDUs. 145 * @reorder_time: time when frame was added 146 * @sta: station we are attached to 147 * @head_seq_num: head sequence number in reordering buffer. 148 * @stored_mpdu_num: number of MPDUs in reordering buffer 149 * @ssn: Starting Sequence Number expected to be aggregated. 150 * @buf_size: buffer size for incoming A-MPDUs 151 * @timeout: reset timer value (in TUs). 152 * @tid: TID number 153 * @started: this session has started (head ssn or higher was received) 154 */ 155 struct phl_tid_ampdu_rx { 156 struct rtw_phl_rx_pkt **reorder_buf; 157 u32 *reorder_time; 158 struct rtw_phl_stainfo_t *sta; 159 u16 head_seq_num; 160 u16 stored_mpdu_num; 161 u16 ssn; 162 u16 buf_size; 163 u16 tid; 164 u8 started:1, 165 removed:1, 166 sleep:1; 167 168 void *drv_priv; 169 struct phl_info_t *phl_info; 170 }; 171 172 struct macid_ctl_t { 173 _os_lock lock; 174 /* used macid bitmap share for all wifi role */ 175 u32 used_map[PHL_MACID_MAX_ARRAY_NUM]; 176 /* record bmc macid bitmap for all wifi role */ 177 u32 bmc_map[PHL_MACID_MAX_ARRAY_NUM]; 178 /* record used macid bitmap for each wifi role */ 179 u32 wifi_role_usedmap[MAX_WIFI_ROLE_NUMBER][PHL_MACID_MAX_ARRAY_NUM]; 180 /* record bmc TX macid for wifi role */ 181 u16 wrole_bmc[MAX_WIFI_ROLE_NUMBER]; 182 /* record total stainfo by macid */ 183 struct rtw_phl_stainfo_t *sta[PHL_MACID_MAX_NUM]; 184 u16 max_num; 185 }; 186 187 struct stainfo_ctl_t { 188 struct phl_info_t *phl_info; 189 u8 *allocated_stainfo_buf; 190 int allocated_stainfo_sz; 191 u8 *stainfo_buf; 192 struct phl_queue free_sta_queue; 193 }; 194 195 struct phl_h2c_pkt_pool { 196 struct rtw_h2c_pkt *h2c_pkt_buf; 197 struct phl_queue idle_h2c_pkt_cmd_list; 198 struct phl_queue idle_h2c_pkt_data_list; 199 struct phl_queue idle_h2c_pkt_ldata_list; 200 struct phl_queue busy_h2c_pkt_list; 201 _os_lock recycle_lock; 202 }; 203 204 #ifdef CONFIG_RTW_ACS 205 206 #ifndef MAX_CHANNEL_NUM 207 #define MAX_CHANNEL_NUM 42 208 #endif 209 210 struct auto_chan_sel { 211 u8 clm_ratio[MAX_CHANNEL_NUM]; 212 u8 nhm_pwr[MAX_CHANNEL_NUM]; 213 u8 curr_idx; 214 u16 chset[MAX_CHANNEL_NUM]; 215 }; 216 #endif 217 218 219 enum phl_tx_status { 220 PHL_TX_STATUS_IDLE = 0, 221 PHL_TX_STATUS_RUNNING = 1, 222 PHL_TX_STATUS_STOP_INPROGRESS = 2, 223 PHL_TX_STATUS_SW_PAUSE = 3, 224 PHL_TX_STATUS_MAX = 0xFF 225 }; 226 227 enum phl_rx_status { 228 PHL_RX_STATUS_IDLE = 0, 229 PHL_RX_STATUS_RUNNING = 1, 230 PHL_RX_STATUS_STOP_INPROGRESS = 2, 231 PHL_RX_STATUS_SW_PAUSE = 3, 232 PHL_RX_STATUS_MAX = 0xFF 233 }; 234 235 enum data_ctrl_mdl { 236 DATA_CTRL_MDL_NONE = 0, 237 DATA_CTRL_MDL_CMD_CTRLER = BIT0, 238 DATA_CTRL_MDL_SER = BIT1, 239 DATA_CTRL_MDL_PS = BIT2, 240 DATA_CTRL_MDL_MAX = BIT7 241 }; 242 243 enum data_ctrl_err_code { 244 CTRL_ERR_SW_TX_PAUSE_POLLTO = 1, 245 CTRL_ERR_SW_TX_PAUSE_FAIL = 2, 246 CTRL_ERR_SW_TX_RESUME_FAIL = 3, 247 CTRL_ERR_SW_RX_PAUSE_POLLTO = 4, 248 CTRL_ERR_SW_RX_PAUSE_FAIL = 5, 249 CTRL_ERR_SW_RX_RESUME_FAIL = 6, 250 CTRL_ERR_HW_TRX_PAUSE_FAIL = 7, 251 CTRL_ERR_HW_TRX_RESUME_FAIL = 8, 252 CTRL_ERR_MAX = 0xFF 253 }; 254 255 #ifdef CONFIG_POWER_SAVE 256 struct phl_ps_info { 257 bool init; 258 _os_atomic tx_ntfy; 259 }; 260 #endif 261 262 #define PHL_CTRL_TX BIT0 263 #define PHL_CTRL_RX BIT1 264 #define POLL_SW_TX_PAUSE_CNT 100 265 #define POLL_SW_TX_PAUSE_MS 5 266 #define POLL_SW_RX_PAUSE_CNT 100 267 #define POLL_SW_RX_PAUSE_MS 5 268 269 struct phl_info_t { 270 struct macid_ctl_t macid_ctrl; 271 struct stainfo_ctl_t sta_ctrl; 272 273 struct rtw_regulation regulation; 274 275 struct rtw_phl_com_t *phl_com; 276 struct rtw_phl_handler phl_tx_handler; 277 struct rtw_phl_handler phl_rx_handler; 278 struct rtw_phl_handler phl_event_handler; 279 struct rtw_phl_rx_ring phl_rx_ring; 280 _os_atomic phl_sw_tx_sts; 281 _os_atomic phl_sw_tx_more; 282 _os_atomic phl_sw_tx_req_pwr; 283 _os_atomic phl_sw_rx_sts; 284 _os_atomic phl_sw_rx_more; 285 _os_atomic phl_sw_rx_req_pwr; 286 _os_atomic is_hw_trx_pause; 287 enum data_ctrl_mdl pause_tx_id; 288 enum data_ctrl_mdl pause_rx_id; 289 _os_lock t_ring_list_lock; 290 _os_lock rx_ring_lock; 291 _os_lock t_fctrl_result_lock; 292 _os_lock t_ring_free_list_lock; 293 _os_list t_ring_list; 294 _os_list t_fctrl_result; 295 _os_list t_ring_free_list; 296 void *ring_sts_pool; 297 void *rx_pkt_pool; 298 struct phl_h2c_pkt_pool *h2c_pool; 299 300 struct hci_info_t *hci; 301 struct phl_hci_trx_ops *hci_trx_ops; 302 303 struct pkt_ofld_obj *pkt_ofld; 304 305 struct phl_cmd_dispatch_engine disp_eng; 306 struct phl_watchdog wdog; 307 void *msg_hub; 308 void *cmd_que; 309 void *hal; 310 311 #ifdef CONFIG_FSM 312 void *fsm_root; 313 void *cmd_fsm; 314 void *cmd_obj; 315 316 void *scan_fsm; 317 void *scan_obj; 318 319 void *ser_fsm; 320 void *ser_obj; 321 322 void *btc_fsm; 323 void *btc_obj; 324 325 void *snd_fsm; 326 #endif /*CONFIG_FSM*/ 327 void *snd_obj; 328 329 void *ps_obj; 330 331 void *led_ctrl; 332 333 void *ecsa_ctrl; 334 void *phl_twt_info; /* struct phl_twt_info */ 335 #ifdef PHL_RX_BATCH_IND 336 u8 rx_new_pending; 337 #endif 338 339 struct phl_wow_info wow_info; 340 341 #ifdef CONFIG_POWER_SAVE 342 struct phl_ps_info ps_info; 343 #endif 344 345 #ifdef CONFIG_RTW_ACS 346 struct auto_chan_sel acs; 347 #endif 348 349 #ifdef CONFIG_PHL_TEST_SUITE 350 void *trx_test; 351 #endif 352 }; 353 354 #define phl_to_drvpriv(_phl) (_phl->phl_com->drv_priv) 355 356 #define phlcom_to_test_mgnt(_phl_com) ((_phl_com)->test_mgnt) 357 #define phlcom_to_mr_ctrl(_phl_com) (&(_phl_com->mr_ctrl)) 358 359 #define phl_to_mr_ctrl(_phl) (&(((struct phl_info_t *)_phl)->phl_com->mr_ctrl)) 360 #define phl_to_mac_ctrl(_phlinfo) (&(_phlinfo->macid_ctrl)) 361 #define phl_to_sta_ctrl(_phlinfo) (&(_phlinfo->sta_ctrl)) 362 363 #define get_band_ctrl(_phl, _band) (&(phl_to_mr_ctrl(_phl)->band_ctrl[_band])) 364 365 #define phl_to_p2pps_info(_phl) (((_phl)->phl_com->p2pps_info)) 366 #define get_role_idx(_wrole) (_wrole->id) 367 368 #endif /*_PHL_STRUCT_H_*/ 369