1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2020 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 *****************************************************************************/
15 #define _OS_INTFS_C_
16
17 #include <drv_types.h>
18
19 /* module param defaults */
20 int rtw_chip_version = 0x00;
21 int rtw_rfintfs = HWPI;
22 int rtw_lbkmode = 0;/* RTL8712_AIR_TRX; */
23 #ifdef DBG_LA_MODE
24 int rtw_la_mode_en=0;
25 module_param(rtw_la_mode_en, int, 0644);
26 #endif
27 int rtw_network_mode = Ndis802_11IBSS;/* Ndis802_11Infrastructure; */ /* infra, ad-hoc, auto */
28 /* NDIS_802_11_SSID ssid; */
29 int rtw_channel = 36;/* ad-hoc support requirement */
30 int rtw_wireless_mode = WLAN_MD_MAX;
31 int rtw_band_type = BAND_CAP_2G | BAND_CAP_5G | BAND_CAP_6G;
32 module_param(rtw_wireless_mode, int, 0644);
33 module_param(rtw_band_type, int, 0644);
34 #ifdef CONFIG_HW_RTS
35 int rtw_vrtl_carrier_sense = ENABLE_VCS;
36 int rtw_vcs_type = RTS_CTS;
37 int rtw_hw_rts_en = 1;
38 #else
39 int rtw_vrtl_carrier_sense = AUTO_VCS;
40 int rtw_vcs_type = RTS_CTS;
41 int rtw_hw_rts_en = 0;
42 #endif
43 int rtw_rts_thresh = 2347;
44 int rtw_frag_thresh = 2346;
45 int rtw_preamble = PREAMBLE_LONG;/* long, short, auto */
46 int rtw_scan_mode = 1;/* active, passive */
47 /* int smart_ps = 1; */
48 #ifdef CONFIG_POWER_SAVING
49
50 /* LPS configuration */
51 /* RTW_LPS_MODE=0:disable, 1:LPS , 2:LPS with clock gating, 3: power gating */
52 #if (RTW_LPS_MODE > 0)
53 int rtw_power_mgnt = PM_PS_MODE_MAX;
54
55 #ifdef CONFIG_USB_HCI
56 int rtw_lps_level = LPS_NORMAL; /*USB default LPS level*/
57 #else /*SDIO,PCIE*/
58 int rtw_lps_level = (RTW_LPS_MODE - 1);
59 #endif/*CONFIG_USB_HCI*/
60 #else
61 int rtw_power_mgnt = PM_PS_MODE_ACTIVE;
62 int rtw_lps_level = LPS_NORMAL;
63 #endif
64
65 int rtw_lps_chk_by_tp = 1;
66
67 /* WOW LPS configuration */
68 #ifdef CONFIG_WOWLAN
69 /* RTW_WOW_LPS_MODE=0:disable, 1:LPS , 2:LPS with clock gating, 3: power gating */
70 #if (RTW_WOW_LPS_MODE > 0)
71 int rtw_wow_power_mgnt = PM_PS_MODE_MAX;
72 int rtw_wow_lps_level = (RTW_WOW_LPS_MODE - 1);
73 #else
74 int rtw_wow_power_mgnt = PM_PS_MODE_ACTIVE;
75 int rtw_wow_lps_level = LPS_NORMAL;
76 #endif
77 #endif /* CONFIG_WOWLAN */
78
79 #else /* !CONFIG_POWER_SAVING */
80 int rtw_power_mgnt = PM_PS_MODE_ACTIVE;
81 int rtw_lps_level = LPS_NORMAL;
82 int rtw_lps_chk_by_tp = 0;
83 #ifdef CONFIG_WOWLAN
84 int rtw_wow_power_mgnt = PM_PS_MODE_ACTIVE;
85 int rtw_wow_lps_level = LPS_NORMAL;
86 #endif /* CONFIG_WOWLAN */
87 #endif /* CONFIG_POWER_SAVING */
88 #ifdef CONFIG_RTW_IPS
89 int rtw_ips_mode = PS_OP_MODE_AUTO;
90 #else
91 int rtw_ips_mode = PS_OP_MODE_DISABLED;
92 #endif
93 #ifdef CONFIG_RTW_LPS
94 int rtw_lps_mode = PS_OP_MODE_AUTO;
95 int rtw_lps_cap = PS_CAP_PWRON |
96 PS_CAP_RF_OFF |
97 PS_CAP_CLK_GATED |
98 PS_CAP_PWR_GATED;
99 #else
100 int rtw_lps_mode = PS_OP_MODE_DISABLED;
101 int rtw_lps_cap = PS_CAP_PWRON;
102 #endif
103
104 #ifdef CONFIG_NARROWBAND_SUPPORTING
105 int rtw_nb_config = CONFIG_NB_VALUE;
106 module_param(rtw_nb_config, int, 0644);
107 MODULE_PARM_DESC(rtw_nb_config, "5M/10M/Normal bandwidth configuration");
108 #endif
109
110 module_param(rtw_ips_mode, int, 0644);
111 MODULE_PARM_DESC(rtw_ips_mode, "The default IPS mode");
112
113 module_param(rtw_lps_mode, int, 0644);
114 MODULE_PARM_DESC(rtw_lps_mode, "The default LPS mode");
115
116
117 module_param(rtw_lps_cap, int, 0644);
118 MODULE_PARM_DESC(rtw_lps_cap, "The default LPS cap");
119
120 #ifdef CONFIG_LPS_1T1R
121 int rtw_lps_1t1r = RTW_LPS_1T1R;
122 module_param(rtw_lps_1t1r, int, 0644);
123 MODULE_PARM_DESC(rtw_lps_1t1r, "The default LPS 1T1R setting");
124 #endif
125
126 module_param(rtw_lps_chk_by_tp, int, 0644);
127
128 #ifdef CONFIG_WOWLAN
129 module_param(rtw_wow_power_mgnt, int, 0644);
130 MODULE_PARM_DESC(rtw_wow_power_mgnt, "The default WOW LPS mode");
131 module_param(rtw_wow_lps_level, int, 0644);
132 MODULE_PARM_DESC(rtw_wow_lps_level, "The default WOW LPS level");
133 #ifdef CONFIG_LPS_1T1R
134 int rtw_wow_lps_1t1r = RTW_WOW_LPS_1T1R;
135 module_param(rtw_wow_lps_1t1r, int, 0644);
136 MODULE_PARM_DESC(rtw_wow_lps_1t1r, "The default WOW LPS 1T1R setting");
137 #endif
138 #endif /* CONFIG_WOWLAN */
139
140 /* LPS:
141 * rtw_smart_ps = 0 => TX: pwr bit = 1, RX: PS_Poll
142 * rtw_smart_ps = 1 => TX: pwr bit = 0, RX: PS_Poll
143 * rtw_smart_ps = 2 => TX: pwr bit = 0, RX: NullData with pwr bit = 0
144 */
145 int rtw_smart_ps = 2;
146
147 int rtw_max_bss_cnt = 0;
148 module_param(rtw_max_bss_cnt, int, 0644);
149 #ifdef CONFIG_WMMPS_STA
150 /* WMMPS:
151 * rtw_smart_ps = 0 => Only for fw test
152 * rtw_smart_ps = 1 => Refer to Beacon's TIM Bitmap
153 * rtw_smart_ps = 2 => Don't refer to Beacon's TIM Bitmap
154 */
155 int rtw_wmm_smart_ps = 2;
156 #endif /* CONFIG_WMMPS_STA */
157
158 int rtw_check_fw_ps = 1;
159
160 #ifdef CONFIG_TX_EARLY_MODE
161 int rtw_early_mode = 1;
162 #endif
163
164 int rtw_usb_rxagg_mode = 2;/* RX_AGG_DMA=1, RX_AGG_USB=2 */
165 module_param(rtw_usb_rxagg_mode, int, 0644);
166
167 int rtw_dynamic_agg_enable = 1;
168 module_param(rtw_dynamic_agg_enable, int, 0644);
169
170 /* set log level when inserting driver module, default log level is _DRV_INFO_ = 4,
171 * please refer to "How_to_set_driver_debug_log_level.doc" to set the available level.
172 */
173 #ifdef CONFIG_RTW_DEBUG
174 #ifdef RTW_LOG_LEVEL
175 uint rtw_drv_log_level = (uint)RTW_LOG_LEVEL; /* from Makefile */
176 #else
177 uint rtw_drv_log_level = _DRV_INFO_;
178 #endif
179 module_param(rtw_drv_log_level, uint, 0644);
180 MODULE_PARM_DESC(rtw_drv_log_level, "set log level when insert driver module, default log level is _DRV_INFO_ = 4");
181 #endif
182 int rtw_radio_enable = 1;
183 int rtw_long_retry_lmt = 7;
184 int rtw_short_retry_lmt = 7;
185 int rtw_busy_thresh = 40;
186 /* int qos_enable = 0; */ /* * */
187 int rtw_ack_policy = NORMAL_ACK;
188
189 int rtw_mp_mode = 0;
190
191 #if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTW_CUSTOMER_STR)
192 uint rtw_mp_customer_str = 0;
193 module_param(rtw_mp_customer_str, uint, 0644);
194 MODULE_PARM_DESC(rtw_mp_customer_str, "Whether or not to enable customer str support on MP mode");
195 #endif
196
197 int rtw_software_encrypt = 0;
198 int rtw_software_decrypt = 0;
199
200 int rtw_acm_method = 0;/* 0:By SW 1:By HW. */
201
202 int rtw_wmm_enable = 1;/* default is set to enable the wmm. */
203
204 #ifdef CONFIG_WMMPS_STA
205 /* uapsd (unscheduled automatic power-save delivery) = a kind of wmmps */
206 /* 0: NO_LIMIT, 1: TWO_MSDU, 2: FOUR_MSDU, 3: SIX_MSDU */
207 int rtw_uapsd_max_sp = NO_LIMIT;
208 /* BIT0: AC_VO UAPSD, BIT1: AC_VI UAPSD, BIT2: AC_BK UAPSD, BIT3: AC_BE UAPSD */
209 int rtw_uapsd_ac_enable = 0x0;
210 #endif /* CONFIG_WMMPS_STA */
211
212 #if defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C)
213 /*PHYDM API, must enable by default*/
214 int rtw_pwrtrim_enable = 1;
215 #else
216 int rtw_pwrtrim_enable = 0; /* Default Enalbe power trim by efuse config */
217 #endif
218
219 uint rtw_tx_bw_mode = 0x21;
220 module_param(rtw_tx_bw_mode, uint, 0644);
221 MODULE_PARM_DESC(rtw_tx_bw_mode, "The max tx bw for 2.4G and 5G. format is the same as rtw_bw_mode");
222
223
224 #ifdef CONFIG_80211N_HT
225 int rtw_ht_enable = 1;
226 /* 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160MHz, 4: 80+80MHz
227 * 2.4G use bit 0 ~ 3, 5G use bit 4 ~ 7
228 * 0x21 means enable 2.4G 40MHz & 5G 80MHz */
229 #ifdef CONFIG_RTW_CUSTOMIZE_BWMODE
230 int rtw_bw_mode = CONFIG_RTW_CUSTOMIZE_BWMODE;
231 #else
232 int rtw_bw_mode = ((BW_CAP_80M | BW_CAP_40M | BW_CAP_20M) << 4 ) | (BW_CAP_40M | BW_CAP_20M);
233 #endif
234
235 int rtw_ampdu_enable = 1;/* for enable tx_ampdu , */ /* 0: disable, 0x1:enable */
236
237 int rtw_rx_ampdu_amsdu = 2;/* 0: disabled, 1:enabled, 2:auto . There is an IOT issu with DLINK DIR-629 when the flag turn on */
238
239 /* 10.12 A-MSDU operation
240 * HT - 0: 3839, 1: 7935 octets - Maximum A-MSDU Length
241 * VHT - 0: 3895, 1: 7991, 2:11454 octets - Maximum MPDU Length
242 */
243 int rtw_max_amsdu_len = 1;
244
245 module_param(rtw_max_amsdu_len, uint, 0644);
246
247 /*
248 * 2: Follow the AMSDU filed in ADDBA Resp. (Deault)
249 * 0: Force the AMSDU filed in ADDBA Resp. to be disabled.
250 * 1: Force the AMSDU filed in ADDBA Resp. to be enabled.
251 */
252 int rtw_tx_ampdu_amsdu = 2;
253
254 int rtw_quick_addba_req = 0;
255
256 static uint rtw_rx_ampdu_sz_limit_1ss[4] = CONFIG_RTW_RX_AMPDU_SZ_LIMIT_1SS;
257 static uint rtw_rx_ampdu_sz_limit_1ss_num = 0;
258 module_param_array(rtw_rx_ampdu_sz_limit_1ss, uint, &rtw_rx_ampdu_sz_limit_1ss_num, 0644);
259 MODULE_PARM_DESC(rtw_rx_ampdu_sz_limit_1ss, "RX AMPDU size limit for 1SS link of each BW, 0xFF: no limitation");
260
261 static uint rtw_rx_ampdu_sz_limit_2ss[4] = CONFIG_RTW_RX_AMPDU_SZ_LIMIT_2SS;
262 static uint rtw_rx_ampdu_sz_limit_2ss_num = 0;
263 module_param_array(rtw_rx_ampdu_sz_limit_2ss, uint, &rtw_rx_ampdu_sz_limit_2ss_num, 0644);
264 MODULE_PARM_DESC(rtw_rx_ampdu_sz_limit_2ss, "RX AMPDU size limit for 2SS link of each BW, 0xFF: no limitation");
265
266 static uint rtw_rx_ampdu_sz_limit_3ss[4] = CONFIG_RTW_RX_AMPDU_SZ_LIMIT_3SS;
267 static uint rtw_rx_ampdu_sz_limit_3ss_num = 0;
268 module_param_array(rtw_rx_ampdu_sz_limit_3ss, uint, &rtw_rx_ampdu_sz_limit_3ss_num, 0644);
269 MODULE_PARM_DESC(rtw_rx_ampdu_sz_limit_3ss, "RX AMPDU size limit for 3SS link of each BW, 0xFF: no limitation");
270
271 static uint rtw_rx_ampdu_sz_limit_4ss[4] = CONFIG_RTW_RX_AMPDU_SZ_LIMIT_4SS;
272 static uint rtw_rx_ampdu_sz_limit_4ss_num = 0;
273 module_param_array(rtw_rx_ampdu_sz_limit_4ss, uint, &rtw_rx_ampdu_sz_limit_4ss_num, 0644);
274 MODULE_PARM_DESC(rtw_rx_ampdu_sz_limit_4ss, "RX AMPDU size limit for 4SS link of each BW, 0xFF: no limitation");
275
276 /* Short GI support Bit Map
277 * BIT0 - 20MHz, 0: non-support, 1: support
278 * BIT1 - 40MHz, 0: non-support, 1: support
279 * BIT2 - 80MHz, 0: non-support, 1: support
280 * BIT3 - 160MHz, 0: non-support, 1: support */
281 int rtw_short_gi = 0xf;
282 /* BIT0: Enable VHT LDPC Rx, BIT1: Enable VHT LDPC Tx, BIT4: Enable HT LDPC Rx, BIT5: Enable HT LDPC Tx */
283 int rtw_ldpc_cap = 0x33;
284 /* BIT0: Enable VHT STBC Rx, BIT1: Enable VHT STBC Tx
285 * BIT4: Enable HT STBC Rx, BIT5: Enable HT STBC Tx
286 * BIT8: Enable HE STBC Rx, BIT9: Enable HE STBC Rx(greater than 80M)
287 * BIT10: Enable HE STBC Tx, BIT11: Enable HE STBC Tx(greater than 80M)
288 */
289 int rtw_stbc_cap = 0x133;
290 #endif /* CONFIG_80211N_HT */
291
292 #ifdef CONFIG_BEAMFORMING
293 /*
294 * BIT0: Enable VHT SU Beamformer
295 * BIT1: Enable VHT SU Beamformee
296 * BIT2: Enable VHT MU Beamformer, depend on VHT SU Beamformer
297 * BIT3: Enable VHT MU Beamformee, depend on VHT SU Beamformee
298 * BIT4: Enable HT Beamformer
299 * BIT5: Enable HT Beamformee
300 * BIT6: Enable HE SU Beamformer
301 * BIT7: Enable HE SU Beamformee
302 * BIT8: Enable HE MU Beamformer
303 * BIT9: Enable HE MU Beamformee
304 */
305 int rtw_beamform_cap = BIT(1) | BIT(7); /* For sw role BF cap. */
306 int rtw_sw_proto_bf_cap_phy0 = BIT(1) | BIT(7);
307 int rtw_sw_proto_bf_cap_phy1 = BIT(1) | BIT(7);
308 int rtw_dyn_txbf = 1;
309 int rtw_bfer_rf_number = 0; /*BeamformerCapRfNum Rf path number, 0 for auto, others for manual*/
310 int rtw_bfee_rf_number = 0; /*BeamformeeCapRfNum Rf path number, 0 for auto, others for manual*/
311 #endif
312
313 #ifdef CONFIG_80211AC_VHT
314 int rtw_vht_enable = 1; /* 0:disable, 1:enable, 2:force auto enable */
315 module_param(rtw_vht_enable, int, 0644);
316
317 int rtw_vht_24g_enable = 0; /* 0:disable, 1:enable */
318 module_param(rtw_vht_24g_enable, int, 0644);
319
320 int rtw_ampdu_factor = 7;
321
322 uint rtw_vht_rx_mcs_map = 0xaaaa;
323 module_param(rtw_vht_rx_mcs_map, uint, 0644);
324 MODULE_PARM_DESC(rtw_vht_rx_mcs_map, "VHT RX MCS map");
325 #endif /* CONFIG_80211AC_VHT */
326
327 #ifdef CONFIG_80211AX_HE
328 int rtw_he_enable = 1; /* 0:disable, 1:enable, 2:force auto enable */
329 module_param(rtw_he_enable, int, 0644);
330 #endif
331
332 #ifdef CONFIG_SDIO_HCI
333 uint rtw_tx_buf_retry_lmt = 0;
334 module_param(rtw_tx_buf_retry_lmt, int, 0644);
335 #endif
336
337 int rtw_lowrate_two_xmit = 1;/* Use 2 path Tx to transmit MCS0~7 and legacy mode */
338
339
340 /* 0: not check in watch dog, 1: check in watch dog */
341 int rtw_check_hw_status = 0;
342
343 int rtw_low_power = 0;
344 int rtw_wifi_spec = 0;
345
346 #ifdef CONFIG_SPECIAL_RF_PATH /* configure Nss/xTxR IC to 1ss/1T1R */
347 int rtw_rf_path = RF_1T1R;
348 int rtw_tx_nss = 1;
349 int rtw_rx_nss = 1;
350 #else
351 int rtw_rf_path = RF_TYPE_MAX;
352 int rtw_tx_nss = 0;
353 int rtw_rx_nss = 0;
354 #endif
355 module_param(rtw_rf_path, int, 0644);
356 module_param(rtw_tx_nss, int, 0644);
357 module_param(rtw_rx_nss, int, 0644);
358
359 #ifdef CONFIG_REGD_SRC_FROM_OS
360 static uint rtw_regd_src = CONFIG_RTW_REGD_SRC;
361 module_param(rtw_regd_src, uint, 0644);
362 MODULE_PARM_DESC(rtw_regd_src, "The default regd source selection, 0:Realtek defined, 1: OS");
363 #endif
364
365 char rtw_country_unspecified[] = {0xFF, 0xFF, 0x00};
366 char *rtw_country_code = rtw_country_unspecified;
367 module_param(rtw_country_code, charp, 0644);
368 MODULE_PARM_DESC(rtw_country_code, "The default country code (in alpha2)");
369
370 uint rtw_channel_plan = CONFIG_RTW_CHPLAN;
371 module_param(rtw_channel_plan, uint, 0644);
372 MODULE_PARM_DESC(rtw_channel_plan, "The default chplan ID when rtw_alpha2 is not specified or valid");
373
374 static uint rtw_excl_chs[MAX_CHANNEL_NUM_2G_5G] = CONFIG_RTW_EXCL_CHS;
375 static int rtw_excl_chs_num = 0;
376 module_param_array(rtw_excl_chs, uint, &rtw_excl_chs_num, 0644);
377 MODULE_PARM_DESC(rtw_excl_chs, "exclusive channel array");
378
379 #if CONFIG_IEEE80211_BAND_6GHZ
380 uint rtw_channel_plan_6g = CONFIG_RTW_CHPLAN_6G;
381 module_param(rtw_channel_plan_6g, uint, 0644);
382 MODULE_PARM_DESC(rtw_channel_plan_6g, "The default chplan_6g ID when rtw_alpha2 is not specified or valid");
383
384 static uint rtw_excl_chs_6g[MAX_CHANNEL_NUM_6G] = CONFIG_RTW_EXCL_CHS_6G;
385 static int rtw_excl_chs_6g_num = 0;
386 module_param_array(rtw_excl_chs_6g, uint, &rtw_excl_chs_6g_num, 0644);
387 MODULE_PARM_DESC(rtw_excl_chs_6g, "exclusive channel array");
388 #endif /* CONFIG_IEEE80211_BAND_6GHZ */
389
390 #ifdef CONFIG_80211D
391 static uint rtw_country_ie_slave_en_role = CONFIG_RTW_COUNTRY_IE_SLAVE_EN_ROLE;
392 module_param(rtw_country_ie_slave_en_role, uint, 0644);
393 MODULE_PARM_DESC(rtw_country_ie_slave_en_role, "802.11d country IE slave enable role: BIT0:pure STA mode, BIT1:P2P group client");
394
395 static uint rtw_country_ie_slave_en_ifbmp = CONFIG_RTW_COUNTRY_IE_SLAVE_EN_IFBMP;
396 module_param(rtw_country_ie_slave_en_ifbmp, uint, 0644);
397 MODULE_PARM_DESC(rtw_country_ie_slave_en_ifbmp, "802.11d country IE slave enable iface bitmap");
398 #endif
399
400 /*if concurrent softap + p2p(GO) is needed, this param lets p2p response full channel list.
401 But Softap must be SHUT DOWN once P2P decide to set up connection and become a GO.*/
402 #ifdef CONFIG_FULL_CH_IN_P2P_HANDSHAKE
403 int rtw_full_ch_in_p2p_handshake = 1; /* reply full channel list*/
404 #else
405 int rtw_full_ch_in_p2p_handshake = 0; /* reply only softap channel*/
406 #endif
407
408 #ifdef CONFIG_BTC
409 int rtw_btcoex_enable = 2;
410 module_param(rtw_btcoex_enable, int, 0644);
411 MODULE_PARM_DESC(rtw_btcoex_enable, "BT co-existence on/off, 0:off, 1:on, 2:by efuse");
412
413 int rtw_ant_num = 0;
414 module_param(rtw_ant_num, int, 0644);
415 MODULE_PARM_DESC(rtw_ant_num, "Antenna number setting, 0:by efuse");
416
417 int rtw_bt_iso = 2;/* 0:Low, 1:High, 2:From Efuse */
418 int rtw_bt_sco = 3;/* 0:Idle, 1:None-SCO, 2:SCO, 3:From Counter, 4.Busy, 5.OtherBusy */
419 int rtw_bt_ampdu = 1 ; /* 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU. */
420 #endif /* CONFIG_BTC */
421
422 int rtw_AcceptAddbaReq = _TRUE;/* 0:Reject AP's Add BA req, 1:Accept AP's Add BA req. */
423
424 int rtw_antdiv_cfg = 2; /* 0:OFF , 1:ON, 2:decide by Efuse config */
425 int rtw_antdiv_type = 0; /* 0:decide by efuse 1: for 88EE, 1Tx and 1RxCG are diversity.(2 Ant with SPDT), 2: for 88EE, 1Tx and 2Rx are diversity.( 2 Ant, Tx and RxCG are both on aux port, RxCS is on main port ), 3: for 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) */
426
427 int rtw_drv_ant_band_switch = 1; /* 0:OFF , 1:ON, Driver control antenna band switch*/
428
429 int rtw_single_ant_path; /*0:main ant , 1:aux ant , Fixed single antenna path, default main ant*/
430
431 /* 0: doesn't switch, 1: switch to usb 3.0 , 2: switch to usb 2.0 */
432 int rtw_switch_usb_mode = 0;
433
434
435
436 #ifdef CONFIG_HW_PWRP_DETECTION
437 int rtw_hwpwrp_detect = 1;
438 #else
439 int rtw_hwpwrp_detect = 0; /* HW power ping detect 0:disable , 1:enable */
440 #endif
441
442 #ifdef CONFIG_USB_HCI
443 int rtw_hw_wps_pbc = 1;
444 #else
445 int rtw_hw_wps_pbc = 0;
446 #endif
447
448 #ifdef CONFIG_PCI_ASPM
449 /* CLK_REQ:BIT0 L0s:BIT1 ASPM_L1:BIT2 L1Off:BIT3*/
450 int rtw_pci_aspm_enable = 0x5;
451 #else
452 int rtw_pci_aspm_enable;
453 #endif
454
455 /*
456 * BIT [15:12] mask of ps mode
457 * BIT [11:8] val of ps mode
458 * BIT [7:4] mask of perf mode
459 * BIT [3:0] val of perf mode
460 *
461 * L0s:BIT[+0] L1:BIT[+1]
462 *
463 * 0x0030: change value only if perf mode
464 * 0x3300: change value only if ps mode
465 * 0x3330: change value in both perf and ps mode
466 */
467 #ifdef CONFIG_PCI_DYNAMIC_ASPM
468 #ifdef CONFIG_PCI_ASPM
469 int rtw_pci_dynamic_aspm_linkctrl = 0x3330;
470 #else
471 int rtw_pci_dynamic_aspm_linkctrl = 0x0030;
472 #endif
473 #else
474 int rtw_pci_dynamic_aspm_linkctrl = 0x0000;
475 #endif
476 module_param(rtw_pci_dynamic_aspm_linkctrl, int, 0644);
477
478 #ifdef CONFIG_QOS_OPTIMIZATION
479 int rtw_qos_opt_enable = 1; /* 0: disable,1:enable */
480 #else
481 int rtw_qos_opt_enable = 0; /* 0: disable,1:enable */
482 #endif
483 module_param(rtw_qos_opt_enable, int, 0644);
484
485 #ifdef CONFIG_RTW_ACS
486 int rtw_acs_auto_scan = 0; /*0:disable, 1:enable*/
487 module_param(rtw_acs_auto_scan, int, 0644);
488
489 int rtw_acs = 1;
490 module_param(rtw_acs, int, 0644);
491 #endif
492
493 char *ifname = "wlan%d";
494 module_param(ifname, charp, 0644);
495 MODULE_PARM_DESC(ifname, "The default name to allocate for first interface");
496
497 #ifdef CONFIG_PLATFORM_ANDROID
498 char *if2name = "p2p%d";
499 #else /* CONFIG_PLATFORM_ANDROID */
500 char *if2name = "wlan%d";
501 #endif /* CONFIG_PLATFORM_ANDROID */
502 module_param(if2name, charp, 0644);
503 MODULE_PARM_DESC(if2name, "The default name to allocate for second interface");
504
505 char *rtw_initmac = 0; /* temp mac address if users want to use instead of the mac address in Efuse */
506
507 #ifdef CONFIG_CONCURRENT_MODE
508
509 #if (CONFIG_IFACE_NUMBER > 2)
510 int rtw_virtual_iface_num = CONFIG_IFACE_NUMBER - 1;
511 module_param(rtw_virtual_iface_num, int, 0644);
512 #else
513 int rtw_virtual_iface_num = 1;
514 #endif
515
516 #if defined(CONFIG_CONCURRENT_MODE) && !RTW_P2P_GROUP_INTERFACE
517 #ifdef CONFIG_P2P
518 #ifdef CONFIG_SEL_P2P_IFACE
519 int rtw_sel_p2p_iface = CONFIG_SEL_P2P_IFACE;
520 #else
521 int rtw_sel_p2p_iface = (CONFIG_RTW_STATIC_NDEV_NUM - 1);
522 #endif
523
524 module_param(rtw_sel_p2p_iface, int, 0644);
525
526 #endif
527 #endif
528
529 #ifdef CONFIG_IGNORE_GO_AND_LOW_RSSI_IN_SCAN_LIST
530 int rtw_ignore_go_in_scan = 1;
531 uint rtw_ignore_low_rssi_in_scan = 30;
532
533 module_param(rtw_ignore_go_in_scan, int, 0644);
534 module_param(rtw_ignore_low_rssi_in_scan, uint, 0644);
535 #endif /*CONFIG_IGNORE_GO_AND_LOW_RSSI_IN_SCAN_LIST*/
536
537 #endif
538
539 /* affect ap/go cw only so far , 0 is no change*/
540 uint rtw_vo_edca = 0;
541 module_param(rtw_vo_edca, uint, 0644);
542
543 #ifdef CONFIG_AP_MODE
544 u8 rtw_bmc_tx_rate = MGN_UNKNOWN;
545
546 #if CONFIG_RTW_AP_DATA_BMC_TO_UC
547 int rtw_ap_src_b2u_flags = CONFIG_RTW_AP_SRC_B2U_FLAGS;
548 module_param(rtw_ap_src_b2u_flags, int, 0644);
549
550 int rtw_ap_fwd_b2u_flags = CONFIG_RTW_AP_FWD_B2U_FLAGS;
551 module_param(rtw_ap_fwd_b2u_flags, int, 0644);
552 #endif /* CONFIG_RTW_AP_DATA_BMC_TO_UC */
553 #endif /* CONFIG_AP_MODE */
554
555 #ifdef CONFIG_RTW_MESH
556 #if CONFIG_RTW_MESH_DATA_BMC_TO_UC
557 int rtw_msrc_b2u_flags = CONFIG_RTW_MSRC_B2U_FLAGS;
558 module_param(rtw_msrc_b2u_flags, int, 0644);
559
560 int rtw_mfwd_b2u_flags = CONFIG_RTW_MFWD_B2U_FLAGS;
561 module_param(rtw_mfwd_b2u_flags, int, 0644);
562 #endif /* CONFIG_RTW_MESH_DATA_BMC_TO_UC */
563 #endif /* CONFIG_RTW_MESH */
564
565 #ifdef RTW_WOW_STA_MIX
566 int rtw_wowlan_sta_mix_mode = 1;
567 #else
568 int rtw_wowlan_sta_mix_mode = 0;
569 #endif
570 module_param(rtw_wowlan_sta_mix_mode, int, 0644);
571 module_param(rtw_pwrtrim_enable, int, 0644);
572 module_param(rtw_initmac, charp, 0644);
573 module_param(rtw_chip_version, int, 0644);
574 module_param(rtw_rfintfs, int, 0644);
575 module_param(rtw_lbkmode, int, 0644);
576 module_param(rtw_network_mode, int, 0644);
577 module_param(rtw_channel, int, 0644);
578 module_param(rtw_mp_mode, int, 0644);
579 module_param(rtw_wmm_enable, int, 0644);
580 #ifdef CONFIG_WMMPS_STA
581 module_param(rtw_uapsd_max_sp, int, 0644);
582 module_param(rtw_uapsd_ac_enable, int, 0644);
583 module_param(rtw_wmm_smart_ps, int, 0644);
584 #endif /* CONFIG_WMMPS_STA */
585 module_param(rtw_vrtl_carrier_sense, int, 0644);
586 module_param(rtw_vcs_type, int, 0644);
587 module_param(rtw_hw_rts_en, int, 0644);
588 module_param(rtw_busy_thresh, int, 0644);
589
590 #ifdef CONFIG_80211N_HT
591 module_param(rtw_ht_enable, int, 0644);
592 module_param(rtw_bw_mode, int, 0644);
593 module_param(rtw_ampdu_enable, int, 0644);
594 module_param(rtw_stbc_cap, int, 0644);
595 module_param(rtw_rx_ampdu_amsdu, int, 0644);
596 module_param(rtw_tx_ampdu_amsdu, int, 0644);
597 module_param(rtw_quick_addba_req, int, 0644);
598 #endif /* CONFIG_80211N_HT */
599
600 #ifdef CONFIG_BEAMFORMING
601 module_param(rtw_beamform_cap, int, 0644);
602 module_param(rtw_sw_proto_bf_cap_phy0, int, 0644);
603 module_param(rtw_sw_proto_bf_cap_phy1, int, 0644);
604 module_param(rtw_dyn_txbf, int, 0644);
605 #endif
606 module_param(rtw_lowrate_two_xmit, int, 0644);
607
608 module_param(rtw_power_mgnt, int, 0644);
609 module_param(rtw_smart_ps, int, 0644);
610 module_param(rtw_low_power, int, 0644);
611 module_param(rtw_wifi_spec, int, 0644);
612
613 module_param(rtw_full_ch_in_p2p_handshake, int, 0644);
614 module_param(rtw_antdiv_cfg, int, 0644);
615 module_param(rtw_antdiv_type, int, 0644);
616
617 module_param(rtw_drv_ant_band_switch, int, 0644);
618 module_param(rtw_single_ant_path, int, 0644);
619
620 module_param(rtw_switch_usb_mode, int, 0644);
621
622 module_param(rtw_hwpwrp_detect, int, 0644);
623
624 module_param(rtw_hw_wps_pbc, int, 0644);
625 module_param(rtw_check_hw_status, int, 0644);
626
627 #ifdef CONFIG_PCI_HCI
628 module_param(rtw_pci_aspm_enable, int, 0644);
629 #endif
630
631 #ifdef CONFIG_TX_EARLY_MODE
632 module_param(rtw_early_mode, int, 0644);
633 #endif
634 #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE
635 char *rtw_adaptor_info_caching_file_path = "/data/misc/wifi/rtw_cache";
636 module_param(rtw_adaptor_info_caching_file_path, charp, 0644);
637 MODULE_PARM_DESC(rtw_adaptor_info_caching_file_path, "The path of adapter info cache file");
638 #endif /* CONFIG_ADAPTOR_INFO_CACHING_FILE */
639
640 #ifdef CONFIG_LAYER2_ROAMING
641 uint rtw_max_roaming_times = 2;
642 module_param(rtw_max_roaming_times, uint, 0644);
643 MODULE_PARM_DESC(rtw_max_roaming_times, "The max roaming times to try");
644 #endif /* CONFIG_LAYER2_ROAMING */
645
646 #ifdef CONFIG_FILE_FWIMG
647 char *rtw_fw_file_path = CONFIG_FIRMWARE_PATH; /* "/system/etc/firmware/rtlwifi/FW_NIC.BIN"; */
648
649 module_param(rtw_fw_file_path, charp, 0644);
650 MODULE_PARM_DESC(rtw_fw_file_path, "The path of fw image");
651
652 char *rtw_fw_wow_file_path = "/system/etc/firmware/rtlwifi/FW_WoWLAN.BIN";
653 module_param(rtw_fw_wow_file_path, charp, 0644);
654 MODULE_PARM_DESC(rtw_fw_wow_file_path, "The path of fw for Wake on Wireless image");
655
656 #ifdef CONFIG_MP_INCLUDED
657 char *rtw_fw_mp_bt_file_path = "";
658 module_param(rtw_fw_mp_bt_file_path, charp, 0644);
659 MODULE_PARM_DESC(rtw_fw_mp_bt_file_path, "The path of fw for MP-BT image");
660 #endif /* CONFIG_MP_INCLUDED */
661 #endif /* CONFIG_FILE_FWIMG */
662
663 uint rtw_hiq_filter = CONFIG_RTW_HIQ_FILTER;
664 module_param(rtw_hiq_filter, uint, 0644);
665 MODULE_PARM_DESC(rtw_hiq_filter, "0:allow all, 1:allow special, 2:deny all");
666
667 uint rtw_adaptivity_en = CONFIG_RTW_ADAPTIVITY_EN;
668 module_param(rtw_adaptivity_en, uint, 0644);
669 MODULE_PARM_DESC(rtw_adaptivity_en, "0:disable, 1:enable, 2:auto");
670
671 uint rtw_adaptivity_mode = CONFIG_RTW_ADAPTIVITY_MODE;
672 module_param(rtw_adaptivity_mode, uint, 0644);
673 MODULE_PARM_DESC(rtw_adaptivity_mode, "0:normal, 1:carrier sense");
674
675 int rtw_adaptivity_th_l2h_ini = CONFIG_RTW_ADAPTIVITY_TH_L2H_INI;
676 module_param(rtw_adaptivity_th_l2h_ini, int, 0644);
677 MODULE_PARM_DESC(rtw_adaptivity_th_l2h_ini, "th_l2h_ini for Adaptivity");
678
679 int rtw_adaptivity_th_edcca_hl_diff = CONFIG_RTW_ADAPTIVITY_TH_EDCCA_HL_DIFF;
680 module_param(rtw_adaptivity_th_edcca_hl_diff, int, 0644);
681 MODULE_PARM_DESC(rtw_adaptivity_th_edcca_hl_diff, "th_edcca_hl_diff for Adaptivity");
682
683
684 int rtw_adaptivity_idle_probability = 0;
685 module_param(rtw_adaptivity_idle_probability, int, 0644);
686 MODULE_PARM_DESC(rtw_adaptivity_idle_probability, "rtw_adaptivity_idle_probability");
687
688 #ifdef CONFIG_DFS_MASTER
689 uint rtw_dfs_region_domain = CONFIG_RTW_DFS_REGION_DOMAIN;
690 module_param(rtw_dfs_region_domain, uint, 0644);
691 MODULE_PARM_DESC(rtw_dfs_region_domain, "0:NONE, 1:FCC, 2:MKK, 3:ETSI");
692 #endif
693
694 uint rtw_amsdu_mode = RTW_AMSDU_MODE_NON_SPP;
695 module_param(rtw_amsdu_mode, uint, 0644);
696 MODULE_PARM_DESC(rtw_amsdu_mode, "0:non-spp, 1:spp, 2:all drop");
697
698 uint rtw_amplifier_type_2g = CONFIG_RTW_AMPLIFIER_TYPE_2G;
699 module_param(rtw_amplifier_type_2g, uint, 0644);
700 MODULE_PARM_DESC(rtw_amplifier_type_2g, "BIT3:2G ext-PA, BIT4:2G ext-LNA");
701
702 uint rtw_amplifier_type_5g = CONFIG_RTW_AMPLIFIER_TYPE_5G;
703 module_param(rtw_amplifier_type_5g, uint, 0644);
704 MODULE_PARM_DESC(rtw_amplifier_type_5g, "BIT6:5G ext-PA, BIT7:5G ext-LNA");
705
706 uint rtw_rfe_type = CONFIG_RTW_RFE_TYPE;
707 module_param(rtw_rfe_type, uint, 0644);
708 MODULE_PARM_DESC(rtw_rfe_type, "default init value:64");
709
710 #ifdef CONFIG_DBCC_SUPPORT
711 /*0:disable ,1: enable*/
712 int rtw_dbcc_en = 0;
713 module_param(rtw_dbcc_en, int, 0644);
714 MODULE_PARM_DESC(rtw_dbcc_en, "0:Disable, 1:Enable DBCC");
715 #endif
716
717 uint rtw_powertracking_type = 64;
718 module_param(rtw_powertracking_type, uint, 0644);
719 MODULE_PARM_DESC(rtw_powertracking_type, "default init value:64");
720
721 uint rtw_GLNA_type = CONFIG_RTW_GLNA_TYPE;
722 module_param(rtw_GLNA_type, uint, 0644);
723 MODULE_PARM_DESC(rtw_GLNA_type, "default init value:0");
724
725 uint rtw_TxBBSwing_2G = 0xFF;
726 module_param(rtw_TxBBSwing_2G, uint, 0644);
727 MODULE_PARM_DESC(rtw_TxBBSwing_2G, "default init value:0xFF");
728
729 uint rtw_TxBBSwing_5G = 0xFF;
730 module_param(rtw_TxBBSwing_5G, uint, 0644);
731 MODULE_PARM_DESC(rtw_TxBBSwing_5G, "default init value:0xFF");
732
733 uint rtw_OffEfuseMask = 0;
734 module_param(rtw_OffEfuseMask, uint, 0644);
735 MODULE_PARM_DESC(rtw_OffEfuseMask, "default open Efuse Mask value:0");
736
737 uint rtw_FileMaskEfuse = 0;
738 module_param(rtw_FileMaskEfuse, uint, 0644);
739 MODULE_PARM_DESC(rtw_FileMaskEfuse, "default drv Mask Efuse value:0");
740
741 uint rtw_rxgain_offset_2g = 0;
742 module_param(rtw_rxgain_offset_2g, uint, 0644);
743 MODULE_PARM_DESC(rtw_rxgain_offset_2g, "default RF Gain 2G Offset value:0");
744
745 uint rtw_rxgain_offset_5gl = 0;
746 module_param(rtw_rxgain_offset_5gl, uint, 0644);
747 MODULE_PARM_DESC(rtw_rxgain_offset_5gl, "default RF Gain 5GL Offset value:0");
748
749 uint rtw_rxgain_offset_5gm = 0;
750 module_param(rtw_rxgain_offset_5gm, uint, 0644);
751 MODULE_PARM_DESC(rtw_rxgain_offset_5gm, "default RF Gain 5GM Offset value:0");
752
753 uint rtw_rxgain_offset_5gh = 0;
754 module_param(rtw_rxgain_offset_5gh, uint, 0644);
755 MODULE_PARM_DESC(rtw_rxgain_offset_5gm, "default RF Gain 5GL Offset value:0");
756
757 uint rtw_pll_ref_clk_sel = CONFIG_RTW_PLL_REF_CLK_SEL;
758 module_param(rtw_pll_ref_clk_sel, uint, 0644);
759 MODULE_PARM_DESC(rtw_pll_ref_clk_sel, "force pll_ref_clk_sel, 0xF:use autoload value");
760
761 int rtw_tx_pwr_by_rate = CONFIG_TXPWR_BY_RATE_EN;
762 module_param(rtw_tx_pwr_by_rate, int, 0644);
763 MODULE_PARM_DESC(rtw_tx_pwr_by_rate, "0:Disable, 1:Enable, 2: Depend on efuse");
764
765 #if CONFIG_TXPWR_LIMIT
766 int rtw_tx_pwr_lmt_enable = CONFIG_TXPWR_LIMIT_EN;
767 module_param(rtw_tx_pwr_lmt_enable, int, 0644);
768 MODULE_PARM_DESC(rtw_tx_pwr_lmt_enable, "0:Disable, 1:Enable, 2: Depend on efuse");
769 #endif
770
771 static int rtw_target_tx_pwr_2g_a[RATE_SECTION_NUM] = CONFIG_RTW_TARGET_TX_PWR_2G_A;
772 static int rtw_target_tx_pwr_2g_a_num = 0;
773 module_param_array(rtw_target_tx_pwr_2g_a, int, &rtw_target_tx_pwr_2g_a_num, 0644);
774 MODULE_PARM_DESC(rtw_target_tx_pwr_2g_a, "2.4G target tx power (unit:dBm) of RF path A for each rate section, should match the real calibrate power, -1: undefined");
775
776 static int rtw_target_tx_pwr_2g_b[RATE_SECTION_NUM] = CONFIG_RTW_TARGET_TX_PWR_2G_B;
777 static int rtw_target_tx_pwr_2g_b_num = 0;
778 module_param_array(rtw_target_tx_pwr_2g_b, int, &rtw_target_tx_pwr_2g_b_num, 0644);
779 MODULE_PARM_DESC(rtw_target_tx_pwr_2g_b, "2.4G target tx power (unit:dBm) of RF path B for each rate section, should match the real calibrate power, -1: undefined");
780
781 static int rtw_target_tx_pwr_2g_c[RATE_SECTION_NUM] = CONFIG_RTW_TARGET_TX_PWR_2G_C;
782 static int rtw_target_tx_pwr_2g_c_num = 0;
783 module_param_array(rtw_target_tx_pwr_2g_c, int, &rtw_target_tx_pwr_2g_c_num, 0644);
784 MODULE_PARM_DESC(rtw_target_tx_pwr_2g_c, "2.4G target tx power (unit:dBm) of RF path C for each rate section, should match the real calibrate power, -1: undefined");
785
786 static int rtw_target_tx_pwr_2g_d[RATE_SECTION_NUM] = CONFIG_RTW_TARGET_TX_PWR_2G_D;
787 static int rtw_target_tx_pwr_2g_d_num = 0;
788 module_param_array(rtw_target_tx_pwr_2g_d, int, &rtw_target_tx_pwr_2g_d_num, 0644);
789 MODULE_PARM_DESC(rtw_target_tx_pwr_2g_d, "2.4G target tx power (unit:dBm) of RF path D for each rate section, should match the real calibrate power, -1: undefined");
790
791 #if CONFIG_IEEE80211_BAND_5GHZ
792 static int rtw_target_tx_pwr_5g_a[RATE_SECTION_NUM - 1] = CONFIG_RTW_TARGET_TX_PWR_5G_A;
793 static int rtw_target_tx_pwr_5g_a_num = 0;
794 module_param_array(rtw_target_tx_pwr_5g_a, int, &rtw_target_tx_pwr_5g_a_num, 0644);
795 MODULE_PARM_DESC(rtw_target_tx_pwr_5g_a, "5G target tx power (unit:dBm) of RF path A for each rate section, should match the real calibrate power, -1: undefined");
796
797 static int rtw_target_tx_pwr_5g_b[RATE_SECTION_NUM - 1] = CONFIG_RTW_TARGET_TX_PWR_5G_B;
798 static int rtw_target_tx_pwr_5g_b_num = 0;
799 module_param_array(rtw_target_tx_pwr_5g_b, int, &rtw_target_tx_pwr_5g_b_num, 0644);
800 MODULE_PARM_DESC(rtw_target_tx_pwr_5g_b, "5G target tx power (unit:dBm) of RF path B for each rate section, should match the real calibrate power, -1: undefined");
801
802 static int rtw_target_tx_pwr_5g_c[RATE_SECTION_NUM - 1] = CONFIG_RTW_TARGET_TX_PWR_5G_C;
803 static int rtw_target_tx_pwr_5g_c_num = 0;
804 module_param_array(rtw_target_tx_pwr_5g_c, int, &rtw_target_tx_pwr_5g_c_num, 0644);
805 MODULE_PARM_DESC(rtw_target_tx_pwr_5g_c, "5G target tx power (unit:dBm) of RF path C for each rate section, should match the real calibrate power, -1: undefined");
806
807 static int rtw_target_tx_pwr_5g_d[RATE_SECTION_NUM - 1] = CONFIG_RTW_TARGET_TX_PWR_5G_D;
808 static int rtw_target_tx_pwr_5g_d_num = 0;
809 module_param_array(rtw_target_tx_pwr_5g_d, int, &rtw_target_tx_pwr_5g_d_num, 0644);
810 MODULE_PARM_DESC(rtw_target_tx_pwr_5g_d, "5G target tx power (unit:dBm) of RF path D for each rate section, should match the real calibrate power, -1: undefined");
811 #endif /* CONFIG_IEEE80211_BAND_5GHZ */
812
813 #ifdef CONFIG_RTW_TX_NPATH_EN
814 /*0:disable ,1: 2path*/
815 int rtw_tx_npath_enable = 1;
816 module_param(rtw_tx_npath_enable, int, 0644);
817 MODULE_PARM_DESC(rtw_tx_npath_enable, "0:Disable, 1:TX-2PATH");
818 #endif
819
820 #ifdef CONFIG_RTW_PATH_DIV
821 /*0:disable ,1: path diversity*/
822 int rtw_path_div_enable = 1;
823 module_param(rtw_path_div_enable, int, 0644);
824 MODULE_PARM_DESC(rtw_path_div_enable, "0:Disable, 1:Enable path diversity");
825 #endif
826
827 #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
828 char *rtw_phy_file_path = REALTEK_CONFIG_PATH;
829 module_param(rtw_phy_file_path, charp, 0644);
830 MODULE_PARM_DESC(rtw_phy_file_path, "The path of phy parameter");
831 /* PHY FILE Bit Map
832 * BIT0 - MAC_REG, 0: non-support, 1: support
833 * BIT1 - BB_PHY_REG, 0: non-support, 1: support
834 * BIT2 - BB_PHY_REG_MP, 0: non-support, 1: support
835 * BIT3 - RF_RADIO, 0: non-support, 1: support
836 * BIT4 - RF_TXPWR_BY_RATE, 0: non-support, 1: support
837 * BIT5 - RF_TXPWR_TRACK, 0: non-support, 1: support
838 * BIT6 - RF_TXPWR_LMT, 0: non-support, 1: support
839 * BIT7 - RF_TXPWR_LMT_RU, 0: non-support, 1: support
840 * BIT8 - BB_PHY_REG_GAIN_FILE 0: non-support, 1: support
841 */
842 int rtw_load_phy_file = (BIT1 | BIT3 | BIT4 | BIT6 | BIT7);
843 module_param(rtw_load_phy_file, int, 0644);
844 MODULE_PARM_DESC(rtw_load_phy_file, "PHY File Bit Map");
845 int rtw_decrypt_phy_file = 0;
846 module_param(rtw_decrypt_phy_file, int, 0644);
847 MODULE_PARM_DESC(rtw_decrypt_phy_file, "Enable Decrypt PHY File");
848 #endif
849
850
851 uint rtw_phydm_ability = 0xffffffff;
852 module_param(rtw_phydm_ability, uint, 0644);
853
854 uint rtw_halrf_ability = 0xffffffff;
855 module_param(rtw_halrf_ability, uint, 0644);
856
857 #ifdef CONFIG_RTW_MESH
858 uint rtw_peer_alive_based_preq = 1;
859 module_param(rtw_peer_alive_based_preq, uint, 0644);
860 MODULE_PARM_DESC(rtw_peer_alive_based_preq,
861 "On demand PREQ will reference peer alive status. 0: Off, 1: On");
862 #endif
863
864 #ifdef CONFIG_RTW_NAPI
865 /*following setting should define NAPI in Makefile
866 enable napi only = 1, disable napi = 0*/
867 int rtw_en_napi = 1;
868 module_param(rtw_en_napi, int, 0644);
869 #ifdef CONFIG_RTW_NAPI_DYNAMIC
870 int rtw_napi_threshold = 100; /* unit: Mbps */
871 module_param(rtw_napi_threshold, int, 0644);
872 #endif /* CONFIG_RTW_NAPI_DYNAMIC */
873 #ifdef CONFIG_RTW_GRO
874 /*following setting should define GRO in Makefile
875 enable gro = 1, disable gro = 0*/
876 int rtw_en_gro = 1;
877 module_param(rtw_en_gro, int, 0644);
878 #endif /* CONFIG_RTW_GRO */
879 #endif /* CONFIG_RTW_NAPI */
880
881 #ifdef RTW_IQK_FW_OFFLOAD
882 int rtw_iqk_fw_offload = 1;
883 #else
884 int rtw_iqk_fw_offload;
885 #endif /* RTW_IQK_FW_OFFLOAD */
886 module_param(rtw_iqk_fw_offload, int, 0644);
887
888 #ifdef RTW_CHANNEL_SWITCH_OFFLOAD
889 int rtw_ch_switch_offload = 0;
890 #else
891 int rtw_ch_switch_offload;
892 #endif /* RTW_CHANNEL_SWITCH_OFFLOAD */
893 module_param(rtw_ch_switch_offload, int, 0644);
894
895 #ifdef CONFIG_TDLS
896 int rtw_en_tdls = 1;
897 module_param(rtw_en_tdls, int, 0644);
898 #endif
899
900 #ifdef CONFIG_FW_OFFLOAD_PARAM_INIT
901 int rtw_fw_param_init = 1;
902 module_param(rtw_fw_param_init, int, 0644);
903 #endif
904
905 #ifdef CONFIG_TDMADIG
906 int rtw_tdmadig_en = 1;
907 /*
908 1:MODE_PERFORMANCE
909 2:MODE_COVERAGE
910 */
911 int rtw_tdmadig_mode = 1;
912 int rtw_dynamic_tdmadig = 0;
913 module_param(rtw_tdmadig_en, int, 0644);
914 module_param(rtw_tdmadig_mode, int, 0644);
915 module_param(rtw_dynamic_tdmadig, int, 0644);
916 #endif/*CONFIG_TDMADIG*/
917
918 /*dynamic RRSR default enable*/
919 int rtw_en_dyn_rrsr = 1;
920 int rtw_rrsr_value = 0xFFFFFFFF;
921 module_param(rtw_en_dyn_rrsr, int, 0644);
922 module_param(rtw_rrsr_value, int, 0644);
923
924 #ifdef CONFIG_WOWLAN
925 /*
926 * 0: disable, 1: enable
927 */
928 uint rtw_wow_enable = 1;
929 module_param(rtw_wow_enable, uint, 0644);
930 /*
931 * bit[0]: magic packet wake up
932 * bit[1]: unucast packet(HW/FW unuicast)
933 * bit[2]: deauth wake up
934 */
935 uint rtw_wakeup_event = RTW_WAKEUP_EVENT;
936 module_param(rtw_wakeup_event, uint, 0644);
937 /*
938 * 0: common WOWLAN
939 * bit[0]: disable BB RF
940 * bit[1]: For wireless remote controller with or without connection
941 */
942 uint rtw_suspend_type = RTW_SUSPEND_TYPE;
943 module_param(rtw_suspend_type, uint, 0644);
944 #endif
945
946 #if defined(ROKU_PRIVATE) && defined(CONFIG_P2P)
947 int rtw_go_hidden_ssid_mode = ALL_HIDE_SSID;
948 module_param(rtw_go_hidden_ssid_mode, int, 0644);
949 #endif
950
951 #ifdef RTW_BUSY_DENY_SCAN
952 uint rtw_scan_interval_thr = BUSY_TRAFFIC_SCAN_DENY_PERIOD;
953 module_param(rtw_scan_interval_thr, uint, 0644);
954 MODULE_PARM_DESC(rtw_scan_interval_thr, "Threshold used to judge if scan " \
955 "request comes from scan UI, unit is ms.");
956 #endif /* RTW_BUSY_DENY_SCAN */
957
958 #ifdef CONFIG_HW_HDR_CONVERSION
959 int rtw_hw_hdr_conv = true;
960 #else
961 int rtw_hw_hdr_conv = false;
962 #endif
963
964 #ifdef CONFIG_MCC_MODE
965 int rtw_mcc_en = _TRUE;
966 module_param(rtw_mcc_en, int, 0644);
967 #endif
968
969 #ifdef CONFIG_RTW_MULTI_AP
970 static int rtw_unassoc_sta_mode_of_stype[UNASOC_STA_SRC_NUM] = CONFIG_RTW_UNASOC_STA_MODE_OF_STYPE;
971 static int rtw_unassoc_sta_mode_of_stype_num = 0;
972 module_param_array(rtw_unassoc_sta_mode_of_stype, int, &rtw_unassoc_sta_mode_of_stype_num, 0644);
973
974 uint rtw_max_unassoc_sta_cnt = 0;
975 module_param(rtw_max_unassoc_sta_cnt, uint, 0644);
976 #endif
977
978 #ifdef CONFIG_IOCTL_CFG80211
979 uint rtw_roch_min_home_dur = 1500;
980 uint rtw_roch_max_away_dur = 500;
981 uint rtw_roch_extend_dur = 500;
982 module_param(rtw_roch_min_home_dur, uint, 0644);
983 module_param(rtw_roch_max_away_dur, uint, 0644);
984 module_param(rtw_roch_extend_dur, uint, 0644);
985 #endif
986
987 uint rtw_scan_pch_ex = 0;
988 module_param(rtw_scan_pch_ex, uint, 0644);
989
rtw_regsty_load_target_tx_power(struct registry_priv * regsty)990 static void rtw_regsty_load_target_tx_power(struct registry_priv *regsty)
991 {
992 int path, rs;
993 int *target_tx_pwr;
994
995 for (path = RF_PATH_A; path < RF_PATH_MAX; path++) {
996 if (path == RF_PATH_A)
997 target_tx_pwr = rtw_target_tx_pwr_2g_a;
998 else if (path == RF_PATH_B)
999 target_tx_pwr = rtw_target_tx_pwr_2g_b;
1000 else if (path == RF_PATH_C)
1001 target_tx_pwr = rtw_target_tx_pwr_2g_c;
1002 else if (path == RF_PATH_D)
1003 target_tx_pwr = rtw_target_tx_pwr_2g_d;
1004
1005 for (rs = CCK; rs < RATE_SECTION_NUM; rs++)
1006 regsty->target_tx_pwr_2g[path][rs] = target_tx_pwr[rs];
1007 }
1008
1009 #if CONFIG_IEEE80211_BAND_5GHZ
1010 for (path = RF_PATH_A; path < RF_PATH_MAX; path++) {
1011 if (path == RF_PATH_A)
1012 target_tx_pwr = rtw_target_tx_pwr_5g_a;
1013 else if (path == RF_PATH_B)
1014 target_tx_pwr = rtw_target_tx_pwr_5g_b;
1015 else if (path == RF_PATH_C)
1016 target_tx_pwr = rtw_target_tx_pwr_5g_c;
1017 else if (path == RF_PATH_D)
1018 target_tx_pwr = rtw_target_tx_pwr_5g_d;
1019
1020 for (rs = OFDM; rs < RATE_SECTION_NUM; rs++)
1021 regsty->target_tx_pwr_5g[path][rs - 1] = target_tx_pwr[rs - 1];
1022 }
1023 #endif /* CONFIG_IEEE80211_BAND_5GHZ */
1024 }
1025
rtw_regsty_load_chplan(struct registry_priv * regsty)1026 static inline void rtw_regsty_load_chplan(struct registry_priv *regsty)
1027 {
1028 u16 chplan = RTW_CHPLAN_UNSPECIFIED;
1029 u16 chplan_6g = RTW_CHPLAN_6G_UNSPECIFIED;
1030
1031 chplan = rtw_channel_plan;
1032 #if CONFIG_IEEE80211_BAND_6GHZ
1033 chplan_6g = rtw_channel_plan_6g;
1034 #endif
1035
1036 rtw_chplan_ioctl_input_mapping(&chplan, &chplan_6g);
1037
1038 regsty->channel_plan = chplan;
1039 #if CONFIG_IEEE80211_BAND_6GHZ
1040 regsty->channel_plan_6g = chplan_6g;
1041 #endif
1042 }
1043
rtw_regsty_load_alpha2(struct registry_priv * regsty)1044 static inline void rtw_regsty_load_alpha2(struct registry_priv *regsty)
1045 {
1046 if (strlen(rtw_country_code) != 2
1047 || (!IS_ALPHA2_WORLDWIDE(rtw_country_code)
1048 && (is_alpha(rtw_country_code[0]) == _FALSE
1049 || is_alpha(rtw_country_code[1]) == _FALSE)
1050 )
1051 ) {
1052 if (rtw_country_code != rtw_country_unspecified)
1053 RTW_ERR("%s discard rtw_country_code not in alpha2 or \"%s\"\n", __func__, WORLDWIDE_ALPHA2);
1054 SET_UNSPEC_ALPHA2(regsty->alpha2);
1055 } else
1056 _rtw_memcpy(regsty->alpha2, rtw_country_code, 2);
1057 }
1058
rtw_regsty_load_excl_chs(struct registry_priv * regsty)1059 static inline void rtw_regsty_load_excl_chs(struct registry_priv *regsty)
1060 {
1061 int i;
1062 int ch_num = 0;
1063
1064 for (i = 0; i < MAX_CHANNEL_NUM_2G_5G; i++)
1065 if (((u8)rtw_excl_chs[i]) != 0)
1066 regsty->excl_chs[ch_num++] = (u8)rtw_excl_chs[i];
1067
1068 if (ch_num < MAX_CHANNEL_NUM_2G_5G)
1069 regsty->excl_chs[ch_num] = 0;
1070
1071 #if CONFIG_IEEE80211_BAND_6GHZ
1072 ch_num = 0;
1073 for (i = 0; i < MAX_CHANNEL_NUM_6G; i++)
1074 if (((u8)rtw_excl_chs_6g[i]) != 0)
1075 regsty->excl_chs_6g[ch_num++] = (u8)rtw_excl_chs_6g[i];
1076
1077 if (ch_num < MAX_CHANNEL_NUM_6G)
1078 regsty->excl_chs_6g[ch_num] = 0;
1079 #endif
1080 }
1081
1082 #ifdef CONFIG_80211D
rtw_regsty_load_country_ie_slave_settings(struct registry_priv * regsty)1083 inline void rtw_regsty_load_country_ie_slave_settings(struct registry_priv *regsty)
1084 {
1085 regsty->country_ie_slave_en_role = rtw_country_ie_slave_en_role;
1086 regsty->country_ie_slave_en_ifbmp = rtw_country_ie_slave_en_ifbmp;
1087 }
1088 #endif
1089
1090 #ifdef CONFIG_80211N_HT
rtw_regsty_init_rx_ampdu_sz_limit(struct registry_priv * regsty)1091 static inline void rtw_regsty_init_rx_ampdu_sz_limit(struct registry_priv *regsty)
1092 {
1093 int i, j;
1094 uint *sz_limit;
1095
1096 for (i = 0; i < 4; i++) {
1097 if (i == 0)
1098 sz_limit = rtw_rx_ampdu_sz_limit_1ss;
1099 else if (i == 1)
1100 sz_limit = rtw_rx_ampdu_sz_limit_2ss;
1101 else if (i == 2)
1102 sz_limit = rtw_rx_ampdu_sz_limit_3ss;
1103 else if (i == 3)
1104 sz_limit = rtw_rx_ampdu_sz_limit_4ss;
1105
1106 for (j = 0; j < 4; j++)
1107 regsty->rx_ampdu_sz_limit_by_nss_bw[i][j] = sz_limit[j];
1108 }
1109 }
1110 #endif /* CONFIG_80211N_HT */
1111
1112 #ifdef CONFIG_RTW_MULTI_AP
rtw_regsty_init_unassoc_sta_param(struct registry_priv * regsty)1113 inline void rtw_regsty_init_unassoc_sta_param(struct registry_priv *regsty)
1114 {
1115 int i;
1116
1117 for (i = 0; i < UNASOC_STA_SRC_NUM; i++)
1118 regsty->unassoc_sta_mode_of_stype[i] = rtw_unassoc_sta_mode_of_stype[i];
1119
1120 regsty->max_unassoc_sta_cnt = (u16)rtw_max_unassoc_sta_cnt;
1121 }
1122 #endif
1123
rtw_load_phy_file_path(struct dvobj_priv * dvobj)1124 static void rtw_load_phy_file_path (struct dvobj_priv *dvobj)
1125 {
1126 struct rtw_phl_com_t *phl_com = GET_PHL_COM(dvobj);
1127
1128 #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
1129 if (rtw_load_phy_file & LOAD_BB_PHY_REG_FILE) {
1130 phl_com->phy_sw_cap[0].bb_phy_reg_info.para_src = RTW_PARA_SRC_EXTNAL;
1131 phl_com->phy_sw_cap[1].bb_phy_reg_info.para_src = RTW_PARA_SRC_EXTNAL;
1132 phl_com->phy_sw_cap[0].bb_phy_reg_info.hal_phy_folder = rtw_phy_file_path;
1133 phl_com->phy_sw_cap[1].bb_phy_reg_info.hal_phy_folder = rtw_phy_file_path;
1134 }
1135
1136 if (rtw_load_phy_file & LOAD_RF_RADIO_FILE) {
1137 phl_com->phy_sw_cap[0].rf_radio_a_info.para_src = RTW_PARA_SRC_EXTNAL;
1138 phl_com->phy_sw_cap[1].rf_radio_a_info.para_src = RTW_PARA_SRC_EXTNAL;
1139 phl_com->phy_sw_cap[0].rf_radio_b_info.para_src = RTW_PARA_SRC_EXTNAL;
1140 phl_com->phy_sw_cap[1].rf_radio_b_info.para_src = RTW_PARA_SRC_EXTNAL;
1141 phl_com->phy_sw_cap[0].rf_radio_a_info.hal_phy_folder = rtw_phy_file_path;
1142 phl_com->phy_sw_cap[1].rf_radio_a_info.hal_phy_folder = rtw_phy_file_path;
1143 phl_com->phy_sw_cap[0].rf_radio_b_info.hal_phy_folder = rtw_phy_file_path;
1144 phl_com->phy_sw_cap[1].rf_radio_b_info.hal_phy_folder = rtw_phy_file_path;
1145 }
1146
1147 if (rtw_load_phy_file & LOAD_RF_TXPWR_BY_RATE) {
1148 phl_com->phy_sw_cap[0].rf_txpwr_byrate_info.para_src = RTW_PARA_SRC_EXTNAL;
1149 phl_com->phy_sw_cap[1].rf_txpwr_byrate_info.para_src = RTW_PARA_SRC_EXTNAL;
1150 phl_com->phy_sw_cap[0].rf_txpwr_byrate_info.hal_phy_folder = rtw_phy_file_path;
1151 phl_com->phy_sw_cap[1].rf_txpwr_byrate_info.hal_phy_folder = rtw_phy_file_path;
1152 }
1153
1154 if (rtw_load_phy_file & LOAD_RF_TXPWR_TRACK_FILE) {
1155 phl_com->phy_sw_cap[0].rf_txpwrtrack_info.para_src = RTW_PARA_SRC_EXTNAL;
1156 phl_com->phy_sw_cap[1].rf_txpwrtrack_info.para_src = RTW_PARA_SRC_EXTNAL;
1157 phl_com->phy_sw_cap[0].rf_txpwrtrack_info.hal_phy_folder = rtw_phy_file_path;
1158 phl_com->phy_sw_cap[1].rf_txpwrtrack_info.hal_phy_folder = rtw_phy_file_path;
1159 }
1160
1161 if (rtw_load_phy_file & LOAD_RF_TXPWR_LMT_FILE) {
1162 phl_com->phy_sw_cap[0].rf_txpwrlmt_info.para_src = RTW_PARA_SRC_EXTNAL;
1163 phl_com->phy_sw_cap[1].rf_txpwrlmt_info.para_src = RTW_PARA_SRC_EXTNAL;
1164 phl_com->phy_sw_cap[0].rf_txpwrlmt_info.hal_phy_folder = rtw_phy_file_path;
1165 phl_com->phy_sw_cap[1].rf_txpwrlmt_info.hal_phy_folder = rtw_phy_file_path;
1166 }
1167
1168 if (rtw_load_phy_file & LOAD_RF_TXPWR_LMT_RU_FILE) {
1169 phl_com->phy_sw_cap[0].rf_txpwrlmt_ru_info.para_src = RTW_PARA_SRC_EXTNAL;
1170 phl_com->phy_sw_cap[1].rf_txpwrlmt_ru_info.para_src = RTW_PARA_SRC_EXTNAL;
1171 phl_com->phy_sw_cap[0].rf_txpwrlmt_ru_info.hal_phy_folder = rtw_phy_file_path;
1172 phl_com->phy_sw_cap[1].rf_txpwrlmt_ru_info.hal_phy_folder = rtw_phy_file_path;
1173 }
1174
1175 if (rtw_load_phy_file & LOAD_BB_PHY_REG_GAIN_FILE) {
1176 phl_com->phy_sw_cap[0].bb_phy_reg_gain_info.para_src = RTW_PARA_SRC_EXTNAL;
1177 phl_com->phy_sw_cap[1].bb_phy_reg_gain_info.para_src = RTW_PARA_SRC_EXTNAL;
1178 phl_com->phy_sw_cap[0].bb_phy_reg_gain_info.hal_phy_folder = rtw_phy_file_path;
1179 phl_com->phy_sw_cap[1].bb_phy_reg_gain_info.hal_phy_folder = rtw_phy_file_path;
1180 }
1181 #endif/* CONFIG_LOAD_PHY_PARA_FROM_FILE */
1182 }
1183
rtw_core_update_default_setting(struct dvobj_priv * dvobj)1184 void rtw_core_update_default_setting (struct dvobj_priv *dvobj)
1185 {
1186 struct rtw_phl_com_t *phl_com = GET_PHL_COM(dvobj);
1187
1188 #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
1189 rtw_load_phy_file_path(dvobj);
1190 #endif /* CONFIG_LOAD_PHY_PARA_FROM_FILE */
1191
1192 phl_com->dev_sw_cap.fw_cap.dlram_en = true;
1193 phl_com->dev_sw_cap.fw_cap.dlrom_en = false;
1194 #ifdef CONFIG_FILE_FWIMG
1195 phl_com->dev_sw_cap.fw_cap.fw_src = RTW_FW_SRC_EXTNAL;
1196 #else /* !CONFIG_FILE_FWIMG */
1197 phl_com->dev_sw_cap.fw_cap.fw_src = RTW_FW_SRC_INTNAL;
1198 #endif /* !CONFIG_FILE_FWIMG */
1199
1200 phl_com->phy_sw_cap[0].proto_sup = rtw_wireless_mode;
1201 phl_com->phy_sw_cap[0].band_sup = rtw_band_type;
1202 phl_com->phy_sw_cap[0].bw_sup = BW_CAP_80M | BW_CAP_40M | BW_CAP_20M; //rtw_bw_mode;
1203 phl_com->phy_sw_cap[0].txss = rtw_tx_nss;
1204 phl_com->phy_sw_cap[0].rxss = rtw_rx_nss;
1205
1206 phl_com->phy_sw_cap[1].proto_sup = rtw_wireless_mode;
1207 phl_com->phy_sw_cap[1].band_sup = rtw_band_type;
1208 phl_com->phy_sw_cap[1].bw_sup = rtw_bw_mode;
1209 phl_com->phy_sw_cap[1].txss = rtw_tx_nss;
1210 phl_com->phy_sw_cap[1].rxss = rtw_rx_nss;
1211
1212 phl_com->phy_sw_cap[0].hw_rts_time_th = 88;
1213 phl_com->phy_sw_cap[0].hw_rts_len_th = 4080;
1214 phl_com->phy_sw_cap[1].hw_rts_time_th = 88;
1215 phl_com->phy_sw_cap[1].hw_rts_len_th = 4080;
1216
1217 /*phl_com->dev_sw_cap.pkg_type = rtw_pkg_type;*/
1218 phl_com->dev_sw_cap.rfe_type = rtw_rfe_type;
1219 #ifdef DBG_LA_MODE
1220 phl_com->dev_sw_cap.la_mode = rtw_la_mode_en;
1221 #endif
1222 #ifdef CONFIG_DBCC_SUPPORT
1223 phl_com->dev_sw_cap.dbcc_sup = rtw_dbcc_en;
1224 #endif
1225
1226 phl_com->dev_sw_cap.hw_hdr_conv = rtw_hw_hdr_conv;
1227
1228 phl_com->proto_sw_cap[0].max_amsdu_len = rtw_max_amsdu_len;
1229 phl_com->proto_sw_cap[1].max_amsdu_len = rtw_max_amsdu_len;
1230
1231 #if defined(CONFIG_PCI_HCI)
1232 #if !defined(CONFIG_PCI_ASPM)
1233 /* Disable all PCIE Backdoor to avoid PCIE IOT */
1234 phl_com->bus_sw_cap.l0s_ctrl = RTW_PCIE_BUS_FUNC_DISABLE;
1235 phl_com->bus_sw_cap.l1_ctrl = RTW_PCIE_BUS_FUNC_DISABLE;
1236 phl_com->bus_sw_cap.l1ss_ctrl = RTW_PCIE_BUS_FUNC_DISABLE;
1237 phl_com->bus_sw_cap.wake_ctrl = RTW_PCIE_BUS_FUNC_DEFAULT;
1238 phl_com->bus_sw_cap.crq_ctrl = RTW_PCIE_BUS_FUNC_DISABLE;
1239 #endif
1240 phl_com->bus_sw_cap.txbd_num = 256;
1241 phl_com->bus_sw_cap.rxbd_num = 256;
1242 phl_com->bus_sw_cap.rpbd_num = 0; /* by default */
1243 #ifdef CONFIG_RXBUF_NUM_1024
1244 phl_com->bus_sw_cap.rxbuf_num = 1024;
1245 #else
1246 phl_com->bus_sw_cap.rxbuf_num = 512;
1247 #endif
1248 phl_com->bus_sw_cap.rpbuf_num = 0; /* by default */
1249 #endif /*CONFIG_PCI_HCI*/
1250
1251 #ifdef CONFIG_BTC
1252 phl_com->dev_sw_cap.btc_mode = BTC_MODE_NORMAL;
1253 #else
1254 phl_com->dev_sw_cap.btc_mode = BTC_MODE_WL;
1255 #endif
1256 #ifdef CONFIG_MCC_MODE
1257 phl_com->dev_sw_cap.mcc_sup = rtw_mcc_en;
1258 #endif
1259 #ifdef CONFIG_USB_HCI
1260 phl_com->bus_sw_cap.tx_buf_size = MAX_XMITBUF_SZ;
1261 phl_com->bus_sw_cap.tx_buf_num = NR_XMITBUFF;
1262 phl_com->bus_sw_cap.tx_mgnt_buf_size = MAX_MGNT_XMITBUF_SZ;
1263 phl_com->bus_sw_cap.tx_mgnt_buf_num = NR_MGNT_XMITBUFF;
1264 phl_com->bus_sw_cap.rx_buf_size = MAX_RECVBUF_SZ;
1265 phl_com->bus_sw_cap.rx_buf_num = NR_RECVBUFF;
1266 phl_com->bus_sw_cap.in_token_num = NR_RECV_URB;
1267 #endif
1268 #ifdef CONFIG_SDIO_HCI
1269 phl_com->bus_sw_cap.tx_buf_retry_lmt = (u16)rtw_tx_buf_retry_lmt;
1270 #ifdef MAX_XMITBUF_SZ
1271 phl_com->bus_sw_cap.tx_buf_size = MAX_XMITBUF_SZ;
1272 #endif
1273 #ifdef NR_XMITBUFF
1274 phl_com->bus_sw_cap.tx_buf_num = NR_XMITBUFF;
1275 #endif
1276 #ifdef MAX_MGNT_XMITBUF_SZ
1277 phl_com->bus_sw_cap.tx_mgnt_buf_size = MAX_MGNT_XMITBUF_SZ;
1278 #endif
1279 #ifdef NR_MGNT_XMITBUFF
1280 phl_com->bus_sw_cap.tx_mgnt_buf_num = NR_MGNT_XMITBUFF;
1281 #endif
1282 #ifdef MAX_RECVBUF_SZ
1283 phl_com->bus_sw_cap.rx_buf_size = MAX_RECVBUF_SZ;
1284 #endif
1285 #ifdef NR_RECVBUFF
1286 phl_com->bus_sw_cap.rx_buf_num = NR_RECVBUFF;
1287 #endif
1288 #endif /* CONFIG_SDIO_HCI */
1289
1290 /* Set STBC Tx/Rx sw role cap */
1291 phl_com->role_sw_cap.stbc_cap = 0;
1292 phl_com->role_sw_cap.stbc_cap |=
1293 (rtw_stbc_cap & BIT5) ? HW_CAP_STBC_HT_TX : 0;
1294 phl_com->role_sw_cap.stbc_cap |=
1295 (rtw_stbc_cap & BIT1) ? HW_CAP_STBC_VHT_TX : 0;
1296 phl_com->role_sw_cap.stbc_cap |=
1297 (rtw_stbc_cap & BIT10) ? HW_CAP_STBC_HE_TX : 0;
1298 phl_com->role_sw_cap.stbc_cap |=
1299 (rtw_stbc_cap & BIT11) ? HW_CAP_STBC_HE_TX_GT_80M : 0;
1300
1301 phl_com->role_sw_cap.stbc_cap |=
1302 (rtw_stbc_cap & BIT4) ? HW_CAP_STBC_HT_RX : 0;
1303 phl_com->role_sw_cap.stbc_cap |=
1304 (rtw_stbc_cap & BIT0) ? HW_CAP_STBC_VHT_RX : 0;
1305 phl_com->role_sw_cap.stbc_cap |=
1306 (rtw_stbc_cap & BIT8) ? HW_CAP_STBC_HE_RX : 0;
1307 phl_com->role_sw_cap.stbc_cap |=
1308 (rtw_stbc_cap & BIT9) ? HW_CAP_STBC_HE_RX_GT_80M : 0;
1309
1310 /*Band0*/
1311 phl_com->proto_sw_cap[0].stbc_ht_tx = (rtw_stbc_cap & BIT5) ? 1 : 0;
1312 phl_com->proto_sw_cap[0].stbc_vht_tx = (rtw_stbc_cap & BIT1) ? 1 : 0;
1313 phl_com->proto_sw_cap[0].stbc_he_tx = (rtw_stbc_cap & BIT10) ? 1 : 0;
1314 phl_com->proto_sw_cap[0].stbc_tx_greater_80mhz = (rtw_stbc_cap & BIT11) ? 1 : 0;
1315
1316 phl_com->proto_sw_cap[0].stbc_ht_rx = (rtw_stbc_cap & BIT4) ? 1 : 0;
1317 phl_com->proto_sw_cap[0].stbc_vht_rx = (rtw_stbc_cap & BIT0) ? 1 : 0;
1318 phl_com->proto_sw_cap[0].stbc_he_rx = (rtw_stbc_cap & BIT8) ? 1 : 0;
1319 phl_com->proto_sw_cap[0].stbc_rx_greater_80mhz = (rtw_stbc_cap & BIT9) ? 1 : 0;
1320
1321 /*Band1*/
1322 phl_com->proto_sw_cap[1].stbc_ht_tx = (rtw_stbc_cap & BIT5) ? 1 : 0;
1323 phl_com->proto_sw_cap[1].stbc_vht_tx = (rtw_stbc_cap & BIT1) ? 1 : 0;
1324 phl_com->proto_sw_cap[1].stbc_he_tx = (rtw_stbc_cap & BIT10) ? 1 : 0;
1325 phl_com->proto_sw_cap[1].stbc_tx_greater_80mhz = (rtw_stbc_cap & BIT11) ? 1 : 0;
1326
1327 phl_com->proto_sw_cap[1].stbc_ht_rx = (rtw_stbc_cap & BIT4) ? 1 : 0;
1328 phl_com->proto_sw_cap[1].stbc_vht_rx = (rtw_stbc_cap & BIT0) ? 1 : 0;
1329 phl_com->proto_sw_cap[1].stbc_he_rx = (rtw_stbc_cap & BIT8) ? 1 : 0;
1330 phl_com->proto_sw_cap[1].stbc_rx_greater_80mhz = (rtw_stbc_cap & BIT9) ? 1 : 0;
1331
1332 #ifdef CONFIG_BEAMFORMING
1333 phl_com->role_sw_cap.bf_cap = 0;
1334 phl_com->role_sw_cap.bf_cap |= (rtw_beamform_cap & BIT0) ? HW_CAP_BFER_VHT_SU : 0;
1335 phl_com->role_sw_cap.bf_cap |= (rtw_beamform_cap & BIT1) ? HW_CAP_BFEE_VHT_SU: 0;
1336 phl_com->role_sw_cap.bf_cap |= (rtw_beamform_cap & BIT2) ? HW_CAP_BFER_VHT_MU: 0;
1337 phl_com->role_sw_cap.bf_cap |= (rtw_beamform_cap & BIT3) ? HW_CAP_BFEE_VHT_MU: 0;
1338 phl_com->role_sw_cap.bf_cap |= (rtw_beamform_cap & BIT4) ? HW_CAP_BFER_HT_SU: 0;
1339 phl_com->role_sw_cap.bf_cap |= (rtw_beamform_cap & BIT5) ? HW_CAP_BFEE_HT_SU: 0;
1340 phl_com->role_sw_cap.bf_cap |= (rtw_beamform_cap & BIT6) ? HW_CAP_BFER_HE_SU: 0;
1341 phl_com->role_sw_cap.bf_cap |= (rtw_beamform_cap & BIT7) ? HW_CAP_BFEE_HE_SU: 0;
1342 phl_com->role_sw_cap.bf_cap |= (rtw_beamform_cap & BIT8) ? HW_CAP_BFER_HE_MU: 0;
1343 phl_com->role_sw_cap.bf_cap |= (rtw_beamform_cap & BIT9) ? HW_CAP_BFEE_HE_MU: 0;
1344
1345 /*Band0*/
1346 phl_com->proto_sw_cap[0].vht_su_bfmr = (rtw_sw_proto_bf_cap_phy0 & BIT0) ? 1 : 0;
1347 phl_com->proto_sw_cap[0].vht_su_bfme = (rtw_sw_proto_bf_cap_phy0 & BIT1) ? 1 : 0;
1348 phl_com->proto_sw_cap[0].vht_mu_bfmr = (rtw_sw_proto_bf_cap_phy0 & BIT2) ? 1 : 0;
1349 phl_com->proto_sw_cap[0].vht_mu_bfme = (rtw_sw_proto_bf_cap_phy0 & BIT3) ? 1 : 0;
1350 phl_com->proto_sw_cap[0].ht_su_bfmr = (rtw_sw_proto_bf_cap_phy0 & BIT4) ? 1 : 0;
1351 phl_com->proto_sw_cap[0].ht_su_bfme = (rtw_sw_proto_bf_cap_phy0 & BIT5) ? 1 : 0;
1352 phl_com->proto_sw_cap[0].he_su_bfmr = (rtw_sw_proto_bf_cap_phy0 & BIT6) ? 1 : 0;
1353 phl_com->proto_sw_cap[0].he_su_bfme = (rtw_sw_proto_bf_cap_phy0 & BIT7) ? 1 : 0;
1354 phl_com->proto_sw_cap[0].he_mu_bfmr = (rtw_sw_proto_bf_cap_phy0 & BIT8) ? 1 : 0;
1355 phl_com->proto_sw_cap[0].he_mu_bfme = (rtw_sw_proto_bf_cap_phy0 & BIT9) ? 1 : 0;
1356
1357 /*Band1*/
1358 phl_com->proto_sw_cap[1].vht_su_bfmr = (rtw_sw_proto_bf_cap_phy1 & BIT0) ? 1 : 0;
1359 phl_com->proto_sw_cap[1].vht_su_bfme = (rtw_sw_proto_bf_cap_phy1 & BIT1) ? 1 : 0;
1360 phl_com->proto_sw_cap[1].vht_mu_bfmr = (rtw_sw_proto_bf_cap_phy1 & BIT2) ? 1 : 0;
1361 phl_com->proto_sw_cap[1].vht_mu_bfme = (rtw_sw_proto_bf_cap_phy1 & BIT3) ? 1 : 0;
1362 phl_com->proto_sw_cap[1].ht_su_bfmr = (rtw_sw_proto_bf_cap_phy1 & BIT4) ? 1 : 0;
1363 phl_com->proto_sw_cap[1].ht_su_bfme = (rtw_sw_proto_bf_cap_phy1 & BIT5) ? 1 : 0;
1364 phl_com->proto_sw_cap[1].he_su_bfmr = (rtw_sw_proto_bf_cap_phy1 & BIT6) ? 1 : 0;
1365 phl_com->proto_sw_cap[1].he_su_bfme = (rtw_sw_proto_bf_cap_phy1 & BIT7) ? 1 : 0;
1366 phl_com->proto_sw_cap[1].he_mu_bfmr = (rtw_sw_proto_bf_cap_phy1 & BIT8) ? 1 : 0;
1367 phl_com->proto_sw_cap[1].he_mu_bfme = (rtw_sw_proto_bf_cap_phy1 & BIT9) ? 1 : 0;
1368 #endif
1369
1370 #if CONFIG_TXPWR_LIMIT
1371 if (rtw_tx_pwr_lmt_enable == 2)
1372 phl_com->dev_sw_cap.pwrlmt_type = RTW_PWLMT_BY_EFUSE;
1373 else if (rtw_tx_pwr_lmt_enable == 1)
1374 phl_com->dev_sw_cap.pwrlmt_type = RTW_PWBYRATE_AND_PWLMT;
1375 else if (rtw_tx_pwr_lmt_enable == 0)
1376 phl_com->dev_sw_cap.pwrlmt_type = RTW_PWLMT_DISABLE;
1377 #else
1378 phl_com->dev_sw_cap.pwrlmt_type = RTW_PWLMT_DISABLE;
1379 #endif
1380
1381 if (rtw_tx_pwr_by_rate == 1)
1382 phl_com->dev_sw_cap.pwrbyrate_off = RTW_PW_BY_RATE_ON;
1383 else if (rtw_tx_pwr_by_rate == 0)
1384 phl_com->dev_sw_cap.pwrbyrate_off = RTW_PW_BY_RATE_ALL_SAME;
1385 else
1386 phl_com->dev_sw_cap.pwrbyrate_off = RTW_PW_BY_RATE_ON;
1387
1388 /* If rf_board_opt is not assigned to specific value, it must be set to 0xFF as default. */
1389 phl_com->dev_sw_cap.rf_board_opt = 0xFF;
1390
1391 #ifdef CONFIG_POWER_SAVE
1392 #ifdef CONFIG_RTW_IPS
1393 phl_com->dev_sw_cap.ps_cap.ips_en = rtw_ips_mode;
1394 #endif
1395 #ifdef CONFIG_RTW_LPS
1396 phl_com->dev_sw_cap.ps_cap.lps_en = rtw_lps_mode;
1397 phl_com->dev_sw_cap.ps_cap.lps_cap = rtw_lps_cap;
1398 #endif
1399 phl_com->dev_sw_cap.ps_cap.lps_wow_en = PS_OP_MODE_FORCE_ENABLED;
1400 phl_com->dev_sw_cap.ps_cap.lps_wow_cap =
1401 PS_CAP_PWRON | PS_CAP_RF_OFF | PS_CAP_CLK_GATED | PS_CAP_PWR_GATED;
1402 #endif /* CONFIG_POWER_SAVE */
1403
1404 #ifdef CONFIG_RTW_LED
1405 rtw_phl_led_set_ctrl_mode(GET_PHL_INFO(dvobj), 0, RTW_LED_CTRL_HW_TX_MODE);
1406 #endif
1407
1408 #if defined (CONFIG_RPQ_AGG_NUM) && (CONFIG_RPQ_AGG_NUM > 0)
1409 phl_com->dev_sw_cap.rpq_agg_num = CONFIG_RPQ_AGG_NUM;
1410 #else
1411 phl_com->dev_sw_cap.rpq_agg_num = 0; /* MAC default num: 121 for all IC */
1412 #endif
1413 }
1414
rtw_load_dvobj_registry(struct dvobj_priv * dvobj)1415 u8 rtw_load_dvobj_registry(struct dvobj_priv *dvobj)
1416 {
1417 /*struct rtw_phl_com_t *phl_com = GET_PHL_COM(dvobj);*/
1418 #ifdef CONFIG_CONCURRENT_MODE
1419 dvobj->virtual_iface_num = (u8)rtw_virtual_iface_num;
1420 #endif
1421 return _SUCCESS;
1422 }
rtw_load_registry(_adapter * padapter)1423 uint rtw_load_registry(_adapter *padapter)
1424 {
1425 uint status = _SUCCESS;
1426 struct registry_priv *registry_par = &padapter->registrypriv;
1427
1428
1429 #ifdef CONFIG_RTW_DEBUG
1430 if (rtw_drv_log_level >= _DRV_MAX_)
1431 rtw_drv_log_level = _DRV_DEBUG_;
1432 #endif
1433
1434 registry_par->chip_version = (u8)rtw_chip_version;
1435 registry_par->rfintfs = (u8)rtw_rfintfs;
1436 registry_par->lbkmode = (u8)rtw_lbkmode;
1437 /* registry_par->hci = (u8)hci; */
1438 registry_par->network_mode = (u8)rtw_network_mode;
1439
1440 _rtw_memcpy(registry_par->ssid.Ssid, "ANY", 3);
1441 registry_par->ssid.SsidLength = 3;
1442
1443 registry_par->channel = (u8)rtw_channel;
1444 #ifdef CONFIG_NARROWBAND_SUPPORTING
1445 if (rtw_nb_config != RTW_NB_CONFIG_NONE)
1446 rtw_wireless_mode &= ~WIRELESS_11B;
1447 #endif
1448 registry_par->wireless_mode = (u8)rtw_wireless_mode;
1449 registry_par->band_type = (u8)rtw_band_type;
1450
1451 if (is_supported_24g(registry_par->band_type) && (!is_supported_5g(registry_par->band_type))
1452 && (registry_par->channel > 14))
1453 registry_par->channel = 1;
1454 else if (is_supported_5g(registry_par->band_type) && (!is_supported_24g(registry_par->band_type))
1455 && (registry_par->channel <= 14))
1456 registry_par->channel = 36;
1457
1458 registry_par->adaptivity_en = (u8)rtw_adaptivity_en;
1459 registry_par->adaptivity_mode = (u8)rtw_adaptivity_mode;
1460 registry_par->adaptivity_th_l2h_ini = (s8)rtw_adaptivity_th_l2h_ini;
1461 registry_par->adaptivity_th_edcca_hl_diff = (s8)rtw_adaptivity_th_edcca_hl_diff;
1462 registry_par->adaptivity_idle_probability = (u8)rtw_adaptivity_idle_probability;
1463
1464 if (registry_par->adaptivity_idle_probability == 1) {
1465 rtw_vrtl_carrier_sense = DISABLE_VCS;
1466 rtw_vcs_type = NONE_VCS;
1467 rtw_hw_rts_en = 0;
1468 }
1469
1470 registry_par->vrtl_carrier_sense = (u8)rtw_vrtl_carrier_sense ;
1471 registry_par->vcs_type = (u8)rtw_vcs_type;
1472 registry_par->rts_thresh = (u16)rtw_rts_thresh;
1473 registry_par->hw_rts_en = (u8)rtw_hw_rts_en;
1474 registry_par->frag_thresh = (u16)rtw_frag_thresh;
1475 registry_par->preamble = (u8)rtw_preamble;
1476 registry_par->scan_mode = (u8)rtw_scan_mode;
1477 registry_par->smart_ps = (u8)rtw_smart_ps;
1478 registry_par->check_fw_ps = (u8)rtw_check_fw_ps;
1479 #ifdef CONFIG_TDMADIG
1480 registry_par->tdmadig_en = (u8)rtw_tdmadig_en;
1481 registry_par->tdmadig_mode = (u8)rtw_tdmadig_mode;
1482 registry_par->tdmadig_dynamic = (u8) rtw_dynamic_tdmadig;
1483 registry_par->power_mgnt = PM_PS_MODE_ACTIVE;
1484 registry_par->ips_mode = IPS_NONE;
1485 #else
1486 registry_par->power_mgnt = (u8)rtw_power_mgnt;
1487 registry_par->ips_mode = (u8)rtw_ips_mode;
1488 #endif/*CONFIG_TDMADIG*/
1489 registry_par->lps_level = (u8)rtw_lps_level;
1490 registry_par->en_dyn_rrsr = (u8)rtw_en_dyn_rrsr;
1491 registry_par->set_rrsr_value = (u32)rtw_rrsr_value;
1492 #ifdef CONFIG_LPS_1T1R
1493 registry_par->lps_1t1r = (u8)(rtw_lps_1t1r ? 1 : 0);
1494 #endif
1495 registry_par->lps_chk_by_tp = (u8)rtw_lps_chk_by_tp;
1496 #ifdef CONFIG_WOWLAN
1497 registry_par->wow_power_mgnt = (u8)rtw_wow_power_mgnt;
1498 registry_par->wow_lps_level = (u8)rtw_wow_lps_level;
1499 #ifdef CONFIG_LPS_1T1R
1500 registry_par->wow_lps_1t1r = (u8)(rtw_wow_lps_1t1r ? 1 : 0);
1501 #endif
1502 #endif /* CONFIG_WOWLAN */
1503 registry_par->radio_enable = (u8)rtw_radio_enable;
1504 registry_par->long_retry_lmt = (u8)rtw_long_retry_lmt;
1505 registry_par->short_retry_lmt = (u8)rtw_short_retry_lmt;
1506 registry_par->busy_thresh = (u16)rtw_busy_thresh;
1507 registry_par->max_bss_cnt = (u16)rtw_max_bss_cnt;
1508 /* registry_par->qos_enable = (u8)rtw_qos_enable; */
1509 registry_par->ack_policy = (u8)rtw_ack_policy;
1510 registry_par->mp_mode = (u8)rtw_mp_mode;
1511 #if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTW_CUSTOMER_STR)
1512 registry_par->mp_customer_str = (u8)rtw_mp_customer_str;
1513 #endif
1514 registry_par->software_encrypt = (u8)rtw_software_encrypt;
1515 registry_par->software_decrypt = (u8)rtw_software_decrypt;
1516
1517 registry_par->acm_method = (u8)rtw_acm_method;
1518 registry_par->usb_rxagg_mode = (u8)rtw_usb_rxagg_mode;
1519 registry_par->dynamic_agg_enable = (u8)rtw_dynamic_agg_enable;
1520
1521 /* WMM */
1522 registry_par->wmm_enable = (u8)rtw_wmm_enable;
1523
1524 #ifdef CONFIG_WMMPS_STA
1525 /* UAPSD */
1526 registry_par->uapsd_max_sp_len= (u8)rtw_uapsd_max_sp;
1527 registry_par->uapsd_ac_enable = (u8)rtw_uapsd_ac_enable;
1528 registry_par->wmm_smart_ps = (u8)rtw_wmm_smart_ps;
1529 #endif /* CONFIG_WMMPS_STA */
1530
1531 registry_par->RegPwrTrimEnable = (u8)rtw_pwrtrim_enable;
1532
1533 registry_par->tx_bw_mode = (u8)rtw_tx_bw_mode;
1534
1535 #ifdef CONFIG_80211N_HT
1536 registry_par->ht_enable = (u8)rtw_ht_enable;
1537 if (registry_par->ht_enable && is_supported_ht(registry_par->wireless_mode)) {
1538 #ifdef CONFIG_NARROWBAND_SUPPORTING
1539 if (rtw_nb_config != RTW_NB_CONFIG_NONE)
1540 rtw_bw_mode = 0;
1541 #endif
1542 registry_par->bw_mode = (u8)rtw_bw_mode;
1543 registry_par->ampdu_enable = (u8)rtw_ampdu_enable;
1544 registry_par->rx_ampdu_amsdu = (u8)rtw_rx_ampdu_amsdu;
1545 #ifdef CONFIG_DISBALE_RX_AMSDU_FOR_BUS_LOW_SPEED
1546 #ifdef CONFIG_USB_HCI
1547 if (dvobj_to_usb(adapter_to_dvobj(padapter))->usb_speed < RTW_USB_SPEED_SUPER)
1548 registry_par->rx_ampdu_amsdu = 0;
1549 #endif
1550 #endif
1551 registry_par->tx_ampdu_amsdu = (u8)rtw_tx_ampdu_amsdu;
1552 registry_par->tx_quick_addba_req = (u8)rtw_quick_addba_req;
1553 registry_par->short_gi = (u8)rtw_short_gi;
1554 registry_par->ldpc_cap = (u8)rtw_ldpc_cap;
1555
1556 #ifdef CONFIG_RTW_TX_NPATH_EN
1557 registry_par->tx_npath = (u8)rtw_tx_npath_enable;
1558 #endif
1559 #ifdef CONFIG_RTW_PATH_DIV
1560 registry_par->path_div = (u8)rtw_path_div_enable;
1561 #endif
1562 registry_par->stbc_cap = (u16)rtw_stbc_cap;
1563 #ifdef CONFIG_BEAMFORMING
1564 registry_par->beamform_cap = (u8)rtw_beamform_cap;
1565 registry_par->dyn_txbf = (u8)rtw_dyn_txbf;
1566 registry_par->beamformer_rf_num = (u8)rtw_bfer_rf_number;
1567 registry_par->beamformee_rf_num = (u8)rtw_bfee_rf_number;
1568 #endif
1569 rtw_regsty_init_rx_ampdu_sz_limit(registry_par);
1570 }
1571 #endif
1572
1573 #if 0
1574 int rtw_short_gi = 0xf;
1575 /* BIT0: Enable VHT LDPC Rx, BIT1: Enable VHT LDPC Tx, BIT4: Enable HT LDPC Rx, BIT5: Enable HT LDPC Tx */
1576 int rtw_ldpc_cap = 0x33;
1577 /* BIT0: Enable VHT STBC Rx, BIT1: Enable VHT STBC Tx, BIT4: Enable HT STBC Rx, BIT5: Enable HT STBC Tx */
1578 int rtw_stbc_cap = 0x13;
1579 #endif
1580
1581 #ifdef DBG_LA_MODE
1582 registry_par->la_mode_en = (u8)rtw_la_mode_en;
1583 #endif
1584 #ifdef CONFIG_NARROWBAND_SUPPORTING
1585 registry_par->rtw_nb_config = (u8)rtw_nb_config;
1586 #endif
1587
1588 #ifdef CONFIG_80211AC_VHT
1589 registry_par->vht_enable = (u8)rtw_vht_enable;
1590 registry_par->vht_24g_enable = (u8)rtw_vht_24g_enable;
1591 registry_par->ampdu_factor = (u8)rtw_ampdu_factor;
1592 registry_par->vht_rx_mcs_map[0] = (u8)(rtw_vht_rx_mcs_map & 0xFF);
1593 registry_par->vht_rx_mcs_map[1] = (u8)((rtw_vht_rx_mcs_map & 0xFF00) >> 8);
1594 #endif
1595
1596 #ifdef CONFIG_80211AX_HE
1597 registry_par->he_enable = (u8)rtw_he_enable;
1598 #endif
1599
1600 #ifdef CONFIG_TX_EARLY_MODE
1601 registry_par->early_mode = (u8)rtw_early_mode;
1602 #endif
1603 registry_par->lowrate_two_xmit = (u8)rtw_lowrate_two_xmit;
1604 registry_par->rf_path = (u8)rtw_rf_path; /*rf_config/rtw_rf_config*/
1605 registry_par->tx_nss = (u8)rtw_tx_nss;
1606 registry_par->rx_nss = (u8)rtw_rx_nss;
1607 registry_par->low_power = (u8)rtw_low_power;
1608
1609 registry_par->check_hw_status = (u8)rtw_check_hw_status;
1610
1611 registry_par->wifi_spec = (u8)rtw_wifi_spec;
1612
1613 #ifdef CONFIG_REGD_SRC_FROM_OS
1614 if (regd_src_is_valid(rtw_regd_src))
1615 registry_par->regd_src = (u8)rtw_regd_src;
1616 else {
1617 RTW_WARN("%s invalid rtw_regd_src(%u), use REGD_SRC_RTK_PRIV instead\n", __func__, rtw_regd_src);
1618 registry_par->regd_src = REGD_SRC_RTK_PRIV;
1619 }
1620 #endif
1621
1622 rtw_regsty_load_alpha2(registry_par);
1623 rtw_regsty_load_chplan(registry_par);
1624 rtw_regsty_load_excl_chs(registry_par);
1625 #ifdef CONFIG_80211D
1626 rtw_regsty_load_country_ie_slave_settings(registry_par);
1627 #endif
1628
1629 registry_par->full_ch_in_p2p_handshake = (u8)rtw_full_ch_in_p2p_handshake;
1630 #ifdef CONFIG_BTC
1631 registry_par->btcoex = (u8)rtw_btcoex_enable;
1632 registry_par->bt_iso = (u8)rtw_bt_iso;
1633 registry_par->bt_sco = (u8)rtw_bt_sco;
1634 registry_par->bt_ampdu = (u8)rtw_bt_ampdu;
1635 registry_par->ant_num = (u8)rtw_ant_num;
1636 registry_par->single_ant_path = (u8) rtw_single_ant_path;
1637 #endif
1638
1639 registry_par->bAcceptAddbaReq = (u8)rtw_AcceptAddbaReq;
1640
1641 registry_par->antdiv_cfg = (u8)rtw_antdiv_cfg;
1642 registry_par->antdiv_type = (u8)rtw_antdiv_type;
1643
1644 registry_par->drv_ant_band_switch = (u8) rtw_drv_ant_band_switch;
1645
1646 registry_par->switch_usb_mode = (u8)rtw_switch_usb_mode;
1647
1648 registry_par->hw_wps_pbc = (u8)rtw_hw_wps_pbc;
1649
1650 #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE
1651 snprintf(registry_par->adaptor_info_caching_file_path, PATH_LENGTH_MAX, "%s", rtw_adaptor_info_caching_file_path);
1652 registry_par->adaptor_info_caching_file_path[PATH_LENGTH_MAX - 1] = 0;
1653 #endif
1654
1655 #ifdef CONFIG_LAYER2_ROAMING
1656 registry_par->max_roaming_times = (u8)rtw_max_roaming_times;
1657 #endif
1658
1659 snprintf(registry_par->ifname, 16, "%s", ifname);
1660 snprintf(registry_par->if2name, 16, "%s", if2name);
1661
1662 #if defined(CONFIG_CONCURRENT_MODE) && !RTW_P2P_GROUP_INTERFACE
1663 #ifdef CONFIG_P2P
1664 if (CONFIG_RTW_STATIC_NDEV_NUM <= rtw_sel_p2p_iface) {
1665 RTW_ERR("rtw_sel_p2p_iface out of range\n");
1666 rtw_sel_p2p_iface = CONFIG_RTW_STATIC_NDEV_NUM - 1;
1667 }
1668
1669 registry_par->sel_p2p_iface = (u8)rtw_sel_p2p_iface;
1670 RTW_INFO("%s, Select P2P interface: iface_id:%d\n", __func__, registry_par->sel_p2p_iface);
1671 #endif
1672 #endif
1673
1674 #ifdef CONFIG_IGNORE_GO_AND_LOW_RSSI_IN_SCAN_LIST
1675 registry_par->ignore_go_in_scan = (u8)rtw_ignore_go_in_scan;
1676 registry_par->ignore_low_rssi_in_scan = rtw_ignore_low_rssi_in_scan;
1677 #endif /*CONFIG_IGNORE_GO_AND_LOW_RSSI_IN_SCAN_LIST*/
1678 registry_par->vo_edca = rtw_vo_edca;
1679
1680 registry_par->pll_ref_clk_sel = (u8)rtw_pll_ref_clk_sel;
1681
1682 rtw_regsty_load_target_tx_power(registry_par);
1683
1684 registry_par->TxBBSwing_2G = (s8)rtw_TxBBSwing_2G;
1685 registry_par->TxBBSwing_5G = (s8)rtw_TxBBSwing_5G;
1686 registry_par->bEn_RFE = 1;
1687 registry_par->RFE_Type = (u8)rtw_rfe_type;
1688 registry_par->PowerTracking_Type = (u8)rtw_powertracking_type;
1689 registry_par->AmplifierType_2G = (u8)rtw_amplifier_type_2g;
1690 registry_par->AmplifierType_5G = (u8)rtw_amplifier_type_5g;
1691 registry_par->GLNA_Type = (u8)rtw_GLNA_type;
1692 #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
1693 registry_par->load_phy_file = (u8)rtw_load_phy_file;
1694 registry_par->RegDecryptCustomFile = (u8)rtw_decrypt_phy_file;
1695 #endif
1696 registry_par->qos_opt_enable = (u8)rtw_qos_opt_enable;
1697
1698 registry_par->hiq_filter = (u8)rtw_hiq_filter;
1699
1700 registry_par->boffefusemask = (u8)rtw_OffEfuseMask;
1701 registry_par->bFileMaskEfuse = (u8)rtw_FileMaskEfuse;
1702 registry_par->bBTFileMaskEfuse = (u8)rtw_FileMaskEfuse;
1703
1704 #ifdef CONFIG_RTW_ACS
1705 registry_par->acs_mode = (u8)rtw_acs;
1706 registry_par->acs_auto_scan = (u8)rtw_acs_auto_scan;
1707 #endif
1708
1709 registry_par->reg_rxgain_offset_2g = (u32) rtw_rxgain_offset_2g;
1710 registry_par->reg_rxgain_offset_5gl = (u32) rtw_rxgain_offset_5gl;
1711 registry_par->reg_rxgain_offset_5gm = (u32) rtw_rxgain_offset_5gm;
1712 registry_par->reg_rxgain_offset_5gh = (u32) rtw_rxgain_offset_5gh;
1713
1714 #ifdef CONFIG_DFS_MASTER
1715 registry_par->dfs_region_domain = (u8)rtw_dfs_region_domain;
1716 if (registry_par->dfs_region_domain != RTW_DFS_REGD_NONE) {
1717 RTW_WARN("%s force disable radar detection capability for now\n", __func__);
1718 registry_par->dfs_region_domain = RTW_DFS_REGD_NONE;
1719 }
1720 #ifdef CONFIG_REGD_SRC_FROM_OS
1721 if (rtw_regd_src == REGD_SRC_OS && registry_par->dfs_region_domain != RTW_DFS_REGD_NONE) {
1722 RTW_WARN("%s force disable radar detection capability when regd_src is OS\n", __func__);
1723 registry_par->dfs_region_domain = RTW_DFS_REGD_NONE;
1724 }
1725 #endif
1726 #endif
1727
1728 #ifdef CONFIG_WOWLAN
1729 registry_par->wowlan_enable = rtw_wow_enable;
1730 registry_par->wakeup_event = rtw_wakeup_event;
1731 registry_par->suspend_type = rtw_suspend_type;
1732 #endif
1733
1734 registry_par->wowlan_sta_mix_mode = rtw_wowlan_sta_mix_mode;
1735
1736 #ifdef CONFIG_PCI_HCI
1737 registry_par->pci_aspm_config = rtw_pci_aspm_enable;
1738 registry_par->pci_dynamic_aspm_linkctrl = rtw_pci_dynamic_aspm_linkctrl;
1739 #endif
1740
1741 #ifdef CONFIG_RTW_NAPI
1742 registry_par->en_napi = (u8)rtw_en_napi;
1743 #ifdef CONFIG_RTW_NAPI_DYNAMIC
1744 registry_par->napi_threshold = (u32)rtw_napi_threshold;
1745 #endif /* CONFIG_RTW_NAPI_DYNAMIC */
1746 #ifdef CONFIG_RTW_GRO
1747 registry_par->en_gro = (u8)rtw_en_gro;
1748 if (!registry_par->en_napi && registry_par->en_gro) {
1749 registry_par->en_gro = 0;
1750 RTW_WARN("Disable GRO because NAPI is not enabled\n");
1751 }
1752 #endif /* CONFIG_RTW_GRO */
1753 #endif /* CONFIG_RTW_NAPI */
1754
1755 registry_par->iqk_fw_offload = (u8)rtw_iqk_fw_offload;
1756 registry_par->ch_switch_offload = (u8)rtw_ch_switch_offload;
1757
1758 #ifdef CONFIG_TDLS
1759 registry_par->en_tdls = rtw_en_tdls;
1760 #endif
1761
1762
1763 #ifdef CONFIG_FW_OFFLOAD_PARAM_INIT
1764 registry_par->fw_param_init = rtw_fw_param_init;
1765 #endif
1766 #ifdef CONFIG_AP_MODE
1767 registry_par->bmc_tx_rate = rtw_bmc_tx_rate;
1768 #if CONFIG_RTW_AP_DATA_BMC_TO_UC
1769 registry_par->ap_src_b2u_flags = rtw_ap_src_b2u_flags;
1770 registry_par->ap_fwd_b2u_flags = rtw_ap_fwd_b2u_flags;
1771 #endif
1772 #endif /* CONFIG_AP_MODE */
1773
1774 #ifdef CONFIG_RTW_MESH
1775 #if CONFIG_RTW_MESH_DATA_BMC_TO_UC
1776 registry_par->msrc_b2u_flags = rtw_msrc_b2u_flags;
1777 registry_par->mfwd_b2u_flags = rtw_mfwd_b2u_flags;
1778 #endif
1779 #endif /* CONFIG_RTW_MESH */
1780
1781 registry_par->phydm_ability = rtw_phydm_ability;
1782 registry_par->halrf_ability = rtw_halrf_ability;
1783 #ifdef CONFIG_RTW_MESH
1784 registry_par->peer_alive_based_preq = rtw_peer_alive_based_preq;
1785 #endif
1786
1787 #ifdef RTW_BUSY_DENY_SCAN
1788 registry_par->scan_interval_thr = rtw_scan_interval_thr;
1789 #endif
1790
1791 #ifdef CONFIG_RTW_MULTI_AP
1792 rtw_regsty_init_unassoc_sta_param(registry_par);
1793 #endif
1794
1795 #ifdef CONFIG_IOCTL_CFG80211
1796 registry_par->roch_min_home_dur = (u16)rtw_roch_min_home_dur;
1797 registry_par->roch_max_away_dur = (u16)rtw_roch_max_away_dur;
1798 registry_par->roch_extend_dur = (u16)rtw_roch_extend_dur;
1799 #endif
1800
1801 #if defined(ROKU_PRIVATE) && defined(CONFIG_P2P)
1802 registry_par->go_hidden_ssid_mode = rtw_go_hidden_ssid_mode;
1803 ATOMIC_SET(®istry_par->set_hide_ssid_timer, 0);
1804 #endif
1805 registry_par->amsdu_mode = (u8)rtw_amsdu_mode;
1806 registry_par->scan_pch_ex_time = (u16)rtw_scan_pch_ex;
1807 return status;
1808 }
1809
rtw_cfg_adaptivity_en_msg(void * sel,_adapter * adapter)1810 static void rtw_cfg_adaptivity_en_msg(void *sel, _adapter *adapter)
1811 {
1812 struct registry_priv *regsty = &adapter->registrypriv;
1813
1814 RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_EN_");
1815
1816 if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_DISABLE)
1817 _RTW_PRINT_SEL(sel, "DISABLE\n");
1818 else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE)
1819 _RTW_PRINT_SEL(sel, "ENABLE\n");
1820 else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_AUTO)
1821 _RTW_PRINT_SEL(sel, "AUTO\n");
1822 else
1823 _RTW_PRINT_SEL(sel, "INVALID\n");
1824 }
1825
rtw_cfg_adaptivity_mode_msg(void * sel,_adapter * adapter)1826 static void rtw_cfg_adaptivity_mode_msg(void *sel, _adapter *adapter)
1827 {
1828 struct registry_priv *regsty = &adapter->registrypriv;
1829
1830 if (regsty->adaptivity_en != RTW_ADAPTIVITY_EN_ENABLE)
1831 return;
1832
1833 RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_MODE_");
1834
1835 if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_NORMAL)
1836 _RTW_PRINT_SEL(sel, "NORMAL\n");
1837 else if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_CARRIER_SENSE)
1838 _RTW_PRINT_SEL(sel, "CARRIER_SENSE\n");
1839 else
1840 _RTW_PRINT_SEL(sel, "INVALID\n");
1841 }
1842
rtw_cfg_adaptivity_config_msg(void * sel,_adapter * adapter)1843 void rtw_cfg_adaptivity_config_msg(void *sel, _adapter *adapter)
1844 {
1845 struct registry_priv *regsty = &adapter->registrypriv;
1846 rtw_cfg_adaptivity_en_msg(sel, adapter);
1847 rtw_cfg_adaptivity_mode_msg(sel, adapter);
1848 _RTW_PRINT_SEL(sel, "adaptivity_idle_probability = %u\n", regsty->adaptivity_idle_probability);
1849 }
1850
rtw_cfg_adaptivity_needed(_adapter * adapter)1851 bool rtw_cfg_adaptivity_needed(_adapter *adapter)
1852 {
1853 struct registry_priv *regsty = &adapter->registrypriv;
1854 bool ret = _FALSE;
1855
1856 if (regsty->adaptivity_en)
1857 ret = _TRUE;
1858
1859 return ret;
1860 }
1861
1862