1 /****************************************************************************** 2 * 3 * Copyright(c) 2019 - 2021 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 *****************************************************************************/ 15 #ifndef _PHL_STRUCT_H_ 16 #define _PHL_STRUCT_H_ 17 #define PHL_MACID_MAX_ARRAY_NUM 8 /* 8x32=256 */ 18 #define PHL_MACID_MAX_NUM (PHL_MACID_MAX_ARRAY_NUM * 32) 19 20 #define PHL_STA_TID_NUM (16) /* TODO: */ 21 22 struct hci_info_t { 23 /* enum rtw_hci_type hci_type; */ 24 25 #if defined(CONFIG_PCI_HCI) 26 27 u8 total_txch_num; 28 u8 total_rxch_num; 29 u8 *txbd_buf; 30 u8 *rxbd_buf; 31 #if defined(PCIE_TRX_MIT_EN) 32 u8 fixed_mitigation; /*no watchdog dynamic setting*/ 33 #endif 34 void *wd_dma_pool; 35 #elif defined(CONFIG_USB_HCI) 36 u16 usb_bulkout_size; 37 #elif defined(CONFIG_SDIO_HCI) 38 u32 tx_drop_cnt; /* bit31 means overflow or not */ 39 #ifdef SDIO_TX_THREAD 40 _os_sema tx_thrd_sema; 41 _os_thread tx_thrd; 42 #endif /* SDIO_TX_THREAD */ 43 #endif 44 45 u8 *wd_ring; 46 u8 *txbuf_pool; 47 u8 *rxbuf_pool; 48 u8 *wp_tag; 49 u16 wp_seq[PHL_MACID_MAX_NUM]; /* maximum macid number */ 50 51 }; 52 53 #if defined(CONFIG_PCI_HCI) 54 enum rx_channel_type { 55 RX_CH = 0, 56 RP_CH = 1, 57 RX_CH_TYPE_MAX = 0xFF 58 }; 59 #endif 60 61 62 #define MAX_PHL_RING_STATUS_NUMBER 64 63 #define RX_REORDER_RING_NUMBER PHL_MACID_MAX_NUM 64 #define PCIE_BUS_EFFICIENCY 4 65 #define ETH_ALEN 6 66 67 struct phl_ring_status { 68 _os_list list; 69 u16 macid; 70 u8 band;/*0 or 1*/ 71 u8 wmm;/*0 or 1*/ 72 u8 port; 73 /*u8 mbssid*/ 74 u16 req_busy; 75 struct rtw_phl_tx_ring *ring_ptr; 76 }; 77 78 struct phl_ring_sts_pool { 79 struct phl_ring_status ring_sts[MAX_PHL_RING_STATUS_NUMBER]; 80 _os_list idle; 81 _os_list busy; 82 _os_lock idle_lock; 83 _os_lock busy_lock; 84 }; 85 86 /** 87 * struct phl_hci_trx_ops - interface specific operations 88 * 89 * @hci_trx_init: the function for HCI trx init 90 * @hci_trx_deinit: the function for HCI trx deinit 91 * @prepare_tx: prepare packets for hal transmission 92 * @recycle_rx_buf: recycle rx buffer 93 * @tx: tx packet to hw 94 * @rx: rx packet to sw 95 */ 96 struct phl_info_t; 97 struct phl_hci_trx_ops { 98 enum rtw_phl_status (*hci_trx_init)(struct phl_info_t *phl); 99 void (*hci_trx_deinit)(struct phl_info_t *phl); 100 enum rtw_phl_status (*prepare_tx)(struct phl_info_t *phl, 101 struct rtw_xmit_req *tx_req); 102 enum rtw_phl_status (*recycle_rx_buf)(struct phl_info_t *phl, 103 void *r, u8 ch, enum rtw_rx_type type); 104 enum rtw_phl_status (*tx)(struct phl_info_t *phl); 105 enum rtw_phl_status (*rx)(struct phl_info_t *phl); 106 enum rtw_phl_status (*trx_cfg)(struct phl_info_t *phl); 107 void (*trx_stop)(struct phl_info_t *phl); 108 enum rtw_phl_status (*pltfm_tx)(struct phl_info_t *phl, void *pkt); 109 void (*free_h2c_pkt_buf)(struct phl_info_t *phl_info, 110 struct rtw_h2c_pkt *_h2c_pkt); 111 enum rtw_phl_status (*alloc_h2c_pkt_buf)(struct phl_info_t *phl_info, 112 struct rtw_h2c_pkt *_h2c_pkt, u32 buf_len); 113 void (*trx_reset)(struct phl_info_t *phl, u8 type); 114 void (*trx_resume)(struct phl_info_t *phl, u8 type); 115 void (*req_tx_stop)(struct phl_info_t *phl); 116 void (*req_rx_stop)(struct phl_info_t *phl); 117 bool (*is_tx_pause)(struct phl_info_t *phl); 118 bool (*is_rx_pause)(struct phl_info_t *phl); 119 void *(*get_txbd_buf)(struct phl_info_t *phl); 120 void *(*get_rxbd_buf)(struct phl_info_t *phl); 121 void (*recycle_rx_pkt)(struct phl_info_t *phl, 122 struct rtw_phl_rx_pkt *phl_rx); 123 enum rtw_phl_status (*register_trx_hdlr)(struct phl_info_t *phl); 124 void (*rx_handle_normal)(struct phl_info_t *phl_info, 125 struct rtw_phl_rx_pkt *phl_rx); 126 void (*tx_watchdog)(struct phl_info_t *phl_info); 127 128 #ifdef CONFIG_PCI_HCI 129 enum rtw_phl_status (*recycle_busy_wd)(struct phl_info_t *phl); 130 enum rtw_phl_status (*recycle_busy_h2c)(struct phl_info_t *phl); 131 void (*read_hw_rx)(struct phl_info_t *phl, enum rx_channel_type rx_ch); 132 #endif 133 134 #ifdef CONFIG_USB_HCI 135 enum rtw_phl_status (*pend_rxbuf)(struct phl_info_t *phl, void *rxobj, 136 u32 inbuf_len, u8 status_code); 137 enum rtw_phl_status (*recycle_tx_buf)(void *phl, u8 *tx_buf_ptr); 138 #endif 139 140 #if defined(CONFIG_SDIO_HCI) && defined(CONFIG_PHL_SDIO_READ_RXFF_IN_INT) 141 enum rtw_phl_status (*recv_rxfifo)(struct phl_info_t *phl); 142 #endif 143 }; 144 145 /** 146 * struct phl_tid_ampdu_rx - TID aggregation information (Rx). 147 * 148 * @reorder_buf: buffer to reorder incoming aggregated MPDUs. 149 * @reorder_time: time when frame was added 150 * @sta: station we are attached to 151 * @head_seq_num: head sequence number in reordering buffer. 152 * @stored_mpdu_num: number of MPDUs in reordering buffer 153 * @ssn: Starting Sequence Number expected to be aggregated. 154 * @buf_size: buffer size for incoming A-MPDUs 155 * @timeout: reset timer value (in TUs). 156 * @tid: TID number 157 * @started: this session has started (head ssn or higher was received) 158 */ 159 struct phl_tid_ampdu_rx { 160 struct rtw_phl_rx_pkt **reorder_buf; 161 u32 *reorder_time; 162 struct rtw_phl_stainfo_t *sta; 163 u16 head_seq_num; 164 u16 stored_mpdu_num; 165 u16 ssn; 166 u16 buf_size; 167 u16 tid; 168 u8 started:1, 169 removed:1, 170 sleep:1; 171 172 void *drv_priv; 173 struct phl_info_t *phl_info; 174 }; 175 176 struct macid_ctl_t { 177 _os_lock lock; 178 /* used macid bitmap share for all wifi role */ 179 u32 used_map[PHL_MACID_MAX_ARRAY_NUM]; 180 /* record bmc macid bitmap for all wifi role */ 181 u32 bmc_map[PHL_MACID_MAX_ARRAY_NUM]; 182 /* record used macid bitmap for each wifi role */ 183 u32 wifi_role_usedmap[MAX_WIFI_ROLE_NUMBER][PHL_MACID_MAX_ARRAY_NUM]; 184 /* record bmc TX macid for wifi role */ 185 u16 wrole_bmc[MAX_WIFI_ROLE_NUMBER]; 186 /* record total stainfo by macid */ 187 struct rtw_phl_stainfo_t *sta[PHL_MACID_MAX_NUM]; 188 u16 max_num; 189 }; 190 191 struct stainfo_ctl_t { 192 struct phl_info_t *phl_info; 193 u8 *allocated_stainfo_buf; 194 int allocated_stainfo_sz; 195 u8 *stainfo_buf; 196 struct phl_queue free_sta_queue; 197 }; 198 199 struct phl_h2c_pkt_pool { 200 struct rtw_h2c_pkt *h2c_pkt_buf; 201 struct phl_queue idle_h2c_pkt_cmd_list; 202 struct phl_queue idle_h2c_pkt_data_list; 203 struct phl_queue idle_h2c_pkt_ldata_list; 204 struct phl_queue busy_h2c_pkt_list; 205 _os_lock recycle_lock; 206 }; 207 208 #ifdef CONFIG_RTW_ACS 209 210 #ifndef MAX_CHANNEL_NUM 211 #define MAX_CHANNEL_NUM 42 212 #endif 213 214 struct auto_chan_sel { 215 u8 clm_ratio[MAX_CHANNEL_NUM]; 216 u8 nhm_pwr[MAX_CHANNEL_NUM]; 217 u8 curr_idx; 218 u16 chset[MAX_CHANNEL_NUM]; 219 }; 220 #endif 221 222 223 enum phl_tx_status { 224 PHL_TX_STATUS_IDLE = 0, 225 PHL_TX_STATUS_RUNNING = 1, 226 PHL_TX_STATUS_STOP_INPROGRESS = 2, 227 PHL_TX_STATUS_SW_PAUSE = 3, 228 PHL_TX_STATUS_MAX = 0xFF 229 }; 230 231 enum phl_rx_status { 232 PHL_RX_STATUS_IDLE = 0, 233 PHL_RX_STATUS_RUNNING = 1, 234 PHL_RX_STATUS_STOP_INPROGRESS = 2, 235 PHL_RX_STATUS_SW_PAUSE = 3, 236 PHL_RX_STATUS_MAX = 0xFF 237 }; 238 239 enum data_ctrl_mdl { 240 DATA_CTRL_MDL_NONE = 0, 241 DATA_CTRL_MDL_CMD_CTRLER = BIT0, 242 DATA_CTRL_MDL_SER = BIT1, 243 DATA_CTRL_MDL_PS = BIT2, 244 DATA_CTRL_MDL_MAX = BIT7 245 }; 246 247 enum data_ctrl_err_code { 248 CTRL_ERR_SW_TX_PAUSE_POLLTO = 1, 249 CTRL_ERR_SW_TX_PAUSE_FAIL = 2, 250 CTRL_ERR_SW_TX_RESUME_FAIL = 3, 251 CTRL_ERR_SW_RX_PAUSE_POLLTO = 4, 252 CTRL_ERR_SW_RX_PAUSE_FAIL = 5, 253 CTRL_ERR_SW_RX_RESUME_FAIL = 6, 254 CTRL_ERR_HW_TRX_PAUSE_FAIL = 7, 255 CTRL_ERR_HW_TRX_RESUME_FAIL = 8, 256 CTRL_ERR_MAX = 0xFF 257 }; 258 259 #ifdef CONFIG_POWER_SAVE 260 struct phl_ps_info { 261 bool init; 262 _os_atomic tx_ntfy; 263 }; 264 #endif 265 266 #define PHL_CTRL_TX BIT0 267 #define PHL_CTRL_RX BIT1 268 #define POLL_SW_TX_PAUSE_CNT 100 269 #define POLL_SW_TX_PAUSE_MS 5 270 #define POLL_SW_RX_PAUSE_CNT 100 271 #define POLL_SW_RX_PAUSE_MS 5 272 273 struct phl_info_t { 274 struct macid_ctl_t macid_ctrl; 275 struct stainfo_ctl_t sta_ctrl; 276 277 struct rtw_regulation regulation; 278 279 struct rtw_phl_com_t *phl_com; 280 struct rtw_phl_handler phl_tx_handler; 281 struct rtw_phl_handler phl_rx_handler; 282 struct rtw_phl_handler phl_ser_handler; 283 struct rtw_phl_handler phl_event_handler; 284 struct rtw_phl_rx_ring phl_rx_ring; 285 _os_atomic phl_sw_tx_sts; 286 _os_atomic phl_sw_tx_more; 287 _os_atomic phl_sw_tx_req_pwr; 288 _os_atomic phl_sw_rx_sts; 289 _os_atomic phl_sw_rx_more; 290 _os_atomic phl_sw_rx_req_pwr; 291 _os_atomic is_hw_trx_pause; 292 enum data_ctrl_mdl pause_tx_id; 293 enum data_ctrl_mdl pause_rx_id; 294 _os_lock t_ring_list_lock; 295 _os_lock rx_ring_lock; 296 _os_lock t_fctrl_result_lock; 297 _os_lock t_ring_free_list_lock; 298 _os_list t_ring_list; 299 _os_list t_fctrl_result; 300 _os_list t_ring_free_list; 301 void *ring_sts_pool; 302 void *rx_pkt_pool; 303 struct phl_h2c_pkt_pool *h2c_pool; 304 305 struct hci_info_t *hci; 306 struct phl_hci_trx_ops *hci_trx_ops; 307 308 struct pkt_ofld_obj *pkt_ofld; 309 310 struct phl_cmd_dispatch_engine disp_eng; 311 struct phl_watchdog wdog; 312 void *msg_hub; 313 void *cmd_que; 314 void *hal; 315 316 #ifdef CONFIG_FSM 317 void *fsm_root; 318 void *cmd_fsm; 319 void *cmd_obj; 320 321 void *scan_fsm; 322 void *scan_obj; 323 324 void *ser_fsm; 325 void *ser_obj; 326 327 void *btc_fsm; 328 void *btc_obj; 329 330 void *snd_fsm; 331 #endif /*CONFIG_FSM*/ 332 void *snd_obj; 333 334 void *ps_obj; 335 336 void *led_ctrl; 337 338 void *ecsa_ctrl; 339 void *phl_twt_info; /* struct phl_twt_info */ 340 #ifdef PHL_RX_BATCH_IND 341 u8 rx_new_pending; 342 #endif 343 344 struct phl_wow_info wow_info; 345 346 #ifdef CONFIG_POWER_SAVE 347 struct phl_ps_info ps_info; 348 #endif 349 350 #ifdef CONFIG_RTW_ACS 351 struct auto_chan_sel acs; 352 #endif 353 354 #ifdef CONFIG_PHL_TEST_SUITE 355 void *trx_test; 356 #endif 357 }; 358 359 #define phl_to_drvpriv(_phl) (_phl->phl_com->drv_priv) 360 361 #define phlcom_to_test_mgnt(_phl_com) ((_phl_com)->test_mgnt) 362 #define phlcom_to_mr_ctrl(_phl_com) (&(_phl_com->mr_ctrl)) 363 364 #define phl_to_mr_ctrl(_phl) (&(((struct phl_info_t *)_phl)->phl_com->mr_ctrl)) 365 #define phl_to_mac_ctrl(_phlinfo) (&(_phlinfo->macid_ctrl)) 366 #define phl_to_sta_ctrl(_phlinfo) (&(_phlinfo->sta_ctrl)) 367 368 #define get_band_ctrl(_phl, _band) (&(phl_to_mr_ctrl(_phl)->band_ctrl[_band])) 369 370 #define phl_to_p2pps_info(_phl) (((_phl)->phl_com->p2pps_info)) 371 #define get_role_idx(_wrole) (_wrole->id) 372 373 #endif /*_PHL_STRUCT_H_*/ 374