1 /****************************************************************************** 2 * 3 * Copyright(c) 2020 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 *****************************************************************************/ 15 #ifndef _PHL_REGULATION_DEF_H_ 16 #define _PHL_REGULATION_DEF_H_ 17 18 #define RSVD_DOMAIN 0x1a 19 20 #define MAX_CH_NUM_2GHZ 14 21 22 #define MAX_CH_NUM_BAND1 4 /* 36, 40, 44, 48 */ 23 #define MAX_CH_NUM_BAND2 4 /* 52, 56, 60, 64 */ 24 #define MAX_CH_NUM_BAND3 12 /* 100, 104, 108, 112, 25 116, 120, 124, 128, 26 132, 136, 140, 144 */ 27 #define MAX_CH_NUM_BAND4 8 /* 149, 153, 157, 161, 165, 169, 173, 177 */ 28 #define MAX_CH_NUM_5GHZ (MAX_CH_NUM_BAND1 + MAX_CH_NUM_BAND2 +\ 29 MAX_CH_NUM_BAND3 + MAX_CH_NUM_BAND4) 30 31 #define MAX_CH_NUM_UNII5 24 /* 1 ~ 93 */ 32 #define MAX_CH_NUM_UNII6 6 /* 97 ~ 117 */ 33 #define MAX_CH_NUM_UNII7 18 /* 121 ~ 189 */ 34 #define MAX_CH_NUM_UNII8 12 /* 193 ~ 237 */ 35 #define MAX_CH_NUM_6GHZ (MAX_CH_NUM_UNII5 + MAX_CH_NUM_UNII6 +\ 36 MAX_CH_NUM_UNII7 + MAX_CH_NUM_UNII8) 37 38 39 #define BAND_2GHZ(_band_) ((_band_ == BAND_ON_24G) ? true : false) 40 #define BAND_5GHZ(_band_) ((_band_ == BAND_ON_5G) ? true : false) 41 #define BAND_6GHZ(_band_) ((_band_ == BAND_ON_6G) ? true : false) 42 #define CH_5GHZ_BAND1(_ch_) (((_ch_ >= 36) && (_ch_ <= 48)) ? true : false) 43 #define CH_5GHZ_BAND2(_ch_) (((_ch_ >= 52) && (_ch_ <= 64)) ? true : false) 44 #define CH_5GHZ_BAND3(_ch_) (((_ch_ >= 100) && (_ch_ <= 144)) ? true : false) 45 #define CH_5GHZ_BAND4(_ch_) (((_ch_ >= 149) && (_ch_ <= 177)) ? true : false) 46 47 #define SUPPORT_11A BIT(0) 48 #define SUPPORT_11B BIT(1) 49 #define SUPPORT_11G BIT(2) 50 #define SUPPORT_11N BIT(3) 51 #define SUPPORT_11AC BIT(4) 52 #define SUPPORT_11AX BIT(5) 53 54 enum regulation_rsn { 55 REGU_RSN_DEFAULT = 0x0, 56 REGU_RSN_SMBIOS, 57 REGU_RSN_EFUSE, 58 REGU_RSN_11D, 59 REGU_RSN_REGISTRY, 60 REGU_RSN_LOCATION, 61 REGU_RSN_MANUAL, 62 REGU_RSN_MAX 63 }; 64 65 enum rtw_regulation_capability { 66 CAPABILITY_2GHZ = BIT(0), 67 CAPABILITY_5GHZ = BIT(1), 68 CAPABILITY_DFS = BIT(2), 69 CAPABILITY_6GHZ = BIT(3) 70 }; 71 72 enum rtw_regulation_query { 73 REGULQ_CHPLAN_FULL = 0x0, 74 REGULQ_CHPLAN_2GHZ, 75 REGULQ_CHPLAN_5GHZ_ALL, 76 REGULQ_CHPLAN_5GHZ_BAND1, 77 REGULQ_CHPLAN_5GHZ_BAND2, 78 REGULQ_CHPLAN_5GHZ_BAND3, 79 REGULQ_CHPLAN_5GHZ_BAND4, 80 REGULQ_CHPLAN_6GHZ_UNII5, 81 REGULQ_CHPLAN_6GHZ_UNII6, 82 REGULQ_CHPLAN_6GHZ_UNII7, 83 REGULQ_CHPLAN_6GHZ_UNII8, 84 REGULQ_CHPLAN_6GHZ, 85 REGULQ_CHPLAN_6GHZ_PSC, 86 REGULQ_CHPLAN_2GHZ_5GHZ, 87 }; 88 89 enum ch_property { 90 CH_PASSIVE = BIT(0), /* regulatory passive channel */ 91 CH_DFS = BIT(1), /* 5 ghz DFS channel */ 92 CH_PSC = BIT(2) /* 6 ghz preferred scanning channel */ 93 }; 94 95 struct rtw_regulation_channel { 96 enum band_type band; 97 u8 channel; 98 u8 property; 99 }; 100 101 struct rtw_regulation_chplan { 102 u32 cnt; 103 struct rtw_regulation_channel ch[MAX_CH_NUM_2GHZ + 104 MAX_CH_NUM_5GHZ + 105 MAX_CH_NUM_6GHZ]; 106 }; 107 108 struct rtw_ch { 109 enum band_type band; 110 u8 ch; 111 }; 112 113 struct rtw_chlist { 114 u32 cnt; 115 struct rtw_ch ch[MAX_CH_NUM_2GHZ + 116 MAX_CH_NUM_5GHZ + 117 MAX_CH_NUM_6GHZ]; 118 }; 119 120 struct rtw_regulation_info { 121 u8 domain_code; 122 u8 domain_reason; 123 u8 domain_code_6g; 124 u8 domain_reason_6g; 125 char country[2]; 126 u8 support_mode; 127 u8 regulation_2g; 128 u8 regulation_5g; 129 u8 regulation_6g; 130 u8 tpo; 131 u8 chplan_ver; 132 u8 country_ver; 133 u16 capability; 134 }; 135 136 struct rtw_regulation_country_chplan { 137 u8 domain_code; 138 u8 support_mode; 139 /* 140 * bit0: accept 11a 141 * bit1: accept 11b 142 * bit2: accept 11g 143 * bit3: accept 11n 144 * bit4: accept 11ac 145 * bit5: accept 11ax 146 */ 147 u8 tpo; /* tx power overwrite */ 148 }; 149 150 struct rtw_user_def_chplan { 151 u16 ch2g; /* bit0 ~ bit13 : ch1~ch14 */ 152 u16 passive2g; /* bit0 ~ bit13 : ch1~ch14, if value = 1, means passive for that channel */ 153 154 /* 5g channels. 155 * bit0~7 : ch 36/40/44/48/52/56/60/64 156 * bit8~15 : ch 100/104/108/112/116/120/124/128 157 * bit16~23 : ch 132/136/140/144/149/153/157/161 158 * bit24~27 : ch 165/169/173/177 159 */ 160 u32 ch5g; 161 u32 passive5g; 162 u32 dfs5g; 163 164 u32 regulatory_idx; 165 u8 tpo; 166 }; 167 168 /* 169 * NOTE: 170 * This api prototype will be removed after hal related API/header is added 171 * for halrf. 172 */ 173 bool rtw_phl_query_regulation_info(void *phl, struct rtw_regulation_info *info); 174 175 #endif /* _PHL_REGULATION_DEF_H_ */ 176