1 /****************************************************************************** 2 * 3 * Copyright(c) 2019 - 2021 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 *****************************************************************************/ 15 #ifndef _PHL_CONFIG_H_ 16 #define _PHL_CONFIG_H_ 17 18 /* Define correspoding PHL Feature based on information from the Core */ 19 #ifdef PHL_PLATFORM_AP 20 #define PHL_FEATURE_AP 21 #elif defined(PHL_PLATFORM_LINUX) || defined(PHL_PLATFORM_WINDOWS) 22 #define PHL_FEATURE_NIC 23 #else 24 #define PHL_FEATURE_NONE 25 #endif 26 27 /******************* PLATFORM Section **************************/ 28 #ifdef PHL_FEATURE_NONE/* enable compile flag for phl only compilation check */ 29 #define CONFIG_DFS 1 30 #define CONFIG_USB_TX_AGGREGATION 31 #define CONFIG_USB_RX_AGGREGATION 32 #define CONFIG_USB_TX_PADDING_CHK 33 #define CONFIG_LOAD_PHY_PARA_FROM_FILE 34 35 #define CONFIG_WOW 36 #define CONFIG_WPA3_SUITEB_SUPPORT 37 #define CONFIG_SYNC_INTERRUPT 38 39 #define CONFIG_MR_SUPPORT 40 #ifdef CONFIG_MR_SUPPORT 41 #define CONFIG_SCC_SUPPORT 42 #define CONFIG_MCC_SUPPORT 43 #ifdef CONFIG_MCC_SUPPORT 44 #define MCC_ROLE_NUM 2 45 #define RTW_WKARD_GO_BT_TS_ADJUST_VIA_NOA 46 #define RTW_WKARD_HALRF_MCC 47 #define RTW_WKARD_TDMRA_AUTO_GET_STAY_ROLE 48 #endif /*CONFIG_MCC_SUPPORT*/ 49 50 #define CONFIG_DBCC_SUPPORT 51 52 #define DBG_PHL_CHAN 53 #define DBG_PHL_MR 54 #define PHL_MR_PROC_CMD 55 #define DBG_CHCTX_RMAP 56 #endif /*CONFIG_MR_SUPPORT*/ 57 58 #define DBG_PHL_MAC_REG_RW 59 60 #define CONFIG_RTW_ACS 61 #define CONFIG_RX_PSTS_PER_PKT 62 63 #define CONFIG_PHL_TXSC 64 #define RTW_PHL_BCN 65 #define CONFIG_PHL_SDIO_RX_NETBUF_ALLOC_IN_PHL 66 #define CONFIG_PHL_TWT 67 #define CONFIG_CMD_DISP 68 #ifdef CONFIG_CMD_DISP 69 #define CONFIG_PHL_ECSA 70 /*#define CONFIG_CMD_DISP_SOLO_MODE*/ 71 #define CONFIG_PHL_CMD_SCAN 72 #define CONFIG_PHL_CMD_SER 73 #define CONFIG_PHL_CMD_BTC 74 #endif 75 #ifdef CONFIG_PCI_HCI 76 #define PCIE_TRX_MIT_EN 77 #endif 78 #define CONFIG_PHL_P2PPS 79 #define CONFIG_6GHZ 80 #define RTW_WKARD_BFEE_SET_AID 81 #define CONFIG_PHL_THERMAL_PROTECT 82 #define CONFIG_PHL_TX_DBG 83 #define CONFIG_PHL_RELEASE_RPT_ENABLE 84 #endif /* PHL_FEATURE_NONE */ 85 86 #ifdef PHL_PLATFORM_WINDOWS 87 #ifndef CONFIG_FSM 88 #define CONFIG_FSM 89 #endif 90 #ifndef CONFIG_CMD_DISP 91 #define CONFIG_CMD_DISP 92 #endif 93 #endif 94 95 #ifdef PHL_PLATFORM_LINUX 96 /* comment out cfg temporarily */ 97 /* 98 #define CONFIG_FSM 99 100 #ifndef CONFIG_FSM 101 #define CONFIG_CMD_DISP 102 #endif 103 */ 104 #endif 105 106 /******************* Feature flags **************************/ 107 108 #ifdef CONFIG_PHL_TEST_SUITE 109 #define CONFIG_PHL_TEST_MP 110 #define CONFIG_PHL_TEST_VERIFY 111 #endif 112 113 #ifdef CONFIG_CORE_SYNC_INTERRUPT 114 #define CONFIG_SYNC_INTERRUPT 115 #endif 116 117 #ifdef CONFIG_WOW 118 #define CONFIG_WOWLAN 119 /* #define RTW_WKARD_WOW_SKIP_AOAC_RPT */ 120 /* #define RTW_WKARD_WOW_SKIP_WOW_CAM_CONFIG */ 121 #define RTW_WKARD_WOW_L2_PWR 122 #define DBG_RST_BDRAM_TIME 123 #endif 124 125 #define DBG_PHY_ON_TIME 126 127 /*CONFIG_IFACE_NUMBER*/ 128 #ifdef CONFIG_IFACE_NUMBER 129 #define MAX_WIFI_ROLE_NUMBER CONFIG_IFACE_NUMBER 130 #else 131 #define MAX_WIFI_ROLE_NUMBER 5 132 #endif 133 134 #ifdef CONFIG_CONCURRENT_MODE 135 #define CONFIG_MR_SUPPORT 136 #endif 137 138 #ifdef CONFIG_REUSED_FWDL_BUF 139 #define CONFIG_PHL_REUSED_FWDL_BUF 140 #endif 141 142 #ifdef CONFIG_MR_SUPPORT 143 #define CONFIG_SCC_SUPPORT 144 #define CONFIG_MCC_SUPPORT 145 #ifdef CONFIG_MCC_SUPPORT 146 #define MCC_ROLE_NUM 2 147 #define RTW_WKARD_GO_BT_TS_ADJUST_VIA_NOA 148 #define RTW_WKARD_HALRF_MCC 149 #define RTW_WKARD_TDMRA_AUTO_GET_STAY_ROLE 150 #endif /*CONFIG_MCC_SUPPORT*/ 151 /*#define CONFIG_DBCC_SUPPORT*/ 152 153 #define DBG_PHL_CHAN 154 #define DBG_PHL_MR 155 #define PHL_MR_PROC_CMD 156 #define DBG_CHCTX_RMAP 157 #endif 158 159 #define DBG_PHL_STAINFO 160 #define PHL_MAX_STA_NUM 128 161 162 /**** CONFIG_CMD_DISP ***/ 163 #ifdef DISABLE_CMD_DISPR 164 #undef CONFIG_CMD_DISP 165 #endif 166 167 #ifdef CONFIG_CMD_DISP 168 /* enable SOLO mode define to create seperated background thread per dispatcher, 169 * otherwise, all dispatcher would share single background thread, which is in share mode. 170 */ 171 /*#define CONFIG_CMD_DISP_SOLO_MODE*/ 172 173 /* Enable Self-Defined Sequence feature for sender to rearrange dispatch order, 174 * Since this is not a mandatory feature and would have addiional memory cost (arround 2200 Bytes) 175 * Disable by default. 176 */ 177 /*#define CONFIG_CMD_DISP_SUPPORT_CUSTOM_SEQ*/ 178 179 #ifndef CONFIG_FSM 180 #define CONFIG_SND_CMD 181 #endif 182 183 #define CONFIG_PHL_CMD_SCAN 184 185 #ifdef CONFIG_CMD_SER 186 #define CONFIG_PHL_CMD_SER 187 #endif 188 189 #define CONFIG_PHL_CMD_BTC 190 191 #ifdef CONFIG_MSG_NUM 192 #define CONFIG_PHL_MSG_NUM CONFIG_MSG_NUM 193 #endif 194 #endif /**** CONFIG_CMD_DISP ***/ 195 196 #define CONFIG_GEN_GIT_INFO 1 197 /*#define CONFIG_NEW_HALMAC_INTERFACE*/ 198 199 #define CONFIG_BTCOEX 200 201 #ifdef CONFIG_USB_TX_PADDING_CHK 202 #define CONFIG_PHL_USB_TX_PADDING_CHK 203 #endif 204 205 #ifdef CONFIG_USB_TX_AGGREGATION 206 #define CONFIG_PHL_USB_TX_AGGREGATION 207 #endif 208 209 #ifdef CONFIG_USB_RX_AGGREGATION 210 #define CONFIG_PHL_USB_RX_AGGREGATION 211 #endif 212 213 #ifdef CONFIG_DFS_MASTER 214 #define CONFIG_PHL_DFS 215 #endif 216 217 #ifdef CONFIG_PHL_DFS 218 /*#define CONFIG_PHL_DFS_REGD_FCC*/ 219 /*#define CONFIG_PHL_DFS_REGD_JAP*/ 220 #define CONFIG_PHL_DFS_REGD_ETSI 221 #endif 222 223 #ifdef CONFIG_WPP 224 #define CONFIG_PHL_WPP 225 #endif 226 227 #ifdef CONFIG_TCP_CSUM_OFFLOAD_RX 228 #define CONFIG_PHL_CSUM_OFFLOAD_RX 229 #endif 230 231 #ifdef CONFIG_RX_PSTS_PER_PKT 232 #define CONFIG_PHL_RX_PSTS_PER_PKT 233 #define RTW_WKARD_DISABLE_PSTS_PER_PKT_DATA 234 #endif 235 236 #ifdef CONFIG_SDIO_RX_NETBUF_ALLOC_IN_PHL 237 #define CONFIG_PHL_SDIO_RX_NETBUF_ALLOC_IN_PHL 238 #endif 239 240 #ifdef CONFIG_SDIO_READ_RXFF_IN_INT 241 #define CONFIG_PHL_SDIO_READ_RXFF_IN_INT 242 #endif 243 244 #ifdef CONFIG_ECSA 245 #define CONFIG_PHL_ECSA 246 #ifdef CONFIG_ECSA_EXTEND_OPTION 247 #define CONFIG_PHL_ECSA_EXTEND_OPTION 248 #endif 249 #endif 250 251 #ifdef CONFIG_TWT 252 #define CONFIG_PHL_TWT 253 #endif 254 255 #ifdef CONFIG_RA_TXSTS_DBG 256 #define CONFIG_PHL_RA_TXSTS_DBG 257 #endif 258 259 #ifdef CONFIG_RELEASE_RPT 260 #define CONFIG_PHL_RELEASE_RPT_ENABLE 261 #endif 262 263 #ifdef CONFIG_PS_FW_DBG 264 #define CONFIG_PHL_PS_FW_DBG 265 #endif 266 267 #ifdef CONFIG_P2PPS 268 #define CONFIG_PHL_P2PPS 269 #endif 270 271 #ifdef CONFIG_TX_DBG 272 #define CONFIG_PHL_TX_DBG 273 #endif 274 #ifdef CONFIG_PCI_HCI 275 #ifdef CONFIG_PCIE_TRX_MIT 276 #define PCIE_TRX_MIT_EN 277 #endif 278 #endif 279 #ifdef CONFIG_THERMAL_PROTECT 280 #define CONFIG_PHL_THERMAL_PROTECT 281 #endif 282 283 #ifdef CONFIG_RX_BATCH_IND 284 #define PHL_RX_BATCH_IND 285 #endif 286 287 #ifdef CONFIG_TDLS 288 #define CONFIG_PHL_TDLS 289 #endif 290 291 #ifdef CONFIG_SDIO_HCI 292 /* For SDIO TX TP TST - START */ 293 #ifdef CONFIG_SDIO_TX_AGG_NUM_MAX 294 #define PHL_SDIO_TX_AGG_MAX CONFIG_SDIO_TX_AGG_NUM_MAX 295 #endif /* CONFIG_SDIO_TX_AGG_NUM_MAX */ 296 #define SDIO_TX_THREAD /* Use dedicate thread for SDIO TX */ 297 /* For SDIO TX TP TST - ENDT */ 298 #endif /* CONFIG_SDIO_HCI */ 299 300 #ifdef CONFIG_MAC_REG_RW_CHK 301 #define DBG_PHL_MAC_REG_RW 302 #endif 303 304 #ifdef CONFIG_RTW_REDUCE_MEM 305 #define CONFIG_PHL_REDUCE_MEM 306 #endif 307 308 /******************* WKARD flags **************************/ 309 #define RTW_WKARD_P2PPS_REFINE 310 #define RTW_WKARD_P2PPS_SINGLE_NOA 311 #define RTW_WKARD_P2PPS_NOA_MCC 312 313 #ifdef PHL_PLATFORM_LINUX 314 #define RTW_WKARD_RF_CR_DUMP 315 #define RTW_WKARD_LINUX_CMD_WKARD 316 #endif 317 318 #ifdef PHL_PLATFORM_WINDOWS 319 /* Workaround for doing hal reset in changing MP mode will lost the mac entry */ 320 #define RTW_WKARD_MP_MODE_CHANGE 321 #define RTW_WKARD_WIN_TRX_BALANCE 322 #define RTW_WKARD_DYNAMIC_LTR 323 #define RTW_WKARD_GET_PROCESSOR_ID 324 #endif 325 326 #define RTW_WKARD_PHY_CAP 327 328 #define RTW_WKARD_BTC_STBC_CAP 329 330 #define RTW_WKARD_LAMODE 331 332 #define RTW_WKARD_TXSC 333 334 #define RTW_WKARD_BB_C2H 335 336 /* 337 * One workaround of EFUSE operation 338 * 1. Dump EFUSE with FW fail 339 */ 340 #define RTW_WKARD_EFUSE_OPERATION 341 342 #define RTW_WKARD_STA_BCN_INTERVAL 343 344 #define RTW_WKARD_SER_L1_EXPIRE 345 346 #ifdef CONFIG_USB_HCI 347 #define RTW_WKARD_SER_USB_POLLING_EVENT 348 #endif 349 350 /* #define RTW_WKARD_SER_USB_DISABLE_L1_RCVY_FLOW */ 351 352 #define RTW_WKARD_BTC_RFETYPE 353 354 #define RTW_WKARD_TXBD_UPD_LMT /* 8852AE/8852BE txbd index update limitation */ 355 356 #ifdef CONFIG_WPA3_SUITEB_SUPPORT 357 #define RTW_WKARD_HW_MGNT_GCMP_256_DISABLE 358 #endif 359 360 /* Workaround for cmac table config 361 * - Default is disabled until halbb is ready 362 * - This workaround will be removed once fw handles this cfg 363 */ 364 /*#define RTW_WKARD_DEF_CMACTBL_CFG*/ 365 366 /* Workaround for efuse read hidden report 367 * - Default is disabled until halmac is ready 368 */ 369 370 #define RTW_WKARD_PRELOAD_TRX_RESET 371 372 /* Workaround for cmac table config 373 * - This workaround will be removed once fw handles this cfg 374 */ 375 #define RTW_WKARD_DEF_CMACTBL_CFG 376 377 #define RTW_WKARD_USB_TXAGG_BULK_END_WD 378 #ifdef CONFIG_HOMOLOGATION 379 #define CONFIG_PHL_HOMOLOGATION 380 #endif 381 382 #ifdef RTW_WKARD_TX_DISABLE_BFEE 383 #define RTW_WKARD_DYNAMIC_BFEE_CAP 384 #endif 385 386 #ifdef RTW_WKARD_NTFY_MEDIA_STS 387 #define RTW_WKARD_PHL_NTFY_MEDIA_STS 388 #endif 389 390 #ifdef RTW_WKARD_PHY_INFO_NTFY 391 #define CONFIG_PHY_INFO_NTFY 392 #endif 393 394 #ifdef PHL_PLATFORM_WINDOWS 395 #define CONFIG_WOW_WITH_SER 396 #endif 397 398 #ifdef PHL_PLATFORM_WINDOWS 399 #define CONFIG_DBG_H2C_TX 400 #endif 401 402 /* 403 * Workaround for MRC bk module call phl_mr_offch_hdl with scan_issue_null_data 404 * ops, this should be replaced with phl issue null data function. 405 */ 406 #define RTW_WKARD_MRC_ISSUE_NULL_WITH_SCAN_OPS 407 408 /* 409 * Workaround for phl_mr_offch_hdl sleep after issue null data, 410 * - This workaround will be removed once tx report is ready 411 */ 412 #ifndef RTW_WKARD_TX_NULL_WD_RP 413 #define RTW_WKARD_ISSUE_NULL_SLEEP_PROTECTION 414 #endif 415 #ifdef RTW_WKARD_LPS_IQK_TWICE 416 #define RTW_WKARD_PHL_LPS_IQK_TWICE 417 #endif 418 419 #ifdef RTW_WKARD_FSM_SCAN_PASSIVE_TO_ACTIVE 420 #define RTW_WKARD_PHL_FSM_SCAN_PASSIVE_TO_ACTIVE 421 #endif 422 423 #define RTW_WKARD_BUSCAP_IN_HALSPEC 424 425 #define RTW_WKARD_IBSS_SNIFFER_MODE 426 427 428 #define RTW_WKARD_SINGLE_PATH_RSSI 429 430 /* #define CONFIG_6GHZ */ 431 432 433 #define RTW_WKARD_BFEE_DISABLE_NG16 434 435 #define RTW_WKARD_HW_WMM_ALLOCATE 436 437 #ifdef RTW_WKARD_BFEE_AID 438 #define RTW_WKARD_BFEE_SET_AID 439 #endif 440 441 #define RTW_WKARD_AP_CLIENT_ADD_DEL_NTY 442 443 #ifdef RTW_WKARD_DISABLE_2G40M_ULOFDMA 444 #define RTW_WKARD_BB_DISABLE_STA_2G40M_ULOFDMA 445 #endif 446 447 #define RTW_WKARD_CHECK_STAINFO_DOUBLE_DEL 448 449 #endif /*_PHL_CONFIG_H_*/ 450