1 /** @file */ 2 /****************************************************************************** 3 * 4 * Copyright(c) 2019 Realtek Corporation. All rights reserved. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of version 2 of the GNU General Public License as 8 * published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 ******************************************************************************/ 16 17 #ifndef _MAC_AX_ERR_H_ 18 #define _MAC_AX_ERR_H_ 19 20 #define MACSUCCESS 0 /* Success return value */ 21 #define MACPFCB 1 /* Callback of platform is null */ 22 #define MACPFED 2 /* Endian of platform error */ 23 #define MACBADDR 3 /* Invalid base address */ 24 #define MACLSUS 4 /* Leave suspend error */ 25 #define MACNPTR 5 /* Pointer is null */ 26 #define MACCHIPID 6 /* Chip ID is undefined */ 27 #define MACADAPTER 7 /* Can not get MAC adapter */ 28 #define MACSTCAL 8 /* Unexpected structure alignment */ 29 #define MACNOBUF 9 /* Buffer space is not enough */ 30 #define MACBUFSZ 10 /* Buffer size error */ 31 #define MACNOITEM 11 /* Invalid item */ 32 #define MACPOLLTO 12 /* Polling timeout */ 33 #define MACPWRSW 13 /* Power switch fail */ 34 #define MACBUFALLOC 14 /* Buffer allocation fail */ 35 #define MACWQBUSY 15 /* Work queue is busy */ 36 #define MACCMP 16 /* Failed compare result */ 37 #define MACINTF 17 /* Wrong interface */ 38 #define MACFWBIN 18 /* Incorrect FW bin file */ 39 #define MACFFCFG 19 /* Wrong FIFO configuration */ 40 #define MACSAMACID 20 /* Same MACID */ 41 #define MACMACIDFL 21 /* MACID full */ 42 #define MACNOFW 22 /* There is no FW */ 43 #define MACPROCBUSY 23 /* Process is busy */ 44 #define MACPROCERR 24 /* state machine error */ 45 #define MACEFUSEBANK 25 /* switch efuse bank fail */ 46 #define MACEFUSEREAD 26 /* read efuse fail */ 47 #define MACEFUSEWRITE 27 /* write efuse fail */ 48 #define MACEFUSESIZE 28 /* efuse size error */ 49 #define MACEFUSEPARSE 29 /* eeprom parsing fail */ 50 #define MACEFUSECMP 30 /* compare efuse fail */ 51 #define MACSECUREON 31 /* secure on, no host indirect access */ 52 #define MACTXCHDMA 32 /* invalid tx dma channel */ 53 #define MACADDRCAMUPDERR 33 /* address cam update error */ 54 #define MACPWRSTAT 34 /* Power state error */ 55 #define MACSDIOMIXMODE 35 /* SDIO Tx mix mode */ 56 #define MACSDIOSEQERR 36 /* SDIO Tx sequence error */ 57 #define MACHFCH2CQTA 37 /* HCI FC invalid H2C quota */ 58 #define MACHFCCH011QTA 38 /* HCI FC invalid CH0-11 quota */ 59 #define MACHFCCH011GRP 39 /* HCI FC invalid CH0-11 group */ 60 #define MACHFCPUBQTA 40 /* HCI FC invalid public quota */ 61 #define MACHFCPUBINFO 41 /* HCI FC public info error */ 62 #define MACRFPMCAM 42 /* RX forwarding PM CAM access fail */ 63 #define MACHFSWDENOTNUF 43 /* HCI FC WDE page not enough */ 64 #define MACHFSPLENOTNUF 44 /* HCI FC PLE page not enough */ 65 #define MACMEMRO 45 /* Address is not writable */ 66 #define MACFUNCINPUT 46 /* invalid function input */ 67 #define MACALRDYON 47 /* MAC has already powered on */ 68 #define MACADDRCAMFL 48 /* ADDRESS CAM full */ 69 #define MACBSSIDCAMFL 49 /* BSSID CAM full */ 70 #define MACGPIOUSED 50 /* GPIO is used */ 71 #define MACDLELINK 51 /* DLE link error */ 72 #define MACPOLLTXIDLE 52 /* polling Tx idle fail */ 73 #define MACPARSEERR 53 /* parse report err */ 74 #define MACROLEINITFL 54 /* Role API init fail or C2H notify role init fail */ 75 #define MACPORTCFGTYPE 55 /* Port cfg type error */ 76 #define MACPORTCFGPORT 56 /* Port cfg port error */ 77 #define MACWNGKEYTYPE 57 /* Sec cam wrong key type*/ 78 #define MACKEYNOTEXT 58 /* Delete key , key not exist*/ 79 #define MACSECCAMFL 59 /* SEC CAM full*/ 80 #define MACADDRCAMKEYFL 60 /* Addr CAM key full*/ 81 #define MACNOROLE 61 /* SEC no this role*/ 82 #define MACHWNOTEN 62 /* hw module not enable*/ 83 #define MACPTMTXFAIL 63 /* platform TX fail*/ 84 #define MACSSLINK 64 /* STA scheduler link error */ 85 #define MACDBGPORTSEL 65 /* Debug port sel error */ 86 #define MACDBGPORTDMP 66 /* Debug port dump error */ 87 #define MACCPWMSEQERR 67 /* CPWM sequence mismatch */ 88 #define MACCPWMSTATERR 68 /* CPWM state mismatch */ 89 #define MACCPUSTATE 69 /* Incorrect CPU state */ 90 #define MACPSSTATFAIL 70 /* protocol power state check fail */ 91 #define MACLV1STEPERR 71 /* lv1 rcvy step sel error */ 92 #define MACFWCHKSUM 72 /* FW checksum is incorrect */ 93 #define MACFWSECBOOT 73 /* FW security boot is failed */ 94 #define MACFWCUT 74 /* Mismatch chip and FW cut */ 95 #define MACSUBSPCERR 75 /* Beacon sub-space setting fail */ 96 #define MACLENCMP 76 /* Length is not match */ 97 #define MACCHKSUMEMPTY 77 /* Checksum report empty */ 98 #define MACCHKSUMFAIL 78 /* Checksum report fail */ 99 #define MACVERERR 79 /* Map and mask version mismatch */ 100 #define MACFWNONRDY 80 /* FW not ready h2c error*/ 101 #define MACGPIONUM 81 /* The gpio number is wrong */ 102 #define MACNOTSUP 82 /* The function is NOT supported */ 103 #define MACCSIBUFIDERR 83 /* CSI buffer index is NOT supported */ 104 #define MACSNDSTSIDERR 84 /* Sounding status ID is NOT supported */ 105 #define MACCCTLWRFAIL 85 /* control info wrrite fail */ 106 #define MACHWNOSUP 86 /* HW not support */ 107 #define MACUNDEFCH 87 /* Channel is undefined */ 108 #define MACHWERR 88 /* HW error */ 109 #define MACFWTESTFAIL 89 /* FW auto test fail */ 110 #define MACP2PSTFAIL 90 /* P2P state fail */ 111 #define MACFLASHFAIL 91 /* FW auto test fail */ 112 #define MACSETVALERR 92 /* Setting value error */ 113 #define MACIOERRPWR 93 /* IO not allow when power not on */ 114 #define MACIOERRSERL1 94 /* IO not allow when SER Lv1 */ 115 #define MACIOERRLPS 95 /* IO not allow when LPS */ 116 #define MACIOERRDMAC 96 /* IO not allow when dmac not en */ 117 #define MACIOERRCMAC0 97 /* IO not allow when cmac0 not en */ 118 #define MACIOERRCMAC1 98 /* IO not allow when cmac1 not en */ 119 #define MACIOERRBB0 99 /* IO not allow when bb0 not en */ 120 #define MACIOERRBB1 100 /* IO not allow when bb1 not en */ 121 #define MACIOERRRF 101 /* IO not allow when rf not en */ 122 #define MACIOERRIND 102 /* IO not allow when indirect access */ 123 #define MACIOERRRSVD 103 /* IO not allow if address is rsvd */ 124 #define MACC2HREGEMP 104 /* C2H reg empty */ 125 #define MACBADC2HREG 105 /* received unexpected c2hreg */ 126 #define MACFIOOFLD 106 /* IO offload fail */ 127 #define MACROLEALOCFL 107 /* C2H notify alloc role failed */ 128 #define MACROLEHWUPDFL 108 /* C2H notify addrcam upd failed*/ 129 #define MACSDIOTXMODE 109 /* SDIO Tx mode undefined*/ 130 #define MACSDIOOPNMODE 110 /* SDIO opn mode unknown*/ 131 #define MACFWSTATUSFAIL 111 /* fw status command fail */ 132 #define MACIOERRPLAT 112 /* IO not allow when platform not on */ 133 #define MACCPWMPWRSTATERR 113 /* CPWM power state mismatch */ 134 #define MACIOERRISH 114 /* IO not allow when io state hang */ 135 #define MACHWDMACERR 115 /* DMAC_ERR_ISR */ 136 #define MACHWCMAC0ERR 116 /* CMAC0_ERR_ISR */ 137 #define MACHWCMAC1ERR 116 /* CMAC1_ERR_ISR */ 138 #define MACDRVRM 117 /* driver is removed unexpectedly */ 139 #define MACMCCGPFL 118 /* Get MCC Group index fail*/ 140 #define MACFWSTATEERR 119 /* fw state error */ 141 #define MACFWLOGINTERR 120 /*fw log parsing error*/ 142 #define MACFWASSERT 123 /* FW Assertion error */ 143 #define MACFWEXCEP 124 /* FW Exception error */ 144 #define MACFWRXI300 125 /* FW RXI300 error */ 145 #define MACFWPCHANG 126 /* FW PC hang error */ 146 #define MACRXDMAHANG 127 /*USB RXDMA HANG */ 147 #define MACUSBRXHANG 128 /*USB RX HANG */ 148 #define MACCPWMINTFERR 129 /* CPWM interface error */ 149 #define MACARDYDONE 130 /* The flow is already done */ 150 151 /*MAC DBG Status Indication*/ 152 #define MACSCH_NONEMPTY 1 /* MAC Scheduler non empty */ 153 154 /* Debug Package Indication */ 155 /* STA Scheduler 0, indirect */ 156 #define SS_TX_LEN_BE BIT(0) 157 #define SS_TX_LEN_BK BIT(1) 158 #define SS_TX_LEN_VI BIT(2) 159 #define SS_TX_LEN_VO BIT(3) 160 #define SS_LINK_WMM0_BE BIT(4) 161 #define SS_LINK_WMM0_BK (SS_LINK_WMM0_BE << 1) 162 #define SS_LINK_WMM0_VI (SS_LINK_WMM0_BE << 2) 163 #define SS_LINK_WMM0_VO (SS_LINK_WMM0_BE << 3) 164 #define SS_LINK_WMM1_BE (SS_LINK_WMM0_BE << 4) 165 #define SS_LINK_WMM1_BK (SS_LINK_WMM0_BE << 5) 166 #define SS_LINK_WMM1_VI (SS_LINK_WMM0_BE << 6) 167 #define SS_LINK_WMM1_VO (SS_LINK_WMM0_BE << 7) 168 #define SS_LINK_WMM2_BE (SS_LINK_WMM0_BE << 8) 169 #define SS_LINK_WMM2_BK (SS_LINK_WMM0_BE << 9) 170 #define SS_LINK_WMM2_VI (SS_LINK_WMM0_BE << 10) 171 #define SS_LINK_WMM2_VO (SS_LINK_WMM0_BE << 11) 172 #define SS_LINK_WMM3_BE (SS_LINK_WMM0_BE << 12) 173 #define SS_LINK_WMM3_BK (SS_LINK_WMM0_BE << 13) 174 #define SS_LINK_WMM3_VI (SS_LINK_WMM0_BE << 14) 175 #define SS_LINK_WMM3_VO (SS_LINK_WMM0_BE << 15) 176 #define SS_LINK_UL (SS_LINK_WMM0_BE << 16) 177 #define SS_POLL_OWN_TX_LEN BIT(24) 178 #define SS_POLL_OWN_LINK BIT(25) 179 #define SS_POLL_STAT_TX_LEN BIT(26) 180 #define SS_POLL_STAT_LINK BIT(27) 181 /* STA Scheduler 1, direct */ 182 #define SS_TX_HW_LEN_UDN BIT(0) 183 #define SS_TX_SW_LEN_UDN BIT(1) 184 #define SS_TX_HW_LEN_OVF BIT(2) 185 #define SS_STAT_FWTX BIT(8) 186 #define SS_STAT_RPTA BIT(9) 187 #define SS_STAT_WDEA BIT(10) 188 #define SS_STAT_PLEA BIT(11) 189 #define SS_STAT_ULRU BIT(12) 190 #define SS_STAT_DLTX BIT(13) 191 192 #ifdef CONFIG_NEW_HALMAC_INTERFACE 193 #define PLTFM_MSG_ALWAYS(...) \ 194 _os_dbgdump("[MAC][ERR] " fmt, ##__VA_ARGS__) 195 #else 196 #define PLTFM_MSG_ALWAYS(...) \ 197 adapter->pltfm_cb->msg_print(adapter->drv_adapter, _PHL_ALWAYS_, __VA_ARGS__) 198 #endif 199 200 #if MAC_AX_DBG_MSG_EN 201 202 #ifdef CONFIG_NEW_HALMAC_INTERFACE 203 204 #if (MAC_AX_MSG_LEVEL >= MAC_AX_MSG_LEVEL_ALWAYS) 205 #define PLTFM_MSG_ALWAYS(...) \ 206 _os_dbgdump("[MAC][LOG] " fmt, ##__VA_ARGS__) 207 #else 208 #define PLTFM_MSG_ALWAYS(...) do {} while (0) 209 #endif 210 211 /* Enable debug msg depends on HALMAC_MSG_LEVEL */ 212 #if (MAC_AX_MSG_LEVEL >= MAC_AX_MSG_LEVEL_ERR) 213 #define PLTFM_MSG_ERR(...) \ 214 _os_dbgdump("[MAC][ERR] " fmt, ##__VA_ARGS__) 215 #else 216 #define PLTFM_MSG_ERR(...) do {} while (0) 217 #endif 218 219 #if (MAC_AX_MSG_LEVEL >= MAC_AX_MSG_LEVEL_WARNING) 220 #define PLTFM_MSG_WARN(...) \ 221 _os_dbgdump("[MAC][WARN] " fmt, ##__VA_ARGS__) 222 #else 223 #define PLTFM_MSG_WARN(...) do {} while (0) 224 #endif 225 226 #if (MAC_AX_MSG_LEVEL >= MAC_AX_MSG_LEVEL_TRACE) 227 #define PLTFM_MSG_TRACE(...) \ 228 _os_dbgdump("[MAC][TRACE] " fmt, ##__VA_ARGS__) 229 #else 230 #define PLTFM_MSG_TRACE(...) do {} while (0) 231 #endif 232 233 #else 234 235 #if (MAC_AX_MSG_LEVEL >= MAC_AX_MSG_LEVEL_ALWAYS) 236 #define PLTFM_MSG_ALWAYS(...) \ 237 adapter->pltfm_cb->msg_print(adapter->drv_adapter, _PHL_ALWAYS_, __VA_ARGS__) 238 #else 239 #define PLTFM_MSG_ALWAYS(...) do {} while (0) 240 #endif 241 242 /* Enable debug msg depends on HALMAC_MSG_LEVEL */ 243 #if (MAC_AX_MSG_LEVEL >= MAC_AX_MSG_LEVEL_ERR) 244 #define PLTFM_MSG_ERR(...) \ 245 adapter->pltfm_cb->msg_print(adapter->drv_adapter, _PHL_ERR_, __VA_ARGS__) 246 #else 247 #define PLTFM_MSG_ERR(...) do {} while (0) 248 #endif 249 250 #if (MAC_AX_MSG_LEVEL >= MAC_AX_MSG_LEVEL_WARNING) 251 #define PLTFM_MSG_WARN(...) \ 252 adapter->pltfm_cb->msg_print(adapter->drv_adapter, _PHL_WARNING_, __VA_ARGS__) 253 #else 254 #define PLTFM_MSG_WARN(...) do {} while (0) 255 #endif 256 257 #if (MAC_AX_MSG_LEVEL >= MAC_AX_MSG_LEVEL_TRACE) 258 #define PLTFM_MSG_TRACE(...) \ 259 adapter->pltfm_cb->msg_print(adapter->drv_adapter, _PHL_DEBUG_, __VA_ARGS__) 260 #else 261 #define PLTFM_MSG_TRACE(...) do {} while (0) 262 #endif 263 #endif /*CONFIG_NEW_HALMAC_INTERFACE*/ 264 265 #else 266 267 /* Disable debug msg */ 268 #define PLTFM_MSG_ALWAYS(...) do {} while (0) 269 #define PLTFM_MSG_ERR(...) do {} while (0) 270 #define PLTFM_MSG_WARN(...) do {} while (0) 271 #define PLTFM_MSG_TRACE(...) do {} while (0) 272 273 #endif 274 275 #endif 276