1 /******************************************************************************
2 *
3 * Copyright(c) 2019 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 *****************************************************************************/
15 #include "hal_headers.h"
16
17 /**
18 * _dump_csi_buf_status
19 * Dump all of the csi buffer status;
20 * @csi_obj: (struct hal_csi_obj *)
21 **/
_dump_csi_buf_status(struct hal_csi_obj * csi_obj)22 void _dump_csi_buf_status(struct hal_csi_obj *csi_obj)
23 {
24 struct hal_csi_buf *csi_buf = NULL;
25 u8 i = 0;
26 PHL_TRACE(COMP_PHL_DBG, _PHL_INFO_, "===> DUMP HAL CSI Buffer Status\n");
27 for (i = 0; i < csi_obj->max_csi_buf_nr; i++) {
28 csi_buf = &csi_obj->csi_buf[i];
29 PHL_TRACE(COMP_PHL_DBG, _PHL_INFO_, "[CSI BUF][%d] status 0x%x \n",
30 csi_buf->idx, csi_buf->sub_idx);
31 PHL_TRACE(COMP_PHL_DBG, _PHL_INFO_, "[CSI BUF] 20UU (%d) \n",
32 IS_SUB20_BUSY(csi_buf, 3));
33 PHL_TRACE(COMP_PHL_DBG, _PHL_INFO_, "[CSI BUF] 20UL (%d) \n",
34 IS_SUB20_BUSY(csi_buf, 2));
35 PHL_TRACE(COMP_PHL_DBG, _PHL_INFO_, "[CSI BUF] 20LU (%d) \n",
36 IS_SUB20_BUSY(csi_buf, 1));
37 PHL_TRACE(COMP_PHL_DBG, _PHL_INFO_, "[CSI BUF] 20LL (%d) \n",
38 IS_SUB20_BUSY(csi_buf, 0));
39 }
40 PHL_TRACE(COMP_PHL_DBG, _PHL_INFO_, "<=== DUMP HAL CSI Buffer Status\n");
41 }
42
43 /**
44 * __query_avl_buf_idx_20
45 * Get available sub 20MHz csi buffer
46 * input :
47 * @csi_buf: (struct hal_csi_buf *) 80MHz hal csi buffer for checking avaible
48 * return
49 * @sub_idx: (u8) csi buffer sub index
50 **/
__query_avl_buf_idx_20(struct hal_csi_buf * csi_buf)51 u8 __query_avl_buf_idx_20(struct hal_csi_buf *csi_buf)
52 {
53 u8 sub_idx = CSI_BUF_SUB_IDX_NON;
54 do {
55 if (IS_SUB20_BUSY(csi_buf, 0) == CSI_BUF_STS_IDLE) {
56 SET_SUB20_BUSY(csi_buf, 0);
57 sub_idx = CSI_BUF_SUB_IDX_20_LL;
58 break;
59 }
60 if (IS_SUB20_BUSY(csi_buf, 1) == CSI_BUF_STS_IDLE) {
61 SET_SUB20_BUSY(csi_buf, 1);
62 sub_idx = CSI_BUF_SUB_IDX_20_LU;
63 break;
64 }
65 if (IS_SUB20_BUSY(csi_buf, 2) == CSI_BUF_STS_IDLE) {
66 SET_SUB20_BUSY(csi_buf, 2);
67 sub_idx = CSI_BUF_SUB_IDX_20_UL;
68 break;
69 }
70 if (IS_SUB20_BUSY(csi_buf, 3) == CSI_BUF_STS_IDLE) {
71 SET_SUB20_BUSY(csi_buf, 3);
72 sub_idx = CSI_BUF_SUB_IDX_20_UU;
73 break;
74 }
75 } while (0);
76
77 return sub_idx;
78 }
79 /**
80 * __query_avl_buf_idx_40
81 * Get available sub 40MHz csi buffer
82 * input :
83 * @csi_buf: (struct hal_csi_buf *) 80MHz hal csi buffer for checking avaible
84 * return
85 * @sub_idx: (u8) csi buffer sub index
86 **/
__query_avl_buf_idx_40(struct hal_csi_buf * csi_buf)87 u8 __query_avl_buf_idx_40(struct hal_csi_buf *csi_buf)
88 {
89 u8 sub_idx = CSI_BUF_SUB_IDX_NON;
90 do {
91 if(IS_40L_BUSY(csi_buf) == CSI_BUF_STS_IDLE) {
92 SET_40L_BUSY(csi_buf);
93 sub_idx = CSI_BUF_SUB_IDX_40_L;
94 break;
95 }
96 if (IS_40U_BUSY(csi_buf) == CSI_BUF_STS_IDLE) {
97 SET_40U_BUSY(csi_buf);
98 sub_idx = CSI_BUF_SUB_IDX_40_U;
99 break;
100 }
101 } while (0);
102
103 return sub_idx;
104 }
105 /**
106 * __query_avl_buf_idx_80
107 * Get available sub 80MHz csi buffer
108 * input :
109 * @csi_buf: (struct hal_csi_buf *) 80MHz hal csi buffer for checking avaible
110 * return
111 * @sub_idx: (u8) csi buffer sub index
112 **/
__query_avl_buf_idx_80(struct hal_csi_buf * csi_buf)113 u8 __query_avl_buf_idx_80(struct hal_csi_buf *csi_buf)
114 {
115 u8 sub_idx = CSI_BUF_SUB_IDX_NON;
116 if (csi_buf->sub_idx == CSI_BUF_STS_IDLE) {
117 sub_idx = CSI_BUF_SUB_IDX_80;
118 csi_buf->sub_idx = 0xF;
119 }
120 return sub_idx;
121 }
122
123 /**
124 * _query_csi_buf_su
125 * Get available sub 40MHz csi buffer
126 * input :
127 * @hal_info: (struct hal_info_t *)
128 * @size:enum hal_csi_buf_size 20/40/80 MHz
129 * return
130 * @sub_id: (u8) available csi buffer sub index
131 * @csi_buf: (struct hal_csi_buf *) original hal csi buffer
132 **/
_query_csi_buf_su(struct hal_info_t * hal_info,enum hal_csi_buf_size size,u8 * sub_id)133 struct hal_csi_buf *_query_csi_buf_su(
134 struct hal_info_t *hal_info,
135 enum hal_csi_buf_size size,
136 u8 *sub_id)
137 {
138 struct rtw_hal_com_t *hal_com = hal_info->hal_com;
139 struct hal_csi_obj *csi_obj = (struct hal_csi_obj *)hal_com->csi_obj;
140 struct hal_csi_buf *csi_buf = NULL;
141 u8 i = 0;
142 u8 e_idx_su = csi_obj->max_csi_buf_nr_su;
143
144 *sub_id = CSI_BUF_SUB_IDX_NON;
145
146 switch (size) {
147 case HAL_CSI_BUF_SIZE_20:
148 for (i = 0; i < e_idx_su; i++) {
149 *sub_id = __query_avl_buf_idx_20(&csi_obj->csi_buf[i]);
150 if(*sub_id != CSI_BUF_SUB_IDX_NON) {
151 csi_buf = &csi_obj->csi_buf[i];
152 break;
153 }
154 }
155 break;
156 case HAL_CSI_BUF_SIZE_40:
157 for (i = 0; i < e_idx_su; i++) {
158 *sub_id = __query_avl_buf_idx_40(&csi_obj->csi_buf[i]);
159 if(*sub_id != CSI_BUF_SUB_IDX_NON) {
160 csi_buf = &csi_obj->csi_buf[i];
161 break;
162 }
163 }
164 break;
165 case HAL_CSI_BUF_SIZE_80:
166 for (i = 0; i < e_idx_su; i++) {
167 *sub_id = __query_avl_buf_idx_80(&csi_obj->csi_buf[i]);
168 if(*sub_id != CSI_BUF_SUB_IDX_NON) {
169 csi_buf = &csi_obj->csi_buf[i];
170 break;
171 }
172 }
173 break;
174 default:
175 break;
176 }
177 if (*sub_id == CSI_BUF_SUB_IDX_NON) {
178 PHL_TRACE(COMP_PHL_DBG, _PHL_INFO_, "warring :_query_csi_buf_su fail !!!\n");
179 }
180 return csi_buf;
181 }
182
183 /**
184 * _query_csi_buf_mu
185 * Get available sub 40MHz csi buffer
186 * input :
187 * @hal_info: (struct hal_info_t *)
188 * @size:enum hal_csi_buf_size 20/40/80 MHz
189 * return
190 * @sub_id: (u8) available csi buffer sub index
191 * @csi_buf: (struct hal_csi_buf *) original hal csi buffer
192 **/
_query_csi_buf_mu(struct hal_info_t * hal_info,enum hal_csi_buf_size size,u8 * sub_id)193 struct hal_csi_buf *_query_csi_buf_mu(
194 struct hal_info_t *hal_info,
195 enum hal_csi_buf_size size,
196 u8 *sub_id)
197 {
198 struct rtw_hal_com_t *hal_com = hal_info->hal_com;
199 struct hal_csi_obj *csi_obj = (struct hal_csi_obj *)hal_com->csi_obj;
200 struct hal_csi_buf *csi_buf = NULL;
201 u8 i = 0;
202 u8 s_idx_mu = csi_obj->max_csi_buf_nr_su;
203 u8 e_idx_mu = csi_obj->max_csi_buf_nr;
204
205 *sub_id = CSI_BUF_SUB_IDX_NON;
206
207 switch (size) {
208 case HAL_CSI_BUF_SIZE_20:
209 for (i = s_idx_mu; i < e_idx_mu; i++) {
210 *sub_id = __query_avl_buf_idx_20(&csi_obj->csi_buf[i]);
211 if(*sub_id != CSI_BUF_SUB_IDX_NON) {
212 csi_buf = &csi_obj->csi_buf[i];
213 break;
214 }
215 }
216 break;
217 case HAL_CSI_BUF_SIZE_40:
218 for (i = s_idx_mu; i < e_idx_mu; i++) {
219 *sub_id = __query_avl_buf_idx_40(&csi_obj->csi_buf[i]);
220 if(*sub_id != CSI_BUF_SUB_IDX_NON) {
221 csi_buf = &csi_obj->csi_buf[i];
222 break;
223 }
224 }
225 break;
226 case HAL_CSI_BUF_SIZE_80:
227 for (i = s_idx_mu; i < e_idx_mu; i++) {
228 *sub_id = __query_avl_buf_idx_80(&csi_obj->csi_buf[i]);
229 if(*sub_id != CSI_BUF_SUB_IDX_NON) {
230 csi_buf = &csi_obj->csi_buf[i];
231 break;
232 }
233 }
234 break;
235 default:
236 break;
237 }
238
239 if (*sub_id == CSI_BUF_SUB_IDX_NON) {
240 PHL_TRACE(COMP_PHL_DBG, _PHL_INFO_, "warring :_query_csi_buf_mu fail !!!\n");
241 }
242 return csi_buf;
243 }
244
245 /**
246 * _bw2csi
247 * phl channel width to hal csi buffer size
248 * input :
249 * @bw: (struct hal_info_t *)
250 * return
251 * @ret: enum hal_csi_buf_size
252 **/
253 enum hal_csi_buf_size
_bw2csi(enum channel_width bw)254 _bw2csi(enum channel_width bw)
255 {
256 enum hal_csi_buf_size ret = HAL_CSI_BUF_SIZE_NONE;
257 switch (bw){
258 case CHANNEL_WIDTH_20:
259 ret = HAL_CSI_BUF_SIZE_20;
260 break;
261 case CHANNEL_WIDTH_40:
262 ret = HAL_CSI_BUF_SIZE_40;
263 break;
264 case CHANNEL_WIDTH_80:
265 ret = HAL_CSI_BUF_SIZE_80;
266 break;
267 default:
268 break;
269 }
270 return ret;
271 }
272
_hal_csi_init_buf(struct hal_info_t * hal_info,u8 num)273 enum rtw_hal_status _hal_csi_init_buf(struct hal_info_t *hal_info, u8 num)
274 {
275 enum rtw_hal_status status = RTW_HAL_STATUS_SUCCESS;
276 void *drv_priv = hal_to_drvpriv(hal_info);
277 struct rtw_hal_com_t *hal_com = hal_info->hal_com;
278 struct hal_csi_obj *csi_obj = hal_com->csi_obj;
279 struct hal_csi_buf *csi_buf = NULL;
280 u8 idx = 0;
281
282 do {
283 csi_obj->csi_buf = _os_mem_alloc(drv_priv,
284 sizeof(*csi_buf) * num);
285 _os_mem_set(drv_priv, csi_obj->csi_buf, 0,
286 sizeof(*csi_buf) * num);
287
288 if (NULL == csi_obj->csi_buf) {
289 status = RTW_HAL_STATUS_RESOURCE;
290 break;
291 }
292 csi_buf = csi_obj->csi_buf;
293 for (idx = 0; idx < num ; idx++) {
294 csi_buf[idx].idx = idx;
295 csi_buf[idx].sub_idx = 0;
296 }
297 } while (0);
298
299 return status;
300 }
301
302
303 /**
304 * hal_csi_init
305 * hal csi module initialize
306 * input :
307 * @hal_info: struct hal_info_t
308 * @su_buf_nr: Number of HW SU CSI Buffer for HAL
309 * @mu_buf_nr: Number of HW MU CSI Buffer for HAL
310 **/
311 enum rtw_hal_status
hal_csi_init(struct hal_info_t * hal_info,u8 su_buf_nr,u8 mu_buf_nr)312 hal_csi_init(struct hal_info_t *hal_info, u8 su_buf_nr, u8 mu_buf_nr)
313 {
314 enum rtw_hal_status status = RTW_HAL_STATUS_SUCCESS;
315 struct rtw_hal_com_t *hal_com = hal_info->hal_com;
316 struct hal_csi_obj *csi_obj = NULL;
317 void *drv_priv = hal_to_drvpriv(hal_info);
318 u8 idx = 0;
319 FUNCIN();
320
321 do {
322 csi_obj = _os_mem_alloc(drv_priv, sizeof(*csi_obj));
323
324 if (csi_obj == NULL) {
325 status = RTW_HAL_STATUS_RESOURCE;
326 break;
327 }
328 hal_com->csi_obj = csi_obj;
329 _os_spinlock_init(drv_priv, &csi_obj->csi_lock);
330
331 if ((su_buf_nr + mu_buf_nr) == 0) {
332 PHL_ERR("hal_csi_init fail : csi buffer number = 0\n");
333 status = RTW_HAL_STATUS_RESOURCE;
334 break;
335 }
336 _hal_csi_init_buf(hal_info, mu_buf_nr + su_buf_nr);
337
338 csi_obj->max_csi_buf_nr_mu = mu_buf_nr;
339 csi_obj->max_csi_buf_nr_su = su_buf_nr;
340 csi_obj->max_csi_buf_nr = su_buf_nr + mu_buf_nr;
341 for (idx = su_buf_nr; idx < csi_obj->max_csi_buf_nr; idx++){
342 csi_obj->csi_buf[idx].type = HAL_CSI_BUF_TYPE_MU;
343 }
344
345 } while (0);
346
347 if (RTW_HAL_STATUS_SUCCESS != status) {
348 hal_csi_deinit(hal_info);
349 }
350 FUNCOUT();
351 return status;
352 }
353 /**
354 * hal_csi_deinit
355 * hal csi module deinitialize
356 * input :
357 * @hal_info: struct hal_info_t
358 **/
hal_csi_deinit(struct hal_info_t * hal_info)359 void hal_csi_deinit(struct hal_info_t *hal_info)
360 {
361 struct rtw_hal_com_t *hal_com = hal_info->hal_com;
362 struct hal_csi_obj *csi_obj = (struct hal_csi_obj *)hal_com->csi_obj;
363 void *drv_priv = hal_to_drvpriv(hal_info);
364 struct hal_csi_buf *csi_buf = csi_obj->csi_buf;
365
366 if (csi_obj != NULL) {
367 if (csi_buf != NULL) {
368 _os_mem_free(hal_to_drvpriv(hal_info), csi_buf,
369 sizeof(struct hal_csi_buf) * csi_obj->max_csi_buf_nr);
370 csi_obj->csi_buf = NULL;
371 }
372
373 _os_spinlock_free(drv_priv, &csi_obj->csi_lock);
374 /* bf obj need free as last */
375 _os_mem_free(hal_to_drvpriv(hal_info), csi_obj,
376 sizeof(struct hal_csi_obj));
377 hal_com->csi_obj = NULL;
378 }
379 }
380
381 /**
382 * hal_csi_query_idle_csi_buf
383 * Get available CSI buffer
384 * input :
385 * @hal_info: struct hal_info_t
386 * @mu: Request CSI Type : 1 = MU / 0 = SU
387 * @bw: Request CSI BW : enum channel_width (20/40/80MHz)
388 * @buf: (struct hal_csi_buf *)input/return : memory for CSI buffer index+subindex
389 * (the call shall provied 1byte memory to save csi index)
390 **/
hal_csi_query_idle_csi_buf(struct hal_info_t * hal_info,u8 mu,enum channel_width bw,void * buf)391 enum rtw_hal_status hal_csi_query_idle_csi_buf(
392 struct hal_info_t *hal_info,
393 u8 mu,
394 enum channel_width bw,
395 void *buf)
396 {
397 enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
398 struct rtw_hal_com_t *hal_com = hal_info->hal_com;
399 struct hal_csi_obj *csi_obj = (struct hal_csi_obj *)hal_com->csi_obj;
400 void *drv_priv = hal_to_drvpriv(hal_info);
401 struct hal_csi_buf *csi_buf = (struct hal_csi_buf *)buf;
402 struct hal_csi_buf *tmp_csi_buf = NULL;
403 u8 sub_idx = CSI_BUF_SUB_IDX_NON;
404 enum hal_csi_buf_size size = HAL_CSI_BUF_SIZE_NONE;
405 enum hal_csi_buf_type type = HAL_CSI_BUF_TYPE_SU;
406
407 FUNCIN();
408 if (csi_buf == NULL) {
409 return status;
410 }
411
412 size = _bw2csi(bw);
413 type = mu ? HAL_CSI_BUF_TYPE_MU : HAL_CSI_BUF_TYPE_SU;
414 PHL_TRACE(COMP_PHL_SOUND, _PHL_INFO_, "size = 0x%x , type = 0x%x \n",
415 size, type);
416
417 switch (type) {
418 case HAL_CSI_BUF_TYPE_SU:
419 {
420 _os_spinlock(drv_priv, &csi_obj->csi_lock, _ps, NULL);
421 tmp_csi_buf = _query_csi_buf_su(hal_info, size, &sub_idx);
422 _os_spinunlock(drv_priv, &csi_obj->csi_lock, _ps, NULL);
423 }
424 break;
425 case HAL_CSI_BUF_TYPE_MU:
426 {
427 _os_spinlock(drv_priv, &csi_obj->csi_lock, _ps, NULL);
428 tmp_csi_buf = _query_csi_buf_mu(hal_info, size, &sub_idx);
429 _os_spinunlock(drv_priv, &csi_obj->csi_lock, _ps, NULL);
430 }
431 break;
432 default:
433 break;
434 }
435 if (tmp_csi_buf == NULL || sub_idx == CSI_BUF_SUB_IDX_NON) {
436 status = RTW_HAL_STATUS_RESOURCE;
437 PHL_TRACE(COMP_PHL_DBG, _PHL_INFO_, "hal_csi_query_idle_csi_buf Fail\n");
438 } else {
439 csi_buf->idx = tmp_csi_buf->idx;
440 csi_buf->sub_idx = sub_idx;
441 csi_buf->type = type;
442 status = RTW_HAL_STATUS_SUCCESS;
443 }
444
445 FUNCOUT();
446 return status;
447 }
448
449 /**
450 * hal_csi_release_csi_buf
451 * Release the CSI buffer
452 * input :
453 * @hal_info: struct hal_info_t
454 * @buf: (struct hal_csi_buf *)input/return : CSI buffer index to release
455 **/
hal_csi_release_csi_buf(struct hal_info_t * hal_info,void * buf)456 enum rtw_hal_status hal_csi_release_csi_buf(
457 struct hal_info_t *hal_info,
458 void *buf)
459 {
460 struct rtw_hal_com_t *hal_com = hal_info->hal_com;
461 struct hal_csi_obj *csi_obj = (struct hal_csi_obj *)hal_com->csi_obj;
462 void *drv_priv = hal_to_drvpriv(hal_info);
463 enum rtw_hal_status status = RTW_HAL_STATUS_FAILURE;
464 struct hal_csi_buf *tmp_csi_buf = NULL;
465 struct hal_csi_buf *csi_buf = (struct hal_csi_buf *)buf;
466
467 if (csi_buf == NULL) {
468 return status;
469 }
470
471 if (csi_buf->idx < csi_obj->max_csi_buf_nr) {
472 tmp_csi_buf = &csi_obj->csi_buf[csi_buf->idx];
473
474 _os_spinlock(drv_priv, &csi_obj->csi_lock, _ps, NULL);
475
476 switch (csi_buf->sub_idx) {
477 case CSI_BUF_SUB_IDX_80:
478 tmp_csi_buf->sub_idx = 0;
479 break;
480 case CSI_BUF_SUB_IDX_40_U:
481 CLEAR_CSI_STS_BIT(tmp_csi_buf, 3);
482 CLEAR_CSI_STS_BIT(tmp_csi_buf, 2);
483 break;
484 case CSI_BUF_SUB_IDX_40_L:
485 CLEAR_CSI_STS_BIT(tmp_csi_buf, 1);
486 CLEAR_CSI_STS_BIT(tmp_csi_buf, 0);
487 break;
488 case CSI_BUF_SUB_IDX_20_UU:
489 CLEAR_CSI_STS_BIT(tmp_csi_buf, 3);
490 break;
491 case CSI_BUF_SUB_IDX_20_UL:
492 CLEAR_CSI_STS_BIT(tmp_csi_buf, 2);
493 break;
494 case CSI_BUF_SUB_IDX_20_LU:
495 CLEAR_CSI_STS_BIT(tmp_csi_buf, 1);
496 break;
497 case CSI_BUF_SUB_IDX_20_LL:
498 CLEAR_CSI_STS_BIT(tmp_csi_buf, 0);
499 break;
500 default:
501 break;
502 }
503 csi_buf->idx = 0;
504 csi_buf->sub_idx = CSI_BUF_SUB_IDX_NON;
505 _os_spinunlock(drv_priv, &csi_obj->csi_lock, _ps, NULL);
506 status = RTW_HAL_STATUS_SUCCESS;
507 }
508 return status;
509 }
510
511 /**
512 * hal_is_csi_buf_valid : check the csi buffer index is valid or not.
513 * @hal_info: struct hal_info_t
514 * @buf: (struct hal_csi_buf *)input/return : CSI buffer index to release
515 **/
hal_is_csi_buf_valid(struct hal_info_t * hal_info,void * buf)516 u8 hal_is_csi_buf_valid(struct hal_info_t *hal_info, void *buf)
517 {
518 struct hal_csi_buf *csi_buf = (struct hal_csi_buf *)buf;
519 struct rtw_hal_com_t *hal_com = hal_info->hal_com;
520 struct hal_csi_obj *csi_obj = (struct hal_csi_obj *)hal_com->csi_obj;
521
522 u8 ret = _SUCCESS;
523 do {
524 if(csi_buf->idx >= csi_obj->max_csi_buf_nr){
525 ret = _FAIL;
526 break;
527 }
528 if(csi_buf->sub_idx == CSI_BUF_SUB_IDX_NON) {
529 ret = _FAIL;
530 break;
531 }
532 } while(0);
533
534 return ret;
535 }
536
537 /**
538 * rtw_hal_get_csi_buf_bw : Get the csi buf bandwidth;
539 * @buf: (struct hal_csi_buf *)
540 * return
541 * @ret: enum channel_width
542 **/
543 enum channel_width
rtw_hal_get_csi_buf_bw(void * buf)544 rtw_hal_get_csi_buf_bw(void *buf)
545 {
546 struct hal_csi_buf *csi_buf = (struct hal_csi_buf *)buf;
547 enum channel_width bw = CHANNEL_WIDTH_20;
548 switch (csi_buf->sub_idx) {
549 case CSI_BUF_SUB_IDX_80:
550 bw = CHANNEL_WIDTH_80;
551 break;
552 case CSI_BUF_SUB_IDX_40_U:
553 case CSI_BUF_SUB_IDX_40_L:
554 bw = CHANNEL_WIDTH_40;
555 break;
556 case CSI_BUF_SUB_IDX_20_UU:
557 case CSI_BUF_SUB_IDX_20_UL:
558 case CSI_BUF_SUB_IDX_20_LU:
559 case CSI_BUF_SUB_IDX_20_LL:
560 bw = CHANNEL_WIDTH_20;
561 break;
562 case CSI_BUF_SUB_IDX_NON:
563 default:
564 bw = CHANNEL_WIDTH_MAX;
565 break;
566 }
567
568 return bw;
569 }
570
571
572 /**
573 * rtw_hal_get_csi_buf_type : check the csi buffer index is valid or not.
574 * @buf: (struct hal_csi_buf *)
575 * return:
576 * @ret: true = TYPE MU ; false = TYPE SU
577 **/
578 bool
rtw_hal_get_csi_buf_type(void * buf)579 rtw_hal_get_csi_buf_type(void *buf)
580 {
581 struct hal_csi_buf *csi_buf = (struct hal_csi_buf *)buf;
582 bool ret = false;
583
584 if (csi_buf != NULL) {
585 ret = (csi_buf->type == HAL_CSI_BUF_TYPE_MU) ? true : false;
586 }
587
588 return ret;
589 }
590