1 /****************************************************************************** 2 * 3 * Copyright(c) 2019 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 *****************************************************************************/ 15 #ifndef __HAL_BEAMFORM_H__ 16 #define __HAL_BEAMFORM_H__ 17 18 #define BF_MU_IDX_INVALID 0xFF 19 20 #define BF_CAP_HT_BFEE BIT(0) 21 #define BF_CAP_HT_BFER BIT(1) 22 #define BF_CAP_VHT_BFEE BIT(2) 23 #define BF_CAP_VHT_BFER BIT(3) 24 #define BF_CAP_HE_BFEE BIT(4) 25 #define BF_CAP_HE_BFER BIT(5) 26 27 #define IS_SUPPORT_ACT_AS_BFER(_cap) \ 28 (_cap & BF_CAP_HE_BFER) || (_cap & BF_CAP_VHT_BFER) \ 29 || (_cap & BF_CAP_HT_BFER) 30 31 #define IS_SUPPORT_ACT_AS_BFEE(_cap) \ 32 (_cap & BF_CAP_HE_BFEE) || (_cap & BF_CAP_VHT_BFEE) \ 33 || (_cap & BF_CAP_HT_BFEE) 34 35 //B[0:7] = {6M, 9M, 12M, 18M, 24M, 36M, 48M, 54M} 36 //B[8:15] = HT MCS0~MCS7 37 //B[16:23] = VHT 1SSMCS0~MCS7 38 //B[24:31] = HE 1SSMCS0~MCS7 39 enum hal_bf_rrsc_rata { 40 HAL_BF_RRSC_6M = 0, 41 HAL_BF_RRSC_9M = 1, 42 HAL_BF_RRSC_12M, 43 HAL_BF_RRSC_18M, 44 HAL_BF_RRSC_24M, 45 HAL_BF_RRSC_36M, 46 HAL_BF_RRSC_48M, 47 HAL_BF_RRSC_54M, 48 HAL_BF_RRSC_HT_MSC0, 49 HAL_BF_RRSC_HT_MSC1, 50 HAL_BF_RRSC_HT_MSC2, 51 HAL_BF_RRSC_HT_MSC3, 52 HAL_BF_RRSC_HT_MSC4, 53 HAL_BF_RRSC_HT_MSC5, 54 HAL_BF_RRSC_HT_MSC6, 55 HAL_BF_RRSC_HT_MSC7, 56 HAL_BF_RRSC_VHT_MSC0, 57 HAL_BF_RRSC_VHT_MSC1, 58 HAL_BF_RRSC_VHT_MSC2, 59 HAL_BF_RRSC_VHT_MSC3, 60 HAL_BF_RRSC_VHT_MSC4, 61 HAL_BF_RRSC_VHT_MSC5, 62 HAL_BF_RRSC_VHT_MSC6, 63 HAL_BF_RRSC_VHT_MSC7, 64 HAL_BF_RRSC_HE_MSC0, 65 HAL_BF_RRSC_HE_MSC1, 66 HAL_BF_RRSC_HE_MSC2, 67 HAL_BF_RRSC_HE_MSC3, 68 HAL_BF_RRSC_HE_MSC4, 69 HAL_BF_RRSC_HE_MSC5, 70 HAL_BF_RRSC_HE_MSC6, 71 HAL_BF_RRSC_HE_MSC7 = 31, 72 HAL_BF_RRSC_MAX = 32 73 }; 74 75 enum hal_bf_role { 76 HAL_BF_ROLE_BFEE, 77 HAL_BF_ROLE_BFER 78 }; 79 80 enum hal_bfee_type { 81 HAL_BFEE_SU, 82 HAL_BFEE_MU 83 }; 84 85 struct hal_sumu_entry { 86 _os_list list; 87 enum hal_bfee_type type; 88 u8 idx; 89 u8 snd_sts; /*0: Fail or Not Sound, 1: Sound Success*/ 90 }; 91 struct hal_bf_entry { 92 _os_list list; 93 u8 bf_idx; 94 u16 macid; 95 u16 aid12; 96 u8 band; 97 u16 csi_buf; 98 /* csi_buf for swap mode */ 99 bool en_swap; 100 u16 csi_buf_swap; 101 u8 couter; /*for swap*/ 102 struct hal_sumu_entry *bfee; 103 }; 104 105 enum hal_bf_forced_mode{ 106 HAL_BF_FIX_M_DISABLE = 0, 107 HAL_BF_FIX_M_SU = 1, 108 HAL_BF_FIX_M_MU = 2 109 }; 110 struct hal_bf_fixed_m_para { 111 enum hal_bf_forced_mode fix_m; 112 u8 gid; 113 u8 fix_resp; 114 u8 fix_prot; 115 enum rtw_hal_protection_type prot_type; 116 enum rtw_hal_ack_resp_type resp_type; 117 struct rtw_hal_muba_info fix_ba_info; 118 }; 119 120 struct hal_bf_obj { 121 /*tx bf entry*/ 122 u8 max_bf_entry_nr; 123 struct hal_bf_entry *bf_entry; 124 _os_list bf_idle_list; 125 _os_list bf_busy_list; 126 u8 num_idle_bf_entry; 127 128 /*su entry*/ 129 u8 max_su_bfee_nr; 130 struct hal_sumu_entry *su_entry; 131 _os_list su_idle_list; 132 _os_list su_busy_list; 133 u8 num_idle_su_entry; 134 135 /*mu entry*/ 136 u8 max_mu_bfee_nr; 137 struct hal_sumu_entry *mu_entry; 138 _os_list mu_idle_list; 139 _os_list mu_busy_list; 140 u8 num_idle_mu_entry; 141 142 _os_lock bf_lock; 143 144 u8 self_bf_cap[2]; 145 /*for fixed mode*/ 146 struct hal_bf_fixed_m_para fixed_para; 147 }; 148 149 150 enum rtw_hal_status hal_bf_init( 151 struct hal_info_t *hal_info, 152 u8 bf_entry_nr, 153 u8 su_entry_nr, 154 u8 mu_entry_nr); 155 156 void hal_bf_deinit(struct hal_info_t *hal_info); 157 158 159 struct hal_bf_entry * 160 hal_bf_query_idle_bf_entry( 161 struct hal_info_t *hal_info, 162 bool mu); 163 164 165 enum rtw_hal_status 166 hal_bf_release_target_bf_entry( 167 struct hal_info_t *hal_info, 168 void *entry); 169 170 171 enum rtw_hal_status hal_bf_hw_mac_init_bfee( 172 struct hal_info_t *hal_info, 173 u8 band); 174 175 enum rtw_hal_status hal_bf_hw_mac_init_bfer( 176 struct hal_info_t *hal_info, 177 u8 band); 178 179 enum rtw_hal_status hal_bf_set_entry_hwcfg( 180 struct hal_info_t *hal_info, void *entry); 181 182 void hal_bf_update_entry_snd_sts(struct hal_info_t *hal_info, void *entry); 183 184 enum rtw_hal_status hal_bf_cfg_swbf_entry(struct rtw_phl_stainfo_t *sta, 185 bool swap); 186 187 enum rtw_hal_status 188 hal_bf_set_mu_sta_fw(void *hal, struct rtw_phl_stainfo_t *sta); 189 190 enum rtw_hal_status 191 rtw_hal_bf_set_fix_mode(void *hal, bool mu, bool he); 192 193 bool rtw_hal_bf_chk_bf_type(void *hal_info, 194 struct rtw_phl_stainfo_t *sta, bool mu); 195 196 enum rtw_hal_status 197 hal_bf_set_bfee_csi_para(struct hal_info_t *hal_info, bool cr_cctl, 198 struct rtw_phl_stainfo_t *sta); 199 200 #endif 201