1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2020 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 *****************************************************************************/
15 #define _OS_INTFS_C_
16
17 #include <drv_types.h>
18
19 /* module param defaults */
20 int rtw_chip_version = 0x00;
21 int rtw_rfintfs = HWPI;
22 int rtw_lbkmode = 0;/* RTL8712_AIR_TRX; */
23 #ifdef DBG_LA_MODE
24 int rtw_la_mode_en=0;
25 module_param(rtw_la_mode_en, int, 0644);
26 #endif
27 int rtw_network_mode = Ndis802_11IBSS;/* Ndis802_11Infrastructure; */ /* infra, ad-hoc, auto */
28 /* NDIS_802_11_SSID ssid; */
29 int rtw_channel = 36;/* ad-hoc support requirement */
30 int rtw_wireless_mode = WLAN_MD_MAX;
31 int rtw_band_type = BAND_CAP_2G | BAND_CAP_5G | BAND_CAP_6G;
32 module_param(rtw_wireless_mode, int, 0644);
33 module_param(rtw_band_type, int, 0644);
34 #ifdef CONFIG_HW_RTS
35 int rtw_vrtl_carrier_sense = ENABLE_VCS;
36 int rtw_vcs_type = RTS_CTS;
37 int rtw_hw_rts_en = 1;
38 #else
39 int rtw_vrtl_carrier_sense = AUTO_VCS;
40 int rtw_vcs_type = RTS_CTS;
41 int rtw_hw_rts_en = 0;
42 #endif
43 int rtw_rts_thresh = 2347;
44 int rtw_frag_thresh = 2346;
45 int rtw_preamble = PREAMBLE_LONG;/* long, short, auto */
46 int rtw_scan_mode = 1;/* active, passive */
47 /* int smart_ps = 1; */
48 #ifdef CONFIG_POWER_SAVING
49
50 /* LPS configuration */
51 /* RTW_LPS_MODE=0:disable, 1:LPS , 2:LPS with clock gating, 3: power gating */
52 #if (RTW_LPS_MODE > 0)
53 int rtw_power_mgnt = PM_PS_MODE_MAX;
54
55 #ifdef CONFIG_USB_HCI
56 int rtw_lps_level = LPS_NORMAL; /*USB default LPS level*/
57 #else /*SDIO,PCIE*/
58 int rtw_lps_level = (RTW_LPS_MODE - 1);
59 #endif/*CONFIG_USB_HCI*/
60 #else
61 int rtw_power_mgnt = PM_PS_MODE_ACTIVE;
62 int rtw_lps_level = LPS_NORMAL;
63 #endif
64
65 int rtw_lps_chk_by_tp = 1;
66
67 /* WOW LPS configuration */
68 #ifdef CONFIG_WOWLAN
69 /* RTW_WOW_LPS_MODE=0:disable, 1:LPS , 2:LPS with clock gating, 3: power gating */
70 #if (RTW_WOW_LPS_MODE > 0)
71 int rtw_wow_power_mgnt = PM_PS_MODE_MAX;
72 int rtw_wow_lps_level = (RTW_WOW_LPS_MODE - 1);
73 #else
74 int rtw_wow_power_mgnt = PM_PS_MODE_ACTIVE;
75 int rtw_wow_lps_level = LPS_NORMAL;
76 #endif
77 #endif /* CONFIG_WOWLAN */
78
79 #else /* !CONFIG_POWER_SAVING */
80 int rtw_power_mgnt = PM_PS_MODE_ACTIVE;
81 int rtw_lps_level = LPS_NORMAL;
82 int rtw_lps_chk_by_tp = 0;
83 #ifdef CONFIG_WOWLAN
84 int rtw_wow_power_mgnt = PM_PS_MODE_ACTIVE;
85 int rtw_wow_lps_level = LPS_NORMAL;
86 #endif /* CONFIG_WOWLAN */
87 #endif /* CONFIG_POWER_SAVING */
88 #ifdef CONFIG_RTW_IPS
89 int rtw_ips_mode = PS_OP_MODE_AUTO;
90 #else
91 int rtw_ips_mode = PS_OP_MODE_DISABLED;
92 #endif
93 #ifdef CONFIG_RTW_LPS
94 int rtw_lps_mode = PS_OP_MODE_AUTO;
95 #ifndef CONFIG_RTW_LPS_RFOFF
96 int rtw_lps_cap = PS_CAP_PWRON |
97 PS_CAP_RF_OFF |
98 PS_CAP_CLK_GATED |
99 PS_CAP_PWR_GATED;
100 #else
101 int rtw_lps_cap = PS_CAP_PWRON |
102 PS_CAP_RF_OFF;
103 #endif
104 #else
105 int rtw_lps_mode = PS_OP_MODE_DISABLED;
106 int rtw_lps_cap = PS_CAP_PWRON;
107 #endif
108
109 #ifdef CONFIG_NARROWBAND_SUPPORTING
110 int rtw_nb_config = CONFIG_NB_VALUE;
111 module_param(rtw_nb_config, int, 0644);
112 MODULE_PARM_DESC(rtw_nb_config, "5M/10M/Normal bandwidth configuration");
113 #endif
114
115 module_param(rtw_ips_mode, int, 0644);
116 MODULE_PARM_DESC(rtw_ips_mode, "The default IPS mode");
117
118 module_param(rtw_lps_mode, int, 0644);
119 MODULE_PARM_DESC(rtw_lps_mode, "The default LPS mode");
120
121
122 module_param(rtw_lps_cap, int, 0644);
123 MODULE_PARM_DESC(rtw_lps_cap, "The default LPS cap");
124
125 #ifdef CONFIG_LPS_1T1R
126 int rtw_lps_1t1r = RTW_LPS_1T1R;
127 module_param(rtw_lps_1t1r, int, 0644);
128 MODULE_PARM_DESC(rtw_lps_1t1r, "The default LPS 1T1R setting");
129 #endif
130
131 module_param(rtw_lps_chk_by_tp, int, 0644);
132
133 #ifdef CONFIG_WOWLAN
134 module_param(rtw_wow_power_mgnt, int, 0644);
135 MODULE_PARM_DESC(rtw_wow_power_mgnt, "The default WOW LPS mode");
136 module_param(rtw_wow_lps_level, int, 0644);
137 MODULE_PARM_DESC(rtw_wow_lps_level, "The default WOW LPS level");
138 #ifdef CONFIG_LPS_1T1R
139 int rtw_wow_lps_1t1r = RTW_WOW_LPS_1T1R;
140 module_param(rtw_wow_lps_1t1r, int, 0644);
141 MODULE_PARM_DESC(rtw_wow_lps_1t1r, "The default WOW LPS 1T1R setting");
142 #endif
143 #endif /* CONFIG_WOWLAN */
144
145 /* LPS:
146 * rtw_smart_ps = 0 => TX: pwr bit = 1, RX: PS_Poll
147 * rtw_smart_ps = 1 => TX: pwr bit = 0, RX: PS_Poll
148 * rtw_smart_ps = 2 => TX: pwr bit = 0, RX: NullData with pwr bit = 0
149 */
150 int rtw_smart_ps = 2;
151
152 int rtw_max_bss_cnt = 0;
153 module_param(rtw_max_bss_cnt, int, 0644);
154 #ifdef CONFIG_WMMPS_STA
155 /* WMMPS:
156 * rtw_smart_ps = 0 => Only for fw test
157 * rtw_smart_ps = 1 => Refer to Beacon's TIM Bitmap
158 * rtw_smart_ps = 2 => Don't refer to Beacon's TIM Bitmap
159 */
160 int rtw_wmm_smart_ps = 2;
161 #endif /* CONFIG_WMMPS_STA */
162
163 int rtw_check_fw_ps = 1;
164
165 #ifdef CONFIG_TX_EARLY_MODE
166 int rtw_early_mode = 1;
167 #endif
168
169 int rtw_usb_rxagg_mode = 2;/* RX_AGG_DMA=1, RX_AGG_USB=2 */
170 module_param(rtw_usb_rxagg_mode, int, 0644);
171
172 int rtw_dynamic_agg_enable = 1;
173 module_param(rtw_dynamic_agg_enable, int, 0644);
174
175 /* set log level when inserting driver module, default log level is _DRV_INFO_ = 4,
176 * please refer to "How_to_set_driver_debug_log_level.doc" to set the available level.
177 */
178 #ifdef CONFIG_RTW_DEBUG
179 #ifdef RTW_LOG_LEVEL
180 uint rtw_drv_log_level = (uint)RTW_LOG_LEVEL; /* from Makefile */
181 #else
182 uint rtw_drv_log_level = _DRV_INFO_;
183 #endif
184 module_param(rtw_drv_log_level, uint, 0644);
185 MODULE_PARM_DESC(rtw_drv_log_level, "set log level when insert driver module, default log level is _DRV_INFO_ = 4");
186 #endif
187 int rtw_radio_enable = 1;
188 int rtw_long_retry_lmt = 7;
189 int rtw_short_retry_lmt = 7;
190 int rtw_busy_thresh = 40;
191 /* int qos_enable = 0; */ /* * */
192 int rtw_ack_policy = NORMAL_ACK;
193
194 int rtw_mp_mode = 0;
195
196 #if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTW_CUSTOMER_STR)
197 uint rtw_mp_customer_str = 0;
198 module_param(rtw_mp_customer_str, uint, 0644);
199 MODULE_PARM_DESC(rtw_mp_customer_str, "Whether or not to enable customer str support on MP mode");
200 #endif
201
202 int rtw_software_encrypt = 0;
203 int rtw_software_decrypt = 0;
204
205 int rtw_acm_method = 0;/* 0:By SW 1:By HW. */
206
207 int rtw_wmm_enable = 1;/* default is set to enable the wmm. */
208
209 #ifdef CONFIG_WMMPS_STA
210 /* uapsd (unscheduled automatic power-save delivery) = a kind of wmmps */
211 /* 0: NO_LIMIT, 1: TWO_MSDU, 2: FOUR_MSDU, 3: SIX_MSDU */
212 int rtw_uapsd_max_sp = NO_LIMIT;
213 /* BIT0: AC_VO UAPSD, BIT1: AC_VI UAPSD, BIT2: AC_BK UAPSD, BIT3: AC_BE UAPSD */
214 int rtw_uapsd_ac_enable = 0x0;
215 #endif /* CONFIG_WMMPS_STA */
216
217 #if defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C)
218 /*PHYDM API, must enable by default*/
219 int rtw_pwrtrim_enable = 1;
220 #else
221 int rtw_pwrtrim_enable = 0; /* Default Enalbe power trim by efuse config */
222 #endif
223
224 uint rtw_tx_bw_mode = 0x21;
225 module_param(rtw_tx_bw_mode, uint, 0644);
226 MODULE_PARM_DESC(rtw_tx_bw_mode, "The max tx bw for 2.4G and 5G. format is the same as rtw_bw_mode");
227
228
229 #ifdef CONFIG_80211N_HT
230 int rtw_ht_enable = 1;
231 /* 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160MHz, 4: 80+80MHz
232 * 2.4G use bit 0 ~ 3, 5G use bit 4 ~ 7
233 * 0x21 means enable 2.4G 40MHz & 5G 80MHz */
234 #ifdef CONFIG_RTW_CUSTOMIZE_BWMODE
235 int rtw_bw_mode = CONFIG_RTW_CUSTOMIZE_BWMODE;
236 #else
237 int rtw_bw_mode = ((BW_CAP_80M | BW_CAP_40M | BW_CAP_20M) << 4 ) | (BW_CAP_40M | BW_CAP_20M);
238 #endif
239
240 int rtw_ampdu_enable = 1;/* for enable tx_ampdu , */ /* 0: disable, 0x1:enable */
241
242 int rtw_rx_ampdu_amsdu = 2;/* 0: disabled, 1:enabled, 2:auto . There is an IOT issu with DLINK DIR-629 when the flag turn on */
243
244 /* 10.12 A-MSDU operation
245 * HT - 0: 3839, 1: 7935 octets - Maximum A-MSDU Length
246 * VHT - 0: 3895, 1: 7991, 2:11454 octets - Maximum MPDU Length
247 */
248 #ifdef CONFIG_RTW_REDUCE_MEM
249 /* Rxbuf is limited to 8192 */
250 int rtw_max_amsdu_len = 1;
251 #else
252 int rtw_max_amsdu_len = 1;
253 #endif
254
255 module_param(rtw_max_amsdu_len, uint, 0644);
256
257 /*
258 * 2: Follow the AMSDU filed in ADDBA Resp. (Deault)
259 * 0: Force the AMSDU filed in ADDBA Resp. to be disabled.
260 * 1: Force the AMSDU filed in ADDBA Resp. to be enabled.
261 */
262 int rtw_tx_ampdu_amsdu = 2;
263
264 int rtw_quick_addba_req = 0;
265
266 static uint rtw_rx_ampdu_sz_limit_1ss[4] = CONFIG_RTW_RX_AMPDU_SZ_LIMIT_1SS;
267 static uint rtw_rx_ampdu_sz_limit_1ss_num = 0;
268 module_param_array(rtw_rx_ampdu_sz_limit_1ss, uint, &rtw_rx_ampdu_sz_limit_1ss_num, 0644);
269 MODULE_PARM_DESC(rtw_rx_ampdu_sz_limit_1ss, "RX AMPDU size limit for 1SS link of each BW, 0xFF: no limitation");
270
271 static uint rtw_rx_ampdu_sz_limit_2ss[4] = CONFIG_RTW_RX_AMPDU_SZ_LIMIT_2SS;
272 static uint rtw_rx_ampdu_sz_limit_2ss_num = 0;
273 module_param_array(rtw_rx_ampdu_sz_limit_2ss, uint, &rtw_rx_ampdu_sz_limit_2ss_num, 0644);
274 MODULE_PARM_DESC(rtw_rx_ampdu_sz_limit_2ss, "RX AMPDU size limit for 2SS link of each BW, 0xFF: no limitation");
275
276 static uint rtw_rx_ampdu_sz_limit_3ss[4] = CONFIG_RTW_RX_AMPDU_SZ_LIMIT_3SS;
277 static uint rtw_rx_ampdu_sz_limit_3ss_num = 0;
278 module_param_array(rtw_rx_ampdu_sz_limit_3ss, uint, &rtw_rx_ampdu_sz_limit_3ss_num, 0644);
279 MODULE_PARM_DESC(rtw_rx_ampdu_sz_limit_3ss, "RX AMPDU size limit for 3SS link of each BW, 0xFF: no limitation");
280
281 static uint rtw_rx_ampdu_sz_limit_4ss[4] = CONFIG_RTW_RX_AMPDU_SZ_LIMIT_4SS;
282 static uint rtw_rx_ampdu_sz_limit_4ss_num = 0;
283 module_param_array(rtw_rx_ampdu_sz_limit_4ss, uint, &rtw_rx_ampdu_sz_limit_4ss_num, 0644);
284 MODULE_PARM_DESC(rtw_rx_ampdu_sz_limit_4ss, "RX AMPDU size limit for 4SS link of each BW, 0xFF: no limitation");
285
286 /* Short GI support Bit Map
287 * BIT0 - 20MHz, 0: non-support, 1: support
288 * BIT1 - 40MHz, 0: non-support, 1: support
289 * BIT2 - 80MHz, 0: non-support, 1: support
290 * BIT3 - 160MHz, 0: non-support, 1: support */
291 int rtw_short_gi = 0xf;
292 /* BIT0: Enable VHT LDPC Rx, BIT1: Enable VHT LDPC Tx
293 * BIT2: Enable HE LDPC Rx, BIT3: Enable HE LDPC Tx
294 * BIT4: Enable HT LDPC Rx, BIT5: Enable HT LDPC Tx
295 */
296 int rtw_ldpc_cap = 0x3f;
297 /* BIT0: Enable VHT STBC Rx, BIT1: Enable VHT STBC Tx
298 * BIT4: Enable HT STBC Rx, BIT5: Enable HT STBC Tx
299 * BIT8: Enable HE STBC Rx, BIT9: Enable HE STBC Rx(greater than 80M)
300 * BIT10: Enable HE STBC Tx, BIT11: Enable HE STBC Tx(greater than 80M)
301 */
302 int rtw_stbc_cap = 0x133;
303 #endif /* CONFIG_80211N_HT */
304
305 #ifdef CONFIG_BEAMFORMING
306 /*
307 * BIT0: Enable VHT SU Beamformer
308 * BIT1: Enable VHT SU Beamformee
309 * BIT2: Enable VHT MU Beamformer, depend on VHT SU Beamformer
310 * BIT3: Enable VHT MU Beamformee, depend on VHT SU Beamformee
311 * BIT4: Enable HT Beamformer
312 * BIT5: Enable HT Beamformee
313 * BIT6: Enable HE SU Beamformer
314 * BIT7: Enable HE SU Beamformee
315 * BIT8: Enable HE MU Beamformer
316 * BIT9: Enable HE MU Beamformee
317 */
318 int rtw_beamform_cap = BIT(1) | BIT(7); /* For sw role BF cap. */
319 int rtw_sw_proto_bf_cap_phy0 = BIT(1) | BIT(7);
320 int rtw_sw_proto_bf_cap_phy1 = BIT(1) | BIT(7);
321 int rtw_dyn_txbf = 1;
322 int rtw_bfer_rf_number = 0; /*BeamformerCapRfNum Rf path number, 0 for auto, others for manual*/
323 int rtw_bfee_rf_number = 0; /*BeamformeeCapRfNum Rf path number, 0 for auto, others for manual*/
324 #endif
325
326 #ifdef CONFIG_80211AC_VHT
327 int rtw_vht_enable = 1; /* 0:disable, 1:enable, 2:force auto enable */
328 module_param(rtw_vht_enable, int, 0644);
329
330 int rtw_vht_24g_enable = 0; /* 0:disable, 1:enable */
331 module_param(rtw_vht_24g_enable, int, 0644);
332
333 int rtw_ampdu_factor = 7;
334
335 uint rtw_vht_rx_mcs_map = 0xaaaa;
336 module_param(rtw_vht_rx_mcs_map, uint, 0644);
337 MODULE_PARM_DESC(rtw_vht_rx_mcs_map, "VHT RX MCS map");
338 #endif /* CONFIG_80211AC_VHT */
339
340 #ifdef CONFIG_80211AX_HE
341 int rtw_he_enable = 1; /* 0:disable, 1:enable, 2:force auto enable */
342 module_param(rtw_he_enable, int, 0644);
343 #endif
344
345 int rtw_lowrate_two_xmit = 1;/* Use 2 path Tx to transmit MCS0~7 and legacy mode */
346
347
348 /* 0: not check in watch dog, 1: check in watch dog */
349 int rtw_check_hw_status = 0;
350
351 int rtw_low_power = 0;
352 int rtw_wifi_spec = 0;
353
354 #ifdef CONFIG_SPECIAL_RF_PATH /* configure Nss/xTxR IC to 1ss/1T1R */
355 int rtw_rf_path = RF_1T1R;
356 int rtw_tx_nss = 1;
357 int rtw_rx_nss = 1;
358 #else
359 int rtw_rf_path = RF_TYPE_MAX;
360 int rtw_tx_nss = 0;
361 int rtw_rx_nss = 0;
362 #endif
363 module_param(rtw_rf_path, int, 0644);
364 module_param(rtw_tx_nss, int, 0644);
365 module_param(rtw_rx_nss, int, 0644);
366
367 #ifdef CONFIG_REGD_SRC_FROM_OS
368 static uint rtw_regd_src = CONFIG_RTW_REGD_SRC;
369 module_param(rtw_regd_src, uint, 0644);
370 MODULE_PARM_DESC(rtw_regd_src, "The default regd source selection, 0:Realtek defined, 1: OS");
371 #endif
372
373 char rtw_country_unspecified[] = {0xFF, 0xFF, 0x00};
374 char *rtw_country_code = rtw_country_unspecified;
375 module_param(rtw_country_code, charp, 0644);
376 MODULE_PARM_DESC(rtw_country_code, "The default country code (in alpha2)");
377
378 uint rtw_channel_plan = CONFIG_RTW_CHPLAN;
379 module_param(rtw_channel_plan, uint, 0644);
380 MODULE_PARM_DESC(rtw_channel_plan, "The default chplan ID when rtw_alpha2 is not specified or valid");
381
382 static uint rtw_excl_chs[MAX_CHANNEL_NUM_2G_5G] = CONFIG_RTW_EXCL_CHS;
383 static int rtw_excl_chs_num = 0;
384 module_param_array(rtw_excl_chs, uint, &rtw_excl_chs_num, 0644);
385 MODULE_PARM_DESC(rtw_excl_chs, "exclusive channel array");
386
387 #if CONFIG_IEEE80211_BAND_6GHZ
388 uint rtw_channel_plan_6g = CONFIG_RTW_CHPLAN_6G;
389 module_param(rtw_channel_plan_6g, uint, 0644);
390 MODULE_PARM_DESC(rtw_channel_plan_6g, "The default chplan_6g ID when rtw_alpha2 is not specified or valid");
391
392 static uint rtw_excl_chs_6g[MAX_CHANNEL_NUM_6G] = CONFIG_RTW_EXCL_CHS_6G;
393 static int rtw_excl_chs_6g_num = 0;
394 module_param_array(rtw_excl_chs_6g, uint, &rtw_excl_chs_6g_num, 0644);
395 MODULE_PARM_DESC(rtw_excl_chs_6g, "exclusive channel array");
396 #endif /* CONFIG_IEEE80211_BAND_6GHZ */
397
398 #ifdef CONFIG_80211D
399 static uint rtw_country_ie_slave_en_role = CONFIG_RTW_COUNTRY_IE_SLAVE_EN_ROLE;
400 module_param(rtw_country_ie_slave_en_role, uint, 0644);
401 MODULE_PARM_DESC(rtw_country_ie_slave_en_role, "802.11d country IE slave enable role: BIT0:pure STA mode, BIT1:P2P group client");
402
403 static uint rtw_country_ie_slave_en_ifbmp = CONFIG_RTW_COUNTRY_IE_SLAVE_EN_IFBMP;
404 module_param(rtw_country_ie_slave_en_ifbmp, uint, 0644);
405 MODULE_PARM_DESC(rtw_country_ie_slave_en_ifbmp, "802.11d country IE slave enable iface bitmap");
406 #endif
407
408 /*if concurrent softap + p2p(GO) is needed, this param lets p2p response full channel list.
409 But Softap must be SHUT DOWN once P2P decide to set up connection and become a GO.*/
410 #ifdef CONFIG_FULL_CH_IN_P2P_HANDSHAKE
411 int rtw_full_ch_in_p2p_handshake = 1; /* reply full channel list*/
412 #else
413 int rtw_full_ch_in_p2p_handshake = 0; /* reply only softap channel*/
414 #endif
415
416 #ifdef CONFIG_BTC
417 int rtw_btcoex_enable = 2;
418 module_param(rtw_btcoex_enable, int, 0644);
419 MODULE_PARM_DESC(rtw_btcoex_enable, "BT co-existence on/off, 0:off, 1:on, 2:by efuse");
420
421 int rtw_ant_num = 0;
422 module_param(rtw_ant_num, int, 0644);
423 MODULE_PARM_DESC(rtw_ant_num, "Antenna number setting, 0:by efuse");
424
425 int rtw_bt_iso = 2;/* 0:Low, 1:High, 2:From Efuse */
426 int rtw_bt_sco = 3;/* 0:Idle, 1:None-SCO, 2:SCO, 3:From Counter, 4.Busy, 5.OtherBusy */
427 int rtw_bt_ampdu = 1 ; /* 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU. */
428 #endif /* CONFIG_BTC */
429
430 int rtw_AcceptAddbaReq = _TRUE;/* 0:Reject AP's Add BA req, 1:Accept AP's Add BA req. */
431
432 int rtw_antdiv_cfg = 2; /* 0:OFF , 1:ON, 2:decide by Efuse config */
433 int rtw_antdiv_type = 0; /* 0:decide by efuse 1: for 88EE, 1Tx and 1RxCG are diversity.(2 Ant with SPDT), 2: for 88EE, 1Tx and 2Rx are diversity.( 2 Ant, Tx and RxCG are both on aux port, RxCS is on main port ), 3: for 88EE, 1Tx and 1RxCG are fixed.(1Ant, Tx and RxCG are both on aux port) */
434
435 int rtw_drv_ant_band_switch = 1; /* 0:OFF , 1:ON, Driver control antenna band switch*/
436
437 int rtw_single_ant_path; /*0:main ant , 1:aux ant , Fixed single antenna path, default main ant*/
438
439 /* 0: doesn't switch, 1: switch to usb 3.0 , 2: switch to usb 2.0 */
440 int rtw_switch_usb_mode = 0;
441
442
443
444 #ifdef CONFIG_HW_PWRP_DETECTION
445 int rtw_hwpwrp_detect = 1;
446 #else
447 int rtw_hwpwrp_detect = 0; /* HW power ping detect 0:disable , 1:enable */
448 #endif
449
450 #ifdef CONFIG_USB_HCI
451 int rtw_hw_wps_pbc = 1;
452 #else
453 int rtw_hw_wps_pbc = 0;
454 #endif
455
456 #ifdef CONFIG_PCI_ASPM
457 /* CLK_REQ:BIT0 L0s:BIT1 ASPM_L1:BIT2 L1Off:BIT3*/
458 int rtw_pci_aspm_enable = 0x5;
459 #else
460 int rtw_pci_aspm_enable;
461 #endif
462
463 /*
464 * BIT [15:12] mask of ps mode
465 * BIT [11:8] val of ps mode
466 * BIT [7:4] mask of perf mode
467 * BIT [3:0] val of perf mode
468 *
469 * L0s:BIT[+0] L1:BIT[+1]
470 *
471 * 0x0030: change value only if perf mode
472 * 0x3300: change value only if ps mode
473 * 0x3330: change value in both perf and ps mode
474 */
475 #ifdef CONFIG_PCI_DYNAMIC_ASPM
476 #ifdef CONFIG_PCI_ASPM
477 int rtw_pci_dynamic_aspm_linkctrl = 0x3330;
478 #else
479 int rtw_pci_dynamic_aspm_linkctrl = 0x0030;
480 #endif
481 #else
482 int rtw_pci_dynamic_aspm_linkctrl = 0x0000;
483 #endif
484 module_param(rtw_pci_dynamic_aspm_linkctrl, int, 0644);
485
486 #ifdef CONFIG_QOS_OPTIMIZATION
487 int rtw_qos_opt_enable = 1; /* 0: disable,1:enable */
488 #else
489 int rtw_qos_opt_enable = 0; /* 0: disable,1:enable */
490 #endif
491 module_param(rtw_qos_opt_enable, int, 0644);
492
493 #ifdef CONFIG_RTW_ACS
494 int rtw_acs_auto_scan = 0; /*0:disable, 1:enable*/
495 module_param(rtw_acs_auto_scan, int, 0644);
496
497 int rtw_acs = 1;
498 module_param(rtw_acs, int, 0644);
499 #endif
500
501 char *ifname = "wlan%d";
502 module_param(ifname, charp, 0644);
503 MODULE_PARM_DESC(ifname, "The default name to allocate for first interface");
504
505 #ifdef CONFIG_PLATFORM_ANDROID
506 char *if2name = "p2p%d";
507 #else /* CONFIG_PLATFORM_ANDROID */
508 char *if2name = "wlan%d";
509 #endif /* CONFIG_PLATFORM_ANDROID */
510 module_param(if2name, charp, 0644);
511 MODULE_PARM_DESC(if2name, "The default name to allocate for second interface");
512
513 char *rtw_initmac = 0; /* temp mac address if users want to use instead of the mac address in Efuse */
514
515 #ifdef CONFIG_CONCURRENT_MODE
516
517 #if (CONFIG_IFACE_NUMBER > 2)
518 int rtw_virtual_iface_num = CONFIG_IFACE_NUMBER - 1;
519 module_param(rtw_virtual_iface_num, int, 0644);
520 #else
521 int rtw_virtual_iface_num = 1;
522 #endif
523
524 #if defined(CONFIG_CONCURRENT_MODE) && !RTW_P2P_GROUP_INTERFACE
525 #ifdef CONFIG_P2P
526 #ifdef CONFIG_SEL_P2P_IFACE
527 int rtw_sel_p2p_iface = CONFIG_SEL_P2P_IFACE;
528 #else
529 int rtw_sel_p2p_iface = (CONFIG_RTW_STATIC_NDEV_NUM - 1);
530 #endif
531
532 module_param(rtw_sel_p2p_iface, int, 0644);
533
534 #endif
535 #endif
536
537 #ifdef CONFIG_IGNORE_GO_AND_LOW_RSSI_IN_SCAN_LIST
538 int rtw_ignore_go_in_scan = 1;
539 uint rtw_ignore_low_rssi_in_scan = 30;
540
541 module_param(rtw_ignore_go_in_scan, int, 0644);
542 module_param(rtw_ignore_low_rssi_in_scan, uint, 0644);
543 #endif /*CONFIG_IGNORE_GO_AND_LOW_RSSI_IN_SCAN_LIST*/
544
545 #endif
546
547 /* affect ap/go cw only so far , 0 is no change*/
548 uint rtw_vo_edca = 0;
549 module_param(rtw_vo_edca, uint, 0644);
550
551 #ifdef CONFIG_AP_MODE
552 u8 rtw_bmc_tx_rate = MGN_UNKNOWN;
553
554 #if CONFIG_RTW_AP_DATA_BMC_TO_UC
555 int rtw_ap_src_b2u_flags = CONFIG_RTW_AP_SRC_B2U_FLAGS;
556 module_param(rtw_ap_src_b2u_flags, int, 0644);
557
558 int rtw_ap_fwd_b2u_flags = CONFIG_RTW_AP_FWD_B2U_FLAGS;
559 module_param(rtw_ap_fwd_b2u_flags, int, 0644);
560 #endif /* CONFIG_RTW_AP_DATA_BMC_TO_UC */
561 #endif /* CONFIG_AP_MODE */
562
563 #ifdef CONFIG_RTW_MESH
564 #if CONFIG_RTW_MESH_DATA_BMC_TO_UC
565 int rtw_msrc_b2u_flags = CONFIG_RTW_MSRC_B2U_FLAGS;
566 module_param(rtw_msrc_b2u_flags, int, 0644);
567
568 int rtw_mfwd_b2u_flags = CONFIG_RTW_MFWD_B2U_FLAGS;
569 module_param(rtw_mfwd_b2u_flags, int, 0644);
570 #endif /* CONFIG_RTW_MESH_DATA_BMC_TO_UC */
571 #endif /* CONFIG_RTW_MESH */
572
573 #ifdef RTW_WOW_STA_MIX
574 int rtw_wowlan_sta_mix_mode = 1;
575 #else
576 int rtw_wowlan_sta_mix_mode = 0;
577 #endif
578 module_param(rtw_wowlan_sta_mix_mode, int, 0644);
579 module_param(rtw_pwrtrim_enable, int, 0644);
580 module_param(rtw_initmac, charp, 0644);
581 module_param(rtw_chip_version, int, 0644);
582 module_param(rtw_rfintfs, int, 0644);
583 module_param(rtw_lbkmode, int, 0644);
584 module_param(rtw_network_mode, int, 0644);
585 module_param(rtw_channel, int, 0644);
586 module_param(rtw_mp_mode, int, 0644);
587 module_param(rtw_wmm_enable, int, 0644);
588 #ifdef CONFIG_WMMPS_STA
589 module_param(rtw_uapsd_max_sp, int, 0644);
590 module_param(rtw_uapsd_ac_enable, int, 0644);
591 module_param(rtw_wmm_smart_ps, int, 0644);
592 #endif /* CONFIG_WMMPS_STA */
593 module_param(rtw_vrtl_carrier_sense, int, 0644);
594 module_param(rtw_vcs_type, int, 0644);
595 module_param(rtw_hw_rts_en, int, 0644);
596 module_param(rtw_busy_thresh, int, 0644);
597
598 #ifdef CONFIG_80211N_HT
599 module_param(rtw_ht_enable, int, 0644);
600 module_param(rtw_bw_mode, int, 0644);
601 module_param(rtw_ampdu_enable, int, 0644);
602 module_param(rtw_stbc_cap, int, 0644);
603 module_param(rtw_rx_ampdu_amsdu, int, 0644);
604 module_param(rtw_tx_ampdu_amsdu, int, 0644);
605 module_param(rtw_quick_addba_req, int, 0644);
606 #endif /* CONFIG_80211N_HT */
607
608 #ifdef CONFIG_BEAMFORMING
609 module_param(rtw_beamform_cap, int, 0644);
610 module_param(rtw_sw_proto_bf_cap_phy0, int, 0644);
611 module_param(rtw_sw_proto_bf_cap_phy1, int, 0644);
612 module_param(rtw_dyn_txbf, int, 0644);
613 #endif
614 module_param(rtw_lowrate_two_xmit, int, 0644);
615
616 module_param(rtw_power_mgnt, int, 0644);
617 module_param(rtw_smart_ps, int, 0644);
618 module_param(rtw_low_power, int, 0644);
619 module_param(rtw_wifi_spec, int, 0644);
620
621 module_param(rtw_full_ch_in_p2p_handshake, int, 0644);
622 module_param(rtw_antdiv_cfg, int, 0644);
623 module_param(rtw_antdiv_type, int, 0644);
624
625 module_param(rtw_drv_ant_band_switch, int, 0644);
626 module_param(rtw_single_ant_path, int, 0644);
627
628 module_param(rtw_switch_usb_mode, int, 0644);
629
630 module_param(rtw_hwpwrp_detect, int, 0644);
631
632 module_param(rtw_hw_wps_pbc, int, 0644);
633 module_param(rtw_check_hw_status, int, 0644);
634
635 #ifdef CONFIG_PCI_HCI
636 module_param(rtw_pci_aspm_enable, int, 0644);
637 #endif
638
639 #ifdef CONFIG_TX_EARLY_MODE
640 module_param(rtw_early_mode, int, 0644);
641 #endif
642 #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE
643 char *rtw_adaptor_info_caching_file_path = "/data/misc/wifi/rtw_cache";
644 module_param(rtw_adaptor_info_caching_file_path, charp, 0644);
645 MODULE_PARM_DESC(rtw_adaptor_info_caching_file_path, "The path of adapter info cache file");
646 #endif /* CONFIG_ADAPTOR_INFO_CACHING_FILE */
647
648 #ifdef CONFIG_LAYER2_ROAMING
649 uint rtw_max_roaming_times = 2;
650 module_param(rtw_max_roaming_times, uint, 0644);
651 MODULE_PARM_DESC(rtw_max_roaming_times, "The max roaming times to try");
652 #endif /* CONFIG_LAYER2_ROAMING */
653
654 #ifdef CONFIG_FILE_FWIMG
655 char *rtw_fw_file_path = CONFIG_FIRMWARE_PATH; /* "/system/etc/firmware/rtlwifi/FW_NIC.BIN"; */
656
657 module_param(rtw_fw_file_path, charp, 0644);
658 MODULE_PARM_DESC(rtw_fw_file_path, "The path of fw image");
659
660 char *rtw_fw_wow_file_path = "/system/etc/firmware/rtlwifi/FW_WoWLAN.BIN";
661 module_param(rtw_fw_wow_file_path, charp, 0644);
662 MODULE_PARM_DESC(rtw_fw_wow_file_path, "The path of fw for Wake on Wireless image");
663
664 #ifdef CONFIG_MP_INCLUDED
665 char *rtw_fw_mp_bt_file_path = "";
666 module_param(rtw_fw_mp_bt_file_path, charp, 0644);
667 MODULE_PARM_DESC(rtw_fw_mp_bt_file_path, "The path of fw for MP-BT image");
668 #endif /* CONFIG_MP_INCLUDED */
669 #endif /* CONFIG_FILE_FWIMG */
670
671 uint rtw_hiq_filter = CONFIG_RTW_HIQ_FILTER;
672 module_param(rtw_hiq_filter, uint, 0644);
673 MODULE_PARM_DESC(rtw_hiq_filter, "0:allow all, 1:allow special, 2:deny all");
674
675 uint rtw_adaptivity_en = CONFIG_RTW_ADAPTIVITY_EN;
676 module_param(rtw_adaptivity_en, uint, 0644);
677 MODULE_PARM_DESC(rtw_adaptivity_en, "0:disable, 1:enable, 2:auto");
678
679 uint rtw_adaptivity_mode = CONFIG_RTW_ADAPTIVITY_MODE;
680 module_param(rtw_adaptivity_mode, uint, 0644);
681 MODULE_PARM_DESC(rtw_adaptivity_mode, "0:normal, 1:carrier sense");
682
683 int rtw_adaptivity_th_l2h_ini = CONFIG_RTW_ADAPTIVITY_TH_L2H_INI;
684 module_param(rtw_adaptivity_th_l2h_ini, int, 0644);
685 MODULE_PARM_DESC(rtw_adaptivity_th_l2h_ini, "th_l2h_ini for Adaptivity");
686
687 int rtw_adaptivity_th_edcca_hl_diff = CONFIG_RTW_ADAPTIVITY_TH_EDCCA_HL_DIFF;
688 module_param(rtw_adaptivity_th_edcca_hl_diff, int, 0644);
689 MODULE_PARM_DESC(rtw_adaptivity_th_edcca_hl_diff, "th_edcca_hl_diff for Adaptivity");
690
691 #ifdef CONFIG_DFS_MASTER
692 uint rtw_dfs_region_domain = CONFIG_RTW_DFS_REGION_DOMAIN;
693 module_param(rtw_dfs_region_domain, uint, 0644);
694 MODULE_PARM_DESC(rtw_dfs_region_domain, "0:NONE, 1:FCC, 2:MKK, 3:ETSI");
695 #endif
696
697 #ifdef CONFIG_FW_IO_OFLD_SUPPORT
698 uint rtw_fw_ofld_cap = 1;
699 module_param(rtw_fw_ofld_cap, uint, 0644);
700 #endif /*CONFIG_FW_IO_OFLD_SUPPORT*/
701
702 uint rtw_amsdu_mode = RTW_AMSDU_MODE_NON_SPP;
703 module_param(rtw_amsdu_mode, uint, 0644);
704 MODULE_PARM_DESC(rtw_amsdu_mode, "0:non-spp, 1:spp, 2:all drop");
705
706 uint rtw_amplifier_type_2g = CONFIG_RTW_AMPLIFIER_TYPE_2G;
707 module_param(rtw_amplifier_type_2g, uint, 0644);
708 MODULE_PARM_DESC(rtw_amplifier_type_2g, "BIT3:2G ext-PA, BIT4:2G ext-LNA");
709
710 uint rtw_amplifier_type_5g = CONFIG_RTW_AMPLIFIER_TYPE_5G;
711 module_param(rtw_amplifier_type_5g, uint, 0644);
712 MODULE_PARM_DESC(rtw_amplifier_type_5g, "BIT6:5G ext-PA, BIT7:5G ext-LNA");
713
714 uint rtw_rfe_type = CONFIG_RTW_RFE_TYPE;
715 module_param(rtw_rfe_type, uint, 0644);
716 MODULE_PARM_DESC(rtw_rfe_type, "default init value:64");
717
718 #ifdef CONFIG_DBCC_SUPPORT
719 /*0:disable ,1: enable*/
720 int rtw_dbcc_en = 0;
721 module_param(rtw_dbcc_en, int, 0644);
722 MODULE_PARM_DESC(rtw_dbcc_en, "0:Disable, 1:Enable DBCC");
723 #endif
724
725 uint rtw_powertracking_type = 64;
726 module_param(rtw_powertracking_type, uint, 0644);
727 MODULE_PARM_DESC(rtw_powertracking_type, "default init value:64");
728
729 uint rtw_GLNA_type = CONFIG_RTW_GLNA_TYPE;
730 module_param(rtw_GLNA_type, uint, 0644);
731 MODULE_PARM_DESC(rtw_GLNA_type, "default init value:0");
732
733 uint rtw_TxBBSwing_2G = 0xFF;
734 module_param(rtw_TxBBSwing_2G, uint, 0644);
735 MODULE_PARM_DESC(rtw_TxBBSwing_2G, "default init value:0xFF");
736
737 uint rtw_TxBBSwing_5G = 0xFF;
738 module_param(rtw_TxBBSwing_5G, uint, 0644);
739 MODULE_PARM_DESC(rtw_TxBBSwing_5G, "default init value:0xFF");
740
741 uint rtw_OffEfuseMask = 0;
742 module_param(rtw_OffEfuseMask, uint, 0644);
743 MODULE_PARM_DESC(rtw_OffEfuseMask, "default open Efuse Mask value:0");
744
745 uint rtw_FileMaskEfuse = 0;
746 module_param(rtw_FileMaskEfuse, uint, 0644);
747 MODULE_PARM_DESC(rtw_FileMaskEfuse, "default drv Mask Efuse value:0");
748
749 uint rtw_rxgain_offset_2g = 0;
750 module_param(rtw_rxgain_offset_2g, uint, 0644);
751 MODULE_PARM_DESC(rtw_rxgain_offset_2g, "default RF Gain 2G Offset value:0");
752
753 uint rtw_rxgain_offset_5gl = 0;
754 module_param(rtw_rxgain_offset_5gl, uint, 0644);
755 MODULE_PARM_DESC(rtw_rxgain_offset_5gl, "default RF Gain 5GL Offset value:0");
756
757 uint rtw_rxgain_offset_5gm = 0;
758 module_param(rtw_rxgain_offset_5gm, uint, 0644);
759 MODULE_PARM_DESC(rtw_rxgain_offset_5gm, "default RF Gain 5GM Offset value:0");
760
761 uint rtw_rxgain_offset_5gh = 0;
762 module_param(rtw_rxgain_offset_5gh, uint, 0644);
763 MODULE_PARM_DESC(rtw_rxgain_offset_5gm, "default RF Gain 5GL Offset value:0");
764
765 uint rtw_pll_ref_clk_sel = CONFIG_RTW_PLL_REF_CLK_SEL;
766 module_param(rtw_pll_ref_clk_sel, uint, 0644);
767 MODULE_PARM_DESC(rtw_pll_ref_clk_sel, "force pll_ref_clk_sel, 0xF:use autoload value");
768
769 int rtw_tx_pwr_by_rate = CONFIG_TXPWR_BY_RATE_EN;
770 module_param(rtw_tx_pwr_by_rate, int, 0644);
771 MODULE_PARM_DESC(rtw_tx_pwr_by_rate, "0:Disable, 1:Enable, 2: Depend on efuse");
772
773 #if CONFIG_TXPWR_LIMIT
774 int rtw_tx_pwr_lmt_enable = CONFIG_TXPWR_LIMIT_EN;
775 module_param(rtw_tx_pwr_lmt_enable, int, 0644);
776 MODULE_PARM_DESC(rtw_tx_pwr_lmt_enable, "0:Disable, 1:Enable, 2: Depend on efuse");
777 #endif
778
779 static int rtw_target_tx_pwr_2g_a[RATE_SECTION_NUM] = CONFIG_RTW_TARGET_TX_PWR_2G_A;
780 static int rtw_target_tx_pwr_2g_a_num = 0;
781 module_param_array(rtw_target_tx_pwr_2g_a, int, &rtw_target_tx_pwr_2g_a_num, 0644);
782 MODULE_PARM_DESC(rtw_target_tx_pwr_2g_a, "2.4G target tx power (unit:dBm) of RF path A for each rate section, should match the real calibrate power, -1: undefined");
783
784 static int rtw_target_tx_pwr_2g_b[RATE_SECTION_NUM] = CONFIG_RTW_TARGET_TX_PWR_2G_B;
785 static int rtw_target_tx_pwr_2g_b_num = 0;
786 module_param_array(rtw_target_tx_pwr_2g_b, int, &rtw_target_tx_pwr_2g_b_num, 0644);
787 MODULE_PARM_DESC(rtw_target_tx_pwr_2g_b, "2.4G target tx power (unit:dBm) of RF path B for each rate section, should match the real calibrate power, -1: undefined");
788
789 static int rtw_target_tx_pwr_2g_c[RATE_SECTION_NUM] = CONFIG_RTW_TARGET_TX_PWR_2G_C;
790 static int rtw_target_tx_pwr_2g_c_num = 0;
791 module_param_array(rtw_target_tx_pwr_2g_c, int, &rtw_target_tx_pwr_2g_c_num, 0644);
792 MODULE_PARM_DESC(rtw_target_tx_pwr_2g_c, "2.4G target tx power (unit:dBm) of RF path C for each rate section, should match the real calibrate power, -1: undefined");
793
794 static int rtw_target_tx_pwr_2g_d[RATE_SECTION_NUM] = CONFIG_RTW_TARGET_TX_PWR_2G_D;
795 static int rtw_target_tx_pwr_2g_d_num = 0;
796 module_param_array(rtw_target_tx_pwr_2g_d, int, &rtw_target_tx_pwr_2g_d_num, 0644);
797 MODULE_PARM_DESC(rtw_target_tx_pwr_2g_d, "2.4G target tx power (unit:dBm) of RF path D for each rate section, should match the real calibrate power, -1: undefined");
798
799 #if CONFIG_IEEE80211_BAND_5GHZ
800 static int rtw_target_tx_pwr_5g_a[RATE_SECTION_NUM - 1] = CONFIG_RTW_TARGET_TX_PWR_5G_A;
801 static int rtw_target_tx_pwr_5g_a_num = 0;
802 module_param_array(rtw_target_tx_pwr_5g_a, int, &rtw_target_tx_pwr_5g_a_num, 0644);
803 MODULE_PARM_DESC(rtw_target_tx_pwr_5g_a, "5G target tx power (unit:dBm) of RF path A for each rate section, should match the real calibrate power, -1: undefined");
804
805 static int rtw_target_tx_pwr_5g_b[RATE_SECTION_NUM - 1] = CONFIG_RTW_TARGET_TX_PWR_5G_B;
806 static int rtw_target_tx_pwr_5g_b_num = 0;
807 module_param_array(rtw_target_tx_pwr_5g_b, int, &rtw_target_tx_pwr_5g_b_num, 0644);
808 MODULE_PARM_DESC(rtw_target_tx_pwr_5g_b, "5G target tx power (unit:dBm) of RF path B for each rate section, should match the real calibrate power, -1: undefined");
809
810 static int rtw_target_tx_pwr_5g_c[RATE_SECTION_NUM - 1] = CONFIG_RTW_TARGET_TX_PWR_5G_C;
811 static int rtw_target_tx_pwr_5g_c_num = 0;
812 module_param_array(rtw_target_tx_pwr_5g_c, int, &rtw_target_tx_pwr_5g_c_num, 0644);
813 MODULE_PARM_DESC(rtw_target_tx_pwr_5g_c, "5G target tx power (unit:dBm) of RF path C for each rate section, should match the real calibrate power, -1: undefined");
814
815 static int rtw_target_tx_pwr_5g_d[RATE_SECTION_NUM - 1] = CONFIG_RTW_TARGET_TX_PWR_5G_D;
816 static int rtw_target_tx_pwr_5g_d_num = 0;
817 module_param_array(rtw_target_tx_pwr_5g_d, int, &rtw_target_tx_pwr_5g_d_num, 0644);
818 MODULE_PARM_DESC(rtw_target_tx_pwr_5g_d, "5G target tx power (unit:dBm) of RF path D for each rate section, should match the real calibrate power, -1: undefined");
819 #endif /* CONFIG_IEEE80211_BAND_5GHZ */
820
821 #ifdef CONFIG_RTW_TX_NPATH_EN
822 /*0:disable ,1: 2path*/
823 int rtw_tx_npath_enable = 1;
824 module_param(rtw_tx_npath_enable, int, 0644);
825 MODULE_PARM_DESC(rtw_tx_npath_enable, "0:Disable, 1:TX-2PATH");
826 #endif
827
828 #ifdef CONFIG_RTW_PATH_DIV
829 /*0:disable ,1: path diversity*/
830 int rtw_path_div_enable = 1;
831 module_param(rtw_path_div_enable, int, 0644);
832 MODULE_PARM_DESC(rtw_path_div_enable, "0:Disable, 1:Enable path diversity");
833 #endif
834
835 #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
836 char *rtw_phy_file_path = REALTEK_CONFIG_PATH;
837 module_param(rtw_phy_file_path, charp, 0644);
838 MODULE_PARM_DESC(rtw_phy_file_path, "The path of phy parameter");
839 /* PHY FILE Bit Map
840 * BIT0 - MAC_REG, 0: non-support, 1: support
841 * BIT1 - BB_PHY_REG, 0: non-support, 1: support
842 * BIT2 - BB_PHY_REG_MP, 0: non-support, 1: support
843 * BIT3 - RF_RADIO, 0: non-support, 1: support
844 * BIT4 - RF_TXPWR_BY_RATE, 0: non-support, 1: support
845 * BIT5 - RF_TXPWR_TRACK, 0: non-support, 1: support
846 * BIT6 - RF_TXPWR_LMT, 0: non-support, 1: support
847 * BIT7 - RF_TXPWR_LMT_RU, 0: non-support, 1: support
848 * BIT8 - BB_PHY_REG_GAIN_FILE 0: non-support, 1: support
849 */
850 int rtw_load_phy_file = (BIT1 | BIT3 | BIT4 | BIT6 | BIT7);
851 module_param(rtw_load_phy_file, int, 0644);
852 MODULE_PARM_DESC(rtw_load_phy_file, "PHY File Bit Map");
853 int rtw_decrypt_phy_file = 0;
854 module_param(rtw_decrypt_phy_file, int, 0644);
855 MODULE_PARM_DESC(rtw_decrypt_phy_file, "Enable Decrypt PHY File");
856 #endif
857
858
859 uint rtw_phydm_ability = 0xffffffff;
860 module_param(rtw_phydm_ability, uint, 0644);
861
862 uint rtw_halrf_ability = 0xffffffff;
863 module_param(rtw_halrf_ability, uint, 0644);
864
865 #ifdef CONFIG_RTW_MESH
866 uint rtw_peer_alive_based_preq = 1;
867 module_param(rtw_peer_alive_based_preq, uint, 0644);
868 MODULE_PARM_DESC(rtw_peer_alive_based_preq,
869 "On demand PREQ will reference peer alive status. 0: Off, 1: On");
870 #endif
871
872 #ifdef CONFIG_RTW_NAPI
873 /*following setting should define NAPI in Makefile
874 enable napi only = 1, disable napi = 0*/
875 int rtw_en_napi = 1;
876 module_param(rtw_en_napi, int, 0644);
877 #ifdef CONFIG_RTW_NAPI_DYNAMIC
878 int rtw_napi_threshold = 100; /* unit: Mbps */
879 module_param(rtw_napi_threshold, int, 0644);
880 #endif /* CONFIG_RTW_NAPI_DYNAMIC */
881 #ifdef CONFIG_RTW_GRO
882 /*following setting should define GRO in Makefile
883 enable gro = 1, disable gro = 0*/
884 int rtw_en_gro = 1;
885 module_param(rtw_en_gro, int, 0644);
886 #endif /* CONFIG_RTW_GRO */
887 #endif /* CONFIG_RTW_NAPI */
888
889 #ifdef RTW_IQK_FW_OFFLOAD
890 int rtw_iqk_fw_offload = 1;
891 #else
892 int rtw_iqk_fw_offload;
893 #endif /* RTW_IQK_FW_OFFLOAD */
894 module_param(rtw_iqk_fw_offload, int, 0644);
895
896 #ifdef RTW_CHANNEL_SWITCH_OFFLOAD
897 int rtw_ch_switch_offload = 0;
898 #else
899 int rtw_ch_switch_offload;
900 #endif /* RTW_CHANNEL_SWITCH_OFFLOAD */
901 module_param(rtw_ch_switch_offload, int, 0644);
902
903 #ifdef CONFIG_TDLS
904 int rtw_en_tdls = 1;
905 module_param(rtw_en_tdls, int, 0644);
906 #endif
907
908 #ifdef CONFIG_FW_OFFLOAD_PARAM_INIT
909 int rtw_fw_param_init = 1;
910 module_param(rtw_fw_param_init, int, 0644);
911 #endif
912
913 #ifdef CONFIG_TDMADIG
914 int rtw_tdmadig_en = 1;
915 /*
916 1:MODE_PERFORMANCE
917 2:MODE_COVERAGE
918 */
919 int rtw_tdmadig_mode = 1;
920 int rtw_dynamic_tdmadig = 0;
921 module_param(rtw_tdmadig_en, int, 0644);
922 module_param(rtw_tdmadig_mode, int, 0644);
923 module_param(rtw_dynamic_tdmadig, int, 0644);
924 #endif/*CONFIG_TDMADIG*/
925
926 /*dynamic RRSR default enable*/
927 int rtw_en_dyn_rrsr = 1;
928 int rtw_rrsr_value = 0xFFFFFFFF;
929 module_param(rtw_en_dyn_rrsr, int, 0644);
930 module_param(rtw_rrsr_value, int, 0644);
931
932 #ifdef CONFIG_WOWLAN
933 /*
934 * 0: disable, 1: enable
935 */
936 uint rtw_wow_enable = 1;
937 module_param(rtw_wow_enable, uint, 0644);
938 /*
939 * bit[0]: magic packet wake up
940 * bit[1]: unucast packet(HW/FW unuicast)
941 * bit[2]: deauth wake up
942 */
943 uint rtw_wakeup_event = RTW_WAKEUP_EVENT;
944 module_param(rtw_wakeup_event, uint, 0644);
945 /*
946 * 0: common WOWLAN
947 * bit[0]: disable BB RF
948 * bit[1]: For wireless remote controller with or without connection
949 */
950 uint rtw_suspend_type = RTW_SUSPEND_TYPE;
951 module_param(rtw_suspend_type, uint, 0644);
952 #endif
953
954 #if defined(ROKU_PRIVATE) && defined(CONFIG_P2P)
955 int rtw_go_hidden_ssid_mode = ALL_HIDE_SSID;
956 module_param(rtw_go_hidden_ssid_mode, int, 0644);
957 #endif
958
959 #ifdef RTW_BUSY_DENY_SCAN
960 uint rtw_scan_interval_thr = BUSY_TRAFFIC_SCAN_DENY_PERIOD;
961 module_param(rtw_scan_interval_thr, uint, 0644);
962 MODULE_PARM_DESC(rtw_scan_interval_thr, "Threshold used to judge if scan " \
963 "request comes from scan UI, unit is ms.");
964 #endif /* RTW_BUSY_DENY_SCAN */
965
966 #ifdef CONFIG_HW_HDR_CONVERSION
967 int rtw_hw_hdr_conv = true;
968 #else
969 int rtw_hw_hdr_conv = false;
970 #endif
971
972 #ifdef CONFIG_MCC_MODE
973 int rtw_mcc_en = _TRUE;
974 module_param(rtw_mcc_en, int, 0644);
975 #endif
976
977 #ifdef CONFIG_RTW_MULTI_AP
978 static int rtw_unassoc_sta_mode_of_stype[UNASOC_STA_SRC_NUM] = CONFIG_RTW_UNASOC_STA_MODE_OF_STYPE;
979 static int rtw_unassoc_sta_mode_of_stype_num = 0;
980 module_param_array(rtw_unassoc_sta_mode_of_stype, int, &rtw_unassoc_sta_mode_of_stype_num, 0644);
981
982 uint rtw_max_unassoc_sta_cnt = 0;
983 module_param(rtw_max_unassoc_sta_cnt, uint, 0644);
984 #endif
985
986 #ifdef CONFIG_IOCTL_CFG80211
987 uint rtw_roch_min_home_dur = 1500;
988 uint rtw_roch_max_away_dur = 500;
989 uint rtw_roch_extend_dur = 500;
990 module_param(rtw_roch_min_home_dur, uint, 0644);
991 module_param(rtw_roch_max_away_dur, uint, 0644);
992 module_param(rtw_roch_extend_dur, uint, 0644);
993 #endif
994
995 uint rtw_scan_pch_ex = 0;
996 module_param(rtw_scan_pch_ex, uint, 0644);
997
rtw_regsty_load_target_tx_power(struct registry_priv * regsty)998 static void rtw_regsty_load_target_tx_power(struct registry_priv *regsty)
999 {
1000 int path, rs;
1001 int *target_tx_pwr;
1002
1003 for (path = RF_PATH_A; path < RF_PATH_MAX; path++) {
1004 if (path == RF_PATH_A)
1005 target_tx_pwr = rtw_target_tx_pwr_2g_a;
1006 else if (path == RF_PATH_B)
1007 target_tx_pwr = rtw_target_tx_pwr_2g_b;
1008 else if (path == RF_PATH_C)
1009 target_tx_pwr = rtw_target_tx_pwr_2g_c;
1010 else if (path == RF_PATH_D)
1011 target_tx_pwr = rtw_target_tx_pwr_2g_d;
1012
1013 for (rs = CCK; rs < RATE_SECTION_NUM; rs++)
1014 regsty->target_tx_pwr_2g[path][rs] = target_tx_pwr[rs];
1015 }
1016
1017 #if CONFIG_IEEE80211_BAND_5GHZ
1018 for (path = RF_PATH_A; path < RF_PATH_MAX; path++) {
1019 if (path == RF_PATH_A)
1020 target_tx_pwr = rtw_target_tx_pwr_5g_a;
1021 else if (path == RF_PATH_B)
1022 target_tx_pwr = rtw_target_tx_pwr_5g_b;
1023 else if (path == RF_PATH_C)
1024 target_tx_pwr = rtw_target_tx_pwr_5g_c;
1025 else if (path == RF_PATH_D)
1026 target_tx_pwr = rtw_target_tx_pwr_5g_d;
1027
1028 for (rs = OFDM; rs < RATE_SECTION_NUM; rs++)
1029 regsty->target_tx_pwr_5g[path][rs - 1] = target_tx_pwr[rs - 1];
1030 }
1031 #endif /* CONFIG_IEEE80211_BAND_5GHZ */
1032 }
1033
rtw_regsty_load_chplan(struct registry_priv * regsty)1034 static inline void rtw_regsty_load_chplan(struct registry_priv *regsty)
1035 {
1036 u16 chplan = RTW_CHPLAN_UNSPECIFIED;
1037 u16 chplan_6g = RTW_CHPLAN_6G_UNSPECIFIED;
1038
1039 chplan = rtw_channel_plan;
1040 #if CONFIG_IEEE80211_BAND_6GHZ
1041 chplan_6g = rtw_channel_plan_6g;
1042 #endif
1043
1044 rtw_chplan_ioctl_input_mapping(&chplan, &chplan_6g);
1045
1046 regsty->channel_plan = chplan;
1047 #if CONFIG_IEEE80211_BAND_6GHZ
1048 regsty->channel_plan_6g = chplan_6g;
1049 #endif
1050 }
1051
rtw_regsty_load_alpha2(struct registry_priv * regsty)1052 static inline void rtw_regsty_load_alpha2(struct registry_priv *regsty)
1053 {
1054 if (strlen(rtw_country_code) != 2
1055 || (!IS_ALPHA2_WORLDWIDE(rtw_country_code)
1056 && (is_alpha(rtw_country_code[0]) == _FALSE
1057 || is_alpha(rtw_country_code[1]) == _FALSE)
1058 )
1059 ) {
1060 if (rtw_country_code != rtw_country_unspecified)
1061 RTW_ERR("%s discard rtw_country_code not in alpha2 or \"%s\"\n", __func__, WORLDWIDE_ALPHA2);
1062 SET_UNSPEC_ALPHA2(regsty->alpha2);
1063 } else
1064 _rtw_memcpy(regsty->alpha2, rtw_country_code, 2);
1065 }
1066
rtw_regsty_load_excl_chs(struct registry_priv * regsty)1067 static inline void rtw_regsty_load_excl_chs(struct registry_priv *regsty)
1068 {
1069 int i;
1070 int ch_num = 0;
1071
1072 for (i = 0; i < MAX_CHANNEL_NUM_2G_5G; i++)
1073 if (((u8)rtw_excl_chs[i]) != 0)
1074 regsty->excl_chs[ch_num++] = (u8)rtw_excl_chs[i];
1075
1076 if (ch_num < MAX_CHANNEL_NUM_2G_5G)
1077 regsty->excl_chs[ch_num] = 0;
1078
1079 #if CONFIG_IEEE80211_BAND_6GHZ
1080 ch_num = 0;
1081 for (i = 0; i < MAX_CHANNEL_NUM_6G; i++)
1082 if (((u8)rtw_excl_chs_6g[i]) != 0)
1083 regsty->excl_chs_6g[ch_num++] = (u8)rtw_excl_chs_6g[i];
1084
1085 if (ch_num < MAX_CHANNEL_NUM_6G)
1086 regsty->excl_chs_6g[ch_num] = 0;
1087 #endif
1088 }
1089
1090 #ifdef CONFIG_80211D
rtw_regsty_load_country_ie_slave_settings(struct registry_priv * regsty)1091 inline void rtw_regsty_load_country_ie_slave_settings(struct registry_priv *regsty)
1092 {
1093 regsty->country_ie_slave_en_role = rtw_country_ie_slave_en_role;
1094 regsty->country_ie_slave_en_ifbmp = rtw_country_ie_slave_en_ifbmp;
1095 }
1096 #endif
1097
1098 #ifdef CONFIG_80211N_HT
rtw_regsty_init_rx_ampdu_sz_limit(struct registry_priv * regsty)1099 static inline void rtw_regsty_init_rx_ampdu_sz_limit(struct registry_priv *regsty)
1100 {
1101 int i, j;
1102 uint *sz_limit;
1103
1104 for (i = 0; i < 4; i++) {
1105 if (i == 0)
1106 sz_limit = rtw_rx_ampdu_sz_limit_1ss;
1107 else if (i == 1)
1108 sz_limit = rtw_rx_ampdu_sz_limit_2ss;
1109 else if (i == 2)
1110 sz_limit = rtw_rx_ampdu_sz_limit_3ss;
1111 else if (i == 3)
1112 sz_limit = rtw_rx_ampdu_sz_limit_4ss;
1113
1114 for (j = 0; j < 4; j++)
1115 regsty->rx_ampdu_sz_limit_by_nss_bw[i][j] = sz_limit[j];
1116 }
1117 }
1118 #endif /* CONFIG_80211N_HT */
1119
1120 #ifdef CONFIG_RTW_MULTI_AP
rtw_regsty_init_unassoc_sta_param(struct registry_priv * regsty)1121 inline void rtw_regsty_init_unassoc_sta_param(struct registry_priv *regsty)
1122 {
1123 int i;
1124
1125 for (i = 0; i < UNASOC_STA_SRC_NUM; i++)
1126 regsty->unassoc_sta_mode_of_stype[i] = rtw_unassoc_sta_mode_of_stype[i];
1127
1128 regsty->max_unassoc_sta_cnt = (u16)rtw_max_unassoc_sta_cnt;
1129 }
1130 #endif
1131
rtw_load_phy_file_path(struct dvobj_priv * dvobj)1132 static void rtw_load_phy_file_path (struct dvobj_priv *dvobj)
1133 {
1134 struct rtw_phl_com_t *phl_com = GET_PHL_COM(dvobj);
1135
1136 #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
1137 if (rtw_load_phy_file & LOAD_BB_PHY_REG_FILE) {
1138 phl_com->phy_sw_cap[0].bb_phy_reg_info.para_src = RTW_PARA_SRC_EXTNAL;
1139 phl_com->phy_sw_cap[1].bb_phy_reg_info.para_src = RTW_PARA_SRC_EXTNAL;
1140 phl_com->phy_sw_cap[0].bb_phy_reg_info.hal_phy_folder = rtw_phy_file_path;
1141 phl_com->phy_sw_cap[1].bb_phy_reg_info.hal_phy_folder = rtw_phy_file_path;
1142 }
1143
1144 if (rtw_load_phy_file & LOAD_RF_RADIO_FILE) {
1145 phl_com->phy_sw_cap[0].rf_radio_a_info.para_src = RTW_PARA_SRC_EXTNAL;
1146 phl_com->phy_sw_cap[1].rf_radio_a_info.para_src = RTW_PARA_SRC_EXTNAL;
1147 phl_com->phy_sw_cap[0].rf_radio_b_info.para_src = RTW_PARA_SRC_EXTNAL;
1148 phl_com->phy_sw_cap[1].rf_radio_b_info.para_src = RTW_PARA_SRC_EXTNAL;
1149 phl_com->phy_sw_cap[0].rf_radio_a_info.hal_phy_folder = rtw_phy_file_path;
1150 phl_com->phy_sw_cap[1].rf_radio_a_info.hal_phy_folder = rtw_phy_file_path;
1151 phl_com->phy_sw_cap[0].rf_radio_b_info.hal_phy_folder = rtw_phy_file_path;
1152 phl_com->phy_sw_cap[1].rf_radio_b_info.hal_phy_folder = rtw_phy_file_path;
1153 }
1154
1155 if (rtw_load_phy_file & LOAD_RF_TXPWR_BY_RATE) {
1156 phl_com->phy_sw_cap[0].rf_txpwr_byrate_info.para_src = RTW_PARA_SRC_EXTNAL;
1157 phl_com->phy_sw_cap[1].rf_txpwr_byrate_info.para_src = RTW_PARA_SRC_EXTNAL;
1158 phl_com->phy_sw_cap[0].rf_txpwr_byrate_info.hal_phy_folder = rtw_phy_file_path;
1159 phl_com->phy_sw_cap[1].rf_txpwr_byrate_info.hal_phy_folder = rtw_phy_file_path;
1160 }
1161
1162 if (rtw_load_phy_file & LOAD_RF_TXPWR_TRACK_FILE) {
1163 phl_com->phy_sw_cap[0].rf_txpwrtrack_info.para_src = RTW_PARA_SRC_EXTNAL;
1164 phl_com->phy_sw_cap[1].rf_txpwrtrack_info.para_src = RTW_PARA_SRC_EXTNAL;
1165 phl_com->phy_sw_cap[0].rf_txpwrtrack_info.hal_phy_folder = rtw_phy_file_path;
1166 phl_com->phy_sw_cap[1].rf_txpwrtrack_info.hal_phy_folder = rtw_phy_file_path;
1167 }
1168
1169 if (rtw_load_phy_file & LOAD_RF_TXPWR_LMT_FILE) {
1170 phl_com->phy_sw_cap[0].rf_txpwrlmt_info.para_src = RTW_PARA_SRC_EXTNAL;
1171 phl_com->phy_sw_cap[1].rf_txpwrlmt_info.para_src = RTW_PARA_SRC_EXTNAL;
1172 phl_com->phy_sw_cap[0].rf_txpwrlmt_info.hal_phy_folder = rtw_phy_file_path;
1173 phl_com->phy_sw_cap[1].rf_txpwrlmt_info.hal_phy_folder = rtw_phy_file_path;
1174 }
1175
1176 if (rtw_load_phy_file & LOAD_RF_TXPWR_LMT_RU_FILE) {
1177 phl_com->phy_sw_cap[0].rf_txpwrlmt_ru_info.para_src = RTW_PARA_SRC_EXTNAL;
1178 phl_com->phy_sw_cap[1].rf_txpwrlmt_ru_info.para_src = RTW_PARA_SRC_EXTNAL;
1179 phl_com->phy_sw_cap[0].rf_txpwrlmt_ru_info.hal_phy_folder = rtw_phy_file_path;
1180 phl_com->phy_sw_cap[1].rf_txpwrlmt_ru_info.hal_phy_folder = rtw_phy_file_path;
1181 }
1182
1183 if (rtw_load_phy_file & LOAD_BB_PHY_REG_GAIN_FILE) {
1184 phl_com->phy_sw_cap[0].bb_phy_reg_gain_info.para_src = RTW_PARA_SRC_EXTNAL;
1185 phl_com->phy_sw_cap[1].bb_phy_reg_gain_info.para_src = RTW_PARA_SRC_EXTNAL;
1186 phl_com->phy_sw_cap[0].bb_phy_reg_gain_info.hal_phy_folder = rtw_phy_file_path;
1187 phl_com->phy_sw_cap[1].bb_phy_reg_gain_info.hal_phy_folder = rtw_phy_file_path;
1188 }
1189 #endif/* CONFIG_LOAD_PHY_PARA_FROM_FILE */
1190 }
1191
rtw_core_update_default_setting(struct dvobj_priv * dvobj)1192 void rtw_core_update_default_setting (struct dvobj_priv *dvobj)
1193 {
1194 struct rtw_phl_com_t *phl_com = GET_PHL_COM(dvobj);
1195
1196 #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
1197 rtw_load_phy_file_path(dvobj);
1198 #endif /* CONFIG_LOAD_PHY_PARA_FROM_FILE */
1199
1200 phl_com->dev_sw_cap.fw_cap.dlram_en = true;
1201 phl_com->dev_sw_cap.fw_cap.dlrom_en = false;
1202 #ifdef CONFIG_FILE_FWIMG
1203 phl_com->dev_sw_cap.fw_cap.fw_src = RTW_FW_SRC_EXTNAL;
1204 #else /* !CONFIG_FILE_FWIMG */
1205 phl_com->dev_sw_cap.fw_cap.fw_src = RTW_FW_SRC_INTNAL;
1206 #endif /* !CONFIG_FILE_FWIMG */
1207
1208 phl_com->phy_sw_cap[0].proto_sup = rtw_wireless_mode;
1209 phl_com->phy_sw_cap[0].band_sup = rtw_band_type;
1210 phl_com->phy_sw_cap[0].bw_sup = BW_CAP_80M | BW_CAP_40M | BW_CAP_20M; //rtw_bw_mode;
1211 phl_com->phy_sw_cap[0].txss = rtw_tx_nss;
1212 phl_com->phy_sw_cap[0].rxss = rtw_rx_nss;
1213
1214 phl_com->phy_sw_cap[1].proto_sup = rtw_wireless_mode;
1215 phl_com->phy_sw_cap[1].band_sup = rtw_band_type;
1216 phl_com->phy_sw_cap[1].bw_sup = rtw_bw_mode;
1217 phl_com->phy_sw_cap[1].txss = rtw_tx_nss;
1218 phl_com->phy_sw_cap[1].rxss = rtw_rx_nss;
1219
1220 phl_com->phy_sw_cap[0].hw_rts_time_th = 88;
1221 phl_com->phy_sw_cap[0].hw_rts_len_th = 4080;
1222 phl_com->phy_sw_cap[1].hw_rts_time_th = 88;
1223 phl_com->phy_sw_cap[1].hw_rts_len_th = 4080;
1224
1225 /*phl_com->dev_sw_cap.pkg_type = rtw_pkg_type;*/
1226 phl_com->dev_sw_cap.rfe_type = rtw_rfe_type;
1227 #ifdef DBG_LA_MODE
1228 phl_com->dev_sw_cap.la_mode = rtw_la_mode_en;
1229 #endif
1230 #ifdef CONFIG_DBCC_SUPPORT
1231 phl_com->dev_sw_cap.dbcc_sup = rtw_dbcc_en;
1232 #endif
1233
1234 phl_com->dev_sw_cap.hw_hdr_conv = rtw_hw_hdr_conv;
1235
1236 phl_com->proto_sw_cap[0].max_amsdu_len = rtw_max_amsdu_len;
1237 phl_com->proto_sw_cap[1].max_amsdu_len = rtw_max_amsdu_len;
1238
1239 #if defined(CONFIG_PCI_HCI)
1240 #if defined(CONFIG_PCI_ASPM)
1241 phl_com->bus_sw_cap.l0s_ctrl = (rtw_pci_aspm_enable & BIT1) ? RTW_PCIE_BUS_FUNC_ENABLE : RTW_PCIE_BUS_FUNC_DISABLE;
1242 phl_com->bus_sw_cap.l1_ctrl = (rtw_pci_aspm_enable & BIT2) ? RTW_PCIE_BUS_FUNC_ENABLE : RTW_PCIE_BUS_FUNC_DISABLE;
1243 phl_com->bus_sw_cap.l1ss_ctrl = (rtw_pci_aspm_enable & BIT3) ? RTW_PCIE_BUS_FUNC_ENABLE : RTW_PCIE_BUS_FUNC_DISABLE;
1244 phl_com->bus_sw_cap.wake_ctrl = RTW_PCIE_BUS_FUNC_DEFAULT;
1245 phl_com->bus_sw_cap.crq_ctrl = (rtw_pci_aspm_enable & BIT0) ? RTW_PCIE_BUS_FUNC_ENABLE : RTW_PCIE_BUS_FUNC_DISABLE;
1246 #else
1247 phl_com->bus_sw_cap.l0s_ctrl = RTW_PCIE_BUS_FUNC_DISABLE;
1248 phl_com->bus_sw_cap.l1_ctrl = RTW_PCIE_BUS_FUNC_DISABLE;
1249 phl_com->bus_sw_cap.l1ss_ctrl = RTW_PCIE_BUS_FUNC_DISABLE;
1250 phl_com->bus_sw_cap.wake_ctrl = RTW_PCIE_BUS_FUNC_DEFAULT;
1251 phl_com->bus_sw_cap.crq_ctrl = RTW_PCIE_BUS_FUNC_DISABLE;
1252 #endif
1253 phl_com->bus_sw_cap.txbd_num = 256;
1254 phl_com->bus_sw_cap.rxbd_num = 256;
1255 phl_com->bus_sw_cap.rpbd_num = 0; /* by default */
1256 #ifdef CONFIG_RXBUF_NUM_1024
1257 phl_com->bus_sw_cap.rxbuf_num = 1024;
1258 #else
1259 phl_com->bus_sw_cap.rxbuf_num = 512;
1260 #endif
1261 phl_com->bus_sw_cap.rpbuf_num = 0; /* by default */
1262
1263 #ifdef CONFIG_PCIE_TRX_MIT_DYN
1264 phl_com->bus_sw_cap.mit_ctl.tx_timer = 0;
1265 phl_com->bus_sw_cap.mit_ctl.tx_counter = 0;
1266 phl_com->bus_sw_cap.mit_ctl.rx_timer = PCIE_RX_INT_MIT_TIMER;
1267 phl_com->bus_sw_cap.mit_ctl.rx_counter = 0;
1268 phl_com->bus_sw_cap.mit_ctl.fixed_mitigation = 0;
1269 #else
1270 phl_com->bus_sw_cap.mit_ctl.tx_timer = 0;
1271 phl_com->bus_sw_cap.mit_ctl.tx_counter = 0;
1272 phl_com->bus_sw_cap.mit_ctl.rx_timer = 0;
1273 phl_com->bus_sw_cap.mit_ctl.rx_counter = 0;
1274 phl_com->bus_sw_cap.mit_ctl.fixed_mitigation = 0;
1275 #endif
1276 #endif /*CONFIG_PCI_HCI*/
1277
1278 #ifdef CONFIG_BTC
1279 phl_com->dev_sw_cap.btc_mode = BTC_MODE_NORMAL;
1280 #else
1281 phl_com->dev_sw_cap.btc_mode = BTC_MODE_WL;
1282 #endif
1283 #ifdef CONFIG_MCC_MODE
1284 phl_com->dev_sw_cap.mcc_sup = rtw_mcc_en;
1285 #endif
1286 #ifdef CONFIG_USB_HCI
1287 phl_com->bus_sw_cap.tx_buf_size = MAX_XMITBUF_SZ;
1288 phl_com->bus_sw_cap.tx_buf_num = NR_XMITBUFF;
1289 phl_com->bus_sw_cap.tx_mgnt_buf_size = MAX_MGNT_XMITBUF_SZ;
1290 phl_com->bus_sw_cap.tx_mgnt_buf_num = NR_MGNT_XMITBUFF;
1291 phl_com->bus_sw_cap.rx_buf_size = MAX_RECVBUF_SZ;
1292 phl_com->bus_sw_cap.rx_buf_num = NR_RECVBUFF;
1293 phl_com->bus_sw_cap.in_token_num = NR_RECV_URB;
1294 #endif
1295 #ifdef CONFIG_SDIO_HCI
1296 #ifdef MAX_XMITBUF_SZ
1297 phl_com->bus_sw_cap.tx_buf_size = MAX_XMITBUF_SZ;
1298 #endif
1299 #ifdef NR_XMITBUFF
1300 phl_com->bus_sw_cap.tx_buf_num = NR_XMITBUFF;
1301 #endif
1302 #ifdef MAX_MGNT_XMITBUF_SZ
1303 phl_com->bus_sw_cap.tx_mgnt_buf_size = MAX_MGNT_XMITBUF_SZ;
1304 #endif
1305 #ifdef NR_MGNT_XMITBUFF
1306 phl_com->bus_sw_cap.tx_mgnt_buf_num = NR_MGNT_XMITBUFF;
1307 #endif
1308 #ifdef MAX_RECVBUF_SZ
1309 phl_com->bus_sw_cap.rx_buf_size = MAX_RECVBUF_SZ;
1310 #endif
1311 #ifdef NR_RECVBUFF
1312 phl_com->bus_sw_cap.rx_buf_num = NR_RECVBUFF;
1313 #endif
1314 #endif /* CONFIG_SDIO_HCI */
1315
1316 /* Set STBC Tx/Rx sw role cap */
1317 phl_com->role_sw_cap.stbc_cap = 0;
1318 phl_com->role_sw_cap.stbc_cap |=
1319 (rtw_stbc_cap & BIT5) ? HW_CAP_STBC_HT_TX : 0;
1320 phl_com->role_sw_cap.stbc_cap |=
1321 (rtw_stbc_cap & BIT1) ? HW_CAP_STBC_VHT_TX : 0;
1322 phl_com->role_sw_cap.stbc_cap |=
1323 (rtw_stbc_cap & BIT10) ? HW_CAP_STBC_HE_TX : 0;
1324 phl_com->role_sw_cap.stbc_cap |=
1325 (rtw_stbc_cap & BIT11) ? HW_CAP_STBC_HE_TX_GT_80M : 0;
1326
1327 phl_com->role_sw_cap.stbc_cap |=
1328 (rtw_stbc_cap & BIT4) ? HW_CAP_STBC_HT_RX : 0;
1329 phl_com->role_sw_cap.stbc_cap |=
1330 (rtw_stbc_cap & BIT0) ? HW_CAP_STBC_VHT_RX : 0;
1331 phl_com->role_sw_cap.stbc_cap |=
1332 (rtw_stbc_cap & BIT8) ? HW_CAP_STBC_HE_RX : 0;
1333 phl_com->role_sw_cap.stbc_cap |=
1334 (rtw_stbc_cap & BIT9) ? HW_CAP_STBC_HE_RX_GT_80M : 0;
1335
1336 /*Band0*/
1337 phl_com->proto_sw_cap[0].stbc_ht_tx = (rtw_stbc_cap & BIT5) ? 1 : 0;
1338 phl_com->proto_sw_cap[0].stbc_vht_tx = (rtw_stbc_cap & BIT1) ? 1 : 0;
1339 phl_com->proto_sw_cap[0].stbc_he_tx = (rtw_stbc_cap & BIT10) ? 1 : 0;
1340 phl_com->proto_sw_cap[0].stbc_tx_greater_80mhz = (rtw_stbc_cap & BIT11) ? 1 : 0;
1341
1342 phl_com->proto_sw_cap[0].stbc_ht_rx = (rtw_stbc_cap & BIT4) ? 1 : 0;
1343 phl_com->proto_sw_cap[0].stbc_vht_rx = (rtw_stbc_cap & BIT0) ? 1 : 0;
1344 phl_com->proto_sw_cap[0].stbc_he_rx = (rtw_stbc_cap & BIT8) ? 1 : 0;
1345 phl_com->proto_sw_cap[0].stbc_rx_greater_80mhz = (rtw_stbc_cap & BIT9) ? 1 : 0;
1346
1347 /*Band1*/
1348 phl_com->proto_sw_cap[1].stbc_ht_tx = (rtw_stbc_cap & BIT5) ? 1 : 0;
1349 phl_com->proto_sw_cap[1].stbc_vht_tx = (rtw_stbc_cap & BIT1) ? 1 : 0;
1350 phl_com->proto_sw_cap[1].stbc_he_tx = (rtw_stbc_cap & BIT10) ? 1 : 0;
1351 phl_com->proto_sw_cap[1].stbc_tx_greater_80mhz = (rtw_stbc_cap & BIT11) ? 1 : 0;
1352
1353 phl_com->proto_sw_cap[1].stbc_ht_rx = (rtw_stbc_cap & BIT4) ? 1 : 0;
1354 phl_com->proto_sw_cap[1].stbc_vht_rx = (rtw_stbc_cap & BIT0) ? 1 : 0;
1355 phl_com->proto_sw_cap[1].stbc_he_rx = (rtw_stbc_cap & BIT8) ? 1 : 0;
1356 phl_com->proto_sw_cap[1].stbc_rx_greater_80mhz = (rtw_stbc_cap & BIT9) ? 1 : 0;
1357
1358 #ifdef CONFIG_BEAMFORMING
1359 phl_com->role_sw_cap.bf_cap = 0;
1360 phl_com->role_sw_cap.bf_cap |= (rtw_beamform_cap & BIT0) ? HW_CAP_BFER_VHT_SU : 0;
1361 phl_com->role_sw_cap.bf_cap |= (rtw_beamform_cap & BIT1) ? HW_CAP_BFEE_VHT_SU: 0;
1362 phl_com->role_sw_cap.bf_cap |= (rtw_beamform_cap & BIT2) ? HW_CAP_BFER_VHT_MU: 0;
1363 phl_com->role_sw_cap.bf_cap |= (rtw_beamform_cap & BIT3) ? HW_CAP_BFEE_VHT_MU: 0;
1364 phl_com->role_sw_cap.bf_cap |= (rtw_beamform_cap & BIT4) ? HW_CAP_BFER_HT_SU: 0;
1365 phl_com->role_sw_cap.bf_cap |= (rtw_beamform_cap & BIT5) ? HW_CAP_BFEE_HT_SU: 0;
1366 phl_com->role_sw_cap.bf_cap |= (rtw_beamform_cap & BIT6) ? HW_CAP_BFER_HE_SU: 0;
1367 phl_com->role_sw_cap.bf_cap |= (rtw_beamform_cap & BIT7) ? HW_CAP_BFEE_HE_SU: 0;
1368 phl_com->role_sw_cap.bf_cap |= (rtw_beamform_cap & BIT8) ? HW_CAP_BFER_HE_MU: 0;
1369 phl_com->role_sw_cap.bf_cap |= (rtw_beamform_cap & BIT9) ? HW_CAP_BFEE_HE_MU: 0;
1370
1371 /*Band0*/
1372 phl_com->proto_sw_cap[0].vht_su_bfmr = (rtw_sw_proto_bf_cap_phy0 & BIT0) ? 1 : 0;
1373 phl_com->proto_sw_cap[0].vht_su_bfme = (rtw_sw_proto_bf_cap_phy0 & BIT1) ? 1 : 0;
1374 phl_com->proto_sw_cap[0].vht_mu_bfmr = (rtw_sw_proto_bf_cap_phy0 & BIT2) ? 1 : 0;
1375 phl_com->proto_sw_cap[0].vht_mu_bfme = (rtw_sw_proto_bf_cap_phy0 & BIT3) ? 1 : 0;
1376 phl_com->proto_sw_cap[0].ht_su_bfmr = (rtw_sw_proto_bf_cap_phy0 & BIT4) ? 1 : 0;
1377 phl_com->proto_sw_cap[0].ht_su_bfme = (rtw_sw_proto_bf_cap_phy0 & BIT5) ? 1 : 0;
1378 phl_com->proto_sw_cap[0].he_su_bfmr = (rtw_sw_proto_bf_cap_phy0 & BIT6) ? 1 : 0;
1379 phl_com->proto_sw_cap[0].he_su_bfme = (rtw_sw_proto_bf_cap_phy0 & BIT7) ? 1 : 0;
1380 phl_com->proto_sw_cap[0].he_mu_bfmr = (rtw_sw_proto_bf_cap_phy0 & BIT8) ? 1 : 0;
1381 phl_com->proto_sw_cap[0].he_mu_bfme = (rtw_sw_proto_bf_cap_phy0 & BIT9) ? 1 : 0;
1382
1383 /*Band1*/
1384 phl_com->proto_sw_cap[1].vht_su_bfmr = (rtw_sw_proto_bf_cap_phy1 & BIT0) ? 1 : 0;
1385 phl_com->proto_sw_cap[1].vht_su_bfme = (rtw_sw_proto_bf_cap_phy1 & BIT1) ? 1 : 0;
1386 phl_com->proto_sw_cap[1].vht_mu_bfmr = (rtw_sw_proto_bf_cap_phy1 & BIT2) ? 1 : 0;
1387 phl_com->proto_sw_cap[1].vht_mu_bfme = (rtw_sw_proto_bf_cap_phy1 & BIT3) ? 1 : 0;
1388 phl_com->proto_sw_cap[1].ht_su_bfmr = (rtw_sw_proto_bf_cap_phy1 & BIT4) ? 1 : 0;
1389 phl_com->proto_sw_cap[1].ht_su_bfme = (rtw_sw_proto_bf_cap_phy1 & BIT5) ? 1 : 0;
1390 phl_com->proto_sw_cap[1].he_su_bfmr = (rtw_sw_proto_bf_cap_phy1 & BIT6) ? 1 : 0;
1391 phl_com->proto_sw_cap[1].he_su_bfme = (rtw_sw_proto_bf_cap_phy1 & BIT7) ? 1 : 0;
1392 phl_com->proto_sw_cap[1].he_mu_bfmr = (rtw_sw_proto_bf_cap_phy1 & BIT8) ? 1 : 0;
1393 phl_com->proto_sw_cap[1].he_mu_bfme = (rtw_sw_proto_bf_cap_phy1 & BIT9) ? 1 : 0;
1394 #endif
1395
1396 #if CONFIG_TXPWR_LIMIT
1397 if (rtw_tx_pwr_lmt_enable == 2)
1398 phl_com->dev_sw_cap.pwrlmt_type = RTW_PWLMT_BY_EFUSE;
1399 else if (rtw_tx_pwr_lmt_enable == 1)
1400 phl_com->dev_sw_cap.pwrlmt_type = RTW_PWBYRATE_AND_PWLMT;
1401 else if (rtw_tx_pwr_lmt_enable == 0)
1402 phl_com->dev_sw_cap.pwrlmt_type = RTW_PWLMT_DISABLE;
1403 #else
1404 phl_com->dev_sw_cap.pwrlmt_type = RTW_PWLMT_DISABLE;
1405 #endif
1406
1407 if (rtw_tx_pwr_by_rate == 1)
1408 phl_com->dev_sw_cap.pwrbyrate_off = RTW_PW_BY_RATE_ON;
1409 else if (rtw_tx_pwr_by_rate == 0)
1410 phl_com->dev_sw_cap.pwrbyrate_off = RTW_PW_BY_RATE_ALL_SAME;
1411 else
1412 phl_com->dev_sw_cap.pwrbyrate_off = RTW_PW_BY_RATE_ON;
1413
1414 /* If rf_board_opt is not assigned to specific value, it must be set to 0xFF as default. */
1415 phl_com->dev_sw_cap.rf_board_opt = 0xFF;
1416
1417 #ifdef CONFIG_RTW_IPS
1418 phl_com->dev_sw_cap.ps_cap.ips_en = rtw_ips_mode;
1419 #endif
1420 #ifdef CONFIG_RTW_LPS
1421 phl_com->dev_sw_cap.ps_cap.lps_en = rtw_lps_mode;
1422 phl_com->dev_sw_cap.ps_cap.lps_cap = rtw_lps_cap;
1423 #endif
1424
1425 #ifdef CONFIG_RTW_LED
1426 rtw_phl_led_set_ctrl_mode(GET_PHL_INFO(dvobj), 0, RTW_LED_CTRL_HW_TX_MODE);
1427 #endif
1428
1429 #if defined (CONFIG_RPQ_AGG_NUM) && (CONFIG_RPQ_AGG_NUM > 0)
1430 phl_com->dev_sw_cap.rpq_agg_num = CONFIG_RPQ_AGG_NUM;
1431 #else
1432 phl_com->dev_sw_cap.rpq_agg_num = 0; /* MAC default num: 121 for all IC */
1433 #endif
1434 #ifdef CONFIG_FW_IO_OFLD_SUPPORT
1435 phl_com->dev_sw_cap.fw_cap.offload_cap = rtw_fw_ofld_cap;
1436 #endif
1437 }
1438
rtw_load_dvobj_registry(struct dvobj_priv * dvobj)1439 u8 rtw_load_dvobj_registry(struct dvobj_priv *dvobj)
1440 {
1441 /*struct rtw_phl_com_t *phl_com = GET_PHL_COM(dvobj);*/
1442 #ifdef CONFIG_CONCURRENT_MODE
1443 dvobj->virtual_iface_num = (u8)rtw_virtual_iface_num;
1444 #endif
1445 return _SUCCESS;
1446 }
rtw_load_registry(_adapter * padapter)1447 uint rtw_load_registry(_adapter *padapter)
1448 {
1449 uint status = _SUCCESS;
1450 struct registry_priv *registry_par = &padapter->registrypriv;
1451
1452
1453 #ifdef CONFIG_RTW_DEBUG
1454 if (rtw_drv_log_level >= _DRV_MAX_)
1455 rtw_drv_log_level = _DRV_DEBUG_;
1456 #endif
1457
1458 registry_par->chip_version = (u8)rtw_chip_version;
1459 registry_par->rfintfs = (u8)rtw_rfintfs;
1460 registry_par->lbkmode = (u8)rtw_lbkmode;
1461 /* registry_par->hci = (u8)hci; */
1462 registry_par->network_mode = (u8)rtw_network_mode;
1463
1464 _rtw_memcpy(registry_par->ssid.Ssid, "ANY", 3);
1465 registry_par->ssid.SsidLength = 3;
1466
1467 registry_par->channel = (u8)rtw_channel;
1468 #ifdef CONFIG_NARROWBAND_SUPPORTING
1469 if (rtw_nb_config != RTW_NB_CONFIG_NONE)
1470 rtw_wireless_mode &= ~WIRELESS_11B;
1471 #endif
1472 registry_par->wireless_mode = (u8)rtw_wireless_mode;
1473 registry_par->band_type = (u8)rtw_band_type;
1474
1475 if (is_supported_24g(registry_par->band_type) && (!is_supported_5g(registry_par->band_type))
1476 && (registry_par->channel > 14))
1477 registry_par->channel = 1;
1478 else if (is_supported_5g(registry_par->band_type) && (!is_supported_24g(registry_par->band_type))
1479 && (registry_par->channel <= 14))
1480 registry_par->channel = 36;
1481
1482 registry_par->vrtl_carrier_sense = (u8)rtw_vrtl_carrier_sense ;
1483 registry_par->vcs_type = (u8)rtw_vcs_type;
1484 registry_par->rts_thresh = (u16)rtw_rts_thresh;
1485 registry_par->hw_rts_en = (u8)rtw_hw_rts_en;
1486 registry_par->frag_thresh = (u16)rtw_frag_thresh;
1487 registry_par->preamble = (u8)rtw_preamble;
1488 registry_par->scan_mode = (u8)rtw_scan_mode;
1489 registry_par->smart_ps = (u8)rtw_smart_ps;
1490 registry_par->check_fw_ps = (u8)rtw_check_fw_ps;
1491 #ifdef CONFIG_TDMADIG
1492 registry_par->tdmadig_en = (u8)rtw_tdmadig_en;
1493 registry_par->tdmadig_mode = (u8)rtw_tdmadig_mode;
1494 registry_par->tdmadig_dynamic = (u8) rtw_dynamic_tdmadig;
1495 registry_par->power_mgnt = PM_PS_MODE_ACTIVE;
1496 registry_par->ips_mode = IPS_NONE;
1497 #else
1498 registry_par->power_mgnt = (u8)rtw_power_mgnt;
1499 registry_par->ips_mode = (u8)rtw_ips_mode;
1500 #endif/*CONFIG_TDMADIG*/
1501 registry_par->lps_level = (u8)rtw_lps_level;
1502 registry_par->en_dyn_rrsr = (u8)rtw_en_dyn_rrsr;
1503 registry_par->set_rrsr_value = (u32)rtw_rrsr_value;
1504 #ifdef CONFIG_LPS_1T1R
1505 registry_par->lps_1t1r = (u8)(rtw_lps_1t1r ? 1 : 0);
1506 #endif
1507 registry_par->lps_chk_by_tp = (u8)rtw_lps_chk_by_tp;
1508 #ifdef CONFIG_WOWLAN
1509 registry_par->wow_power_mgnt = (u8)rtw_wow_power_mgnt;
1510 registry_par->wow_lps_level = (u8)rtw_wow_lps_level;
1511 #ifdef CONFIG_LPS_1T1R
1512 registry_par->wow_lps_1t1r = (u8)(rtw_wow_lps_1t1r ? 1 : 0);
1513 #endif
1514 #endif /* CONFIG_WOWLAN */
1515 registry_par->radio_enable = (u8)rtw_radio_enable;
1516 registry_par->long_retry_lmt = (u8)rtw_long_retry_lmt;
1517 registry_par->short_retry_lmt = (u8)rtw_short_retry_lmt;
1518 registry_par->busy_thresh = (u16)rtw_busy_thresh;
1519 registry_par->max_bss_cnt = (u16)rtw_max_bss_cnt;
1520 /* registry_par->qos_enable = (u8)rtw_qos_enable; */
1521 registry_par->ack_policy = (u8)rtw_ack_policy;
1522 registry_par->mp_mode = (u8)rtw_mp_mode;
1523 #if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTW_CUSTOMER_STR)
1524 registry_par->mp_customer_str = (u8)rtw_mp_customer_str;
1525 #endif
1526 registry_par->software_encrypt = (u8)rtw_software_encrypt;
1527 registry_par->software_decrypt = (u8)rtw_software_decrypt;
1528
1529 registry_par->acm_method = (u8)rtw_acm_method;
1530 registry_par->usb_rxagg_mode = (u8)rtw_usb_rxagg_mode;
1531 registry_par->dynamic_agg_enable = (u8)rtw_dynamic_agg_enable;
1532
1533 /* WMM */
1534 registry_par->wmm_enable = (u8)rtw_wmm_enable;
1535
1536 #ifdef CONFIG_WMMPS_STA
1537 /* UAPSD */
1538 registry_par->uapsd_max_sp_len= (u8)rtw_uapsd_max_sp;
1539 registry_par->uapsd_ac_enable = (u8)rtw_uapsd_ac_enable;
1540 registry_par->wmm_smart_ps = (u8)rtw_wmm_smart_ps;
1541 #endif /* CONFIG_WMMPS_STA */
1542
1543 registry_par->RegPwrTrimEnable = (u8)rtw_pwrtrim_enable;
1544
1545 registry_par->tx_bw_mode = (u8)rtw_tx_bw_mode;
1546
1547 #ifdef CONFIG_80211N_HT
1548 registry_par->ht_enable = (u8)rtw_ht_enable;
1549 if (registry_par->ht_enable && is_supported_ht(registry_par->wireless_mode)) {
1550 #ifdef CONFIG_NARROWBAND_SUPPORTING
1551 if (rtw_nb_config != RTW_NB_CONFIG_NONE)
1552 rtw_bw_mode = 0;
1553 #endif
1554 registry_par->bw_mode = (u8)rtw_bw_mode;
1555 registry_par->ampdu_enable = (u8)rtw_ampdu_enable;
1556 registry_par->rx_ampdu_amsdu = (u8)rtw_rx_ampdu_amsdu;
1557 #ifdef CONFIG_DISBALE_RX_AMSDU_FOR_BUS_LOW_SPEED
1558 #ifdef CONFIG_USB_HCI
1559 if (dvobj_to_usb(adapter_to_dvobj(padapter))->usb_speed < RTW_USB_SPEED_SUPER)
1560 registry_par->rx_ampdu_amsdu = 0;
1561 #endif
1562 #endif
1563 registry_par->tx_ampdu_amsdu = (u8)rtw_tx_ampdu_amsdu;
1564 registry_par->tx_quick_addba_req = (u8)rtw_quick_addba_req;
1565 registry_par->short_gi = (u8)rtw_short_gi;
1566 registry_par->ldpc_cap = (u8)rtw_ldpc_cap;
1567
1568 #ifdef CONFIG_RTW_TX_NPATH_EN
1569 registry_par->tx_npath = (u8)rtw_tx_npath_enable;
1570 #endif
1571 #ifdef CONFIG_RTW_PATH_DIV
1572 registry_par->path_div = (u8)rtw_path_div_enable;
1573 #endif
1574 registry_par->stbc_cap = (u16)rtw_stbc_cap;
1575 #ifdef CONFIG_BEAMFORMING
1576 registry_par->beamform_cap = (u8)rtw_beamform_cap;
1577 registry_par->dyn_txbf = (u8)rtw_dyn_txbf;
1578 registry_par->beamformer_rf_num = (u8)rtw_bfer_rf_number;
1579 registry_par->beamformee_rf_num = (u8)rtw_bfee_rf_number;
1580 #endif
1581 rtw_regsty_init_rx_ampdu_sz_limit(registry_par);
1582 }
1583 #endif
1584
1585 #if 0
1586 int rtw_short_gi = 0xf;
1587 /* BIT0: Enable VHT LDPC Rx, BIT1: Enable VHT LDPC Tx, BIT4: Enable HT LDPC Rx, BIT5: Enable HT LDPC Tx */
1588 int rtw_ldpc_cap = 0x33;
1589 /* BIT0: Enable VHT STBC Rx, BIT1: Enable VHT STBC Tx, BIT4: Enable HT STBC Rx, BIT5: Enable HT STBC Tx */
1590 int rtw_stbc_cap = 0x13;
1591 #endif
1592
1593 #ifdef DBG_LA_MODE
1594 registry_par->la_mode_en = (u8)rtw_la_mode_en;
1595 #endif
1596 #ifdef CONFIG_NARROWBAND_SUPPORTING
1597 registry_par->rtw_nb_config = (u8)rtw_nb_config;
1598 #endif
1599
1600 #ifdef CONFIG_80211AC_VHT
1601 registry_par->vht_enable = (u8)rtw_vht_enable;
1602 registry_par->vht_24g_enable = (u8)rtw_vht_24g_enable;
1603 registry_par->ampdu_factor = (u8)rtw_ampdu_factor;
1604 registry_par->vht_rx_mcs_map[0] = (u8)(rtw_vht_rx_mcs_map & 0xFF);
1605 registry_par->vht_rx_mcs_map[1] = (u8)((rtw_vht_rx_mcs_map & 0xFF00) >> 8);
1606 #endif
1607
1608 #ifdef CONFIG_80211AX_HE
1609 registry_par->he_enable = (u8)rtw_he_enable;
1610 #endif
1611
1612 #ifdef CONFIG_TX_EARLY_MODE
1613 registry_par->early_mode = (u8)rtw_early_mode;
1614 #endif
1615 registry_par->lowrate_two_xmit = (u8)rtw_lowrate_two_xmit;
1616 registry_par->rf_path = (u8)rtw_rf_path; /*rf_config/rtw_rf_config*/
1617 registry_par->tx_nss = (u8)rtw_tx_nss;
1618 registry_par->rx_nss = (u8)rtw_rx_nss;
1619 registry_par->low_power = (u8)rtw_low_power;
1620
1621 registry_par->check_hw_status = (u8)rtw_check_hw_status;
1622
1623 registry_par->wifi_spec = (u8)rtw_wifi_spec;
1624
1625 #ifdef CONFIG_REGD_SRC_FROM_OS
1626 if (regd_src_is_valid(rtw_regd_src))
1627 registry_par->regd_src = (u8)rtw_regd_src;
1628 else {
1629 RTW_WARN("%s invalid rtw_regd_src(%u), use REGD_SRC_RTK_PRIV instead\n", __func__, rtw_regd_src);
1630 registry_par->regd_src = REGD_SRC_RTK_PRIV;
1631 }
1632 #endif
1633
1634 rtw_regsty_load_alpha2(registry_par);
1635 rtw_regsty_load_chplan(registry_par);
1636 rtw_regsty_load_excl_chs(registry_par);
1637 #ifdef CONFIG_80211D
1638 rtw_regsty_load_country_ie_slave_settings(registry_par);
1639 #endif
1640
1641 registry_par->full_ch_in_p2p_handshake = (u8)rtw_full_ch_in_p2p_handshake;
1642 #ifdef CONFIG_BTC
1643 registry_par->btcoex = (u8)rtw_btcoex_enable;
1644 registry_par->bt_iso = (u8)rtw_bt_iso;
1645 registry_par->bt_sco = (u8)rtw_bt_sco;
1646 registry_par->bt_ampdu = (u8)rtw_bt_ampdu;
1647 registry_par->ant_num = (u8)rtw_ant_num;
1648 registry_par->single_ant_path = (u8) rtw_single_ant_path;
1649 #endif
1650
1651 registry_par->bAcceptAddbaReq = (u8)rtw_AcceptAddbaReq;
1652
1653 registry_par->antdiv_cfg = (u8)rtw_antdiv_cfg;
1654 registry_par->antdiv_type = (u8)rtw_antdiv_type;
1655
1656 registry_par->drv_ant_band_switch = (u8) rtw_drv_ant_band_switch;
1657
1658 registry_par->switch_usb_mode = (u8)rtw_switch_usb_mode;
1659
1660 registry_par->hw_wps_pbc = (u8)rtw_hw_wps_pbc;
1661
1662 #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE
1663 snprintf(registry_par->adaptor_info_caching_file_path, PATH_LENGTH_MAX, "%s", rtw_adaptor_info_caching_file_path);
1664 registry_par->adaptor_info_caching_file_path[PATH_LENGTH_MAX - 1] = 0;
1665 #endif
1666
1667 #ifdef CONFIG_LAYER2_ROAMING
1668 registry_par->max_roaming_times = (u8)rtw_max_roaming_times;
1669 #endif
1670
1671 snprintf(registry_par->ifname, 16, "%s", ifname);
1672 snprintf(registry_par->if2name, 16, "%s", if2name);
1673
1674 #if defined(CONFIG_CONCURRENT_MODE) && !RTW_P2P_GROUP_INTERFACE
1675 #ifdef CONFIG_P2P
1676 if (CONFIG_RTW_STATIC_NDEV_NUM <= rtw_sel_p2p_iface) {
1677 RTW_ERR("rtw_sel_p2p_iface out of range\n");
1678 rtw_sel_p2p_iface = CONFIG_RTW_STATIC_NDEV_NUM - 1;
1679 }
1680
1681 registry_par->sel_p2p_iface = (u8)rtw_sel_p2p_iface;
1682 RTW_INFO("%s, Select P2P interface: iface_id:%d\n", __func__, registry_par->sel_p2p_iface);
1683 #endif
1684 #endif
1685
1686 #ifdef CONFIG_IGNORE_GO_AND_LOW_RSSI_IN_SCAN_LIST
1687 registry_par->ignore_go_in_scan = (u8)rtw_ignore_go_in_scan;
1688 registry_par->ignore_low_rssi_in_scan = rtw_ignore_low_rssi_in_scan;
1689 #endif /*CONFIG_IGNORE_GO_AND_LOW_RSSI_IN_SCAN_LIST*/
1690 registry_par->vo_edca = rtw_vo_edca;
1691
1692 registry_par->pll_ref_clk_sel = (u8)rtw_pll_ref_clk_sel;
1693
1694 rtw_regsty_load_target_tx_power(registry_par);
1695
1696 registry_par->TxBBSwing_2G = (s8)rtw_TxBBSwing_2G;
1697 registry_par->TxBBSwing_5G = (s8)rtw_TxBBSwing_5G;
1698 registry_par->bEn_RFE = 1;
1699 registry_par->RFE_Type = (u8)rtw_rfe_type;
1700 registry_par->PowerTracking_Type = (u8)rtw_powertracking_type;
1701 registry_par->AmplifierType_2G = (u8)rtw_amplifier_type_2g;
1702 registry_par->AmplifierType_5G = (u8)rtw_amplifier_type_5g;
1703 registry_par->GLNA_Type = (u8)rtw_GLNA_type;
1704 #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
1705 registry_par->load_phy_file = (u8)rtw_load_phy_file;
1706 registry_par->RegDecryptCustomFile = (u8)rtw_decrypt_phy_file;
1707 #endif
1708 registry_par->qos_opt_enable = (u8)rtw_qos_opt_enable;
1709
1710 registry_par->hiq_filter = (u8)rtw_hiq_filter;
1711
1712 registry_par->adaptivity_en = (u8)rtw_adaptivity_en;
1713 registry_par->adaptivity_mode = (u8)rtw_adaptivity_mode;
1714 registry_par->adaptivity_th_l2h_ini = (s8)rtw_adaptivity_th_l2h_ini;
1715 registry_par->adaptivity_th_edcca_hl_diff = (s8)rtw_adaptivity_th_edcca_hl_diff;
1716
1717 registry_par->boffefusemask = (u8)rtw_OffEfuseMask;
1718 registry_par->bFileMaskEfuse = (u8)rtw_FileMaskEfuse;
1719 registry_par->bBTFileMaskEfuse = (u8)rtw_FileMaskEfuse;
1720
1721 #ifdef CONFIG_RTW_ACS
1722 registry_par->acs_mode = (u8)rtw_acs;
1723 registry_par->acs_auto_scan = (u8)rtw_acs_auto_scan;
1724 #endif
1725
1726 registry_par->reg_rxgain_offset_2g = (u32) rtw_rxgain_offset_2g;
1727 registry_par->reg_rxgain_offset_5gl = (u32) rtw_rxgain_offset_5gl;
1728 registry_par->reg_rxgain_offset_5gm = (u32) rtw_rxgain_offset_5gm;
1729 registry_par->reg_rxgain_offset_5gh = (u32) rtw_rxgain_offset_5gh;
1730
1731 #ifdef CONFIG_DFS_MASTER
1732 registry_par->dfs_region_domain = (u8)rtw_dfs_region_domain;
1733 if (registry_par->dfs_region_domain != RTW_DFS_REGD_NONE) {
1734 RTW_WARN("%s force disable radar detection capability for now\n", __func__);
1735 registry_par->dfs_region_domain = RTW_DFS_REGD_NONE;
1736 }
1737 #ifdef CONFIG_REGD_SRC_FROM_OS
1738 if (rtw_regd_src == REGD_SRC_OS && registry_par->dfs_region_domain != RTW_DFS_REGD_NONE) {
1739 RTW_WARN("%s force disable radar detection capability when regd_src is OS\n", __func__);
1740 registry_par->dfs_region_domain = RTW_DFS_REGD_NONE;
1741 }
1742 #endif
1743 #endif
1744
1745 #ifdef CONFIG_WOWLAN
1746 registry_par->wowlan_enable = rtw_wow_enable;
1747 registry_par->wakeup_event = rtw_wakeup_event;
1748 registry_par->suspend_type = rtw_suspend_type;
1749 #endif
1750
1751 registry_par->wowlan_sta_mix_mode = rtw_wowlan_sta_mix_mode;
1752
1753 #ifdef CONFIG_PCI_HCI
1754 registry_par->pci_aspm_config = rtw_pci_aspm_enable;
1755 registry_par->pci_dynamic_aspm_linkctrl = rtw_pci_dynamic_aspm_linkctrl;
1756 #endif
1757
1758 #ifdef CONFIG_RTW_NAPI
1759 registry_par->en_napi = (u8)rtw_en_napi;
1760 #ifdef CONFIG_RTW_NAPI_DYNAMIC
1761 registry_par->napi_threshold = (u32)rtw_napi_threshold;
1762 #endif /* CONFIG_RTW_NAPI_DYNAMIC */
1763 #ifdef CONFIG_RTW_GRO
1764 registry_par->en_gro = (u8)rtw_en_gro;
1765 if (!registry_par->en_napi && registry_par->en_gro) {
1766 registry_par->en_gro = 0;
1767 RTW_WARN("Disable GRO because NAPI is not enabled\n");
1768 }
1769 #endif /* CONFIG_RTW_GRO */
1770 #endif /* CONFIG_RTW_NAPI */
1771
1772 registry_par->iqk_fw_offload = (u8)rtw_iqk_fw_offload;
1773 registry_par->ch_switch_offload = (u8)rtw_ch_switch_offload;
1774
1775 #ifdef CONFIG_TDLS
1776 registry_par->en_tdls = rtw_en_tdls;
1777 #endif
1778
1779
1780 #ifdef CONFIG_FW_OFFLOAD_PARAM_INIT
1781 registry_par->fw_param_init = rtw_fw_param_init;
1782 #endif
1783 #ifdef CONFIG_AP_MODE
1784 registry_par->bmc_tx_rate = rtw_bmc_tx_rate;
1785 #if CONFIG_RTW_AP_DATA_BMC_TO_UC
1786 registry_par->ap_src_b2u_flags = rtw_ap_src_b2u_flags;
1787 registry_par->ap_fwd_b2u_flags = rtw_ap_fwd_b2u_flags;
1788 #endif
1789 #endif /* CONFIG_AP_MODE */
1790
1791 #ifdef CONFIG_RTW_MESH
1792 #if CONFIG_RTW_MESH_DATA_BMC_TO_UC
1793 registry_par->msrc_b2u_flags = rtw_msrc_b2u_flags;
1794 registry_par->mfwd_b2u_flags = rtw_mfwd_b2u_flags;
1795 #endif
1796 #endif /* CONFIG_RTW_MESH */
1797
1798 registry_par->phydm_ability = rtw_phydm_ability;
1799 registry_par->halrf_ability = rtw_halrf_ability;
1800 #ifdef CONFIG_RTW_MESH
1801 registry_par->peer_alive_based_preq = rtw_peer_alive_based_preq;
1802 #endif
1803
1804 #ifdef RTW_BUSY_DENY_SCAN
1805 registry_par->scan_interval_thr = rtw_scan_interval_thr;
1806 #endif
1807
1808 #ifdef CONFIG_RTW_MULTI_AP
1809 rtw_regsty_init_unassoc_sta_param(registry_par);
1810 #endif
1811
1812 #ifdef CONFIG_IOCTL_CFG80211
1813 registry_par->roch_min_home_dur = (u16)rtw_roch_min_home_dur;
1814 registry_par->roch_max_away_dur = (u16)rtw_roch_max_away_dur;
1815 registry_par->roch_extend_dur = (u16)rtw_roch_extend_dur;
1816 #endif
1817
1818 #if defined(ROKU_PRIVATE) && defined(CONFIG_P2P)
1819 registry_par->go_hidden_ssid_mode = rtw_go_hidden_ssid_mode;
1820 ATOMIC_SET(®istry_par->set_hide_ssid_timer, 0);
1821 #endif
1822 registry_par->amsdu_mode = (u8)rtw_amsdu_mode;
1823 registry_par->scan_pch_ex_time = (u16)rtw_scan_pch_ex;
1824 return status;
1825 }
1826
rtw_cfg_adaptivity_en_msg(void * sel,_adapter * adapter)1827 static void rtw_cfg_adaptivity_en_msg(void *sel, _adapter *adapter)
1828 {
1829 struct registry_priv *regsty = &adapter->registrypriv;
1830
1831 RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_EN_");
1832
1833 if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_DISABLE)
1834 _RTW_PRINT_SEL(sel, "DISABLE\n");
1835 else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE)
1836 _RTW_PRINT_SEL(sel, "ENABLE\n");
1837 else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_AUTO)
1838 _RTW_PRINT_SEL(sel, "AUTO\n");
1839 else
1840 _RTW_PRINT_SEL(sel, "INVALID\n");
1841 }
1842
rtw_cfg_adaptivity_mode_msg(void * sel,_adapter * adapter)1843 static void rtw_cfg_adaptivity_mode_msg(void *sel, _adapter *adapter)
1844 {
1845 struct registry_priv *regsty = &adapter->registrypriv;
1846
1847 if (regsty->adaptivity_en != RTW_ADAPTIVITY_EN_ENABLE)
1848 return;
1849
1850 RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_MODE_");
1851
1852 if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_NORMAL)
1853 _RTW_PRINT_SEL(sel, "NORMAL\n");
1854 else if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_CARRIER_SENSE)
1855 _RTW_PRINT_SEL(sel, "CARRIER_SENSE\n");
1856 else
1857 _RTW_PRINT_SEL(sel, "INVALID\n");
1858 }
1859
rtw_cfg_adaptivity_config_msg(void * sel,_adapter * adapter)1860 void rtw_cfg_adaptivity_config_msg(void *sel, _adapter *adapter)
1861 {
1862 rtw_cfg_adaptivity_en_msg(sel, adapter);
1863 rtw_cfg_adaptivity_mode_msg(sel, adapter);
1864 }
1865
rtw_cfg_adaptivity_needed(_adapter * adapter)1866 bool rtw_cfg_adaptivity_needed(_adapter *adapter)
1867 {
1868 struct registry_priv *regsty = &adapter->registrypriv;
1869 bool ret = _FALSE;
1870
1871 if (regsty->adaptivity_en)
1872 ret = _TRUE;
1873
1874 return ret;
1875 }
1876
1877