1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2019 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 *****************************************************************************/ 15 #ifndef _RTW_XMIT_H_ 16 #define _RTW_XMIT_H_ 17 18 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) 19 #ifdef CONFIG_TX_AGGREGATION 20 /* #define SDIO_TX_AGG_MAX 5 */ 21 #else 22 #define SDIO_TX_AGG_MAX 1 23 #endif 24 25 #if defined CONFIG_SDIO_HCI 26 #define SDIO_TX_DIV_NUM (2) 27 #endif 28 #endif 29 30 #if 0 /*CONFIG_CORE_XMITBUF*/ 31 #ifdef CONFIG_PCI_HCI 32 #define XMITBUF_ALIGN_SZ 4 33 #else 34 #ifdef USB_XMITBUF_ALIGN_SZ 35 #define XMITBUF_ALIGN_SZ (USB_XMITBUF_ALIGN_SZ) 36 #else 37 #define XMITBUF_ALIGN_SZ 512 38 #endif 39 #endif 40 41 #define MAX_CMDBUF_SZ (5120) /* (4096) */ 42 #endif 43 44 #define MAX_BEACON_LEN 512 45 46 #define MAX_NUMBLKS (1) 47 48 #define XMIT_VO_QUEUE (0) 49 #define XMIT_VI_QUEUE (1) 50 #define XMIT_BE_QUEUE (2) 51 #define XMIT_BK_QUEUE (3) 52 53 #define VO_QUEUE_INX 0 54 #define VI_QUEUE_INX 1 55 #define BE_QUEUE_INX 2 56 #define BK_QUEUE_INX 3 57 #define BCN_QUEUE_INX 4 58 #define MGT_QUEUE_INX 5 59 #define HIGH_QUEUE_INX 6 60 #define TXCMD_QUEUE_INX 7 61 62 #define HW_QUEUE_ENTRY 8 63 64 65 #ifdef RTW_PHL_TX 66 #ifdef CONFIG_RTW_REDUCE_MEM 67 #define RTW_MAX_FRAG_NUM 1 //max scatter number of a packet to xmit 68 #else 69 #define RTW_MAX_FRAG_NUM 10 //max scatter number of a packet to xmit 70 #endif 71 #define RTW_MAX_WL_HEAD 100 72 #define RTW_MAX_WL_TAIL 100 73 #define RTW_SZ_LLC (SNAP_SIZE + sizeof(u16)) 74 #define RTW_SZ_FCS 4 75 #endif 76 77 #define WEP_IV(pattrib_iv, dot11txpn, keyidx)\ 78 do {\ 79 dot11txpn.val = (dot11txpn.val == 0xffffff) ? 0 : (dot11txpn.val + 1);\ 80 pattrib_iv[0] = dot11txpn._byte_.TSC0;\ 81 pattrib_iv[1] = dot11txpn._byte_.TSC1;\ 82 pattrib_iv[2] = dot11txpn._byte_.TSC2;\ 83 pattrib_iv[3] = ((keyidx & 0x3)<<6);\ 84 } while (0) 85 86 87 #define TKIP_IV(pattrib_iv, dot11txpn, keyidx)\ 88 do {\ 89 dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : (dot11txpn.val + 1);\ 90 pattrib_iv[0] = dot11txpn._byte_.TSC1;\ 91 pattrib_iv[1] = (dot11txpn._byte_.TSC1 | 0x20) & 0x7f;\ 92 pattrib_iv[2] = dot11txpn._byte_.TSC0;\ 93 pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\ 94 pattrib_iv[4] = dot11txpn._byte_.TSC2;\ 95 pattrib_iv[5] = dot11txpn._byte_.TSC3;\ 96 pattrib_iv[6] = dot11txpn._byte_.TSC4;\ 97 pattrib_iv[7] = dot11txpn._byte_.TSC5;\ 98 } while (0) 99 100 #define AES_IV(pattrib_iv, dot11txpn, keyidx)\ 101 do {\ 102 dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : (dot11txpn.val + 1);\ 103 pattrib_iv[0] = dot11txpn._byte_.TSC0;\ 104 pattrib_iv[1] = dot11txpn._byte_.TSC1;\ 105 pattrib_iv[2] = 0;\ 106 pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\ 107 pattrib_iv[4] = dot11txpn._byte_.TSC2;\ 108 pattrib_iv[5] = dot11txpn._byte_.TSC3;\ 109 pattrib_iv[6] = dot11txpn._byte_.TSC4;\ 110 pattrib_iv[7] = dot11txpn._byte_.TSC5;\ 111 } while (0) 112 113 #define GCMP_IV(a, b, c) AES_IV(a, b, c) 114 115 /* Check if AMPDU Tx is supported or not. If it is supported, 116 * it need to check "amsdu in ampdu" is supported or not. 117 * (ampdu_en, amsdu_ampdu_en) = 118 * (0, x) : AMPDU is not enable, but AMSDU is valid to send. 119 * (1, 0) : AMPDU is enable, AMSDU in AMPDU is not enable. So, AMSDU is not valid to send. 120 * (1, 1) : AMPDU and AMSDU in AMPDU are enable. So, AMSDU is valid to send. 121 */ 122 #define IS_AMSDU_AMPDU_NOT_VALID(pattrib)\ 123 ((pattrib->ampdu_en == _TRUE) && (pattrib->amsdu_ampdu_en == _FALSE)) 124 125 #define IS_AMSDU_AMPDU_VALID(pattrib)\ 126 !((pattrib->ampdu_en == _TRUE) && (pattrib->amsdu_ampdu_en == _FALSE)) 127 128 #define HWXMIT_ENTRY 4 129 130 /* For Buffer Descriptor ring architecture */ 131 #if defined(BUF_DESC_ARCH) || defined(CONFIG_TRX_BD_ARCH) 132 #define TX_BUFFER_SEG_NUM 1 /* 0:2 seg, 1: 4 seg, 2: 8 seg. */ 133 #endif 134 135 /*GEORGIA_TODO_FIXIT_MOVE_TO_HAL*/ 136 #if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C) 137 #define TXDESC_SIZE 48 /* HALMAC_TX_DESC_SIZE_8822B */ 138 #elif defined(CONFIG_RTL8821C) 139 #define TXDESC_SIZE 48 /* HALMAC_TX_DESC_SIZE_8821C */ 140 #elif defined(CONFIG_RTL8814B) 141 #define TXDESC_SIZE (16 + 32) 142 #else 143 #define TXDESC_SIZE 32 /* old IC (ex: 8188E) */ 144 #endif 145 146 #ifdef CONFIG_TX_EARLY_MODE 147 #define EARLY_MODE_INFO_SIZE 8 148 #endif 149 150 151 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) 152 #define TXDESC_OFFSET TXDESC_SIZE 153 #endif 154 155 #ifdef CONFIG_USB_HCI 156 #ifdef USB_PACKET_OFFSET_SZ 157 #define PACKET_OFFSET_SZ (USB_PACKET_OFFSET_SZ) 158 #else 159 #define PACKET_OFFSET_SZ (8) 160 #endif 161 #define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ) 162 #endif 163 164 #ifdef CONFIG_PCI_HCI 165 #if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) || defined(CONFIG_TRX_BD_ARCH) 166 /* this section is defined for buffer descriptor ring architecture */ 167 #define TX_WIFI_INFO_SIZE (TXDESC_SIZE) /* it may add 802.11 hdr or others... */ 168 /* tx desc and payload are in the same buf */ 169 #define TXDESC_OFFSET (TX_WIFI_INFO_SIZE) 170 #else 171 /* tx desc and payload are NOT in the same buf */ 172 #define TXDESC_OFFSET (0) 173 /* 8188ee/8723be/8812ae/8821ae has extra PCI DMA info in tx desc */ 174 #endif 175 #endif /* CONFIG_PCI_HCI */ 176 177 #ifdef RTW_PHL_TX 178 #ifdef TXDESC_OFFSET 179 #undef TXDESC_OFFSET 180 #endif 181 #define TXDESC_OFFSET (0) 182 #endif 183 184 #ifdef RTW_PHL_TX 185 enum CORE_TX_TYPE { 186 RTW_TX_OS = 0, 187 RTW_TX_OS_MAC80211, 188 RTW_TX_DRV_MGMT, 189 }; 190 #endif 191 192 enum TXDESC_SC { 193 SC_DONT_CARE = 0x00, 194 SC_UPPER = 0x01, 195 SC_LOWER = 0x02, 196 SC_DUPLICATE = 0x03 197 }; 198 199 #ifdef CONFIG_PCI_HCI 200 #ifndef CONFIG_TRX_BD_ARCH /* CONFIG_TRX_BD_ARCH doesn't need this */ 201 #define TXDESC_64_BYTES 202 #endif 203 #endif 204 205 /*GEORGIA_TODO_FIXIT_IC_DEPENDENCE*/ 206 #ifdef CONFIG_TRX_BD_ARCH 207 struct tx_buf_desc { 208 #ifdef CONFIG_64BIT_DMA 209 #define TX_BUFFER_SEG_SIZE 4 /* in unit of DWORD */ 210 #else 211 #define TX_BUFFER_SEG_SIZE 2 /* in unit of DWORD */ 212 #endif 213 unsigned int dword[TX_BUFFER_SEG_SIZE * (2 << TX_BUFFER_SEG_NUM)]; 214 } __packed; 215 #elif (defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C)) && defined(CONFIG_PCI_HCI) /* 8192ee or 8814ae */ 216 /* 8192EE_TODO */ 217 struct tx_desc { 218 unsigned int txdw0; 219 unsigned int txdw1; 220 unsigned int txdw2; 221 unsigned int txdw3; 222 unsigned int txdw4; 223 unsigned int txdw5; 224 unsigned int txdw6; 225 unsigned int txdw7; 226 }; 227 #else 228 struct tx_desc { 229 unsigned int txdw0; 230 unsigned int txdw1; 231 unsigned int txdw2; 232 unsigned int txdw3; 233 unsigned int txdw4; 234 unsigned int txdw5; 235 unsigned int txdw6; 236 unsigned int txdw7; 237 238 #if defined(TXDESC_40_BYTES) || defined(TXDESC_64_BYTES) 239 unsigned int txdw8; 240 unsigned int txdw9; 241 #endif /* TXDESC_40_BYTES */ 242 243 #ifdef TXDESC_64_BYTES 244 unsigned int txdw10; 245 unsigned int txdw11; 246 247 /* 2008/05/15 MH Because PCIE HW memory R/W 4K limit. And now, our descriptor */ 248 /* size is 40 bytes. If you use more than 102 descriptor( 103*40>4096), HW will execute */ 249 /* memoryR/W CRC error. And then all DMA fetch will fail. We must decrease descriptor */ 250 /* number or enlarge descriptor size as 64 bytes. */ 251 unsigned int txdw12; 252 unsigned int txdw13; 253 unsigned int txdw14; 254 unsigned int txdw15; 255 #endif 256 }; 257 #endif 258 259 #ifndef CONFIG_TRX_BD_ARCH 260 union txdesc { 261 struct tx_desc txdesc; 262 unsigned int value[TXDESC_SIZE >> 2]; 263 }; 264 #endif 265 266 #ifdef CONFIG_PCI_HCI 267 #define PCI_MAX_TX_QUEUE_COUNT 8 /* == HW_QUEUE_ENTRY */ 268 269 struct rtw_tx_ring { 270 unsigned char qid; 271 #ifdef CONFIG_TRX_BD_ARCH 272 struct tx_buf_desc *buf_desc; 273 #else 274 struct tx_desc *desc; 275 #endif 276 dma_addr_t dma; 277 unsigned int idx; 278 unsigned int entries; 279 _queue queue; 280 u32 qlen; 281 #ifdef CONFIG_TRX_BD_ARCH 282 u16 hw_rp_cache; 283 #endif 284 }; 285 286 #ifdef DBG_TXBD_DESC_DUMP 287 288 #define TX_BAK_FRMAE_CNT 10 289 #define TX_BAK_DESC_LEN 48 /* byte */ 290 #define TX_BAK_DATA_LEN 30 /* byte */ 291 292 struct rtw_tx_desc_backup { 293 int tx_bak_rp; 294 int tx_bak_wp; 295 u8 tx_bak_desc[TX_BAK_DESC_LEN]; 296 u8 tx_bak_data_hdr[TX_BAK_DATA_LEN]; 297 u8 tx_desc_size; 298 }; 299 #endif 300 #endif 301 302 struct hw_xmit { 303 /* _lock xmit_lock; */ 304 /* _list pending; */ 305 _queue *sta_queue; 306 /* struct hw_txqueue *phwtxqueue; */ 307 /* sint txcmdcnt; */ 308 int accnt; 309 }; 310 311 312 #if 1 //def RTW_PHL_TX 313 struct pkt_attrib { 314 //updated by rtw_core_update_xmitframe 315 u32 sz_payload_per_frag; 316 317 u32 sz_wlan_head; 318 u32 sz_wlan_tail; 319 320 u32 sz_phl_head; 321 u32 sz_phl_tail; 322 323 u8 nr_frags; 324 u32 frag_len; 325 u32 frag_datalen; 326 #ifdef CONFIG_CORE_TXSC 327 u32 frag_len_txsc; 328 #endif 329 330 //updated by 331 u16 ether_type; 332 333 u8 src[ETH_ALEN]; 334 u8 dst[ETH_ALEN]; 335 u8 ta[ETH_ALEN]; 336 u8 ra[ETH_ALEN]; 337 338 u16 pkt_hdrlen; /* the original 802.3 pkt header len */ 339 u32 sz_payload; 340 341 u8 dhcp_pkt; 342 u8 icmp_pkt; 343 u8 hipriority_pkt; /* high priority packet */ 344 345 //WLAN HDR 346 u16 hdrlen; /* the WLAN Header Len */ 347 u8 type; 348 u8 subtype; 349 u8 qos_en; 350 u16 seqnum; 351 u8 ampdu_en;/* tx ampdu enable */ 352 u8 ack_policy; 353 u8 amsdu; 354 u8 mdata;/* more data bit */ 355 u8 eosp; 356 u8 priority; 357 358 //Security 359 u8 bswenc; 360 /* 361 * encrypt 362 * indicate the encrypt algorithm, ref: enum security_type. 363 * 0: indicate no encrypt. 364 */ 365 u8 encrypt; 366 u8 iv_len; 367 u8 icv_len; 368 u8 iv[18]; 369 u8 icv[16]; 370 u8 key_idx; 371 union Keytype dot11tkiptxmickey; 372 /* union Keytype dot11tkiprxmickey; */ 373 union Keytype dot118021x_UncstKey; 374 375 //updated by rtw_core_update_xmitframe 376 u8 hw_ssn_sel; /* for HW_SEQ0,1,2,3 */ 377 u32 pktlen; /* the original 802.3 pkt raw_data len (not include ether_hdr data) */ 378 u32 last_txcmdsz; 379 380 #if defined(CONFIG_CONCURRENT_MODE) 381 u8 bmc_camid; 382 #endif 383 384 385 386 u8 mac_id; 387 u8 vcs_mode; /* virtual carrier sense method */ 388 #ifdef CONFIG_RTW_WDS 389 u8 wds; 390 #endif 391 #ifdef CONFIG_RTW_MESH 392 u8 mda[ETH_ALEN]; /* mesh da */ 393 u8 msa[ETH_ALEN]; /* mesh sa */ 394 u8 meshctrl_len; /* Length of Mesh Control field */ 395 u8 mesh_frame_mode; 396 #if CONFIG_RTW_MESH_DATA_BMC_TO_UC 397 u8 mb2u; 398 #endif 399 u8 mfwd_ttl; 400 u32 mseq; 401 #endif 402 #ifdef CONFIG_TCP_CSUM_OFFLOAD_TX 403 u8 hw_csum; 404 #endif 405 406 407 u8 ht_en; 408 u8 raid;/* rate adpative id */ 409 u8 bwmode; 410 u8 ch_offset;/* PRIME_CHNL_OFFSET */ 411 u8 sgi;/* short GI */ 412 u8 ampdu_spacing; /* ampdu_min_spacing for peer sta's rx */ 413 u8 amsdu_ampdu_en;/* tx amsdu in ampdu enable */ 414 u8 pctrl;/* per packet txdesc control enable */ 415 u8 triggered;/* for ap mode handling Power Saving sta */ 416 u8 qsel; 417 u8 order;/* order bit */ 418 u8 rate; 419 u8 intel_proxim; 420 u8 retry_ctrl; 421 u8 mbssid; 422 u8 ldpc; 423 u8 stbc; 424 #ifdef CONFIG_WMMPS_STA 425 u8 trigger_frame; 426 #endif /* CONFIG_WMMPS_STA */ 427 428 struct sta_info *psta; 429 430 u8 rtsen; 431 u8 cts2self; 432 u8 hw_rts_en; 433 434 #ifdef CONFIG_TDLS 435 u8 direct_link; 436 struct sta_info *ptdls_sta; 437 #endif /* CONFIG_TDLS */ 438 u8 key_type; 439 440 441 442 #ifdef CONFIG_BEAMFORMING 443 u16 txbf_p_aid;/*beamforming Partial_AID*/ 444 u16 txbf_g_id;/*beamforming Group ID*/ 445 446 /* 447 * 2'b00: Unicast NDPA 448 * 2'b01: Broadcast NDPA 449 * 2'b10: Beamforming Report Poll 450 * 2'b11: Final Beamforming Report Poll 451 */ 452 u8 bf_pkt_type; 453 #endif 454 u8 wdinfo_en;/*FPGA_test*/ 455 u8 dma_ch;/*FPGA_test*/ 456 }; 457 #endif 458 459 #if 0 //ndef RTW_PHL_TX 460 /* reduce size */ 461 struct pkt_attrib { 462 u8 type; 463 u8 subtype; 464 u8 bswenc; 465 u8 dhcp_pkt; 466 u16 ether_type; 467 u16 seqnum; 468 u8 hw_ssn_sel; /* for HW_SEQ0,1,2,3 */ 469 u16 pkt_hdrlen; /* the original 802.3 pkt header len */ 470 u16 hdrlen; /* the WLAN Header Len */ 471 u32 pktlen; /* the original 802.3 pkt raw_data len (not include ether_hdr data) */ 472 u32 last_txcmdsz; 473 u8 nr_frags; 474 u8 encrypt; /* when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith */ 475 #if defined(CONFIG_CONCURRENT_MODE) 476 u8 bmc_camid; 477 #endif 478 u8 iv_len; 479 u8 icv_len; 480 u8 iv[18]; 481 u8 icv[16]; 482 u8 priority; 483 u8 ack_policy; 484 u8 mac_id; 485 u8 vcs_mode; /* virtual carrier sense method */ 486 u8 dst[ETH_ALEN]; 487 u8 src[ETH_ALEN]; 488 u8 ta[ETH_ALEN]; 489 u8 ra[ETH_ALEN]; 490 #ifdef CONFIG_RTW_MESH 491 u8 mda[ETH_ALEN]; /* mesh da */ 492 u8 msa[ETH_ALEN]; /* mesh sa */ 493 u8 meshctrl_len; /* Length of Mesh Control field */ 494 u8 mesh_frame_mode; 495 #if CONFIG_RTW_MESH_DATA_BMC_TO_UC 496 u8 mb2u; 497 #endif 498 u8 mfwd_ttl; 499 u32 mseq; 500 #endif 501 #ifdef CONFIG_TCP_CSUM_OFFLOAD_TX 502 u8 hw_csum; 503 #endif 504 u8 key_idx; 505 u8 qos_en; 506 u8 ht_en; 507 u8 raid;/* rate adpative id */ 508 u8 bwmode; 509 u8 ch_offset;/* PRIME_CHNL_OFFSET */ 510 u8 sgi;/* short GI */ 511 u8 ampdu_en;/* tx ampdu enable */ 512 u8 ampdu_spacing; /* ampdu_min_spacing for peer sta's rx */ 513 u8 amsdu; 514 u8 amsdu_ampdu_en;/* tx amsdu in ampdu enable */ 515 u8 mdata;/* more data bit */ 516 u8 pctrl;/* per packet txdesc control enable */ 517 u8 triggered;/* for ap mode handling Power Saving sta */ 518 u8 qsel; 519 u8 order;/* order bit */ 520 u8 eosp; 521 u8 rate; 522 u8 intel_proxim; 523 u8 retry_ctrl; 524 u8 mbssid; 525 u8 ldpc; 526 u8 stbc; 527 #ifdef CONFIG_WMMPS_STA 528 u8 trigger_frame; 529 #endif /* CONFIG_WMMPS_STA */ 530 531 struct sta_info *psta; 532 533 u8 rtsen; 534 u8 cts2self; 535 union Keytype dot11tkiptxmickey; 536 /* union Keytype dot11tkiprxmickey; */ 537 union Keytype dot118021x_UncstKey; 538 539 #ifdef CONFIG_TDLS 540 u8 direct_link; 541 struct sta_info *ptdls_sta; 542 #endif /* CONFIG_TDLS */ 543 u8 key_type; 544 545 u8 icmp_pkt; 546 u8 hipriority_pkt; /* high priority packet */ 547 548 #ifdef CONFIG_BEAMFORMING 549 u16 txbf_p_aid;/*beamforming Partial_AID*/ 550 u16 txbf_g_id;/*beamforming Group ID*/ 551 552 /* 553 * 2'b00: Unicast NDPA 554 * 2'b01: Broadcast NDPA 555 * 2'b10: Beamforming Report Poll 556 * 2'b11: Final Beamforming Report Poll 557 */ 558 u8 bf_pkt_type; 559 #endif 560 u8 wdinfo_en;/*FPGA_test*/ 561 u8 dma_ch;/*FPGA_test*/ 562 }; 563 #endif 564 565 #ifdef CONFIG_RTW_WDS 566 #define XATTRIB_GET_WDS(xattrib) ((xattrib)->wds) 567 #else 568 #define XATTRIB_GET_WDS(xattrib) 0 569 #endif 570 571 #ifdef CONFIG_RTW_MESH 572 #define XATTRIB_GET_MCTRL_LEN(xattrib) ((xattrib)->meshctrl_len) 573 #else 574 #define XATTRIB_GET_MCTRL_LEN(xattrib) 0 575 #endif 576 577 #ifdef CONFIG_TX_AMSDU 578 enum { 579 RTW_AMSDU_TIMER_UNSET = 0, 580 RTW_AMSDU_TIMER_SETTING, 581 RTW_AMSDU_TIMER_TIMEOUT, 582 }; 583 #endif 584 585 #define WLANHDR_OFFSET 64 586 587 #define NULL_FRAMETAG (0x0) 588 #define DATA_FRAMETAG 0x01 589 #define L2_FRAMETAG 0x02 590 #define MGNT_FRAMETAG 0x03 591 #define AMSDU_FRAMETAG 0x04 592 593 #define EII_FRAMETAG 0x05 594 #define IEEE8023_FRAMETAG 0x06 595 596 #define MP_FRAMETAG 0x07 597 598 #define TXAGG_FRAMETAG 0x08 599 600 enum { 601 XMITBUF_DATA = 0, 602 XMITBUF_MGNT = 1, 603 XMITBUF_CMD = 2, 604 }; 605 606 bool rtw_xmit_ac_blocked(_adapter *adapter); 607 608 struct submit_ctx { 609 systime submit_time; /* */ 610 u32 timeout_ms; /* <0: not synchronous, 0: wait forever, >0: up to ms waiting */ 611 int status; /* status for operation */ 612 _completion done; 613 }; 614 615 enum { 616 RTW_SCTX_SUBMITTED = -1, 617 RTW_SCTX_DONE_SUCCESS = 0, 618 RTW_SCTX_DONE_UNKNOWN, 619 RTW_SCTX_DONE_TIMEOUT, 620 RTW_SCTX_DONE_BUF_ALLOC, 621 RTW_SCTX_DONE_BUF_FREE, 622 RTW_SCTX_DONE_WRITE_PORT_ERR, 623 RTW_SCTX_DONE_TX_DESC_NA, 624 RTW_SCTX_DONE_TX_DENY, 625 RTW_SCTX_DONE_CCX_PKT_FAIL, 626 RTW_SCTX_DONE_DRV_STOP, 627 RTW_SCTX_DONE_DEV_REMOVE, 628 RTW_SCTX_DONE_CMD_ERROR, 629 RTW_SCTX_DONE_CMD_DROP, 630 RTX_SCTX_CSTR_WAIT_RPT2, 631 }; 632 633 634 void rtw_sctx_init(struct submit_ctx *sctx, int timeout_ms); 635 int rtw_sctx_wait(struct submit_ctx *sctx, const char *msg); 636 void rtw_sctx_done_err(struct submit_ctx **sctx, int status); 637 void rtw_sctx_done(struct submit_ctx **sctx); 638 639 #if 0 /*CONFIG_CORE_XMITBUF*/ 640 struct xmit_buf { 641 _list list; 642 643 _adapter *padapter; 644 645 u8 *pallocated_buf; 646 647 u8 *pbuf; 648 649 void *priv_data; 650 651 u16 buf_tag; /* 0: Normal xmitbuf, 1: extension xmitbuf, 2:cmd xmitbuf */ 652 u16 flags; 653 u32 alloc_sz; 654 655 u32 len; 656 657 struct submit_ctx *sctx; 658 659 #ifdef CONFIG_USB_HCI 660 661 /* u32 sz[8]; */ 662 u32 ff_hwaddr; 663 u8 bulkout_id; /* for halmac */ 664 665 PURB pxmit_urb[8]; 666 dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */ 667 668 u8 bpending[8]; 669 670 sint last[8]; 671 672 #endif 673 674 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) 675 u8 *phead; 676 u8 *pdata; 677 u8 *ptail; 678 u8 *pend; 679 u32 ff_hwaddr; 680 u8 pg_num; 681 u8 agg_num; 682 #endif 683 684 #ifdef CONFIG_PCI_HCI 685 #ifdef CONFIG_TRX_BD_ARCH 686 /*struct tx_buf_desc *buf_desc;*/ 687 #else 688 struct tx_desc *desc; 689 #endif 690 #endif 691 692 #if defined(DBG_XMIT_BUF) || defined(DBG_XMIT_BUF_EXT) 693 u8 no; 694 #endif 695 696 }; 697 #endif 698 699 #ifdef CONFIG_CORE_TXSC 700 #define MAX_TXSC_SKB_NUM 6 701 #endif 702 703 struct xmit_txreq_buf { 704 _list list; 705 u8 *txreq; 706 u8 *head; 707 u8 *tail; 708 u8 *pkt_list; 709 #ifdef CONFIG_CORE_TXSC 710 u8 *pkt[MAX_TXSC_SKB_NUM]; 711 u8 pkt_cnt; 712 _adapter *adapter; 713 u8 macid; 714 u8 txsc_id; 715 #endif 716 }; 717 718 struct xmit_frame { 719 _list list; 720 721 struct pkt_attrib attrib; 722 723 u16 os_qid; 724 725 struct sk_buff *pkt; 726 727 int frame_tag; 728 729 _adapter *padapter; 730 731 /*Only for MGNT Frame*/ 732 u8 *prealloc_buf_addr; 733 #ifdef CONFIG_USB_HCI 734 dma_addr_t dma_transfer_addr; 735 #endif 736 u8 *buf_addr; 737 #if 0 /*CONFIG_CORE_XMITBUF*/ 738 struct xmit_buf *pxmitbuf; 739 #endif 740 741 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) 742 u8 pg_num; 743 u8 agg_num; 744 #endif 745 746 #ifdef CONFIG_USB_HCI 747 #ifdef CONFIG_USB_TX_AGGREGATION 748 u8 agg_num; 749 #endif 750 s8 pkt_offset; 751 #endif 752 753 #ifdef CONFIG_XMIT_ACK 754 u8 ack_report; 755 #endif 756 757 u8 *alloc_addr; /* the actual address this xmitframe allocated */ 758 u8 ext_tag; /* 0:data, 1:mgmt */ 759 760 #ifdef RTW_PHL_TX 761 u8 xftype; 762 763 //struct sk_buff *skb; 764 //struct sta_info *psta; 765 //struct pkt_attrib tx_attrib; 766 767 u8 alloc_hdr; 768 u8 alloc_tail; 769 u8 *wlhdr[RTW_MAX_FRAG_NUM]; 770 u8 *wltail[RTW_MAX_FRAG_NUM]; 771 772 u32 txring_idx; 773 u32 txreq_cnt; 774 struct rtw_xmit_req *phl_txreq; 775 u32 txfree_cnt; 776 777 struct xmit_txreq_buf *ptxreq_buf;/* TXREQ_QMGT for recycle*/ 778 779 u16 buf_need_free; /* size is realted to RTW_MAX_FRAG_NUM */ 780 #endif 781 782 }; 783 784 struct tx_servq { 785 _list tx_pending; 786 _queue sta_pending; 787 int qcnt; 788 }; 789 790 791 struct sta_xmit_priv { 792 _lock lock; 793 sint option; 794 sint apsd_setting; /* When bit mask is on, the associated edca queue supports APSD. */ 795 796 797 /* struct tx_servq blk_q[MAX_NUMBLKS]; */ 798 struct tx_servq be_q; /* priority == 0,3 */ 799 struct tx_servq bk_q; /* priority == 1,2 */ 800 struct tx_servq vi_q; /* priority == 4,5 */ 801 struct tx_servq vo_q; /* priority == 6,7 */ 802 _list legacy_dz; 803 _list apsd; 804 805 u16 txseq_tid[16]; 806 807 /* uint sta_tx_bytes; */ 808 /* u64 sta_tx_pkts; */ 809 /* uint sta_tx_fail; */ 810 811 812 }; 813 814 815 struct hw_txqueue { 816 volatile sint head; 817 volatile sint tail; 818 volatile sint free_sz; /* in units of 64 bytes */ 819 volatile sint free_cmdsz; 820 volatile sint txsz[8]; 821 uint ff_hwaddr; 822 uint cmd_hwaddr; 823 sint ac_tag; 824 }; 825 826 struct agg_pkt_info { 827 u16 offset; 828 u16 pkt_len; 829 }; 830 #if 0 /*CONFIG_CORE_XMITBUF*/ 831 enum cmdbuf_type { 832 CMDBUF_BEACON = 0x00, 833 CMDBUF_RSVD, 834 CMDBUF_MAX 835 }; 836 #endif 837 struct xmit_priv { 838 839 _lock lock; 840 #if 0 /*def CONFIG_XMIT_THREAD_MODE*/ 841 _sema xmit_sema; 842 #endif 843 844 /* _queue blk_strms[MAX_NUMBLKS]; */ 845 _queue be_pending; 846 _queue bk_pending; 847 _queue vi_pending; 848 _queue vo_pending; 849 _queue bm_pending; 850 851 /* _queue legacy_dz_queue; */ 852 /* _queue apsd_queue; */ 853 854 u8 *pallocated_frame_buf; 855 u8 *pxmit_frame_buf; 856 uint free_xmitframe_cnt; 857 _queue free_xmit_queue; 858 859 /* uint mapping_addr; */ 860 /* uint pkt_sz; */ 861 862 u8 *xframe_ext_alloc_addr; 863 u8 *xframe_ext; 864 uint free_xframe_ext_cnt; 865 _queue free_xframe_ext_queue; 866 867 /* MGT_TXREQ_QMGT */ 868 u8 *xframe_ext_txreq_alloc_addr; 869 u8 *xframe_ext_txreq; 870 871 /* struct hw_txqueue be_txqueue; */ 872 /* struct hw_txqueue bk_txqueue; */ 873 /* struct hw_txqueue vi_txqueue; */ 874 /* struct hw_txqueue vo_txqueue; */ 875 /* struct hw_txqueue bmc_txqueue; */ 876 877 uint frag_len; 878 879 _adapter *adapter; 880 881 u8 vcs_setting; 882 u8 vcs; 883 u8 vcs_type; 884 /* u16 rts_thresh; */ 885 886 u64 tx_bytes; 887 u64 tx_pkts; 888 u64 tx_drop; 889 u64 last_tx_pkts; 890 891 struct hw_xmit *hwxmits; 892 u8 hwxmit_entry; 893 894 u8 wmm_para_seq[4];/* sequence for wmm ac parameter strength from large to small. it's value is 0->vo, 1->vi, 2->be, 3->bk. */ 895 896 #ifdef CONFIG_USB_HCI 897 _sema tx_retevt;/* all tx return event; */ 898 u8 txirp_cnt; 899 900 _tasklet xmit_tasklet; 901 902 /* per AC pending irp */ 903 int beq_cnt; 904 int bkq_cnt; 905 int viq_cnt; 906 int voq_cnt; 907 908 #endif 909 910 #ifdef CONFIG_PCI_HCI 911 /* Tx */ 912 struct rtw_tx_ring tx_ring[PCI_MAX_TX_QUEUE_COUNT]; 913 int txringcount[PCI_MAX_TX_QUEUE_COUNT]; 914 u8 beaconDMAing; /* flag of indicating beacon is transmiting to HW by DMA */ 915 _tasklet xmit_tasklet; 916 #endif 917 918 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) 919 #ifdef CONFIG_TX_AMSDU_SW_MODE 920 _tasklet xmit_tasklet; 921 #endif 922 #ifndef CONFIG_SDIO_TX_TASKLET 923 _thread_hdl_ SdioXmitThread; 924 _sema SdioXmitSema; 925 #endif 926 #endif /* CONFIG_SDIO_HCI */ 927 928 #if 0 /*CONFIG_CORE_XMITBUF*/ 929 _queue free_xmitbuf_queue; 930 _queue pending_xmitbuf_queue; 931 u8 *pallocated_xmitbuf; 932 u8 *pxmitbuf; 933 uint free_xmitbuf_cnt; 934 935 _queue free_xmit_extbuf_queue; 936 u8 *pallocated_xmit_extbuf; 937 u8 *pxmit_extbuf; 938 uint free_xmit_extbuf_cnt; 939 940 struct xmit_buf pcmd_xmitbuf[CMDBUF_MAX]; 941 #endif 942 u8 hw_ssn_seq_no;/* mapping to REG_HW_SEQ 0,1,2,3 */ 943 u16 nqos_ssn; 944 #ifdef CONFIG_TX_EARLY_MODE 945 946 #ifdef CONFIG_SDIO_HCI 947 #define MAX_AGG_PKT_NUM 20 948 #else 949 #define MAX_AGG_PKT_NUM 256 /* Max tx ampdu coounts */ 950 #endif 951 952 struct agg_pkt_info agg_pkt[MAX_AGG_PKT_NUM]; 953 #endif 954 955 #ifdef CONFIG_XMIT_ACK 956 int ack_tx; 957 _mutex ack_tx_mutex; 958 struct submit_ctx ack_tx_ops; 959 u8 seq_no; 960 #endif 961 962 #ifdef CONFIG_TX_AMSDU 963 _timer amsdu_vo_timer; 964 u8 amsdu_vo_timeout; 965 966 _timer amsdu_vi_timer; 967 u8 amsdu_vi_timeout; 968 969 _timer amsdu_be_timer; 970 u8 amsdu_be_timeout; 971 972 _timer amsdu_bk_timer; 973 u8 amsdu_bk_timeout; 974 975 u32 amsdu_debug_set_timer; 976 u32 amsdu_debug_timeout; 977 978 #ifndef AMSDU_DEBUG_MAX_COUNT 979 #define AMSDU_DEBUG_MAX_COUNT 5 980 #endif 981 u32 amsdu_debug_coalesce[AMSDU_DEBUG_MAX_COUNT]; 982 u32 amsdu_debug_tasklet; 983 u32 amsdu_debug_enqueue; 984 u32 amsdu_debug_dequeue; 985 #endif 986 #ifdef DBG_TXBD_DESC_DUMP 987 BOOLEAN dump_txbd_desc; 988 #endif 989 #ifdef CONFIG_PCI_TX_POLLING 990 _timer tx_poll_timer; 991 #endif 992 #ifdef CONFIG_LAYER2_ROAMING 993 _queue rpkt_queue; 994 #endif 995 _lock lock_sctx; 996 #ifdef CONFIG_CORE_TXSC 997 _lock txsc_lock; 998 u8 txsc_enable; 999 u8 txsc_debug_mode; 1000 u8 txsc_debug_mask;/* BIT0:core txsc(no use), BIT1: phl txsc enable, BIT2: debug_print */ 1001 1002 struct sta_info *ptxsc_sta_cached; 1003 1004 /* for debug */ 1005 u32 txsc_phl_err_cnt1; 1006 u32 txsc_phl_err_cnt2; 1007 #endif /* CONFIG_CORE_TXSC */ 1008 }; 1009 1010 #if 0 /*CONFIG_CORE_XMITBUF*/ 1011 extern struct xmit_frame *__rtw_alloc_cmdxmitframe(struct xmit_priv *pxmitpriv, 1012 enum cmdbuf_type buf_type); 1013 #define rtw_alloc_cmdxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_RSVD) 1014 #define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_BEACON) 1015 1016 extern struct xmit_buf *rtw_alloc_xmitbuf_ext(struct xmit_priv *pxmitpriv); 1017 extern s32 rtw_free_xmitbuf_ext(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); 1018 1019 extern struct xmit_buf *rtw_alloc_xmitbuf(struct xmit_priv *pxmitpriv); 1020 extern s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); 1021 #endif 1022 void rtw_count_tx_stats(_adapter *padapter, struct xmit_frame *pxmitframe, int sz); 1023 extern void rtw_update_protection(_adapter *padapter, u8 *ie, uint ie_len); 1024 1025 extern s32 rtw_make_wlanhdr(_adapter *padapter, u8 *hdr, struct pkt_attrib *pattrib); 1026 extern s32 rtw_put_snap(u8 *data, u16 h_proto); 1027 1028 extern struct xmit_frame *rtw_alloc_xmitframe(struct xmit_priv *pxmitpriv, u16 os_qid); 1029 struct xmit_frame *rtw_alloc_xmitframe_ext(struct xmit_priv *pxmitpriv); 1030 struct xmit_frame *rtw_alloc_xmitframe_once(struct xmit_priv *pxmitpriv); 1031 extern s32 rtw_free_xmitframe(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe); 1032 extern void rtw_free_xmitframe_queue(struct xmit_priv *pxmitpriv, _queue *pframequeue); 1033 s32 core_tx_free_xmitframe(_adapter *padapter, struct xmit_frame *pxframe); 1034 struct tx_servq *rtw_get_sta_pending(_adapter *padapter, struct sta_info *psta, sint up, u8 *ac); 1035 extern s32 rtw_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); 1036 extern struct xmit_frame *rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit_i, sint entry); 1037 1038 extern s32 rtw_xmit_classifier(_adapter *padapter, struct xmit_frame *pxmitframe); 1039 extern u32 rtw_calculate_wlan_pkt_size_by_attribue(struct pkt_attrib *pattrib); 1040 #define rtw_wlan_pkt_size(f) rtw_calculate_wlan_pkt_size_by_attribue(&f->attrib) 1041 extern s32 rtw_xmitframe_coalesce(_adapter *padapter, struct sk_buff *pkt, 1042 struct xmit_frame *pxmitframe); 1043 #if defined(CONFIG_IEEE80211W) || defined(CONFIG_RTW_MESH) 1044 extern s32 rtw_mgmt_xmitframe_coalesce(_adapter *padapter, 1045 struct sk_buff *pkt, struct xmit_frame *pxmitframe); 1046 #endif 1047 #ifdef CONFIG_TDLS 1048 extern struct tdls_txmgmt *ptxmgmt; 1049 s32 rtw_xmit_tdls_coalesce(_adapter *padapter, struct xmit_frame *pxmitframe, struct tdls_txmgmt *ptxmgmt); 1050 s32 update_tdls_attrib(_adapter *padapter, struct pkt_attrib *pattrib); 1051 #endif 1052 s32 _rtw_init_hw_txqueue(struct hw_txqueue *phw_txqueue, u8 ac_tag); 1053 void _rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv); 1054 1055 1056 s32 rtw_txframes_pending(_adapter *padapter); 1057 s32 rtw_txframes_sta_ac_pending(_adapter *padapter, struct pkt_attrib *pattrib); 1058 void rtw_init_hwxmits(struct hw_xmit *phwxmit, sint entry); 1059 1060 1061 s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, _adapter *padapter); 1062 void _rtw_free_xmit_priv(struct xmit_priv *pxmitpriv); 1063 1064 u8 rtw_init_lite_xmit_resource(struct dvobj_priv *dvobj); 1065 void rtw_free_lite_xmit_resource(struct dvobj_priv *dvobj); 1066 1067 void rtw_alloc_hwxmits(_adapter *padapter); 1068 void rtw_free_hwxmits(_adapter *padapter); 1069 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24)) 1070 s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev); 1071 #endif 1072 void rtw_xmit_dequeue_callback(_workitem *work); 1073 void rtw_xmit_queue_set(struct sta_info *sta); 1074 void rtw_xmit_queue_clear(struct sta_info *sta); 1075 s32 rtw_xmit_posthandle(_adapter *padapter, struct xmit_frame *pxmitframe, struct sk_buff *pkt); 1076 s32 rtw_xmit(_adapter *padapter, struct sk_buff **pkt, u16 os_qid); 1077 bool xmitframe_hiq_filter(struct xmit_frame *xmitframe); 1078 #if defined(CONFIG_AP_MODE) || defined(CONFIG_TDLS) 1079 sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe); 1080 void stop_sta_xmit(_adapter *padapter, struct sta_info *psta); 1081 void wakeup_sta_to_xmit(_adapter *padapter, struct sta_info *psta); 1082 void xmit_delivery_enabled_frames(_adapter *padapter, struct sta_info *psta); 1083 #endif 1084 1085 #ifdef RTW_PHL_TX 1086 s32 core_tx_prepare_phl(_adapter *padapter, struct xmit_frame *pxframe); 1087 s32 core_tx_call_phl(_adapter *padapter, struct xmit_frame *pxframe, void *txsc_pkt); 1088 s32 core_tx_per_packet(_adapter *padapter, struct xmit_frame *pxframe, 1089 struct sk_buff **pskb, struct sta_info *psta); 1090 s32 rtw_core_tx(_adapter *padapter, struct sk_buff **ppkt, struct sta_info *psta, u16 os_qid); 1091 enum rtw_phl_status rtw_core_tx_recycle(void *drv_priv, struct rtw_xmit_req *txreq); 1092 s32 core_tx_alloc_xmitframe(_adapter *padapter, struct xmit_frame **pxmitframe, u16 os_qid); 1093 #ifdef CONFIG_CORE_TXSC 1094 void core_recycle_txreq_phyaddr(_adapter *padapter, struct rtw_xmit_req *txreq); 1095 s32 core_tx_free_xmitframe(_adapter *padapter, struct xmit_frame *pxframe); 1096 u8 *get_txreq_buffer(_adapter *padapter, u8 **txreq, u8 **pkt_list, u8 **head, u8 **tail); 1097 u8 tos_to_up(u8 tos); 1098 #endif 1099 #endif 1100 1101 void core_tx_amsdu_tasklet(_adapter *padapter); 1102 1103 u8 rtw_get_tx_bw_mode(_adapter *adapter, struct sta_info *sta); 1104 1105 void rtw_update_tx_rate_bmp(struct dvobj_priv *dvobj); 1106 u8 rtw_get_tx_bw_bmp_of_ht_rate(struct dvobj_priv *dvobj, u8 rate, u8 max_bw); 1107 u8 rtw_get_tx_bw_bmp_of_vht_rate(struct dvobj_priv *dvobj, u8 rate, u8 max_bw); 1108 s16 rtw_rfctl_get_oper_txpwr_max_mbm(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset, u8 ifbmp_mod, u8 if_op, bool eirp); 1109 s16 rtw_rfctl_get_reg_max_txpwr_mbm(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset, bool eirp); 1110 1111 u8 query_ra_short_GI(struct sta_info *psta, u8 bw); 1112 1113 u8 qos_acm(u8 acm_mask, u8 priority); 1114 1115 #if 0 /*def CONFIG_XMIT_THREAD_MODE*/ 1116 void enqueue_pending_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); 1117 void enqueue_pending_xmitbuf_to_head(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); 1118 struct xmit_buf *dequeue_pending_xmitbuf(struct xmit_priv *pxmitpriv); 1119 struct xmit_buf *select_and_dequeue_pending_xmitbuf(_adapter *padapter); 1120 sint check_pending_xmitbuf(struct xmit_priv *pxmitpriv); 1121 thread_return rtw_xmit_thread(thread_context context); 1122 #endif 1123 1124 #ifdef CONFIG_TX_AMSDU 1125 extern void rtw_amsdu_vo_timeout_handler(void *FunctionContext); 1126 extern void rtw_amsdu_vi_timeout_handler(void *FunctionContext); 1127 extern void rtw_amsdu_be_timeout_handler(void *FunctionContext); 1128 extern void rtw_amsdu_bk_timeout_handler(void *FunctionContext); 1129 1130 extern u8 rtw_amsdu_get_timer_status(_adapter *padapter, u8 priority); 1131 extern void rtw_amsdu_set_timer_status(_adapter *padapter, u8 priority, u8 status); 1132 extern void rtw_amsdu_set_timer(_adapter *padapter, u8 priority); 1133 extern void rtw_amsdu_cancel_timer(_adapter *padapter, u8 priority); 1134 1135 extern s32 rtw_xmitframe_coalesce_amsdu(_adapter *padapter, struct xmit_frame *pxmitframe, struct xmit_frame *pxmitframe_queue); 1136 extern s32 check_amsdu(struct xmit_frame *pxmitframe); 1137 extern s32 check_amsdu_tx_support(_adapter *padapter); 1138 extern struct xmit_frame *rtw_get_xframe(struct xmit_priv *pxmitpriv, int *num_frame); 1139 #endif 1140 1141 #ifdef DBG_TXBD_DESC_DUMP 1142 void rtw_tx_desc_backup(_adapter *padapter, struct xmit_frame *pxmitframe, u8 desc_size, u8 hwq); 1143 void rtw_tx_desc_backup_reset(void); 1144 u8 rtw_get_tx_desc_backup(_adapter *padapter, u8 hwq, struct rtw_tx_desc_backup **pbak); 1145 #endif 1146 1147 #ifdef CONFIG_PCI_TX_POLLING 1148 void rtw_tx_poll_init(_adapter *padapter); 1149 void rtw_tx_poll_timeout_handler(void *FunctionContext); 1150 void rtw_tx_poll_timer_set(_adapter *padapter, u32 delay); 1151 void rtw_tx_poll_timer_cancel(_adapter *padapter); 1152 #endif 1153 1154 #ifdef CONFIG_XMIT_ACK 1155 int rtw_ack_tx_wait(struct xmit_priv *pxmitpriv, u32 timeout_ms); 1156 void rtw_ack_tx_done(struct xmit_priv *pxmitpriv, int status); 1157 #endif /* CONFIG_XMIT_ACK */ 1158 1159 enum XMIT_BLOCK_REASON { 1160 XMIT_BLOCK_NONE = 0, 1161 XMIT_BLOCK_REDLMEM = BIT0, /*LPS-PG*/ 1162 XMIT_BLOCK_SUSPEND = BIT1, /*WOW*/ 1163 XMIT_BLOCK_MAX = 0xFF, 1164 }; 1165 void rtw_init_xmit_block(_adapter *padapter); 1166 void rtw_deinit_xmit_block(_adapter *padapter); 1167 1168 #ifdef DBG_XMIT_BLOCK 1169 void dump_xmit_block(void *sel, _adapter *padapter); 1170 #endif 1171 void rtw_set_xmit_block(_adapter *padapter, enum XMIT_BLOCK_REASON reason); 1172 void rtw_clr_xmit_block(_adapter *padapter, enum XMIT_BLOCK_REASON reason); 1173 bool rtw_is_xmit_blocked(_adapter *padapter); 1174 #ifdef CONFIG_LAYER2_ROAMING 1175 void dequeuq_roam_pkt(_adapter *padapter); 1176 #endif 1177 /* include after declaring struct xmit_buf, in order to avoid warning */ 1178 #include <xmit_osdep.h> 1179 1180 #endif /* _RTL871X_XMIT_H_ */ 1181