1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2019 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 *****************************************************************************/
15 #define _RTW_MP_C_
16 #include <drv_types.h>
17 #ifdef PLATFORM_FREEBSD
18 #include <sys/unistd.h> /* for RFHIGHPID */
19 #endif
20
21
22 #ifdef CONFIG_MP_VHT_HW_TX_MODE
23 #define CEILING_POS(X) ((X - (int)(X)) > 0 ? (int)(X + 1) : (int)(X))
24 #define CEILING_NEG(X) ((X - (int)(X)) < 0 ? (int)(X - 1) : (int)(X))
25 #define ceil(X) (((X) > 0) ? CEILING_POS(X) : CEILING_NEG(X))
26
rtfloor(float x)27 int rtfloor(float x)
28 {
29 int i = x - 2;
30 while
31 (++i <= x - 1)
32 ;
33 return i;
34 }
35 #endif
36
37 #ifdef CONFIG_MP_INCLUDED
rtw_mp_is_cck_rate(u16 rate)38 bool rtw_mp_is_cck_rate(u16 rate)
39 {
40 return ((rate & 0x1ff) <= _11M_RATE_) ? true : false;
41 }
42
_init_mp_priv_(struct mp_priv * pmp_priv)43 static void _init_mp_priv_(struct mp_priv *pmp_priv)
44 {
45 WLAN_BSSID_EX *pnetwork;
46
47 _rtw_memset(pmp_priv, 0, sizeof(struct mp_priv));
48
49 pmp_priv->mode = MP_OFF;
50
51 pmp_priv->channel = 1;
52 pmp_priv->bandwidth = CHANNEL_WIDTH_20;
53 pmp_priv->prime_channel_offset = CHAN_OFFSET_NO_EXT;
54 //pmp_priv->rateidx = RATE_1M;
55 pmp_priv->txpoweridx = 0;
56 pmp_priv->antenna_tx = MP_ANTENNA_A;
57 pmp_priv->antenna_rx = MP_ANTENNA_A;
58 pmp_priv->antenna_trx = MP_ANTENNA_A;
59
60 pmp_priv->check_mp_pkt = 0;
61
62 pmp_priv->tx_pktcount = 0;
63
64 pmp_priv->rx_bssidpktcount = 0;
65 pmp_priv->rx_pktcount = 0;
66 pmp_priv->rx_crcerrpktcount = 0;
67
68 pmp_priv->network_macaddr[0] = 0x00;
69 pmp_priv->network_macaddr[1] = 0xE0;
70 pmp_priv->network_macaddr[2] = 0x4C;
71 pmp_priv->network_macaddr[3] = 0x87;
72 pmp_priv->network_macaddr[4] = 0x66;
73 pmp_priv->network_macaddr[5] = 0x55;
74
75 pmp_priv->bSetRxBssid = _FALSE;
76 pmp_priv->bRTWSmbCfg = _FALSE;
77 pmp_priv->bloopback = _FALSE;
78
79 pmp_priv->bloadefusemap = _FALSE;
80 pmp_priv->brx_filter_beacon = _FALSE;
81 pmp_priv->mplink_brx = _FALSE;
82 pmp_priv->mp_keep_btc_mode = BTC_MODE_MAX;
83
84 pnetwork = &pmp_priv->mp_network.network;
85 _rtw_memcpy(pnetwork->MacAddress, pmp_priv->network_macaddr, ETH_ALEN);
86
87 pnetwork->Ssid.SsidLength = 8;
88 _rtw_memcpy(pnetwork->Ssid.Ssid, "mp_871x", pnetwork->Ssid.SsidLength);
89
90 pmp_priv->tx.payload = MP_TX_Payload_default_random;
91 #ifdef CONFIG_80211N_HT
92 pmp_priv->tx.attrib.ht_en = 1;
93 #endif
94
95 pmp_priv->mpt_ctx.mpt_rate_index = 1;
96 pmp_priv->tx_shape_idx = 255;
97
98 }
99
100
mp_init_xmit_attrib(struct mp_tx * pmptx,_adapter * padapter)101 static void mp_init_xmit_attrib(struct mp_tx *pmptx, _adapter *padapter)
102 {
103 struct pkt_attrib *pattrib;
104
105 /* init xmitframe attribute */
106 pattrib = &pmptx->attrib;
107 _rtw_memset(pattrib, 0, sizeof(struct pkt_attrib));
108 _rtw_memset(pmptx->desc, 0, TXDESC_SIZE);
109
110 pattrib->ether_type = 0x8712;
111 #if 0
112 _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN);
113 _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
114 #endif
115 _rtw_memset(pattrib->dst, 0xFF, ETH_ALEN);
116
117 /* pattrib->dhcp_pkt = 0;
118 * pattrib->pktlen = 0; */
119 pattrib->ack_policy = 0;
120 /* pattrib->pkt_hdrlen = ETH_HLEN; */
121 pattrib->hdrlen = WLAN_HDR_A3_LEN;
122 pattrib->subtype = WIFI_DATA;
123 pattrib->priority = 0;
124 pattrib->qsel = pattrib->priority;
125 /* do_queue_select(padapter, pattrib); */
126 pattrib->nr_frags = 1;
127 pattrib->encrypt = 0;
128 pattrib->bswenc = _FALSE;
129 pattrib->qos_en = _FALSE;
130
131 pattrib->pktlen = 1500;
132 }
133
init_mp_priv(_adapter * padapter)134 s32 init_mp_priv(_adapter *padapter)
135 {
136 struct mp_priv *pmppriv = &padapter->mppriv;
137
138 _init_mp_priv_(pmppriv);
139 pmppriv->papdater = padapter;
140 if (0) //(IS_HARDWARE_TYPE_8822C(padapter))
141 pmppriv->mp_dm = 1;/* default enable dpk tracking */
142 else
143 pmppriv->mp_dm = 0;
144
145 pmppriv->tx.stop = 1;
146 pmppriv->bSetTxPower = 0; /*for manually set tx power*/
147 pmppriv->bTxBufCkFail = _FALSE;
148 pmppriv->pktInterval = 100;
149 pmppriv->pktLength = 1000;
150 pmppriv->bprocess_mp_mode = _FALSE;
151 pmppriv->rtw_mp_tx_method = RTW_MP_PMACT_TX;
152 pmppriv->rtw_mp_tx_state = 0;
153 pmppriv->rtw_mp_cur_phy = 0;
154 pmppriv->rtw_mp_pmact_patt_idx = 0;
155 pmppriv->rtw_mp_pmact_ppdu_type = 0;
156 pmppriv->rtw_mp_dbcc = 0;
157 pmppriv->pre_refcw_cck_pwridxa = 0;
158 pmppriv->pre_refcw_cck_pwridxb = 0;
159 pmppriv->pre_refcw_ofdm_pwridxa = 0;
160 pmppriv->pre_refcw_ofdm_pwridxb = 0;
161 pmppriv->rtw_mp_data_bandwidth = CHANNEL_WIDTH_20;
162 pmppriv->rtw_mp_tx_time = 0;
163 pmppriv->rtw_mp_trxsc = 0;
164 pmppriv->rtw_mp_stbc = 0;
165 pmppriv->rtw_mp_he_sigb = 0;
166 pmppriv->rtw_mp_he_sigb_dcm = 0;
167 pmppriv->rtw_mp_plcp_gi = 1;
168 pmppriv->rtw_mp_plcp_ltf = 0;
169 pmppriv->rtw_mp_plcp_tx_time = 0;
170 pmppriv->rtw_mp_plcp_tx_mode = 0;
171 pmppriv->rtw_mp_plcp_tx_user = 1;
172 pmppriv->rtw_mp_he_er_su_ru_106_en = 0;
173 pmppriv->rtw_mp_ru_tone = MP_RU_TONE_26;
174
175 pmppriv->mp_plcp_useridx = 0;
176 pmppriv->mp_plcp_user[0].plcp_mcs = 0;
177 pmppriv->mp_plcp_user[0].aid = 0;
178 pmppriv->mp_plcp_user[0].coding = 0;
179 pmppriv->mp_plcp_user[0].dcm = 0;
180 pmppriv->mp_plcp_user[0].plcp_txlen = 1000;
181 pmppriv->mp_plcp_user[0].ru_alloc = 0;
182 pmppriv->mp_plcp_user[0].txbf = 0;
183 pmppriv->mp_plcp_user[0].pwr_boost_db = 0;
184
185 pmppriv->btc_path = BTC_MODE_WL;
186
187 _rtw_memset(pmppriv->st_giltf, 0, sizeof(struct rtw_mp_giltf_data)*5);
188
189 mp_init_xmit_attrib(&pmppriv->tx, padapter);
190 #if 0
191 switch (GET_HAL_RFPATH(padapter)) {
192 case RF_1T1R:
193 pmppriv->antenna_tx = ANTENNA_A;
194 pmppriv->antenna_rx = ANTENNA_A;
195 break;
196 case RF_1T2R:
197 default:
198 pmppriv->antenna_tx = ANTENNA_A;
199 pmppriv->antenna_rx = ANTENNA_AB;
200 break;
201 case RF_2T2R:
202 pmppriv->antenna_tx = ANTENNA_AB;
203 pmppriv->antenna_rx = ANTENNA_AB;
204 break;
205 case RF_2T4R:
206 pmppriv->antenna_tx = ANTENNA_BC;
207 pmppriv->antenna_rx = ANTENNA_ABCD;
208 break;
209 }
210 #endif
211
212 return _SUCCESS;
213 }
214
free_mp_priv(struct mp_priv * pmp_priv)215 void free_mp_priv(struct mp_priv *pmp_priv)
216 {
217 if (pmp_priv->pallocated_mp_xmitframe_buf) {
218 rtw_mfree(pmp_priv->pallocated_mp_xmitframe_buf, 0);
219 pmp_priv->pallocated_mp_xmitframe_buf = NULL;
220 }
221 pmp_priv->pmp_xmtframe_buf = NULL;
222 }
223
224 #if 0
225 static void PHY_IQCalibrate_default(
226 _adapter *adapter,
227 BOOLEAN bReCovery
228 )
229 {
230 RTW_INFO("%s\n", __func__);
231 }
232
233 static void PHY_LCCalibrate_default(
234 _adapter *adapter
235 )
236 {
237 RTW_INFO("%s\n", __func__);
238 }
239
240 static void PHY_SetRFPathSwitch_default(
241 _adapter *adapter,
242 BOOLEAN bMain
243 )
244 {
245 RTW_INFO("%s\n", __func__);
246 }
247 #endif
248
mpt_InitHWConfig(_adapter * adapter)249 void mpt_InitHWConfig(_adapter *adapter)
250 {
251 #ifdef CONFIG_RTL8822B
252 if (IS_HARDWARE_TYPE_8822B(adapter)) {
253 u32 tmp_reg = 0;
254
255 rtw_write16(adapter, REG_RXFLTMAP1_8822B, 0x2000);
256 /* fixed wifi can't 2.4g tx suggest by Szuyitasi 20160504 */
257 phy_set_bb_reg(adapter, 0x70, bMaskByte3, 0x0e);
258 RTW_INFO(" 0x73 = 0x%x\n", phy_query_bb_reg(adapter, 0x70, bMaskByte3));
259 phy_set_bb_reg(adapter, 0x1704, bMaskDWord, 0x0000ff00);
260 RTW_INFO(" 0x1704 = 0x%x\n", phy_query_bb_reg(adapter, 0x1704, bMaskDWord));
261 phy_set_bb_reg(adapter, 0x1700, bMaskDWord, 0xc00f0038);
262 RTW_INFO(" 0x1700 = 0x%x\n", phy_query_bb_reg(adapter, 0x1700, bMaskDWord));
263 }
264 #endif /* CONFIG_RTL8822B */
265 #ifdef CONFIG_RTL8821C
266 if (IS_HARDWARE_TYPE_8821C(adapter))
267 rtw_write16(adapter, REG_RXFLTMAP1_8821C, 0x2000);
268 #endif /* CONFIG_RTL8821C */
269 #if defined(CONFIG_RTL8822C)
270 if( IS_HARDWARE_TYPE_8822C(adapter)) {
271 rtw_write16(adapter, REG_RXFLTMAP1_8822C, 0x2000);
272 /* 0x7D8[31] : time out enable when cca is not assert
273 0x60D[7:0] : time out value (Unit : us)*/
274 rtw_write8(adapter, 0x7db, 0xc0);
275 RTW_INFO(" 0x7d8 = 0x%x\n", rtw_read8(adapter, 0x7d8));
276 rtw_write8(adapter, 0x60d, 0x0c);
277 RTW_INFO(" 0x60d = 0x%x\n", rtw_read8(adapter, 0x60d));
278 phy_set_bb_reg(adapter, 0x1c44, BIT10, 0x1);
279 RTW_INFO(" 0x1c44 = 0x%x\n", phy_query_bb_reg(adapter, 0x1c44, bMaskDWord));
280 }
281 #endif
282 #if defined(CONFIG_RTL8814B)
283 if(IS_HARDWARE_TYPE_8814B(adapter))
284 rtw_write16(adapter, REG_RXFLTMAP1_8814B, 0x2000);
285 #endif
286
287 }
288
PHY_IQCalibrate(_adapter * padapter,u8 bReCovery)289 static void PHY_IQCalibrate(_adapter *padapter, u8 bReCovery)
290 {
291 //halrf_iqk_trigger(adapter_to_phydm(padapter), bReCovery);
292 }
293
PHY_LCCalibrate(_adapter * padapter)294 static void PHY_LCCalibrate(_adapter *padapter)
295 {
296 //halrf_lck_trigger(adapter_to_phydm(padapter));
297 }
298
PHY_QueryRFPathSwitch(_adapter * padapter)299 static u8 PHY_QueryRFPathSwitch(_adapter *padapter)
300 {
301 u8 bmain = 0;
302
303
304 return bmain;
305 }
306
PHY_SetRFPathSwitch(_adapter * padapter,BOOLEAN bMain)307 static void PHY_SetRFPathSwitch(_adapter *padapter , BOOLEAN bMain) {
308
309 }
310
311
phy_switch_rf_path_set(_adapter * padapter,u8 * prf_set_State)312 static void phy_switch_rf_path_set(_adapter *padapter , u8 *prf_set_State) {
313 #ifdef CONFIG_RTL8821C
314 struct dm_struct *phydm = adapter_to_phydm(padapter);
315
316 if (IS_HARDWARE_TYPE_8821C(padapter)) {
317 config_phydm_set_ant_path(phydm, *prf_set_State, phydm->current_ant_num_8821c);
318 /* Do IQK when switching to BTG/WLG, requested by RF Binson */
319 if (*prf_set_State == SWITCH_TO_BTG || *prf_set_State == SWITCH_TO_WLG)
320 PHY_IQCalibrate(padapter, FALSE);
321 }
322 #endif
323
324 }
325
326
327 s32
MPT_InitializeAdapter(_adapter * adapter,u8 Channel)328 MPT_InitializeAdapter(
329 _adapter *adapter,
330 u8 Channel
331 )
332 {
333 s32 rtStatus = _SUCCESS;
334 PMPT_CONTEXT pMptCtx = &adapter->mppriv.mpt_ctx;
335 /*u32 ledsetting;*/
336
337 pMptCtx->bMptDrvUnload = _FALSE;
338 pMptCtx->bMassProdTest = _FALSE;
339 pMptCtx->bMptIndexEven = _TRUE; /* default gain index is -6.0db */
340 pMptCtx->h2cReqNum = 0x0;
341 /* init for BT MP */
342 mpt_InitHWConfig(adapter);
343
344 pMptCtx->bMptWorkItemInProgress = _FALSE;
345 pMptCtx->CurrMptAct = NULL;
346 pMptCtx->mpt_rf_path = RF_PATH_A;
347 /* ------------------------------------------------------------------------- */
348 /* Don't accept any packets */
349 //rtw_write32(adapter, REG_RCR, 0);
350
351 /* ledsetting = rtw_read32(adapter, REG_LEDCFG0); */
352 /* rtw_write32(adapter, REG_LEDCFG0, ledsetting & ~LED0DIS); */
353
354 /* rtw_write32(adapter, REG_LEDCFG0, 0x08080); */
355 /*ledsetting = rtw_read32(adapter, REG_LEDCFG0);*/
356
357
358 PHY_LCCalibrate(adapter);
359 PHY_IQCalibrate(adapter, _FALSE);
360 /* dm_check_txpowertracking(adapter_to_phydm(adapter)); */ /* trigger thermal meter */
361
362 PHY_SetRFPathSwitch(adapter, 1/*pHalData->bDefaultAntenna*/); /* default use Main */
363 #if 0
364 pMptCtx->backup0xc50 = (u8)phy_query_bb_reg(adapter, rOFDM0_XAAGCCore1, bMaskByte0);
365 pMptCtx->backup0xc58 = (u8)phy_query_bb_reg(adapter, rOFDM0_XBAGCCore1, bMaskByte0);
366 pMptCtx->backup0xc30 = (u8)phy_query_bb_reg(adapter, rOFDM0_RxDetector1, bMaskByte0);
367 pMptCtx->backup0x52_RF_A = (u8)phy_query_rf_reg(adapter, RF_PATH_A, RF_0x52, 0x000F0);
368 pMptCtx->backup0x52_RF_B = (u8)phy_query_rf_reg(adapter, RF_PATH_B, RF_0x52, 0x000F0);
369 #endif
370 return rtStatus;
371 }
372
373 /*-----------------------------------------------------------------------------
374 * Function: MPT_DeInitAdapter()
375 *
376 * Overview: Extra DeInitialization for Mass Production Test.
377 *
378 * Input: _adapter *adapter
379 *
380 * Output: NONE
381 *
382 * Return: NONE
383 *
384 * Revised History:
385 * When Who Remark
386 * 05/08/2007 MHC Create Version 0.
387 * 05/18/2007 MHC Add normal driver MPHalt code.
388 *
389 *---------------------------------------------------------------------------*/
390 void
MPT_DeInitAdapter(_adapter * adapter)391 MPT_DeInitAdapter(
392 _adapter *adapter
393 )
394 {
395 PMPT_CONTEXT pMptCtx = &adapter->mppriv.mpt_ctx;
396 pMptCtx->bMptDrvUnload = _TRUE;
397 }
398
mpt_ProStartTest(_adapter * padapter)399 static u8 mpt_ProStartTest(_adapter *padapter)
400 {
401 PMPT_CONTEXT pMptCtx = &padapter->mppriv.mpt_ctx;
402
403 pMptCtx->bMassProdTest = _TRUE;
404 pMptCtx->is_start_cont_tx = _FALSE;
405 pMptCtx->bCckContTx = _FALSE;
406 pMptCtx->bOfdmContTx = _FALSE;
407 pMptCtx->bSingleCarrier = _FALSE;
408 pMptCtx->is_carrier_suppression = _FALSE;
409 pMptCtx->is_single_tone = _FALSE;
410 pMptCtx->HWTxmode = PACKETS_TX;
411
412 return _SUCCESS;
413 }
414
rtw_mp_cal_trigger(_adapter * padapter,u8 cal_tye)415 void rtw_mp_cal_trigger(_adapter *padapter, u8 cal_tye)
416 {
417 struct rtw_mp_cal_arg *mp_cal_arg = NULL;
418 struct mp_priv *pmppriv = &padapter->mppriv;
419
420 mp_cal_arg = _rtw_malloc(sizeof(struct rtw_mp_cal_arg));
421 if (mp_cal_arg)
422 _rtw_memset((void *)mp_cal_arg, 0, sizeof(struct rtw_mp_cal_arg));
423 else {
424 RTW_ERR("%s,malloc fail ! ", __func__);
425 return;
426 }
427 mp_cal_arg->cal_type = cal_tye;
428
429 if (cal_tye == RTW_MP_CAL_DPK_TRACK) {
430 if (rtw_mp_phl_calibration(padapter,
431 mp_cal_arg,
432 RTW_MP_CAL_CMD_TRIGGER_DPK_TRACKING))
433 RTW_INFO("%s ok\n", __func__);
434 else
435 RTW_INFO("%s fail\n", __func__);
436 } else {
437 if (rtw_mp_phl_calibration(padapter,
438 mp_cal_arg,
439 RTW_MP_CAL_CMD_TRIGGER_CAL))
440 RTW_INFO("%s ok\n", __func__);
441 else
442 RTW_INFO("%s fail\n", __func__);
443 }
444 if (mp_cal_arg)
445 _rtw_mfree(mp_cal_arg, sizeof(struct rtw_mp_cal_arg));
446
447 return;
448 }
449
rtw_mp_cal_capab(_adapter * padapter,u8 cal_tye,u8 benable)450 void rtw_mp_cal_capab(_adapter *padapter, u8 cal_tye, u8 benable)
451 {
452 struct rtw_mp_cal_arg *mp_cal_arg = NULL;
453 struct mp_priv *pmppriv = &padapter->mppriv;
454
455 mp_cal_arg = _rtw_malloc(sizeof(struct rtw_mp_cal_arg));
456 if (mp_cal_arg)
457 _rtw_memset((void *)mp_cal_arg, 0, sizeof(struct rtw_mp_cal_arg));
458 else {
459 RTW_ERR("%s,malloc fail ! ", __func__);
460 return;
461 }
462
463 mp_cal_arg->cal_type = cal_tye;
464 mp_cal_arg->enable = benable;
465
466 if (rtw_mp_phl_calibration(padapter, mp_cal_arg, RTW_MP_CAL_CMD_SET_CAPABILITY_CAL))
467 RTW_INFO("%s ok\n", __func__);
468 else
469 RTW_INFO("%s fail\n", __func__);
470
471 if (mp_cal_arg)
472 _rtw_mfree(mp_cal_arg, sizeof(struct rtw_mp_cal_arg));
473
474 return;
475 }
476
477 /*
478 * General use
479 */
SetPowerTracking(_adapter * padapter,u8 enable)480 s32 SetPowerTracking(_adapter *padapter, u8 enable)
481 {
482
483 //hal_mpt_SetPowerTracking(padapter, enable);
484 return 0;
485 }
486
GetPowerTracking(_adapter * padapter,u8 * enable)487 void GetPowerTracking(_adapter *padapter, u8 *enable)
488 {
489 //hal_mpt_GetPowerTracking(padapter, enable);
490 return;
491 }
492
rtw_mp_trigger_iqk(_adapter * padapter)493 void rtw_mp_trigger_iqk(_adapter *padapter)
494 {
495 rtw_mp_cal_trigger(padapter, RTW_MP_CAL_IQK);
496 }
497
rtw_mp_trigger_lck(_adapter * padapter)498 void rtw_mp_trigger_lck(_adapter *padapter)
499 {
500 rtw_mp_cal_trigger(padapter, RTW_MP_CAL_LCK);
501 }
502
rtw_mp_trigger_dpk(_adapter * padapter)503 void rtw_mp_trigger_dpk(_adapter *padapter)
504 {
505 rtw_mp_cal_trigger(padapter, RTW_MP_CAL_DPK);
506 }
507
rtw_mp_trigger_tssi(_adapter * padapter)508 void rtw_mp_trigger_tssi(_adapter *padapter)
509 {
510 rtw_mp_cal_trigger(padapter, RTW_MP_CAL_TSSI);
511 }
512
rtw_mp_trigger_ch_rfk(_adapter * padapter)513 void rtw_mp_trigger_ch_rfk(_adapter *padapter)
514 {
515 rtw_mp_cal_trigger(padapter, RTW_MP_CAL_CHL_RFK);
516 }
517
rtw_mp_trigger_dack(_adapter * padapter)518 void rtw_mp_trigger_dack(_adapter *padapter)
519 {
520 rtw_mp_cal_trigger(padapter, RTW_MP_CAL_DACK);
521 }
522
init_mp_data(_adapter * padapter)523 static void init_mp_data(_adapter *padapter)
524 {
525 #if 0
526 struct dm_struct *phydm = adapter_to_phydm(padapter);
527
528 /*disable BCN*/
529 v8 = rtw_read8(padapter, REG_BCN_CTRL);
530 v8 &= ~EN_BCN_FUNCTION;
531 rtw_write8(padapter, REG_BCN_CTRL, v8);
532
533 phydm->rf_calibrate_info.txpowertrack_control = _FALSE;
534 #endif
535 }
536
mp_join(_adapter * padapter,u8 mode)537 u32 mp_join(_adapter *padapter, u8 mode)
538 {
539 WLAN_BSSID_EX bssid;
540 struct sta_info *psta;
541 u32 length;
542 s32 res = _SUCCESS;
543 u8 i = 0;
544 struct mp_priv *pmppriv = &padapter->mppriv;
545 struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
546 struct wlan_network *tgt_network = &pmlmepriv->cur_network;
547 struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
548 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
549 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
550 WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network));
551
552 /* 1. initialize a new WLAN_BSSID_EX */
553 _rtw_memset(&bssid, 0, sizeof(WLAN_BSSID_EX));
554 RTW_INFO("%s ,pmppriv->network_macaddr=%x %x %x %x %x %x\n", __func__,
555 pmppriv->network_macaddr[0], pmppriv->network_macaddr[1], pmppriv->network_macaddr[2], pmppriv->network_macaddr[3], pmppriv->network_macaddr[4],
556 pmppriv->network_macaddr[5]);
557 _rtw_memcpy(bssid.MacAddress, pmppriv->network_macaddr, ETH_ALEN);
558
559 if (mode == WIFI_FW_ADHOC_STATE) {
560 bssid.Ssid.SsidLength = strlen("mp_pseudo_adhoc");
561 _rtw_memcpy(bssid.Ssid.Ssid, (u8 *)"mp_pseudo_adhoc", bssid.Ssid.SsidLength);
562 bssid.InfrastructureMode = Ndis802_11IBSS;
563 bssid.IELength = 0;
564 bssid.Configuration.DSConfig = pmppriv->channel;
565
566 } else if (mode == WIFI_FW_STATION_STATE) {
567 bssid.Ssid.SsidLength = strlen("mp_pseudo_STATION");
568 _rtw_memcpy(bssid.Ssid.Ssid, (u8 *)"mp_pseudo_STATION", bssid.Ssid.SsidLength);
569 bssid.InfrastructureMode = Ndis802_11Infrastructure;
570 bssid.IELength = 0;
571 }
572
573 length = get_WLAN_BSSID_EX_sz(&bssid);
574 if (length % 4)
575 bssid.Length = ((length >> 2) + 1) << 2; /* round up to multiple of 4 bytes. */
576 else
577 bssid.Length = length;
578
579 _rtw_spinlock_bh(&pmlmepriv->lock);
580
581 if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE)
582 goto end_of_mp_start_test;
583
584 /* init mp_start_test status */
585 for (i = 0; i < dvobj->iface_nums; i++) {
586 _adapter *iface = NULL;
587 struct mlme_priv *buddy_mlmepriv;
588
589 iface = dvobj->padapters[i];
590 buddy_mlmepriv = &iface->mlmepriv;
591
592 if (iface == NULL)
593 continue;
594 if (rtw_is_adapter_up(iface) == _FALSE)
595 continue;
596 if (check_fwstate(buddy_mlmepriv, WIFI_ASOC_STATE) == _TRUE) {
597 #ifdef CONFIG_STA_CMD_DISPR
598 rtw_disassoc_cmd(iface, 500, RTW_CMDF_WAIT_ACK);
599 #else /* !CONFIG_STA_CMD_DISPR */
600 rtw_disassoc_cmd(iface, 500, 0);
601 rtw_free_assoc_resources_cmd(iface, _TRUE, RTW_CMDF_WAIT_ACK);
602 #endif /* !CONFIG_STA_CMD_DISPR */
603 rtw_indicate_disconnect(iface, 0, _FALSE);
604 }
605 }
606
607 pmppriv->prev_fw_state = get_fwstate(pmlmepriv);
608 /*pmlmepriv->fw_state = WIFI_MP_STATE;*/
609 init_fwstate(pmlmepriv, WIFI_MP_STATE);
610 set_fwstate(pmlmepriv, WIFI_UNDER_LINKING);
611
612 /* 3 2. create a new psta for mp driver */
613 /* clear psta in the cur_network, if any */
614 psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress);
615 if (psta)
616 rtw_free_stainfo(padapter, psta);
617
618 psta = rtw_alloc_stainfo(&padapter->stapriv, bssid.MacAddress);
619 if (psta == NULL) {
620 /*pmlmepriv->fw_state = pmppriv->prev_fw_state;*/
621 init_fwstate(pmlmepriv, pmppriv->prev_fw_state);
622 res = _FAIL;
623 goto end_of_mp_start_test;
624 }
625 if (mode == WIFI_FW_ADHOC_STATE)
626 set_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
627 else
628 set_fwstate(pmlmepriv, WIFI_STATION_STATE);
629 /* 3 3. join psudo AdHoc */
630 tgt_network->join_res = 1;
631 tgt_network->aid = psta->phl_sta->aid = 1;
632
633 _rtw_memcpy(&padapter->registrypriv.dev_network, &bssid, length);
634 rtw_update_registrypriv_dev_network(padapter);
635 _rtw_memcpy(&tgt_network->network, &padapter->registrypriv.dev_network, padapter->registrypriv.dev_network.Length);
636 _rtw_memcpy(pnetwork, &padapter->registrypriv.dev_network, padapter->registrypriv.dev_network.Length);
637
638 rtw_indicate_connect(padapter);
639 _clr_fwstate_(pmlmepriv, WIFI_UNDER_LINKING);
640 set_fwstate(pmlmepriv, WIFI_ASOC_STATE);
641
642 end_of_mp_start_test:
643
644 _rtw_spinunlock_bh(&pmlmepriv->lock);
645
646 if (1) { /* (res == _SUCCESS) */
647 /* set MSR to WIFI_FW_ADHOC_STATE */
648 if (mode == WIFI_FW_ADHOC_STATE) {
649 /* set msr to WIFI_FW_ADHOC_STATE */
650 pmlmeinfo->state = WIFI_FW_ADHOC_STATE;
651 rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, padapter->registrypriv.dev_network.MacAddress);
652 rtw_hal_rcr_set_chk_bssid(padapter, MLME_ADHOC_STARTED);
653 pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS;
654 } else {
655 RTW_INFO("%s , pmppriv->network_macaddr =%x %x %x %x %x %x\n", __func__,
656 pmppriv->network_macaddr[0], pmppriv->network_macaddr[1], pmppriv->network_macaddr[2], pmppriv->network_macaddr[3], pmppriv->network_macaddr[4],
657 pmppriv->network_macaddr[5]);
658
659 rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmppriv->network_macaddr);
660 }
661 }
662
663 return res;
664 }
665 /* This function initializes the DUT to the MP test mode */
mp_start_test(_adapter * padapter)666 s32 mp_start_test(_adapter *padapter)
667 {
668 struct mp_priv *pmppriv = &padapter->mppriv;
669 s32 res = _SUCCESS;
670
671 padapter->registrypriv.mp_mode = 1;
672 init_mp_priv(padapter);
673
674 init_mp_data(padapter);
675 #if 0
676 #ifdef CONFIG_PCI_HCI
677 hal = GET_PHL_COM(adapter_to_dvobj(padapter));
678 hal->pci_backdoor_ctrl = 0;
679 rtw_pci_aspm_config(padapter);
680 #endif
681
682
683 /* 3 0. update mp_priv */
684 switch (GET_HAL_RFPATH(padapter)) {
685 case RF_1T1R:
686 pmppriv->antenna_tx = ANTENNA_A;
687 pmppriv->antenna_rx = ANTENNA_A;
688 break;
689 case RF_1T2R:
690 default:
691 pmppriv->antenna_tx = ANTENNA_A;
692 pmppriv->antenna_rx = ANTENNA_AB;
693 break;
694 case RF_2T2R:
695 pmppriv->antenna_tx = ANTENNA_AB;
696 pmppriv->antenna_rx = ANTENNA_AB;
697 break;
698 case RF_2T4R:
699 pmppriv->antenna_tx = ANTENNA_AB;
700 pmppriv->antenna_rx = ANTENNA_ABCD;
701 break;
702 }
703 #endif
704 mpt_ProStartTest(padapter);
705
706 mp_join(padapter, WIFI_FW_ADHOC_STATE);
707
708 return res;
709 }
710 /* ------------------------------------------------------------------------------
711 * This function change the DUT from the MP test mode into normal mode */
mp_stop_test(_adapter * padapter)712 void mp_stop_test(_adapter *padapter)
713 {
714 struct mp_priv *pmppriv = &padapter->mppriv;
715 struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
716 struct wlan_network *tgt_network = &pmlmepriv->cur_network;
717 struct sta_info *psta;
718 #ifdef CONFIG_PCI_HCI
719 struct registry_priv *registry_par = &padapter->registrypriv;
720 #endif
721
722 if (pmppriv->mode == MP_ON) {
723 pmppriv->bSetTxPower = 0;
724 _rtw_spinlock_bh(&pmlmepriv->lock);
725 if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _FALSE)
726 goto end_of_mp_stop_test;
727
728 /* 3 1. disconnect psudo AdHoc */
729 rtw_indicate_disconnect(padapter, 0, _FALSE);
730
731 /* 3 2. clear psta used in mp test mode.
732 * rtw_free_assoc_resources(padapter, _TRUE); */
733 psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress);
734 if (psta)
735 rtw_free_stainfo(padapter, psta);
736
737 /* 3 3. return to normal state (default:station mode) */
738 /*pmlmepriv->fw_state = pmppriv->prev_fw_state; */ /* WIFI_STATION_STATE;*/
739 init_fwstate(pmlmepriv, pmppriv->prev_fw_state);
740
741 /* flush the cur_network */
742 _rtw_memset(tgt_network, 0, sizeof(struct wlan_network));
743
744 _clr_fwstate_(pmlmepriv, WIFI_MP_STATE);
745
746 end_of_mp_stop_test:
747
748 _rtw_spinunlock_bh(&pmlmepriv->lock);
749
750 #if 0//def CONFIG_PCI_HCI
751 hal = GET_PHL_COM(adapter_to_dvobj(padapter));
752 hal->pci_backdoor_ctrl = registry_par->pci_aspm_config;
753 rtw_pci_aspm_config(padapter);
754 #endif
755 }
756 }
757
SetChannel(_adapter * padapter)758 void SetChannel(_adapter *padapter)
759 {
760 #ifdef CONFIG_MP_INCLUDED
761 rtw_mp_phl_config_arg(padapter, RTW_MP_CONFIG_CMD_SET_CH_BW);
762 #else
763 //hal_mpt_SetChannel(adapter);
764 #endif
765 }
766
SetGpio(_adapter * padapter)767 void SetGpio(_adapter *padapter)
768 {
769 rtw_mp_phl_config_arg(padapter, RTW_MP_CONFIG_CMD_SET_GPIO);
770 }
771
SetBandwidth(_adapter * padapter)772 void SetBandwidth(_adapter *padapter)
773 {
774 #ifdef CONFIG_MP_INCLUDED
775 rtw_mp_phl_config_arg(padapter, RTW_MP_CONFIG_CMD_SET_CH_BW);
776 #else
777 //hal_mpt_SetBandwidth(adapter);
778 #endif
779 }
780
SetAntenna(_adapter * padapter)781 void SetAntenna(_adapter *padapter)
782 {
783 mp_ant_path mp_trx_path = padapter->mppriv.antenna_trx;
784 u8 cfg_rf_path = RF_PATH_A;
785
786 switch (mp_trx_path) {
787 case MP_ANTENNA_A:
788 cfg_rf_path = RF_PATH_A;
789 break;
790 case MP_ANTENNA_B:
791 cfg_rf_path = RF_PATH_B;
792 break;
793 case MP_ANTENNA_C:
794 cfg_rf_path = RF_PATH_C;
795 break;
796 case MP_ANTENNA_D:
797 cfg_rf_path = RF_PATH_D;
798 break;
799 case MP_ANTENNA_AB:
800 cfg_rf_path = RF_PATH_AB;
801 break;
802 case MP_ANTENNA_AC:
803 cfg_rf_path = RF_PATH_AC;
804 break;
805 case MP_ANTENNA_AD:
806 cfg_rf_path = RF_PATH_AD;
807 break;
808 case MP_ANTENNA_BC:
809 cfg_rf_path = RF_PATH_BC;
810 break;
811 case MP_ANTENNA_BD:
812 cfg_rf_path = RF_PATH_BD;
813 break;
814 case MP_ANTENNA_CD:
815 cfg_rf_path = RF_PATH_CD;
816 break;
817 case MP_ANTENNA_ABC:
818 cfg_rf_path = RF_PATH_ABC;
819 break;
820 case MP_ANTENNA_BCD:
821 cfg_rf_path = RF_PATH_BCD;
822 break;
823 case MP_ANTENNA_ABD:
824 cfg_rf_path = RF_PATH_ABD;
825 break;
826 case MP_ANTENNA_ACD:
827 cfg_rf_path = RF_PATH_ACD;
828 break;
829 case MP_ANTENNA_ABCD:
830 cfg_rf_path = RF_PATH_ABCD;
831 break;
832 default:
833 RTW_INFO("%s ,default Antenna Path A\n", __func__);
834 break;
835 }
836
837 padapter->mppriv.antenna_trx = cfg_rf_path;
838 rtw_mp_phl_config_arg(padapter, RTW_MP_CONFIG_CMD_SET_RF_TXRX_PATH);
839 }
840
rtw_mp_txpoweridx(_adapter * adapter)841 int rtw_mp_txpoweridx(_adapter *adapter)
842 {
843 struct rtw_mp_txpwr_arg ptxpwr_arg;
844 struct mp_priv *pmppriv = &adapter->mppriv;
845 u8 tx_nss = get_phy_tx_nss(adapter);
846 u8 i = 0;
847
848 _rtw_memset((void *)&ptxpwr_arg, 0, sizeof(struct rtw_mp_txpwr_arg));
849
850 ptxpwr_arg.txpwr_index = pmppriv->txpoweridx * TX_POWER_CODE_WORD_BASE;
851
852 for (i = 0; i < tx_nss; i++) {
853 ptxpwr_arg.rfpath = i;
854 ptxpwr_arg.is_cck = rtw_mp_is_cck_rate(pmppriv->rateidx);
855
856 rtw_mp_phl_txpower(adapter, &ptxpwr_arg, RTW_MP_TXPWR_CMD_SET_TXPWR_INDEX);
857 }
858 return _TRUE;
859 }
860
rtw_mp_get_pwr_refcw(_adapter * adapter,u8 rfpath,u8 is_cck)861 s16 rtw_mp_get_pwr_refcw(_adapter *adapter, u8 rfpath, u8 is_cck)
862 {
863 struct rtw_mp_txpwr_arg ptxpwr_arg;
864 struct mp_priv *pmppriv = &adapter->mppriv;
865 s16 txpwr_refcw_idx;
866
867 _rtw_memset((void *)&ptxpwr_arg, 0, sizeof(struct rtw_mp_txpwr_arg));
868 ptxpwr_arg.rfpath = rfpath;
869 ptxpwr_arg.is_cck = is_cck;
870
871 rtw_mp_phl_txpower(adapter, &ptxpwr_arg, RTW_MP_TXPWR_CMD_GET_TXPWR_REF_CW);
872 txpwr_refcw_idx = ptxpwr_arg.txpwr_index / TX_POWER_CODE_WORD_BASE;
873
874 RTW_INFO("%s ,pwr ref cw: %d\n", __func__, txpwr_refcw_idx);
875 return txpwr_refcw_idx;
876 }
877
rtw_mp_get_pwr_ref(_adapter * adapter,u8 rfpath)878 u16 rtw_mp_get_pwr_ref(_adapter *adapter, u8 rfpath)
879 {
880 struct rtw_mp_txpwr_arg ptxpwr_arg;
881 struct mp_priv *pmppriv = &adapter->mppriv;
882 s16 txpwr_ref;
883
884 _rtw_memset((void *)&ptxpwr_arg, 0, sizeof(struct rtw_mp_txpwr_arg));
885 ptxpwr_arg.rfpath = rfpath;
886 ptxpwr_arg.is_cck = rtw_mp_is_cck_rate(pmppriv->rateidx);
887
888 rtw_mp_phl_txpower(adapter, &ptxpwr_arg, RTW_MP_TXPWR_CMD_GET_TXPWR_REF);
889 txpwr_ref = ptxpwr_arg.txpwr_ref / TX_POWER_BASE;
890
891 RTW_INFO("%s ,pwr ref: %d\n", __func__, txpwr_ref);
892 return txpwr_ref;
893 }
894
rtw_mp_get_pwrtab_dbm(_adapter * adapter,u8 rfpath)895 u16 rtw_mp_get_pwrtab_dbm(_adapter *adapter, u8 rfpath)
896 {
897 struct rtw_mp_txpwr_arg ptxpwr_arg;
898 struct mp_priv *pmppriv = &adapter->mppriv;
899 s16 txpwr_dbm;
900
901 _rtw_memset((void *)&ptxpwr_arg, 0, sizeof(struct rtw_mp_txpwr_arg));
902 ptxpwr_arg.rfpath = rfpath;
903 ptxpwr_arg.is_cck = rtw_mp_is_cck_rate(pmppriv->rateidx);
904 ptxpwr_arg.rate = pmppriv->rateidx;
905 ptxpwr_arg.dcm = 0;
906 ptxpwr_arg.offset = 0;
907 ptxpwr_arg.bandwidth = pmppriv->bandwidth;
908 ptxpwr_arg.beamforming = 0;
909 ptxpwr_arg.channel = pmppriv->channel;
910
911 rtw_mp_phl_txpower(adapter, &ptxpwr_arg, RTW_MP_TXPWR_CMD_READ_PWR_TABLE);
912 txpwr_dbm = ptxpwr_arg.table_item / TX_POWER_BASE;
913
914 RTW_INFO("%s ,read PwrTab dbm: %d\n", __func__, txpwr_dbm);
915 return txpwr_dbm;
916 }
917
918
rtw_mp_txpower_dbm(_adapter * adapter,u8 rf_path)919 u16 rtw_mp_txpower_dbm(_adapter *adapter, u8 rf_path)
920 {
921 struct mp_priv *pmppriv = &adapter->mppriv;
922 struct rtw_mp_txpwr_arg ptxpwr_arg;
923 u16 tmp_power_ref = 0;
924 u16 agc_cw_val = 0;
925 s16 pre_pwr_refcw_idx = 0;
926
927 _rtw_memset((void *)&ptxpwr_arg, 0, sizeof(struct rtw_mp_txpwr_arg));
928
929 ptxpwr_arg.txpwr = pmppriv->txpowerdbm;
930 ptxpwr_arg.is_cck = rtw_mp_is_cck_rate(pmppriv->rateidx);
931 ptxpwr_arg.rfpath = rf_path;
932
933 rtw_mp_phl_txpower(adapter, &ptxpwr_arg, RTW_MP_TXPWR_CMD_SET_TXPWR);
934
935 if (pmppriv->pre_refcw_cck_pwridxa == 0 || pmppriv->pre_refcw_cck_pwridxb == 0) {
936 pmppriv->pre_refcw_cck_pwridxa = rtw_mp_get_pwr_refcw(adapter, RF_PATH_A, 1);
937 pmppriv->pre_refcw_cck_pwridxb = rtw_mp_get_pwr_refcw(adapter, RF_PATH_B, 1);
938 }
939 if (pmppriv->pre_refcw_ofdm_pwridxa == 0 || pmppriv->pre_refcw_ofdm_pwridxb == 0) {
940 pmppriv->pre_refcw_ofdm_pwridxa = rtw_mp_get_pwr_refcw(adapter, RF_PATH_A, 0);
941 pmppriv->pre_refcw_ofdm_pwridxb = rtw_mp_get_pwr_refcw(adapter, RF_PATH_B, 0);
942 }
943
944 if (rf_path == RF_PATH_A && ptxpwr_arg.is_cck == true)
945 pre_pwr_refcw_idx = pmppriv->pre_refcw_cck_pwridxa;
946 else if (rf_path == RF_PATH_B && ptxpwr_arg.is_cck == true)
947 pre_pwr_refcw_idx = pmppriv->pre_refcw_cck_pwridxb;
948 else if (rf_path == RF_PATH_A && ptxpwr_arg.is_cck == false)
949 pre_pwr_refcw_idx = pmppriv->pre_refcw_ofdm_pwridxa;
950 else if (rf_path == RF_PATH_B && ptxpwr_arg.is_cck == false)
951 pre_pwr_refcw_idx = pmppriv->pre_refcw_ofdm_pwridxb;
952
953 tmp_power_ref = rtw_mp_get_pwr_ref(adapter, rf_path);
954 RTW_INFO("%s () tmp_power_ref: %d !! pre_pwr_refcw_idx:%d, pwr offset %d\n",
955 __func__, tmp_power_ref, pre_pwr_refcw_idx , pmppriv->txpoweridx);
956 agc_cw_val = pmppriv->txpowerdbm - tmp_power_ref + pre_pwr_refcw_idx + pmppriv->txpoweridx;
957
958 ptxpwr_arg.txpwr_index = (pre_pwr_refcw_idx + pmppriv->txpoweridx) * TX_POWER_CODE_WORD_BASE;
959 rtw_mp_phl_txpower(adapter, &ptxpwr_arg, RTW_MP_TXPWR_CMD_SET_TXPWR_INDEX);
960
961 return agc_cw_val;
962 }
963
SetDataRate(_adapter * padapter)964 void SetDataRate(_adapter *padapter)
965 {
966
967 rtw_mp_phl_config_arg(padapter, RTW_MP_CONFIG_CMD_SET_RATE_IDX);
968
969 return;
970 }
971
SetTxAGCOffset(_adapter * adapter,u32 ulTxAGCOffset)972 void SetTxAGCOffset(_adapter *adapter, u32 ulTxAGCOffset)
973 {
974 u32 TxAGCOffset_B, TxAGCOffset_C, TxAGCOffset_D, tmpAGC;
975
976 TxAGCOffset_B = (ulTxAGCOffset & 0x000000ff);
977 TxAGCOffset_C = ((ulTxAGCOffset & 0x0000ff00) >> 8);
978 TxAGCOffset_D = ((ulTxAGCOffset & 0x00ff0000) >> 16);
979
980 tmpAGC = (TxAGCOffset_D << 8 | TxAGCOffset_C << 4 | TxAGCOffset_B);
981 // write_bbreg(adapter, rFPGA0_TxGainStage,
982 // (bXBTxAGC | bXCTxAGC | bXDTxAGC), tmpAGC);
983 }
984
MP_PHY_SetRFPathSwitch(_adapter * adapter,BOOLEAN bMain)985 void MP_PHY_SetRFPathSwitch(_adapter *adapter , BOOLEAN bMain)
986 {
987 //PHY_SetRFPathSwitch(adapter, bMain);
988 return;
989 }
990
mp_phy_switch_rf_path_set(_adapter * adapter,u8 * pstate)991 void mp_phy_switch_rf_path_set(_adapter *adapter , u8 *pstate)
992 {
993
994 //phy_switch_rf_path_set(adapter, pstate);
995 return;
996
997 }
998
MP_PHY_QueryRFPathSwitch(_adapter * adapter)999 u8 MP_PHY_QueryRFPathSwitch(_adapter *adapter)
1000 {
1001 //return PHY_QueryRFPathSwitch(adapter);
1002 return 0;
1003 }
1004
SetThermalMeter(_adapter * adapter,u8 target_ther)1005 s32 SetThermalMeter(_adapter *adapter, u8 target_ther)
1006 {
1007 //return hal_mpt_SetThermalMeter(adapter, target_ther);
1008 return 0;
1009 }
1010
1011 #if 0
1012 static void TriggerRFThermalMeter(_adapter *adapter)
1013 {
1014 hal_mpt_TriggerRFThermalMeter(adapter);
1015 }
1016
1017 static u8 ReadRFThermalMeter(_adapter *adapter)
1018 {
1019 return hal_mpt_ReadRFThermalMeter(adapter);
1020 }
1021 #endif
1022
GetUuid(_adapter * adapter,u32 * uuid)1023 void GetUuid(_adapter *adapter, u32 *uuid)
1024 {
1025 struct rtw_mp_config_arg pmp_arg;
1026 u16 i = 0;
1027
1028 _rtw_memset((void *)&pmp_arg, 0, sizeof(struct rtw_mp_config_arg));
1029
1030 pmp_arg.mp_class = RTW_MP_CLASS_CONFIG;
1031 pmp_arg.cmd = RTW_MP_CONFIG_CMD_GET_UUID;
1032 RTW_INFO("%s, id: %d !!!\n", __func__, pmp_arg.cmd);
1033
1034 rtw_mp_set_phl_cmd(adapter, (void*)&pmp_arg, sizeof(struct rtw_mp_config_arg));
1035
1036 while (i != 100) {
1037 rtw_msleep_os(10);
1038 rtw_mp_get_phl_cmd(adapter, (void*)&pmp_arg, sizeof(struct rtw_mp_config_arg));
1039
1040 if (pmp_arg.cmd_ok && pmp_arg.status == RTW_PHL_STATUS_SUCCESS) {
1041 *uuid = pmp_arg.uuid;
1042 RTW_INFO("%s, SET CMD OK, uuid = %d\n", __func__, pmp_arg.uuid);
1043 break;
1044 } else {
1045 if (i > 100) {
1046 RTW_INFO("%s,GET CMD FAIL !!! status %d\n", __func__, pmp_arg.status);
1047 break;
1048 }
1049 i++;
1050 rtw_msleep_os(10);
1051 }
1052 }
1053 }
1054
GetThermalMeter(_adapter * adapter,u8 rfpath,u8 * value)1055 void GetThermalMeter(_adapter *adapter, u8 rfpath ,u8 *value)
1056 {
1057 struct mp_priv *pmppriv = &adapter->mppriv;
1058 struct rtw_mp_txpwr_arg ptxpwr_arg;
1059 u16 i = 0;
1060
1061 _rtw_memset((void *)&ptxpwr_arg, 0, sizeof(struct rtw_mp_txpwr_arg));
1062
1063 ptxpwr_arg.mp_class = RTW_MP_CLASS_TXPWR;
1064 ptxpwr_arg.cmd = RTW_MP_TXPWR_CMD_GET_THERMAL;
1065 ptxpwr_arg.rfpath = rfpath;
1066
1067 rtw_mp_set_phl_cmd(adapter, (void*)&ptxpwr_arg, sizeof(struct rtw_mp_txpwr_arg));
1068
1069 while (i != 100) {
1070 rtw_msleep_os(10);
1071 rtw_mp_get_phl_cmd(adapter, (void*)&ptxpwr_arg, sizeof(struct rtw_mp_txpwr_arg));
1072
1073 if (ptxpwr_arg.cmd_ok && ptxpwr_arg.status == RTW_PHL_STATUS_SUCCESS) {
1074 *value = ptxpwr_arg.thermal;
1075 RTW_INFO("%s, SET CMD OK, thermal = %d\n", __func__, ptxpwr_arg.thermal);
1076 break;
1077 } else {
1078 if (i > 100) {
1079 RTW_INFO("%s,GET CMD FAIL !!! status %d\n", __func__, ptxpwr_arg.status);
1080 break;
1081 }
1082 i++;
1083 rtw_msleep_os(10);
1084 }
1085 }
1086 }
1087
rtw_mp_singlecarrier_tx(_adapter * adapter,u8 bstart)1088 void rtw_mp_singlecarrier_tx(_adapter *adapter, u8 bstart)
1089 {
1090 RTW_INFO("Not Supported SetSingleCarrierTx \n");
1091 }
1092
rtw_mp_singletone_tx(_adapter * adapter,u8 bstart)1093 void rtw_mp_singletone_tx(_adapter *adapter, u8 bstart)
1094 {
1095 struct mp_priv *pmp_priv = &adapter->mppriv;
1096
1097 rtw_mp_txpwr_level(adapter);
1098 rtw_phl_mp_tx_cmd(adapter, RTW_MP_TX_SINGLE_TONE, pmp_priv->rtw_mp_tx_method, bstart);
1099 }
1100
rtw_mp_carriersuppr_tx(_adapter * adapter,u8 bstart)1101 void rtw_mp_carriersuppr_tx(_adapter *adapter, u8 bstart)
1102 {
1103 struct mp_priv *pmp_priv = &adapter->mppriv;
1104
1105 rtw_mp_txpwr_level(adapter);
1106 rtw_phl_mp_tx_cmd(adapter, RTW_MP_TX_CCK_Carrier_Suppression, pmp_priv->rtw_mp_tx_method, bstart);
1107 }
1108
rtw_mp_continuous_tx(_adapter * adapter,u8 bstart)1109 void rtw_mp_continuous_tx(_adapter *adapter, u8 bstart)
1110 {
1111 struct mp_priv *pmp_priv = &adapter->mppriv;
1112
1113 rtw_mp_txpwr_level(adapter);
1114 rtw_phl_mp_tx_cmd(adapter, RTW_MP_TX_CONTINUOUS, pmp_priv->rtw_mp_tx_method, bstart);
1115 }
1116
rtw_mp_txpwr_level(_adapter * adapter)1117 void rtw_mp_txpwr_level(_adapter *adapter)
1118 {
1119 struct mp_priv *pmp_priv = &adapter->mppriv;
1120 /*
1121 if (pmp_priv->bSetTxPower == 0)
1122 rtw_hal_set_tx_power_level(adapter, pmp_priv->channel);
1123 */
1124
1125 return;
1126 }
1127
1128 /* ------------------------------------------------------------------------------ */
dump_mpframe(_adapter * padapter,struct xmit_frame * pmpframe)1129 static void dump_mpframe(_adapter *padapter, struct xmit_frame *pmpframe)
1130 {
1131 /*rtw_hal_mgnt_xmit(padapter, pmpframe);*/
1132 rtw_mgnt_xmit(padapter, pmpframe);
1133 }
1134
alloc_mp_xmitframe(struct xmit_priv * pxmitpriv)1135 static struct xmit_frame *alloc_mp_xmitframe(struct xmit_priv *pxmitpriv)
1136 {
1137 #if 0 /*CONFIG_CORE_XMITBUF*/
1138 struct xmit_frame *pmpframe;
1139 struct xmit_buf *pxmitbuf;
1140
1141 pmpframe = rtw_alloc_xmitframe(pxmitpriv);
1142 if (pmpframe == NULL)
1143 return NULL;
1144
1145 pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
1146 if (pxmitbuf == NULL) {
1147 rtw_free_xmitframe(pxmitpriv, pmpframe);
1148 return NULL;
1149 }
1150
1151 pmpframe->frame_tag = MP_FRAMETAG;
1152
1153 pmpframe->pxmitbuf = pxmitbuf;
1154
1155 pmpframe->buf_addr = pxmitbuf->pbuf;
1156
1157 pxmitbuf->priv_data = pmpframe;
1158 #else
1159 struct xmit_frame *pmpframe;
1160
1161 pmpframe = rtw_alloc_xmitframe(pxmitpriv, 0);
1162 if (pmpframe == NULL)
1163 return NULL;
1164
1165 pmpframe->frame_tag = MP_FRAMETAG;
1166 #endif
1167
1168 return pmpframe;
1169
1170 }
1171
mp_xmit_packet_thread(thread_context context)1172 static thread_return mp_xmit_packet_thread(thread_context context)
1173 {
1174 struct xmit_frame *pxmitframe;
1175 struct mp_tx *pmptx;
1176 struct mp_priv *pmp_priv;
1177 struct xmit_priv *pxmitpriv;
1178 _adapter *padapter;
1179
1180 pmp_priv = (struct mp_priv *)context;
1181 pmptx = &pmp_priv->tx;
1182 padapter = pmp_priv->papdater;
1183 pxmitpriv = &(padapter->xmitpriv);
1184
1185 rtw_thread_enter("RTW_MP_THREAD");
1186
1187 RTW_INFO("%s:pkTx Start\n", __func__);
1188 while (1) {
1189 pxmitframe = alloc_mp_xmitframe(pxmitpriv);
1190
1191 if (pxmitframe == NULL) {
1192 if (pmptx->stop ||
1193 RTW_CANNOT_RUN(adapter_to_dvobj(padapter)))
1194 goto exit;
1195 else {
1196 rtw_usleep_os(10);
1197 continue;
1198 }
1199 }
1200 _rtw_memcpy((u8 *)(pxmitframe->buf_addr + TXDESC_OFFSET), pmptx->buf, pmptx->write_size);
1201 _rtw_memcpy(&(pxmitframe->attrib), &(pmptx->attrib), sizeof(struct pkt_attrib));
1202
1203
1204 rtw_usleep_os(padapter->mppriv.pktInterval);
1205 dump_mpframe(padapter, pxmitframe);
1206
1207 pmptx->sended++;
1208 pmp_priv->tx_pktcount++;
1209
1210 if (pmptx->stop ||
1211 RTW_CANNOT_RUN(adapter_to_dvobj(padapter)))
1212 goto exit;
1213 if ((pmptx->count != 0) &&
1214 (pmptx->count == pmptx->sended))
1215 goto exit;
1216
1217 flush_signals_thread();
1218 }
1219
1220 exit:
1221 /* RTW_INFO("%s:pkTx Exit\n", __func__); */
1222 rtw_mfree(pmptx->pallocated_buf, pmptx->buf_size);
1223 pmptx->pallocated_buf = NULL;
1224 pmptx->stop = 1;
1225
1226 rtw_thread_exit(NULL);
1227 return 0;
1228 }
1229
fill_txdesc_for_mp(_adapter * padapter,u8 * ptxdesc)1230 void fill_txdesc_for_mp(_adapter *padapter, u8 *ptxdesc)
1231 {
1232 struct mp_priv *pmp_priv = &padapter->mppriv;
1233 _rtw_memcpy(ptxdesc, pmp_priv->tx.desc, TXDESC_SIZE);
1234 }
1235
Rtw_MPSetMacTxEDCA(_adapter * padapter)1236 static void Rtw_MPSetMacTxEDCA(_adapter *padapter)
1237 {
1238 #if 0
1239 rtw_write32(padapter, 0x508 , 0x00a422); /* Disable EDCA BE Txop for MP pkt tx adjust Packet interval */
1240 /* RTW_INFO("%s:write 0x508~~~~~~ 0x%x\n", __func__,rtw_read32(padapter, 0x508)); */
1241 phy_set_mac_reg(padapter, 0x458 , bMaskDWord , 0x0);
1242 /*RTW_INFO("%s()!!!!! 0x460 = 0x%x\n" ,__func__, phy_query_bb_reg(padapter, 0x460, bMaskDWord));*/
1243 phy_set_mac_reg(padapter, 0x460 , bMaskLWord , 0x0); /* fast EDCA queue packet interval & time out value*/
1244 /*phy_set_mac_reg(padapter, ODM_EDCA_VO_PARAM ,bMaskLWord , 0x431C);*/
1245 /*phy_set_mac_reg(padapter, ODM_EDCA_BE_PARAM ,bMaskLWord , 0x431C);*/
1246 /*phy_set_mac_reg(padapter, ODM_EDCA_BK_PARAM ,bMaskLWord , 0x431C);*/
1247 RTW_INFO("%s()!!!!! 0x460 = 0x%x\n" , __func__, phy_query_bb_reg(padapter, 0x460, bMaskDWord));
1248 #endif
1249 }
1250
rtw_phl_mp_tx_cmd(_adapter * padapter,enum rtw_mp_tx_cmd cmdid,enum rtw_mp_tx_method tx_method,boolean bstart)1251 u8 rtw_phl_mp_tx_cmd(_adapter *padapter, enum rtw_mp_tx_cmd cmdid,
1252 enum rtw_mp_tx_method tx_method, boolean bstart)
1253 {
1254 struct mp_priv *pmppriv = &padapter->mppriv;
1255 struct pkt_attrib *pattrib = &pmppriv->tx.attrib;
1256 struct rtw_mp_tx_arg tx_arg;
1257 u16 i = 0;
1258 u8 user_idx = pmppriv->mp_plcp_useridx;
1259
1260 _rtw_memset((void *)&tx_arg, 0, sizeof(struct rtw_mp_tx_arg));
1261 tx_arg.mp_class = RTW_MP_CLASS_TX;
1262 tx_arg.tx_method = tx_method;
1263 tx_arg.cmd = cmdid;
1264 tx_arg.cmd_ok = 0;
1265 tx_arg.tx_ok = 0;
1266 tx_arg.data_rate = pmppriv->rateidx;
1267 tx_arg.is_cck = rtw_mp_is_cck_rate(pmppriv->rateidx);
1268 tx_arg.start_tx = bstart;
1269 tx_arg.tx_path = pmppriv->antenna_trx;
1270 tx_arg.gi = pmppriv->rtw_mp_plcp_gi;
1271 tx_arg.period = pmppriv->pktInterval;
1272 tx_arg.plcp_usr_idx = user_idx;
1273 tx_arg.stbc = pmppriv->rtw_mp_stbc;
1274 tx_arg.tx_state = 0;
1275
1276 switch (cmdid) {
1277 case RTW_MP_TX_PACKETS:
1278 RTW_INFO("%s,SET MP_TX_PACKETS tx_method %d\n", __func__, tx_arg.tx_method);
1279 if (tx_method == RTW_MP_PMACT_TX) {
1280 tx_arg.tx_mode = RTW_MP_PMAC_PKTS_TX;
1281 tx_arg.tx_cnt = pmppriv->tx.count;
1282 tx_arg.tx_time = pmppriv->rtw_mp_tx_time;
1283
1284 } else if (tx_method == RTW_MP_FW_PMACT_TX) {
1285 tx_arg.tx_mode = RTW_MP_PMAC_FW_TRIG_TX;
1286 tx_arg.tx_cnt = 0;
1287 tx_arg.tx_time = 60;
1288 }
1289 break;
1290 case RTW_MP_TX_CONTINUOUS:
1291 RTW_INFO("%s,SET MP_TX_CONTINUOUS\n", __func__);
1292 tx_arg.tx_mode = RTW_MP_PMAC_CONT_TX;
1293 break;
1294 case RTW_MP_TX_SINGLE_TONE:
1295 RTW_INFO("%s,SET TX_OFDM_Single_Tone\n", __func__);
1296 tx_arg.tx_mode = RTW_MP_PMAC_OFDM_SINGLE_TONE_TX;
1297 break;
1298 case RTW_MP_TX_CCK_Carrier_Suppression:
1299 RTW_INFO("%s,SET TX_CCK_Carrier_Suppression\n", __func__);
1300 tx_arg.tx_mode = RTW_MP_PMAC_CCK_CARRIER_SIPPRESSION_TX;
1301 break;
1302 case RTW_MP_TX_CONFIG_PLCP_PATTERN:
1303 RTW_INFO("%s,SET MP_TX_CONFIG_PLCP_PATTERN\n", __func__);
1304 tx_arg.plcp_case_id = pmppriv->rtw_mp_pmact_patt_idx;
1305 tx_arg.plcp_ppdu_type = pmppriv->rtw_mp_pmact_ppdu_type;
1306 break;
1307 case RTW_MP_TX_CONFIG_PLCP_COMMON_INFO:
1308 tx_arg.dbw = pmppriv->rtw_mp_data_bandwidth;
1309 tx_arg.long_preamble_en = pmppriv->preamble;
1310 tx_arg.stbc = pmppriv->rtw_mp_stbc;
1311 tx_arg.gi = pmppriv->rtw_mp_plcp_gi;
1312 tx_arg.he_ltf_type = pmppriv->rtw_mp_plcp_ltf;
1313 tx_arg.he_mcs_sigb = pmppriv->rtw_mp_he_sigb;
1314 tx_arg.he_dcm_sigb = pmppriv->rtw_mp_he_sigb_dcm;
1315 tx_arg.bss_color = 0;
1316 tx_arg.he_er_u106ru_en = pmppriv->rtw_mp_he_er_su_ru_106_en;
1317 if (pmppriv->rtw_mp_tx_method == RTW_MP_FW_PMACT_TX) {
1318 pmppriv->rtw_mp_plcp_tx_time = 5484;
1319 pmppriv->rtw_mp_plcp_tx_mode = 1;
1320 }
1321 tx_arg.max_tx_time_0p4us = pmppriv->rtw_mp_plcp_tx_time;
1322 tx_arg.mode = pmppriv->rtw_mp_plcp_tx_mode;
1323 tx_arg.ppdu_type = pmppriv->rtw_mp_pmact_ppdu_type;
1324 tx_arg.cbw = pmppriv->bandwidth;
1325 tx_arg.txsc = pmppriv->rtw_mp_trxsc;
1326 tx_arg.n_user = pmppriv->rtw_mp_plcp_tx_user;
1327
1328 RTW_INFO("%s,SET TX_CONFIG_PLCP_COMMON_INFO\n", __func__);
1329 RTW_INFO("%s=============================\n", __func__);
1330 RTW_INFO("%s dbw = %d\n", __func__, tx_arg.dbw);
1331 RTW_INFO("%s long_preamble_en = %d\n", __func__, tx_arg.long_preamble_en);
1332 RTW_INFO("%s stbc = %d\n", __func__, tx_arg.stbc);
1333 RTW_INFO("%s gi = %d\n", __func__, tx_arg.gi);
1334 RTW_INFO("%s tb_l_len = %d\n", __func__, tx_arg.tb_l_len);
1335 RTW_INFO("%s he_ltf_type = %d\n", __func__, tx_arg.he_ltf_type);
1336 RTW_INFO("%s he_mcs_sigb = %d\n", __func__, tx_arg.he_mcs_sigb);
1337 RTW_INFO("%s he_dcm_sigb = %d\n", __func__, tx_arg.he_dcm_sigb);
1338 RTW_INFO("%s max_tx_time_0p4us = %d\n", __func__, tx_arg.max_tx_time_0p4us);
1339 RTW_INFO("%s bss_color = %d\n", __func__, tx_arg.bss_color);
1340 RTW_INFO("%s he_er_u106ru_en = %d\n", __func__, tx_arg.he_er_u106ru_en);
1341 RTW_INFO("%s mode = %d\n", __func__, tx_arg.mode);
1342 RTW_INFO("%s ppdu_type = %d\n", __func__, tx_arg.ppdu_type);
1343 RTW_INFO("%s cbw = %d\n", __func__, tx_arg.cbw);
1344 RTW_INFO("%s txsc = %d\n", __func__, tx_arg.txsc);
1345 RTW_INFO("%s n_user = %d\n", __func__, tx_arg.n_user);
1346 RTW_INFO("%s=============================\n", __func__);
1347 break;
1348 case RTW_MP_TX_CMD_PHY_OK:
1349 /*TBD. API not ready*/
1350 RTW_INFO("%s,SET MP_TX_CMD_PHY_OK\n", __func__);
1351 break;
1352 case RTW_MP_TX_CONFIG_PLCP_USER_INFO:
1353 tx_arg.plcp_usr_idx = user_idx;
1354 tx_arg.mcs = pmppriv->mp_plcp_user[user_idx].plcp_mcs;
1355 tx_arg.fec = pmppriv->mp_plcp_user[user_idx].coding;
1356 tx_arg.dcm = pmppriv->mp_plcp_user[user_idx].dcm;
1357 tx_arg.aid = pmppriv->mp_plcp_user[user_idx].aid;
1358 tx_arg.scrambler_seed = (rtw_random32() % 127) + 1;
1359 tx_arg.random_init_seed = (rtw_random32() % 127) + 1;
1360 tx_arg.apep = pmppriv->mp_plcp_user[user_idx].plcp_txlen;
1361 tx_arg.ru_alloc = pmppriv->mp_plcp_user[user_idx].ru_alloc;
1362 tx_arg.nss = pmppriv->mp_plcp_user[user_idx].plcp_nss + 1;
1363 tx_arg.pwr_boost_db = pmppriv->mp_plcp_user[user_idx].pwr_boost_db;
1364 tx_arg.fec = pmppriv->mp_plcp_user[user_idx].coding;
1365
1366 RTW_INFO("%s,SET MP_TX_CONFIG_PLCP_USER_INFO\n", __func__);
1367 RTW_INFO("%s plcp_usr_idx = %d\n", __func__, tx_arg.plcp_usr_idx);
1368 RTW_INFO("%s mcs = %d\n", __func__, tx_arg.mcs);
1369 RTW_INFO("%s fec = %d\n", __func__, tx_arg.fec);
1370 RTW_INFO("%s dcm = %d\n", __func__, tx_arg.dcm);
1371 RTW_INFO("%s ascrambler_seed = %d\n", __func__, tx_arg.scrambler_seed);
1372 RTW_INFO("%s random_init_seed = %d\n", __func__, tx_arg.random_init_seed);
1373 RTW_INFO("%s apep = %d\n", __func__, tx_arg.apep);
1374 RTW_INFO("%s ru_alloc = %d\n", __func__, tx_arg.ru_alloc);
1375 RTW_INFO("%s nss = %d\n", __func__, tx_arg.nss);
1376 break;
1377 case RTW_MP_TX_MODE_SWITCH:
1378 if (tx_method == RTW_MP_TMACT_TX)
1379 tx_arg.tx_mode = 0;/* mode: 0 = tmac, 1 = pmac */
1380 else
1381 tx_arg.tx_mode = 1;/* mode: 0 = tmac, 1 = pmac */
1382 RTW_INFO("%s,SET MP_TX_MODE_SWITCH\n", __func__);
1383 break;
1384 case RTW_MP_TX_CHECK_TX_IDLE:
1385 RTW_INFO("%s,GET RTW_MP_TX_CHECK_TX_IDLE !\n", __func__);
1386 break;
1387 default:
1388 RTW_INFO("%s,SET MP_TX_MODE None\n", __func__);
1389 return 0;
1390 }
1391
1392 rtw_mp_set_phl_cmd(padapter, (void*)&tx_arg, sizeof(struct rtw_mp_tx_arg));
1393 while (i != 100) {
1394 rtw_mp_get_phl_cmd(padapter, (void*)&tx_arg, sizeof(struct rtw_mp_tx_arg));
1395 if (tx_arg.cmd_ok && tx_arg.status == RTW_PHL_STATUS_SUCCESS) {
1396 RTW_INFO("%s,SET CMD OK\n", __func__);
1397 if (cmdid == RTW_MP_TX_CMD_PHY_OK) {
1398 RTW_INFO("%s, Get Tx Rpt OK CNT:%d\n", __func__, tx_arg.tx_ok);
1399 padapter->mppriv.tx.sended = tx_arg.tx_ok;
1400 } else if (cmdid == RTW_MP_TX_CHECK_TX_IDLE){
1401 RTW_INFO("%s, Get Tx state:%d\n", __func__, tx_arg.tx_state);
1402 pmppriv->rtw_mp_tx_state = tx_arg.tx_state;
1403 }
1404 break;
1405 } else {
1406 if (i > 100) {
1407 RTW_INFO("%s,GET CMD FAIL !!! status %d\n", __func__, tx_arg.status);
1408 break;
1409 }
1410 i++;
1411 rtw_msleep_os(10);
1412 }
1413 }
1414 return (tx_arg.cmd_ok);
1415 }
1416
1417
mp_xmit_phl_packet_thread(thread_context context)1418 static thread_return mp_xmit_phl_packet_thread(thread_context context)
1419 {
1420
1421 struct mp_priv *pmppriv = (struct mp_priv *)context;
1422 struct mp_tx *pmptx = &pmppriv->tx;
1423 _adapter *padapter = pmppriv->papdater;
1424 struct pkt_attrib *pattrib = &pmppriv->tx.attrib;
1425 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
1426 struct rtw_trx_test_param test_param = {0};
1427 u16 i = 0;
1428
1429 RTW_INFO("%s: Start !!\n", __func__);
1430 rtw_phl_trx_default_param(GET_PHL_INFO(dvobj), &test_param);
1431
1432 test_param.tx_cap.f_rate = (u16)pmppriv->rateidx;
1433 test_param.tx_payload_size = pattrib->pktlen;
1434 test_param.tx_cap.f_gi_ltf = 0;
1435 test_param.tx_cap.f_stbc = 0;
1436 test_param.tx_cap.f_ldpc = 0;
1437 RTW_INFO("%s: Start !! tx method %d\n", __func__, pmppriv->rtw_mp_tx_method);
1438 while (1) {
1439 if (pmppriv->rtw_mp_tx_method == RTW_MP_TMACT_TX) {
1440 /*/if (rtw_phl_mp_tx_cmd(padapter, RTW_MP_TX_PACKETS, pmppriv->rtw_mp_tx_method, _TRUE)) {*/
1441 if (rtw_phl_trx_testsuite(GET_PHL_INFO(dvobj), &test_param) == 0)
1442 RTW_DBG("%s: rtw_phl_trx_testsuite!!\n", __func__);
1443 else
1444 rtw_usleep_os(10);
1445 }
1446 pmptx->sended++;
1447 pmppriv->tx_pktcount++;
1448 rtw_usleep_os(padapter->mppriv.pktInterval);
1449
1450 if (pmptx->stop || RTW_CANNOT_RUN(adapter_to_dvobj(padapter)))
1451 goto exit;
1452 if ((pmptx->count != 0) && (pmptx->count == pmptx->sended))
1453 goto exit;
1454 flush_signals_thread();
1455 }
1456 exit:
1457 pmptx->stop = 1;
1458
1459 RTW_INFO("%s: Exit !!\n", __func__);
1460 rtw_thread_exit(NULL);
1461 return 0;
1462 }
1463
rtw_get_tx_idle(_adapter * padapter)1464 static void rtw_get_tx_idle(_adapter *padapter)
1465 {
1466 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
1467 struct mp_priv *pmp_priv = &padapter->mppriv;
1468 u8 j;
1469
1470 pmp_priv->rtw_mp_tx_state = 0;
1471 for (j = 0; j < 10 ; j++) {
1472 if (rtw_phl_mp_tx_cmd(padapter, RTW_MP_TX_CHECK_TX_IDLE,
1473 pmp_priv->rtw_mp_tx_method, _FALSE))
1474 if (pmp_priv->rtw_mp_tx_state == 1)
1475 break;
1476 rtw_msleep_os(1);
1477 }
1478 return;
1479 }
1480
rtw_dpd_bypass(_adapter * padapter,u8 phy_idx)1481 static void rtw_dpd_bypass(_adapter *padapter, u8 phy_idx)
1482 {
1483 u32 data32 = 0;
1484 u32 dpd_bypass_val = 0;
1485 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
1486 struct mp_priv *pmp_priv = &padapter->mppriv;
1487
1488 if (pmp_priv->rtw_mp_tx_method != RTW_MP_TMACT_TX)
1489 rtw_phl_mp_tx_cmd(padapter, RTW_MP_TX_MODE_SWITCH, RTW_MP_TMACT_TX, _FALSE);
1490
1491 if (rtw_phl_mp_tx_cmd(padapter, RTW_MP_TX_PACKETS, RTW_MP_SW_TX, _TRUE))
1492 RTW_INFO("%s: RTW_MP_SW_TX!!\n", __func__);
1493 else
1494 RTW_INFO("%s: RTW_MP_SW_TX fail!!\n", __func__);
1495
1496 if (pmp_priv->rtw_mp_tx_method != RTW_MP_TMACT_TX)
1497 rtw_phl_mp_tx_cmd(padapter, RTW_MP_TX_MODE_SWITCH, pmp_priv->rtw_mp_tx_method, _FALSE);
1498
1499 if (phy_idx == 0) {
1500 data32 = rtw_phl_read32(dvobj->phl, 0xD6F0);
1501 RTW_INFO("%s:Phy0 read 0xD6F0 = 0x%x !!\n", __func__, data32);
1502 dpd_bypass_val = ((data32 & 0x4000000) >> 26);
1503 RTW_INFO("%s: dpd_bypass_val = 0x%x !!\n", __func__, dpd_bypass_val);
1504 } else if (phy_idx == 1) {
1505 data32 = rtw_phl_read32(dvobj->phl, 0xF6F0);
1506 RTW_INFO("%s:Phy1 read 0xF6F0 = 0x%x !!\n", __func__, data32);
1507 dpd_bypass_val = ((data32 & 0x4000000) >> 26);
1508 RTW_INFO("%s: dpd_bypass_val = 0x%x !!\n", __func__, dpd_bypass_val);
1509 }
1510
1511 }
1512
rtw_pretx_trkdpk(_adapter * padapter)1513 static void rtw_pretx_trkdpk(_adapter *padapter)
1514 {
1515 struct mp_priv *pmp_priv = &padapter->mppriv;
1516 u8 tx_nss = get_phy_tx_nss(padapter);
1517 u8 rfpath_i = 0;
1518 u8 tssi_mode = pmp_priv->tssi_mode;
1519 u32 bk_tx_stop = pmp_priv->tx.stop;
1520 u32 bk_tx_count = pmp_priv->tx.count;
1521 s16 bk_txpwr = pmp_priv->txpowerdbm;
1522
1523 if (pmp_priv->tssi_mode == RTW_MP_TSSI_ON && bk_txpwr > 17) {
1524 pmp_priv->txpowerdbm = 17;
1525 for (rfpath_i = 0 ; rfpath_i < tx_nss; rfpath_i ++)
1526 rtw_mp_txpower_dbm(padapter, rfpath_i);
1527 }
1528
1529 pmp_priv->tx.stop = 0;
1530 pmp_priv->tx.count = 0;
1531 pmp_priv->rtw_mp_tx_time = 5484;
1532
1533 if (rtw_phl_mp_tx_cmd(padapter, RTW_MP_TX_PACKETS, RTW_MP_PMACT_TX, _TRUE))
1534 RTW_INFO("%s: RTW_MP_TX_PACKETS!!\n", __func__);
1535 rtw_msleep_os(20);
1536
1537 if (rtw_phl_mp_tx_cmd(padapter, RTW_MP_TX_PACKETS, RTW_MP_PMACT_TX, _FALSE))
1538 RTW_INFO("%s: RTW_MP_TX_PACKETS Done!!\n", __func__);
1539
1540 rtw_mp_cal_trigger(padapter, RTW_MP_CAL_DPK);
1541
1542 /*End Workaround to trackiing DPK */
1543 pmp_priv->tx.stop = bk_tx_stop;
1544 pmp_priv->tx.count = bk_tx_count;
1545 pmp_priv->rtw_mp_tx_time = 0;
1546
1547 if (pmp_priv->tssi_mode == RTW_MP_TSSI_ON && bk_txpwr > 17) {
1548 pmp_priv->txpowerdbm = bk_txpwr;
1549 for (rfpath_i = 0 ; rfpath_i < tx_nss; rfpath_i ++)
1550 rtw_mp_txpower_dbm(padapter, rfpath_i);
1551 }
1552
1553 }
1554
rtw_set_phl_packet_tx(_adapter * padapter,u8 bStart)1555 void rtw_set_phl_packet_tx(_adapter *padapter, u8 bStart)
1556 {
1557 struct mp_priv *pmp_priv;
1558 u8 rfpath_i = 0;
1559 u8 tx_nss = get_phy_tx_nss(padapter);
1560 pmp_priv = &padapter->mppriv;
1561
1562
1563 for (rfpath_i = 0 ; rfpath_i < tx_nss; rfpath_i ++)
1564 rtw_mp_txpower_dbm(padapter, rfpath_i);
1565
1566 RTW_INFO("%s: PACKET TX tx method %d!!\n", __func__, pmp_priv->rtw_mp_tx_method);
1567
1568 if (bStart) {
1569 RTW_INFO("%s: !! tx method %d\n", __func__, pmp_priv->rtw_mp_tx_method);
1570 pmp_priv->tx.sended = 0;
1571 pmp_priv->tx.stop = 0;
1572 pmp_priv->tx_pktcount = 0;
1573 if (pmp_priv->rtw_mp_tx_method == RTW_MP_PMACT_TX ||
1574 pmp_priv->rtw_mp_tx_method == RTW_MP_FW_PMACT_TX) {
1575 RTW_INFO("%s: PLCP_USER_INFO & PLCP_COMMON_INFO!!\n", __func__);
1576 if (rtw_phl_mp_tx_cmd(padapter, RTW_MP_TX_CONFIG_PLCP_USER_INFO,
1577 pmp_priv->rtw_mp_tx_method, _TRUE) == true)
1578 RTW_INFO("%s: PLCP_USER_INFO done!!\n", __func__);
1579 if (rtw_phl_mp_tx_cmd(padapter, RTW_MP_TX_CONFIG_PLCP_COMMON_INFO,
1580 pmp_priv->rtw_mp_tx_method, _TRUE) == true)
1581 RTW_INFO("%s: RTW_MP_TX_CONFIG_PLCP_COMMON_INFO done!!\n", __func__);
1582 rtw_get_tx_idle(padapter);
1583 rtw_pretx_trkdpk(padapter);
1584 }
1585 rtw_dpd_bypass(padapter, pmp_priv->rtw_mp_cur_phy);
1586 rtw_get_tx_idle(padapter);
1587
1588 if (pmp_priv->rtw_mp_tx_method == RTW_MP_FW_PMACT_TX) {
1589 if (rtw_phl_mp_tx_cmd(padapter, RTW_MP_TX_PACKETS, pmp_priv->rtw_mp_tx_method, _TRUE))
1590 RTW_INFO("%s: RTW_MP_FW_PMACT_TX!!\n", __func__);
1591 else
1592 RTW_INFO("%s: RTW_MP_FW_PMACT_TX fail!!\n", __func__);
1593 } else if (pmp_priv->rtw_mp_tx_method == RTW_MP_PMACT_TX) {
1594 if (rtw_phl_mp_tx_cmd(padapter, RTW_MP_TX_PACKETS, pmp_priv->rtw_mp_tx_method, _TRUE))
1595 RTW_DBG("%s: RTW_MP_TX_PACKETS!!\n", __func__);
1596 } else {
1597 pmp_priv->tx.PktTxThread = rtw_thread_start(
1598 mp_xmit_phl_packet_thread, pmp_priv, "RTW_MP_Tx_THREAD");
1599 if (pmp_priv->tx.PktTxThread == NULL)
1600 RTW_ERR("Create PktTx Thread Fail !!!!!\n");
1601 }
1602 }
1603 if (!bStart) {
1604 if (pmp_priv->rtw_mp_tx_method == RTW_MP_FW_PMACT_TX) {
1605 if (rtw_phl_mp_tx_cmd(padapter, RTW_MP_TX_PACKETS, pmp_priv->rtw_mp_tx_method, false)) {
1606 RTW_INFO("%s: RTW_MP_FW_TMACT_TX Stop TX!!\n", __func__);
1607 return;
1608 }
1609 } else if (pmp_priv->rtw_mp_tx_method == RTW_MP_PMACT_TX) {
1610 if (rtw_phl_mp_tx_cmd(padapter, RTW_MP_TX_PACKETS, pmp_priv->rtw_mp_tx_method, false)) {
1611 RTW_INFO("%s: RTW_MP_PMACT_TX Stop TX!!\n", __func__);
1612 return;
1613 }
1614 }
1615 }
1616 }
1617
rtw_mp_set_packet_tx(_adapter * padapter)1618 void rtw_mp_set_packet_tx(_adapter *padapter)
1619 {
1620 u8 *ptr, *pkt_start, *pkt_end;
1621 u32 pkt_size = 0, i = 0, idx = 0, tmp_idx = 0;
1622 struct rtw_ieee80211_hdr *hdr;
1623 u8 payload;
1624 s32 bmcast;
1625 struct pkt_attrib *pattrib;
1626 struct mp_priv *pmp_priv;
1627
1628 pmp_priv = &padapter->mppriv;
1629
1630 if (pmp_priv->tx.stop)
1631 return;
1632 pmp_priv->tx.sended = 0;
1633 pmp_priv->tx.stop = 0;
1634 pmp_priv->tx_pktcount = 0;
1635
1636 /* 3 1. update_attrib() */
1637 pattrib = &pmp_priv->tx.attrib;
1638 _rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN);
1639 _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
1640 _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN);
1641 bmcast = IS_MCAST(pattrib->ra);
1642 if (bmcast)
1643 pattrib->psta = rtw_get_bcmc_stainfo(padapter);
1644 else
1645 pattrib->psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv));
1646
1647 if (pattrib->psta == NULL) {
1648 RTW_INFO("%s:psta = NULL !!\n", __func__);
1649 return;
1650 }
1651
1652 pattrib->mac_id = pattrib->psta->phl_sta->macid;
1653 pattrib->mbssid = 0;
1654
1655 pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->pktlen;
1656
1657 /* 3 2. allocate xmit buffer */
1658 pkt_size = pattrib->last_txcmdsz;
1659
1660 if (pmp_priv->tx.pallocated_buf)
1661 rtw_mfree(pmp_priv->tx.pallocated_buf, pmp_priv->tx.buf_size);
1662 pmp_priv->tx.write_size = pkt_size;
1663 pmp_priv->tx.buf_size = pkt_size + SZ_ALIGN_XMITFRAME_EXT;
1664 pmp_priv->tx.pallocated_buf = rtw_zmalloc(pmp_priv->tx.buf_size);
1665 if (pmp_priv->tx.pallocated_buf == NULL) {
1666 RTW_INFO("%s: malloc(%d) fail!!\n", __func__, pmp_priv->tx.buf_size);
1667 return;
1668 }
1669 pmp_priv->tx.buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pmp_priv->tx.pallocated_buf), SZ_ALIGN_XMITFRAME_EXT);
1670 ptr = pmp_priv->tx.buf;
1671
1672 _rtw_memset(pmp_priv->tx.desc, 0, TXDESC_SIZE);
1673 pkt_start = ptr;
1674 pkt_end = pkt_start + pkt_size;
1675
1676 /* 3 3. init TX descriptor */
1677 #if defined(CONFIG_RTL8822B)
1678 if (IS_HARDWARE_TYPE_8822B(padapter))
1679 rtl8822b_prepare_mp_txdesc(padapter, pmp_priv);
1680 #endif /* CONFIG_RTL8822B */
1681
1682 #if defined(CONFIG_RTL8822C)
1683 if (IS_HARDWARE_TYPE_8822C(padapter))
1684 rtl8822c_prepare_mp_txdesc(padapter, pmp_priv);
1685 #endif /* CONFIG_RTL8822C */
1686
1687 #if defined(CONFIG_RTL8821C)
1688 if (IS_HARDWARE_TYPE_8821C(padapter))
1689 rtl8821c_prepare_mp_txdesc(padapter, pmp_priv);
1690 #endif /* CONFIG_RTL8821C */
1691
1692 #if defined(CONFIG_RTL8814B)
1693 if (IS_HARDWARE_TYPE_8814B(padapter))
1694 rtl8814b_prepare_mp_txdesc(padapter, pmp_priv);
1695 #endif /* CONFIG_RTL8814B */
1696
1697 /* 3 4. make wlan header, make_wlanhdr() */
1698 hdr = (struct rtw_ieee80211_hdr *)pkt_start;
1699 set_frame_sub_type(&hdr->frame_ctl, pattrib->subtype);
1700
1701 _rtw_memcpy(hdr->addr1, pattrib->dst, ETH_ALEN); /* DA */
1702 _rtw_memcpy(hdr->addr2, pattrib->src, ETH_ALEN); /* SA */
1703 _rtw_memcpy(hdr->addr3, get_bssid(&padapter->mlmepriv), ETH_ALEN); /* RA, BSSID */
1704
1705 /* 3 5. make payload */
1706 ptr = pkt_start + pattrib->hdrlen;
1707
1708 if (pmp_priv->mplink_btx == _TRUE) {
1709 _rtw_memcpy(ptr, pmp_priv->mplink_buf, pkt_end - ptr);
1710 } else {
1711 switch (pmp_priv->tx.payload) {
1712 case MP_TX_Payload_00:
1713 RTW_INFO("MP packet tx 0x00 payload!\n");
1714 payload = 0x00;
1715 _rtw_memset(ptr, 0x00, pkt_end - ptr);
1716 break;
1717 case MP_TX_Payload_5a:
1718 RTW_INFO("MP packet tx 0x5a payload!\n");
1719 payload = 0x5a;
1720 _rtw_memset(ptr, 0x5a, pkt_end - ptr);
1721 break;
1722 case MP_TX_Payload_a5:
1723 RTW_INFO("MP packet tx 0xa5 payload!\n");
1724 payload = 0xa5;
1725 _rtw_memset(ptr, 0xa5, pkt_end - ptr);
1726 break;
1727 case MP_TX_Payload_ff:
1728 RTW_INFO("MP packet tx 0xff payload!\n");
1729 payload = 0xff;
1730 _rtw_memset(ptr, 0xff, pkt_end - ptr);
1731 break;
1732 case MP_TX_Payload_prbs9:
1733 RTW_INFO("MP packet tx PRBS9 payload!\n");
1734 while (idx <= pkt_end - ptr) {
1735 int start = 0x02;
1736 int a = start;
1737
1738 for (i = 0;; i++) {
1739 int newbit = (((a >> 8) ^ (a >> 4)) & 1);
1740 a = ((a << 1) | newbit) & 0x1ff;
1741 RTW_DBG("%x ", a);
1742 ptr[idx + i] = a;
1743
1744 if (a == start) {
1745 RTW_INFO("payload repetition period is %d , end %d\n", i , idx);
1746 tmp_idx += i;
1747 break;
1748 }
1749 if (idx + i >= (pkt_end - ptr)) {
1750 tmp_idx += (idx + i);
1751 RTW_INFO(" repetition period payload end curr ptr %d\n", idx + i);
1752 break;
1753 }
1754 }
1755 idx = tmp_idx;
1756 }
1757 break;
1758 case MP_TX_Payload_default_random:
1759 RTW_INFO("MP packet tx default random payload!\n");
1760 for (i = 0; i < pkt_end - ptr; i++)
1761 ptr[i] = rtw_random32() % 0xFF;
1762 break;
1763 default:
1764 RTW_INFO("Config payload type default use 0x%x\n!", pmp_priv->tx.payload);
1765 _rtw_memset(ptr, pmp_priv->tx.payload, pkt_end - ptr);
1766 break;
1767 }
1768 }
1769 /* 3 6. start thread */
1770 #ifdef PLATFORM_LINUX
1771 pmp_priv->tx.PktTxThread = rtw_thread_start(mp_xmit_packet_thread, pmp_priv, "RTW_MP_THREAD");
1772 if (pmp_priv->tx.PktTxThread == NULL)
1773 RTW_ERR("Create PktTx Thread Fail !!!!!\n");
1774 #endif
1775 #ifdef PLATFORM_FREEBSD
1776 {
1777 struct proc *p;
1778 struct thread *td;
1779 pmp_priv->tx.PktTxThread = kproc_kthread_add(mp_xmit_packet_thread, pmp_priv,
1780 &p, &td, RFHIGHPID, 0, "MPXmitThread", "MPXmitThread");
1781
1782 if (pmp_priv->tx.PktTxThread < 0)
1783 RTW_INFO("Create PktTx Thread Fail !!!!!\n");
1784 }
1785 #endif
1786
1787 Rtw_MPSetMacTxEDCA(padapter);
1788 return;
1789 }
1790
rtw_mp_reset_phy_count(_adapter * adapter)1791 void rtw_mp_reset_phy_count(_adapter *adapter)
1792 {
1793 RTW_INFO("%s()!!!\n", __func__);
1794 rtw_mp_phl_config_arg(adapter, RTW_MP_CONFIG_CMD_SET_RESET_PHY_COUNT);
1795 rtw_mp_phl_config_arg(adapter, RTW_MP_CONFIG_CMD_SET_RESET_MAC_COUNT);
1796 rtw_mp_phl_config_arg(adapter, RTW_MP_CONFIG_CMD_SET_RESET_DRV_COUNT);
1797 }
1798
1799 struct psd_init_regs {
1800 /* 3 wire */
1801 int reg_88c;
1802 int reg_c00;
1803 int reg_e00;
1804 int reg_1800;
1805 int reg_1a00;
1806 /* cck */
1807 int reg_800;
1808 int reg_808;
1809 };
1810
rtw_mp_psd_init(_adapter * padapter,struct psd_init_regs * regs)1811 static int rtw_mp_psd_init(_adapter *padapter, struct psd_init_regs *regs)
1812 {
1813 u8 rf_type = GET_HAL_RFPATH(adapter_to_dvobj(padapter));
1814 #if 0
1815 switch (rf_type) {
1816 /* 1R */
1817 case RF_1T1R:
1818 if (rtw_hw_chk_proto_cap(padapter, PROTO_CAP_11AC)) {
1819 /* 11AC 1R PSD Setting 3wire & cck off */
1820 regs->reg_c00 = rtw_read32(padapter, 0xC00);
1821 phy_set_bb_reg(padapter, 0xC00, 0x3, 0x00);
1822 regs->reg_808 = rtw_read32(padapter, 0x808);
1823 phy_set_bb_reg(padapter, 0x808, 0x10000000, 0x0);
1824 } else {
1825 /* 11N 3-wire off 1 */
1826 regs->reg_88c = rtw_read32(padapter, 0x88C);
1827 phy_set_bb_reg(padapter, 0x88C, 0x300000, 0x3);
1828 /* 11N CCK off */
1829 regs->reg_800 = rtw_read32(padapter, 0x800);
1830 phy_set_bb_reg(padapter, 0x800, 0x1000000, 0x0);
1831 }
1832 break;
1833
1834 /* 2R */
1835 case RF_1T2R:
1836 case RF_2T2R:
1837 if (rtw_hw_chk_proto_cap(padapter, PROTO_CAP_11AC)) {
1838 /* 11AC 2R PSD Setting 3wire & cck off */
1839 regs->reg_c00 = rtw_read32(padapter, 0xC00);
1840 regs->reg_e00 = rtw_read32(padapter, 0xE00);
1841 phy_set_bb_reg(padapter, 0xC00, 0x3, 0x00);
1842 phy_set_bb_reg(padapter, 0xE00, 0x3, 0x00);
1843 regs->reg_808 = rtw_read32(padapter, 0x808);
1844 phy_set_bb_reg(padapter, 0x808, 0x10000000, 0x0);
1845 } else {
1846 /* 11N 3-wire off 2 */
1847 regs->reg_88c = rtw_read32(padapter, 0x88C);
1848 phy_set_bb_reg(padapter, 0x88C, 0xF00000, 0xF);
1849 /* 11N CCK off */
1850 regs->reg_800 = rtw_read32(padapter, 0x800);
1851 phy_set_bb_reg(padapter, 0x800, 0x1000000, 0x0);
1852 }
1853 break;
1854
1855 /* 3R */
1856 case RF_2T3R:
1857 case RF_3T3R:
1858 if (rtw_hw_chk_proto_cap(padapter, PROTO_CAP_11AC)) {
1859 /* 11AC 3R PSD Setting 3wire & cck off */
1860 regs->reg_c00 = rtw_read32(padapter, 0xC00);
1861 regs->reg_e00 = rtw_read32(padapter, 0xE00);
1862 regs->reg_1800 = rtw_read32(padapter, 0x1800);
1863 phy_set_bb_reg(padapter, 0xC00, 0x3, 0x00);
1864 phy_set_bb_reg(padapter, 0xE00, 0x3, 0x00);
1865 phy_set_bb_reg(padapter, 0x1800, 0x3, 0x00);
1866 regs->reg_808 = rtw_read32(padapter, 0x808);
1867 phy_set_bb_reg(padapter, 0x808, 0x10000000, 0x0);
1868 } else {
1869 RTW_ERR("%s: 11n don't support 3R\n", __func__);
1870 return -1;
1871 }
1872 break;
1873
1874 /* 4R */
1875 case RF_2T4R:
1876 case RF_3T4R:
1877 case RF_4T4R:
1878 if (rtw_hw_chk_proto_cap(padapter, PROTO_CAP_11AC)) {
1879 /* 11AC 4R PSD Setting 3wire & cck off */
1880 regs->reg_c00 = rtw_read32(padapter, 0xC00);
1881 regs->reg_e00 = rtw_read32(padapter, 0xE00);
1882 regs->reg_1800 = rtw_read32(padapter, 0x1800);
1883 regs->reg_1a00 = rtw_read32(padapter, 0x1A00);
1884 phy_set_bb_reg(padapter, 0xC00, 0x3, 0x00);
1885 phy_set_bb_reg(padapter, 0xE00, 0x3, 0x00);
1886 phy_set_bb_reg(padapter, 0x1800, 0x3, 0x00);
1887 phy_set_bb_reg(padapter, 0x1A00, 0x3, 0x00);
1888 regs->reg_808 = rtw_read32(padapter, 0x808);
1889 phy_set_bb_reg(padapter, 0x808, 0x10000000, 0x0);
1890 } else {
1891 RTW_ERR("%s: 11n don't support 4R\n", __func__);
1892 return -1;
1893 }
1894 break;
1895
1896 default:
1897 RTW_ERR("%s: unknown %d rf type\n", __func__,
1898 GET_HAL_RFPATH(adapter_to_dvobj(padapter)));
1899 return -1;
1900 }
1901
1902 /* Set PSD points, 0=128, 1=256, 2=512, 3=1024 */
1903 if (rtw_hw_chk_proto_cap(padapter, PROTO_CAP_11AC))
1904 phy_set_bb_reg(padapter, 0x910, 0xC000, 3);
1905 else
1906 phy_set_bb_reg(padapter, 0x808, 0xC000, 3);
1907 #endif
1908 RTW_INFO("%s: set %d rf type done\n", __func__,
1909 GET_HAL_RFPATH(adapter_to_dvobj(padapter)));
1910 return 0;
1911 }
1912
rtw_mp_psd_close(_adapter * padapter,struct psd_init_regs * regs)1913 static int rtw_mp_psd_close(_adapter *padapter, struct psd_init_regs *regs)
1914 {
1915 u8 rf_type = GET_HAL_RFPATH(adapter_to_dvobj(padapter));
1916
1917 #if 0
1918 if (!rtw_hw_chk_proto_cap(padapter, PROTO_CAP_11AC)) {
1919 /* 11n 3wire restore */
1920 rtw_write32(padapter, 0x88C, regs->reg_88c);
1921 /* 11n cck restore */
1922 rtw_write32(padapter, 0x800, regs->reg_800);
1923 RTW_INFO("%s: restore %d rf type\n", __func__, rf_type);
1924 return 0;
1925 }
1926
1927 /* 11ac 3wire restore */
1928 switch (rf_type) {
1929 case RF_1T1R:
1930 rtw_write32(padapter, 0xC00, regs->reg_c00);
1931 break;
1932 case RF_1T2R:
1933 case RF_2T2R:
1934 rtw_write32(padapter, 0xC00, regs->reg_c00);
1935 rtw_write32(padapter, 0xE00, regs->reg_e00);
1936 break;
1937 case RF_2T3R:
1938 case RF_3T3R:
1939 rtw_write32(padapter, 0xC00, regs->reg_c00);
1940 rtw_write32(padapter, 0xE00, regs->reg_e00);
1941 rtw_write32(padapter, 0x1800, regs->reg_1800);
1942 break;
1943 case RF_2T4R:
1944 case RF_3T4R:
1945 case RF_4T4R:
1946 rtw_write32(padapter, 0xC00, regs->reg_c00);
1947 rtw_write32(padapter, 0xE00, regs->reg_e00);
1948 rtw_write32(padapter, 0x1800, regs->reg_1800);
1949 rtw_write32(padapter, 0x1A00, regs->reg_1a00);
1950 break;
1951 default:
1952 RTW_WARN("%s: unknown %d rf type\n", __func__, rf_type);
1953 break;
1954 }
1955
1956 /* 11ac cck restore */
1957 rtw_write32(padapter, 0x808, regs->reg_808);
1958 #endif
1959 RTW_INFO("%s: restore %d rf type done\n", __func__, rf_type);
1960 return 0;
1961 }
1962
1963 /* reg 0x808[9:0]: FFT data x
1964 * reg 0x808[22]: 0 --> 1 to get 1 FFT data y
1965 * reg 0x8B4[15:0]: FFT data y report */
rtw_GetPSDData(_adapter * adapter,u32 point)1966 static u32 rtw_GetPSDData(_adapter *adapter, u32 point)
1967 {
1968 u32 psd_val = 0;
1969 #if 0
1970 #if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C)
1971 u16 psd_reg = 0x910;
1972 u16 psd_regL = 0xF44;
1973 #else
1974 u16 psd_reg = 0x808;
1975 u16 psd_regL = 0x8B4;
1976 #endif
1977
1978 psd_val = rtw_read32(adapter, psd_reg);
1979
1980 psd_val &= 0xFFBFFC00;
1981 psd_val |= point;
1982
1983 rtw_write32(adapter, psd_reg, psd_val);
1984 rtw_mdelay_os(1);
1985 psd_val |= 0x00400000;
1986
1987 rtw_write32(adapter, psd_reg, psd_val);
1988 rtw_mdelay_os(1);
1989
1990 psd_val = rtw_read32(adapter, psd_regL);
1991 #if defined(CONFIG_RTL8821C)
1992 psd_val = (psd_val & 0x00FFFFFF) / 32;
1993 #else
1994 psd_val &= 0x0000FFFF;
1995 #endif
1996 #endif
1997 return psd_val;
1998 }
1999
rtw_mp_phl_psd_cmd(_adapter * padapter,struct rtw_mp_cal_arg * psd_arg,u8 cmdid)2000 u8 rtw_mp_phl_psd_cmd(_adapter *padapter, struct rtw_mp_cal_arg *psd_arg, u8 cmdid)
2001 {
2002 struct mp_priv *pmppriv = &padapter->mppriv;
2003 u16 i = 0;
2004 u32 cmd_size = sizeof(struct rtw_mp_cal_arg);
2005
2006 psd_arg->mp_class = RTW_MP_CLASS_CAL;
2007 psd_arg->cmd = cmdid;
2008
2009 rtw_mp_set_phl_cmd(padapter, (void*)psd_arg, cmd_size);
2010 while (i <= 100) {
2011 rtw_msleep_os(10);
2012 rtw_mp_get_phl_cmd(padapter, (void*)psd_arg, cmd_size);
2013 if (psd_arg->cmd_ok && psd_arg->status == RTW_PHL_STATUS_SUCCESS) {
2014 RTW_INFO("%s,SET CMD OK\n", __func__);
2015 return psd_arg->cmd_ok;
2016 } else {
2017 if (i > 100) {
2018 RTW_DBG("%s,GET CMD FAIL !!! status %d\n", __func__, psd_arg->status);
2019 break;
2020 }
2021 i++;
2022 }
2023 }
2024 return 0;
2025 }
2026
2027 /*
2028 * pts start_point_min stop_point_max
2029 * 128 64 64 + 128 = 192
2030 * 256 128 128 + 256 = 384
2031 * 512 256 256 + 512 = 768
2032 * 1024 512 512 + 1024 = 1536
2033 *
2034 */
mp_query_psd(_adapter * adapter,u8 * data)2035 u32 mp_query_psd(_adapter *adapter, u8 *data)
2036 {
2037 struct mp_priv *pmppriv = &adapter->mppriv;
2038 struct rtw_mp_cal_arg *my_psd_arg = NULL;
2039
2040 u32 i, psd_pts = 0, psd_start = 0, psd_stop = 0;
2041 u32 fft = 0, avg = 0, iq_path = 0;
2042 u32 psd_data = 0;
2043
2044 my_psd_arg = _rtw_malloc(sizeof(struct rtw_mp_cal_arg));
2045
2046 if (my_psd_arg)
2047 _rtw_memset((void *)my_psd_arg, 0, sizeof(struct rtw_mp_cal_arg));
2048 else {
2049 RTW_ERR("%s() psd_arg malloc fail !\n", __func__);
2050 return 0;
2051 }
2052
2053 if (sscanf(data, "fft=%d,avg=%d,iq=%d", &fft, &avg, &iq_path) == 3) {
2054
2055 my_psd_arg->path = pmppriv->antenna_trx;
2056 my_psd_arg->iq_path = iq_path;
2057 my_psd_arg->avg = avg;
2058 my_psd_arg->fft = fft;
2059
2060 RTW_INFO("%s: PSD RF_Path:%d fft=%d,avg=%d,iq_path=%d !\n",
2061 __func__, pmppriv->antenna_trx, fft, avg, iq_path);
2062
2063 if (rtw_mp_phl_psd_cmd(adapter, my_psd_arg, RTW_MP_CAL_CMD_PSD_INIT))
2064 RTW_INFO("PSD_INIT CMD OK!\n");
2065 else
2066 RTW_INFO("PSD_INIT CMD FAIL!\n");
2067 } else if (strncmp(data, "restore", 7) == 0) {
2068
2069 my_psd_arg->path = pmppriv->antenna_trx;
2070
2071 if (rtw_mp_phl_psd_cmd(adapter, my_psd_arg, RTW_MP_CAL_CMD_PSD_RESTORE))
2072 RTW_INFO("PSD_RESTORE CMD OK!\n");
2073 else
2074 RTW_INFO("PSD_RESTORE CMD FAIL!\n");
2075 } else {
2076 if (sscanf(data, "pts=%d,start=%d,stop=%d",
2077 &psd_pts, &psd_start, &psd_stop) == 3) {
2078 my_psd_arg->upoint = psd_pts;
2079 my_psd_arg->start_point = psd_start;
2080 my_psd_arg->stop_point = psd_stop;
2081 } else {
2082 my_psd_arg->upoint = 1280;
2083 my_psd_arg->start_point = 640;
2084 my_psd_arg->stop_point = 960;
2085 RTW_INFO("Default PSD setting!\n");
2086 }
2087
2088 if (rtw_mp_phl_psd_cmd(adapter, my_psd_arg, RTW_MP_CAL_CMD_PSD_QUERY))
2089 RTW_INFO("PSD_QUERY CMD OK!\n");
2090 else
2091 RTW_INFO("PSD_QUERY CMD FAIL!\n");
2092
2093 data[0] = '\0';
2094 i = 0;
2095 while (i < 320) {
2096 sprintf(data, "%s%x ", data, (my_psd_arg->outbuf[i]));
2097 i++;
2098 }
2099 }
2100
2101 if (my_psd_arg)
2102 _rtw_mfree(my_psd_arg, sizeof(struct rtw_mp_cal_arg));
2103
2104 return strlen(data) + 1;
2105 }
2106
2107 u8
mpt_to_mgnt_rate(u32 MptRateIdx)2108 mpt_to_mgnt_rate(
2109 u32 MptRateIdx
2110 )
2111 {
2112 /* Mapped to MGN_XXX defined in MgntGen.h */
2113 switch (MptRateIdx) {
2114 /* CCK rate. */
2115 case MPT_RATE_1M:
2116 return MGN_1M;
2117 case MPT_RATE_2M:
2118 return MGN_2M;
2119 case MPT_RATE_55M:
2120 return MGN_5_5M;
2121 case MPT_RATE_11M:
2122 return MGN_11M;
2123
2124 /* OFDM rate. */
2125 case MPT_RATE_6M:
2126 return MGN_6M;
2127 case MPT_RATE_9M:
2128 return MGN_9M;
2129 case MPT_RATE_12M:
2130 return MGN_12M;
2131 case MPT_RATE_18M:
2132 return MGN_18M;
2133 case MPT_RATE_24M:
2134 return MGN_24M;
2135 case MPT_RATE_36M:
2136 return MGN_36M;
2137 case MPT_RATE_48M:
2138 return MGN_48M;
2139 case MPT_RATE_54M:
2140 return MGN_54M;
2141
2142 /* HT rate. */
2143 case MPT_RATE_MCS0:
2144 return MGN_MCS0;
2145 case MPT_RATE_MCS1:
2146 return MGN_MCS1;
2147 case MPT_RATE_MCS2:
2148 return MGN_MCS2;
2149 case MPT_RATE_MCS3:
2150 return MGN_MCS3;
2151 case MPT_RATE_MCS4:
2152 return MGN_MCS4;
2153 case MPT_RATE_MCS5:
2154 return MGN_MCS5;
2155 case MPT_RATE_MCS6:
2156 return MGN_MCS6;
2157 case MPT_RATE_MCS7:
2158 return MGN_MCS7;
2159 case MPT_RATE_MCS8:
2160 return MGN_MCS8;
2161 case MPT_RATE_MCS9:
2162 return MGN_MCS9;
2163 case MPT_RATE_MCS10:
2164 return MGN_MCS10;
2165 case MPT_RATE_MCS11:
2166 return MGN_MCS11;
2167 case MPT_RATE_MCS12:
2168 return MGN_MCS12;
2169 case MPT_RATE_MCS13:
2170 return MGN_MCS13;
2171 case MPT_RATE_MCS14:
2172 return MGN_MCS14;
2173 case MPT_RATE_MCS15:
2174 return MGN_MCS15;
2175 case MPT_RATE_MCS16:
2176 return MGN_MCS16;
2177 case MPT_RATE_MCS17:
2178 return MGN_MCS17;
2179 case MPT_RATE_MCS18:
2180 return MGN_MCS18;
2181 case MPT_RATE_MCS19:
2182 return MGN_MCS19;
2183 case MPT_RATE_MCS20:
2184 return MGN_MCS20;
2185 case MPT_RATE_MCS21:
2186 return MGN_MCS21;
2187 case MPT_RATE_MCS22:
2188 return MGN_MCS22;
2189 case MPT_RATE_MCS23:
2190 return MGN_MCS23;
2191 case MPT_RATE_MCS24:
2192 return MGN_MCS24;
2193 case MPT_RATE_MCS25:
2194 return MGN_MCS25;
2195 case MPT_RATE_MCS26:
2196 return MGN_MCS26;
2197 case MPT_RATE_MCS27:
2198 return MGN_MCS27;
2199 case MPT_RATE_MCS28:
2200 return MGN_MCS28;
2201 case MPT_RATE_MCS29:
2202 return MGN_MCS29;
2203 case MPT_RATE_MCS30:
2204 return MGN_MCS30;
2205 case MPT_RATE_MCS31:
2206 return MGN_MCS31;
2207
2208 /* VHT rate. */
2209 case MPT_RATE_VHT1SS_MCS0:
2210 return MGN_VHT1SS_MCS0;
2211 case MPT_RATE_VHT1SS_MCS1:
2212 return MGN_VHT1SS_MCS1;
2213 case MPT_RATE_VHT1SS_MCS2:
2214 return MGN_VHT1SS_MCS2;
2215 case MPT_RATE_VHT1SS_MCS3:
2216 return MGN_VHT1SS_MCS3;
2217 case MPT_RATE_VHT1SS_MCS4:
2218 return MGN_VHT1SS_MCS4;
2219 case MPT_RATE_VHT1SS_MCS5:
2220 return MGN_VHT1SS_MCS5;
2221 case MPT_RATE_VHT1SS_MCS6:
2222 return MGN_VHT1SS_MCS6;
2223 case MPT_RATE_VHT1SS_MCS7:
2224 return MGN_VHT1SS_MCS7;
2225 case MPT_RATE_VHT1SS_MCS8:
2226 return MGN_VHT1SS_MCS8;
2227 case MPT_RATE_VHT1SS_MCS9:
2228 return MGN_VHT1SS_MCS9;
2229 case MPT_RATE_VHT2SS_MCS0:
2230 return MGN_VHT2SS_MCS0;
2231 case MPT_RATE_VHT2SS_MCS1:
2232 return MGN_VHT2SS_MCS1;
2233 case MPT_RATE_VHT2SS_MCS2:
2234 return MGN_VHT2SS_MCS2;
2235 case MPT_RATE_VHT2SS_MCS3:
2236 return MGN_VHT2SS_MCS3;
2237 case MPT_RATE_VHT2SS_MCS4:
2238 return MGN_VHT2SS_MCS4;
2239 case MPT_RATE_VHT2SS_MCS5:
2240 return MGN_VHT2SS_MCS5;
2241 case MPT_RATE_VHT2SS_MCS6:
2242 return MGN_VHT2SS_MCS6;
2243 case MPT_RATE_VHT2SS_MCS7:
2244 return MGN_VHT2SS_MCS7;
2245 case MPT_RATE_VHT2SS_MCS8:
2246 return MGN_VHT2SS_MCS8;
2247 case MPT_RATE_VHT2SS_MCS9:
2248 return MGN_VHT2SS_MCS9;
2249 case MPT_RATE_VHT3SS_MCS0:
2250 return MGN_VHT3SS_MCS0;
2251 case MPT_RATE_VHT3SS_MCS1:
2252 return MGN_VHT3SS_MCS1;
2253 case MPT_RATE_VHT3SS_MCS2:
2254 return MGN_VHT3SS_MCS2;
2255 case MPT_RATE_VHT3SS_MCS3:
2256 return MGN_VHT3SS_MCS3;
2257 case MPT_RATE_VHT3SS_MCS4:
2258 return MGN_VHT3SS_MCS4;
2259 case MPT_RATE_VHT3SS_MCS5:
2260 return MGN_VHT3SS_MCS5;
2261 case MPT_RATE_VHT3SS_MCS6:
2262 return MGN_VHT3SS_MCS6;
2263 case MPT_RATE_VHT3SS_MCS7:
2264 return MGN_VHT3SS_MCS7;
2265 case MPT_RATE_VHT3SS_MCS8:
2266 return MGN_VHT3SS_MCS8;
2267 case MPT_RATE_VHT3SS_MCS9:
2268 return MGN_VHT3SS_MCS9;
2269 case MPT_RATE_VHT4SS_MCS0:
2270 return MGN_VHT4SS_MCS0;
2271 case MPT_RATE_VHT4SS_MCS1:
2272 return MGN_VHT4SS_MCS1;
2273 case MPT_RATE_VHT4SS_MCS2:
2274 return MGN_VHT4SS_MCS2;
2275 case MPT_RATE_VHT4SS_MCS3:
2276 return MGN_VHT4SS_MCS3;
2277 case MPT_RATE_VHT4SS_MCS4:
2278 return MGN_VHT4SS_MCS4;
2279 case MPT_RATE_VHT4SS_MCS5:
2280 return MGN_VHT4SS_MCS5;
2281 case MPT_RATE_VHT4SS_MCS6:
2282 return MGN_VHT4SS_MCS6;
2283 case MPT_RATE_VHT4SS_MCS7:
2284 return MGN_VHT4SS_MCS7;
2285 case MPT_RATE_VHT4SS_MCS8:
2286 return MGN_VHT4SS_MCS8;
2287 case MPT_RATE_VHT4SS_MCS9:
2288 return MGN_VHT4SS_MCS9;
2289
2290 case MPT_RATE_LAST: /* fully automatiMGN_VHT2SS_MCS1; */
2291 default:
2292 RTW_INFO("<===mpt_to_mgnt_rate(), Invalid Rate: %d!!\n", MptRateIdx);
2293 return 0x0;
2294 }
2295 }
2296
2297
rtw_mp_hwrate2mptrate(u8 rate)2298 u8 rtw_mp_hwrate2mptrate(u8 rate)
2299 {
2300 u8 ret_rate = MGN_1M;
2301
2302 switch (rate) {
2303 case DESC_RATE1M:
2304 ret_rate = MPT_RATE_1M;
2305 break;
2306 case DESC_RATE2M:
2307 ret_rate = MPT_RATE_2M;
2308 break;
2309 case DESC_RATE5_5M:
2310 ret_rate = MPT_RATE_55M;
2311 break;
2312 case DESC_RATE11M:
2313 ret_rate = MPT_RATE_11M;
2314 break;
2315 case DESC_RATE6M:
2316 ret_rate = MPT_RATE_6M;
2317 break;
2318 case DESC_RATE9M:
2319 ret_rate = MPT_RATE_9M;
2320 break;
2321 case DESC_RATE12M:
2322 ret_rate = MPT_RATE_12M;
2323 break;
2324 case DESC_RATE18M:
2325 ret_rate = MPT_RATE_18M;
2326 break;
2327 case DESC_RATE24M:
2328 ret_rate = MPT_RATE_24M;
2329 break;
2330 case DESC_RATE36M:
2331 ret_rate = MPT_RATE_36M;
2332 break;
2333 case DESC_RATE48M:
2334 ret_rate = MPT_RATE_48M;
2335 break;
2336 case DESC_RATE54M:
2337 ret_rate = MPT_RATE_54M;
2338 break;
2339 case DESC_RATEMCS0:
2340 ret_rate = MPT_RATE_MCS0;
2341 break;
2342 case DESC_RATEMCS1:
2343 ret_rate = MPT_RATE_MCS1;
2344 break;
2345 case DESC_RATEMCS2:
2346 ret_rate = MPT_RATE_MCS2;
2347 break;
2348 case DESC_RATEMCS3:
2349 ret_rate = MPT_RATE_MCS3;
2350 break;
2351 case DESC_RATEMCS4:
2352 ret_rate = MPT_RATE_MCS4;
2353 break;
2354 case DESC_RATEMCS5:
2355 ret_rate = MPT_RATE_MCS5;
2356 break;
2357 case DESC_RATEMCS6:
2358 ret_rate = MPT_RATE_MCS6;
2359 break;
2360 case DESC_RATEMCS7:
2361 ret_rate = MPT_RATE_MCS7;
2362 break;
2363 case DESC_RATEMCS8:
2364 ret_rate = MPT_RATE_MCS8;
2365 break;
2366 case DESC_RATEMCS9:
2367 ret_rate = MPT_RATE_MCS9;
2368 break;
2369 case DESC_RATEMCS10:
2370 ret_rate = MPT_RATE_MCS10;
2371 break;
2372 case DESC_RATEMCS11:
2373 ret_rate = MPT_RATE_MCS11;
2374 break;
2375 case DESC_RATEMCS12:
2376 ret_rate = MPT_RATE_MCS12;
2377 break;
2378 case DESC_RATEMCS13:
2379 ret_rate = MPT_RATE_MCS13;
2380 break;
2381 case DESC_RATEMCS14:
2382 ret_rate = MPT_RATE_MCS14;
2383 break;
2384 case DESC_RATEMCS15:
2385 ret_rate = MPT_RATE_MCS15;
2386 break;
2387 case DESC_RATEMCS16:
2388 ret_rate = MPT_RATE_MCS16;
2389 break;
2390 case DESC_RATEMCS17:
2391 ret_rate = MPT_RATE_MCS17;
2392 break;
2393 case DESC_RATEMCS18:
2394 ret_rate = MPT_RATE_MCS18;
2395 break;
2396 case DESC_RATEMCS19:
2397 ret_rate = MPT_RATE_MCS19;
2398 break;
2399 case DESC_RATEMCS20:
2400 ret_rate = MPT_RATE_MCS20;
2401 break;
2402 case DESC_RATEMCS21:
2403 ret_rate = MPT_RATE_MCS21;
2404 break;
2405 case DESC_RATEMCS22:
2406 ret_rate = MPT_RATE_MCS22;
2407 break;
2408 case DESC_RATEMCS23:
2409 ret_rate = MPT_RATE_MCS23;
2410 break;
2411 case DESC_RATEMCS24:
2412 ret_rate = MPT_RATE_MCS24;
2413 break;
2414 case DESC_RATEMCS25:
2415 ret_rate = MPT_RATE_MCS25;
2416 break;
2417 case DESC_RATEMCS26:
2418 ret_rate = MPT_RATE_MCS26;
2419 break;
2420 case DESC_RATEMCS27:
2421 ret_rate = MPT_RATE_MCS27;
2422 break;
2423 case DESC_RATEMCS28:
2424 ret_rate = MPT_RATE_MCS28;
2425 break;
2426 case DESC_RATEMCS29:
2427 ret_rate = MPT_RATE_MCS29;
2428 break;
2429 case DESC_RATEMCS30:
2430 ret_rate = MPT_RATE_MCS30;
2431 break;
2432 case DESC_RATEMCS31:
2433 ret_rate = MPT_RATE_MCS31;
2434 break;
2435 case DESC_RATEVHTSS1MCS0:
2436 ret_rate = MPT_RATE_VHT1SS_MCS0;
2437 break;
2438 case DESC_RATEVHTSS1MCS1:
2439 ret_rate = MPT_RATE_VHT1SS_MCS1;
2440 break;
2441 case DESC_RATEVHTSS1MCS2:
2442 ret_rate = MPT_RATE_VHT1SS_MCS2;
2443 break;
2444 case DESC_RATEVHTSS1MCS3:
2445 ret_rate = MPT_RATE_VHT1SS_MCS3;
2446 break;
2447 case DESC_RATEVHTSS1MCS4:
2448 ret_rate = MPT_RATE_VHT1SS_MCS4;
2449 break;
2450 case DESC_RATEVHTSS1MCS5:
2451 ret_rate = MPT_RATE_VHT1SS_MCS5;
2452 break;
2453 case DESC_RATEVHTSS1MCS6:
2454 ret_rate = MPT_RATE_VHT1SS_MCS6;
2455 break;
2456 case DESC_RATEVHTSS1MCS7:
2457 ret_rate = MPT_RATE_VHT1SS_MCS7;
2458 break;
2459 case DESC_RATEVHTSS1MCS8:
2460 ret_rate = MPT_RATE_VHT1SS_MCS8;
2461 break;
2462 case DESC_RATEVHTSS1MCS9:
2463 ret_rate = MPT_RATE_VHT1SS_MCS9;
2464 break;
2465 case DESC_RATEVHTSS2MCS0:
2466 ret_rate = MPT_RATE_VHT2SS_MCS0;
2467 break;
2468 case DESC_RATEVHTSS2MCS1:
2469 ret_rate = MPT_RATE_VHT2SS_MCS1;
2470 break;
2471 case DESC_RATEVHTSS2MCS2:
2472 ret_rate = MPT_RATE_VHT2SS_MCS2;
2473 break;
2474 case DESC_RATEVHTSS2MCS3:
2475 ret_rate = MPT_RATE_VHT2SS_MCS3;
2476 break;
2477 case DESC_RATEVHTSS2MCS4:
2478 ret_rate = MPT_RATE_VHT2SS_MCS4;
2479 break;
2480 case DESC_RATEVHTSS2MCS5:
2481 ret_rate = MPT_RATE_VHT2SS_MCS5;
2482 break;
2483 case DESC_RATEVHTSS2MCS6:
2484 ret_rate = MPT_RATE_VHT2SS_MCS6;
2485 break;
2486 case DESC_RATEVHTSS2MCS7:
2487 ret_rate = MPT_RATE_VHT2SS_MCS7;
2488 break;
2489 case DESC_RATEVHTSS2MCS8:
2490 ret_rate = MPT_RATE_VHT2SS_MCS8;
2491 break;
2492 case DESC_RATEVHTSS2MCS9:
2493 ret_rate = MPT_RATE_VHT2SS_MCS9;
2494 break;
2495 case DESC_RATEVHTSS3MCS0:
2496 ret_rate = MPT_RATE_VHT3SS_MCS0;
2497 break;
2498 case DESC_RATEVHTSS3MCS1:
2499 ret_rate = MPT_RATE_VHT3SS_MCS1;
2500 break;
2501 case DESC_RATEVHTSS3MCS2:
2502 ret_rate = MPT_RATE_VHT3SS_MCS2;
2503 break;
2504 case DESC_RATEVHTSS3MCS3:
2505 ret_rate = MPT_RATE_VHT3SS_MCS3;
2506 break;
2507 case DESC_RATEVHTSS3MCS4:
2508 ret_rate = MPT_RATE_VHT3SS_MCS4;
2509 break;
2510 case DESC_RATEVHTSS3MCS5:
2511 ret_rate = MPT_RATE_VHT3SS_MCS5;
2512 break;
2513 case DESC_RATEVHTSS3MCS6:
2514 ret_rate = MPT_RATE_VHT3SS_MCS6;
2515 break;
2516 case DESC_RATEVHTSS3MCS7:
2517 ret_rate = MPT_RATE_VHT3SS_MCS7;
2518 break;
2519 case DESC_RATEVHTSS3MCS8:
2520 ret_rate = MPT_RATE_VHT3SS_MCS8;
2521 break;
2522 case DESC_RATEVHTSS3MCS9:
2523 ret_rate = MPT_RATE_VHT3SS_MCS9;
2524 break;
2525 case DESC_RATEVHTSS4MCS0:
2526 ret_rate = MPT_RATE_VHT4SS_MCS0;
2527 break;
2528 case DESC_RATEVHTSS4MCS1:
2529 ret_rate = MPT_RATE_VHT4SS_MCS1;
2530 break;
2531 case DESC_RATEVHTSS4MCS2:
2532 ret_rate = MPT_RATE_VHT4SS_MCS2;
2533 break;
2534 case DESC_RATEVHTSS4MCS3:
2535 ret_rate = MPT_RATE_VHT4SS_MCS3;
2536 break;
2537 case DESC_RATEVHTSS4MCS4:
2538 ret_rate = MPT_RATE_VHT4SS_MCS4;
2539 break;
2540 case DESC_RATEVHTSS4MCS5:
2541 ret_rate = MPT_RATE_VHT4SS_MCS5;
2542 break;
2543 case DESC_RATEVHTSS4MCS6:
2544 ret_rate = MPT_RATE_VHT4SS_MCS6;
2545 break;
2546 case DESC_RATEVHTSS4MCS7:
2547 ret_rate = MPT_RATE_VHT4SS_MCS7;
2548 break;
2549 case DESC_RATEVHTSS4MCS8:
2550 ret_rate = MPT_RATE_VHT4SS_MCS8;
2551 break;
2552 case DESC_RATEVHTSS4MCS9:
2553 ret_rate = MPT_RATE_VHT4SS_MCS9;
2554 break;
2555
2556 default:
2557 RTW_INFO("hwrate_to_mrate(): Non supported Rate [%x]!!!\n", rate);
2558 break;
2559 }
2560 return ret_rate;
2561 }
2562
srate2herate(u8 * str)2563 static u16 srate2herate(u8 *str)
2564 {
2565
2566 RTW_INFO("%s(): %s!!!\n", __func__, str);
2567 if (!strcmp(str, "1M")) return HRATE_CCK1;
2568 else if (!strcmp(str, "2M")) return HRATE_CCK2;
2569 else if (!strcmp(str, "5.5M")) return HRATE_CCK5_5;
2570 else if (!strcmp(str, "11M")) return HRATE_CCK11;
2571 else if (!strcmp(str, "6M")) return HRATE_OFDM6;
2572 else if (!strcmp(str, "9M")) return HRATE_OFDM9;
2573 else if (!strcmp(str, "12M")) return HRATE_OFDM12;
2574 else if (!strcmp(str, "18M")) return HRATE_OFDM18;
2575 else if (!strcmp(str, "24M")) return HRATE_OFDM24;
2576 else if (!strcmp(str, "36M")) return HRATE_OFDM36;
2577 else if (!strcmp(str, "48M")) return HRATE_OFDM48;
2578 else if (!strcmp(str, "54M")) return HRATE_OFDM54;
2579 else if (!strcmp(str, "HTMCS0")) return HRATE_MCS0;
2580 else if (!strcmp(str, "HTMCS1")) return HRATE_MCS1;
2581 else if (!strcmp(str, "HTMCS2")) return HRATE_MCS2;
2582 else if (!strcmp(str, "HTMCS3")) return HRATE_MCS3;
2583 else if (!strcmp(str, "HTMCS4")) return HRATE_MCS4;
2584 else if (!strcmp(str, "HTMCS5")) return HRATE_MCS5;
2585 else if (!strcmp(str, "HTMCS6")) return HRATE_MCS6;
2586 else if (!strcmp(str, "HTMCS7")) return HRATE_MCS7;
2587 else if (!strcmp(str, "HTMCS8")) return HRATE_MCS8;
2588 else if (!strcmp(str, "HTMCS9")) return HRATE_MCS9;
2589 else if (!strcmp(str, "HTMCS10")) return HRATE_MCS10;
2590 else if (!strcmp(str, "HTMCS11")) return HRATE_MCS11;
2591 else if (!strcmp(str, "HTMCS12")) return HRATE_MCS12;
2592 else if (!strcmp(str, "HTMCS13")) return HRATE_MCS13;
2593 else if (!strcmp(str, "HTMCS14")) return HRATE_MCS14;
2594 else if (!strcmp(str, "HTMCS15")) return HRATE_MCS15;
2595 else if (!strcmp(str, "HTMCS16")) return HRATE_MCS16;
2596 else if (!strcmp(str, "HTMCS17")) return HRATE_MCS17;
2597 else if (!strcmp(str, "HTMCS18")) return HRATE_MCS18;
2598 else if (!strcmp(str, "HTMCS19")) return HRATE_MCS19;
2599 else if (!strcmp(str, "HTMCS20")) return HRATE_MCS20;
2600 else if (!strcmp(str, "HTMCS21")) return HRATE_MCS21;
2601 else if (!strcmp(str, "HTMCS22")) return HRATE_MCS22;
2602 else if (!strcmp(str, "HTMCS23")) return HRATE_MCS23;
2603 else if (!strcmp(str, "HTMCS24")) return HRATE_MCS24;
2604 else if (!strcmp(str, "HTMCS25")) return HRATE_MCS25;
2605 else if (!strcmp(str, "HTMCS26")) return HRATE_MCS26;
2606 else if (!strcmp(str, "HTMCS27")) return HRATE_MCS27;
2607 else if (!strcmp(str, "HTMCS28")) return HRATE_MCS28;
2608 else if (!strcmp(str, "HTMCS29")) return HRATE_MCS29;
2609 else if (!strcmp(str, "HTMCS30")) return HRATE_MCS30;
2610 else if (!strcmp(str, "HTMCS31")) return HRATE_MCS31;
2611 else if (!strcmp(str, "VHT1MCS0")) return HRATE_VHT_NSS1_MCS0;
2612 else if (!strcmp(str, "VHT1MCS1")) return HRATE_VHT_NSS1_MCS1;
2613 else if (!strcmp(str, "VHT1MCS2")) return HRATE_VHT_NSS1_MCS2;
2614 else if (!strcmp(str, "VHT1MCS3")) return HRATE_VHT_NSS1_MCS3;
2615 else if (!strcmp(str, "VHT1MCS4")) return HRATE_VHT_NSS1_MCS4;
2616 else if (!strcmp(str, "VHT1MCS5")) return HRATE_VHT_NSS1_MCS5;
2617 else if (!strcmp(str, "VHT1MCS6")) return HRATE_VHT_NSS1_MCS6;
2618 else if (!strcmp(str, "VHT1MCS7")) return HRATE_VHT_NSS1_MCS7;
2619 else if (!strcmp(str, "VHT1MCS8")) return HRATE_VHT_NSS1_MCS8;
2620 else if (!strcmp(str, "VHT1MCS9")) return HRATE_VHT_NSS1_MCS9;
2621 else if (!strcmp(str, "VHT2MCS0")) return HRATE_VHT_NSS2_MCS0;
2622 else if (!strcmp(str, "VHT2MCS1")) return HRATE_VHT_NSS2_MCS1;
2623 else if (!strcmp(str, "VHT2MCS2")) return HRATE_VHT_NSS2_MCS2;
2624 else if (!strcmp(str, "VHT2MCS3")) return HRATE_VHT_NSS2_MCS3;
2625 else if (!strcmp(str, "VHT2MCS4")) return HRATE_VHT_NSS2_MCS4;
2626 else if (!strcmp(str, "VHT2MCS5")) return HRATE_VHT_NSS2_MCS5;
2627 else if (!strcmp(str, "VHT2MCS6")) return HRATE_VHT_NSS2_MCS6;
2628 else if (!strcmp(str, "VHT2MCS7")) return HRATE_VHT_NSS2_MCS7;
2629 else if (!strcmp(str, "VHT2MCS8")) return HRATE_VHT_NSS2_MCS8;
2630 else if (!strcmp(str, "VHT2MCS9")) return HRATE_VHT_NSS2_MCS9;
2631 else if (!strcmp(str, "VHT3MCS0")) return HRATE_VHT_NSS3_MCS0;
2632 else if (!strcmp(str, "VHT3MCS1")) return HRATE_VHT_NSS3_MCS1;
2633 else if (!strcmp(str, "VHT3MCS2")) return HRATE_VHT_NSS3_MCS2;
2634 else if (!strcmp(str, "VHT3MCS3")) return HRATE_VHT_NSS3_MCS3;
2635 else if (!strcmp(str, "VHT3MCS4")) return HRATE_VHT_NSS3_MCS4;
2636 else if (!strcmp(str, "VHT3MCS5")) return HRATE_VHT_NSS3_MCS5;
2637 else if (!strcmp(str, "VHT3MCS6")) return HRATE_VHT_NSS3_MCS6;
2638 else if (!strcmp(str, "VHT3MCS7")) return HRATE_VHT_NSS3_MCS7;
2639 else if (!strcmp(str, "VHT3MCS8")) return HRATE_VHT_NSS3_MCS8;
2640 else if (!strcmp(str, "VHT3MCS9")) return HRATE_VHT_NSS3_MCS9;
2641 else if (!strcmp(str, "VHT4MCS0")) return HRATE_VHT_NSS4_MCS0;
2642 else if (!strcmp(str, "VHT4MCS1")) return HRATE_VHT_NSS4_MCS1;
2643 else if (!strcmp(str, "VHT4MCS2")) return HRATE_VHT_NSS4_MCS2;
2644 else if (!strcmp(str, "VHT4MCS3")) return HRATE_VHT_NSS4_MCS3;
2645 else if (!strcmp(str, "VHT4MCS4")) return HRATE_VHT_NSS4_MCS4;
2646 else if (!strcmp(str, "VHT4MCS5")) return HRATE_VHT_NSS4_MCS5;
2647 else if (!strcmp(str, "VHT4MCS6")) return HRATE_VHT_NSS4_MCS6;
2648 else if (!strcmp(str, "VHT4MCS7")) return HRATE_VHT_NSS4_MCS7;
2649 else if (!strcmp(str, "VHT4MCS8")) return HRATE_VHT_NSS4_MCS8;
2650 else if (!strcmp(str, "VHT4MCS9")) return HRATE_VHT_NSS4_MCS9;
2651 else if (!strcmp(str, "HE1MCS0")) return HRATE_HE_NSS1_MCS0;
2652 else if (!strcmp(str, "HE1MCS1")) return HRATE_HE_NSS1_MCS1;
2653 else if (!strcmp(str, "HE1MCS2")) return HRATE_HE_NSS1_MCS2;
2654 else if (!strcmp(str, "HE1MCS3")) return HRATE_HE_NSS1_MCS3;
2655 else if (!strcmp(str, "HE1MCS4")) return HRATE_HE_NSS1_MCS4;
2656 else if (!strcmp(str, "HE1MCS5")) return HRATE_HE_NSS1_MCS5;
2657 else if (!strcmp(str, "HE1MCS6")) return HRATE_HE_NSS1_MCS6;
2658 else if (!strcmp(str, "HE1MCS7")) return HRATE_HE_NSS1_MCS7;
2659 else if (!strcmp(str, "HE1MCS8")) return HRATE_HE_NSS1_MCS8;
2660 else if (!strcmp(str, "HE1MCS9")) return HRATE_HE_NSS1_MCS9;
2661 else if (!strcmp(str, "HE1MCS10")) return HRATE_HE_NSS1_MCS10;
2662 else if (!strcmp(str, "HE1MCS11")) return HRATE_HE_NSS1_MCS11;
2663 else if (!strcmp(str, "HE2MCS0")) return HRATE_HE_NSS2_MCS0;
2664 else if (!strcmp(str, "HE2MCS1")) return HRATE_HE_NSS2_MCS1;
2665 else if (!strcmp(str, "HE2MCS2")) return HRATE_HE_NSS2_MCS2;
2666 else if (!strcmp(str, "HE2MCS3")) return HRATE_HE_NSS2_MCS3;
2667 else if (!strcmp(str, "HE2MCS4")) return HRATE_HE_NSS2_MCS4;
2668 else if (!strcmp(str, "HE2MCS5")) return HRATE_HE_NSS2_MCS5;
2669 else if (!strcmp(str, "HE2MCS6")) return HRATE_HE_NSS2_MCS6;
2670 else if (!strcmp(str, "HE2MCS7")) return HRATE_HE_NSS2_MCS7;
2671 else if (!strcmp(str, "HE2MCS8")) return HRATE_HE_NSS2_MCS8;
2672 else if (!strcmp(str, "HE2MCS9")) return HRATE_HE_NSS2_MCS9;
2673 else if (!strcmp(str, "HE2MCS10")) return HRATE_HE_NSS2_MCS10;
2674 else if (!strcmp(str, "HE2MCS11")) return HRATE_HE_NSS2_MCS11;
2675 else if (!strcmp(str, "HE3MCS0")) return HRATE_HE_NSS3_MCS0;
2676 else if (!strcmp(str, "HE3MCS1")) return HRATE_HE_NSS3_MCS1;
2677 else if (!strcmp(str, "HE3MCS2")) return HRATE_HE_NSS3_MCS2;
2678 else if (!strcmp(str, "HE3MCS3")) return HRATE_HE_NSS3_MCS3;
2679 else if (!strcmp(str, "HE3MCS4")) return HRATE_HE_NSS3_MCS4;
2680 else if (!strcmp(str, "HE3MCS5")) return HRATE_HE_NSS3_MCS5;
2681 else if (!strcmp(str, "HE3MCS6")) return HRATE_HE_NSS3_MCS6;
2682 else if (!strcmp(str, "HE3MCS7")) return HRATE_HE_NSS3_MCS7;
2683 else if (!strcmp(str, "HE3MCS8")) return HRATE_HE_NSS3_MCS8;
2684 else if (!strcmp(str, "HE3MCS9")) return HRATE_HE_NSS3_MCS9;
2685 else if (!strcmp(str, "HE3MCS10")) return HRATE_HE_NSS3_MCS10;
2686 else if (!strcmp(str, "HE3MCS11")) return HRATE_HE_NSS3_MCS11;
2687 else if (!strcmp(str, "HE4MCS0")) return HRATE_HE_NSS4_MCS0;
2688 else if (!strcmp(str, "HE4MCS1")) return HRATE_HE_NSS4_MCS1;
2689 else if (!strcmp(str, "HE4MCS2")) return HRATE_HE_NSS4_MCS2;
2690 else if (!strcmp(str, "HE4MCS3")) return HRATE_HE_NSS4_MCS3;
2691 else if (!strcmp(str, "HE4MCS4")) return HRATE_HE_NSS4_MCS4;
2692 else if (!strcmp(str, "HE4MCS5")) return HRATE_HE_NSS4_MCS5;
2693 else if (!strcmp(str, "HE4MCS6")) return HRATE_HE_NSS4_MCS6;
2694 else if (!strcmp(str, "HE4MCS7")) return HRATE_HE_NSS4_MCS7;
2695 else if (!strcmp(str, "HE4MCS8")) return HRATE_HE_NSS4_MCS8;
2696 else if (!strcmp(str, "HE4MCS9")) return HRATE_HE_NSS4_MCS9;
2697 else if (!strcmp(str, "HE4MCS10")) return HRATE_HE_NSS4_MCS10;
2698 else if (!strcmp(str, "HE4MCS11")) return HRATE_HE_NSS4_MCS11;
2699 return 0;
2700 }
2701
2702 #define MP_RATE_STR_NUM 132
2703 #define MP_RATE_STR_LEN 12
2704 const char rtw_mp_rateidx_arrdef[MP_RATE_STR_NUM][MP_RATE_STR_LEN] = {
2705 "1M", "2M", "5.5M", "11M", "6M", "9M", "12M", "18M", "24M", "36M", "48M", "54M",
2706 "HTMCS0", "HTMCS1", "HTMCS2", "HTMCS3", "HTMCS4", "HTMCS5", "HTMCS6", "HTMCS7",
2707 "HTMCS8", "HTMCS9", "HTMCS10", "HTMCS11", "HTMCS12", "HTMCS13", "HTMCS14", "HTMCS15",
2708 "HTMCS16", "HTMCS17", "HTMCS18", "HTMCS19", "HTMCS20", "HTMCS21", "HTMCS22", "HTMCS23",
2709 "HTMCS24", "HTMCS25", "HTMCS26", "HTMCS27", "HTMCS28", "HTMCS29", "HTMCS30", "HTMCS31",
2710 "VHT1MCS0", "VHT1MCS1", "VHT1MCS2", "VHT1MCS3", "VHT1MCS4",
2711 "VHT1MCS5", "VHT1MCS6", "VHT1MCS7", "VHT1MCS8", "VHT1MCS9",
2712 "VHT2MCS0", "VHT2MCS1", "VHT2MCS2", "VHT2MCS3", "VHT2MCS4",
2713 "VHT2MCS5", "VHT2MCS6", "VHT2MCS7", "VHT2MCS8", "VHT2MCS9",
2714 "VHT3MCS0", "VHT3MCS1", "VHT3MCS2", "VHT3MCS3", "VHT3MCS4",
2715 "VHT3MCS5", "VHT3MCS6", "VHT3MCS7", "VHT3MCS8", "VHT3MCS9",
2716 "VHT4MCS0", "VHT4MCS1", "VHT4MCS2", "VHT4MCS3", "VHT4MCS4",
2717 "VHT4MCS5", "VHT4MCS6", "VHT4MCS7", "VHT4MCS8", "VHT4MCS9",
2718 "HE1MCS0", "HE1MCS1", "HE1MCS2", "HE1MCS3", "HE1MCS4", "HE1MCS5",
2719 "HE1MCS6", "HE1MCS7", "HE1MCS8", "HE1MCS9", "HE1MCS10", "HE1MCS11",
2720 "HE2MCS0", "HE2MCS1", "HE2MCS2", "HE2MCS3", "HE2MCS4", "HE2MCS5",
2721 "HE2MCS6", "HE2MCS7", "HE2MCS8", "HE2MCS9", "HE2MCS10", "HE2MCS11",
2722 "HE3MCS0", "HE3MCS1", "HE3MCS2", "HE3MCS3", "HE3MCS4", "HE3MCS5",
2723 "HE3MCS6", "HE3MCS7", "HE3MCS8", "HE3MCS9", "HE3MCS10", "HE3MCS11",
2724 "HE4MCS0", "HE4MCS1", "HE4MCS2", "HE4MCS3", "HE4MCS4", "HE4MCS5",
2725 "HE4MCS6", "HE4MCS7", "HE4MCS8", "HE4MCS9", "HE4MCS10", "HE4MCS11"};
2726
rtw_mp_rate_parse(_adapter * adapter,u8 * target_str)2727 u16 rtw_mp_rate_parse(_adapter *adapter, u8 *target_str)
2728 {
2729 struct mp_priv *pmppriv = &adapter->mppriv;
2730
2731 u16 i = 0, mcs_idx_base = 0;
2732 u16 hrateidx = 0;
2733 u8 plcp_nss = 0, ppdu_type = 0;
2734 u8 user_idx = pmppriv->mp_plcp_useridx;
2735
2736 #if 1/*def CONFIG_80211AX_HE*/
2737 hrateidx = srate2herate(target_str);
2738
2739 if (MP_IS_1T_HRATE(hrateidx))
2740 plcp_nss = MP_NSS1;
2741 else if (MP_IS_2T_HRATE(hrateidx))
2742 plcp_nss = MP_NSS2;
2743 else if (MP_IS_3T_HRATE(hrateidx))
2744 plcp_nss = MP_NSS3;
2745 else if (MP_IS_4T_HRATE(hrateidx))
2746 plcp_nss = MP_NSS4;
2747 RTW_INFO("%s , PLCP NSS idx = %d\n", __func__ , plcp_nss);
2748
2749 if (MP_IS_CCK_HRATE(hrateidx))
2750 ppdu_type = RTW_MP_TYPE_CCK;
2751 else if (MP_IS_OFDM_HRATE(hrateidx)) {
2752 ppdu_type = RTW_MP_TYPE_LEGACY;
2753 mcs_idx_base = 4;
2754 } else if (MP_IS_HT_HRATE(hrateidx)) {
2755 ppdu_type = RTW_MP_TYPE_HT_MF;
2756 mcs_idx_base = 12;
2757 } else if (MP_IS_VHT_HRATE(hrateidx)) {
2758 if (plcp_nss == MP_NSS1)
2759 mcs_idx_base = 44;
2760 else if (plcp_nss == MP_NSS2)
2761 mcs_idx_base = 44 + 10;
2762 else if (plcp_nss == MP_NSS3)
2763 mcs_idx_base = 44 + 20;
2764 else if (plcp_nss == MP_NSS4)
2765 mcs_idx_base = 44 + 30;
2766
2767 ppdu_type = RTW_MP_TYPE_VHT;
2768 } else if (MP_IS_HE_HRATE(hrateidx)) {
2769 if (plcp_nss == MP_NSS1)
2770 mcs_idx_base = 84;
2771 else if (plcp_nss == MP_NSS2)
2772 mcs_idx_base = 84 + 12;
2773 else if (plcp_nss == MP_NSS3)
2774 mcs_idx_base = 84 + 24;
2775 else if (plcp_nss == MP_NSS4)
2776 mcs_idx_base = 84+ 36;
2777
2778 ppdu_type = RTW_MP_TYPE_HE_SU;
2779 }
2780
2781 pmppriv->mp_plcp_user[user_idx].plcp_nss = plcp_nss;
2782 pmppriv->rtw_mp_pmact_ppdu_type = ppdu_type;
2783 rtw_update_giltf(adapter);
2784 rtw_mp_update_coding(adapter);
2785
2786 for (i = 0; i <= MP_RATE_STR_NUM; i++) {
2787 if (strcmp(target_str, rtw_mp_rateidx_arrdef[i+ mcs_idx_base]) == 0) {
2788 pmppriv->mp_plcp_user[user_idx].plcp_mcs = i;
2789 RTW_INFO("%s , PLCP MCS = %d\n", __func__ , pmppriv->mp_plcp_user[user_idx].plcp_mcs);
2790 break;
2791 }
2792 }
2793
2794 if (1) {
2795 printk("%s ,please input a Data RATE String as:", __func__);
2796 for (i = 0; i <= MP_RATE_STR_NUM; i++) {
2797 printk("%s ", rtw_mp_rateidx_arrdef[i]);
2798 if (i % 10 == 0)
2799 printk("\n");
2800 }
2801 }
2802 return hrateidx;
2803 #else
2804 for (i = 0; i <= MP_RATE_STR_NUM; i++) {
2805 if (strcmp(targetStr, rtw_mp_rateidx_arrdef[i]) == 0) {
2806 RTW_INFO("%s , index = %d\n", __func__ , i);
2807 return i;
2808 }
2809 }
2810
2811 printk("%s ,please input a Data RATE String as:", __func__);
2812 for (i = 0; i <= MP_RATE_STR_NUM; i++) {
2813 printk("%s ", rtw_mp_rateidx_arrdef[i]);
2814 if (i % 10 == 0)
2815 printk("\n");
2816 }
2817 return _FAIL;
2818 #endif
2819 }
2820
rtw_mp_mode_check(_adapter * adapter)2821 u8 rtw_mp_mode_check(_adapter *adapter)
2822 {
2823 _adapter *primary_adapter = GET_PRIMARY_ADAPTER(adapter);
2824
2825 if (primary_adapter->registrypriv.mp_mode == 1 || primary_adapter->mppriv.bprocess_mp_mode == _TRUE)
2826 return _TRUE;
2827 else
2828 return _FALSE;
2829 }
2830
rtw_is_mp_tssitrk_on(_adapter * adapter)2831 bool rtw_is_mp_tssitrk_on(_adapter *adapter)
2832 {
2833 _adapter *primary_adapter = GET_PRIMARY_ADAPTER(adapter);
2834
2835 return primary_adapter->mppriv.tssitrk_on;
2836 }
2837
mpt_ProQueryCalTxPower(_adapter * adapter,u8 RfPath)2838 u32 mpt_ProQueryCalTxPower(
2839 _adapter *adapter,
2840 u8 RfPath
2841 )
2842 {
2843 PMPT_CONTEXT pMptCtx = &(adapter->mppriv.mpt_ctx);
2844 #if 0
2845 u32 TxPower = 1;
2846 struct txpwr_idx_comp tic;
2847 u8 mgn_rate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index);
2848 RATE_SECTION rs = mgn_rate_to_rs(mgn_rate);
2849
2850 TxPower = rtw_hal_get_tx_power_index(adapter, RfPath, rs, mgn_rate
2851 , pHalData->current_channel_bw, pHalData->current_band_type, pHalData->current_channel, &tic);
2852
2853 dump_tx_power_index_inline(RTW_DBGDUMP, RfPath
2854 , pHalData->current_channel_bw, pHalData->current_channel
2855 , mgn_rate, TxPower, &tic);
2856
2857 adapter->mppriv.txpoweridx = (u8)TxPower;
2858 if (RfPath == RF_PATH_A)
2859 pMptCtx->TxPwrLevel[RF_PATH_A] = (u8)TxPower;
2860 else if (RfPath == RF_PATH_B)
2861 pMptCtx->TxPwrLevel[RF_PATH_B] = (u8)TxPower;
2862 else if (RfPath == RF_PATH_C)
2863 pMptCtx->TxPwrLevel[RF_PATH_C] = (u8)TxPower;
2864 else if (RfPath == RF_PATH_D)
2865 pMptCtx->TxPwrLevel[RF_PATH_D] = (u8)TxPower;
2866 hal_mpt_SetTxPower(adapter);
2867 return TxPower;
2868 #endif
2869 return 0;
2870 }
2871
mpt_get_tx_power_finalabs_val(_adapter * padapter,u8 rf_path)2872 u32 mpt_get_tx_power_finalabs_val(_adapter *padapter, u8 rf_path)
2873 {
2874 PMPT_CONTEXT pMptCtx = &(padapter->mppriv.mpt_ctx);
2875
2876 u8 mgn_rate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index);
2877 u32 powerdbm = 0;
2878
2879 #ifdef CONFIG_80211AX_HE
2880 struct mp_priv *pmppriv = &padapter->mppriv;
2881 struct rtw_mp_txpwr_arg ptxpwr_arg;
2882 u16 i = 0;
2883
2884 _rtw_memset((void *)&ptxpwr_arg, 0, sizeof(struct rtw_mp_txpwr_arg));
2885
2886 ptxpwr_arg.mp_class = RTW_MP_CLASS_TXPWR;
2887 ptxpwr_arg.cmd = RTW_MP_TXPWR_CMD_READ_PWR_TABLE;
2888
2889 ptxpwr_arg.channel = pmppriv->channel;
2890 ptxpwr_arg.bandwidth = pmppriv->bandwidth;
2891 ptxpwr_arg.rate = pmppriv->rateidx;
2892 ptxpwr_arg.rfpath = pmppriv->antenna_tx;
2893 ptxpwr_arg.beamforming = 0;
2894 ptxpwr_arg.dcm = 0;
2895 ptxpwr_arg.offset = 0;
2896
2897 rtw_mp_set_phl_cmd(padapter, (void*)&ptxpwr_arg, sizeof(struct rtw_mp_txpwr_arg));
2898
2899 while (i != 100) {
2900 rtw_msleep_os(10);
2901 rtw_mp_get_phl_cmd(padapter, (void*)&ptxpwr_arg, sizeof(struct rtw_mp_txpwr_arg));
2902 if (ptxpwr_arg.cmd_ok && ptxpwr_arg.status == RTW_PHL_STATUS_SUCCESS) {
2903 powerdbm = ptxpwr_arg.table_item;
2904 RTW_INFO("%s,SET CMD OK\n", __func__);
2905 break;
2906 } else {
2907 if (i > 100) {
2908 RTW_INFO("%s,GET CMD FAIL !!! status %d\n", __func__, ptxpwr_arg.status);
2909 break;
2910 }
2911 i++;
2912 }
2913 }
2914 #else
2915 /*
2916 powerdbm = phy_get_tx_power_final_absolute_value(padapter, rf_path, mgn_rate, pHalData->current_channel_bw, pHalData->current_channel);
2917 RTW_INFO("bw=%d, ch=%d, rateid=%d, TSSI Power(dBm):%d\n",
2918 pHalData->current_channel_bw, pHalData->current_channel, mgn_rate ,powerdbm);
2919 */
2920 #endif
2921 return powerdbm;
2922 }
2923
rtw_mpt_set_power_limit_en(_adapter * padapter,bool en_val)2924 u8 rtw_mpt_set_power_limit_en(_adapter *padapter, bool en_val)
2925 {
2926 struct rtw_mp_txpwr_arg ptxpwr_arg;
2927 u16 i = 0;
2928
2929 _rtw_memset((void *)&ptxpwr_arg, 0, sizeof(struct rtw_mp_txpwr_arg));
2930
2931 ptxpwr_arg.mp_class = RTW_MP_CLASS_TXPWR;
2932 ptxpwr_arg.cmd = RTW_MP_TXPWR_CMD_SET_PWR_LMT_EN;
2933
2934 ptxpwr_arg.pwr_lmt_en = en_val;
2935
2936 rtw_mp_set_phl_cmd(padapter, (void*)&ptxpwr_arg, sizeof(struct rtw_mp_txpwr_arg));
2937
2938 while (i != 10) {
2939 rtw_msleep_os(10);
2940 rtw_mp_get_phl_cmd(padapter, (void*)&ptxpwr_arg, sizeof(struct rtw_mp_txpwr_arg));
2941 if (ptxpwr_arg.cmd_ok && ptxpwr_arg.status == RTW_PHL_STATUS_SUCCESS) {
2942 RTW_INFO("%s,SET CMD OK\n", __func__);
2943 return ptxpwr_arg.cmd_ok;
2944 } else {
2945 if (i > 10) {
2946 RTW_INFO("%s,GET CMD FAIL !!! status %d\n", __func__, ptxpwr_arg.status);
2947 break;
2948 }
2949 i++;
2950 }
2951 }
2952
2953 return 0;
2954 }
2955
rtw_mpt_get_power_limit_en(_adapter * padapter)2956 bool rtw_mpt_get_power_limit_en(_adapter *padapter)
2957 {
2958 struct rtw_mp_txpwr_arg ptxpwr_arg;
2959 u16 i = 0;
2960
2961 _rtw_memset((void *)&ptxpwr_arg, 0, sizeof(struct rtw_mp_txpwr_arg));
2962
2963 ptxpwr_arg.mp_class = RTW_MP_CLASS_TXPWR;
2964 ptxpwr_arg.cmd = RTW_MP_TXPWR_CMD_GET_PWR_LMT_EN;
2965 ptxpwr_arg.pwr_lmt_en = _FALSE;
2966
2967 rtw_mp_set_phl_cmd(padapter, (void*)&ptxpwr_arg, sizeof(struct rtw_mp_txpwr_arg));
2968
2969 while (i != 10) {
2970 rtw_msleep_os(10);
2971 rtw_mp_get_phl_cmd(padapter, (void*)&ptxpwr_arg, sizeof(struct rtw_mp_txpwr_arg));
2972 if (ptxpwr_arg.cmd_ok && ptxpwr_arg.status == RTW_PHL_STATUS_SUCCESS) {
2973 RTW_INFO("%s, CMD OK\n", __func__);
2974 return ptxpwr_arg.pwr_lmt_en;
2975 } else {
2976 if (i > 10) {
2977 RTW_INFO("%s,GET CMD FAIL !!! status %d\n",
2978 __func__, ptxpwr_arg.status);
2979 break;
2980 }
2981 i++;
2982 }
2983 }
2984
2985 return ptxpwr_arg.pwr_lmt_en;
2986 }
2987
rtw_mp_get_phl_cmd(_adapter * padapter,void * buf,u32 buflen)2988 void rtw_mp_get_phl_cmd(_adapter *padapter, void* buf, u32 buflen)
2989 {
2990 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
2991 struct phl_info_t *phl_info = (struct phl_info_t *)(dvobj->phl);
2992 struct rtw_mp_test_cmdbuf *cmdbuf = NULL;
2993
2994 if (buflen > RTW_MAX_TEST_CMD_BUF) {
2995 RTW_ERR("%s, buflen %d over CMD BUF Size !\n", __func__, buflen);
2996 return;
2997 }
2998
2999 cmdbuf = _rtw_malloc(sizeof(struct rtw_mp_test_cmdbuf));
3000
3001 if (cmdbuf) {
3002 _rtw_memset((void *)cmdbuf, 0, sizeof(struct rtw_mp_test_cmdbuf));
3003 cmdbuf->type = 0;
3004 cmdbuf->len = buflen;
3005 _rtw_memcpy((void *)cmdbuf->buf, buf, buflen);
3006 rtw_phl_test_submodule_get_rpt(rtw_phl_get_com(phl_info), (void *)cmdbuf, sizeof(struct rtw_mp_test_cmdbuf));
3007 _rtw_memcpy((void *)buf, (void *)cmdbuf->buf, buflen);
3008 }
3009 if (cmdbuf)
3010 _rtw_mfree(cmdbuf, sizeof(struct rtw_mp_test_cmdbuf));
3011 }
3012
rtw_mp_set_phl_cmd(_adapter * padapter,void * buf,u32 buflen)3013 void rtw_mp_set_phl_cmd(_adapter *padapter, void* buf, u32 buflen)
3014 {
3015 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
3016 struct phl_info_t *phl_info = (struct phl_info_t *)(dvobj->phl);
3017 struct rtw_mp_test_cmdbuf *cmdbuf = NULL;
3018
3019 if (buflen > RTW_MAX_TEST_CMD_BUF) {
3020 RTW_ERR("%s, buflen %d over CMD BUF Size !\n", __func__, buflen);
3021 return;
3022 }
3023
3024 cmdbuf = _rtw_malloc(sizeof(struct rtw_mp_test_cmdbuf));
3025
3026 if (cmdbuf) {
3027 _rtw_memset((void *)cmdbuf, 0, sizeof(struct rtw_mp_test_cmdbuf));
3028
3029 cmdbuf->type = 0;
3030 cmdbuf->len = buflen;
3031 _rtw_memcpy((void *)cmdbuf->buf, buf, buflen);
3032 rtw_phl_test_submodule_cmd_process(rtw_phl_get_com(phl_info), (void*)cmdbuf, sizeof(struct rtw_mp_test_cmdbuf));
3033 }
3034 if (cmdbuf)
3035 _rtw_mfree(cmdbuf, sizeof(struct rtw_mp_test_cmdbuf));
3036 }
3037
rtw_mp_phl_txpower(_adapter * padapter,struct rtw_mp_txpwr_arg * ptxpwr_arg,u8 cmdid)3038 u8 rtw_mp_phl_txpower(_adapter *padapter, struct rtw_mp_txpwr_arg *ptxpwr_arg, u8 cmdid)
3039 {
3040 struct mp_priv *pmppriv = &padapter->mppriv;
3041 u16 i = 0;
3042
3043 ptxpwr_arg->mp_class = RTW_MP_CLASS_TXPWR;
3044 ptxpwr_arg->cmd = cmdid;
3045
3046 rtw_mp_set_phl_cmd(padapter, (void*)ptxpwr_arg, sizeof(struct rtw_mp_txpwr_arg));
3047
3048 while (i <= 10) {
3049 rtw_msleep_os(10);
3050 rtw_mp_get_phl_cmd(padapter, (void*)ptxpwr_arg, sizeof(struct rtw_mp_txpwr_arg));
3051 if (ptxpwr_arg->cmd_ok && ptxpwr_arg->status == RTW_PHL_STATUS_SUCCESS) {
3052 RTW_INFO("%s,SET CMD OK\n", __func__);
3053 break;
3054 } else {
3055 if (i > 10) {
3056 RTW_DBG("%s,GET CMD FAIL !!! status %d\n", __func__, ptxpwr_arg->status);
3057 break;
3058 }
3059 i++;
3060 }
3061 }
3062
3063 return ptxpwr_arg->cmd_ok;
3064 }
3065
rtw_mp_phl_config_arg(_adapter * padapter,enum rtw_mp_config_cmdid cmdid)3066 bool rtw_mp_phl_config_arg(_adapter *padapter, enum rtw_mp_config_cmdid cmdid)
3067 {
3068 struct mp_priv *pmppriv = &padapter->mppriv;
3069 struct rtw_mp_config_arg pmp_arg;
3070 u16 i = 0;
3071
3072 _rtw_memset((void *)&pmp_arg, 0, sizeof(struct rtw_mp_config_arg));
3073
3074 pmp_arg.mp_class = RTW_MP_CLASS_CONFIG;
3075 pmp_arg.cmd = cmdid;
3076 RTW_INFO("%s, id: %d !!!\n", __func__, cmdid);
3077
3078 switch (cmdid) {
3079 case RTW_MP_CONFIG_CMD_SET_CH_BW:
3080 pmp_arg.channel = pmppriv->channel;
3081 pmp_arg.bandwidth = pmppriv->bandwidth;
3082 pmp_arg.sc_idx = pmppriv->prime_channel_offset;
3083 break;
3084 case RTW_MP_CONFIG_CMD_SET_RATE_IDX:
3085 pmp_arg.rate_idx= pmppriv->rateidx;
3086 break;
3087 case RTW_MP_CONFIG_CMD_SET_RF_TXRX_PATH:
3088 pmp_arg.ant_tx = pmppriv->antenna_trx;
3089 pmp_arg.ant_rx = pmppriv->antenna_trx;
3090 break;
3091 case RTW_MP_CONFIG_CMD_STOP_DUT:
3092 case RTW_MP_CONFIG_CMD_START_DUT:
3093 case RTW_MP_CONFIG_CMD_SET_PHY_INDEX:
3094 pmp_arg.cur_phy = pmppriv->rtw_mp_cur_phy;
3095 break;
3096 case RTW_MP_CONFIG_CMD_SET_RESET_PHY_COUNT:
3097 case RTW_MP_CONFIG_CMD_SET_RESET_MAC_COUNT:
3098 case RTW_MP_CONFIG_CMD_SET_RESET_DRV_COUNT:
3099 pmp_arg.cur_phy = pmppriv->rtw_mp_cur_phy;
3100 break;
3101 case RTW_MP_CONFIG_CMD_SWITCH_BT_PATH:
3102 pmp_arg.btc_mode = pmppriv->btc_path;
3103 break;
3104 case RTW_MP_CONFIG_CMD_SET_GPIO:
3105 pmp_arg.gpio_id = pmppriv->gpio_id;
3106 pmp_arg.gpio_enable = pmppriv->gpio_enable;
3107 break;
3108 default:
3109 RTW_INFO("%s, No CMD case match !!!\n", __func__);
3110 return _FALSE;
3111 }
3112
3113 rtw_mp_set_phl_cmd(padapter, (void*)&pmp_arg, sizeof(struct rtw_mp_config_arg));
3114 while (1) {
3115 rtw_mp_get_phl_cmd(padapter, (void*)&pmp_arg, sizeof(struct rtw_mp_config_arg));
3116 if (pmp_arg.cmd_ok && pmp_arg.status == RTW_PHL_STATUS_SUCCESS) {
3117 RTW_INFO("%s, %d GET CMD OK !!!\n", __func__, cmdid);
3118 break;
3119 } else {
3120 i++;
3121 rtw_msleep_os(10);
3122 if (i == 100) {
3123 RTW_INFO("%s, %d GET CMD FAIL !!!\n", __func__, cmdid);
3124 break;
3125 }
3126 }
3127 }
3128 return pmp_arg.cmd_ok;
3129 }
3130
rtw_mp_phl_rx_physts(_adapter * padapter,struct rtw_mp_rx_arg * rx_arg,bool bstart)3131 void rtw_mp_phl_rx_physts(_adapter *padapter, struct rtw_mp_rx_arg *rx_arg, bool bstart)
3132 {
3133 struct mp_priv *pmppriv = &padapter->mppriv;
3134 u8 i = 0;
3135
3136 rx_arg->mp_class = RTW_MP_CLASS_RX;
3137 rx_arg->cmd = RTW_MP_RX_CMD_GET_PHYSTS;
3138 rx_arg->enable = bstart;
3139
3140 rx_arg->cmd_ok = _FALSE;
3141 rtw_mp_set_phl_cmd(padapter, (void*)rx_arg, sizeof(struct rtw_mp_rx_arg));
3142
3143 while (i != 10) {
3144 rtw_msleep_os(100);
3145 rtw_mp_get_phl_cmd(padapter, (void*)rx_arg, sizeof(struct rtw_mp_rx_arg));
3146 if (rx_arg->cmd_ok && rx_arg->status == RTW_PHL_STATUS_SUCCESS) {
3147 RTW_INFO("%s,GET CMD RX OK\n", __func__);
3148 break;
3149 } else {
3150 if (i > 10) {
3151 RTW_INFO("%s,GET CMD FAIL !!! status %d\n", __func__,rx_arg->status);
3152 break;
3153 }
3154 i++;
3155 }
3156 }
3157 }
3158
rtw_mp_phl_rx_rssi(_adapter * padapter,struct rtw_mp_rx_arg * rx_arg)3159 void rtw_mp_phl_rx_rssi(_adapter *padapter, struct rtw_mp_rx_arg *rx_arg)
3160 {
3161 struct mp_priv *pmppriv = &padapter->mppriv;
3162 u8 i = 0;
3163
3164 rx_arg->mp_class = RTW_MP_CLASS_RX;
3165 rx_arg->cmd = RTW_MP_RX_CMD_GET_RSSI;
3166
3167 rx_arg->cmd_ok = _FALSE;
3168 rtw_mp_set_phl_cmd(padapter, (void*)rx_arg, sizeof(struct rtw_mp_rx_arg));
3169
3170 while (i != 10) {
3171 rtw_msleep_os(100);
3172 rtw_mp_get_phl_cmd(padapter, (void*)rx_arg, sizeof(struct rtw_mp_rx_arg));
3173 if (rx_arg->cmd_ok && rx_arg->status == RTW_PHL_STATUS_SUCCESS) {
3174 RTW_INFO("%s,Path%d rssi:%d GET CMD RX OK\n", __func__, rx_arg->rf_path, rx_arg->rssi);
3175 break;
3176 } else {
3177 if (i > 10) {
3178 RTW_INFO("%s,GET CMD FAIL !!! status %d\n", __func__,rx_arg->status);
3179 break;
3180 }
3181 i++;
3182 }
3183 }
3184 }
3185
rtw_mp_phl_rx_gain_offset(_adapter * padapter,struct rtw_mp_rx_arg * rx_arg,u8 path_num)3186 void rtw_mp_phl_rx_gain_offset(_adapter *padapter, struct rtw_mp_rx_arg *rx_arg, u8 path_num)
3187 {
3188 struct mp_priv *pmppriv = &padapter->mppriv;
3189 u8 all_path_num = path_num;
3190 u8 rf_path = 0;
3191
3192 rx_arg->mp_class = RTW_MP_CLASS_RX;
3193 rx_arg->cmd = RTW_MP_RX_CMD_SET_GAIN_OFFSET;
3194
3195 if (path_num > 1) {
3196 path_num = 0;
3197 all_path_num -= 1;
3198 }
3199
3200 for (rf_path = path_num; rf_path <= all_path_num; rf_path++) {
3201 u16 i = 0;
3202
3203 rx_arg->rf_path = rf_path;
3204 rx_arg->cmd_ok = _FALSE;
3205 rtw_mp_set_phl_cmd(padapter, (void*)rx_arg, sizeof(struct rtw_mp_rx_arg));
3206
3207 while (i != 10) {
3208 rtw_msleep_os(100);
3209 rtw_mp_get_phl_cmd(padapter, (void*)rx_arg, sizeof(struct rtw_mp_rx_arg));
3210 if (rx_arg->cmd_ok && rx_arg->status == RTW_PHL_STATUS_SUCCESS) {
3211 RTW_INFO("%s,rf path %d GET CMD RX OK\n", __func__, rx_arg->rf_path);
3212 break;
3213 } else {
3214 if (i > 10) {
3215 RTW_INFO("%s,GET CMD FAIL !!! status %d\n", __func__,rx_arg->status);
3216 break;
3217 }
3218 i++;
3219 }
3220 }
3221 }
3222 }
3223
3224
rtw_mp_phl_query_rx(_adapter * padapter,struct rtw_mp_rx_arg * rx_arg,u8 rx_qurey_type)3225 void rtw_mp_phl_query_rx(_adapter *padapter, struct rtw_mp_rx_arg *rx_arg ,u8 rx_qurey_type)
3226 {
3227 struct mp_priv *pmppriv = &padapter->mppriv;
3228 u8 rxcmd[2] = {0, 0};
3229 u8 cmd_idx = 0;
3230
3231 rx_arg->mp_class = RTW_MP_CLASS_RX;
3232 rx_arg->rx_ok = 0;
3233 rx_arg->rx_err = 0;
3234
3235 if (rx_qurey_type == 0) {
3236 rxcmd[0] = RTW_MP_RX_CMD_PHY_CRC_OK;
3237 rxcmd[1] = RTW_MP_RX_CMD_PHY_CRC_ERR;
3238 } else if (rx_qurey_type == 1) {
3239 rxcmd[0] = RTW_MP_RX_CMD_MAC_CRC_OK;
3240 rxcmd[1] = RTW_MP_RX_CMD_MAC_CRC_ERR;
3241 } else if (rx_qurey_type == 2) {
3242 rxcmd[0] = RTW_MP_RX_CMD_DRV_CRC_OK;
3243 rxcmd[1] = RTW_MP_RX_CMD_DRV_CRC_ERR;
3244 }
3245
3246 for (cmd_idx = 0; cmd_idx < 2 ; cmd_idx++) {
3247 u16 i = 0;
3248
3249 rx_arg->cmd = rxcmd[cmd_idx];
3250 rx_arg->cmd_ok = _FALSE;
3251 rtw_mp_set_phl_cmd(padapter, (void*)rx_arg, sizeof(struct rtw_mp_rx_arg));
3252
3253 while (i != 10) {
3254 rtw_msleep_os(100);
3255 rtw_mp_get_phl_cmd(padapter, (void*)rx_arg, sizeof(struct rtw_mp_rx_arg));
3256 if (rx_arg->cmd_ok && rx_arg->status == RTW_PHL_STATUS_SUCCESS) {
3257 RTW_INFO("%s,GET CMD RX OK:%d ,RX ERR:%d\n", __func__, rx_arg->rx_ok, rx_arg->rx_err);
3258 break;
3259 } else {
3260 if (i > 10) {
3261 RTW_INFO("%s,GET CMD FAIL !!! status %d\n", __func__,rx_arg->status);
3262 break;
3263 }
3264 i++;
3265 }
3266 }
3267 }
3268 }
3269
rtw_mp_set_crystal_cap(_adapter * padapter,u32 xcapvalue)3270 void rtw_mp_set_crystal_cap(_adapter *padapter, u32 xcapvalue)
3271 {
3272 struct rtw_mp_reg_arg cfg_arg;
3273 u8 sc_xo_idx = 1;
3274 u8 i = 0;
3275
3276 cfg_arg.mp_class = RTW_MP_CLASS_REG;
3277 cfg_arg.cmd = RTW_MP_REG_CMD_SET_XCAP;
3278
3279 for (i <=0 ; i <= sc_xo_idx; i++) {
3280 cfg_arg.cmd_ok = 0;
3281 cfg_arg.sc_xo = i;
3282 cfg_arg.io_value = xcapvalue;
3283 rtw_mp_set_phl_cmd(padapter, (void*)&cfg_arg, sizeof(struct rtw_mp_reg_arg));
3284
3285 while (i != 10) {
3286 rtw_msleep_os(10);
3287 rtw_mp_get_phl_cmd(padapter, (void*)&cfg_arg, sizeof(struct rtw_mp_reg_arg));
3288 if (cfg_arg.cmd_ok && cfg_arg.status == RTW_PHL_STATUS_SUCCESS) {
3289 RTW_INFO("%s,SET CMD TX OK\n", __func__);
3290 break;
3291 } else {
3292 if (i > 10) {
3293 RTW_INFO("%s,GET CMD FAIL !!! status %d\n", __func__, cfg_arg.status);
3294 break;
3295 }
3296 i++;
3297 }
3298 }
3299 }
3300
3301 }
3302
rtw_mp_phl_calibration(_adapter * padapter,struct rtw_mp_cal_arg * pcal_arg,u8 cmdid)3303 u8 rtw_mp_phl_calibration(_adapter *padapter, struct rtw_mp_cal_arg *pcal_arg, u8 cmdid)
3304 {
3305 struct mp_priv *pmppriv = &padapter->mppriv;
3306 u16 i = 0;
3307 u32 cmd_size = sizeof(struct rtw_mp_cal_arg);
3308
3309 pcal_arg->mp_class = RTW_MP_CLASS_CAL;
3310 pcal_arg->cmd = cmdid;
3311
3312 rtw_mp_set_phl_cmd(padapter, (void*)pcal_arg, cmd_size);
3313
3314 while (i <= 10) {
3315 rtw_msleep_os(10);
3316 rtw_mp_get_phl_cmd(padapter, (void*)pcal_arg, cmd_size);
3317 if (pcal_arg->cmd_ok && pcal_arg->status == RTW_PHL_STATUS_SUCCESS) {
3318 RTW_INFO("%s,SET CMD OK\n", __func__);
3319 break;
3320 } else {
3321 if (i > 10) {
3322 RTW_DBG("%s,GET CMD FAIL !!! status %d\n", __func__, pcal_arg->status);
3323 break;
3324 }
3325 i++;
3326 }
3327 }
3328
3329 return pcal_arg->cmd_ok;
3330 }
3331
rtw_mp_phl_reg(_adapter * padapter,struct rtw_mp_reg_arg * reg_arg,u8 cmdid)3332 u8 rtw_mp_phl_reg(_adapter *padapter, struct rtw_mp_reg_arg *reg_arg, u8 cmdid)
3333 {
3334 struct mp_priv *pmppriv = &padapter->mppriv;
3335 u16 i = 0;
3336 u32 cmd_size = sizeof(struct rtw_mp_reg_arg);
3337
3338 reg_arg->mp_class = RTW_MP_CLASS_REG;
3339 reg_arg->cmd = cmdid;
3340
3341 rtw_mp_set_phl_cmd(padapter, (void*)reg_arg, cmd_size);
3342
3343 while (i <= 10) {
3344 rtw_msleep_os(10);
3345 rtw_mp_get_phl_cmd(padapter, (void*)reg_arg, cmd_size);
3346 if (reg_arg->cmd_ok && reg_arg->status == RTW_PHL_STATUS_SUCCESS) {
3347 RTW_INFO("%s,SET CMD OK\n", __func__);
3348 break;
3349 } else {
3350 if (i > 10) {
3351 RTW_DBG("%s,GET CMD FAIL !!! status %d\n", __func__, reg_arg->status);
3352 break;
3353 }
3354 i++;
3355 }
3356 }
3357
3358 return reg_arg->cmd_ok;
3359 }
3360
3361
rtw_update_giltf(_adapter * padapter)3362 u8 rtw_update_giltf(_adapter *padapter)
3363 {
3364 struct mp_priv *pmp_priv = (struct mp_priv *)&padapter->mppriv;
3365 u8 idx = 0;
3366 u8 ppdu_type = pmp_priv->rtw_mp_pmact_ppdu_type;
3367 u8 user_idx = pmp_priv->mp_plcp_useridx;
3368
3369 RTW_INFO("%s: ppdu_type=%s\n", __func__ , PPDU_TYPE_STR(pmp_priv->rtw_mp_pmact_ppdu_type));
3370 if (ppdu_type == RTW_MP_TYPE_HT_MF || ppdu_type == RTW_MP_TYPE_HT_GF
3371 || ppdu_type == RTW_MP_TYPE_VHT) {
3372 pmp_priv->st_giltf[0].gi = 0;
3373 pmp_priv->st_giltf[0].ltf = 0;
3374 strcpy(pmp_priv->st_giltf[0].type_str, "0.4");
3375 pmp_priv->st_giltf[1].gi = 1;
3376 pmp_priv->st_giltf[1].ltf = 0;
3377 strcpy(pmp_priv->st_giltf[1].type_str, "0.8");
3378 idx = 1;
3379 } else if (ppdu_type > RTW_MP_TYPE_VHT) {
3380 if (ppdu_type == RTW_MP_TYPE_HE_SU || ppdu_type == RTW_MP_TYPE_HE_ER_SU) {
3381
3382 if (!pmp_priv->mp_plcp_user[user_idx].dcm && !pmp_priv->rtw_mp_stbc) {
3383 pmp_priv->st_giltf[0].gi = 1;
3384 pmp_priv->st_giltf[0].ltf = 0;
3385 strcpy(pmp_priv->st_giltf[0].type_str, "1x 0.8");
3386 pmp_priv->st_giltf[1].gi = 1;
3387 pmp_priv->st_giltf[1].ltf = 1;
3388 strcpy(pmp_priv->st_giltf[1].type_str, "2x 0.8");
3389 pmp_priv->st_giltf[2].gi = 2;
3390 pmp_priv->st_giltf[2].ltf = 1;
3391 strcpy(pmp_priv->st_giltf[2].type_str, "2x 1.6");
3392 pmp_priv->st_giltf[3].gi = 3;
3393 pmp_priv->st_giltf[3].ltf = 2;
3394 strcpy(pmp_priv->st_giltf[3].type_str, "4x 3.2");
3395 pmp_priv->st_giltf[4].gi = 1;
3396 pmp_priv->st_giltf[4].ltf = 2;
3397 strcpy(pmp_priv->st_giltf[4].type_str, "4x 0.8");
3398 idx = 4;
3399 } else {
3400 pmp_priv->st_giltf[0].gi = 1;
3401 pmp_priv->st_giltf[0].ltf = 0;
3402 strcpy(pmp_priv->st_giltf[0].type_str, "1x 0.8");
3403 pmp_priv->st_giltf[1].gi = 1;
3404 pmp_priv->st_giltf[1].ltf = 1;
3405 strcpy(pmp_priv->st_giltf[1].type_str, "2x 0.8");
3406 pmp_priv->st_giltf[2].gi = 2;
3407 pmp_priv->st_giltf[2].ltf = 1;
3408 strcpy(pmp_priv->st_giltf[2].type_str, "2x 1.6");
3409 pmp_priv->st_giltf[3].gi = 3;
3410 pmp_priv->st_giltf[3].ltf = 2;
3411 strcpy(pmp_priv->st_giltf[3].type_str, "4x 3.2");
3412 idx = 3;
3413 }
3414 }else if (ppdu_type == RTW_MP_TYPE_HE_MU_OFDMA) {
3415 pmp_priv->st_giltf[0].gi = 1;
3416 pmp_priv->st_giltf[0].ltf = 1;
3417 strcpy(pmp_priv->st_giltf[0].type_str, "2x 0.8");
3418 pmp_priv->st_giltf[1].gi = 2;
3419 pmp_priv->st_giltf[1].ltf = 1;
3420 strcpy(pmp_priv->st_giltf[1].type_str, "2x 1.6");
3421 pmp_priv->st_giltf[2].gi = 1;
3422 pmp_priv->st_giltf[2].ltf = 2;
3423 strcpy(pmp_priv->st_giltf[2].type_str, "4x 0.8");
3424 pmp_priv->st_giltf[3].gi = 3;
3425 pmp_priv->st_giltf[3].ltf = 2;
3426 strcpy(pmp_priv->st_giltf[3].type_str, "4x 3.2");
3427 idx = 3;
3428 } else if (ppdu_type == RTW_MP_TYPE_HE_TB) {
3429 pmp_priv->st_giltf[0].gi = 2;
3430 pmp_priv->st_giltf[0].ltf = 0;
3431 strcpy(pmp_priv->st_giltf[0].type_str, "1x 1.6");
3432 pmp_priv->st_giltf[1].gi = 2;
3433 pmp_priv->st_giltf[1].ltf = 1;
3434 strcpy(pmp_priv->st_giltf[1].type_str, "2x 1.6");
3435 pmp_priv->st_giltf[2].gi = 3;
3436 pmp_priv->st_giltf[2].ltf = 2;
3437 strcpy(pmp_priv->st_giltf[2].type_str, "4x 3.2");
3438 idx = 2;
3439 }
3440 }
3441 return idx;
3442 }
3443
rtw_mp_update_coding(_adapter * padapter)3444 void rtw_mp_update_coding(_adapter *padapter)
3445 {
3446 struct mp_priv *pmp_priv = (struct mp_priv *)&padapter->mppriv;
3447 u8 ppdu_type = pmp_priv->rtw_mp_pmact_ppdu_type;
3448 u8 user_idx = pmp_priv->mp_plcp_useridx;
3449
3450 if (ppdu_type == RTW_MP_TYPE_HE_SU || pmp_priv->bandwidth >= CHANNEL_WIDTH_40 ||
3451 pmp_priv->rtw_mp_ru_tone >= MP_RU_TONE_484) {
3452
3453 RTW_INFO("%s, PPDU HE SU , over 40M, RU Tone over 484\n", __func__);
3454 pmp_priv->mp_plcp_user[user_idx].coding = 1;/* 1 LDPC, 0 BCC */
3455 } else if (ppdu_type == RTW_MP_TYPE_HE_MU_OFDMA) {
3456
3457 RTW_INFO("%s, PPDU HE MU\n", __func__);
3458 pmp_priv->mp_plcp_user[user_idx].coding = 0;/* 1 LDPC, 0 BCC */
3459 }
3460
3461 RTW_INFO("%s, coding: %s\n", __func__, (pmp_priv->mp_plcp_user[user_idx].coding?"LDPC":"BCC"));
3462 }
3463
rtw_mp_update_ru_tone(_adapter * padapter)3464 u8 rtw_mp_update_ru_tone(_adapter *padapter)
3465 {
3466 struct mp_priv *pmp_priv = (struct mp_priv *)&padapter->mppriv;
3467 u8 user_idx = pmp_priv->mp_plcp_useridx;
3468 u8 cur_coding = pmp_priv->mp_plcp_user[user_idx].coding;
3469 u8 ruidx = MP_RU_TONE_26;
3470 u8 i = 0 , j = 0;
3471
3472 if (cur_coding == 0) {/* 1 LDPC, 0 BCC */
3473 ruidx = MP_RU_TONE_242;
3474 if (pmp_priv->rtw_mp_ru_tone < MP_RU_TONE_242)
3475 pmp_priv->rtw_mp_ru_tone = MP_RU_TONE_242;
3476 } else {
3477 ruidx = MP_RU_TONE_26;
3478 }
3479
3480 for (i = 0; i <= 5; i++) {
3481 pmp_priv->ru_tone_sel_list[i] = ruidx++;
3482 if (ruidx > MP_RU_TONE_966)
3483 break;
3484 }
3485 return i;
3486 }
3487
rtw_mp_update_ru_alloc(_adapter * padapter)3488 u8 rtw_mp_update_ru_alloc(_adapter *padapter)
3489 {
3490 struct mp_priv *pmp_priv = (struct mp_priv *)&padapter->mppriv;
3491 u8 cur_tone = pmp_priv->rtw_mp_ru_tone;
3492 u8 i = 0;
3493 u8 alloc_start = 0, alloc_end = 0;
3494 u8 user_idx = pmp_priv->mp_plcp_useridx;
3495
3496 switch (cur_tone) {
3497 case MP_RU_TONE_26:
3498 alloc_start = 0;
3499 alloc_end = 9;
3500 if (pmp_priv->bandwidth == CHANNEL_WIDTH_40)
3501 alloc_end = 18;
3502
3503 if (pmp_priv->bandwidth == CHANNEL_WIDTH_80)
3504 alloc_end = 37;
3505 break;
3506 case MP_RU_TONE_52:
3507 alloc_start = 37;
3508 alloc_end = 41;
3509 if (pmp_priv->bandwidth == CHANNEL_WIDTH_40)
3510 alloc_end = 45;
3511
3512 if (pmp_priv->bandwidth == CHANNEL_WIDTH_80)
3513 alloc_end = 53;
3514
3515 break;
3516 case MP_RU_TONE_106:
3517 alloc_start = 53;
3518 alloc_end = 55;
3519
3520 if (pmp_priv->bandwidth == CHANNEL_WIDTH_40)
3521 alloc_end = 57;
3522
3523 if (pmp_priv->bandwidth == CHANNEL_WIDTH_80)
3524 alloc_end = 61;
3525
3526 break;
3527 case MP_RU_TONE_242:
3528 alloc_start = 61;
3529 alloc_end = 61;
3530 if (pmp_priv->bandwidth == CHANNEL_WIDTH_40)
3531 alloc_end = 62;
3532
3533 if (pmp_priv->bandwidth == CHANNEL_WIDTH_80)
3534 alloc_end = 64;
3535
3536 break;
3537 case MP_RU_TONE_484:
3538 alloc_start = 65;
3539 alloc_end = 66;
3540 break;
3541 case MP_RU_TONE_966:
3542 alloc_start = 67;
3543 alloc_end = 67;
3544 break;
3545 };
3546
3547 if (pmp_priv->mp_plcp_user[user_idx].ru_alloc < alloc_start ||
3548 pmp_priv->mp_plcp_user[user_idx].ru_alloc > alloc_end)
3549 pmp_priv->mp_plcp_user[user_idx].ru_alloc = alloc_start;
3550
3551 for (i = 0; i < 68; i++) {
3552 if (alloc_start + i > alloc_end)
3553 break;
3554 pmp_priv->ru_alloc_list[i] = alloc_start + i;
3555 RTW_INFO("%s, Ru alloc:%d\n", __func__, pmp_priv->ru_alloc_list[i]);
3556
3557 }
3558 return i;
3559 }
3560
rtw_mp_get_tssi_de(_adapter * padapter,u8 rf_path)3561 u32 rtw_mp_get_tssi_de(_adapter *padapter, u8 rf_path)
3562 {
3563 struct rtw_mp_txpwr_arg ptxpwr_arg;
3564 struct mp_priv *pmppriv = &padapter->mppriv;
3565
3566 _rtw_memset((void *)&ptxpwr_arg, 0, sizeof(struct rtw_mp_txpwr_arg));
3567
3568 ptxpwr_arg.rfpath = rf_path;
3569
3570 if (rtw_mp_phl_txpower(padapter, &ptxpwr_arg, RTW_MP_TXPWR_CMD_GET_TSSI))
3571 return ptxpwr_arg.tssi;
3572 else
3573 return 0;
3574 }
3575
rtw_mp_get_online_tssi_de(_adapter * padapter,s32 out_pwr,s32 tgdbm,u8 rf_path)3576 s32 rtw_mp_get_online_tssi_de(_adapter *padapter, s32 out_pwr, s32 tgdbm, u8 rf_path)
3577 {
3578 struct rtw_mp_txpwr_arg ptxpwr_arg;
3579 struct mp_priv *pmppriv = &padapter->mppriv;
3580
3581 _rtw_memset((void *)&ptxpwr_arg, 0, sizeof(struct rtw_mp_txpwr_arg));
3582
3583 ptxpwr_arg.dbm = tgdbm;
3584 ptxpwr_arg.pout = out_pwr;
3585 ptxpwr_arg.rfpath = rf_path;
3586
3587 if (rtw_mp_phl_txpower(padapter, &ptxpwr_arg, RTW_MP_TXPWR_CMD_GET_ONLINE_TSSI_DE))
3588 return ptxpwr_arg.online_tssi_de;
3589 else
3590 return 0;
3591 }
3592
rtw_mp_set_tsside2verify(_adapter * padapter,u32 tssi_de,u8 rf_path)3593 u8 rtw_mp_set_tsside2verify(_adapter *padapter, u32 tssi_de, u8 rf_path)
3594 {
3595 struct rtw_mp_txpwr_arg ptxpwr_arg;
3596 struct mp_priv *pmppriv = &padapter->mppriv;
3597 u8 tx_nss = get_phy_tx_nss(padapter);
3598 u8 i = 0;
3599
3600 _rtw_memset((void *)&ptxpwr_arg, 0, sizeof(struct rtw_mp_txpwr_arg));
3601
3602 ptxpwr_arg.tssi = tssi_de;
3603 ptxpwr_arg.rfpath = rf_path;
3604
3605 if (rtw_mp_phl_txpower(padapter, &ptxpwr_arg, RTW_MP_TXPWR_CMD_SET_TSSI))
3606 return true;
3607 else
3608 return false;
3609 }
3610
rtw_mp_set_tssi_offset(_adapter * padapter,u32 tssi_offset,u8 rf_path)3611 u8 rtw_mp_set_tssi_offset(_adapter *padapter, u32 tssi_offset, u8 rf_path)
3612 {
3613 struct rtw_mp_txpwr_arg ptxpwr_arg;
3614 struct mp_priv *pmppriv = &padapter->mppriv;
3615 u8 tx_nss = get_phy_tx_nss(padapter);
3616 u8 i = 0;
3617
3618 _rtw_memset((void *)&ptxpwr_arg, 0, sizeof(struct rtw_mp_txpwr_arg));
3619
3620 ptxpwr_arg.tssi_de_offset = tssi_offset;
3621 ptxpwr_arg.rfpath = rf_path;
3622
3623 if (rtw_mp_phl_txpower(padapter, &ptxpwr_arg, RTW_MP_TXPWR_CMD_SET_TSSI_OFFSET))
3624 return true;
3625 else
3626 return false;
3627 }
3628
rtw_mp_set_tssi_pwrtrk(_adapter * padapter,u8 tssi_state)3629 u8 rtw_mp_set_tssi_pwrtrk(_adapter *padapter, u8 tssi_state)
3630 {
3631 struct rtw_mp_txpwr_arg ptxpwr_arg;
3632
3633 _rtw_memset((void *)&ptxpwr_arg, 0, sizeof(struct rtw_mp_txpwr_arg));
3634
3635 ptxpwr_arg.txpwr_track_status = tssi_state;
3636
3637 if (rtw_mp_phl_txpower(padapter, &ptxpwr_arg, RTW_MP_TXPWR_CMD_SET_PWR_TRACK_STATUS))
3638 return true;
3639 else
3640 return false;
3641 }
3642
rtw_mp_get_tssi_pwrtrk(_adapter * padapter)3643 u8 rtw_mp_get_tssi_pwrtrk(_adapter *padapter)
3644 {
3645 struct rtw_mp_txpwr_arg ptxpwr_arg;
3646 u8 tssi_state = RTW_MP_TSSI_OFF;
3647
3648 _rtw_memset((void *)&ptxpwr_arg, 0, sizeof(struct rtw_mp_txpwr_arg));
3649
3650 if (rtw_mp_phl_txpower(padapter, &ptxpwr_arg, RTW_MP_TXPWR_CMD_GET_PWR_TRACK_STATUS)) {
3651 tssi_state = ptxpwr_arg.txpwr_track_status;
3652 RTW_INFO("%s, get tssi_state = %d\n", __func__, tssi_state);
3653 } else
3654 RTW_INFO("%s, rtw_mp_phl_txpower fail\n", __func__);
3655
3656 return tssi_state;
3657 }
3658
rtw_mp_set_tx_shape_idx(_adapter * padapter)3659 u8 rtw_mp_set_tx_shape_idx(_adapter *padapter)
3660 {
3661 struct rtw_mp_txpwr_arg ptxpwr_arg;
3662 struct mp_priv *pmppriv = &padapter->mppriv;
3663
3664 _rtw_memset((void *)&ptxpwr_arg, 0, sizeof(struct rtw_mp_txpwr_arg));
3665
3666 ptxpwr_arg.is_cck = rtw_mp_is_cck_rate(pmppriv->rateidx);
3667 ptxpwr_arg.channel = pmppriv->channel;
3668 ptxpwr_arg.sharp_id = pmppriv->tx_shape_idx;
3669 RTW_INFO("%s(), tx_shape id=%d\n", __func__, ptxpwr_arg.sharp_id);
3670
3671 if (rtw_mp_phl_txpower(padapter, &ptxpwr_arg, RTW_MP_TXPWR_CMD_SET_TX_POW_PATTERN_SHARP))
3672 return true;
3673 else
3674 return false;
3675 }
3676
3677 #endif
3678