1 /****************************************************************************** 2 * 3 * Copyright(c) 2016 - 2019 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 ******************************************************************************/ 15 16 #ifndef __INC_HALMAC_BIT_8821C_H 17 #define __INC_HALMAC_BIT_8821C_H 18 19 #define CPU_OPT_WIDTH 0x1F 20 21 /* 2 REG_NOT_VALID_8821C */ 22 23 /* 2 REG_SYS_ISO_CTRL_8821C */ 24 #define BIT_PWC_EV12V_8821C BIT(15) 25 #define BIT_PWC_EV25V_8821C BIT(14) 26 #define BIT_PA33V_EN_8821C BIT(13) 27 #define BIT_PA12V_EN_8821C BIT(12) 28 #define BIT_UA33V_EN_8821C BIT(11) 29 #define BIT_UA12V_EN_8821C BIT(10) 30 #define BIT_ISO_RFDIO_8821C BIT(9) 31 #define BIT_ISO_EB2CORE_8821C BIT(8) 32 #define BIT_ISO_DIOE_8821C BIT(7) 33 #define BIT_ISO_WLPON2PP_8821C BIT(6) 34 #define BIT_ISO_IP2MAC_WA2PP_8821C BIT(5) 35 #define BIT_ISO_PD2CORE_8821C BIT(4) 36 #define BIT_ISO_PA2PCIE_8821C BIT(3) 37 #define BIT_ISO_UD2CORE_8821C BIT(2) 38 #define BIT_ISO_UA2USB_8821C BIT(1) 39 #define BIT_ISO_WD2PP_8821C BIT(0) 40 41 /* 2 REG_SYS_FUNC_EN_8821C */ 42 #define BIT_FEN_MREGEN_8821C BIT(15) 43 #define BIT_FEN_HWPDN_8821C BIT(14) 44 #define BIT_EN_25_1_8821C BIT(13) 45 #define BIT_FEN_ELDR_8821C BIT(12) 46 #define BIT_FEN_DCORE_8821C BIT(11) 47 #define BIT_FEN_CPUEN_8821C BIT(10) 48 #define BIT_FEN_DIOE_8821C BIT(9) 49 #define BIT_FEN_PCIED_8821C BIT(8) 50 #define BIT_FEN_PPLL_8821C BIT(7) 51 #define BIT_FEN_PCIEA_8821C BIT(6) 52 #define BIT_FEN_DIO_PCIE_8821C BIT(5) 53 #define BIT_FEN_USBD_8821C BIT(4) 54 #define BIT_FEN_UPLL_8821C BIT(3) 55 #define BIT_FEN_USBA_8821C BIT(2) 56 #define BIT_FEN_BB_GLB_RSTN_8821C BIT(1) 57 #define BIT_FEN_BBRSTB_8821C BIT(0) 58 59 /* 2 REG_SYS_PW_CTRL_8821C */ 60 #define BIT_SOP_EABM_8821C BIT(31) 61 #define BIT_SOP_ACKF_8821C BIT(30) 62 #define BIT_SOP_ERCK_8821C BIT(29) 63 #define BIT_SOP_ESWR_8821C BIT(28) 64 #define BIT_SOP_PWMM_8821C BIT(27) 65 #define BIT_SOP_EECK_8821C BIT(26) 66 #define BIT_SOP_EXTL_8821C BIT(24) 67 #define BIT_SYM_OP_RING_12M_8821C BIT(22) 68 #define BIT_ROP_SWPR_8821C BIT(21) 69 #define BIT_DIS_HW_LPLDM_8821C BIT(20) 70 #define BIT_OPT_SWRST_WLMCU_8821C BIT(19) 71 #define BIT_RDY_SYSPWR_8821C BIT(17) 72 #define BIT_EN_WLON_8821C BIT(16) 73 #define BIT_APDM_HPDN_8821C BIT(15) 74 #define BIT_AFSM_PCIE_SUS_EN_8821C BIT(12) 75 #define BIT_AFSM_WLSUS_EN_8821C BIT(11) 76 #define BIT_APFM_SWLPS_8821C BIT(10) 77 #define BIT_APFM_OFFMAC_8821C BIT(9) 78 #define BIT_APFN_ONMAC_8821C BIT(8) 79 #define BIT_CHIP_PDN_EN_8821C BIT(7) 80 #define BIT_RDY_MACDIS_8821C BIT(6) 81 #define BIT_RING_CLK_12M_EN_8821C BIT(4) 82 #define BIT_PFM_WOWL_8821C BIT(3) 83 #define BIT_PFM_LDKP_8821C BIT(2) 84 #define BIT_WL_HCI_ALD_8821C BIT(1) 85 #define BIT_PFM_LDALL_8821C BIT(0) 86 87 /* 2 REG_SYS_CLK_CTRL_8821C */ 88 #define BIT_LDO_DUMMY_8821C BIT(15) 89 #define BIT_CPU_CLK_EN_8821C BIT(14) 90 #define BIT_SYMREG_CLK_EN_8821C BIT(13) 91 #define BIT_HCI_CLK_EN_8821C BIT(12) 92 #define BIT_MAC_CLK_EN_8821C BIT(11) 93 #define BIT_SEC_CLK_EN_8821C BIT(10) 94 #define BIT_PHY_SSC_RSTB_8821C BIT(9) 95 #define BIT_EXT_32K_EN_8821C BIT(8) 96 #define BIT_WL_CLK_TEST_8821C BIT(7) 97 #define BIT_OP_SPS_PWM_EN_8821C BIT(6) 98 #define BIT_LOADER_CLK_EN_8821C BIT(5) 99 #define BIT_MACSLP_8821C BIT(4) 100 #define BIT_WAKEPAD_EN_8821C BIT(3) 101 #define BIT_ROMD16V_EN_8821C BIT(2) 102 #define BIT_CKANA12M_EN_8821C BIT(1) 103 #define BIT_CNTD16V_EN_8821C BIT(0) 104 105 /* 2 REG_SYS_EEPROM_CTRL_8821C */ 106 107 #define BIT_SHIFT_VPDIDX_8821C 8 108 #define BIT_MASK_VPDIDX_8821C 0xff 109 #define BIT_VPDIDX_8821C(x) \ 110 (((x) & BIT_MASK_VPDIDX_8821C) << BIT_SHIFT_VPDIDX_8821C) 111 #define BITS_VPDIDX_8821C (BIT_MASK_VPDIDX_8821C << BIT_SHIFT_VPDIDX_8821C) 112 #define BIT_CLEAR_VPDIDX_8821C(x) ((x) & (~BITS_VPDIDX_8821C)) 113 #define BIT_GET_VPDIDX_8821C(x) \ 114 (((x) >> BIT_SHIFT_VPDIDX_8821C) & BIT_MASK_VPDIDX_8821C) 115 #define BIT_SET_VPDIDX_8821C(x, v) \ 116 (BIT_CLEAR_VPDIDX_8821C(x) | BIT_VPDIDX_8821C(v)) 117 118 #define BIT_SHIFT_EEM1_0_8821C 6 119 #define BIT_MASK_EEM1_0_8821C 0x3 120 #define BIT_EEM1_0_8821C(x) \ 121 (((x) & BIT_MASK_EEM1_0_8821C) << BIT_SHIFT_EEM1_0_8821C) 122 #define BITS_EEM1_0_8821C (BIT_MASK_EEM1_0_8821C << BIT_SHIFT_EEM1_0_8821C) 123 #define BIT_CLEAR_EEM1_0_8821C(x) ((x) & (~BITS_EEM1_0_8821C)) 124 #define BIT_GET_EEM1_0_8821C(x) \ 125 (((x) >> BIT_SHIFT_EEM1_0_8821C) & BIT_MASK_EEM1_0_8821C) 126 #define BIT_SET_EEM1_0_8821C(x, v) \ 127 (BIT_CLEAR_EEM1_0_8821C(x) | BIT_EEM1_0_8821C(v)) 128 129 #define BIT_AUTOLOAD_SUS_8821C BIT(5) 130 #define BIT_EERPOMSEL_8821C BIT(4) 131 #define BIT_EECS_V1_8821C BIT(3) 132 #define BIT_EESK_V1_8821C BIT(2) 133 #define BIT_EEDI_V1_8821C BIT(1) 134 #define BIT_EEDO_V1_8821C BIT(0) 135 136 /* 2 REG_EE_VPD_8821C */ 137 138 #define BIT_SHIFT_VPD_DATA_8821C 0 139 #define BIT_MASK_VPD_DATA_8821C 0xffffffffL 140 #define BIT_VPD_DATA_8821C(x) \ 141 (((x) & BIT_MASK_VPD_DATA_8821C) << BIT_SHIFT_VPD_DATA_8821C) 142 #define BITS_VPD_DATA_8821C \ 143 (BIT_MASK_VPD_DATA_8821C << BIT_SHIFT_VPD_DATA_8821C) 144 #define BIT_CLEAR_VPD_DATA_8821C(x) ((x) & (~BITS_VPD_DATA_8821C)) 145 #define BIT_GET_VPD_DATA_8821C(x) \ 146 (((x) >> BIT_SHIFT_VPD_DATA_8821C) & BIT_MASK_VPD_DATA_8821C) 147 #define BIT_SET_VPD_DATA_8821C(x, v) \ 148 (BIT_CLEAR_VPD_DATA_8821C(x) | BIT_VPD_DATA_8821C(v)) 149 150 /* 2 REG_SYS_SWR_CTRL1_8821C */ 151 #define BIT_C2_L_BIT0_8821C BIT(31) 152 153 #define BIT_SHIFT_C1_L_8821C 29 154 #define BIT_MASK_C1_L_8821C 0x3 155 #define BIT_C1_L_8821C(x) (((x) & BIT_MASK_C1_L_8821C) << BIT_SHIFT_C1_L_8821C) 156 #define BITS_C1_L_8821C (BIT_MASK_C1_L_8821C << BIT_SHIFT_C1_L_8821C) 157 #define BIT_CLEAR_C1_L_8821C(x) ((x) & (~BITS_C1_L_8821C)) 158 #define BIT_GET_C1_L_8821C(x) \ 159 (((x) >> BIT_SHIFT_C1_L_8821C) & BIT_MASK_C1_L_8821C) 160 #define BIT_SET_C1_L_8821C(x, v) (BIT_CLEAR_C1_L_8821C(x) | BIT_C1_L_8821C(v)) 161 162 #define BIT_SHIFT_REG_FREQ_L_8821C 25 163 #define BIT_MASK_REG_FREQ_L_8821C 0x7 164 #define BIT_REG_FREQ_L_8821C(x) \ 165 (((x) & BIT_MASK_REG_FREQ_L_8821C) << BIT_SHIFT_REG_FREQ_L_8821C) 166 #define BITS_REG_FREQ_L_8821C \ 167 (BIT_MASK_REG_FREQ_L_8821C << BIT_SHIFT_REG_FREQ_L_8821C) 168 #define BIT_CLEAR_REG_FREQ_L_8821C(x) ((x) & (~BITS_REG_FREQ_L_8821C)) 169 #define BIT_GET_REG_FREQ_L_8821C(x) \ 170 (((x) >> BIT_SHIFT_REG_FREQ_L_8821C) & BIT_MASK_REG_FREQ_L_8821C) 171 #define BIT_SET_REG_FREQ_L_8821C(x, v) \ 172 (BIT_CLEAR_REG_FREQ_L_8821C(x) | BIT_REG_FREQ_L_8821C(v)) 173 174 #define BIT_REG_EN_DUTY_8821C BIT(24) 175 176 #define BIT_SHIFT_REG_MODE_8821C 22 177 #define BIT_MASK_REG_MODE_8821C 0x3 178 #define BIT_REG_MODE_8821C(x) \ 179 (((x) & BIT_MASK_REG_MODE_8821C) << BIT_SHIFT_REG_MODE_8821C) 180 #define BITS_REG_MODE_8821C \ 181 (BIT_MASK_REG_MODE_8821C << BIT_SHIFT_REG_MODE_8821C) 182 #define BIT_CLEAR_REG_MODE_8821C(x) ((x) & (~BITS_REG_MODE_8821C)) 183 #define BIT_GET_REG_MODE_8821C(x) \ 184 (((x) >> BIT_SHIFT_REG_MODE_8821C) & BIT_MASK_REG_MODE_8821C) 185 #define BIT_SET_REG_MODE_8821C(x, v) \ 186 (BIT_CLEAR_REG_MODE_8821C(x) | BIT_REG_MODE_8821C(v)) 187 188 #define BIT_REG_EN_SP_8821C BIT(21) 189 #define BIT_REG_AUTO_L_8821C BIT(20) 190 #define BIT_SW18_SELD_BIT0_8821C BIT(19) 191 #define BIT_SW18_POWOCP_8821C BIT(18) 192 193 #define BIT_SHIFT_OCP_L1_8821C 15 194 #define BIT_MASK_OCP_L1_8821C 0x7 195 #define BIT_OCP_L1_8821C(x) \ 196 (((x) & BIT_MASK_OCP_L1_8821C) << BIT_SHIFT_OCP_L1_8821C) 197 #define BITS_OCP_L1_8821C (BIT_MASK_OCP_L1_8821C << BIT_SHIFT_OCP_L1_8821C) 198 #define BIT_CLEAR_OCP_L1_8821C(x) ((x) & (~BITS_OCP_L1_8821C)) 199 #define BIT_GET_OCP_L1_8821C(x) \ 200 (((x) >> BIT_SHIFT_OCP_L1_8821C) & BIT_MASK_OCP_L1_8821C) 201 #define BIT_SET_OCP_L1_8821C(x, v) \ 202 (BIT_CLEAR_OCP_L1_8821C(x) | BIT_OCP_L1_8821C(v)) 203 204 #define BIT_SHIFT_CF_L_8821C 13 205 #define BIT_MASK_CF_L_8821C 0x3 206 #define BIT_CF_L_8821C(x) (((x) & BIT_MASK_CF_L_8821C) << BIT_SHIFT_CF_L_8821C) 207 #define BITS_CF_L_8821C (BIT_MASK_CF_L_8821C << BIT_SHIFT_CF_L_8821C) 208 #define BIT_CLEAR_CF_L_8821C(x) ((x) & (~BITS_CF_L_8821C)) 209 #define BIT_GET_CF_L_8821C(x) \ 210 (((x) >> BIT_SHIFT_CF_L_8821C) & BIT_MASK_CF_L_8821C) 211 #define BIT_SET_CF_L_8821C(x, v) (BIT_CLEAR_CF_L_8821C(x) | BIT_CF_L_8821C(v)) 212 213 #define BIT_SW18_FPWM_8821C BIT(11) 214 #define BIT_SW18_SWEN_8821C BIT(9) 215 #define BIT_SW18_LDEN_8821C BIT(8) 216 #define BIT_MAC_ID_EN_8821C BIT(7) 217 #define BIT_AFE_BGEN_8821C BIT(0) 218 219 /* 2 REG_SYS_SWR_CTRL2_8821C */ 220 #define BIT_POW_ZCD_L_8821C BIT(31) 221 #define BIT_AUTOZCD_L_8821C BIT(30) 222 223 #define BIT_SHIFT_REG_DELAY_8821C 28 224 #define BIT_MASK_REG_DELAY_8821C 0x3 225 #define BIT_REG_DELAY_8821C(x) \ 226 (((x) & BIT_MASK_REG_DELAY_8821C) << BIT_SHIFT_REG_DELAY_8821C) 227 #define BITS_REG_DELAY_8821C \ 228 (BIT_MASK_REG_DELAY_8821C << BIT_SHIFT_REG_DELAY_8821C) 229 #define BIT_CLEAR_REG_DELAY_8821C(x) ((x) & (~BITS_REG_DELAY_8821C)) 230 #define BIT_GET_REG_DELAY_8821C(x) \ 231 (((x) >> BIT_SHIFT_REG_DELAY_8821C) & BIT_MASK_REG_DELAY_8821C) 232 #define BIT_SET_REG_DELAY_8821C(x, v) \ 233 (BIT_CLEAR_REG_DELAY_8821C(x) | BIT_REG_DELAY_8821C(v)) 234 235 #define BIT_SHIFT_V15ADJ_L1_V1_8821C 24 236 #define BIT_MASK_V15ADJ_L1_V1_8821C 0x7 237 #define BIT_V15ADJ_L1_V1_8821C(x) \ 238 (((x) & BIT_MASK_V15ADJ_L1_V1_8821C) << BIT_SHIFT_V15ADJ_L1_V1_8821C) 239 #define BITS_V15ADJ_L1_V1_8821C \ 240 (BIT_MASK_V15ADJ_L1_V1_8821C << BIT_SHIFT_V15ADJ_L1_V1_8821C) 241 #define BIT_CLEAR_V15ADJ_L1_V1_8821C(x) ((x) & (~BITS_V15ADJ_L1_V1_8821C)) 242 #define BIT_GET_V15ADJ_L1_V1_8821C(x) \ 243 (((x) >> BIT_SHIFT_V15ADJ_L1_V1_8821C) & BIT_MASK_V15ADJ_L1_V1_8821C) 244 #define BIT_SET_V15ADJ_L1_V1_8821C(x, v) \ 245 (BIT_CLEAR_V15ADJ_L1_V1_8821C(x) | BIT_V15ADJ_L1_V1_8821C(v)) 246 247 #define BIT_SHIFT_VOL_L1_V1_8821C 20 248 #define BIT_MASK_VOL_L1_V1_8821C 0xf 249 #define BIT_VOL_L1_V1_8821C(x) \ 250 (((x) & BIT_MASK_VOL_L1_V1_8821C) << BIT_SHIFT_VOL_L1_V1_8821C) 251 #define BITS_VOL_L1_V1_8821C \ 252 (BIT_MASK_VOL_L1_V1_8821C << BIT_SHIFT_VOL_L1_V1_8821C) 253 #define BIT_CLEAR_VOL_L1_V1_8821C(x) ((x) & (~BITS_VOL_L1_V1_8821C)) 254 #define BIT_GET_VOL_L1_V1_8821C(x) \ 255 (((x) >> BIT_SHIFT_VOL_L1_V1_8821C) & BIT_MASK_VOL_L1_V1_8821C) 256 #define BIT_SET_VOL_L1_V1_8821C(x, v) \ 257 (BIT_CLEAR_VOL_L1_V1_8821C(x) | BIT_VOL_L1_V1_8821C(v)) 258 259 #define BIT_SHIFT_IN_L1_V1_8821C 17 260 #define BIT_MASK_IN_L1_V1_8821C 0x7 261 #define BIT_IN_L1_V1_8821C(x) \ 262 (((x) & BIT_MASK_IN_L1_V1_8821C) << BIT_SHIFT_IN_L1_V1_8821C) 263 #define BITS_IN_L1_V1_8821C \ 264 (BIT_MASK_IN_L1_V1_8821C << BIT_SHIFT_IN_L1_V1_8821C) 265 #define BIT_CLEAR_IN_L1_V1_8821C(x) ((x) & (~BITS_IN_L1_V1_8821C)) 266 #define BIT_GET_IN_L1_V1_8821C(x) \ 267 (((x) >> BIT_SHIFT_IN_L1_V1_8821C) & BIT_MASK_IN_L1_V1_8821C) 268 #define BIT_SET_IN_L1_V1_8821C(x, v) \ 269 (BIT_CLEAR_IN_L1_V1_8821C(x) | BIT_IN_L1_V1_8821C(v)) 270 271 #define BIT_SHIFT_TBOX_L1_8821C 15 272 #define BIT_MASK_TBOX_L1_8821C 0x3 273 #define BIT_TBOX_L1_8821C(x) \ 274 (((x) & BIT_MASK_TBOX_L1_8821C) << BIT_SHIFT_TBOX_L1_8821C) 275 #define BITS_TBOX_L1_8821C (BIT_MASK_TBOX_L1_8821C << BIT_SHIFT_TBOX_L1_8821C) 276 #define BIT_CLEAR_TBOX_L1_8821C(x) ((x) & (~BITS_TBOX_L1_8821C)) 277 #define BIT_GET_TBOX_L1_8821C(x) \ 278 (((x) >> BIT_SHIFT_TBOX_L1_8821C) & BIT_MASK_TBOX_L1_8821C) 279 #define BIT_SET_TBOX_L1_8821C(x, v) \ 280 (BIT_CLEAR_TBOX_L1_8821C(x) | BIT_TBOX_L1_8821C(v)) 281 282 #define BIT_SW18_SEL_8821C BIT(13) 283 284 /* 2 REG_NOT_VALID_8821C */ 285 #define BIT_SW18_SD_8821C BIT(10) 286 287 #define BIT_SHIFT_R3_L_8821C 7 288 #define BIT_MASK_R3_L_8821C 0x3 289 #define BIT_R3_L_8821C(x) (((x) & BIT_MASK_R3_L_8821C) << BIT_SHIFT_R3_L_8821C) 290 #define BITS_R3_L_8821C (BIT_MASK_R3_L_8821C << BIT_SHIFT_R3_L_8821C) 291 #define BIT_CLEAR_R3_L_8821C(x) ((x) & (~BITS_R3_L_8821C)) 292 #define BIT_GET_R3_L_8821C(x) \ 293 (((x) >> BIT_SHIFT_R3_L_8821C) & BIT_MASK_R3_L_8821C) 294 #define BIT_SET_R3_L_8821C(x, v) (BIT_CLEAR_R3_L_8821C(x) | BIT_R3_L_8821C(v)) 295 296 #define BIT_SHIFT_SW18_R2_8821C 5 297 #define BIT_MASK_SW18_R2_8821C 0x3 298 #define BIT_SW18_R2_8821C(x) \ 299 (((x) & BIT_MASK_SW18_R2_8821C) << BIT_SHIFT_SW18_R2_8821C) 300 #define BITS_SW18_R2_8821C (BIT_MASK_SW18_R2_8821C << BIT_SHIFT_SW18_R2_8821C) 301 #define BIT_CLEAR_SW18_R2_8821C(x) ((x) & (~BITS_SW18_R2_8821C)) 302 #define BIT_GET_SW18_R2_8821C(x) \ 303 (((x) >> BIT_SHIFT_SW18_R2_8821C) & BIT_MASK_SW18_R2_8821C) 304 #define BIT_SET_SW18_R2_8821C(x, v) \ 305 (BIT_CLEAR_SW18_R2_8821C(x) | BIT_SW18_R2_8821C(v)) 306 307 #define BIT_SHIFT_SW18_R1_8821C 3 308 #define BIT_MASK_SW18_R1_8821C 0x3 309 #define BIT_SW18_R1_8821C(x) \ 310 (((x) & BIT_MASK_SW18_R1_8821C) << BIT_SHIFT_SW18_R1_8821C) 311 #define BITS_SW18_R1_8821C (BIT_MASK_SW18_R1_8821C << BIT_SHIFT_SW18_R1_8821C) 312 #define BIT_CLEAR_SW18_R1_8821C(x) ((x) & (~BITS_SW18_R1_8821C)) 313 #define BIT_GET_SW18_R1_8821C(x) \ 314 (((x) >> BIT_SHIFT_SW18_R1_8821C) & BIT_MASK_SW18_R1_8821C) 315 #define BIT_SET_SW18_R1_8821C(x, v) \ 316 (BIT_CLEAR_SW18_R1_8821C(x) | BIT_SW18_R1_8821C(v)) 317 318 #define BIT_SHIFT_C3_L_C3_8821C 1 319 #define BIT_MASK_C3_L_C3_8821C 0x3 320 #define BIT_C3_L_C3_8821C(x) \ 321 (((x) & BIT_MASK_C3_L_C3_8821C) << BIT_SHIFT_C3_L_C3_8821C) 322 #define BITS_C3_L_C3_8821C (BIT_MASK_C3_L_C3_8821C << BIT_SHIFT_C3_L_C3_8821C) 323 #define BIT_CLEAR_C3_L_C3_8821C(x) ((x) & (~BITS_C3_L_C3_8821C)) 324 #define BIT_GET_C3_L_C3_8821C(x) \ 325 (((x) >> BIT_SHIFT_C3_L_C3_8821C) & BIT_MASK_C3_L_C3_8821C) 326 #define BIT_SET_C3_L_C3_8821C(x, v) \ 327 (BIT_CLEAR_C3_L_C3_8821C(x) | BIT_C3_L_C3_8821C(v)) 328 329 #define BIT_C2_L_BIT1_8821C BIT(0) 330 331 /* 2 REG_SYS_SWR_CTRL3_8821C */ 332 #define BIT_SPS18_OCP_DIS_8821C BIT(31) 333 334 #define BIT_SHIFT_SPS18_OCP_TH_8821C 16 335 #define BIT_MASK_SPS18_OCP_TH_8821C 0x7fff 336 #define BIT_SPS18_OCP_TH_8821C(x) \ 337 (((x) & BIT_MASK_SPS18_OCP_TH_8821C) << BIT_SHIFT_SPS18_OCP_TH_8821C) 338 #define BITS_SPS18_OCP_TH_8821C \ 339 (BIT_MASK_SPS18_OCP_TH_8821C << BIT_SHIFT_SPS18_OCP_TH_8821C) 340 #define BIT_CLEAR_SPS18_OCP_TH_8821C(x) ((x) & (~BITS_SPS18_OCP_TH_8821C)) 341 #define BIT_GET_SPS18_OCP_TH_8821C(x) \ 342 (((x) >> BIT_SHIFT_SPS18_OCP_TH_8821C) & BIT_MASK_SPS18_OCP_TH_8821C) 343 #define BIT_SET_SPS18_OCP_TH_8821C(x, v) \ 344 (BIT_CLEAR_SPS18_OCP_TH_8821C(x) | BIT_SPS18_OCP_TH_8821C(v)) 345 346 #define BIT_SHIFT_OCP_WINDOW_8821C 0 347 #define BIT_MASK_OCP_WINDOW_8821C 0xffff 348 #define BIT_OCP_WINDOW_8821C(x) \ 349 (((x) & BIT_MASK_OCP_WINDOW_8821C) << BIT_SHIFT_OCP_WINDOW_8821C) 350 #define BITS_OCP_WINDOW_8821C \ 351 (BIT_MASK_OCP_WINDOW_8821C << BIT_SHIFT_OCP_WINDOW_8821C) 352 #define BIT_CLEAR_OCP_WINDOW_8821C(x) ((x) & (~BITS_OCP_WINDOW_8821C)) 353 #define BIT_GET_OCP_WINDOW_8821C(x) \ 354 (((x) >> BIT_SHIFT_OCP_WINDOW_8821C) & BIT_MASK_OCP_WINDOW_8821C) 355 #define BIT_SET_OCP_WINDOW_8821C(x, v) \ 356 (BIT_CLEAR_OCP_WINDOW_8821C(x) | BIT_OCP_WINDOW_8821C(v)) 357 358 /* 2 REG_RSV_CTRL_8821C */ 359 #define BIT_HREG_DBG_8821C BIT(23) 360 #define BIT_WLMCUIOIF_8821C BIT(8) 361 #define BIT_LOCK_ALL_EN_8821C BIT(7) 362 #define BIT_R_DIS_PRST_8821C BIT(6) 363 #define BIT_WLOCK_1C_B6_8821C BIT(5) 364 #define BIT_WLOCK_40_8821C BIT(4) 365 #define BIT_WLOCK_08_8821C BIT(3) 366 #define BIT_WLOCK_04_8821C BIT(2) 367 #define BIT_WLOCK_00_8821C BIT(1) 368 #define BIT_WLOCK_ALL_8821C BIT(0) 369 370 /* 2 REG_RF_CTRL_8821C */ 371 #define BIT_RF_SDMRSTB_8821C BIT(2) 372 #define BIT_RF_RSTB_8821C BIT(1) 373 #define BIT_RF_EN_8821C BIT(0) 374 375 /* 2 REG_AFE_LDO_CTRL_8821C */ 376 377 #define BIT_SHIFT_LPLDH12_RSV_8821C 29 378 #define BIT_MASK_LPLDH12_RSV_8821C 0x7 379 #define BIT_LPLDH12_RSV_8821C(x) \ 380 (((x) & BIT_MASK_LPLDH12_RSV_8821C) << BIT_SHIFT_LPLDH12_RSV_8821C) 381 #define BITS_LPLDH12_RSV_8821C \ 382 (BIT_MASK_LPLDH12_RSV_8821C << BIT_SHIFT_LPLDH12_RSV_8821C) 383 #define BIT_CLEAR_LPLDH12_RSV_8821C(x) ((x) & (~BITS_LPLDH12_RSV_8821C)) 384 #define BIT_GET_LPLDH12_RSV_8821C(x) \ 385 (((x) >> BIT_SHIFT_LPLDH12_RSV_8821C) & BIT_MASK_LPLDH12_RSV_8821C) 386 #define BIT_SET_LPLDH12_RSV_8821C(x, v) \ 387 (BIT_CLEAR_LPLDH12_RSV_8821C(x) | BIT_LPLDH12_RSV_8821C(v)) 388 389 #define BIT_LPLDH12_SLP_8821C BIT(28) 390 391 #define BIT_SHIFT_LPLDH12_VADJ_8821C 24 392 #define BIT_MASK_LPLDH12_VADJ_8821C 0xf 393 #define BIT_LPLDH12_VADJ_8821C(x) \ 394 (((x) & BIT_MASK_LPLDH12_VADJ_8821C) << BIT_SHIFT_LPLDH12_VADJ_8821C) 395 #define BITS_LPLDH12_VADJ_8821C \ 396 (BIT_MASK_LPLDH12_VADJ_8821C << BIT_SHIFT_LPLDH12_VADJ_8821C) 397 #define BIT_CLEAR_LPLDH12_VADJ_8821C(x) ((x) & (~BITS_LPLDH12_VADJ_8821C)) 398 #define BIT_GET_LPLDH12_VADJ_8821C(x) \ 399 (((x) >> BIT_SHIFT_LPLDH12_VADJ_8821C) & BIT_MASK_LPLDH12_VADJ_8821C) 400 #define BIT_SET_LPLDH12_VADJ_8821C(x, v) \ 401 (BIT_CLEAR_LPLDH12_VADJ_8821C(x) | BIT_LPLDH12_VADJ_8821C(v)) 402 403 #define BIT_PCIE_CALIB_EN_8821C BIT(17) 404 #define BIT_LDH12_EN_8821C BIT(16) 405 #define BIT_WLBBOFF_BIG_PWC_EN_8821C BIT(14) 406 #define BIT_WLBBOFF_SMALL_PWC_EN_8821C BIT(13) 407 #define BIT_WLMACOFF_BIG_PWC_EN_8821C BIT(12) 408 #define BIT_WLPON_PWC_EN_8821C BIT(11) 409 #define BIT_POW_REGU_P1_8821C BIT(10) 410 #define BIT_LDOV12W_EN_8821C BIT(8) 411 #define BIT_EX_XTAL_DRV_DIGI_8821C BIT(7) 412 #define BIT_EX_XTAL_DRV_USB_8821C BIT(6) 413 #define BIT_EX_XTAL_DRV_AFE_8821C BIT(5) 414 #define BIT_EX_XTAL_DRV_RF2_8821C BIT(4) 415 #define BIT_EX_XTAL_DRV_RF1_8821C BIT(3) 416 #define BIT_POW_REGU_P0_8821C BIT(2) 417 418 /* 2 REG_NOT_VALID_8821C */ 419 #define BIT_POW_PLL_LDO_8821C BIT(0) 420 421 /* 2 REG_AFE_CTRL1_8821C */ 422 #define BIT_AGPIO_GPE_8821C BIT(31) 423 424 #define BIT_SHIFT_XTAL_CAP_XI_8821C 25 425 #define BIT_MASK_XTAL_CAP_XI_8821C 0x3f 426 #define BIT_XTAL_CAP_XI_8821C(x) \ 427 (((x) & BIT_MASK_XTAL_CAP_XI_8821C) << BIT_SHIFT_XTAL_CAP_XI_8821C) 428 #define BITS_XTAL_CAP_XI_8821C \ 429 (BIT_MASK_XTAL_CAP_XI_8821C << BIT_SHIFT_XTAL_CAP_XI_8821C) 430 #define BIT_CLEAR_XTAL_CAP_XI_8821C(x) ((x) & (~BITS_XTAL_CAP_XI_8821C)) 431 #define BIT_GET_XTAL_CAP_XI_8821C(x) \ 432 (((x) >> BIT_SHIFT_XTAL_CAP_XI_8821C) & BIT_MASK_XTAL_CAP_XI_8821C) 433 #define BIT_SET_XTAL_CAP_XI_8821C(x, v) \ 434 (BIT_CLEAR_XTAL_CAP_XI_8821C(x) | BIT_XTAL_CAP_XI_8821C(v)) 435 436 #define BIT_SHIFT_XTAL_DRV_DIGI_8821C 23 437 #define BIT_MASK_XTAL_DRV_DIGI_8821C 0x3 438 #define BIT_XTAL_DRV_DIGI_8821C(x) \ 439 (((x) & BIT_MASK_XTAL_DRV_DIGI_8821C) << BIT_SHIFT_XTAL_DRV_DIGI_8821C) 440 #define BITS_XTAL_DRV_DIGI_8821C \ 441 (BIT_MASK_XTAL_DRV_DIGI_8821C << BIT_SHIFT_XTAL_DRV_DIGI_8821C) 442 #define BIT_CLEAR_XTAL_DRV_DIGI_8821C(x) ((x) & (~BITS_XTAL_DRV_DIGI_8821C)) 443 #define BIT_GET_XTAL_DRV_DIGI_8821C(x) \ 444 (((x) >> BIT_SHIFT_XTAL_DRV_DIGI_8821C) & BIT_MASK_XTAL_DRV_DIGI_8821C) 445 #define BIT_SET_XTAL_DRV_DIGI_8821C(x, v) \ 446 (BIT_CLEAR_XTAL_DRV_DIGI_8821C(x) | BIT_XTAL_DRV_DIGI_8821C(v)) 447 448 #define BIT_XTAL_DRV_USB_BIT1_8821C BIT(22) 449 450 #define BIT_SHIFT_MAC_CLK_SEL_8821C 20 451 #define BIT_MASK_MAC_CLK_SEL_8821C 0x3 452 #define BIT_MAC_CLK_SEL_8821C(x) \ 453 (((x) & BIT_MASK_MAC_CLK_SEL_8821C) << BIT_SHIFT_MAC_CLK_SEL_8821C) 454 #define BITS_MAC_CLK_SEL_8821C \ 455 (BIT_MASK_MAC_CLK_SEL_8821C << BIT_SHIFT_MAC_CLK_SEL_8821C) 456 #define BIT_CLEAR_MAC_CLK_SEL_8821C(x) ((x) & (~BITS_MAC_CLK_SEL_8821C)) 457 #define BIT_GET_MAC_CLK_SEL_8821C(x) \ 458 (((x) >> BIT_SHIFT_MAC_CLK_SEL_8821C) & BIT_MASK_MAC_CLK_SEL_8821C) 459 #define BIT_SET_MAC_CLK_SEL_8821C(x, v) \ 460 (BIT_CLEAR_MAC_CLK_SEL_8821C(x) | BIT_MAC_CLK_SEL_8821C(v)) 461 462 #define BIT_XTAL_DRV_USB_BIT0_8821C BIT(19) 463 464 #define BIT_SHIFT_XTAL_DRV_AFE_8821C 17 465 #define BIT_MASK_XTAL_DRV_AFE_8821C 0x3 466 #define BIT_XTAL_DRV_AFE_8821C(x) \ 467 (((x) & BIT_MASK_XTAL_DRV_AFE_8821C) << BIT_SHIFT_XTAL_DRV_AFE_8821C) 468 #define BITS_XTAL_DRV_AFE_8821C \ 469 (BIT_MASK_XTAL_DRV_AFE_8821C << BIT_SHIFT_XTAL_DRV_AFE_8821C) 470 #define BIT_CLEAR_XTAL_DRV_AFE_8821C(x) ((x) & (~BITS_XTAL_DRV_AFE_8821C)) 471 #define BIT_GET_XTAL_DRV_AFE_8821C(x) \ 472 (((x) >> BIT_SHIFT_XTAL_DRV_AFE_8821C) & BIT_MASK_XTAL_DRV_AFE_8821C) 473 #define BIT_SET_XTAL_DRV_AFE_8821C(x, v) \ 474 (BIT_CLEAR_XTAL_DRV_AFE_8821C(x) | BIT_XTAL_DRV_AFE_8821C(v)) 475 476 #define BIT_SHIFT_XTAL_DRV_RF2_8821C 15 477 #define BIT_MASK_XTAL_DRV_RF2_8821C 0x3 478 #define BIT_XTAL_DRV_RF2_8821C(x) \ 479 (((x) & BIT_MASK_XTAL_DRV_RF2_8821C) << BIT_SHIFT_XTAL_DRV_RF2_8821C) 480 #define BITS_XTAL_DRV_RF2_8821C \ 481 (BIT_MASK_XTAL_DRV_RF2_8821C << BIT_SHIFT_XTAL_DRV_RF2_8821C) 482 #define BIT_CLEAR_XTAL_DRV_RF2_8821C(x) ((x) & (~BITS_XTAL_DRV_RF2_8821C)) 483 #define BIT_GET_XTAL_DRV_RF2_8821C(x) \ 484 (((x) >> BIT_SHIFT_XTAL_DRV_RF2_8821C) & BIT_MASK_XTAL_DRV_RF2_8821C) 485 #define BIT_SET_XTAL_DRV_RF2_8821C(x, v) \ 486 (BIT_CLEAR_XTAL_DRV_RF2_8821C(x) | BIT_XTAL_DRV_RF2_8821C(v)) 487 488 #define BIT_SHIFT_XTAL_DRV_RF1_8821C 13 489 #define BIT_MASK_XTAL_DRV_RF1_8821C 0x3 490 #define BIT_XTAL_DRV_RF1_8821C(x) \ 491 (((x) & BIT_MASK_XTAL_DRV_RF1_8821C) << BIT_SHIFT_XTAL_DRV_RF1_8821C) 492 #define BITS_XTAL_DRV_RF1_8821C \ 493 (BIT_MASK_XTAL_DRV_RF1_8821C << BIT_SHIFT_XTAL_DRV_RF1_8821C) 494 #define BIT_CLEAR_XTAL_DRV_RF1_8821C(x) ((x) & (~BITS_XTAL_DRV_RF1_8821C)) 495 #define BIT_GET_XTAL_DRV_RF1_8821C(x) \ 496 (((x) >> BIT_SHIFT_XTAL_DRV_RF1_8821C) & BIT_MASK_XTAL_DRV_RF1_8821C) 497 #define BIT_SET_XTAL_DRV_RF1_8821C(x, v) \ 498 (BIT_CLEAR_XTAL_DRV_RF1_8821C(x) | BIT_XTAL_DRV_RF1_8821C(v)) 499 500 #define BIT_XTAL_DELAY_DIGI_8821C BIT(12) 501 #define BIT_XTAL_DELAY_USB_8821C BIT(11) 502 #define BIT_XTAL_DELAY_AFE_8821C BIT(10) 503 504 #define BIT_SHIFT_XTAL_LDO_VREF_8821C 7 505 #define BIT_MASK_XTAL_LDO_VREF_8821C 0x7 506 #define BIT_XTAL_LDO_VREF_8821C(x) \ 507 (((x) & BIT_MASK_XTAL_LDO_VREF_8821C) << BIT_SHIFT_XTAL_LDO_VREF_8821C) 508 #define BITS_XTAL_LDO_VREF_8821C \ 509 (BIT_MASK_XTAL_LDO_VREF_8821C << BIT_SHIFT_XTAL_LDO_VREF_8821C) 510 #define BIT_CLEAR_XTAL_LDO_VREF_8821C(x) ((x) & (~BITS_XTAL_LDO_VREF_8821C)) 511 #define BIT_GET_XTAL_LDO_VREF_8821C(x) \ 512 (((x) >> BIT_SHIFT_XTAL_LDO_VREF_8821C) & BIT_MASK_XTAL_LDO_VREF_8821C) 513 #define BIT_SET_XTAL_LDO_VREF_8821C(x, v) \ 514 (BIT_CLEAR_XTAL_LDO_VREF_8821C(x) | BIT_XTAL_LDO_VREF_8821C(v)) 515 516 #define BIT_XTAL_XQSEL_RF_8821C BIT(6) 517 #define BIT_XTAL_XQSEL_8821C BIT(5) 518 519 #define BIT_SHIFT_XTAL_GMN_V2_8821C 3 520 #define BIT_MASK_XTAL_GMN_V2_8821C 0x3 521 #define BIT_XTAL_GMN_V2_8821C(x) \ 522 (((x) & BIT_MASK_XTAL_GMN_V2_8821C) << BIT_SHIFT_XTAL_GMN_V2_8821C) 523 #define BITS_XTAL_GMN_V2_8821C \ 524 (BIT_MASK_XTAL_GMN_V2_8821C << BIT_SHIFT_XTAL_GMN_V2_8821C) 525 #define BIT_CLEAR_XTAL_GMN_V2_8821C(x) ((x) & (~BITS_XTAL_GMN_V2_8821C)) 526 #define BIT_GET_XTAL_GMN_V2_8821C(x) \ 527 (((x) >> BIT_SHIFT_XTAL_GMN_V2_8821C) & BIT_MASK_XTAL_GMN_V2_8821C) 528 #define BIT_SET_XTAL_GMN_V2_8821C(x, v) \ 529 (BIT_CLEAR_XTAL_GMN_V2_8821C(x) | BIT_XTAL_GMN_V2_8821C(v)) 530 531 #define BIT_SHIFT_XTAL_GMP_V2_8821C 1 532 #define BIT_MASK_XTAL_GMP_V2_8821C 0x3 533 #define BIT_XTAL_GMP_V2_8821C(x) \ 534 (((x) & BIT_MASK_XTAL_GMP_V2_8821C) << BIT_SHIFT_XTAL_GMP_V2_8821C) 535 #define BITS_XTAL_GMP_V2_8821C \ 536 (BIT_MASK_XTAL_GMP_V2_8821C << BIT_SHIFT_XTAL_GMP_V2_8821C) 537 #define BIT_CLEAR_XTAL_GMP_V2_8821C(x) ((x) & (~BITS_XTAL_GMP_V2_8821C)) 538 #define BIT_GET_XTAL_GMP_V2_8821C(x) \ 539 (((x) >> BIT_SHIFT_XTAL_GMP_V2_8821C) & BIT_MASK_XTAL_GMP_V2_8821C) 540 #define BIT_SET_XTAL_GMP_V2_8821C(x, v) \ 541 (BIT_CLEAR_XTAL_GMP_V2_8821C(x) | BIT_XTAL_GMP_V2_8821C(v)) 542 543 #define BIT_XTAL_EN_8821C BIT(0) 544 545 /* 2 REG_AFE_CTRL2_8821C */ 546 547 #define BIT_SHIFT_REG_C3_V4_8821C 30 548 #define BIT_MASK_REG_C3_V4_8821C 0x3 549 #define BIT_REG_C3_V4_8821C(x) \ 550 (((x) & BIT_MASK_REG_C3_V4_8821C) << BIT_SHIFT_REG_C3_V4_8821C) 551 #define BITS_REG_C3_V4_8821C \ 552 (BIT_MASK_REG_C3_V4_8821C << BIT_SHIFT_REG_C3_V4_8821C) 553 #define BIT_CLEAR_REG_C3_V4_8821C(x) ((x) & (~BITS_REG_C3_V4_8821C)) 554 #define BIT_GET_REG_C3_V4_8821C(x) \ 555 (((x) >> BIT_SHIFT_REG_C3_V4_8821C) & BIT_MASK_REG_C3_V4_8821C) 556 #define BIT_SET_REG_C3_V4_8821C(x, v) \ 557 (BIT_CLEAR_REG_C3_V4_8821C(x) | BIT_REG_C3_V4_8821C(v)) 558 559 #define BIT_REG_CP_BIT1_8821C BIT(29) 560 561 #define BIT_SHIFT_REG_RS_V4_8821C 26 562 #define BIT_MASK_REG_RS_V4_8821C 0x7 563 #define BIT_REG_RS_V4_8821C(x) \ 564 (((x) & BIT_MASK_REG_RS_V4_8821C) << BIT_SHIFT_REG_RS_V4_8821C) 565 #define BITS_REG_RS_V4_8821C \ 566 (BIT_MASK_REG_RS_V4_8821C << BIT_SHIFT_REG_RS_V4_8821C) 567 #define BIT_CLEAR_REG_RS_V4_8821C(x) ((x) & (~BITS_REG_RS_V4_8821C)) 568 #define BIT_GET_REG_RS_V4_8821C(x) \ 569 (((x) >> BIT_SHIFT_REG_RS_V4_8821C) & BIT_MASK_REG_RS_V4_8821C) 570 #define BIT_SET_REG_RS_V4_8821C(x, v) \ 571 (BIT_CLEAR_REG_RS_V4_8821C(x) | BIT_REG_RS_V4_8821C(v)) 572 573 #define BIT_SHIFT_REG__CS_8821C 24 574 #define BIT_MASK_REG__CS_8821C 0x3 575 #define BIT_REG__CS_8821C(x) \ 576 (((x) & BIT_MASK_REG__CS_8821C) << BIT_SHIFT_REG__CS_8821C) 577 #define BITS_REG__CS_8821C (BIT_MASK_REG__CS_8821C << BIT_SHIFT_REG__CS_8821C) 578 #define BIT_CLEAR_REG__CS_8821C(x) ((x) & (~BITS_REG__CS_8821C)) 579 #define BIT_GET_REG__CS_8821C(x) \ 580 (((x) >> BIT_SHIFT_REG__CS_8821C) & BIT_MASK_REG__CS_8821C) 581 #define BIT_SET_REG__CS_8821C(x, v) \ 582 (BIT_CLEAR_REG__CS_8821C(x) | BIT_REG__CS_8821C(v)) 583 584 #define BIT_SHIFT_REG_CP_OFFSET_8821C 21 585 #define BIT_MASK_REG_CP_OFFSET_8821C 0x7 586 #define BIT_REG_CP_OFFSET_8821C(x) \ 587 (((x) & BIT_MASK_REG_CP_OFFSET_8821C) << BIT_SHIFT_REG_CP_OFFSET_8821C) 588 #define BITS_REG_CP_OFFSET_8821C \ 589 (BIT_MASK_REG_CP_OFFSET_8821C << BIT_SHIFT_REG_CP_OFFSET_8821C) 590 #define BIT_CLEAR_REG_CP_OFFSET_8821C(x) ((x) & (~BITS_REG_CP_OFFSET_8821C)) 591 #define BIT_GET_REG_CP_OFFSET_8821C(x) \ 592 (((x) >> BIT_SHIFT_REG_CP_OFFSET_8821C) & BIT_MASK_REG_CP_OFFSET_8821C) 593 #define BIT_SET_REG_CP_OFFSET_8821C(x, v) \ 594 (BIT_CLEAR_REG_CP_OFFSET_8821C(x) | BIT_REG_CP_OFFSET_8821C(v)) 595 596 #define BIT_SHIFT_CP_BIAS_8821C 18 597 #define BIT_MASK_CP_BIAS_8821C 0x7 598 #define BIT_CP_BIAS_8821C(x) \ 599 (((x) & BIT_MASK_CP_BIAS_8821C) << BIT_SHIFT_CP_BIAS_8821C) 600 #define BITS_CP_BIAS_8821C (BIT_MASK_CP_BIAS_8821C << BIT_SHIFT_CP_BIAS_8821C) 601 #define BIT_CLEAR_CP_BIAS_8821C(x) ((x) & (~BITS_CP_BIAS_8821C)) 602 #define BIT_GET_CP_BIAS_8821C(x) \ 603 (((x) >> BIT_SHIFT_CP_BIAS_8821C) & BIT_MASK_CP_BIAS_8821C) 604 #define BIT_SET_CP_BIAS_8821C(x, v) \ 605 (BIT_CLEAR_CP_BIAS_8821C(x) | BIT_CP_BIAS_8821C(v)) 606 607 #define BIT_REG_IDOUBLE_V2_8821C BIT(17) 608 #define BIT_EN_SYN_8821C BIT(16) 609 610 #define BIT_SHIFT_MCCO_8821C 14 611 #define BIT_MASK_MCCO_8821C 0x3 612 #define BIT_MCCO_8821C(x) (((x) & BIT_MASK_MCCO_8821C) << BIT_SHIFT_MCCO_8821C) 613 #define BITS_MCCO_8821C (BIT_MASK_MCCO_8821C << BIT_SHIFT_MCCO_8821C) 614 #define BIT_CLEAR_MCCO_8821C(x) ((x) & (~BITS_MCCO_8821C)) 615 #define BIT_GET_MCCO_8821C(x) \ 616 (((x) >> BIT_SHIFT_MCCO_8821C) & BIT_MASK_MCCO_8821C) 617 #define BIT_SET_MCCO_8821C(x, v) (BIT_CLEAR_MCCO_8821C(x) | BIT_MCCO_8821C(v)) 618 619 #define BIT_SHIFT_REG_LDO_SEL_8821C 12 620 #define BIT_MASK_REG_LDO_SEL_8821C 0x3 621 #define BIT_REG_LDO_SEL_8821C(x) \ 622 (((x) & BIT_MASK_REG_LDO_SEL_8821C) << BIT_SHIFT_REG_LDO_SEL_8821C) 623 #define BITS_REG_LDO_SEL_8821C \ 624 (BIT_MASK_REG_LDO_SEL_8821C << BIT_SHIFT_REG_LDO_SEL_8821C) 625 #define BIT_CLEAR_REG_LDO_SEL_8821C(x) ((x) & (~BITS_REG_LDO_SEL_8821C)) 626 #define BIT_GET_REG_LDO_SEL_8821C(x) \ 627 (((x) >> BIT_SHIFT_REG_LDO_SEL_8821C) & BIT_MASK_REG_LDO_SEL_8821C) 628 #define BIT_SET_REG_LDO_SEL_8821C(x, v) \ 629 (BIT_CLEAR_REG_LDO_SEL_8821C(x) | BIT_REG_LDO_SEL_8821C(v)) 630 631 #define BIT_REG_KVCO_V2_8821C BIT(10) 632 #define BIT_AGPIO_GPO_8821C BIT(9) 633 634 #define BIT_SHIFT_AGPIO_DRV_8821C 7 635 #define BIT_MASK_AGPIO_DRV_8821C 0x3 636 #define BIT_AGPIO_DRV_8821C(x) \ 637 (((x) & BIT_MASK_AGPIO_DRV_8821C) << BIT_SHIFT_AGPIO_DRV_8821C) 638 #define BITS_AGPIO_DRV_8821C \ 639 (BIT_MASK_AGPIO_DRV_8821C << BIT_SHIFT_AGPIO_DRV_8821C) 640 #define BIT_CLEAR_AGPIO_DRV_8821C(x) ((x) & (~BITS_AGPIO_DRV_8821C)) 641 #define BIT_GET_AGPIO_DRV_8821C(x) \ 642 (((x) >> BIT_SHIFT_AGPIO_DRV_8821C) & BIT_MASK_AGPIO_DRV_8821C) 643 #define BIT_SET_AGPIO_DRV_8821C(x, v) \ 644 (BIT_CLEAR_AGPIO_DRV_8821C(x) | BIT_AGPIO_DRV_8821C(v)) 645 646 #define BIT_SHIFT_XTAL_CAP_XO_8821C 1 647 #define BIT_MASK_XTAL_CAP_XO_8821C 0x3f 648 #define BIT_XTAL_CAP_XO_8821C(x) \ 649 (((x) & BIT_MASK_XTAL_CAP_XO_8821C) << BIT_SHIFT_XTAL_CAP_XO_8821C) 650 #define BITS_XTAL_CAP_XO_8821C \ 651 (BIT_MASK_XTAL_CAP_XO_8821C << BIT_SHIFT_XTAL_CAP_XO_8821C) 652 #define BIT_CLEAR_XTAL_CAP_XO_8821C(x) ((x) & (~BITS_XTAL_CAP_XO_8821C)) 653 #define BIT_GET_XTAL_CAP_XO_8821C(x) \ 654 (((x) >> BIT_SHIFT_XTAL_CAP_XO_8821C) & BIT_MASK_XTAL_CAP_XO_8821C) 655 #define BIT_SET_XTAL_CAP_XO_8821C(x, v) \ 656 (BIT_CLEAR_XTAL_CAP_XO_8821C(x) | BIT_XTAL_CAP_XO_8821C(v)) 657 658 #define BIT_POW_PLL_8821C BIT(0) 659 660 /* 2 REG_AFE_CTRL3_8821C */ 661 662 #define BIT_SHIFT_PS_8821C 7 663 #define BIT_MASK_PS_8821C 0x7 664 #define BIT_PS_8821C(x) (((x) & BIT_MASK_PS_8821C) << BIT_SHIFT_PS_8821C) 665 #define BITS_PS_8821C (BIT_MASK_PS_8821C << BIT_SHIFT_PS_8821C) 666 #define BIT_CLEAR_PS_8821C(x) ((x) & (~BITS_PS_8821C)) 667 #define BIT_GET_PS_8821C(x) (((x) >> BIT_SHIFT_PS_8821C) & BIT_MASK_PS_8821C) 668 #define BIT_SET_PS_8821C(x, v) (BIT_CLEAR_PS_8821C(x) | BIT_PS_8821C(v)) 669 670 #define BIT_PSEN_8821C BIT(6) 671 #define BIT_DOGENB_8821C BIT(5) 672 #define BIT_REG_MBIAS_8821C BIT(4) 673 674 #define BIT_SHIFT_REG_R3_V4_8821C 1 675 #define BIT_MASK_REG_R3_V4_8821C 0x7 676 #define BIT_REG_R3_V4_8821C(x) \ 677 (((x) & BIT_MASK_REG_R3_V4_8821C) << BIT_SHIFT_REG_R3_V4_8821C) 678 #define BITS_REG_R3_V4_8821C \ 679 (BIT_MASK_REG_R3_V4_8821C << BIT_SHIFT_REG_R3_V4_8821C) 680 #define BIT_CLEAR_REG_R3_V4_8821C(x) ((x) & (~BITS_REG_R3_V4_8821C)) 681 #define BIT_GET_REG_R3_V4_8821C(x) \ 682 (((x) >> BIT_SHIFT_REG_R3_V4_8821C) & BIT_MASK_REG_R3_V4_8821C) 683 #define BIT_SET_REG_R3_V4_8821C(x, v) \ 684 (BIT_CLEAR_REG_R3_V4_8821C(x) | BIT_REG_R3_V4_8821C(v)) 685 686 #define BIT_REG_CP_BIT0_8821C BIT(0) 687 688 /* 2 REG_EFUSE_CTRL_8821C */ 689 #define BIT_EF_FLAG_8821C BIT(31) 690 691 #define BIT_SHIFT_EF_PGPD_8821C 28 692 #define BIT_MASK_EF_PGPD_8821C 0x7 693 #define BIT_EF_PGPD_8821C(x) \ 694 (((x) & BIT_MASK_EF_PGPD_8821C) << BIT_SHIFT_EF_PGPD_8821C) 695 #define BITS_EF_PGPD_8821C (BIT_MASK_EF_PGPD_8821C << BIT_SHIFT_EF_PGPD_8821C) 696 #define BIT_CLEAR_EF_PGPD_8821C(x) ((x) & (~BITS_EF_PGPD_8821C)) 697 #define BIT_GET_EF_PGPD_8821C(x) \ 698 (((x) >> BIT_SHIFT_EF_PGPD_8821C) & BIT_MASK_EF_PGPD_8821C) 699 #define BIT_SET_EF_PGPD_8821C(x, v) \ 700 (BIT_CLEAR_EF_PGPD_8821C(x) | BIT_EF_PGPD_8821C(v)) 701 702 #define BIT_SHIFT_EF_RDT_8821C 24 703 #define BIT_MASK_EF_RDT_8821C 0xf 704 #define BIT_EF_RDT_8821C(x) \ 705 (((x) & BIT_MASK_EF_RDT_8821C) << BIT_SHIFT_EF_RDT_8821C) 706 #define BITS_EF_RDT_8821C (BIT_MASK_EF_RDT_8821C << BIT_SHIFT_EF_RDT_8821C) 707 #define BIT_CLEAR_EF_RDT_8821C(x) ((x) & (~BITS_EF_RDT_8821C)) 708 #define BIT_GET_EF_RDT_8821C(x) \ 709 (((x) >> BIT_SHIFT_EF_RDT_8821C) & BIT_MASK_EF_RDT_8821C) 710 #define BIT_SET_EF_RDT_8821C(x, v) \ 711 (BIT_CLEAR_EF_RDT_8821C(x) | BIT_EF_RDT_8821C(v)) 712 713 #define BIT_SHIFT_EF_PGTS_8821C 20 714 #define BIT_MASK_EF_PGTS_8821C 0xf 715 #define BIT_EF_PGTS_8821C(x) \ 716 (((x) & BIT_MASK_EF_PGTS_8821C) << BIT_SHIFT_EF_PGTS_8821C) 717 #define BITS_EF_PGTS_8821C (BIT_MASK_EF_PGTS_8821C << BIT_SHIFT_EF_PGTS_8821C) 718 #define BIT_CLEAR_EF_PGTS_8821C(x) ((x) & (~BITS_EF_PGTS_8821C)) 719 #define BIT_GET_EF_PGTS_8821C(x) \ 720 (((x) >> BIT_SHIFT_EF_PGTS_8821C) & BIT_MASK_EF_PGTS_8821C) 721 #define BIT_SET_EF_PGTS_8821C(x, v) \ 722 (BIT_CLEAR_EF_PGTS_8821C(x) | BIT_EF_PGTS_8821C(v)) 723 724 #define BIT_EF_PDWN_8821C BIT(19) 725 #define BIT_EF_ALDEN_8821C BIT(18) 726 727 #define BIT_SHIFT_EF_ADDR_8821C 8 728 #define BIT_MASK_EF_ADDR_8821C 0x3ff 729 #define BIT_EF_ADDR_8821C(x) \ 730 (((x) & BIT_MASK_EF_ADDR_8821C) << BIT_SHIFT_EF_ADDR_8821C) 731 #define BITS_EF_ADDR_8821C (BIT_MASK_EF_ADDR_8821C << BIT_SHIFT_EF_ADDR_8821C) 732 #define BIT_CLEAR_EF_ADDR_8821C(x) ((x) & (~BITS_EF_ADDR_8821C)) 733 #define BIT_GET_EF_ADDR_8821C(x) \ 734 (((x) >> BIT_SHIFT_EF_ADDR_8821C) & BIT_MASK_EF_ADDR_8821C) 735 #define BIT_SET_EF_ADDR_8821C(x, v) \ 736 (BIT_CLEAR_EF_ADDR_8821C(x) | BIT_EF_ADDR_8821C(v)) 737 738 #define BIT_SHIFT_EF_DATA_8821C 0 739 #define BIT_MASK_EF_DATA_8821C 0xff 740 #define BIT_EF_DATA_8821C(x) \ 741 (((x) & BIT_MASK_EF_DATA_8821C) << BIT_SHIFT_EF_DATA_8821C) 742 #define BITS_EF_DATA_8821C (BIT_MASK_EF_DATA_8821C << BIT_SHIFT_EF_DATA_8821C) 743 #define BIT_CLEAR_EF_DATA_8821C(x) ((x) & (~BITS_EF_DATA_8821C)) 744 #define BIT_GET_EF_DATA_8821C(x) \ 745 (((x) >> BIT_SHIFT_EF_DATA_8821C) & BIT_MASK_EF_DATA_8821C) 746 #define BIT_SET_EF_DATA_8821C(x, v) \ 747 (BIT_CLEAR_EF_DATA_8821C(x) | BIT_EF_DATA_8821C(v)) 748 749 /* 2 REG_LDO_EFUSE_CTRL_8821C */ 750 #define BIT_LDOE25_EN_8821C BIT(31) 751 752 #define BIT_SHIFT_LDOE25_V12ADJ_L_8821C 27 753 #define BIT_MASK_LDOE25_V12ADJ_L_8821C 0xf 754 #define BIT_LDOE25_V12ADJ_L_8821C(x) \ 755 (((x) & BIT_MASK_LDOE25_V12ADJ_L_8821C) \ 756 << BIT_SHIFT_LDOE25_V12ADJ_L_8821C) 757 #define BITS_LDOE25_V12ADJ_L_8821C \ 758 (BIT_MASK_LDOE25_V12ADJ_L_8821C << BIT_SHIFT_LDOE25_V12ADJ_L_8821C) 759 #define BIT_CLEAR_LDOE25_V12ADJ_L_8821C(x) ((x) & (~BITS_LDOE25_V12ADJ_L_8821C)) 760 #define BIT_GET_LDOE25_V12ADJ_L_8821C(x) \ 761 (((x) >> BIT_SHIFT_LDOE25_V12ADJ_L_8821C) & \ 762 BIT_MASK_LDOE25_V12ADJ_L_8821C) 763 #define BIT_SET_LDOE25_V12ADJ_L_8821C(x, v) \ 764 (BIT_CLEAR_LDOE25_V12ADJ_L_8821C(x) | BIT_LDOE25_V12ADJ_L_8821C(v)) 765 766 #define BIT_EF_CRES_SEL_8821C BIT(26) 767 768 #define BIT_SHIFT_EF_SCAN_START_V1_8821C 16 769 #define BIT_MASK_EF_SCAN_START_V1_8821C 0x3ff 770 #define BIT_EF_SCAN_START_V1_8821C(x) \ 771 (((x) & BIT_MASK_EF_SCAN_START_V1_8821C) \ 772 << BIT_SHIFT_EF_SCAN_START_V1_8821C) 773 #define BITS_EF_SCAN_START_V1_8821C \ 774 (BIT_MASK_EF_SCAN_START_V1_8821C << BIT_SHIFT_EF_SCAN_START_V1_8821C) 775 #define BIT_CLEAR_EF_SCAN_START_V1_8821C(x) \ 776 ((x) & (~BITS_EF_SCAN_START_V1_8821C)) 777 #define BIT_GET_EF_SCAN_START_V1_8821C(x) \ 778 (((x) >> BIT_SHIFT_EF_SCAN_START_V1_8821C) & \ 779 BIT_MASK_EF_SCAN_START_V1_8821C) 780 #define BIT_SET_EF_SCAN_START_V1_8821C(x, v) \ 781 (BIT_CLEAR_EF_SCAN_START_V1_8821C(x) | BIT_EF_SCAN_START_V1_8821C(v)) 782 783 #define BIT_SHIFT_EF_SCAN_END_8821C 12 784 #define BIT_MASK_EF_SCAN_END_8821C 0xf 785 #define BIT_EF_SCAN_END_8821C(x) \ 786 (((x) & BIT_MASK_EF_SCAN_END_8821C) << BIT_SHIFT_EF_SCAN_END_8821C) 787 #define BITS_EF_SCAN_END_8821C \ 788 (BIT_MASK_EF_SCAN_END_8821C << BIT_SHIFT_EF_SCAN_END_8821C) 789 #define BIT_CLEAR_EF_SCAN_END_8821C(x) ((x) & (~BITS_EF_SCAN_END_8821C)) 790 #define BIT_GET_EF_SCAN_END_8821C(x) \ 791 (((x) >> BIT_SHIFT_EF_SCAN_END_8821C) & BIT_MASK_EF_SCAN_END_8821C) 792 #define BIT_SET_EF_SCAN_END_8821C(x, v) \ 793 (BIT_CLEAR_EF_SCAN_END_8821C(x) | BIT_EF_SCAN_END_8821C(v)) 794 795 #define BIT_EF_PD_DIS_8821C BIT(11) 796 797 #define BIT_SHIFT_EF_CELL_SEL_8821C 8 798 #define BIT_MASK_EF_CELL_SEL_8821C 0x3 799 #define BIT_EF_CELL_SEL_8821C(x) \ 800 (((x) & BIT_MASK_EF_CELL_SEL_8821C) << BIT_SHIFT_EF_CELL_SEL_8821C) 801 #define BITS_EF_CELL_SEL_8821C \ 802 (BIT_MASK_EF_CELL_SEL_8821C << BIT_SHIFT_EF_CELL_SEL_8821C) 803 #define BIT_CLEAR_EF_CELL_SEL_8821C(x) ((x) & (~BITS_EF_CELL_SEL_8821C)) 804 #define BIT_GET_EF_CELL_SEL_8821C(x) \ 805 (((x) >> BIT_SHIFT_EF_CELL_SEL_8821C) & BIT_MASK_EF_CELL_SEL_8821C) 806 #define BIT_SET_EF_CELL_SEL_8821C(x, v) \ 807 (BIT_CLEAR_EF_CELL_SEL_8821C(x) | BIT_EF_CELL_SEL_8821C(v)) 808 809 #define BIT_EF_TRPT_8821C BIT(7) 810 811 #define BIT_SHIFT_EF_TTHD_8821C 0 812 #define BIT_MASK_EF_TTHD_8821C 0x7f 813 #define BIT_EF_TTHD_8821C(x) \ 814 (((x) & BIT_MASK_EF_TTHD_8821C) << BIT_SHIFT_EF_TTHD_8821C) 815 #define BITS_EF_TTHD_8821C (BIT_MASK_EF_TTHD_8821C << BIT_SHIFT_EF_TTHD_8821C) 816 #define BIT_CLEAR_EF_TTHD_8821C(x) ((x) & (~BITS_EF_TTHD_8821C)) 817 #define BIT_GET_EF_TTHD_8821C(x) \ 818 (((x) >> BIT_SHIFT_EF_TTHD_8821C) & BIT_MASK_EF_TTHD_8821C) 819 #define BIT_SET_EF_TTHD_8821C(x, v) \ 820 (BIT_CLEAR_EF_TTHD_8821C(x) | BIT_EF_TTHD_8821C(v)) 821 822 /* 2 REG_PWR_OPTION_CTRL_8821C */ 823 824 #define BIT_SHIFT_DBG_SEL_V1_8821C 16 825 #define BIT_MASK_DBG_SEL_V1_8821C 0xff 826 #define BIT_DBG_SEL_V1_8821C(x) \ 827 (((x) & BIT_MASK_DBG_SEL_V1_8821C) << BIT_SHIFT_DBG_SEL_V1_8821C) 828 #define BITS_DBG_SEL_V1_8821C \ 829 (BIT_MASK_DBG_SEL_V1_8821C << BIT_SHIFT_DBG_SEL_V1_8821C) 830 #define BIT_CLEAR_DBG_SEL_V1_8821C(x) ((x) & (~BITS_DBG_SEL_V1_8821C)) 831 #define BIT_GET_DBG_SEL_V1_8821C(x) \ 832 (((x) >> BIT_SHIFT_DBG_SEL_V1_8821C) & BIT_MASK_DBG_SEL_V1_8821C) 833 #define BIT_SET_DBG_SEL_V1_8821C(x, v) \ 834 (BIT_CLEAR_DBG_SEL_V1_8821C(x) | BIT_DBG_SEL_V1_8821C(v)) 835 836 #define BIT_SHIFT_DBG_SEL_BYTE_8821C 14 837 #define BIT_MASK_DBG_SEL_BYTE_8821C 0x3 838 #define BIT_DBG_SEL_BYTE_8821C(x) \ 839 (((x) & BIT_MASK_DBG_SEL_BYTE_8821C) << BIT_SHIFT_DBG_SEL_BYTE_8821C) 840 #define BITS_DBG_SEL_BYTE_8821C \ 841 (BIT_MASK_DBG_SEL_BYTE_8821C << BIT_SHIFT_DBG_SEL_BYTE_8821C) 842 #define BIT_CLEAR_DBG_SEL_BYTE_8821C(x) ((x) & (~BITS_DBG_SEL_BYTE_8821C)) 843 #define BIT_GET_DBG_SEL_BYTE_8821C(x) \ 844 (((x) >> BIT_SHIFT_DBG_SEL_BYTE_8821C) & BIT_MASK_DBG_SEL_BYTE_8821C) 845 #define BIT_SET_DBG_SEL_BYTE_8821C(x, v) \ 846 (BIT_CLEAR_DBG_SEL_BYTE_8821C(x) | BIT_DBG_SEL_BYTE_8821C(v)) 847 848 #define BIT_SHIFT_STD_L1_V1_8821C 12 849 #define BIT_MASK_STD_L1_V1_8821C 0x3 850 #define BIT_STD_L1_V1_8821C(x) \ 851 (((x) & BIT_MASK_STD_L1_V1_8821C) << BIT_SHIFT_STD_L1_V1_8821C) 852 #define BITS_STD_L1_V1_8821C \ 853 (BIT_MASK_STD_L1_V1_8821C << BIT_SHIFT_STD_L1_V1_8821C) 854 #define BIT_CLEAR_STD_L1_V1_8821C(x) ((x) & (~BITS_STD_L1_V1_8821C)) 855 #define BIT_GET_STD_L1_V1_8821C(x) \ 856 (((x) >> BIT_SHIFT_STD_L1_V1_8821C) & BIT_MASK_STD_L1_V1_8821C) 857 #define BIT_SET_STD_L1_V1_8821C(x, v) \ 858 (BIT_CLEAR_STD_L1_V1_8821C(x) | BIT_STD_L1_V1_8821C(v)) 859 860 #define BIT_SYSON_DBG_PAD_E2_8821C BIT(11) 861 #define BIT_SYSON_LED_PAD_E2_8821C BIT(10) 862 #define BIT_SYSON_GPEE_PAD_E2_8821C BIT(9) 863 #define BIT_SYSON_PCI_PAD_E2_8821C BIT(8) 864 #define BIT_AUTO_SW_LDO_VOL_EN_8821C BIT(7) 865 866 #define BIT_SHIFT_SYSON_SPS0WWV_WT_8821C 4 867 #define BIT_MASK_SYSON_SPS0WWV_WT_8821C 0x3 868 #define BIT_SYSON_SPS0WWV_WT_8821C(x) \ 869 (((x) & BIT_MASK_SYSON_SPS0WWV_WT_8821C) \ 870 << BIT_SHIFT_SYSON_SPS0WWV_WT_8821C) 871 #define BITS_SYSON_SPS0WWV_WT_8821C \ 872 (BIT_MASK_SYSON_SPS0WWV_WT_8821C << BIT_SHIFT_SYSON_SPS0WWV_WT_8821C) 873 #define BIT_CLEAR_SYSON_SPS0WWV_WT_8821C(x) \ 874 ((x) & (~BITS_SYSON_SPS0WWV_WT_8821C)) 875 #define BIT_GET_SYSON_SPS0WWV_WT_8821C(x) \ 876 (((x) >> BIT_SHIFT_SYSON_SPS0WWV_WT_8821C) & \ 877 BIT_MASK_SYSON_SPS0WWV_WT_8821C) 878 #define BIT_SET_SYSON_SPS0WWV_WT_8821C(x, v) \ 879 (BIT_CLEAR_SYSON_SPS0WWV_WT_8821C(x) | BIT_SYSON_SPS0WWV_WT_8821C(v)) 880 881 #define BIT_SHIFT_SYSON_SPS0LDO_WT_8821C 2 882 #define BIT_MASK_SYSON_SPS0LDO_WT_8821C 0x3 883 #define BIT_SYSON_SPS0LDO_WT_8821C(x) \ 884 (((x) & BIT_MASK_SYSON_SPS0LDO_WT_8821C) \ 885 << BIT_SHIFT_SYSON_SPS0LDO_WT_8821C) 886 #define BITS_SYSON_SPS0LDO_WT_8821C \ 887 (BIT_MASK_SYSON_SPS0LDO_WT_8821C << BIT_SHIFT_SYSON_SPS0LDO_WT_8821C) 888 #define BIT_CLEAR_SYSON_SPS0LDO_WT_8821C(x) \ 889 ((x) & (~BITS_SYSON_SPS0LDO_WT_8821C)) 890 #define BIT_GET_SYSON_SPS0LDO_WT_8821C(x) \ 891 (((x) >> BIT_SHIFT_SYSON_SPS0LDO_WT_8821C) & \ 892 BIT_MASK_SYSON_SPS0LDO_WT_8821C) 893 #define BIT_SET_SYSON_SPS0LDO_WT_8821C(x, v) \ 894 (BIT_CLEAR_SYSON_SPS0LDO_WT_8821C(x) | BIT_SYSON_SPS0LDO_WT_8821C(v)) 895 896 #define BIT_SHIFT_SYSON_RCLK_SCALE_8821C 0 897 #define BIT_MASK_SYSON_RCLK_SCALE_8821C 0x3 898 #define BIT_SYSON_RCLK_SCALE_8821C(x) \ 899 (((x) & BIT_MASK_SYSON_RCLK_SCALE_8821C) \ 900 << BIT_SHIFT_SYSON_RCLK_SCALE_8821C) 901 #define BITS_SYSON_RCLK_SCALE_8821C \ 902 (BIT_MASK_SYSON_RCLK_SCALE_8821C << BIT_SHIFT_SYSON_RCLK_SCALE_8821C) 903 #define BIT_CLEAR_SYSON_RCLK_SCALE_8821C(x) \ 904 ((x) & (~BITS_SYSON_RCLK_SCALE_8821C)) 905 #define BIT_GET_SYSON_RCLK_SCALE_8821C(x) \ 906 (((x) >> BIT_SHIFT_SYSON_RCLK_SCALE_8821C) & \ 907 BIT_MASK_SYSON_RCLK_SCALE_8821C) 908 #define BIT_SET_SYSON_RCLK_SCALE_8821C(x, v) \ 909 (BIT_CLEAR_SYSON_RCLK_SCALE_8821C(x) | BIT_SYSON_RCLK_SCALE_8821C(v)) 910 911 /* 2 REG_CAL_TIMER_8821C */ 912 913 #define BIT_SHIFT_MATCH_CNT_8821C 8 914 #define BIT_MASK_MATCH_CNT_8821C 0xff 915 #define BIT_MATCH_CNT_8821C(x) \ 916 (((x) & BIT_MASK_MATCH_CNT_8821C) << BIT_SHIFT_MATCH_CNT_8821C) 917 #define BITS_MATCH_CNT_8821C \ 918 (BIT_MASK_MATCH_CNT_8821C << BIT_SHIFT_MATCH_CNT_8821C) 919 #define BIT_CLEAR_MATCH_CNT_8821C(x) ((x) & (~BITS_MATCH_CNT_8821C)) 920 #define BIT_GET_MATCH_CNT_8821C(x) \ 921 (((x) >> BIT_SHIFT_MATCH_CNT_8821C) & BIT_MASK_MATCH_CNT_8821C) 922 #define BIT_SET_MATCH_CNT_8821C(x, v) \ 923 (BIT_CLEAR_MATCH_CNT_8821C(x) | BIT_MATCH_CNT_8821C(v)) 924 925 #define BIT_SHIFT_CAL_SCAL_8821C 0 926 #define BIT_MASK_CAL_SCAL_8821C 0xff 927 #define BIT_CAL_SCAL_8821C(x) \ 928 (((x) & BIT_MASK_CAL_SCAL_8821C) << BIT_SHIFT_CAL_SCAL_8821C) 929 #define BITS_CAL_SCAL_8821C \ 930 (BIT_MASK_CAL_SCAL_8821C << BIT_SHIFT_CAL_SCAL_8821C) 931 #define BIT_CLEAR_CAL_SCAL_8821C(x) ((x) & (~BITS_CAL_SCAL_8821C)) 932 #define BIT_GET_CAL_SCAL_8821C(x) \ 933 (((x) >> BIT_SHIFT_CAL_SCAL_8821C) & BIT_MASK_CAL_SCAL_8821C) 934 #define BIT_SET_CAL_SCAL_8821C(x, v) \ 935 (BIT_CLEAR_CAL_SCAL_8821C(x) | BIT_CAL_SCAL_8821C(v)) 936 937 /* 2 REG_ACLK_MON_8821C */ 938 939 #define BIT_SHIFT_RCLK_MON_8821C 5 940 #define BIT_MASK_RCLK_MON_8821C 0x7ff 941 #define BIT_RCLK_MON_8821C(x) \ 942 (((x) & BIT_MASK_RCLK_MON_8821C) << BIT_SHIFT_RCLK_MON_8821C) 943 #define BITS_RCLK_MON_8821C \ 944 (BIT_MASK_RCLK_MON_8821C << BIT_SHIFT_RCLK_MON_8821C) 945 #define BIT_CLEAR_RCLK_MON_8821C(x) ((x) & (~BITS_RCLK_MON_8821C)) 946 #define BIT_GET_RCLK_MON_8821C(x) \ 947 (((x) >> BIT_SHIFT_RCLK_MON_8821C) & BIT_MASK_RCLK_MON_8821C) 948 #define BIT_SET_RCLK_MON_8821C(x, v) \ 949 (BIT_CLEAR_RCLK_MON_8821C(x) | BIT_RCLK_MON_8821C(v)) 950 951 #define BIT_CAL_EN_8821C BIT(4) 952 953 #define BIT_SHIFT_DPSTU_8821C 2 954 #define BIT_MASK_DPSTU_8821C 0x3 955 #define BIT_DPSTU_8821C(x) \ 956 (((x) & BIT_MASK_DPSTU_8821C) << BIT_SHIFT_DPSTU_8821C) 957 #define BITS_DPSTU_8821C (BIT_MASK_DPSTU_8821C << BIT_SHIFT_DPSTU_8821C) 958 #define BIT_CLEAR_DPSTU_8821C(x) ((x) & (~BITS_DPSTU_8821C)) 959 #define BIT_GET_DPSTU_8821C(x) \ 960 (((x) >> BIT_SHIFT_DPSTU_8821C) & BIT_MASK_DPSTU_8821C) 961 #define BIT_SET_DPSTU_8821C(x, v) \ 962 (BIT_CLEAR_DPSTU_8821C(x) | BIT_DPSTU_8821C(v)) 963 964 #define BIT_SUS_16X_8821C BIT(1) 965 966 /* 2 REG_GPIO_MUXCFG_8821C */ 967 #define BIT_FSPI_EN_8821C BIT(19) 968 #define BIT_WL_RTS_EXT_32K_SEL_8821C BIT(18) 969 #define BIT_WLGP_SPI_EN_8821C BIT(16) 970 #define BIT_SIC_LBK_8821C BIT(15) 971 #define BIT_ENHTP_8821C BIT(14) 972 #define BIT_ENSIC_8821C BIT(12) 973 #define BIT_SIC_SWRST_8821C BIT(11) 974 #define BIT_PO_WIFI_PTA_PINS_8821C BIT(10) 975 #define BIT_PO_BT_PTA_PINS_8821C BIT(9) 976 #define BIT_ENUART_8821C BIT(8) 977 978 #define BIT_SHIFT_BTMODE_8821C 6 979 #define BIT_MASK_BTMODE_8821C 0x3 980 #define BIT_BTMODE_8821C(x) \ 981 (((x) & BIT_MASK_BTMODE_8821C) << BIT_SHIFT_BTMODE_8821C) 982 #define BITS_BTMODE_8821C (BIT_MASK_BTMODE_8821C << BIT_SHIFT_BTMODE_8821C) 983 #define BIT_CLEAR_BTMODE_8821C(x) ((x) & (~BITS_BTMODE_8821C)) 984 #define BIT_GET_BTMODE_8821C(x) \ 985 (((x) >> BIT_SHIFT_BTMODE_8821C) & BIT_MASK_BTMODE_8821C) 986 #define BIT_SET_BTMODE_8821C(x, v) \ 987 (BIT_CLEAR_BTMODE_8821C(x) | BIT_BTMODE_8821C(v)) 988 989 #define BIT_ENBT_8821C BIT(5) 990 #define BIT_EROM_EN_8821C BIT(4) 991 #define BIT_WLRFE_6_7_EN_8821C BIT(3) 992 #define BIT_WLRFE_4_5_EN_8821C BIT(2) 993 994 #define BIT_SHIFT_GPIOSEL_8821C 0 995 #define BIT_MASK_GPIOSEL_8821C 0x3 996 #define BIT_GPIOSEL_8821C(x) \ 997 (((x) & BIT_MASK_GPIOSEL_8821C) << BIT_SHIFT_GPIOSEL_8821C) 998 #define BITS_GPIOSEL_8821C (BIT_MASK_GPIOSEL_8821C << BIT_SHIFT_GPIOSEL_8821C) 999 #define BIT_CLEAR_GPIOSEL_8821C(x) ((x) & (~BITS_GPIOSEL_8821C)) 1000 #define BIT_GET_GPIOSEL_8821C(x) \ 1001 (((x) >> BIT_SHIFT_GPIOSEL_8821C) & BIT_MASK_GPIOSEL_8821C) 1002 #define BIT_SET_GPIOSEL_8821C(x, v) \ 1003 (BIT_CLEAR_GPIOSEL_8821C(x) | BIT_GPIOSEL_8821C(v)) 1004 1005 /* 2 REG_GPIO_PIN_CTRL_8821C */ 1006 1007 #define BIT_SHIFT_GPIO_MOD_7_TO_0_8821C 24 1008 #define BIT_MASK_GPIO_MOD_7_TO_0_8821C 0xff 1009 #define BIT_GPIO_MOD_7_TO_0_8821C(x) \ 1010 (((x) & BIT_MASK_GPIO_MOD_7_TO_0_8821C) \ 1011 << BIT_SHIFT_GPIO_MOD_7_TO_0_8821C) 1012 #define BITS_GPIO_MOD_7_TO_0_8821C \ 1013 (BIT_MASK_GPIO_MOD_7_TO_0_8821C << BIT_SHIFT_GPIO_MOD_7_TO_0_8821C) 1014 #define BIT_CLEAR_GPIO_MOD_7_TO_0_8821C(x) ((x) & (~BITS_GPIO_MOD_7_TO_0_8821C)) 1015 #define BIT_GET_GPIO_MOD_7_TO_0_8821C(x) \ 1016 (((x) >> BIT_SHIFT_GPIO_MOD_7_TO_0_8821C) & \ 1017 BIT_MASK_GPIO_MOD_7_TO_0_8821C) 1018 #define BIT_SET_GPIO_MOD_7_TO_0_8821C(x, v) \ 1019 (BIT_CLEAR_GPIO_MOD_7_TO_0_8821C(x) | BIT_GPIO_MOD_7_TO_0_8821C(v)) 1020 1021 #define BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8821C 16 1022 #define BIT_MASK_GPIO_IO_SEL_7_TO_0_8821C 0xff 1023 #define BIT_GPIO_IO_SEL_7_TO_0_8821C(x) \ 1024 (((x) & BIT_MASK_GPIO_IO_SEL_7_TO_0_8821C) \ 1025 << BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8821C) 1026 #define BITS_GPIO_IO_SEL_7_TO_0_8821C \ 1027 (BIT_MASK_GPIO_IO_SEL_7_TO_0_8821C \ 1028 << BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8821C) 1029 #define BIT_CLEAR_GPIO_IO_SEL_7_TO_0_8821C(x) \ 1030 ((x) & (~BITS_GPIO_IO_SEL_7_TO_0_8821C)) 1031 #define BIT_GET_GPIO_IO_SEL_7_TO_0_8821C(x) \ 1032 (((x) >> BIT_SHIFT_GPIO_IO_SEL_7_TO_0_8821C) & \ 1033 BIT_MASK_GPIO_IO_SEL_7_TO_0_8821C) 1034 #define BIT_SET_GPIO_IO_SEL_7_TO_0_8821C(x, v) \ 1035 (BIT_CLEAR_GPIO_IO_SEL_7_TO_0_8821C(x) | \ 1036 BIT_GPIO_IO_SEL_7_TO_0_8821C(v)) 1037 1038 #define BIT_SHIFT_GPIO_OUT_7_TO_0_8821C 8 1039 #define BIT_MASK_GPIO_OUT_7_TO_0_8821C 0xff 1040 #define BIT_GPIO_OUT_7_TO_0_8821C(x) \ 1041 (((x) & BIT_MASK_GPIO_OUT_7_TO_0_8821C) \ 1042 << BIT_SHIFT_GPIO_OUT_7_TO_0_8821C) 1043 #define BITS_GPIO_OUT_7_TO_0_8821C \ 1044 (BIT_MASK_GPIO_OUT_7_TO_0_8821C << BIT_SHIFT_GPIO_OUT_7_TO_0_8821C) 1045 #define BIT_CLEAR_GPIO_OUT_7_TO_0_8821C(x) ((x) & (~BITS_GPIO_OUT_7_TO_0_8821C)) 1046 #define BIT_GET_GPIO_OUT_7_TO_0_8821C(x) \ 1047 (((x) >> BIT_SHIFT_GPIO_OUT_7_TO_0_8821C) & \ 1048 BIT_MASK_GPIO_OUT_7_TO_0_8821C) 1049 #define BIT_SET_GPIO_OUT_7_TO_0_8821C(x, v) \ 1050 (BIT_CLEAR_GPIO_OUT_7_TO_0_8821C(x) | BIT_GPIO_OUT_7_TO_0_8821C(v)) 1051 1052 #define BIT_SHIFT_GPIO_IN_7_TO_0_8821C 0 1053 #define BIT_MASK_GPIO_IN_7_TO_0_8821C 0xff 1054 #define BIT_GPIO_IN_7_TO_0_8821C(x) \ 1055 (((x) & BIT_MASK_GPIO_IN_7_TO_0_8821C) \ 1056 << BIT_SHIFT_GPIO_IN_7_TO_0_8821C) 1057 #define BITS_GPIO_IN_7_TO_0_8821C \ 1058 (BIT_MASK_GPIO_IN_7_TO_0_8821C << BIT_SHIFT_GPIO_IN_7_TO_0_8821C) 1059 #define BIT_CLEAR_GPIO_IN_7_TO_0_8821C(x) ((x) & (~BITS_GPIO_IN_7_TO_0_8821C)) 1060 #define BIT_GET_GPIO_IN_7_TO_0_8821C(x) \ 1061 (((x) >> BIT_SHIFT_GPIO_IN_7_TO_0_8821C) & \ 1062 BIT_MASK_GPIO_IN_7_TO_0_8821C) 1063 #define BIT_SET_GPIO_IN_7_TO_0_8821C(x, v) \ 1064 (BIT_CLEAR_GPIO_IN_7_TO_0_8821C(x) | BIT_GPIO_IN_7_TO_0_8821C(v)) 1065 1066 /* 2 REG_GPIO_INTM_8821C */ 1067 1068 #define BIT_SHIFT_MUXDBG_SEL_8821C 30 1069 #define BIT_MASK_MUXDBG_SEL_8821C 0x3 1070 #define BIT_MUXDBG_SEL_8821C(x) \ 1071 (((x) & BIT_MASK_MUXDBG_SEL_8821C) << BIT_SHIFT_MUXDBG_SEL_8821C) 1072 #define BITS_MUXDBG_SEL_8821C \ 1073 (BIT_MASK_MUXDBG_SEL_8821C << BIT_SHIFT_MUXDBG_SEL_8821C) 1074 #define BIT_CLEAR_MUXDBG_SEL_8821C(x) ((x) & (~BITS_MUXDBG_SEL_8821C)) 1075 #define BIT_GET_MUXDBG_SEL_8821C(x) \ 1076 (((x) >> BIT_SHIFT_MUXDBG_SEL_8821C) & BIT_MASK_MUXDBG_SEL_8821C) 1077 #define BIT_SET_MUXDBG_SEL_8821C(x, v) \ 1078 (BIT_CLEAR_MUXDBG_SEL_8821C(x) | BIT_MUXDBG_SEL_8821C(v)) 1079 1080 #define BIT_EXTWOL_SEL_8821C BIT(17) 1081 #define BIT_EXTWOL_EN_8821C BIT(16) 1082 #define BIT_GPIOF_INT_MD_8821C BIT(15) 1083 #define BIT_GPIOE_INT_MD_8821C BIT(14) 1084 #define BIT_GPIOD_INT_MD_8821C BIT(13) 1085 #define BIT_GPIOF_INT_MD_8821C BIT(15) 1086 #define BIT_GPIOE_INT_MD_8821C BIT(14) 1087 #define BIT_GPIOD_INT_MD_8821C BIT(13) 1088 #define BIT_GPIOC_INT_MD_8821C BIT(12) 1089 #define BIT_GPIOB_INT_MD_8821C BIT(11) 1090 #define BIT_GPIOA_INT_MD_8821C BIT(10) 1091 #define BIT_GPIO9_INT_MD_8821C BIT(9) 1092 #define BIT_GPIO8_INT_MD_8821C BIT(8) 1093 #define BIT_GPIO7_INT_MD_8821C BIT(7) 1094 #define BIT_GPIO6_INT_MD_8821C BIT(6) 1095 #define BIT_GPIO5_INT_MD_8821C BIT(5) 1096 #define BIT_GPIO4_INT_MD_8821C BIT(4) 1097 #define BIT_GPIO3_INT_MD_8821C BIT(3) 1098 #define BIT_GPIO2_INT_MD_8821C BIT(2) 1099 #define BIT_GPIO1_INT_MD_8821C BIT(1) 1100 #define BIT_GPIO0_INT_MD_8821C BIT(0) 1101 1102 /* 2 REG_LED_CFG_8821C */ 1103 #define BIT_GPIO3_WL_CTRL_EN_8821C BIT(27) 1104 #define BIT_LNAON_SEL_EN_8821C BIT(26) 1105 #define BIT_PAPE_SEL_EN_8821C BIT(25) 1106 #define BIT_DPDT_WLBT_SEL_8821C BIT(24) 1107 #define BIT_DPDT_SEL_EN_8821C BIT(23) 1108 #define BIT_GPIO13_14_WL_CTRL_EN_8821C BIT(22) 1109 #define BIT_LED2DIS_8821C BIT(21) 1110 #define BIT_LED2PL_8821C BIT(20) 1111 #define BIT_LED2SV_8821C BIT(19) 1112 1113 #define BIT_SHIFT_LED2CM_8821C 16 1114 #define BIT_MASK_LED2CM_8821C 0x7 1115 #define BIT_LED2CM_8821C(x) \ 1116 (((x) & BIT_MASK_LED2CM_8821C) << BIT_SHIFT_LED2CM_8821C) 1117 #define BITS_LED2CM_8821C (BIT_MASK_LED2CM_8821C << BIT_SHIFT_LED2CM_8821C) 1118 #define BIT_CLEAR_LED2CM_8821C(x) ((x) & (~BITS_LED2CM_8821C)) 1119 #define BIT_GET_LED2CM_8821C(x) \ 1120 (((x) >> BIT_SHIFT_LED2CM_8821C) & BIT_MASK_LED2CM_8821C) 1121 #define BIT_SET_LED2CM_8821C(x, v) \ 1122 (BIT_CLEAR_LED2CM_8821C(x) | BIT_LED2CM_8821C(v)) 1123 1124 #define BIT_LED1DIS_8821C BIT(15) 1125 #define BIT_LED1PL_8821C BIT(12) 1126 #define BIT_LED1SV_8821C BIT(11) 1127 1128 #define BIT_SHIFT_LED1CM_8821C 8 1129 #define BIT_MASK_LED1CM_8821C 0x7 1130 #define BIT_LED1CM_8821C(x) \ 1131 (((x) & BIT_MASK_LED1CM_8821C) << BIT_SHIFT_LED1CM_8821C) 1132 #define BITS_LED1CM_8821C (BIT_MASK_LED1CM_8821C << BIT_SHIFT_LED1CM_8821C) 1133 #define BIT_CLEAR_LED1CM_8821C(x) ((x) & (~BITS_LED1CM_8821C)) 1134 #define BIT_GET_LED1CM_8821C(x) \ 1135 (((x) >> BIT_SHIFT_LED1CM_8821C) & BIT_MASK_LED1CM_8821C) 1136 #define BIT_SET_LED1CM_8821C(x, v) \ 1137 (BIT_CLEAR_LED1CM_8821C(x) | BIT_LED1CM_8821C(v)) 1138 1139 #define BIT_LED0DIS_8821C BIT(7) 1140 1141 #define BIT_SHIFT_AFE_LDO_SWR_CHECK_8821C 5 1142 #define BIT_MASK_AFE_LDO_SWR_CHECK_8821C 0x3 1143 #define BIT_AFE_LDO_SWR_CHECK_8821C(x) \ 1144 (((x) & BIT_MASK_AFE_LDO_SWR_CHECK_8821C) \ 1145 << BIT_SHIFT_AFE_LDO_SWR_CHECK_8821C) 1146 #define BITS_AFE_LDO_SWR_CHECK_8821C \ 1147 (BIT_MASK_AFE_LDO_SWR_CHECK_8821C << BIT_SHIFT_AFE_LDO_SWR_CHECK_8821C) 1148 #define BIT_CLEAR_AFE_LDO_SWR_CHECK_8821C(x) \ 1149 ((x) & (~BITS_AFE_LDO_SWR_CHECK_8821C)) 1150 #define BIT_GET_AFE_LDO_SWR_CHECK_8821C(x) \ 1151 (((x) >> BIT_SHIFT_AFE_LDO_SWR_CHECK_8821C) & \ 1152 BIT_MASK_AFE_LDO_SWR_CHECK_8821C) 1153 #define BIT_SET_AFE_LDO_SWR_CHECK_8821C(x, v) \ 1154 (BIT_CLEAR_AFE_LDO_SWR_CHECK_8821C(x) | BIT_AFE_LDO_SWR_CHECK_8821C(v)) 1155 1156 #define BIT_LED0PL_8821C BIT(4) 1157 #define BIT_LED0SV_8821C BIT(3) 1158 1159 #define BIT_SHIFT_LED0CM_8821C 0 1160 #define BIT_MASK_LED0CM_8821C 0x7 1161 #define BIT_LED0CM_8821C(x) \ 1162 (((x) & BIT_MASK_LED0CM_8821C) << BIT_SHIFT_LED0CM_8821C) 1163 #define BITS_LED0CM_8821C (BIT_MASK_LED0CM_8821C << BIT_SHIFT_LED0CM_8821C) 1164 #define BIT_CLEAR_LED0CM_8821C(x) ((x) & (~BITS_LED0CM_8821C)) 1165 #define BIT_GET_LED0CM_8821C(x) \ 1166 (((x) >> BIT_SHIFT_LED0CM_8821C) & BIT_MASK_LED0CM_8821C) 1167 #define BIT_SET_LED0CM_8821C(x, v) \ 1168 (BIT_CLEAR_LED0CM_8821C(x) | BIT_LED0CM_8821C(v)) 1169 1170 /* 2 REG_FSIMR_8821C */ 1171 #define BIT_FS_PDNINT_EN_8821C BIT(31) 1172 #define BIT_NFC_INT_PAD_EN_8821C BIT(30) 1173 #define BIT_FS_SPS_OCP_INT_EN_8821C BIT(29) 1174 #define BIT_FS_PWMERR_INT_EN_8821C BIT(28) 1175 #define BIT_FS_GPIOF_INT_EN_8821C BIT(27) 1176 #define BIT_FS_GPIOE_INT_EN_8821C BIT(26) 1177 #define BIT_FS_GPIOD_INT_EN_8821C BIT(25) 1178 #define BIT_FS_GPIOC_INT_EN_8821C BIT(24) 1179 #define BIT_FS_GPIOB_INT_EN_8821C BIT(23) 1180 #define BIT_FS_GPIOA_INT_EN_8821C BIT(22) 1181 #define BIT_FS_GPIO9_INT_EN_8821C BIT(21) 1182 #define BIT_FS_GPIO8_INT_EN_8821C BIT(20) 1183 #define BIT_FS_GPIO7_INT_EN_8821C BIT(19) 1184 #define BIT_FS_GPIO6_INT_EN_8821C BIT(18) 1185 #define BIT_FS_GPIO5_INT_EN_8821C BIT(17) 1186 #define BIT_FS_GPIO4_INT_EN_8821C BIT(16) 1187 #define BIT_FS_GPIO3_INT_EN_8821C BIT(15) 1188 #define BIT_FS_GPIO2_INT_EN_8821C BIT(14) 1189 #define BIT_FS_GPIO1_INT_EN_8821C BIT(13) 1190 #define BIT_FS_GPIO0_INT_EN_8821C BIT(12) 1191 #define BIT_FS_HCI_SUS_EN_8821C BIT(11) 1192 #define BIT_FS_HCI_RES_EN_8821C BIT(10) 1193 #define BIT_FS_HCI_RESET_EN_8821C BIT(9) 1194 #define BIT_USB_SCSI_CMD_EN_8821C BIT(8) 1195 #define BIT_FS_BTON_STS_UPDATE_MSK_EN_8821C BIT(7) 1196 #define BIT_ACT2RECOVERY_INT_EN_V1_8821C BIT(6) 1197 #define BIT_GEN1GEN2_SWITCH_8821C BIT(5) 1198 #define BIT_HCI_TXDMA_REQ_HIMR_8821C BIT(4) 1199 #define BIT_FS_32K_LEAVE_SETTING_MAK_8821C BIT(3) 1200 #define BIT_FS_32K_ENTER_SETTING_MAK_8821C BIT(2) 1201 #define BIT_FS_USB_LPMRSM_MSK_8821C BIT(1) 1202 #define BIT_FS_USB_LPMINT_MSK_8821C BIT(0) 1203 1204 /* 2 REG_FSISR_8821C */ 1205 #define BIT_FS_PDNINT_8821C BIT(31) 1206 #define BIT_FS_SPS_OCP_INT_8821C BIT(29) 1207 #define BIT_FS_PWMERR_INT_8821C BIT(28) 1208 #define BIT_FS_GPIOF_INT_8821C BIT(27) 1209 #define BIT_FS_GPIOE_INT_8821C BIT(26) 1210 #define BIT_FS_GPIOD_INT_8821C BIT(25) 1211 #define BIT_FS_GPIOC_INT_8821C BIT(24) 1212 #define BIT_FS_GPIOB_INT_8821C BIT(23) 1213 #define BIT_FS_GPIOA_INT_8821C BIT(22) 1214 #define BIT_FS_GPIO9_INT_8821C BIT(21) 1215 #define BIT_FS_GPIO8_INT_8821C BIT(20) 1216 #define BIT_FS_GPIO7_INT_8821C BIT(19) 1217 #define BIT_FS_GPIO6_INT_8821C BIT(18) 1218 #define BIT_FS_GPIO5_INT_8821C BIT(17) 1219 #define BIT_FS_GPIO4_INT_8821C BIT(16) 1220 #define BIT_FS_GPIO3_INT_8821C BIT(15) 1221 #define BIT_FS_GPIO2_INT_8821C BIT(14) 1222 #define BIT_FS_GPIO1_INT_8821C BIT(13) 1223 #define BIT_FS_GPIO0_INT_8821C BIT(12) 1224 #define BIT_FS_HCI_SUS_INT_8821C BIT(11) 1225 #define BIT_FS_HCI_RES_INT_8821C BIT(10) 1226 #define BIT_FS_HCI_RESET_INT_8821C BIT(9) 1227 #define BIT_USB_SCSI_CMD_INT_8821C BIT(8) 1228 #define BIT_ACT2RECOVERY_8821C BIT(6) 1229 #define BIT_GEN1GEN2_SWITCH_8821C BIT(5) 1230 #define BIT_HCI_TXDMA_REQ_HISR_8821C BIT(4) 1231 #define BIT_FS_32K_LEAVE_SETTING_INT_8821C BIT(3) 1232 #define BIT_FS_32K_ENTER_SETTING_INT_8821C BIT(2) 1233 #define BIT_FS_USB_LPMRSM_INT_8821C BIT(1) 1234 #define BIT_FS_USB_LPMINT_INT_8821C BIT(0) 1235 1236 /* 2 REG_HSIMR_8821C */ 1237 #define BIT_GPIOF_INT_EN_8821C BIT(31) 1238 #define BIT_GPIOE_INT_EN_8821C BIT(30) 1239 #define BIT_GPIOD_INT_EN_8821C BIT(29) 1240 #define BIT_GPIOC_INT_EN_8821C BIT(28) 1241 #define BIT_GPIOB_INT_EN_8821C BIT(27) 1242 #define BIT_GPIOA_INT_EN_8821C BIT(26) 1243 #define BIT_GPIO9_INT_EN_8821C BIT(25) 1244 #define BIT_GPIO8_INT_EN_8821C BIT(24) 1245 #define BIT_GPIO7_INT_EN_8821C BIT(23) 1246 #define BIT_GPIO6_INT_EN_8821C BIT(22) 1247 #define BIT_GPIO5_INT_EN_8821C BIT(21) 1248 #define BIT_GPIO4_INT_EN_8821C BIT(20) 1249 #define BIT_GPIO3_INT_EN_8821C BIT(19) 1250 #define BIT_GPIO2_INT_EN_V1_8821C BIT(18) 1251 #define BIT_GPIO1_INT_EN_8821C BIT(17) 1252 #define BIT_GPIO0_INT_EN_8821C BIT(16) 1253 #define BIT_PDNINT_EN_8821C BIT(7) 1254 #define BIT_RON_INT_EN_8821C BIT(6) 1255 #define BIT_SPS_OCP_INT_EN_8821C BIT(5) 1256 #define BIT_GPIO15_0_INT_EN_8821C BIT(0) 1257 1258 /* 2 REG_HSISR_8821C */ 1259 #define BIT_GPIOF_INT_8821C BIT(31) 1260 #define BIT_GPIOE_INT_8821C BIT(30) 1261 #define BIT_GPIOD_INT_8821C BIT(29) 1262 #define BIT_GPIOC_INT_8821C BIT(28) 1263 #define BIT_GPIOB_INT_8821C BIT(27) 1264 #define BIT_GPIOA_INT_8821C BIT(26) 1265 #define BIT_GPIO9_INT_8821C BIT(25) 1266 #define BIT_GPIO8_INT_8821C BIT(24) 1267 #define BIT_GPIO7_INT_8821C BIT(23) 1268 #define BIT_GPIO6_INT_8821C BIT(22) 1269 #define BIT_GPIO5_INT_8821C BIT(21) 1270 #define BIT_GPIO4_INT_8821C BIT(20) 1271 #define BIT_GPIO3_INT_8821C BIT(19) 1272 #define BIT_GPIO2_INT_V1_8821C BIT(18) 1273 #define BIT_GPIO1_INT_8821C BIT(17) 1274 #define BIT_GPIO0_INT_8821C BIT(16) 1275 #define BIT_PDNINT_8821C BIT(7) 1276 #define BIT_RON_INT_8821C BIT(6) 1277 #define BIT_SPS_OCP_INT_8821C BIT(5) 1278 #define BIT_GPIO15_0_INT_8821C BIT(0) 1279 1280 /* 2 REG_GPIO_EXT_CTRL_8821C */ 1281 1282 #define BIT_SHIFT_GPIO_MOD_15_TO_8_8821C 24 1283 #define BIT_MASK_GPIO_MOD_15_TO_8_8821C 0xff 1284 #define BIT_GPIO_MOD_15_TO_8_8821C(x) \ 1285 (((x) & BIT_MASK_GPIO_MOD_15_TO_8_8821C) \ 1286 << BIT_SHIFT_GPIO_MOD_15_TO_8_8821C) 1287 #define BITS_GPIO_MOD_15_TO_8_8821C \ 1288 (BIT_MASK_GPIO_MOD_15_TO_8_8821C << BIT_SHIFT_GPIO_MOD_15_TO_8_8821C) 1289 #define BIT_CLEAR_GPIO_MOD_15_TO_8_8821C(x) \ 1290 ((x) & (~BITS_GPIO_MOD_15_TO_8_8821C)) 1291 #define BIT_GET_GPIO_MOD_15_TO_8_8821C(x) \ 1292 (((x) >> BIT_SHIFT_GPIO_MOD_15_TO_8_8821C) & \ 1293 BIT_MASK_GPIO_MOD_15_TO_8_8821C) 1294 #define BIT_SET_GPIO_MOD_15_TO_8_8821C(x, v) \ 1295 (BIT_CLEAR_GPIO_MOD_15_TO_8_8821C(x) | BIT_GPIO_MOD_15_TO_8_8821C(v)) 1296 1297 #define BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8821C 16 1298 #define BIT_MASK_GPIO_IO_SEL_15_TO_8_8821C 0xff 1299 #define BIT_GPIO_IO_SEL_15_TO_8_8821C(x) \ 1300 (((x) & BIT_MASK_GPIO_IO_SEL_15_TO_8_8821C) \ 1301 << BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8821C) 1302 #define BITS_GPIO_IO_SEL_15_TO_8_8821C \ 1303 (BIT_MASK_GPIO_IO_SEL_15_TO_8_8821C \ 1304 << BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8821C) 1305 #define BIT_CLEAR_GPIO_IO_SEL_15_TO_8_8821C(x) \ 1306 ((x) & (~BITS_GPIO_IO_SEL_15_TO_8_8821C)) 1307 #define BIT_GET_GPIO_IO_SEL_15_TO_8_8821C(x) \ 1308 (((x) >> BIT_SHIFT_GPIO_IO_SEL_15_TO_8_8821C) & \ 1309 BIT_MASK_GPIO_IO_SEL_15_TO_8_8821C) 1310 #define BIT_SET_GPIO_IO_SEL_15_TO_8_8821C(x, v) \ 1311 (BIT_CLEAR_GPIO_IO_SEL_15_TO_8_8821C(x) | \ 1312 BIT_GPIO_IO_SEL_15_TO_8_8821C(v)) 1313 1314 #define BIT_SHIFT_GPIO_OUT_15_TO_8_8821C 8 1315 #define BIT_MASK_GPIO_OUT_15_TO_8_8821C 0xff 1316 #define BIT_GPIO_OUT_15_TO_8_8821C(x) \ 1317 (((x) & BIT_MASK_GPIO_OUT_15_TO_8_8821C) \ 1318 << BIT_SHIFT_GPIO_OUT_15_TO_8_8821C) 1319 #define BITS_GPIO_OUT_15_TO_8_8821C \ 1320 (BIT_MASK_GPIO_OUT_15_TO_8_8821C << BIT_SHIFT_GPIO_OUT_15_TO_8_8821C) 1321 #define BIT_CLEAR_GPIO_OUT_15_TO_8_8821C(x) \ 1322 ((x) & (~BITS_GPIO_OUT_15_TO_8_8821C)) 1323 #define BIT_GET_GPIO_OUT_15_TO_8_8821C(x) \ 1324 (((x) >> BIT_SHIFT_GPIO_OUT_15_TO_8_8821C) & \ 1325 BIT_MASK_GPIO_OUT_15_TO_8_8821C) 1326 #define BIT_SET_GPIO_OUT_15_TO_8_8821C(x, v) \ 1327 (BIT_CLEAR_GPIO_OUT_15_TO_8_8821C(x) | BIT_GPIO_OUT_15_TO_8_8821C(v)) 1328 1329 #define BIT_SHIFT_GPIO_IN_15_TO_8_8821C 0 1330 #define BIT_MASK_GPIO_IN_15_TO_8_8821C 0xff 1331 #define BIT_GPIO_IN_15_TO_8_8821C(x) \ 1332 (((x) & BIT_MASK_GPIO_IN_15_TO_8_8821C) \ 1333 << BIT_SHIFT_GPIO_IN_15_TO_8_8821C) 1334 #define BITS_GPIO_IN_15_TO_8_8821C \ 1335 (BIT_MASK_GPIO_IN_15_TO_8_8821C << BIT_SHIFT_GPIO_IN_15_TO_8_8821C) 1336 #define BIT_CLEAR_GPIO_IN_15_TO_8_8821C(x) ((x) & (~BITS_GPIO_IN_15_TO_8_8821C)) 1337 #define BIT_GET_GPIO_IN_15_TO_8_8821C(x) \ 1338 (((x) >> BIT_SHIFT_GPIO_IN_15_TO_8_8821C) & \ 1339 BIT_MASK_GPIO_IN_15_TO_8_8821C) 1340 #define BIT_SET_GPIO_IN_15_TO_8_8821C(x, v) \ 1341 (BIT_CLEAR_GPIO_IN_15_TO_8_8821C(x) | BIT_GPIO_IN_15_TO_8_8821C(v)) 1342 1343 /* 2 REG_PAD_CTRL1_8821C */ 1344 #define BIT_PAPE_WLBT_SEL_8821C BIT(29) 1345 #define BIT_LNAON_WLBT_SEL_8821C BIT(28) 1346 #define BIT_BTGP_GPG3_FEN_8821C BIT(26) 1347 #define BIT_BTGP_GPG2_FEN_8821C BIT(25) 1348 #define BIT_BTGP_JTAG_EN_8821C BIT(24) 1349 #define BIT_XTAL_CLK_EXTARNAL_EN_8821C BIT(23) 1350 #define BIT_BTGP_UART0_EN_8821C BIT(22) 1351 #define BIT_BTGP_UART1_EN_8821C BIT(21) 1352 #define BIT_BTGP_SPI_EN_8821C BIT(20) 1353 #define BIT_BTGP_GPIO_E2_8821C BIT(19) 1354 #define BIT_BTGP_GPIO_EN_8821C BIT(18) 1355 1356 #define BIT_SHIFT_BTGP_GPIO_SL_8821C 16 1357 #define BIT_MASK_BTGP_GPIO_SL_8821C 0x3 1358 #define BIT_BTGP_GPIO_SL_8821C(x) \ 1359 (((x) & BIT_MASK_BTGP_GPIO_SL_8821C) << BIT_SHIFT_BTGP_GPIO_SL_8821C) 1360 #define BITS_BTGP_GPIO_SL_8821C \ 1361 (BIT_MASK_BTGP_GPIO_SL_8821C << BIT_SHIFT_BTGP_GPIO_SL_8821C) 1362 #define BIT_CLEAR_BTGP_GPIO_SL_8821C(x) ((x) & (~BITS_BTGP_GPIO_SL_8821C)) 1363 #define BIT_GET_BTGP_GPIO_SL_8821C(x) \ 1364 (((x) >> BIT_SHIFT_BTGP_GPIO_SL_8821C) & BIT_MASK_BTGP_GPIO_SL_8821C) 1365 #define BIT_SET_BTGP_GPIO_SL_8821C(x, v) \ 1366 (BIT_CLEAR_BTGP_GPIO_SL_8821C(x) | BIT_BTGP_GPIO_SL_8821C(v)) 1367 1368 #define BIT_PAD_SDIO_SR_8821C BIT(14) 1369 #define BIT_GPIO14_OUTPUT_PL_8821C BIT(13) 1370 #define BIT_HOST_WAKE_PAD_PULL_EN_8821C BIT(12) 1371 #define BIT_HOST_WAKE_PAD_SL_8821C BIT(11) 1372 #define BIT_PAD_LNAON_SR_8821C BIT(10) 1373 #define BIT_PAD_LNAON_E2_8821C BIT(9) 1374 #define BIT_SW_LNAON_G_SEL_DATA_8821C BIT(8) 1375 #define BIT_SW_LNAON_A_SEL_DATA_8821C BIT(7) 1376 #define BIT_PAD_PAPE_SR_8821C BIT(6) 1377 #define BIT_PAD_PAPE_E2_8821C BIT(5) 1378 #define BIT_SW_PAPE_G_SEL_DATA_8821C BIT(4) 1379 #define BIT_SW_PAPE_A_SEL_DATA_8821C BIT(3) 1380 #define BIT_PAD_DPDT_SR_8821C BIT(2) 1381 #define BIT_PAD_DPDT_PAD_E2_8821C BIT(1) 1382 #define BIT_SW_DPDT_SEL_DATA_8821C BIT(0) 1383 1384 /* 2 REG_WL_BT_PWR_CTRL_8821C */ 1385 #define BIT_ISO_BD2PP_8821C BIT(31) 1386 #define BIT_LDOV12B_EN_8821C BIT(30) 1387 #define BIT_CKEN_BTGPS_8821C BIT(29) 1388 #define BIT_FEN_BTGPS_8821C BIT(28) 1389 #define BIT_BTCPU_BOOTSEL_8821C BIT(27) 1390 #define BIT_SPI_SPEEDUP_8821C BIT(26) 1391 #define BIT_DEVWAKE_PAD_TYPE_SEL_8821C BIT(24) 1392 #define BIT_CLKREQ_PAD_TYPE_SEL_8821C BIT(23) 1393 #define BIT_ISO_BTPON2PP_8821C BIT(22) 1394 #define BIT_BT_HWROF_EN_8821C BIT(19) 1395 #define BIT_BT_FUNC_EN_8821C BIT(18) 1396 #define BIT_BT_HWPDN_SL_8821C BIT(17) 1397 #define BIT_BT_DISN_EN_8821C BIT(16) 1398 #define BIT_BT_PDN_PULL_EN_8821C BIT(15) 1399 #define BIT_WL_PDN_PULL_EN_8821C BIT(14) 1400 #define BIT_EXTERNAL_REQUEST_PL_8821C BIT(13) 1401 #define BIT_GPIO0_2_3_PULL_LOW_EN_8821C BIT(12) 1402 #define BIT_ISO_BA2PP_8821C BIT(11) 1403 #define BIT_BT_AFE_LDO_EN_8821C BIT(10) 1404 #define BIT_BT_AFE_PLL_EN_8821C BIT(9) 1405 #define BIT_BT_DIG_CLK_EN_8821C BIT(8) 1406 #define BIT_WL_DRV_EXIST_IDX_8821C BIT(5) 1407 #define BIT_DOP_EHPAD_8821C BIT(4) 1408 #define BIT_WL_HWROF_EN_8821C BIT(3) 1409 #define BIT_WL_FUNC_EN_8821C BIT(2) 1410 #define BIT_WL_HWPDN_SL_8821C BIT(1) 1411 #define BIT_WL_HWPDN_EN_8821C BIT(0) 1412 1413 /* 2 REG_SDM_DEBUG_8821C */ 1414 1415 #define BIT_SHIFT_WLCLK_PHASE_8821C 0 1416 #define BIT_MASK_WLCLK_PHASE_8821C 0x1f 1417 #define BIT_WLCLK_PHASE_8821C(x) \ 1418 (((x) & BIT_MASK_WLCLK_PHASE_8821C) << BIT_SHIFT_WLCLK_PHASE_8821C) 1419 #define BITS_WLCLK_PHASE_8821C \ 1420 (BIT_MASK_WLCLK_PHASE_8821C << BIT_SHIFT_WLCLK_PHASE_8821C) 1421 #define BIT_CLEAR_WLCLK_PHASE_8821C(x) ((x) & (~BITS_WLCLK_PHASE_8821C)) 1422 #define BIT_GET_WLCLK_PHASE_8821C(x) \ 1423 (((x) >> BIT_SHIFT_WLCLK_PHASE_8821C) & BIT_MASK_WLCLK_PHASE_8821C) 1424 #define BIT_SET_WLCLK_PHASE_8821C(x, v) \ 1425 (BIT_CLEAR_WLCLK_PHASE_8821C(x) | BIT_WLCLK_PHASE_8821C(v)) 1426 1427 /* 2 REG_SYS_SDIO_CTRL_8821C */ 1428 #define BIT_DBG_GNT_WL_BT_8821C BIT(27) 1429 #define BIT_LTE_MUX_CTRL_PATH_8821C BIT(26) 1430 #define BIT_LTE_COEX_UART_8821C BIT(25) 1431 #define BIT_3W_LTE_WL_GPIO_8821C BIT(24) 1432 #define BIT_SDIO_INT_POLARITY_8821C BIT(19) 1433 #define BIT_SDIO_INT_8821C BIT(18) 1434 #define BIT_SDIO_OFF_EN_8821C BIT(17) 1435 #define BIT_SDIO_ON_EN_8821C BIT(16) 1436 #define BIT_PCIE_WAIT_TIMEOUT_EVENT_8821C BIT(10) 1437 #define BIT_PCIE_WAIT_TIME_8821C BIT(9) 1438 #define BIT_MPCIE_REFCLK_XTAL_SEL_8821C BIT(8) 1439 #define BIT_RES_USB_MASS_STORAGE_DESC_8821C BIT(1) 1440 #define BIT_USB_WAIT_TIME_8821C BIT(0) 1441 1442 /* 2 REG_HCI_OPT_CTRL_8821C */ 1443 1444 #define BIT_SHIFT_TSFT_SEL_8821C 29 1445 #define BIT_MASK_TSFT_SEL_8821C 0x7 1446 #define BIT_TSFT_SEL_8821C(x) \ 1447 (((x) & BIT_MASK_TSFT_SEL_8821C) << BIT_SHIFT_TSFT_SEL_8821C) 1448 #define BITS_TSFT_SEL_8821C \ 1449 (BIT_MASK_TSFT_SEL_8821C << BIT_SHIFT_TSFT_SEL_8821C) 1450 #define BIT_CLEAR_TSFT_SEL_8821C(x) ((x) & (~BITS_TSFT_SEL_8821C)) 1451 #define BIT_GET_TSFT_SEL_8821C(x) \ 1452 (((x) >> BIT_SHIFT_TSFT_SEL_8821C) & BIT_MASK_TSFT_SEL_8821C) 1453 #define BIT_SET_TSFT_SEL_8821C(x, v) \ 1454 (BIT_CLEAR_TSFT_SEL_8821C(x) | BIT_TSFT_SEL_8821C(v)) 1455 1456 #define BIT_SDIO_PAD_E5_8821C BIT(18) 1457 #define BIT_USB_HOST_PWR_OFF_EN_8821C BIT(12) 1458 #define BIT_SYM_LPS_BLOCK_EN_8821C BIT(11) 1459 #define BIT_USB_LPM_ACT_EN_8821C BIT(10) 1460 #define BIT_USB_LPM_NY_8821C BIT(9) 1461 #define BIT_USB_SUS_DIS_8821C BIT(8) 1462 1463 #define BIT_SHIFT_SDIO_PAD_E_8821C 5 1464 #define BIT_MASK_SDIO_PAD_E_8821C 0x7 1465 #define BIT_SDIO_PAD_E_8821C(x) \ 1466 (((x) & BIT_MASK_SDIO_PAD_E_8821C) << BIT_SHIFT_SDIO_PAD_E_8821C) 1467 #define BITS_SDIO_PAD_E_8821C \ 1468 (BIT_MASK_SDIO_PAD_E_8821C << BIT_SHIFT_SDIO_PAD_E_8821C) 1469 #define BIT_CLEAR_SDIO_PAD_E_8821C(x) ((x) & (~BITS_SDIO_PAD_E_8821C)) 1470 #define BIT_GET_SDIO_PAD_E_8821C(x) \ 1471 (((x) >> BIT_SHIFT_SDIO_PAD_E_8821C) & BIT_MASK_SDIO_PAD_E_8821C) 1472 #define BIT_SET_SDIO_PAD_E_8821C(x, v) \ 1473 (BIT_CLEAR_SDIO_PAD_E_8821C(x) | BIT_SDIO_PAD_E_8821C(v)) 1474 1475 #define BIT_USB_LPPLL_EN_8821C BIT(4) 1476 #define BIT_ROP_SW15_8821C BIT(2) 1477 #define BIT_PCI_CKRDY_OPT_8821C BIT(1) 1478 #define BIT_PCI_VAUX_EN_8821C BIT(0) 1479 1480 /* 2 REG_AFE_CTRL4_8821C */ 1481 1482 /* 2 REG_LDO_SWR_CTRL_8821C */ 1483 #define BIT_ZCD_HW_AUTO_EN_8821C BIT(27) 1484 #define BIT_ZCD_REGSEL_8821C BIT(26) 1485 1486 #define BIT_SHIFT_AUTO_ZCD_IN_CODE_8821C 21 1487 #define BIT_MASK_AUTO_ZCD_IN_CODE_8821C 0x1f 1488 #define BIT_AUTO_ZCD_IN_CODE_8821C(x) \ 1489 (((x) & BIT_MASK_AUTO_ZCD_IN_CODE_8821C) \ 1490 << BIT_SHIFT_AUTO_ZCD_IN_CODE_8821C) 1491 #define BITS_AUTO_ZCD_IN_CODE_8821C \ 1492 (BIT_MASK_AUTO_ZCD_IN_CODE_8821C << BIT_SHIFT_AUTO_ZCD_IN_CODE_8821C) 1493 #define BIT_CLEAR_AUTO_ZCD_IN_CODE_8821C(x) \ 1494 ((x) & (~BITS_AUTO_ZCD_IN_CODE_8821C)) 1495 #define BIT_GET_AUTO_ZCD_IN_CODE_8821C(x) \ 1496 (((x) >> BIT_SHIFT_AUTO_ZCD_IN_CODE_8821C) & \ 1497 BIT_MASK_AUTO_ZCD_IN_CODE_8821C) 1498 #define BIT_SET_AUTO_ZCD_IN_CODE_8821C(x, v) \ 1499 (BIT_CLEAR_AUTO_ZCD_IN_CODE_8821C(x) | BIT_AUTO_ZCD_IN_CODE_8821C(v)) 1500 1501 #define BIT_SHIFT_ZCD_CODE_IN_L_8821C 16 1502 #define BIT_MASK_ZCD_CODE_IN_L_8821C 0x1f 1503 #define BIT_ZCD_CODE_IN_L_8821C(x) \ 1504 (((x) & BIT_MASK_ZCD_CODE_IN_L_8821C) << BIT_SHIFT_ZCD_CODE_IN_L_8821C) 1505 #define BITS_ZCD_CODE_IN_L_8821C \ 1506 (BIT_MASK_ZCD_CODE_IN_L_8821C << BIT_SHIFT_ZCD_CODE_IN_L_8821C) 1507 #define BIT_CLEAR_ZCD_CODE_IN_L_8821C(x) ((x) & (~BITS_ZCD_CODE_IN_L_8821C)) 1508 #define BIT_GET_ZCD_CODE_IN_L_8821C(x) \ 1509 (((x) >> BIT_SHIFT_ZCD_CODE_IN_L_8821C) & BIT_MASK_ZCD_CODE_IN_L_8821C) 1510 #define BIT_SET_ZCD_CODE_IN_L_8821C(x, v) \ 1511 (BIT_CLEAR_ZCD_CODE_IN_L_8821C(x) | BIT_ZCD_CODE_IN_L_8821C(v)) 1512 1513 #define BIT_SHIFT_LDO_HV5_DUMMY_8821C 14 1514 #define BIT_MASK_LDO_HV5_DUMMY_8821C 0x3 1515 #define BIT_LDO_HV5_DUMMY_8821C(x) \ 1516 (((x) & BIT_MASK_LDO_HV5_DUMMY_8821C) << BIT_SHIFT_LDO_HV5_DUMMY_8821C) 1517 #define BITS_LDO_HV5_DUMMY_8821C \ 1518 (BIT_MASK_LDO_HV5_DUMMY_8821C << BIT_SHIFT_LDO_HV5_DUMMY_8821C) 1519 #define BIT_CLEAR_LDO_HV5_DUMMY_8821C(x) ((x) & (~BITS_LDO_HV5_DUMMY_8821C)) 1520 #define BIT_GET_LDO_HV5_DUMMY_8821C(x) \ 1521 (((x) >> BIT_SHIFT_LDO_HV5_DUMMY_8821C) & BIT_MASK_LDO_HV5_DUMMY_8821C) 1522 #define BIT_SET_LDO_HV5_DUMMY_8821C(x, v) \ 1523 (BIT_CLEAR_LDO_HV5_DUMMY_8821C(x) | BIT_LDO_HV5_DUMMY_8821C(v)) 1524 1525 #define BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8821C 12 1526 #define BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8821C 0x3 1527 #define BIT_REG_VTUNE33_BIT0_TO_BIT1_8821C(x) \ 1528 (((x) & BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8821C) \ 1529 << BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8821C) 1530 #define BITS_REG_VTUNE33_BIT0_TO_BIT1_8821C \ 1531 (BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8821C \ 1532 << BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8821C) 1533 #define BIT_CLEAR_REG_VTUNE33_BIT0_TO_BIT1_8821C(x) \ 1534 ((x) & (~BITS_REG_VTUNE33_BIT0_TO_BIT1_8821C)) 1535 #define BIT_GET_REG_VTUNE33_BIT0_TO_BIT1_8821C(x) \ 1536 (((x) >> BIT_SHIFT_REG_VTUNE33_BIT0_TO_BIT1_8821C) & \ 1537 BIT_MASK_REG_VTUNE33_BIT0_TO_BIT1_8821C) 1538 #define BIT_SET_REG_VTUNE33_BIT0_TO_BIT1_8821C(x, v) \ 1539 (BIT_CLEAR_REG_VTUNE33_BIT0_TO_BIT1_8821C(x) | \ 1540 BIT_REG_VTUNE33_BIT0_TO_BIT1_8821C(v)) 1541 1542 #define BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8821C 10 1543 #define BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8821C 0x3 1544 #define BIT_REG_STANDBY33_BIT0_TO_BIT1_8821C(x) \ 1545 (((x) & BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8821C) \ 1546 << BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8821C) 1547 #define BITS_REG_STANDBY33_BIT0_TO_BIT1_8821C \ 1548 (BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8821C \ 1549 << BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8821C) 1550 #define BIT_CLEAR_REG_STANDBY33_BIT0_TO_BIT1_8821C(x) \ 1551 ((x) & (~BITS_REG_STANDBY33_BIT0_TO_BIT1_8821C)) 1552 #define BIT_GET_REG_STANDBY33_BIT0_TO_BIT1_8821C(x) \ 1553 (((x) >> BIT_SHIFT_REG_STANDBY33_BIT0_TO_BIT1_8821C) & \ 1554 BIT_MASK_REG_STANDBY33_BIT0_TO_BIT1_8821C) 1555 #define BIT_SET_REG_STANDBY33_BIT0_TO_BIT1_8821C(x, v) \ 1556 (BIT_CLEAR_REG_STANDBY33_BIT0_TO_BIT1_8821C(x) | \ 1557 BIT_REG_STANDBY33_BIT0_TO_BIT1_8821C(v)) 1558 1559 #define BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8821C 8 1560 #define BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8821C 0x3 1561 #define BIT_REG_LOAD33_BIT0_TO_BIT1_8821C(x) \ 1562 (((x) & BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8821C) \ 1563 << BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8821C) 1564 #define BITS_REG_LOAD33_BIT0_TO_BIT1_8821C \ 1565 (BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8821C \ 1566 << BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8821C) 1567 #define BIT_CLEAR_REG_LOAD33_BIT0_TO_BIT1_8821C(x) \ 1568 ((x) & (~BITS_REG_LOAD33_BIT0_TO_BIT1_8821C)) 1569 #define BIT_GET_REG_LOAD33_BIT0_TO_BIT1_8821C(x) \ 1570 (((x) >> BIT_SHIFT_REG_LOAD33_BIT0_TO_BIT1_8821C) & \ 1571 BIT_MASK_REG_LOAD33_BIT0_TO_BIT1_8821C) 1572 #define BIT_SET_REG_LOAD33_BIT0_TO_BIT1_8821C(x, v) \ 1573 (BIT_CLEAR_REG_LOAD33_BIT0_TO_BIT1_8821C(x) | \ 1574 BIT_REG_LOAD33_BIT0_TO_BIT1_8821C(v)) 1575 1576 #define BIT_REG_BYPASS_L_8821C BIT(7) 1577 #define BIT_REG_LDOF_L_8821C BIT(6) 1578 #define BIT_REG_OCPS_L_8821C BIT(5) 1579 #define BIT_ARENB_L_8821C BIT(3) 1580 1581 #define BIT_SHIFT_CFC_L_8821C 1 1582 #define BIT_MASK_CFC_L_8821C 0x3 1583 #define BIT_CFC_L_8821C(x) \ 1584 (((x) & BIT_MASK_CFC_L_8821C) << BIT_SHIFT_CFC_L_8821C) 1585 #define BITS_CFC_L_8821C (BIT_MASK_CFC_L_8821C << BIT_SHIFT_CFC_L_8821C) 1586 #define BIT_CLEAR_CFC_L_8821C(x) ((x) & (~BITS_CFC_L_8821C)) 1587 #define BIT_GET_CFC_L_8821C(x) \ 1588 (((x) >> BIT_SHIFT_CFC_L_8821C) & BIT_MASK_CFC_L_8821C) 1589 #define BIT_SET_CFC_L_8821C(x, v) \ 1590 (BIT_CLEAR_CFC_L_8821C(x) | BIT_CFC_L_8821C(v)) 1591 1592 #define BIT_REG_TYPE_L_8821C BIT(0) 1593 1594 /* 2 REG_MCUFW_CTRL_8821C */ 1595 1596 #define BIT_SHIFT_RPWM_8821C 24 1597 #define BIT_MASK_RPWM_8821C 0xff 1598 #define BIT_RPWM_8821C(x) (((x) & BIT_MASK_RPWM_8821C) << BIT_SHIFT_RPWM_8821C) 1599 #define BITS_RPWM_8821C (BIT_MASK_RPWM_8821C << BIT_SHIFT_RPWM_8821C) 1600 #define BIT_CLEAR_RPWM_8821C(x) ((x) & (~BITS_RPWM_8821C)) 1601 #define BIT_GET_RPWM_8821C(x) \ 1602 (((x) >> BIT_SHIFT_RPWM_8821C) & BIT_MASK_RPWM_8821C) 1603 #define BIT_SET_RPWM_8821C(x, v) (BIT_CLEAR_RPWM_8821C(x) | BIT_RPWM_8821C(v)) 1604 1605 #define BIT_ANA_PORT_EN_8821C BIT(22) 1606 #define BIT_MAC_PORT_EN_8821C BIT(21) 1607 #define BIT_BOOT_FSPI_EN_8821C BIT(20) 1608 #define BIT_ROM_DLEN_8821C BIT(19) 1609 1610 #define BIT_SHIFT_ROM_PGE_8821C 16 1611 #define BIT_MASK_ROM_PGE_8821C 0x7 1612 #define BIT_ROM_PGE_8821C(x) \ 1613 (((x) & BIT_MASK_ROM_PGE_8821C) << BIT_SHIFT_ROM_PGE_8821C) 1614 #define BITS_ROM_PGE_8821C (BIT_MASK_ROM_PGE_8821C << BIT_SHIFT_ROM_PGE_8821C) 1615 #define BIT_CLEAR_ROM_PGE_8821C(x) ((x) & (~BITS_ROM_PGE_8821C)) 1616 #define BIT_GET_ROM_PGE_8821C(x) \ 1617 (((x) >> BIT_SHIFT_ROM_PGE_8821C) & BIT_MASK_ROM_PGE_8821C) 1618 #define BIT_SET_ROM_PGE_8821C(x, v) \ 1619 (BIT_CLEAR_ROM_PGE_8821C(x) | BIT_ROM_PGE_8821C(v)) 1620 1621 #define BIT_FW_INIT_RDY_8821C BIT(15) 1622 #define BIT_FW_DW_RDY_8821C BIT(14) 1623 1624 #define BIT_SHIFT_CPU_CLK_SEL_8821C 12 1625 #define BIT_MASK_CPU_CLK_SEL_8821C 0x3 1626 #define BIT_CPU_CLK_SEL_8821C(x) \ 1627 (((x) & BIT_MASK_CPU_CLK_SEL_8821C) << BIT_SHIFT_CPU_CLK_SEL_8821C) 1628 #define BITS_CPU_CLK_SEL_8821C \ 1629 (BIT_MASK_CPU_CLK_SEL_8821C << BIT_SHIFT_CPU_CLK_SEL_8821C) 1630 #define BIT_CLEAR_CPU_CLK_SEL_8821C(x) ((x) & (~BITS_CPU_CLK_SEL_8821C)) 1631 #define BIT_GET_CPU_CLK_SEL_8821C(x) \ 1632 (((x) >> BIT_SHIFT_CPU_CLK_SEL_8821C) & BIT_MASK_CPU_CLK_SEL_8821C) 1633 #define BIT_SET_CPU_CLK_SEL_8821C(x, v) \ 1634 (BIT_CLEAR_CPU_CLK_SEL_8821C(x) | BIT_CPU_CLK_SEL_8821C(v)) 1635 1636 #define BIT_CCLK_CHG_MASK_8821C BIT(11) 1637 #define BIT_EMEM__TXBUF_CHKSUM_OK_8821C BIT(10) 1638 #define BIT_EMEM_TXBUF_DW_RDY_8821C BIT(9) 1639 #define BIT_EMEM_CHKSUM_OK_8821C BIT(8) 1640 #define BIT_EMEM_DW_OK_8821C BIT(7) 1641 #define BIT_DMEM_CHKSUM_OK_8821C BIT(6) 1642 #define BIT_DMEM_DW_OK_8821C BIT(5) 1643 #define BIT_IMEM_CHKSUM_OK_8821C BIT(4) 1644 #define BIT_IMEM_DW_OK_8821C BIT(3) 1645 #define BIT_IMEM_BOOT_LOAD_CHKSUM_OK_8821C BIT(2) 1646 #define BIT_IMEM_BOOT_LOAD_DW_OK_8821C BIT(1) 1647 #define BIT_MCUFWDL_EN_8821C BIT(0) 1648 1649 /* 2 REG_MCU_TST_CFG_8821C */ 1650 1651 #define BIT_SHIFT_C2H_MSG_8821C 0 1652 #define BIT_MASK_C2H_MSG_8821C 0xffff 1653 #define BIT_C2H_MSG_8821C(x) \ 1654 (((x) & BIT_MASK_C2H_MSG_8821C) << BIT_SHIFT_C2H_MSG_8821C) 1655 #define BITS_C2H_MSG_8821C (BIT_MASK_C2H_MSG_8821C << BIT_SHIFT_C2H_MSG_8821C) 1656 #define BIT_CLEAR_C2H_MSG_8821C(x) ((x) & (~BITS_C2H_MSG_8821C)) 1657 #define BIT_GET_C2H_MSG_8821C(x) \ 1658 (((x) >> BIT_SHIFT_C2H_MSG_8821C) & BIT_MASK_C2H_MSG_8821C) 1659 #define BIT_SET_C2H_MSG_8821C(x, v) \ 1660 (BIT_CLEAR_C2H_MSG_8821C(x) | BIT_C2H_MSG_8821C(v)) 1661 1662 /* 2 REG_HMEBOX_E0_E1_8821C */ 1663 1664 #define BIT_SHIFT_HOST_MSG_E1_8821C 16 1665 #define BIT_MASK_HOST_MSG_E1_8821C 0xffff 1666 #define BIT_HOST_MSG_E1_8821C(x) \ 1667 (((x) & BIT_MASK_HOST_MSG_E1_8821C) << BIT_SHIFT_HOST_MSG_E1_8821C) 1668 #define BITS_HOST_MSG_E1_8821C \ 1669 (BIT_MASK_HOST_MSG_E1_8821C << BIT_SHIFT_HOST_MSG_E1_8821C) 1670 #define BIT_CLEAR_HOST_MSG_E1_8821C(x) ((x) & (~BITS_HOST_MSG_E1_8821C)) 1671 #define BIT_GET_HOST_MSG_E1_8821C(x) \ 1672 (((x) >> BIT_SHIFT_HOST_MSG_E1_8821C) & BIT_MASK_HOST_MSG_E1_8821C) 1673 #define BIT_SET_HOST_MSG_E1_8821C(x, v) \ 1674 (BIT_CLEAR_HOST_MSG_E1_8821C(x) | BIT_HOST_MSG_E1_8821C(v)) 1675 1676 #define BIT_SHIFT_HOST_MSG_E0_8821C 0 1677 #define BIT_MASK_HOST_MSG_E0_8821C 0xffff 1678 #define BIT_HOST_MSG_E0_8821C(x) \ 1679 (((x) & BIT_MASK_HOST_MSG_E0_8821C) << BIT_SHIFT_HOST_MSG_E0_8821C) 1680 #define BITS_HOST_MSG_E0_8821C \ 1681 (BIT_MASK_HOST_MSG_E0_8821C << BIT_SHIFT_HOST_MSG_E0_8821C) 1682 #define BIT_CLEAR_HOST_MSG_E0_8821C(x) ((x) & (~BITS_HOST_MSG_E0_8821C)) 1683 #define BIT_GET_HOST_MSG_E0_8821C(x) \ 1684 (((x) >> BIT_SHIFT_HOST_MSG_E0_8821C) & BIT_MASK_HOST_MSG_E0_8821C) 1685 #define BIT_SET_HOST_MSG_E0_8821C(x, v) \ 1686 (BIT_CLEAR_HOST_MSG_E0_8821C(x) | BIT_HOST_MSG_E0_8821C(v)) 1687 1688 /* 2 REG_HMEBOX_E2_E3_8821C */ 1689 1690 #define BIT_SHIFT_HOST_MSG_E3_8821C 16 1691 #define BIT_MASK_HOST_MSG_E3_8821C 0xffff 1692 #define BIT_HOST_MSG_E3_8821C(x) \ 1693 (((x) & BIT_MASK_HOST_MSG_E3_8821C) << BIT_SHIFT_HOST_MSG_E3_8821C) 1694 #define BITS_HOST_MSG_E3_8821C \ 1695 (BIT_MASK_HOST_MSG_E3_8821C << BIT_SHIFT_HOST_MSG_E3_8821C) 1696 #define BIT_CLEAR_HOST_MSG_E3_8821C(x) ((x) & (~BITS_HOST_MSG_E3_8821C)) 1697 #define BIT_GET_HOST_MSG_E3_8821C(x) \ 1698 (((x) >> BIT_SHIFT_HOST_MSG_E3_8821C) & BIT_MASK_HOST_MSG_E3_8821C) 1699 #define BIT_SET_HOST_MSG_E3_8821C(x, v) \ 1700 (BIT_CLEAR_HOST_MSG_E3_8821C(x) | BIT_HOST_MSG_E3_8821C(v)) 1701 1702 #define BIT_SHIFT_HOST_MSG_E2_8821C 0 1703 #define BIT_MASK_HOST_MSG_E2_8821C 0xffff 1704 #define BIT_HOST_MSG_E2_8821C(x) \ 1705 (((x) & BIT_MASK_HOST_MSG_E2_8821C) << BIT_SHIFT_HOST_MSG_E2_8821C) 1706 #define BITS_HOST_MSG_E2_8821C \ 1707 (BIT_MASK_HOST_MSG_E2_8821C << BIT_SHIFT_HOST_MSG_E2_8821C) 1708 #define BIT_CLEAR_HOST_MSG_E2_8821C(x) ((x) & (~BITS_HOST_MSG_E2_8821C)) 1709 #define BIT_GET_HOST_MSG_E2_8821C(x) \ 1710 (((x) >> BIT_SHIFT_HOST_MSG_E2_8821C) & BIT_MASK_HOST_MSG_E2_8821C) 1711 #define BIT_SET_HOST_MSG_E2_8821C(x, v) \ 1712 (BIT_CLEAR_HOST_MSG_E2_8821C(x) | BIT_HOST_MSG_E2_8821C(v)) 1713 1714 /* 2 REG_WLLPS_CTRL_8821C */ 1715 #define BIT_WLLPSOP_EABM_8821C BIT(31) 1716 #define BIT_WLLPSOP_ACKF_8821C BIT(30) 1717 #define BIT_WLLPSOP_DLDM_8821C BIT(29) 1718 #define BIT_WLLPSOP_ESWR_8821C BIT(28) 1719 #define BIT_WLLPSOP_PWMM_8821C BIT(27) 1720 #define BIT_WLLPSOP_EECK_8821C BIT(26) 1721 #define BIT_WLLPSOP_WLMACOFF_8821C BIT(25) 1722 #define BIT_WLLPSOP_EXTAL_8821C BIT(24) 1723 #define BIT_WL_SYNPON_VOLTSPDN_8821C BIT(23) 1724 #define BIT_WLLPSOP_WLBBOFF_8821C BIT(22) 1725 #define BIT_WLLPSOP_WLMEM_DS_8821C BIT(21) 1726 1727 #define BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8821C 12 1728 #define BIT_MASK_LPLDH12_VADJ_STEP_DN_8821C 0xf 1729 #define BIT_LPLDH12_VADJ_STEP_DN_8821C(x) \ 1730 (((x) & BIT_MASK_LPLDH12_VADJ_STEP_DN_8821C) \ 1731 << BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8821C) 1732 #define BITS_LPLDH12_VADJ_STEP_DN_8821C \ 1733 (BIT_MASK_LPLDH12_VADJ_STEP_DN_8821C \ 1734 << BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8821C) 1735 #define BIT_CLEAR_LPLDH12_VADJ_STEP_DN_8821C(x) \ 1736 ((x) & (~BITS_LPLDH12_VADJ_STEP_DN_8821C)) 1737 #define BIT_GET_LPLDH12_VADJ_STEP_DN_8821C(x) \ 1738 (((x) >> BIT_SHIFT_LPLDH12_VADJ_STEP_DN_8821C) & \ 1739 BIT_MASK_LPLDH12_VADJ_STEP_DN_8821C) 1740 #define BIT_SET_LPLDH12_VADJ_STEP_DN_8821C(x, v) \ 1741 (BIT_CLEAR_LPLDH12_VADJ_STEP_DN_8821C(x) | \ 1742 BIT_LPLDH12_VADJ_STEP_DN_8821C(v)) 1743 1744 #define BIT_SHIFT_V15ADJ_L1_STEP_DN_8821C 8 1745 #define BIT_MASK_V15ADJ_L1_STEP_DN_8821C 0x7 1746 #define BIT_V15ADJ_L1_STEP_DN_8821C(x) \ 1747 (((x) & BIT_MASK_V15ADJ_L1_STEP_DN_8821C) \ 1748 << BIT_SHIFT_V15ADJ_L1_STEP_DN_8821C) 1749 #define BITS_V15ADJ_L1_STEP_DN_8821C \ 1750 (BIT_MASK_V15ADJ_L1_STEP_DN_8821C << BIT_SHIFT_V15ADJ_L1_STEP_DN_8821C) 1751 #define BIT_CLEAR_V15ADJ_L1_STEP_DN_8821C(x) \ 1752 ((x) & (~BITS_V15ADJ_L1_STEP_DN_8821C)) 1753 #define BIT_GET_V15ADJ_L1_STEP_DN_8821C(x) \ 1754 (((x) >> BIT_SHIFT_V15ADJ_L1_STEP_DN_8821C) & \ 1755 BIT_MASK_V15ADJ_L1_STEP_DN_8821C) 1756 #define BIT_SET_V15ADJ_L1_STEP_DN_8821C(x, v) \ 1757 (BIT_CLEAR_V15ADJ_L1_STEP_DN_8821C(x) | BIT_V15ADJ_L1_STEP_DN_8821C(v)) 1758 1759 #define BIT_REGU_32K_CLK_EN_8821C BIT(1) 1760 #define BIT_WL_LPS_EN_8821C BIT(0) 1761 1762 /* 2 REG_AFE_CTRL5_8821C */ 1763 #define BIT_BB_DBG_SEL_AFE_SDM_BIT0_8821C BIT(31) 1764 #define BIT_ORDER_SDM_8821C BIT(30) 1765 #define BIT_RFE_SEL_SDM_8821C BIT(29) 1766 1767 #define BIT_SHIFT_REF_SEL_8821C 25 1768 #define BIT_MASK_REF_SEL_8821C 0xf 1769 #define BIT_REF_SEL_8821C(x) \ 1770 (((x) & BIT_MASK_REF_SEL_8821C) << BIT_SHIFT_REF_SEL_8821C) 1771 #define BITS_REF_SEL_8821C (BIT_MASK_REF_SEL_8821C << BIT_SHIFT_REF_SEL_8821C) 1772 #define BIT_CLEAR_REF_SEL_8821C(x) ((x) & (~BITS_REF_SEL_8821C)) 1773 #define BIT_GET_REF_SEL_8821C(x) \ 1774 (((x) >> BIT_SHIFT_REF_SEL_8821C) & BIT_MASK_REF_SEL_8821C) 1775 #define BIT_SET_REF_SEL_8821C(x, v) \ 1776 (BIT_CLEAR_REF_SEL_8821C(x) | BIT_REF_SEL_8821C(v)) 1777 1778 #define BIT_SHIFT_F0F_SDM_8821C 12 1779 #define BIT_MASK_F0F_SDM_8821C 0x1fff 1780 #define BIT_F0F_SDM_8821C(x) \ 1781 (((x) & BIT_MASK_F0F_SDM_8821C) << BIT_SHIFT_F0F_SDM_8821C) 1782 #define BITS_F0F_SDM_8821C (BIT_MASK_F0F_SDM_8821C << BIT_SHIFT_F0F_SDM_8821C) 1783 #define BIT_CLEAR_F0F_SDM_8821C(x) ((x) & (~BITS_F0F_SDM_8821C)) 1784 #define BIT_GET_F0F_SDM_8821C(x) \ 1785 (((x) >> BIT_SHIFT_F0F_SDM_8821C) & BIT_MASK_F0F_SDM_8821C) 1786 #define BIT_SET_F0F_SDM_8821C(x, v) \ 1787 (BIT_CLEAR_F0F_SDM_8821C(x) | BIT_F0F_SDM_8821C(v)) 1788 1789 #define BIT_SHIFT_F0N_SDM_8821C 9 1790 #define BIT_MASK_F0N_SDM_8821C 0x7 1791 #define BIT_F0N_SDM_8821C(x) \ 1792 (((x) & BIT_MASK_F0N_SDM_8821C) << BIT_SHIFT_F0N_SDM_8821C) 1793 #define BITS_F0N_SDM_8821C (BIT_MASK_F0N_SDM_8821C << BIT_SHIFT_F0N_SDM_8821C) 1794 #define BIT_CLEAR_F0N_SDM_8821C(x) ((x) & (~BITS_F0N_SDM_8821C)) 1795 #define BIT_GET_F0N_SDM_8821C(x) \ 1796 (((x) >> BIT_SHIFT_F0N_SDM_8821C) & BIT_MASK_F0N_SDM_8821C) 1797 #define BIT_SET_F0N_SDM_8821C(x, v) \ 1798 (BIT_CLEAR_F0N_SDM_8821C(x) | BIT_F0N_SDM_8821C(v)) 1799 1800 #define BIT_SHIFT_DIVN_SDM_8821C 3 1801 #define BIT_MASK_DIVN_SDM_8821C 0x3f 1802 #define BIT_DIVN_SDM_8821C(x) \ 1803 (((x) & BIT_MASK_DIVN_SDM_8821C) << BIT_SHIFT_DIVN_SDM_8821C) 1804 #define BITS_DIVN_SDM_8821C \ 1805 (BIT_MASK_DIVN_SDM_8821C << BIT_SHIFT_DIVN_SDM_8821C) 1806 #define BIT_CLEAR_DIVN_SDM_8821C(x) ((x) & (~BITS_DIVN_SDM_8821C)) 1807 #define BIT_GET_DIVN_SDM_8821C(x) \ 1808 (((x) >> BIT_SHIFT_DIVN_SDM_8821C) & BIT_MASK_DIVN_SDM_8821C) 1809 #define BIT_SET_DIVN_SDM_8821C(x, v) \ 1810 (BIT_CLEAR_DIVN_SDM_8821C(x) | BIT_DIVN_SDM_8821C(v)) 1811 1812 /* 2 REG_GPIO_DEBOUNCE_CTRL_8821C */ 1813 #define BIT_WLGP_DBC1EN_8821C BIT(15) 1814 1815 #define BIT_SHIFT_WLGP_DBC1_8821C 8 1816 #define BIT_MASK_WLGP_DBC1_8821C 0xf 1817 #define BIT_WLGP_DBC1_8821C(x) \ 1818 (((x) & BIT_MASK_WLGP_DBC1_8821C) << BIT_SHIFT_WLGP_DBC1_8821C) 1819 #define BITS_WLGP_DBC1_8821C \ 1820 (BIT_MASK_WLGP_DBC1_8821C << BIT_SHIFT_WLGP_DBC1_8821C) 1821 #define BIT_CLEAR_WLGP_DBC1_8821C(x) ((x) & (~BITS_WLGP_DBC1_8821C)) 1822 #define BIT_GET_WLGP_DBC1_8821C(x) \ 1823 (((x) >> BIT_SHIFT_WLGP_DBC1_8821C) & BIT_MASK_WLGP_DBC1_8821C) 1824 #define BIT_SET_WLGP_DBC1_8821C(x, v) \ 1825 (BIT_CLEAR_WLGP_DBC1_8821C(x) | BIT_WLGP_DBC1_8821C(v)) 1826 1827 #define BIT_WLGP_DBC0EN_8821C BIT(7) 1828 1829 #define BIT_SHIFT_WLGP_DBC0_8821C 0 1830 #define BIT_MASK_WLGP_DBC0_8821C 0xf 1831 #define BIT_WLGP_DBC0_8821C(x) \ 1832 (((x) & BIT_MASK_WLGP_DBC0_8821C) << BIT_SHIFT_WLGP_DBC0_8821C) 1833 #define BITS_WLGP_DBC0_8821C \ 1834 (BIT_MASK_WLGP_DBC0_8821C << BIT_SHIFT_WLGP_DBC0_8821C) 1835 #define BIT_CLEAR_WLGP_DBC0_8821C(x) ((x) & (~BITS_WLGP_DBC0_8821C)) 1836 #define BIT_GET_WLGP_DBC0_8821C(x) \ 1837 (((x) >> BIT_SHIFT_WLGP_DBC0_8821C) & BIT_MASK_WLGP_DBC0_8821C) 1838 #define BIT_SET_WLGP_DBC0_8821C(x, v) \ 1839 (BIT_CLEAR_WLGP_DBC0_8821C(x) | BIT_WLGP_DBC0_8821C(v)) 1840 1841 /* 2 REG_RPWM2_8821C */ 1842 1843 #define BIT_SHIFT_RPWM2_8821C 16 1844 #define BIT_MASK_RPWM2_8821C 0xffff 1845 #define BIT_RPWM2_8821C(x) \ 1846 (((x) & BIT_MASK_RPWM2_8821C) << BIT_SHIFT_RPWM2_8821C) 1847 #define BITS_RPWM2_8821C (BIT_MASK_RPWM2_8821C << BIT_SHIFT_RPWM2_8821C) 1848 #define BIT_CLEAR_RPWM2_8821C(x) ((x) & (~BITS_RPWM2_8821C)) 1849 #define BIT_GET_RPWM2_8821C(x) \ 1850 (((x) >> BIT_SHIFT_RPWM2_8821C) & BIT_MASK_RPWM2_8821C) 1851 #define BIT_SET_RPWM2_8821C(x, v) \ 1852 (BIT_CLEAR_RPWM2_8821C(x) | BIT_RPWM2_8821C(v)) 1853 1854 /* 2 REG_SYSON_FSM_MON_8821C */ 1855 1856 #define BIT_SHIFT_FSM_MON_SEL_8821C 24 1857 #define BIT_MASK_FSM_MON_SEL_8821C 0x7 1858 #define BIT_FSM_MON_SEL_8821C(x) \ 1859 (((x) & BIT_MASK_FSM_MON_SEL_8821C) << BIT_SHIFT_FSM_MON_SEL_8821C) 1860 #define BITS_FSM_MON_SEL_8821C \ 1861 (BIT_MASK_FSM_MON_SEL_8821C << BIT_SHIFT_FSM_MON_SEL_8821C) 1862 #define BIT_CLEAR_FSM_MON_SEL_8821C(x) ((x) & (~BITS_FSM_MON_SEL_8821C)) 1863 #define BIT_GET_FSM_MON_SEL_8821C(x) \ 1864 (((x) >> BIT_SHIFT_FSM_MON_SEL_8821C) & BIT_MASK_FSM_MON_SEL_8821C) 1865 #define BIT_SET_FSM_MON_SEL_8821C(x, v) \ 1866 (BIT_CLEAR_FSM_MON_SEL_8821C(x) | BIT_FSM_MON_SEL_8821C(v)) 1867 1868 #define BIT_DOP_ELDO_8821C BIT(23) 1869 #define BIT_FSM_MON_UPD_8821C BIT(15) 1870 1871 #define BIT_SHIFT_FSM_PAR_8821C 0 1872 #define BIT_MASK_FSM_PAR_8821C 0x7fff 1873 #define BIT_FSM_PAR_8821C(x) \ 1874 (((x) & BIT_MASK_FSM_PAR_8821C) << BIT_SHIFT_FSM_PAR_8821C) 1875 #define BITS_FSM_PAR_8821C (BIT_MASK_FSM_PAR_8821C << BIT_SHIFT_FSM_PAR_8821C) 1876 #define BIT_CLEAR_FSM_PAR_8821C(x) ((x) & (~BITS_FSM_PAR_8821C)) 1877 #define BIT_GET_FSM_PAR_8821C(x) \ 1878 (((x) >> BIT_SHIFT_FSM_PAR_8821C) & BIT_MASK_FSM_PAR_8821C) 1879 #define BIT_SET_FSM_PAR_8821C(x, v) \ 1880 (BIT_CLEAR_FSM_PAR_8821C(x) | BIT_FSM_PAR_8821C(v)) 1881 1882 /* 2 REG_AFE_CTRL6_8821C */ 1883 1884 #define BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C 0 1885 #define BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C 0x7 1886 #define BIT_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C(x) \ 1887 (((x) & BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C) \ 1888 << BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C) 1889 #define BITS_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C \ 1890 (BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C \ 1891 << BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C) 1892 #define BIT_CLEAR_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C(x) \ 1893 ((x) & (~BITS_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C)) 1894 #define BIT_GET_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C(x) \ 1895 (((x) >> BIT_SHIFT_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C) & \ 1896 BIT_MASK_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C) 1897 #define BIT_SET_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C(x, v) \ 1898 (BIT_CLEAR_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C(x) | \ 1899 BIT_BB_DBG_SEL_AFE_SDM_BIT3_1_8821C(v)) 1900 1901 /* 2 REG_PMC_DBG_CTRL1_8821C */ 1902 #define BIT_BT_INT_EN_8821C BIT(31) 1903 1904 #define BIT_SHIFT_RD_WR_WIFI_BT_INFO_8821C 16 1905 #define BIT_MASK_RD_WR_WIFI_BT_INFO_8821C 0x7fff 1906 #define BIT_RD_WR_WIFI_BT_INFO_8821C(x) \ 1907 (((x) & BIT_MASK_RD_WR_WIFI_BT_INFO_8821C) \ 1908 << BIT_SHIFT_RD_WR_WIFI_BT_INFO_8821C) 1909 #define BITS_RD_WR_WIFI_BT_INFO_8821C \ 1910 (BIT_MASK_RD_WR_WIFI_BT_INFO_8821C \ 1911 << BIT_SHIFT_RD_WR_WIFI_BT_INFO_8821C) 1912 #define BIT_CLEAR_RD_WR_WIFI_BT_INFO_8821C(x) \ 1913 ((x) & (~BITS_RD_WR_WIFI_BT_INFO_8821C)) 1914 #define BIT_GET_RD_WR_WIFI_BT_INFO_8821C(x) \ 1915 (((x) >> BIT_SHIFT_RD_WR_WIFI_BT_INFO_8821C) & \ 1916 BIT_MASK_RD_WR_WIFI_BT_INFO_8821C) 1917 #define BIT_SET_RD_WR_WIFI_BT_INFO_8821C(x, v) \ 1918 (BIT_CLEAR_RD_WR_WIFI_BT_INFO_8821C(x) | \ 1919 BIT_RD_WR_WIFI_BT_INFO_8821C(v)) 1920 1921 #define BIT_PMC_WR_OVF_8821C BIT(8) 1922 1923 #define BIT_SHIFT_WLPMC_ERRINT_8821C 0 1924 #define BIT_MASK_WLPMC_ERRINT_8821C 0xff 1925 #define BIT_WLPMC_ERRINT_8821C(x) \ 1926 (((x) & BIT_MASK_WLPMC_ERRINT_8821C) << BIT_SHIFT_WLPMC_ERRINT_8821C) 1927 #define BITS_WLPMC_ERRINT_8821C \ 1928 (BIT_MASK_WLPMC_ERRINT_8821C << BIT_SHIFT_WLPMC_ERRINT_8821C) 1929 #define BIT_CLEAR_WLPMC_ERRINT_8821C(x) ((x) & (~BITS_WLPMC_ERRINT_8821C)) 1930 #define BIT_GET_WLPMC_ERRINT_8821C(x) \ 1931 (((x) >> BIT_SHIFT_WLPMC_ERRINT_8821C) & BIT_MASK_WLPMC_ERRINT_8821C) 1932 #define BIT_SET_WLPMC_ERRINT_8821C(x, v) \ 1933 (BIT_CLEAR_WLPMC_ERRINT_8821C(x) | BIT_WLPMC_ERRINT_8821C(v)) 1934 1935 /* 2 REG_AFE_CTRL7_8821C */ 1936 1937 #define BIT_SHIFT_SEL_V_8821C 30 1938 #define BIT_MASK_SEL_V_8821C 0x3 1939 #define BIT_SEL_V_8821C(x) \ 1940 (((x) & BIT_MASK_SEL_V_8821C) << BIT_SHIFT_SEL_V_8821C) 1941 #define BITS_SEL_V_8821C (BIT_MASK_SEL_V_8821C << BIT_SHIFT_SEL_V_8821C) 1942 #define BIT_CLEAR_SEL_V_8821C(x) ((x) & (~BITS_SEL_V_8821C)) 1943 #define BIT_GET_SEL_V_8821C(x) \ 1944 (((x) >> BIT_SHIFT_SEL_V_8821C) & BIT_MASK_SEL_V_8821C) 1945 #define BIT_SET_SEL_V_8821C(x, v) \ 1946 (BIT_CLEAR_SEL_V_8821C(x) | BIT_SEL_V_8821C(v)) 1947 1948 #define BIT_SEL_LDO_PC_8821C BIT(29) 1949 1950 #define BIT_SHIFT_CK_MON_SEL_8821C 26 1951 #define BIT_MASK_CK_MON_SEL_8821C 0x7 1952 #define BIT_CK_MON_SEL_8821C(x) \ 1953 (((x) & BIT_MASK_CK_MON_SEL_8821C) << BIT_SHIFT_CK_MON_SEL_8821C) 1954 #define BITS_CK_MON_SEL_8821C \ 1955 (BIT_MASK_CK_MON_SEL_8821C << BIT_SHIFT_CK_MON_SEL_8821C) 1956 #define BIT_CLEAR_CK_MON_SEL_8821C(x) ((x) & (~BITS_CK_MON_SEL_8821C)) 1957 #define BIT_GET_CK_MON_SEL_8821C(x) \ 1958 (((x) >> BIT_SHIFT_CK_MON_SEL_8821C) & BIT_MASK_CK_MON_SEL_8821C) 1959 #define BIT_SET_CK_MON_SEL_8821C(x, v) \ 1960 (BIT_CLEAR_CK_MON_SEL_8821C(x) | BIT_CK_MON_SEL_8821C(v)) 1961 1962 #define BIT_CK_MON_EN_8821C BIT(25) 1963 #define BIT_FREF_EDGE_8821C BIT(24) 1964 #define BIT_CK320M_EN_8821C BIT(23) 1965 #define BIT_CK_5M_EN_8821C BIT(22) 1966 #define BIT_TESTEN_8821C BIT(21) 1967 1968 /* 2 REG_HIMR0_8821C */ 1969 #define BIT_TIMEOUT_INTERRUPT2_MASK_8821C BIT(31) 1970 #define BIT_TIMEOUT_INTERRUTP1_MASK_8821C BIT(30) 1971 #define BIT_PSTIMEOUT_MSK_8821C BIT(29) 1972 #define BIT_GTINT4_MSK_8821C BIT(28) 1973 #define BIT_GTINT3_MSK_8821C BIT(27) 1974 #define BIT_TXBCN0ERR_MSK_8821C BIT(26) 1975 #define BIT_TXBCN0OK_MSK_8821C BIT(25) 1976 #define BIT_TSF_BIT32_TOGGLE_MSK_8821C BIT(24) 1977 #define BIT_BCNDMAINT0_MSK_8821C BIT(20) 1978 #define BIT_BCNDERR0_MSK_8821C BIT(16) 1979 #define BIT_HSISR_IND_ON_INT_MSK_8821C BIT(15) 1980 #define BIT_BCNDMAINT_E_MSK_8821C BIT(14) 1981 #define BIT_CTWEND_MSK_8821C BIT(12) 1982 #define BIT_HISR1_IND_MSK_8821C BIT(11) 1983 #define BIT_C2HCMD_MSK_8821C BIT(10) 1984 #define BIT_CPWM2_MSK_8821C BIT(9) 1985 #define BIT_CPWM_MSK_8821C BIT(8) 1986 #define BIT_HIGHDOK_MSK_8821C BIT(7) 1987 #define BIT_MGTDOK_MSK_8821C BIT(6) 1988 #define BIT_BKDOK_MSK_8821C BIT(5) 1989 #define BIT_BEDOK_MSK_8821C BIT(4) 1990 #define BIT_VIDOK_MSK_8821C BIT(3) 1991 #define BIT_VODOK_MSK_8821C BIT(2) 1992 #define BIT_RDU_MSK_8821C BIT(1) 1993 #define BIT_RXOK_MSK_8821C BIT(0) 1994 1995 /* 2 REG_HISR0_8821C */ 1996 #define BIT_PSTIMEOUT2_8821C BIT(31) 1997 #define BIT_PSTIMEOUT1_8821C BIT(30) 1998 #define BIT_PSTIMEOUT_8821C BIT(29) 1999 #define BIT_GTINT4_8821C BIT(28) 2000 #define BIT_GTINT3_8821C BIT(27) 2001 #define BIT_TXBCN0ERR_8821C BIT(26) 2002 #define BIT_TXBCN0OK_8821C BIT(25) 2003 #define BIT_TSF_BIT32_TOGGLE_8821C BIT(24) 2004 #define BIT_BCNDMAINT0_8821C BIT(20) 2005 #define BIT_BCNDERR0_8821C BIT(16) 2006 #define BIT_HSISR_IND_ON_INT_8821C BIT(15) 2007 #define BIT_BCNDMAINT_E_8821C BIT(14) 2008 #define BIT_CTWEND_8821C BIT(12) 2009 #define BIT_HISR1_IND_INT_8821C BIT(11) 2010 #define BIT_C2HCMD_8821C BIT(10) 2011 #define BIT_CPWM2_8821C BIT(9) 2012 #define BIT_CPWM_8821C BIT(8) 2013 #define BIT_HIGHDOK_8821C BIT(7) 2014 #define BIT_MGTDOK_8821C BIT(6) 2015 #define BIT_BKDOK_8821C BIT(5) 2016 #define BIT_BEDOK_8821C BIT(4) 2017 #define BIT_VIDOK_8821C BIT(3) 2018 #define BIT_VODOK_8821C BIT(2) 2019 #define BIT_RDU_8821C BIT(1) 2020 #define BIT_RXOK_8821C BIT(0) 2021 2022 /* 2 REG_HIMR1_8821C */ 2023 #define BIT_TXFIFO_TH_INT_8821C BIT(30) 2024 #define BIT_BTON_STS_UPDATE_MASK_8821C BIT(29) 2025 #define BIT_MCU_ERR_MASK_8821C BIT(28) 2026 #define BIT_BCNDMAINT7__MSK_8821C BIT(27) 2027 #define BIT_BCNDMAINT6__MSK_8821C BIT(26) 2028 #define BIT_BCNDMAINT5__MSK_8821C BIT(25) 2029 #define BIT_BCNDMAINT4__MSK_8821C BIT(24) 2030 #define BIT_BCNDMAINT3_MSK_8821C BIT(23) 2031 #define BIT_BCNDMAINT2_MSK_8821C BIT(22) 2032 #define BIT_BCNDMAINT1_MSK_8821C BIT(21) 2033 #define BIT_BCNDERR7_MSK_8821C BIT(20) 2034 #define BIT_BCNDERR6_MSK_8821C BIT(19) 2035 #define BIT_BCNDERR5_MSK_8821C BIT(18) 2036 #define BIT_BCNDERR4_MSK_8821C BIT(17) 2037 #define BIT_BCNDERR3_MSK_8821C BIT(16) 2038 #define BIT_BCNDERR2_MSK_8821C BIT(15) 2039 #define BIT_BCNDERR1_MSK_8821C BIT(14) 2040 #define BIT_ATIMEND_E_MSK_8821C BIT(13) 2041 #define BIT_ATIMEND__MSK_8821C BIT(12) 2042 #define BIT_TXERR_MSK_8821C BIT(11) 2043 #define BIT_RXERR_MSK_8821C BIT(10) 2044 #define BIT_TXFOVW_MSK_8821C BIT(9) 2045 #define BIT_FOVW_MSK_8821C BIT(8) 2046 #define BIT_CPU_MGQ_TXDONE_MSK_8821C BIT(5) 2047 #define BIT_PS_TIMER_C_MSK_8821C BIT(4) 2048 #define BIT_PS_TIMER_B_MSK_8821C BIT(3) 2049 #define BIT_PS_TIMER_A_MSK_8821C BIT(2) 2050 #define BIT_CPUMGQ_TX_TIMER_MSK_8821C BIT(1) 2051 2052 /* 2 REG_HISR1_8821C */ 2053 #define BIT_TXFIFO_TH_INT_8821C BIT(30) 2054 #define BIT_BTON_STS_UPDATE_INT_8821C BIT(29) 2055 #define BIT_MCU_ERR_8821C BIT(28) 2056 #define BIT_BCNDMAINT7_8821C BIT(27) 2057 #define BIT_BCNDMAINT6_8821C BIT(26) 2058 #define BIT_BCNDMAINT5_8821C BIT(25) 2059 #define BIT_BCNDMAINT4_8821C BIT(24) 2060 #define BIT_BCNDMAINT3_8821C BIT(23) 2061 #define BIT_BCNDMAINT2_8821C BIT(22) 2062 #define BIT_BCNDMAINT1_8821C BIT(21) 2063 #define BIT_BCNDERR7_8821C BIT(20) 2064 #define BIT_BCNDERR6_8821C BIT(19) 2065 #define BIT_BCNDERR5_8821C BIT(18) 2066 #define BIT_BCNDERR4_8821C BIT(17) 2067 #define BIT_BCNDERR3_8821C BIT(16) 2068 #define BIT_BCNDERR2_8821C BIT(15) 2069 #define BIT_BCNDERR1_8821C BIT(14) 2070 #define BIT_ATIMEND_E_8821C BIT(13) 2071 #define BIT_ATIMEND_8821C BIT(12) 2072 #define BIT_TXERR_INT_8821C BIT(11) 2073 #define BIT_RXERR_INT_8821C BIT(10) 2074 #define BIT_TXFOVW_8821C BIT(9) 2075 #define BIT_FOVW_8821C BIT(8) 2076 2077 /* 2 REG_NOT_VALID_8821C */ 2078 #define BIT_CPU_MGQ_TXDONE_8821C BIT(5) 2079 #define BIT_PS_TIMER_C_8821C BIT(4) 2080 #define BIT_PS_TIMER_B_8821C BIT(3) 2081 #define BIT_PS_TIMER_A_8821C BIT(2) 2082 #define BIT_CPUMGQ_TX_TIMER_8821C BIT(1) 2083 2084 /* 2 REG_DBG_PORT_SEL_8821C */ 2085 2086 #define BIT_SHIFT_DEBUG_ST_8821C 0 2087 #define BIT_MASK_DEBUG_ST_8821C 0xffffffffL 2088 #define BIT_DEBUG_ST_8821C(x) \ 2089 (((x) & BIT_MASK_DEBUG_ST_8821C) << BIT_SHIFT_DEBUG_ST_8821C) 2090 #define BITS_DEBUG_ST_8821C \ 2091 (BIT_MASK_DEBUG_ST_8821C << BIT_SHIFT_DEBUG_ST_8821C) 2092 #define BIT_CLEAR_DEBUG_ST_8821C(x) ((x) & (~BITS_DEBUG_ST_8821C)) 2093 #define BIT_GET_DEBUG_ST_8821C(x) \ 2094 (((x) >> BIT_SHIFT_DEBUG_ST_8821C) & BIT_MASK_DEBUG_ST_8821C) 2095 #define BIT_SET_DEBUG_ST_8821C(x, v) \ 2096 (BIT_CLEAR_DEBUG_ST_8821C(x) | BIT_DEBUG_ST_8821C(v)) 2097 2098 /* 2 REG_PAD_CTRL2_8821C */ 2099 #define BIT_USB3_USB2_TRANSITION_8821C BIT(20) 2100 2101 #define BIT_SHIFT_USB23_SW_MODE_V1_8821C 18 2102 #define BIT_MASK_USB23_SW_MODE_V1_8821C 0x3 2103 #define BIT_USB23_SW_MODE_V1_8821C(x) \ 2104 (((x) & BIT_MASK_USB23_SW_MODE_V1_8821C) \ 2105 << BIT_SHIFT_USB23_SW_MODE_V1_8821C) 2106 #define BITS_USB23_SW_MODE_V1_8821C \ 2107 (BIT_MASK_USB23_SW_MODE_V1_8821C << BIT_SHIFT_USB23_SW_MODE_V1_8821C) 2108 #define BIT_CLEAR_USB23_SW_MODE_V1_8821C(x) \ 2109 ((x) & (~BITS_USB23_SW_MODE_V1_8821C)) 2110 #define BIT_GET_USB23_SW_MODE_V1_8821C(x) \ 2111 (((x) >> BIT_SHIFT_USB23_SW_MODE_V1_8821C) & \ 2112 BIT_MASK_USB23_SW_MODE_V1_8821C) 2113 #define BIT_SET_USB23_SW_MODE_V1_8821C(x, v) \ 2114 (BIT_CLEAR_USB23_SW_MODE_V1_8821C(x) | BIT_USB23_SW_MODE_V1_8821C(v)) 2115 2116 #define BIT_NO_PDN_CHIPOFF_V1_8821C BIT(17) 2117 #define BIT_RSM_EN_V1_8821C BIT(16) 2118 2119 #define BIT_SHIFT_MATCH_CNT_8821C 8 2120 #define BIT_MASK_MATCH_CNT_8821C 0xff 2121 #define BIT_MATCH_CNT_8821C(x) \ 2122 (((x) & BIT_MASK_MATCH_CNT_8821C) << BIT_SHIFT_MATCH_CNT_8821C) 2123 #define BITS_MATCH_CNT_8821C \ 2124 (BIT_MASK_MATCH_CNT_8821C << BIT_SHIFT_MATCH_CNT_8821C) 2125 #define BIT_CLEAR_MATCH_CNT_8821C(x) ((x) & (~BITS_MATCH_CNT_8821C)) 2126 #define BIT_GET_MATCH_CNT_8821C(x) \ 2127 (((x) >> BIT_SHIFT_MATCH_CNT_8821C) & BIT_MASK_MATCH_CNT_8821C) 2128 #define BIT_SET_MATCH_CNT_8821C(x, v) \ 2129 (BIT_CLEAR_MATCH_CNT_8821C(x) | BIT_MATCH_CNT_8821C(v)) 2130 2131 #define BIT_LD_B12V_EN_8821C BIT(7) 2132 #define BIT_EECS_IOSEL_V1_8821C BIT(6) 2133 #define BIT_EECS_DATA_O_V1_8821C BIT(5) 2134 #define BIT_EECS_DATA_I_V1_8821C BIT(4) 2135 #define BIT_EESK_IOSEL_V1_8821C BIT(2) 2136 #define BIT_EESK_DATA_O_V1_8821C BIT(1) 2137 #define BIT_EESK_DATA_I_V1_8821C BIT(0) 2138 2139 /* 2 REG_NOT_VALID_8821C */ 2140 2141 /* 2 REG_PMC_DBG_CTRL2_8821C */ 2142 2143 #define BIT_SHIFT_EFUSE_BURN_GNT_8821C 24 2144 #define BIT_MASK_EFUSE_BURN_GNT_8821C 0xff 2145 #define BIT_EFUSE_BURN_GNT_8821C(x) \ 2146 (((x) & BIT_MASK_EFUSE_BURN_GNT_8821C) \ 2147 << BIT_SHIFT_EFUSE_BURN_GNT_8821C) 2148 #define BITS_EFUSE_BURN_GNT_8821C \ 2149 (BIT_MASK_EFUSE_BURN_GNT_8821C << BIT_SHIFT_EFUSE_BURN_GNT_8821C) 2150 #define BIT_CLEAR_EFUSE_BURN_GNT_8821C(x) ((x) & (~BITS_EFUSE_BURN_GNT_8821C)) 2151 #define BIT_GET_EFUSE_BURN_GNT_8821C(x) \ 2152 (((x) >> BIT_SHIFT_EFUSE_BURN_GNT_8821C) & \ 2153 BIT_MASK_EFUSE_BURN_GNT_8821C) 2154 #define BIT_SET_EFUSE_BURN_GNT_8821C(x, v) \ 2155 (BIT_CLEAR_EFUSE_BURN_GNT_8821C(x) | BIT_EFUSE_BURN_GNT_8821C(v)) 2156 2157 #define BIT_STOP_WL_PMC_8821C BIT(9) 2158 #define BIT_STOP_SYM_PMC_8821C BIT(8) 2159 #define BIT_BT_ACCESS_WL_PAGE0_8821C BIT(6) 2160 #define BIT_REG_RST_WLPMC_8821C BIT(5) 2161 #define BIT_REG_RST_PD12N_8821C BIT(4) 2162 #define BIT_SYSON_DIS_WLREG_WRMSK_8821C BIT(3) 2163 #define BIT_SYSON_DIS_PMCREG_WRMSK_8821C BIT(2) 2164 2165 #define BIT_SHIFT_SYSON_REG_ARB_8821C 0 2166 #define BIT_MASK_SYSON_REG_ARB_8821C 0x3 2167 #define BIT_SYSON_REG_ARB_8821C(x) \ 2168 (((x) & BIT_MASK_SYSON_REG_ARB_8821C) << BIT_SHIFT_SYSON_REG_ARB_8821C) 2169 #define BITS_SYSON_REG_ARB_8821C \ 2170 (BIT_MASK_SYSON_REG_ARB_8821C << BIT_SHIFT_SYSON_REG_ARB_8821C) 2171 #define BIT_CLEAR_SYSON_REG_ARB_8821C(x) ((x) & (~BITS_SYSON_REG_ARB_8821C)) 2172 #define BIT_GET_SYSON_REG_ARB_8821C(x) \ 2173 (((x) >> BIT_SHIFT_SYSON_REG_ARB_8821C) & BIT_MASK_SYSON_REG_ARB_8821C) 2174 #define BIT_SET_SYSON_REG_ARB_8821C(x, v) \ 2175 (BIT_CLEAR_SYSON_REG_ARB_8821C(x) | BIT_SYSON_REG_ARB_8821C(v)) 2176 2177 /* 2 REG_BIST_CTRL_8821C */ 2178 #define BIT_BIST_USB_DIS_8821C BIT(27) 2179 #define BIT_BIST_PCI_DIS_8821C BIT(26) 2180 #define BIT_BIST_BT_DIS_8821C BIT(25) 2181 #define BIT_BIST_WL_DIS_8821C BIT(24) 2182 2183 #define BIT_SHIFT_BIST_RPT_SEL_8821C 16 2184 #define BIT_MASK_BIST_RPT_SEL_8821C 0xf 2185 #define BIT_BIST_RPT_SEL_8821C(x) \ 2186 (((x) & BIT_MASK_BIST_RPT_SEL_8821C) << BIT_SHIFT_BIST_RPT_SEL_8821C) 2187 #define BITS_BIST_RPT_SEL_8821C \ 2188 (BIT_MASK_BIST_RPT_SEL_8821C << BIT_SHIFT_BIST_RPT_SEL_8821C) 2189 #define BIT_CLEAR_BIST_RPT_SEL_8821C(x) ((x) & (~BITS_BIST_RPT_SEL_8821C)) 2190 #define BIT_GET_BIST_RPT_SEL_8821C(x) \ 2191 (((x) >> BIT_SHIFT_BIST_RPT_SEL_8821C) & BIT_MASK_BIST_RPT_SEL_8821C) 2192 #define BIT_SET_BIST_RPT_SEL_8821C(x, v) \ 2193 (BIT_CLEAR_BIST_RPT_SEL_8821C(x) | BIT_BIST_RPT_SEL_8821C(v)) 2194 2195 #define BIT_BIST_RESUME_PS_8821C BIT(4) 2196 #define BIT_BIST_RESUME_8821C BIT(3) 2197 #define BIT_BIST_NORMAL_8821C BIT(2) 2198 #define BIT_BIST_RSTN_8821C BIT(1) 2199 #define BIT_BIST_CLK_EN_8821C BIT(0) 2200 2201 /* 2 REG_BIST_RPT_8821C */ 2202 2203 #define BIT_SHIFT_MBIST_REPORT_8821C 0 2204 #define BIT_MASK_MBIST_REPORT_8821C 0xffffffffL 2205 #define BIT_MBIST_REPORT_8821C(x) \ 2206 (((x) & BIT_MASK_MBIST_REPORT_8821C) << BIT_SHIFT_MBIST_REPORT_8821C) 2207 #define BITS_MBIST_REPORT_8821C \ 2208 (BIT_MASK_MBIST_REPORT_8821C << BIT_SHIFT_MBIST_REPORT_8821C) 2209 #define BIT_CLEAR_MBIST_REPORT_8821C(x) ((x) & (~BITS_MBIST_REPORT_8821C)) 2210 #define BIT_GET_MBIST_REPORT_8821C(x) \ 2211 (((x) >> BIT_SHIFT_MBIST_REPORT_8821C) & BIT_MASK_MBIST_REPORT_8821C) 2212 #define BIT_SET_MBIST_REPORT_8821C(x, v) \ 2213 (BIT_CLEAR_MBIST_REPORT_8821C(x) | BIT_MBIST_REPORT_8821C(v)) 2214 2215 /* 2 REG_MEM_CTRL_8821C */ 2216 #define BIT_UMEM_RME_8821C BIT(31) 2217 2218 #define BIT_SHIFT_BT_SPRAM_8821C 28 2219 #define BIT_MASK_BT_SPRAM_8821C 0x3 2220 #define BIT_BT_SPRAM_8821C(x) \ 2221 (((x) & BIT_MASK_BT_SPRAM_8821C) << BIT_SHIFT_BT_SPRAM_8821C) 2222 #define BITS_BT_SPRAM_8821C \ 2223 (BIT_MASK_BT_SPRAM_8821C << BIT_SHIFT_BT_SPRAM_8821C) 2224 #define BIT_CLEAR_BT_SPRAM_8821C(x) ((x) & (~BITS_BT_SPRAM_8821C)) 2225 #define BIT_GET_BT_SPRAM_8821C(x) \ 2226 (((x) >> BIT_SHIFT_BT_SPRAM_8821C) & BIT_MASK_BT_SPRAM_8821C) 2227 #define BIT_SET_BT_SPRAM_8821C(x, v) \ 2228 (BIT_CLEAR_BT_SPRAM_8821C(x) | BIT_BT_SPRAM_8821C(v)) 2229 2230 #define BIT_SHIFT_BT_ROM_8821C 24 2231 #define BIT_MASK_BT_ROM_8821C 0xf 2232 #define BIT_BT_ROM_8821C(x) \ 2233 (((x) & BIT_MASK_BT_ROM_8821C) << BIT_SHIFT_BT_ROM_8821C) 2234 #define BITS_BT_ROM_8821C (BIT_MASK_BT_ROM_8821C << BIT_SHIFT_BT_ROM_8821C) 2235 #define BIT_CLEAR_BT_ROM_8821C(x) ((x) & (~BITS_BT_ROM_8821C)) 2236 #define BIT_GET_BT_ROM_8821C(x) \ 2237 (((x) >> BIT_SHIFT_BT_ROM_8821C) & BIT_MASK_BT_ROM_8821C) 2238 #define BIT_SET_BT_ROM_8821C(x, v) \ 2239 (BIT_CLEAR_BT_ROM_8821C(x) | BIT_BT_ROM_8821C(v)) 2240 2241 #define BIT_SHIFT_PCI_DPRAM_8821C 10 2242 #define BIT_MASK_PCI_DPRAM_8821C 0x3 2243 #define BIT_PCI_DPRAM_8821C(x) \ 2244 (((x) & BIT_MASK_PCI_DPRAM_8821C) << BIT_SHIFT_PCI_DPRAM_8821C) 2245 #define BITS_PCI_DPRAM_8821C \ 2246 (BIT_MASK_PCI_DPRAM_8821C << BIT_SHIFT_PCI_DPRAM_8821C) 2247 #define BIT_CLEAR_PCI_DPRAM_8821C(x) ((x) & (~BITS_PCI_DPRAM_8821C)) 2248 #define BIT_GET_PCI_DPRAM_8821C(x) \ 2249 (((x) >> BIT_SHIFT_PCI_DPRAM_8821C) & BIT_MASK_PCI_DPRAM_8821C) 2250 #define BIT_SET_PCI_DPRAM_8821C(x, v) \ 2251 (BIT_CLEAR_PCI_DPRAM_8821C(x) | BIT_PCI_DPRAM_8821C(v)) 2252 2253 #define BIT_SHIFT_PCI_SPRAM_8821C 8 2254 #define BIT_MASK_PCI_SPRAM_8821C 0x3 2255 #define BIT_PCI_SPRAM_8821C(x) \ 2256 (((x) & BIT_MASK_PCI_SPRAM_8821C) << BIT_SHIFT_PCI_SPRAM_8821C) 2257 #define BITS_PCI_SPRAM_8821C \ 2258 (BIT_MASK_PCI_SPRAM_8821C << BIT_SHIFT_PCI_SPRAM_8821C) 2259 #define BIT_CLEAR_PCI_SPRAM_8821C(x) ((x) & (~BITS_PCI_SPRAM_8821C)) 2260 #define BIT_GET_PCI_SPRAM_8821C(x) \ 2261 (((x) >> BIT_SHIFT_PCI_SPRAM_8821C) & BIT_MASK_PCI_SPRAM_8821C) 2262 #define BIT_SET_PCI_SPRAM_8821C(x, v) \ 2263 (BIT_CLEAR_PCI_SPRAM_8821C(x) | BIT_PCI_SPRAM_8821C(v)) 2264 2265 #define BIT_SHIFT_USB_SPRAM_8821C 6 2266 #define BIT_MASK_USB_SPRAM_8821C 0x3 2267 #define BIT_USB_SPRAM_8821C(x) \ 2268 (((x) & BIT_MASK_USB_SPRAM_8821C) << BIT_SHIFT_USB_SPRAM_8821C) 2269 #define BITS_USB_SPRAM_8821C \ 2270 (BIT_MASK_USB_SPRAM_8821C << BIT_SHIFT_USB_SPRAM_8821C) 2271 #define BIT_CLEAR_USB_SPRAM_8821C(x) ((x) & (~BITS_USB_SPRAM_8821C)) 2272 #define BIT_GET_USB_SPRAM_8821C(x) \ 2273 (((x) >> BIT_SHIFT_USB_SPRAM_8821C) & BIT_MASK_USB_SPRAM_8821C) 2274 #define BIT_SET_USB_SPRAM_8821C(x, v) \ 2275 (BIT_CLEAR_USB_SPRAM_8821C(x) | BIT_USB_SPRAM_8821C(v)) 2276 2277 #define BIT_SHIFT_USB_SPRF_8821C 4 2278 #define BIT_MASK_USB_SPRF_8821C 0x3 2279 #define BIT_USB_SPRF_8821C(x) \ 2280 (((x) & BIT_MASK_USB_SPRF_8821C) << BIT_SHIFT_USB_SPRF_8821C) 2281 #define BITS_USB_SPRF_8821C \ 2282 (BIT_MASK_USB_SPRF_8821C << BIT_SHIFT_USB_SPRF_8821C) 2283 #define BIT_CLEAR_USB_SPRF_8821C(x) ((x) & (~BITS_USB_SPRF_8821C)) 2284 #define BIT_GET_USB_SPRF_8821C(x) \ 2285 (((x) >> BIT_SHIFT_USB_SPRF_8821C) & BIT_MASK_USB_SPRF_8821C) 2286 #define BIT_SET_USB_SPRF_8821C(x, v) \ 2287 (BIT_CLEAR_USB_SPRF_8821C(x) | BIT_USB_SPRF_8821C(v)) 2288 2289 #define BIT_SHIFT_MCU_ROM_8821C 0 2290 #define BIT_MASK_MCU_ROM_8821C 0xf 2291 #define BIT_MCU_ROM_8821C(x) \ 2292 (((x) & BIT_MASK_MCU_ROM_8821C) << BIT_SHIFT_MCU_ROM_8821C) 2293 #define BITS_MCU_ROM_8821C (BIT_MASK_MCU_ROM_8821C << BIT_SHIFT_MCU_ROM_8821C) 2294 #define BIT_CLEAR_MCU_ROM_8821C(x) ((x) & (~BITS_MCU_ROM_8821C)) 2295 #define BIT_GET_MCU_ROM_8821C(x) \ 2296 (((x) >> BIT_SHIFT_MCU_ROM_8821C) & BIT_MASK_MCU_ROM_8821C) 2297 #define BIT_SET_MCU_ROM_8821C(x, v) \ 2298 (BIT_CLEAR_MCU_ROM_8821C(x) | BIT_MCU_ROM_8821C(v)) 2299 2300 /* 2 REG_AFE_CTRL8_8821C */ 2301 #define BIT_SYN_AGPIO_8821C BIT(20) 2302 #define BIT_XTAL_LP_8821C BIT(4) 2303 #define BIT_XTAL_GM_SEP_8821C BIT(3) 2304 2305 #define BIT_SHIFT_XTAL_SEL_TOK_8821C 0 2306 #define BIT_MASK_XTAL_SEL_TOK_8821C 0x7 2307 #define BIT_XTAL_SEL_TOK_8821C(x) \ 2308 (((x) & BIT_MASK_XTAL_SEL_TOK_8821C) << BIT_SHIFT_XTAL_SEL_TOK_8821C) 2309 #define BITS_XTAL_SEL_TOK_8821C \ 2310 (BIT_MASK_XTAL_SEL_TOK_8821C << BIT_SHIFT_XTAL_SEL_TOK_8821C) 2311 #define BIT_CLEAR_XTAL_SEL_TOK_8821C(x) ((x) & (~BITS_XTAL_SEL_TOK_8821C)) 2312 #define BIT_GET_XTAL_SEL_TOK_8821C(x) \ 2313 (((x) >> BIT_SHIFT_XTAL_SEL_TOK_8821C) & BIT_MASK_XTAL_SEL_TOK_8821C) 2314 #define BIT_SET_XTAL_SEL_TOK_8821C(x, v) \ 2315 (BIT_CLEAR_XTAL_SEL_TOK_8821C(x) | BIT_XTAL_SEL_TOK_8821C(v)) 2316 2317 /* 2 REG_USB_SIE_INTF_8821C */ 2318 #define BIT_RD_SEL_8821C BIT(31) 2319 #define BIT_USB_SIE_INTF_WE_V1_8821C BIT(30) 2320 #define BIT_USB_SIE_INTF_BYIOREG_V1_8821C BIT(29) 2321 #define BIT_USB_SIE_SELECT_8821C BIT(28) 2322 2323 #define BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8821C 16 2324 #define BIT_MASK_USB_SIE_INTF_ADDR_V1_8821C 0x1ff 2325 #define BIT_USB_SIE_INTF_ADDR_V1_8821C(x) \ 2326 (((x) & BIT_MASK_USB_SIE_INTF_ADDR_V1_8821C) \ 2327 << BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8821C) 2328 #define BITS_USB_SIE_INTF_ADDR_V1_8821C \ 2329 (BIT_MASK_USB_SIE_INTF_ADDR_V1_8821C \ 2330 << BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8821C) 2331 #define BIT_CLEAR_USB_SIE_INTF_ADDR_V1_8821C(x) \ 2332 ((x) & (~BITS_USB_SIE_INTF_ADDR_V1_8821C)) 2333 #define BIT_GET_USB_SIE_INTF_ADDR_V1_8821C(x) \ 2334 (((x) >> BIT_SHIFT_USB_SIE_INTF_ADDR_V1_8821C) & \ 2335 BIT_MASK_USB_SIE_INTF_ADDR_V1_8821C) 2336 #define BIT_SET_USB_SIE_INTF_ADDR_V1_8821C(x, v) \ 2337 (BIT_CLEAR_USB_SIE_INTF_ADDR_V1_8821C(x) | \ 2338 BIT_USB_SIE_INTF_ADDR_V1_8821C(v)) 2339 2340 #define BIT_SHIFT_USB_SIE_INTF_RD_8821C 8 2341 #define BIT_MASK_USB_SIE_INTF_RD_8821C 0xff 2342 #define BIT_USB_SIE_INTF_RD_8821C(x) \ 2343 (((x) & BIT_MASK_USB_SIE_INTF_RD_8821C) \ 2344 << BIT_SHIFT_USB_SIE_INTF_RD_8821C) 2345 #define BITS_USB_SIE_INTF_RD_8821C \ 2346 (BIT_MASK_USB_SIE_INTF_RD_8821C << BIT_SHIFT_USB_SIE_INTF_RD_8821C) 2347 #define BIT_CLEAR_USB_SIE_INTF_RD_8821C(x) ((x) & (~BITS_USB_SIE_INTF_RD_8821C)) 2348 #define BIT_GET_USB_SIE_INTF_RD_8821C(x) \ 2349 (((x) >> BIT_SHIFT_USB_SIE_INTF_RD_8821C) & \ 2350 BIT_MASK_USB_SIE_INTF_RD_8821C) 2351 #define BIT_SET_USB_SIE_INTF_RD_8821C(x, v) \ 2352 (BIT_CLEAR_USB_SIE_INTF_RD_8821C(x) | BIT_USB_SIE_INTF_RD_8821C(v)) 2353 2354 #define BIT_SHIFT_USB_SIE_INTF_WD_8821C 0 2355 #define BIT_MASK_USB_SIE_INTF_WD_8821C 0xff 2356 #define BIT_USB_SIE_INTF_WD_8821C(x) \ 2357 (((x) & BIT_MASK_USB_SIE_INTF_WD_8821C) \ 2358 << BIT_SHIFT_USB_SIE_INTF_WD_8821C) 2359 #define BITS_USB_SIE_INTF_WD_8821C \ 2360 (BIT_MASK_USB_SIE_INTF_WD_8821C << BIT_SHIFT_USB_SIE_INTF_WD_8821C) 2361 #define BIT_CLEAR_USB_SIE_INTF_WD_8821C(x) ((x) & (~BITS_USB_SIE_INTF_WD_8821C)) 2362 #define BIT_GET_USB_SIE_INTF_WD_8821C(x) \ 2363 (((x) >> BIT_SHIFT_USB_SIE_INTF_WD_8821C) & \ 2364 BIT_MASK_USB_SIE_INTF_WD_8821C) 2365 #define BIT_SET_USB_SIE_INTF_WD_8821C(x, v) \ 2366 (BIT_CLEAR_USB_SIE_INTF_WD_8821C(x) | BIT_USB_SIE_INTF_WD_8821C(v)) 2367 2368 /* 2 REG_PCIE_MIO_INTF_8821C */ 2369 2370 #define BIT_SHIFT_PCIE_MIO_ADDR_PAGE_8821C 16 2371 #define BIT_MASK_PCIE_MIO_ADDR_PAGE_8821C 0x3 2372 #define BIT_PCIE_MIO_ADDR_PAGE_8821C(x) \ 2373 (((x) & BIT_MASK_PCIE_MIO_ADDR_PAGE_8821C) \ 2374 << BIT_SHIFT_PCIE_MIO_ADDR_PAGE_8821C) 2375 #define BITS_PCIE_MIO_ADDR_PAGE_8821C \ 2376 (BIT_MASK_PCIE_MIO_ADDR_PAGE_8821C \ 2377 << BIT_SHIFT_PCIE_MIO_ADDR_PAGE_8821C) 2378 #define BIT_CLEAR_PCIE_MIO_ADDR_PAGE_8821C(x) \ 2379 ((x) & (~BITS_PCIE_MIO_ADDR_PAGE_8821C)) 2380 #define BIT_GET_PCIE_MIO_ADDR_PAGE_8821C(x) \ 2381 (((x) >> BIT_SHIFT_PCIE_MIO_ADDR_PAGE_8821C) & \ 2382 BIT_MASK_PCIE_MIO_ADDR_PAGE_8821C) 2383 #define BIT_SET_PCIE_MIO_ADDR_PAGE_8821C(x, v) \ 2384 (BIT_CLEAR_PCIE_MIO_ADDR_PAGE_8821C(x) | \ 2385 BIT_PCIE_MIO_ADDR_PAGE_8821C(v)) 2386 2387 #define BIT_PCIE_MIO_BYIOREG_8821C BIT(13) 2388 #define BIT_PCIE_MIO_RE_8821C BIT(12) 2389 2390 #define BIT_SHIFT_PCIE_MIO_WE_8821C 8 2391 #define BIT_MASK_PCIE_MIO_WE_8821C 0xf 2392 #define BIT_PCIE_MIO_WE_8821C(x) \ 2393 (((x) & BIT_MASK_PCIE_MIO_WE_8821C) << BIT_SHIFT_PCIE_MIO_WE_8821C) 2394 #define BITS_PCIE_MIO_WE_8821C \ 2395 (BIT_MASK_PCIE_MIO_WE_8821C << BIT_SHIFT_PCIE_MIO_WE_8821C) 2396 #define BIT_CLEAR_PCIE_MIO_WE_8821C(x) ((x) & (~BITS_PCIE_MIO_WE_8821C)) 2397 #define BIT_GET_PCIE_MIO_WE_8821C(x) \ 2398 (((x) >> BIT_SHIFT_PCIE_MIO_WE_8821C) & BIT_MASK_PCIE_MIO_WE_8821C) 2399 #define BIT_SET_PCIE_MIO_WE_8821C(x, v) \ 2400 (BIT_CLEAR_PCIE_MIO_WE_8821C(x) | BIT_PCIE_MIO_WE_8821C(v)) 2401 2402 #define BIT_SHIFT_PCIE_MIO_ADDR_8821C 0 2403 #define BIT_MASK_PCIE_MIO_ADDR_8821C 0xff 2404 #define BIT_PCIE_MIO_ADDR_8821C(x) \ 2405 (((x) & BIT_MASK_PCIE_MIO_ADDR_8821C) << BIT_SHIFT_PCIE_MIO_ADDR_8821C) 2406 #define BITS_PCIE_MIO_ADDR_8821C \ 2407 (BIT_MASK_PCIE_MIO_ADDR_8821C << BIT_SHIFT_PCIE_MIO_ADDR_8821C) 2408 #define BIT_CLEAR_PCIE_MIO_ADDR_8821C(x) ((x) & (~BITS_PCIE_MIO_ADDR_8821C)) 2409 #define BIT_GET_PCIE_MIO_ADDR_8821C(x) \ 2410 (((x) >> BIT_SHIFT_PCIE_MIO_ADDR_8821C) & BIT_MASK_PCIE_MIO_ADDR_8821C) 2411 #define BIT_SET_PCIE_MIO_ADDR_8821C(x, v) \ 2412 (BIT_CLEAR_PCIE_MIO_ADDR_8821C(x) | BIT_PCIE_MIO_ADDR_8821C(v)) 2413 2414 /* 2 REG_PCIE_MIO_INTD_8821C */ 2415 2416 #define BIT_SHIFT_PCIE_MIO_DATA_8821C 0 2417 #define BIT_MASK_PCIE_MIO_DATA_8821C 0xffffffffL 2418 #define BIT_PCIE_MIO_DATA_8821C(x) \ 2419 (((x) & BIT_MASK_PCIE_MIO_DATA_8821C) << BIT_SHIFT_PCIE_MIO_DATA_8821C) 2420 #define BITS_PCIE_MIO_DATA_8821C \ 2421 (BIT_MASK_PCIE_MIO_DATA_8821C << BIT_SHIFT_PCIE_MIO_DATA_8821C) 2422 #define BIT_CLEAR_PCIE_MIO_DATA_8821C(x) ((x) & (~BITS_PCIE_MIO_DATA_8821C)) 2423 #define BIT_GET_PCIE_MIO_DATA_8821C(x) \ 2424 (((x) >> BIT_SHIFT_PCIE_MIO_DATA_8821C) & BIT_MASK_PCIE_MIO_DATA_8821C) 2425 #define BIT_SET_PCIE_MIO_DATA_8821C(x, v) \ 2426 (BIT_CLEAR_PCIE_MIO_DATA_8821C(x) | BIT_PCIE_MIO_DATA_8821C(v)) 2427 2428 /* 2 REG_WLRF1_8821C */ 2429 2430 #define BIT_SHIFT_WLRF1_CTRL_8821C 24 2431 #define BIT_MASK_WLRF1_CTRL_8821C 0xff 2432 #define BIT_WLRF1_CTRL_8821C(x) \ 2433 (((x) & BIT_MASK_WLRF1_CTRL_8821C) << BIT_SHIFT_WLRF1_CTRL_8821C) 2434 #define BITS_WLRF1_CTRL_8821C \ 2435 (BIT_MASK_WLRF1_CTRL_8821C << BIT_SHIFT_WLRF1_CTRL_8821C) 2436 #define BIT_CLEAR_WLRF1_CTRL_8821C(x) ((x) & (~BITS_WLRF1_CTRL_8821C)) 2437 #define BIT_GET_WLRF1_CTRL_8821C(x) \ 2438 (((x) >> BIT_SHIFT_WLRF1_CTRL_8821C) & BIT_MASK_WLRF1_CTRL_8821C) 2439 #define BIT_SET_WLRF1_CTRL_8821C(x, v) \ 2440 (BIT_CLEAR_WLRF1_CTRL_8821C(x) | BIT_WLRF1_CTRL_8821C(v)) 2441 2442 /* 2 REG_SYS_CFG1_8821C */ 2443 2444 #define BIT_SHIFT_TRP_ICFG_8821C 28 2445 #define BIT_MASK_TRP_ICFG_8821C 0xf 2446 #define BIT_TRP_ICFG_8821C(x) \ 2447 (((x) & BIT_MASK_TRP_ICFG_8821C) << BIT_SHIFT_TRP_ICFG_8821C) 2448 #define BITS_TRP_ICFG_8821C \ 2449 (BIT_MASK_TRP_ICFG_8821C << BIT_SHIFT_TRP_ICFG_8821C) 2450 #define BIT_CLEAR_TRP_ICFG_8821C(x) ((x) & (~BITS_TRP_ICFG_8821C)) 2451 #define BIT_GET_TRP_ICFG_8821C(x) \ 2452 (((x) >> BIT_SHIFT_TRP_ICFG_8821C) & BIT_MASK_TRP_ICFG_8821C) 2453 #define BIT_SET_TRP_ICFG_8821C(x, v) \ 2454 (BIT_CLEAR_TRP_ICFG_8821C(x) | BIT_TRP_ICFG_8821C(v)) 2455 2456 #define BIT_RF_TYPE_ID_8821C BIT(27) 2457 #define BIT_BD_HCI_SEL_8821C BIT(26) 2458 #define BIT_BD_PKG_SEL_8821C BIT(25) 2459 #define BIT_SPSLDO_SEL_8821C BIT(24) 2460 #define BIT_RTL_ID_8821C BIT(23) 2461 #define BIT_PAD_HWPD_IDN_8821C BIT(22) 2462 #define BIT_TESTMODE_8821C BIT(20) 2463 2464 #define BIT_SHIFT_VENDOR_ID_8821C 16 2465 #define BIT_MASK_VENDOR_ID_8821C 0xf 2466 #define BIT_VENDOR_ID_8821C(x) \ 2467 (((x) & BIT_MASK_VENDOR_ID_8821C) << BIT_SHIFT_VENDOR_ID_8821C) 2468 #define BITS_VENDOR_ID_8821C \ 2469 (BIT_MASK_VENDOR_ID_8821C << BIT_SHIFT_VENDOR_ID_8821C) 2470 #define BIT_CLEAR_VENDOR_ID_8821C(x) ((x) & (~BITS_VENDOR_ID_8821C)) 2471 #define BIT_GET_VENDOR_ID_8821C(x) \ 2472 (((x) >> BIT_SHIFT_VENDOR_ID_8821C) & BIT_MASK_VENDOR_ID_8821C) 2473 #define BIT_SET_VENDOR_ID_8821C(x, v) \ 2474 (BIT_CLEAR_VENDOR_ID_8821C(x) | BIT_VENDOR_ID_8821C(v)) 2475 2476 #define BIT_SHIFT_CHIP_VER_8821C 12 2477 #define BIT_MASK_CHIP_VER_8821C 0xf 2478 #define BIT_CHIP_VER_8821C(x) \ 2479 (((x) & BIT_MASK_CHIP_VER_8821C) << BIT_SHIFT_CHIP_VER_8821C) 2480 #define BITS_CHIP_VER_8821C \ 2481 (BIT_MASK_CHIP_VER_8821C << BIT_SHIFT_CHIP_VER_8821C) 2482 #define BIT_CLEAR_CHIP_VER_8821C(x) ((x) & (~BITS_CHIP_VER_8821C)) 2483 #define BIT_GET_CHIP_VER_8821C(x) \ 2484 (((x) >> BIT_SHIFT_CHIP_VER_8821C) & BIT_MASK_CHIP_VER_8821C) 2485 #define BIT_SET_CHIP_VER_8821C(x, v) \ 2486 (BIT_CLEAR_CHIP_VER_8821C(x) | BIT_CHIP_VER_8821C(v)) 2487 2488 #define BIT_BD_MAC3_8821C BIT(11) 2489 #define BIT_BD_MAC1_8821C BIT(10) 2490 #define BIT_BD_MAC2_8821C BIT(9) 2491 #define BIT_SIC_IDLE_8821C BIT(8) 2492 #define BIT_SW_OFFLOAD_EN_8821C BIT(7) 2493 #define BIT_OCP_SHUTDN_8821C BIT(6) 2494 #define BIT_V15_VLD_8821C BIT(5) 2495 #define BIT_PCIRSTB_8821C BIT(4) 2496 #define BIT_PCLK_VLD_8821C BIT(3) 2497 #define BIT_UCLK_VLD_8821C BIT(2) 2498 #define BIT_ACLK_VLD_8821C BIT(1) 2499 #define BIT_XCLK_VLD_8821C BIT(0) 2500 2501 /* 2 REG_SYS_STATUS1_8821C */ 2502 2503 #define BIT_SHIFT_RF_RL_ID_8821C 28 2504 #define BIT_MASK_RF_RL_ID_8821C 0xf 2505 #define BIT_RF_RL_ID_8821C(x) \ 2506 (((x) & BIT_MASK_RF_RL_ID_8821C) << BIT_SHIFT_RF_RL_ID_8821C) 2507 #define BITS_RF_RL_ID_8821C \ 2508 (BIT_MASK_RF_RL_ID_8821C << BIT_SHIFT_RF_RL_ID_8821C) 2509 #define BIT_CLEAR_RF_RL_ID_8821C(x) ((x) & (~BITS_RF_RL_ID_8821C)) 2510 #define BIT_GET_RF_RL_ID_8821C(x) \ 2511 (((x) >> BIT_SHIFT_RF_RL_ID_8821C) & BIT_MASK_RF_RL_ID_8821C) 2512 #define BIT_SET_RF_RL_ID_8821C(x, v) \ 2513 (BIT_CLEAR_RF_RL_ID_8821C(x) | BIT_RF_RL_ID_8821C(v)) 2514 2515 #define BIT_HPHY_ICFG_8821C BIT(19) 2516 2517 #define BIT_SHIFT_SEL_0XC0_8821C 16 2518 #define BIT_MASK_SEL_0XC0_8821C 0x3 2519 #define BIT_SEL_0XC0_8821C(x) \ 2520 (((x) & BIT_MASK_SEL_0XC0_8821C) << BIT_SHIFT_SEL_0XC0_8821C) 2521 #define BITS_SEL_0XC0_8821C \ 2522 (BIT_MASK_SEL_0XC0_8821C << BIT_SHIFT_SEL_0XC0_8821C) 2523 #define BIT_CLEAR_SEL_0XC0_8821C(x) ((x) & (~BITS_SEL_0XC0_8821C)) 2524 #define BIT_GET_SEL_0XC0_8821C(x) \ 2525 (((x) >> BIT_SHIFT_SEL_0XC0_8821C) & BIT_MASK_SEL_0XC0_8821C) 2526 #define BIT_SET_SEL_0XC0_8821C(x, v) \ 2527 (BIT_CLEAR_SEL_0XC0_8821C(x) | BIT_SEL_0XC0_8821C(v)) 2528 2529 #define BIT_SHIFT_HCI_SEL_V4_8821C 12 2530 #define BIT_MASK_HCI_SEL_V4_8821C 0x3 2531 #define BIT_HCI_SEL_V4_8821C(x) \ 2532 (((x) & BIT_MASK_HCI_SEL_V4_8821C) << BIT_SHIFT_HCI_SEL_V4_8821C) 2533 #define BITS_HCI_SEL_V4_8821C \ 2534 (BIT_MASK_HCI_SEL_V4_8821C << BIT_SHIFT_HCI_SEL_V4_8821C) 2535 #define BIT_CLEAR_HCI_SEL_V4_8821C(x) ((x) & (~BITS_HCI_SEL_V4_8821C)) 2536 #define BIT_GET_HCI_SEL_V4_8821C(x) \ 2537 (((x) >> BIT_SHIFT_HCI_SEL_V4_8821C) & BIT_MASK_HCI_SEL_V4_8821C) 2538 #define BIT_SET_HCI_SEL_V4_8821C(x, v) \ 2539 (BIT_CLEAR_HCI_SEL_V4_8821C(x) | BIT_HCI_SEL_V4_8821C(v)) 2540 2541 #define BIT_USB_OPERATION_MODE_8821C BIT(10) 2542 #define BIT_BT_PDN_8821C BIT(9) 2543 #define BIT_AUTO_WLPON_8821C BIT(8) 2544 #define BIT_WL_MODE_8821C BIT(7) 2545 #define BIT_PKG_SEL_HCI_8821C BIT(6) 2546 2547 #define BIT_SHIFT_PAD_HCI_SEL_V2_8821C 3 2548 #define BIT_MASK_PAD_HCI_SEL_V2_8821C 0x3 2549 #define BIT_PAD_HCI_SEL_V2_8821C(x) \ 2550 (((x) & BIT_MASK_PAD_HCI_SEL_V2_8821C) \ 2551 << BIT_SHIFT_PAD_HCI_SEL_V2_8821C) 2552 #define BITS_PAD_HCI_SEL_V2_8821C \ 2553 (BIT_MASK_PAD_HCI_SEL_V2_8821C << BIT_SHIFT_PAD_HCI_SEL_V2_8821C) 2554 #define BIT_CLEAR_PAD_HCI_SEL_V2_8821C(x) ((x) & (~BITS_PAD_HCI_SEL_V2_8821C)) 2555 #define BIT_GET_PAD_HCI_SEL_V2_8821C(x) \ 2556 (((x) >> BIT_SHIFT_PAD_HCI_SEL_V2_8821C) & \ 2557 BIT_MASK_PAD_HCI_SEL_V2_8821C) 2558 #define BIT_SET_PAD_HCI_SEL_V2_8821C(x, v) \ 2559 (BIT_CLEAR_PAD_HCI_SEL_V2_8821C(x) | BIT_PAD_HCI_SEL_V2_8821C(v)) 2560 2561 #define BIT_SHIFT_EFS_HCI_SEL_8821C 0 2562 #define BIT_MASK_EFS_HCI_SEL_8821C 0x3 2563 #define BIT_EFS_HCI_SEL_8821C(x) \ 2564 (((x) & BIT_MASK_EFS_HCI_SEL_8821C) << BIT_SHIFT_EFS_HCI_SEL_8821C) 2565 #define BITS_EFS_HCI_SEL_8821C \ 2566 (BIT_MASK_EFS_HCI_SEL_8821C << BIT_SHIFT_EFS_HCI_SEL_8821C) 2567 #define BIT_CLEAR_EFS_HCI_SEL_8821C(x) ((x) & (~BITS_EFS_HCI_SEL_8821C)) 2568 #define BIT_GET_EFS_HCI_SEL_8821C(x) \ 2569 (((x) >> BIT_SHIFT_EFS_HCI_SEL_8821C) & BIT_MASK_EFS_HCI_SEL_8821C) 2570 #define BIT_SET_EFS_HCI_SEL_8821C(x, v) \ 2571 (BIT_CLEAR_EFS_HCI_SEL_8821C(x) | BIT_EFS_HCI_SEL_8821C(v)) 2572 2573 /* 2 REG_SYS_STATUS2_8821C */ 2574 #define BIT_SIO_ALDN_8821C BIT(19) 2575 #define BIT_USB_ALDN_8821C BIT(18) 2576 #define BIT_PCI_ALDN_8821C BIT(17) 2577 #define BIT_SYS_ALDN_8821C BIT(16) 2578 2579 #define BIT_SHIFT_EPVID1_8821C 8 2580 #define BIT_MASK_EPVID1_8821C 0xff 2581 #define BIT_EPVID1_8821C(x) \ 2582 (((x) & BIT_MASK_EPVID1_8821C) << BIT_SHIFT_EPVID1_8821C) 2583 #define BITS_EPVID1_8821C (BIT_MASK_EPVID1_8821C << BIT_SHIFT_EPVID1_8821C) 2584 #define BIT_CLEAR_EPVID1_8821C(x) ((x) & (~BITS_EPVID1_8821C)) 2585 #define BIT_GET_EPVID1_8821C(x) \ 2586 (((x) >> BIT_SHIFT_EPVID1_8821C) & BIT_MASK_EPVID1_8821C) 2587 #define BIT_SET_EPVID1_8821C(x, v) \ 2588 (BIT_CLEAR_EPVID1_8821C(x) | BIT_EPVID1_8821C(v)) 2589 2590 #define BIT_SHIFT_EPVID0_8821C 0 2591 #define BIT_MASK_EPVID0_8821C 0xff 2592 #define BIT_EPVID0_8821C(x) \ 2593 (((x) & BIT_MASK_EPVID0_8821C) << BIT_SHIFT_EPVID0_8821C) 2594 #define BITS_EPVID0_8821C (BIT_MASK_EPVID0_8821C << BIT_SHIFT_EPVID0_8821C) 2595 #define BIT_CLEAR_EPVID0_8821C(x) ((x) & (~BITS_EPVID0_8821C)) 2596 #define BIT_GET_EPVID0_8821C(x) \ 2597 (((x) >> BIT_SHIFT_EPVID0_8821C) & BIT_MASK_EPVID0_8821C) 2598 #define BIT_SET_EPVID0_8821C(x, v) \ 2599 (BIT_CLEAR_EPVID0_8821C(x) | BIT_EPVID0_8821C(v)) 2600 2601 /* 2 REG_SYS_CFG2_8821C */ 2602 #define BIT_HCI_SEL_EMBEDDED_8821C BIT(8) 2603 2604 #define BIT_SHIFT_HW_ID_8821C 0 2605 #define BIT_MASK_HW_ID_8821C 0xff 2606 #define BIT_HW_ID_8821C(x) \ 2607 (((x) & BIT_MASK_HW_ID_8821C) << BIT_SHIFT_HW_ID_8821C) 2608 #define BITS_HW_ID_8821C (BIT_MASK_HW_ID_8821C << BIT_SHIFT_HW_ID_8821C) 2609 #define BIT_CLEAR_HW_ID_8821C(x) ((x) & (~BITS_HW_ID_8821C)) 2610 #define BIT_GET_HW_ID_8821C(x) \ 2611 (((x) >> BIT_SHIFT_HW_ID_8821C) & BIT_MASK_HW_ID_8821C) 2612 #define BIT_SET_HW_ID_8821C(x, v) \ 2613 (BIT_CLEAR_HW_ID_8821C(x) | BIT_HW_ID_8821C(v)) 2614 2615 /* 2 REG_SYS_CFG3_8821C */ 2616 2617 /* 2 REG_NOT_VALID_8821C */ 2618 2619 /* 2 REG_NOT_VALID_8821C */ 2620 2621 /* 2 REG_NOT_VALID_8821C */ 2622 2623 /* 2 REG_NOT_VALID_8821C */ 2624 2625 /* 2 REG_NOT_VALID_8821C */ 2626 2627 /* 2 REG_NOT_VALID_8821C */ 2628 2629 /* 2 REG_NOT_VALID_8821C */ 2630 2631 /* 2 REG_NOT_VALID_8821C */ 2632 2633 /* 2 REG_NOT_VALID_8821C */ 2634 2635 /* 2 REG_NOT_VALID_8821C */ 2636 2637 /* 2 REG_NOT_VALID_8821C */ 2638 2639 /* 2 REG_NOT_VALID_8821C */ 2640 2641 /* 2 REG_NOT_VALID_8821C */ 2642 2643 /* 2 REG_NOT_VALID_8821C */ 2644 2645 /* 2 REG_NOT_VALID_8821C */ 2646 2647 /* 2 REG_NOT_VALID_8821C */ 2648 2649 /* 2 REG_NOT_VALID_8821C */ 2650 2651 /* 2 REG_NOT_VALID_8821C */ 2652 2653 /* 2 REG_NOT_VALID_8821C */ 2654 2655 /* 2 REG_NOT_VALID_8821C */ 2656 2657 /* 2 REG_NOT_VALID_8821C */ 2658 2659 /* 2 REG_NOT_VALID_8821C */ 2660 2661 /* 2 REG_NOT_VALID_8821C */ 2662 2663 /* 2 REG_NOT_VALID_8821C */ 2664 2665 /* 2 REG_NOT_VALID_8821C */ 2666 2667 /* 2 REG_NOT_VALID_8821C */ 2668 2669 /* 2 REG_NOT_VALID_8821C */ 2670 2671 /* 2 REG_SYS_CFG5_8821C */ 2672 #define BIT_LPS_STATUS_8821C BIT(3) 2673 #define BIT_HCI_TXDMA_BUSY_8821C BIT(2) 2674 #define BIT_HCI_TXDMA_ALLOW_8821C BIT(1) 2675 #define BIT_FW_CTRL_HCI_TXDMA_EN_8821C BIT(0) 2676 2677 /* 2 REG_NOT_VALID_8821C */ 2678 2679 /* 2 REG_NOT_VALID_8821C */ 2680 2681 /* 2 REG_NOT_VALID_8821C */ 2682 2683 /* 2 REG_CPU_DMEM_CON_8821C */ 2684 #define BIT_WDT_AUTO_MODE_8821C BIT(22) 2685 #define BIT_WDT_PLATFORM_EN_8821C BIT(21) 2686 #define BIT_WDT_CPU_EN_8821C BIT(20) 2687 #define BIT_WDT_OPT_IOWRAPPER_8821C BIT(19) 2688 #define BIT_ANA_PORT_IDLE_8821C BIT(18) 2689 #define BIT_MAC_PORT_IDLE_8821C BIT(17) 2690 #define BIT_WL_PLATFORM_RST_8821C BIT(16) 2691 #define BIT_WL_SECURITY_CLK_8821C BIT(15) 2692 2693 #define BIT_SHIFT_CPU_DMEM_CON_8821C 0 2694 #define BIT_MASK_CPU_DMEM_CON_8821C 0xff 2695 #define BIT_CPU_DMEM_CON_8821C(x) \ 2696 (((x) & BIT_MASK_CPU_DMEM_CON_8821C) << BIT_SHIFT_CPU_DMEM_CON_8821C) 2697 #define BITS_CPU_DMEM_CON_8821C \ 2698 (BIT_MASK_CPU_DMEM_CON_8821C << BIT_SHIFT_CPU_DMEM_CON_8821C) 2699 #define BIT_CLEAR_CPU_DMEM_CON_8821C(x) ((x) & (~BITS_CPU_DMEM_CON_8821C)) 2700 #define BIT_GET_CPU_DMEM_CON_8821C(x) \ 2701 (((x) >> BIT_SHIFT_CPU_DMEM_CON_8821C) & BIT_MASK_CPU_DMEM_CON_8821C) 2702 #define BIT_SET_CPU_DMEM_CON_8821C(x, v) \ 2703 (BIT_CLEAR_CPU_DMEM_CON_8821C(x) | BIT_CPU_DMEM_CON_8821C(v)) 2704 2705 /* 2 REG_NOT_VALID_8821C */ 2706 2707 /* 2 REG_BOOT_REASON_8821C */ 2708 2709 #define BIT_SHIFT_BOOT_REASON_V1_8821C 0 2710 #define BIT_MASK_BOOT_REASON_V1_8821C 0x7 2711 #define BIT_BOOT_REASON_V1_8821C(x) \ 2712 (((x) & BIT_MASK_BOOT_REASON_V1_8821C) \ 2713 << BIT_SHIFT_BOOT_REASON_V1_8821C) 2714 #define BITS_BOOT_REASON_V1_8821C \ 2715 (BIT_MASK_BOOT_REASON_V1_8821C << BIT_SHIFT_BOOT_REASON_V1_8821C) 2716 #define BIT_CLEAR_BOOT_REASON_V1_8821C(x) ((x) & (~BITS_BOOT_REASON_V1_8821C)) 2717 #define BIT_GET_BOOT_REASON_V1_8821C(x) \ 2718 (((x) >> BIT_SHIFT_BOOT_REASON_V1_8821C) & \ 2719 BIT_MASK_BOOT_REASON_V1_8821C) 2720 #define BIT_SET_BOOT_REASON_V1_8821C(x, v) \ 2721 (BIT_CLEAR_BOOT_REASON_V1_8821C(x) | BIT_BOOT_REASON_V1_8821C(v)) 2722 2723 /* 2 REG_NOT_VALID_8821C */ 2724 2725 /* 2 REG_NOT_VALID_8821C */ 2726 2727 /* 2 REG_NOT_VALID_8821C */ 2728 2729 /* 2 REG_NOT_VALID_8821C */ 2730 2731 /* 2 REG_NOT_VALID_8821C */ 2732 2733 /* 2 REG_NOT_VALID_8821C */ 2734 2735 /* 2 REG_NOT_VALID_8821C */ 2736 2737 /* 2 REG_NFCPAD_CTRL_8821C */ 2738 #define BIT_PAD_SHUTDW_8821C BIT(18) 2739 #define BIT_SYSON_NFC_PAD_8821C BIT(17) 2740 #define BIT_NFC_INT_PAD_CTRL_8821C BIT(16) 2741 #define BIT_NFC_RFDIS_PAD_CTRL_8821C BIT(15) 2742 #define BIT_NFC_CLK_PAD_CTRL_8821C BIT(14) 2743 #define BIT_NFC_DATA_PAD_CTRL_8821C BIT(13) 2744 #define BIT_NFC_PAD_PULL_CTRL_8821C BIT(12) 2745 2746 #define BIT_SHIFT_NFCPAD_IO_SEL_8821C 8 2747 #define BIT_MASK_NFCPAD_IO_SEL_8821C 0xf 2748 #define BIT_NFCPAD_IO_SEL_8821C(x) \ 2749 (((x) & BIT_MASK_NFCPAD_IO_SEL_8821C) << BIT_SHIFT_NFCPAD_IO_SEL_8821C) 2750 #define BITS_NFCPAD_IO_SEL_8821C \ 2751 (BIT_MASK_NFCPAD_IO_SEL_8821C << BIT_SHIFT_NFCPAD_IO_SEL_8821C) 2752 #define BIT_CLEAR_NFCPAD_IO_SEL_8821C(x) ((x) & (~BITS_NFCPAD_IO_SEL_8821C)) 2753 #define BIT_GET_NFCPAD_IO_SEL_8821C(x) \ 2754 (((x) >> BIT_SHIFT_NFCPAD_IO_SEL_8821C) & BIT_MASK_NFCPAD_IO_SEL_8821C) 2755 #define BIT_SET_NFCPAD_IO_SEL_8821C(x, v) \ 2756 (BIT_CLEAR_NFCPAD_IO_SEL_8821C(x) | BIT_NFCPAD_IO_SEL_8821C(v)) 2757 2758 #define BIT_SHIFT_NFCPAD_OUT_8821C 4 2759 #define BIT_MASK_NFCPAD_OUT_8821C 0xf 2760 #define BIT_NFCPAD_OUT_8821C(x) \ 2761 (((x) & BIT_MASK_NFCPAD_OUT_8821C) << BIT_SHIFT_NFCPAD_OUT_8821C) 2762 #define BITS_NFCPAD_OUT_8821C \ 2763 (BIT_MASK_NFCPAD_OUT_8821C << BIT_SHIFT_NFCPAD_OUT_8821C) 2764 #define BIT_CLEAR_NFCPAD_OUT_8821C(x) ((x) & (~BITS_NFCPAD_OUT_8821C)) 2765 #define BIT_GET_NFCPAD_OUT_8821C(x) \ 2766 (((x) >> BIT_SHIFT_NFCPAD_OUT_8821C) & BIT_MASK_NFCPAD_OUT_8821C) 2767 #define BIT_SET_NFCPAD_OUT_8821C(x, v) \ 2768 (BIT_CLEAR_NFCPAD_OUT_8821C(x) | BIT_NFCPAD_OUT_8821C(v)) 2769 2770 #define BIT_SHIFT_NFCPAD_IN_8821C 0 2771 #define BIT_MASK_NFCPAD_IN_8821C 0xf 2772 #define BIT_NFCPAD_IN_8821C(x) \ 2773 (((x) & BIT_MASK_NFCPAD_IN_8821C) << BIT_SHIFT_NFCPAD_IN_8821C) 2774 #define BITS_NFCPAD_IN_8821C \ 2775 (BIT_MASK_NFCPAD_IN_8821C << BIT_SHIFT_NFCPAD_IN_8821C) 2776 #define BIT_CLEAR_NFCPAD_IN_8821C(x) ((x) & (~BITS_NFCPAD_IN_8821C)) 2777 #define BIT_GET_NFCPAD_IN_8821C(x) \ 2778 (((x) >> BIT_SHIFT_NFCPAD_IN_8821C) & BIT_MASK_NFCPAD_IN_8821C) 2779 #define BIT_SET_NFCPAD_IN_8821C(x, v) \ 2780 (BIT_CLEAR_NFCPAD_IN_8821C(x) | BIT_NFCPAD_IN_8821C(v)) 2781 2782 /* 2 REG_NOT_VALID_8821C */ 2783 2784 /* 2 REG_HIMR2_8821C */ 2785 #define BIT_BCNDMAINT_P4_MSK_8821C BIT(31) 2786 #define BIT_BCNDMAINT_P3_MSK_8821C BIT(30) 2787 #define BIT_BCNDMAINT_P2_MSK_8821C BIT(29) 2788 #define BIT_BCNDMAINT_P1_MSK_8821C BIT(28) 2789 #define BIT_ATIMEND7_MSK_8821C BIT(22) 2790 #define BIT_ATIMEND6_MSK_8821C BIT(21) 2791 #define BIT_ATIMEND5_MSK_8821C BIT(20) 2792 #define BIT_ATIMEND4_MSK_8821C BIT(19) 2793 #define BIT_ATIMEND3_MSK_8821C BIT(18) 2794 #define BIT_ATIMEND2_MSK_8821C BIT(17) 2795 #define BIT_ATIMEND1_MSK_8821C BIT(16) 2796 #define BIT_TXBCN7OK_MSK_8821C BIT(14) 2797 #define BIT_TXBCN6OK_MSK_8821C BIT(13) 2798 #define BIT_TXBCN5OK_MSK_8821C BIT(12) 2799 #define BIT_TXBCN4OK_MSK_8821C BIT(11) 2800 #define BIT_TXBCN3OK_MSK_8821C BIT(10) 2801 #define BIT_TXBCN2OK_MSK_8821C BIT(9) 2802 #define BIT_TXBCN1OK_MSK_V1_8821C BIT(8) 2803 #define BIT_TXBCN7ERR_MSK_8821C BIT(6) 2804 #define BIT_TXBCN6ERR_MSK_8821C BIT(5) 2805 #define BIT_TXBCN5ERR_MSK_8821C BIT(4) 2806 #define BIT_TXBCN4ERR_MSK_8821C BIT(3) 2807 #define BIT_TXBCN3ERR_MSK_8821C BIT(2) 2808 #define BIT_TXBCN2ERR_MSK_8821C BIT(1) 2809 #define BIT_TXBCN1ERR_MSK_V1_8821C BIT(0) 2810 2811 /* 2 REG_HISR2_8821C */ 2812 #define BIT_BCNDMAINT_P4_8821C BIT(31) 2813 #define BIT_BCNDMAINT_P3_8821C BIT(30) 2814 #define BIT_BCNDMAINT_P2_8821C BIT(29) 2815 #define BIT_BCNDMAINT_P1_8821C BIT(28) 2816 #define BIT_ATIMEND7_8821C BIT(22) 2817 #define BIT_ATIMEND6_8821C BIT(21) 2818 #define BIT_ATIMEND5_8821C BIT(20) 2819 #define BIT_ATIMEND4_8821C BIT(19) 2820 #define BIT_ATIMEND3_8821C BIT(18) 2821 #define BIT_ATIMEND2_8821C BIT(17) 2822 #define BIT_ATIMEND1_8821C BIT(16) 2823 #define BIT_TXBCN7OK_8821C BIT(14) 2824 #define BIT_TXBCN6OK_8821C BIT(13) 2825 #define BIT_TXBCN5OK_8821C BIT(12) 2826 #define BIT_TXBCN4OK_8821C BIT(11) 2827 #define BIT_TXBCN3OK_8821C BIT(10) 2828 #define BIT_TXBCN2OK_8821C BIT(9) 2829 #define BIT_TXBCN1OK_8821C BIT(8) 2830 #define BIT_TXBCN7ERR_8821C BIT(6) 2831 #define BIT_TXBCN6ERR_8821C BIT(5) 2832 #define BIT_TXBCN5ERR_8821C BIT(4) 2833 #define BIT_TXBCN4ERR_8821C BIT(3) 2834 #define BIT_TXBCN3ERR_8821C BIT(2) 2835 #define BIT_TXBCN2ERR_8821C BIT(1) 2836 #define BIT_TXBCN1ERR_8821C BIT(0) 2837 2838 /* 2 REG_HIMR3_8821C */ 2839 #define BIT_WDT_PLATFORM_INT_MSK_8821C BIT(18) 2840 #define BIT_WDT_CPU_INT_MSK_8821C BIT(17) 2841 #define BIT_SETH2CDOK_MASK_8821C BIT(16) 2842 #define BIT_H2C_CMD_FULL_MASK_8821C BIT(15) 2843 #define BIT_PWR_INT_127_MASK_8821C BIT(14) 2844 #define BIT_TXSHORTCUT_TXDESUPDATEOK_MASK_8821C BIT(13) 2845 #define BIT_TXSHORTCUT_BKUPDATEOK_MASK_8821C BIT(12) 2846 #define BIT_TXSHORTCUT_BEUPDATEOK_MASK_8821C BIT(11) 2847 #define BIT_TXSHORTCUT_VIUPDATEOK_MAS_8821C BIT(10) 2848 #define BIT_TXSHORTCUT_VOUPDATEOK_MASK_8821C BIT(9) 2849 #define BIT_PWR_INT_127_MASK_V1_8821C BIT(8) 2850 #define BIT_PWR_INT_126TO96_MASK_8821C BIT(7) 2851 #define BIT_PWR_INT_95TO64_MASK_8821C BIT(6) 2852 #define BIT_PWR_INT_63TO32_MASK_8821C BIT(5) 2853 #define BIT_PWR_INT_31TO0_MASK_8821C BIT(4) 2854 #define BIT_DDMA0_LP_INT_MSK_8821C BIT(1) 2855 #define BIT_DDMA0_HP_INT_MSK_8821C BIT(0) 2856 2857 /* 2 REG_HISR3_8821C */ 2858 #define BIT_WDT_PLATFORM_INT_8821C BIT(18) 2859 #define BIT_WDT_CPU_INT_8821C BIT(17) 2860 #define BIT_SETH2CDOK_8821C BIT(16) 2861 #define BIT_H2C_CMD_FULL_8821C BIT(15) 2862 #define BIT_PWR_INT_127_8821C BIT(14) 2863 #define BIT_TXSHORTCUT_TXDESUPDATEOK_8821C BIT(13) 2864 #define BIT_TXSHORTCUT_BKUPDATEOK_8821C BIT(12) 2865 #define BIT_TXSHORTCUT_BEUPDATEOK_8821C BIT(11) 2866 #define BIT_TXSHORTCUT_VIUPDATEOK_8821C BIT(10) 2867 #define BIT_TXSHORTCUT_VOUPDATEOK_8821C BIT(9) 2868 #define BIT_PWR_INT_127_V1_8821C BIT(8) 2869 #define BIT_PWR_INT_126TO96_8821C BIT(7) 2870 #define BIT_PWR_INT_95TO64_8821C BIT(6) 2871 #define BIT_PWR_INT_63TO32_8821C BIT(5) 2872 #define BIT_PWR_INT_31TO0_8821C BIT(4) 2873 #define BIT_DDMA0_LP_INT_8821C BIT(1) 2874 #define BIT_DDMA0_HP_INT_8821C BIT(0) 2875 2876 /* 2 REG_SW_MDIO_8821C */ 2877 #define BIT_DIS_TIMEOUT_IO_8821C BIT(24) 2878 2879 /* 2 REG_NOT_VALID_8821C */ 2880 2881 /* 2 REG_NOT_VALID_8821C */ 2882 2883 /* 2 REG_NOT_VALID_8821C */ 2884 2885 /* 2 REG_H2C_PKT_READADDR_8821C */ 2886 2887 #define BIT_SHIFT_H2C_PKT_READADDR_8821C 0 2888 #define BIT_MASK_H2C_PKT_READADDR_8821C 0x3ffff 2889 #define BIT_H2C_PKT_READADDR_8821C(x) \ 2890 (((x) & BIT_MASK_H2C_PKT_READADDR_8821C) \ 2891 << BIT_SHIFT_H2C_PKT_READADDR_8821C) 2892 #define BITS_H2C_PKT_READADDR_8821C \ 2893 (BIT_MASK_H2C_PKT_READADDR_8821C << BIT_SHIFT_H2C_PKT_READADDR_8821C) 2894 #define BIT_CLEAR_H2C_PKT_READADDR_8821C(x) \ 2895 ((x) & (~BITS_H2C_PKT_READADDR_8821C)) 2896 #define BIT_GET_H2C_PKT_READADDR_8821C(x) \ 2897 (((x) >> BIT_SHIFT_H2C_PKT_READADDR_8821C) & \ 2898 BIT_MASK_H2C_PKT_READADDR_8821C) 2899 #define BIT_SET_H2C_PKT_READADDR_8821C(x, v) \ 2900 (BIT_CLEAR_H2C_PKT_READADDR_8821C(x) | BIT_H2C_PKT_READADDR_8821C(v)) 2901 2902 /* 2 REG_H2C_PKT_WRITEADDR_8821C */ 2903 2904 #define BIT_SHIFT_H2C_PKT_WRITEADDR_8821C 0 2905 #define BIT_MASK_H2C_PKT_WRITEADDR_8821C 0x3ffff 2906 #define BIT_H2C_PKT_WRITEADDR_8821C(x) \ 2907 (((x) & BIT_MASK_H2C_PKT_WRITEADDR_8821C) \ 2908 << BIT_SHIFT_H2C_PKT_WRITEADDR_8821C) 2909 #define BITS_H2C_PKT_WRITEADDR_8821C \ 2910 (BIT_MASK_H2C_PKT_WRITEADDR_8821C << BIT_SHIFT_H2C_PKT_WRITEADDR_8821C) 2911 #define BIT_CLEAR_H2C_PKT_WRITEADDR_8821C(x) \ 2912 ((x) & (~BITS_H2C_PKT_WRITEADDR_8821C)) 2913 #define BIT_GET_H2C_PKT_WRITEADDR_8821C(x) \ 2914 (((x) >> BIT_SHIFT_H2C_PKT_WRITEADDR_8821C) & \ 2915 BIT_MASK_H2C_PKT_WRITEADDR_8821C) 2916 #define BIT_SET_H2C_PKT_WRITEADDR_8821C(x, v) \ 2917 (BIT_CLEAR_H2C_PKT_WRITEADDR_8821C(x) | BIT_H2C_PKT_WRITEADDR_8821C(v)) 2918 2919 /* 2 REG_MEM_PWR_CRTL_8821C */ 2920 #define BIT_MEM_BB_SD_8821C BIT(17) 2921 #define BIT_MEM_BB_DS_8821C BIT(16) 2922 #define BIT_MEM_BT_DS_8821C BIT(10) 2923 #define BIT_MEM_SDIO_LS_8821C BIT(9) 2924 #define BIT_MEM_SDIO_DS_8821C BIT(8) 2925 #define BIT_MEM_USB_LS_8821C BIT(7) 2926 #define BIT_MEM_USB_DS_8821C BIT(6) 2927 #define BIT_MEM_PCI_LS_8821C BIT(5) 2928 #define BIT_MEM_PCI_DS_8821C BIT(4) 2929 #define BIT_MEM_WLMAC_LS_8821C BIT(3) 2930 #define BIT_MEM_WLMAC_DS_8821C BIT(2) 2931 #define BIT_MEM_WLMCU_LS_8821C BIT(1) 2932 #define BIT_MEM_WLMCU_DS_8821C BIT(0) 2933 2934 /* 2 REG_NOT_VALID_8821C */ 2935 2936 /* 2 REG_NOT_VALID_8821C */ 2937 2938 /* 2 REG_NOT_VALID_8821C */ 2939 2940 /* 2 REG_NOT_VALID_8821C */ 2941 2942 /* 2 REG_NOT_VALID_8821C */ 2943 2944 /* 2 REG_NOT_VALID_8821C */ 2945 2946 /* 2 REG_NOT_VALID_8821C */ 2947 2948 /* 2 REG_FW_DBG6_8821C */ 2949 2950 #define BIT_SHIFT_FW_DBG6_8821C 0 2951 #define BIT_MASK_FW_DBG6_8821C 0xffffffffL 2952 #define BIT_FW_DBG6_8821C(x) \ 2953 (((x) & BIT_MASK_FW_DBG6_8821C) << BIT_SHIFT_FW_DBG6_8821C) 2954 #define BITS_FW_DBG6_8821C (BIT_MASK_FW_DBG6_8821C << BIT_SHIFT_FW_DBG6_8821C) 2955 #define BIT_CLEAR_FW_DBG6_8821C(x) ((x) & (~BITS_FW_DBG6_8821C)) 2956 #define BIT_GET_FW_DBG6_8821C(x) \ 2957 (((x) >> BIT_SHIFT_FW_DBG6_8821C) & BIT_MASK_FW_DBG6_8821C) 2958 #define BIT_SET_FW_DBG6_8821C(x, v) \ 2959 (BIT_CLEAR_FW_DBG6_8821C(x) | BIT_FW_DBG6_8821C(v)) 2960 2961 /* 2 REG_FW_DBG7_8821C */ 2962 2963 #define BIT_SHIFT_FW_DBG7_8821C 0 2964 #define BIT_MASK_FW_DBG7_8821C 0xffffffffL 2965 #define BIT_FW_DBG7_8821C(x) \ 2966 (((x) & BIT_MASK_FW_DBG7_8821C) << BIT_SHIFT_FW_DBG7_8821C) 2967 #define BITS_FW_DBG7_8821C (BIT_MASK_FW_DBG7_8821C << BIT_SHIFT_FW_DBG7_8821C) 2968 #define BIT_CLEAR_FW_DBG7_8821C(x) ((x) & (~BITS_FW_DBG7_8821C)) 2969 #define BIT_GET_FW_DBG7_8821C(x) \ 2970 (((x) >> BIT_SHIFT_FW_DBG7_8821C) & BIT_MASK_FW_DBG7_8821C) 2971 #define BIT_SET_FW_DBG7_8821C(x, v) \ 2972 (BIT_CLEAR_FW_DBG7_8821C(x) | BIT_FW_DBG7_8821C(v)) 2973 2974 /* 2 REG_NOT_VALID_8821C */ 2975 2976 /* 2 REG_NOT_VALID_8821C */ 2977 2978 /* 2 REG_NOT_VALID_8821C */ 2979 2980 /* 2 REG_NOT_VALID_8821C */ 2981 2982 /* 2 REG_NOT_VALID_8821C */ 2983 2984 /* 2 REG_NOT_VALID_8821C */ 2985 2986 /* 2 REG_NOT_VALID_8821C */ 2987 2988 /* 2 REG_NOT_VALID_8821C */ 2989 2990 /* 2 REG_NOT_VALID_8821C */ 2991 2992 /* 2 REG_NOT_VALID_8821C */ 2993 2994 /* 2 REG_NOT_VALID_8821C */ 2995 2996 /* 2 REG_NOT_VALID_8821C */ 2997 2998 /* 2 REG_NOT_VALID_8821C */ 2999 3000 /* 2 REG_NOT_VALID_8821C */ 3001 3002 /* 2 REG_NOT_VALID_8821C */ 3003 3004 /* 2 REG_NOT_VALID_8821C */ 3005 3006 /* 2 REG_NOT_VALID_8821C */ 3007 3008 /* 2 REG_NOT_VALID_8821C */ 3009 3010 /* 2 REG_NOT_VALID_8821C */ 3011 3012 /* 2 REG_NOT_VALID_8821C */ 3013 3014 /* 2 REG_NOT_VALID_8821C */ 3015 3016 /* 2 REG_NOT_VALID_8821C */ 3017 3018 /* 2 REG_NOT_VALID_8821C */ 3019 3020 /* 2 REG_NOT_VALID_8821C */ 3021 3022 /* 2 REG_NOT_VALID_8821C */ 3023 3024 /* 2 REG_NOT_VALID_8821C */ 3025 3026 /* 2 REG_NOT_VALID_8821C */ 3027 3028 /* 2 REG_NOT_VALID_8821C */ 3029 3030 /* 2 REG_NOT_VALID_8821C */ 3031 3032 /* 2 REG_NOT_VALID_8821C */ 3033 3034 /* 2 REG_NOT_VALID_8821C */ 3035 3036 /* 2 REG_NOT_VALID_8821C */ 3037 3038 /* 2 REG_NOT_VALID_8821C */ 3039 3040 /* 2 REG_NOT_VALID_8821C */ 3041 3042 /* 2 REG_NOT_VALID_8821C */ 3043 3044 /* 2 REG_NOT_VALID_8821C */ 3045 3046 /* 2 REG_NOT_VALID_8821C */ 3047 3048 /* 2 REG_NOT_VALID_8821C */ 3049 3050 /* 2 REG_NOT_VALID_8821C */ 3051 3052 /* 2 REG_NOT_VALID_8821C */ 3053 3054 /* 2 REG_NOT_VALID_8821C */ 3055 3056 /* 2 REG_NOT_VALID_8821C */ 3057 3058 /* 2 REG_NOT_VALID_8821C */ 3059 3060 /* 2 REG_NOT_VALID_8821C */ 3061 3062 /* 2 REG_NOT_VALID_8821C */ 3063 3064 /* 2 REG_NOT_VALID_8821C */ 3065 3066 /* 2 REG_NOT_VALID_8821C */ 3067 3068 /* 2 REG_NOT_VALID_8821C */ 3069 3070 /* 2 REG_NOT_VALID_8821C */ 3071 3072 /* 2 REG_NOT_VALID_8821C */ 3073 3074 /* 2 REG_NOT_VALID_8821C */ 3075 3076 /* 2 REG_NOT_VALID_8821C */ 3077 3078 /* 2 REG_NOT_VALID_8821C */ 3079 3080 /* 2 REG_NOT_VALID_8821C */ 3081 3082 /* 2 REG_NOT_VALID_8821C */ 3083 3084 /* 2 REG_NOT_VALID_8821C */ 3085 3086 /* 2 REG_NOT_VALID_8821C */ 3087 3088 /* 2 REG_NOT_VALID_8821C */ 3089 3090 /* 2 REG_NOT_VALID_8821C */ 3091 3092 /* 2 REG_NOT_VALID_8821C */ 3093 3094 /* 2 REG_NOT_VALID_8821C */ 3095 3096 /* 2 REG_NOT_VALID_8821C */ 3097 3098 /* 2 REG_NOT_VALID_8821C */ 3099 3100 /* 2 REG_NOT_VALID_8821C */ 3101 3102 /* 2 REG_NOT_VALID_8821C */ 3103 3104 /* 2 REG_CR_8821C */ 3105 3106 #define BIT_SHIFT_LBMODE_8821C 24 3107 #define BIT_MASK_LBMODE_8821C 0x1f 3108 #define BIT_LBMODE_8821C(x) \ 3109 (((x) & BIT_MASK_LBMODE_8821C) << BIT_SHIFT_LBMODE_8821C) 3110 #define BITS_LBMODE_8821C (BIT_MASK_LBMODE_8821C << BIT_SHIFT_LBMODE_8821C) 3111 #define BIT_CLEAR_LBMODE_8821C(x) ((x) & (~BITS_LBMODE_8821C)) 3112 #define BIT_GET_LBMODE_8821C(x) \ 3113 (((x) >> BIT_SHIFT_LBMODE_8821C) & BIT_MASK_LBMODE_8821C) 3114 #define BIT_SET_LBMODE_8821C(x, v) \ 3115 (BIT_CLEAR_LBMODE_8821C(x) | BIT_LBMODE_8821C(v)) 3116 3117 #define BIT_SHIFT_NETYPE1_8821C 18 3118 #define BIT_MASK_NETYPE1_8821C 0x3 3119 #define BIT_NETYPE1_8821C(x) \ 3120 (((x) & BIT_MASK_NETYPE1_8821C) << BIT_SHIFT_NETYPE1_8821C) 3121 #define BITS_NETYPE1_8821C (BIT_MASK_NETYPE1_8821C << BIT_SHIFT_NETYPE1_8821C) 3122 #define BIT_CLEAR_NETYPE1_8821C(x) ((x) & (~BITS_NETYPE1_8821C)) 3123 #define BIT_GET_NETYPE1_8821C(x) \ 3124 (((x) >> BIT_SHIFT_NETYPE1_8821C) & BIT_MASK_NETYPE1_8821C) 3125 #define BIT_SET_NETYPE1_8821C(x, v) \ 3126 (BIT_CLEAR_NETYPE1_8821C(x) | BIT_NETYPE1_8821C(v)) 3127 3128 #define BIT_SHIFT_NETYPE0_8821C 16 3129 #define BIT_MASK_NETYPE0_8821C 0x3 3130 #define BIT_NETYPE0_8821C(x) \ 3131 (((x) & BIT_MASK_NETYPE0_8821C) << BIT_SHIFT_NETYPE0_8821C) 3132 #define BITS_NETYPE0_8821C (BIT_MASK_NETYPE0_8821C << BIT_SHIFT_NETYPE0_8821C) 3133 #define BIT_CLEAR_NETYPE0_8821C(x) ((x) & (~BITS_NETYPE0_8821C)) 3134 #define BIT_GET_NETYPE0_8821C(x) \ 3135 (((x) >> BIT_SHIFT_NETYPE0_8821C) & BIT_MASK_NETYPE0_8821C) 3136 #define BIT_SET_NETYPE0_8821C(x, v) \ 3137 (BIT_CLEAR_NETYPE0_8821C(x) | BIT_NETYPE0_8821C(v)) 3138 3139 #define BIT_COUNTER_STS_EN_8821C BIT(13) 3140 #define BIT_I2C_MAILBOX_EN_8821C BIT(12) 3141 #define BIT_SHCUT_EN_8821C BIT(11) 3142 #define BIT_32K_CAL_TMR_EN_8821C BIT(10) 3143 #define BIT_MAC_SEC_EN_8821C BIT(9) 3144 #define BIT_ENSWBCN_8821C BIT(8) 3145 #define BIT_MACRXEN_8821C BIT(7) 3146 #define BIT_MACTXEN_8821C BIT(6) 3147 #define BIT_SCHEDULE_EN_8821C BIT(5) 3148 #define BIT_PROTOCOL_EN_8821C BIT(4) 3149 #define BIT_RXDMA_EN_8821C BIT(3) 3150 #define BIT_TXDMA_EN_8821C BIT(2) 3151 #define BIT_HCI_RXDMA_EN_8821C BIT(1) 3152 #define BIT_HCI_TXDMA_EN_8821C BIT(0) 3153 3154 /* 2 REG_PG_SIZE_8821C */ 3155 3156 #define BIT_SHIFT_DBG_FIFO_SEL_8821C 16 3157 #define BIT_MASK_DBG_FIFO_SEL_8821C 0xff 3158 #define BIT_DBG_FIFO_SEL_8821C(x) \ 3159 (((x) & BIT_MASK_DBG_FIFO_SEL_8821C) << BIT_SHIFT_DBG_FIFO_SEL_8821C) 3160 #define BITS_DBG_FIFO_SEL_8821C \ 3161 (BIT_MASK_DBG_FIFO_SEL_8821C << BIT_SHIFT_DBG_FIFO_SEL_8821C) 3162 #define BIT_CLEAR_DBG_FIFO_SEL_8821C(x) ((x) & (~BITS_DBG_FIFO_SEL_8821C)) 3163 #define BIT_GET_DBG_FIFO_SEL_8821C(x) \ 3164 (((x) >> BIT_SHIFT_DBG_FIFO_SEL_8821C) & BIT_MASK_DBG_FIFO_SEL_8821C) 3165 #define BIT_SET_DBG_FIFO_SEL_8821C(x, v) \ 3166 (BIT_CLEAR_DBG_FIFO_SEL_8821C(x) | BIT_DBG_FIFO_SEL_8821C(v)) 3167 3168 /* 2 REG_PKT_BUFF_ACCESS_CTRL_8821C */ 3169 3170 #define BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8821C 0 3171 #define BIT_MASK_PKT_BUFF_ACCESS_CTRL_8821C 0xff 3172 #define BIT_PKT_BUFF_ACCESS_CTRL_8821C(x) \ 3173 (((x) & BIT_MASK_PKT_BUFF_ACCESS_CTRL_8821C) \ 3174 << BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8821C) 3175 #define BITS_PKT_BUFF_ACCESS_CTRL_8821C \ 3176 (BIT_MASK_PKT_BUFF_ACCESS_CTRL_8821C \ 3177 << BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8821C) 3178 #define BIT_CLEAR_PKT_BUFF_ACCESS_CTRL_8821C(x) \ 3179 ((x) & (~BITS_PKT_BUFF_ACCESS_CTRL_8821C)) 3180 #define BIT_GET_PKT_BUFF_ACCESS_CTRL_8821C(x) \ 3181 (((x) >> BIT_SHIFT_PKT_BUFF_ACCESS_CTRL_8821C) & \ 3182 BIT_MASK_PKT_BUFF_ACCESS_CTRL_8821C) 3183 #define BIT_SET_PKT_BUFF_ACCESS_CTRL_8821C(x, v) \ 3184 (BIT_CLEAR_PKT_BUFF_ACCESS_CTRL_8821C(x) | \ 3185 BIT_PKT_BUFF_ACCESS_CTRL_8821C(v)) 3186 3187 /* 2 REG_TSF_CLK_STATE_8821C */ 3188 #define BIT_TSF_CLK_STABLE_8821C BIT(15) 3189 3190 /* 2 REG_TXDMA_PQ_MAP_8821C */ 3191 3192 #define BIT_SHIFT_TXDMA_H2C_MAP_8821C 16 3193 #define BIT_MASK_TXDMA_H2C_MAP_8821C 0x3 3194 #define BIT_TXDMA_H2C_MAP_8821C(x) \ 3195 (((x) & BIT_MASK_TXDMA_H2C_MAP_8821C) << BIT_SHIFT_TXDMA_H2C_MAP_8821C) 3196 #define BITS_TXDMA_H2C_MAP_8821C \ 3197 (BIT_MASK_TXDMA_H2C_MAP_8821C << BIT_SHIFT_TXDMA_H2C_MAP_8821C) 3198 #define BIT_CLEAR_TXDMA_H2C_MAP_8821C(x) ((x) & (~BITS_TXDMA_H2C_MAP_8821C)) 3199 #define BIT_GET_TXDMA_H2C_MAP_8821C(x) \ 3200 (((x) >> BIT_SHIFT_TXDMA_H2C_MAP_8821C) & BIT_MASK_TXDMA_H2C_MAP_8821C) 3201 #define BIT_SET_TXDMA_H2C_MAP_8821C(x, v) \ 3202 (BIT_CLEAR_TXDMA_H2C_MAP_8821C(x) | BIT_TXDMA_H2C_MAP_8821C(v)) 3203 3204 #define BIT_SHIFT_TXDMA_HIQ_MAP_8821C 14 3205 #define BIT_MASK_TXDMA_HIQ_MAP_8821C 0x3 3206 #define BIT_TXDMA_HIQ_MAP_8821C(x) \ 3207 (((x) & BIT_MASK_TXDMA_HIQ_MAP_8821C) << BIT_SHIFT_TXDMA_HIQ_MAP_8821C) 3208 #define BITS_TXDMA_HIQ_MAP_8821C \ 3209 (BIT_MASK_TXDMA_HIQ_MAP_8821C << BIT_SHIFT_TXDMA_HIQ_MAP_8821C) 3210 #define BIT_CLEAR_TXDMA_HIQ_MAP_8821C(x) ((x) & (~BITS_TXDMA_HIQ_MAP_8821C)) 3211 #define BIT_GET_TXDMA_HIQ_MAP_8821C(x) \ 3212 (((x) >> BIT_SHIFT_TXDMA_HIQ_MAP_8821C) & BIT_MASK_TXDMA_HIQ_MAP_8821C) 3213 #define BIT_SET_TXDMA_HIQ_MAP_8821C(x, v) \ 3214 (BIT_CLEAR_TXDMA_HIQ_MAP_8821C(x) | BIT_TXDMA_HIQ_MAP_8821C(v)) 3215 3216 #define BIT_SHIFT_TXDMA_MGQ_MAP_8821C 12 3217 #define BIT_MASK_TXDMA_MGQ_MAP_8821C 0x3 3218 #define BIT_TXDMA_MGQ_MAP_8821C(x) \ 3219 (((x) & BIT_MASK_TXDMA_MGQ_MAP_8821C) << BIT_SHIFT_TXDMA_MGQ_MAP_8821C) 3220 #define BITS_TXDMA_MGQ_MAP_8821C \ 3221 (BIT_MASK_TXDMA_MGQ_MAP_8821C << BIT_SHIFT_TXDMA_MGQ_MAP_8821C) 3222 #define BIT_CLEAR_TXDMA_MGQ_MAP_8821C(x) ((x) & (~BITS_TXDMA_MGQ_MAP_8821C)) 3223 #define BIT_GET_TXDMA_MGQ_MAP_8821C(x) \ 3224 (((x) >> BIT_SHIFT_TXDMA_MGQ_MAP_8821C) & BIT_MASK_TXDMA_MGQ_MAP_8821C) 3225 #define BIT_SET_TXDMA_MGQ_MAP_8821C(x, v) \ 3226 (BIT_CLEAR_TXDMA_MGQ_MAP_8821C(x) | BIT_TXDMA_MGQ_MAP_8821C(v)) 3227 3228 #define BIT_SHIFT_TXDMA_BKQ_MAP_8821C 10 3229 #define BIT_MASK_TXDMA_BKQ_MAP_8821C 0x3 3230 #define BIT_TXDMA_BKQ_MAP_8821C(x) \ 3231 (((x) & BIT_MASK_TXDMA_BKQ_MAP_8821C) << BIT_SHIFT_TXDMA_BKQ_MAP_8821C) 3232 #define BITS_TXDMA_BKQ_MAP_8821C \ 3233 (BIT_MASK_TXDMA_BKQ_MAP_8821C << BIT_SHIFT_TXDMA_BKQ_MAP_8821C) 3234 #define BIT_CLEAR_TXDMA_BKQ_MAP_8821C(x) ((x) & (~BITS_TXDMA_BKQ_MAP_8821C)) 3235 #define BIT_GET_TXDMA_BKQ_MAP_8821C(x) \ 3236 (((x) >> BIT_SHIFT_TXDMA_BKQ_MAP_8821C) & BIT_MASK_TXDMA_BKQ_MAP_8821C) 3237 #define BIT_SET_TXDMA_BKQ_MAP_8821C(x, v) \ 3238 (BIT_CLEAR_TXDMA_BKQ_MAP_8821C(x) | BIT_TXDMA_BKQ_MAP_8821C(v)) 3239 3240 #define BIT_SHIFT_TXDMA_BEQ_MAP_8821C 8 3241 #define BIT_MASK_TXDMA_BEQ_MAP_8821C 0x3 3242 #define BIT_TXDMA_BEQ_MAP_8821C(x) \ 3243 (((x) & BIT_MASK_TXDMA_BEQ_MAP_8821C) << BIT_SHIFT_TXDMA_BEQ_MAP_8821C) 3244 #define BITS_TXDMA_BEQ_MAP_8821C \ 3245 (BIT_MASK_TXDMA_BEQ_MAP_8821C << BIT_SHIFT_TXDMA_BEQ_MAP_8821C) 3246 #define BIT_CLEAR_TXDMA_BEQ_MAP_8821C(x) ((x) & (~BITS_TXDMA_BEQ_MAP_8821C)) 3247 #define BIT_GET_TXDMA_BEQ_MAP_8821C(x) \ 3248 (((x) >> BIT_SHIFT_TXDMA_BEQ_MAP_8821C) & BIT_MASK_TXDMA_BEQ_MAP_8821C) 3249 #define BIT_SET_TXDMA_BEQ_MAP_8821C(x, v) \ 3250 (BIT_CLEAR_TXDMA_BEQ_MAP_8821C(x) | BIT_TXDMA_BEQ_MAP_8821C(v)) 3251 3252 #define BIT_SHIFT_TXDMA_VIQ_MAP_8821C 6 3253 #define BIT_MASK_TXDMA_VIQ_MAP_8821C 0x3 3254 #define BIT_TXDMA_VIQ_MAP_8821C(x) \ 3255 (((x) & BIT_MASK_TXDMA_VIQ_MAP_8821C) << BIT_SHIFT_TXDMA_VIQ_MAP_8821C) 3256 #define BITS_TXDMA_VIQ_MAP_8821C \ 3257 (BIT_MASK_TXDMA_VIQ_MAP_8821C << BIT_SHIFT_TXDMA_VIQ_MAP_8821C) 3258 #define BIT_CLEAR_TXDMA_VIQ_MAP_8821C(x) ((x) & (~BITS_TXDMA_VIQ_MAP_8821C)) 3259 #define BIT_GET_TXDMA_VIQ_MAP_8821C(x) \ 3260 (((x) >> BIT_SHIFT_TXDMA_VIQ_MAP_8821C) & BIT_MASK_TXDMA_VIQ_MAP_8821C) 3261 #define BIT_SET_TXDMA_VIQ_MAP_8821C(x, v) \ 3262 (BIT_CLEAR_TXDMA_VIQ_MAP_8821C(x) | BIT_TXDMA_VIQ_MAP_8821C(v)) 3263 3264 #define BIT_SHIFT_TXDMA_VOQ_MAP_8821C 4 3265 #define BIT_MASK_TXDMA_VOQ_MAP_8821C 0x3 3266 #define BIT_TXDMA_VOQ_MAP_8821C(x) \ 3267 (((x) & BIT_MASK_TXDMA_VOQ_MAP_8821C) << BIT_SHIFT_TXDMA_VOQ_MAP_8821C) 3268 #define BITS_TXDMA_VOQ_MAP_8821C \ 3269 (BIT_MASK_TXDMA_VOQ_MAP_8821C << BIT_SHIFT_TXDMA_VOQ_MAP_8821C) 3270 #define BIT_CLEAR_TXDMA_VOQ_MAP_8821C(x) ((x) & (~BITS_TXDMA_VOQ_MAP_8821C)) 3271 #define BIT_GET_TXDMA_VOQ_MAP_8821C(x) \ 3272 (((x) >> BIT_SHIFT_TXDMA_VOQ_MAP_8821C) & BIT_MASK_TXDMA_VOQ_MAP_8821C) 3273 #define BIT_SET_TXDMA_VOQ_MAP_8821C(x, v) \ 3274 (BIT_CLEAR_TXDMA_VOQ_MAP_8821C(x) | BIT_TXDMA_VOQ_MAP_8821C(v)) 3275 3276 #define BIT_RXDMA_AGG_EN_8821C BIT(2) 3277 #define BIT_RXSHFT_EN_8821C BIT(1) 3278 #define BIT_RXDMA_ARBBW_EN_8821C BIT(0) 3279 3280 /* 2 REG_NOT_VALID_8821C */ 3281 3282 /* 2 REG_TRXFF_BNDY_8821C */ 3283 3284 #define BIT_SHIFT_RXFFOVFL_RSV_V2_8821C 8 3285 #define BIT_MASK_RXFFOVFL_RSV_V2_8821C 0xf 3286 #define BIT_RXFFOVFL_RSV_V2_8821C(x) \ 3287 (((x) & BIT_MASK_RXFFOVFL_RSV_V2_8821C) \ 3288 << BIT_SHIFT_RXFFOVFL_RSV_V2_8821C) 3289 #define BITS_RXFFOVFL_RSV_V2_8821C \ 3290 (BIT_MASK_RXFFOVFL_RSV_V2_8821C << BIT_SHIFT_RXFFOVFL_RSV_V2_8821C) 3291 #define BIT_CLEAR_RXFFOVFL_RSV_V2_8821C(x) ((x) & (~BITS_RXFFOVFL_RSV_V2_8821C)) 3292 #define BIT_GET_RXFFOVFL_RSV_V2_8821C(x) \ 3293 (((x) >> BIT_SHIFT_RXFFOVFL_RSV_V2_8821C) & \ 3294 BIT_MASK_RXFFOVFL_RSV_V2_8821C) 3295 #define BIT_SET_RXFFOVFL_RSV_V2_8821C(x, v) \ 3296 (BIT_CLEAR_RXFFOVFL_RSV_V2_8821C(x) | BIT_RXFFOVFL_RSV_V2_8821C(v)) 3297 3298 /* 2 REG_PTA_I2C_MBOX_8821C */ 3299 3300 /* 2 REG_NOT_VALID_8821C */ 3301 3302 #define BIT_SHIFT_I2C_M_STATUS_8821C 8 3303 #define BIT_MASK_I2C_M_STATUS_8821C 0xf 3304 #define BIT_I2C_M_STATUS_8821C(x) \ 3305 (((x) & BIT_MASK_I2C_M_STATUS_8821C) << BIT_SHIFT_I2C_M_STATUS_8821C) 3306 #define BITS_I2C_M_STATUS_8821C \ 3307 (BIT_MASK_I2C_M_STATUS_8821C << BIT_SHIFT_I2C_M_STATUS_8821C) 3308 #define BIT_CLEAR_I2C_M_STATUS_8821C(x) ((x) & (~BITS_I2C_M_STATUS_8821C)) 3309 #define BIT_GET_I2C_M_STATUS_8821C(x) \ 3310 (((x) >> BIT_SHIFT_I2C_M_STATUS_8821C) & BIT_MASK_I2C_M_STATUS_8821C) 3311 #define BIT_SET_I2C_M_STATUS_8821C(x, v) \ 3312 (BIT_CLEAR_I2C_M_STATUS_8821C(x) | BIT_I2C_M_STATUS_8821C(v)) 3313 3314 #define BIT_SHIFT_I2C_M_BUS_GNT_FW_8821C 4 3315 #define BIT_MASK_I2C_M_BUS_GNT_FW_8821C 0x7 3316 #define BIT_I2C_M_BUS_GNT_FW_8821C(x) \ 3317 (((x) & BIT_MASK_I2C_M_BUS_GNT_FW_8821C) \ 3318 << BIT_SHIFT_I2C_M_BUS_GNT_FW_8821C) 3319 #define BITS_I2C_M_BUS_GNT_FW_8821C \ 3320 (BIT_MASK_I2C_M_BUS_GNT_FW_8821C << BIT_SHIFT_I2C_M_BUS_GNT_FW_8821C) 3321 #define BIT_CLEAR_I2C_M_BUS_GNT_FW_8821C(x) \ 3322 ((x) & (~BITS_I2C_M_BUS_GNT_FW_8821C)) 3323 #define BIT_GET_I2C_M_BUS_GNT_FW_8821C(x) \ 3324 (((x) >> BIT_SHIFT_I2C_M_BUS_GNT_FW_8821C) & \ 3325 BIT_MASK_I2C_M_BUS_GNT_FW_8821C) 3326 #define BIT_SET_I2C_M_BUS_GNT_FW_8821C(x, v) \ 3327 (BIT_CLEAR_I2C_M_BUS_GNT_FW_8821C(x) | BIT_I2C_M_BUS_GNT_FW_8821C(v)) 3328 3329 #define BIT_I2C_M_GNT_FW_8821C BIT(3) 3330 3331 #define BIT_SHIFT_I2C_M_SPEED_8821C 1 3332 #define BIT_MASK_I2C_M_SPEED_8821C 0x3 3333 #define BIT_I2C_M_SPEED_8821C(x) \ 3334 (((x) & BIT_MASK_I2C_M_SPEED_8821C) << BIT_SHIFT_I2C_M_SPEED_8821C) 3335 #define BITS_I2C_M_SPEED_8821C \ 3336 (BIT_MASK_I2C_M_SPEED_8821C << BIT_SHIFT_I2C_M_SPEED_8821C) 3337 #define BIT_CLEAR_I2C_M_SPEED_8821C(x) ((x) & (~BITS_I2C_M_SPEED_8821C)) 3338 #define BIT_GET_I2C_M_SPEED_8821C(x) \ 3339 (((x) >> BIT_SHIFT_I2C_M_SPEED_8821C) & BIT_MASK_I2C_M_SPEED_8821C) 3340 #define BIT_SET_I2C_M_SPEED_8821C(x, v) \ 3341 (BIT_CLEAR_I2C_M_SPEED_8821C(x) | BIT_I2C_M_SPEED_8821C(v)) 3342 3343 #define BIT_I2C_M_UNLOCK_8821C BIT(0) 3344 3345 /* 2 REG_RXFF_BNDY_8821C */ 3346 3347 /* 2 REG_NOT_VALID_8821C */ 3348 3349 #define BIT_SHIFT_RXFF0_BNDY_V2_8821C 0 3350 #define BIT_MASK_RXFF0_BNDY_V2_8821C 0x3ffff 3351 #define BIT_RXFF0_BNDY_V2_8821C(x) \ 3352 (((x) & BIT_MASK_RXFF0_BNDY_V2_8821C) << BIT_SHIFT_RXFF0_BNDY_V2_8821C) 3353 #define BITS_RXFF0_BNDY_V2_8821C \ 3354 (BIT_MASK_RXFF0_BNDY_V2_8821C << BIT_SHIFT_RXFF0_BNDY_V2_8821C) 3355 #define BIT_CLEAR_RXFF0_BNDY_V2_8821C(x) ((x) & (~BITS_RXFF0_BNDY_V2_8821C)) 3356 #define BIT_GET_RXFF0_BNDY_V2_8821C(x) \ 3357 (((x) >> BIT_SHIFT_RXFF0_BNDY_V2_8821C) & BIT_MASK_RXFF0_BNDY_V2_8821C) 3358 #define BIT_SET_RXFF0_BNDY_V2_8821C(x, v) \ 3359 (BIT_CLEAR_RXFF0_BNDY_V2_8821C(x) | BIT_RXFF0_BNDY_V2_8821C(v)) 3360 3361 /* 2 REG_FE1IMR_8821C */ 3362 #define BIT_FS_RXDMA2_DONE_INT_EN_8821C BIT(28) 3363 #define BIT_FS_RXDONE3_INT_EN_8821C BIT(27) 3364 #define BIT_FS_RXDONE2_INT_EN_8821C BIT(26) 3365 #define BIT_FS_RX_BCN_P4_INT_EN_8821C BIT(25) 3366 #define BIT_FS_RX_BCN_P3_INT_EN_8821C BIT(24) 3367 #define BIT_FS_RX_BCN_P2_INT_EN_8821C BIT(23) 3368 #define BIT_FS_RX_BCN_P1_INT_EN_8821C BIT(22) 3369 #define BIT_FS_RX_BCN_P0_INT_EN_8821C BIT(21) 3370 #define BIT_FS_RX_UMD0_INT_EN_8821C BIT(20) 3371 #define BIT_FS_RX_UMD1_INT_EN_8821C BIT(19) 3372 #define BIT_FS_RX_BMD0_INT_EN_8821C BIT(18) 3373 #define BIT_FS_RX_BMD1_INT_EN_8821C BIT(17) 3374 #define BIT_FS_RXDONE_INT_EN_8821C BIT(16) 3375 #define BIT_FS_WWLAN_INT_EN_8821C BIT(15) 3376 #define BIT_FS_SOUND_DONE_INT_EN_8821C BIT(14) 3377 #define BIT_FS_LP_STBY_INT_EN_8821C BIT(13) 3378 #define BIT_FS_TRL_MTR_INT_EN_8821C BIT(12) 3379 #define BIT_FS_BF1_PRETO_INT_EN_8821C BIT(11) 3380 #define BIT_FS_BF0_PRETO_INT_EN_8821C BIT(10) 3381 #define BIT_FS_PTCL_RELEASE_MACID_INT_EN_8821C BIT(9) 3382 #define BIT_FS_LTE_COEX_EN_8821C BIT(6) 3383 #define BIT_FS_WLACTOFF_INT_EN_8821C BIT(5) 3384 #define BIT_FS_WLACTON_INT_EN_8821C BIT(4) 3385 #define BIT_FS_BTCMD_INT_EN_8821C BIT(3) 3386 #define BIT_FS_REG_MAILBOX_TO_I2C_INT_EN_8821C BIT(2) 3387 #define BIT_FS_TRPC_TO_INT_EN_V1_8821C BIT(1) 3388 #define BIT_FS_RPC_O_T_INT_EN_V1_8821C BIT(0) 3389 3390 /* 2 REG_FE1ISR_8821C */ 3391 #define BIT_FS_RXDMA2_DONE_INT_8821C BIT(28) 3392 #define BIT_FS_RXDONE3_INT_8821C BIT(27) 3393 #define BIT_FS_RXDONE2_INT_8821C BIT(26) 3394 #define BIT_FS_RX_BCN_P4_INT_8821C BIT(25) 3395 #define BIT_FS_RX_BCN_P3_INT_8821C BIT(24) 3396 #define BIT_FS_RX_BCN_P2_INT_8821C BIT(23) 3397 #define BIT_FS_RX_BCN_P1_INT_8821C BIT(22) 3398 #define BIT_FS_RX_BCN_P0_INT_8821C BIT(21) 3399 #define BIT_FS_RX_UMD0_INT_8821C BIT(20) 3400 #define BIT_FS_RX_UMD1_INT_8821C BIT(19) 3401 #define BIT_FS_RX_BMD0_INT_8821C BIT(18) 3402 #define BIT_FS_RX_BMD1_INT_8821C BIT(17) 3403 #define BIT_FS_RXDONE_INT_8821C BIT(16) 3404 #define BIT_FS_WWLAN_INT_8821C BIT(15) 3405 #define BIT_FS_SOUND_DONE_INT_8821C BIT(14) 3406 #define BIT_FS_LP_STBY_INT_8821C BIT(13) 3407 #define BIT_FS_TRL_MTR_INT_8821C BIT(12) 3408 #define BIT_FS_BF1_PRETO_INT_8821C BIT(11) 3409 #define BIT_FS_BF0_PRETO_INT_8821C BIT(10) 3410 #define BIT_FS_PTCL_RELEASE_MACID_INT_8821C BIT(9) 3411 #define BIT_FS_LTE_COEX_INT_8821C BIT(6) 3412 #define BIT_FS_WLACTOFF_INT_8821C BIT(5) 3413 #define BIT_FS_WLACTON_INT_8821C BIT(4) 3414 #define BIT_FS_BCN_RX_INT_INT_8821C BIT(3) 3415 #define BIT_FS_MAILBOX_TO_I2C_INT_8821C BIT(2) 3416 #define BIT_FS_TRPC_TO_INT_8821C BIT(1) 3417 #define BIT_FS_RPC_O_T_INT_8821C BIT(0) 3418 3419 /* 2 REG_NOT_VALID_8821C */ 3420 3421 /* 2 REG_CPWM_8821C */ 3422 #define BIT_CPWM_TOGGLING_8821C BIT(31) 3423 3424 #define BIT_SHIFT_CPWM_MOD_8821C 24 3425 #define BIT_MASK_CPWM_MOD_8821C 0x7f 3426 #define BIT_CPWM_MOD_8821C(x) \ 3427 (((x) & BIT_MASK_CPWM_MOD_8821C) << BIT_SHIFT_CPWM_MOD_8821C) 3428 #define BITS_CPWM_MOD_8821C \ 3429 (BIT_MASK_CPWM_MOD_8821C << BIT_SHIFT_CPWM_MOD_8821C) 3430 #define BIT_CLEAR_CPWM_MOD_8821C(x) ((x) & (~BITS_CPWM_MOD_8821C)) 3431 #define BIT_GET_CPWM_MOD_8821C(x) \ 3432 (((x) >> BIT_SHIFT_CPWM_MOD_8821C) & BIT_MASK_CPWM_MOD_8821C) 3433 #define BIT_SET_CPWM_MOD_8821C(x, v) \ 3434 (BIT_CLEAR_CPWM_MOD_8821C(x) | BIT_CPWM_MOD_8821C(v)) 3435 3436 /* 2 REG_FWIMR_8821C */ 3437 #define BIT_FS_TXBCNOK_MB7_INT_EN_8821C BIT(31) 3438 #define BIT_FS_TXBCNOK_MB6_INT_EN_8821C BIT(30) 3439 #define BIT_FS_TXBCNOK_MB5_INT_EN_8821C BIT(29) 3440 #define BIT_FS_TXBCNOK_MB4_INT_EN_8821C BIT(28) 3441 #define BIT_FS_TXBCNOK_MB3_INT_EN_8821C BIT(27) 3442 #define BIT_FS_TXBCNOK_MB2_INT_EN_8821C BIT(26) 3443 #define BIT_FS_TXBCNOK_MB1_INT_EN_8821C BIT(25) 3444 #define BIT_FS_TXBCNOK_MB0_INT_EN_8821C BIT(24) 3445 #define BIT_FS_TXBCNERR_MB7_INT_EN_8821C BIT(23) 3446 #define BIT_FS_TXBCNERR_MB6_INT_EN_8821C BIT(22) 3447 #define BIT_FS_TXBCNERR_MB5_INT_EN_8821C BIT(21) 3448 #define BIT_FS_TXBCNERR_MB4_INT_EN_8821C BIT(20) 3449 #define BIT_FS_TXBCNERR_MB3_INT_EN_8821C BIT(19) 3450 #define BIT_FS_TXBCNERR_MB2_INT_EN_8821C BIT(18) 3451 #define BIT_FS_TXBCNERR_MB1_INT_EN_8821C BIT(17) 3452 #define BIT_FS_TXBCNERR_MB0_INT_EN_8821C BIT(16) 3453 #define BIT_CPU_MGQ_TXDONE_INT_EN_8821C BIT(15) 3454 #define BIT_SIFS_OVERSPEC_INT_EN_8821C BIT(14) 3455 #define BIT_FS_MGNTQ_RPTR_RELEASE_INT_EN_8821C BIT(13) 3456 #define BIT_FS_MGNTQFF_TO_INT_EN_8821C BIT(12) 3457 #define BIT_FS_DDMA1_LP_INT_EN_8821C BIT(11) 3458 #define BIT_FS_DDMA1_HP_INT_EN_8821C BIT(10) 3459 #define BIT_FS_DDMA0_LP_INT_EN_8821C BIT(9) 3460 #define BIT_FS_DDMA0_HP_INT_EN_8821C BIT(8) 3461 #define BIT_FS_TRXRPT_INT_EN_8821C BIT(7) 3462 #define BIT_FS_C2H_W_READY_INT_EN_8821C BIT(6) 3463 #define BIT_FS_HRCV_INT_EN_8821C BIT(5) 3464 #define BIT_FS_H2CCMD_INT_EN_8821C BIT(4) 3465 #define BIT_FS_TXPKTIN_INT_EN_8821C BIT(3) 3466 #define BIT_FS_ERRORHDL_INT_EN_8821C BIT(2) 3467 #define BIT_FS_TXCCX_INT_EN_8821C BIT(1) 3468 #define BIT_FS_TXCLOSE_INT_EN_8821C BIT(0) 3469 3470 /* 2 REG_FWISR_8821C */ 3471 #define BIT_FS_TXBCNOK_MB7_INT_8821C BIT(31) 3472 #define BIT_FS_TXBCNOK_MB6_INT_8821C BIT(30) 3473 #define BIT_FS_TXBCNOK_MB5_INT_8821C BIT(29) 3474 #define BIT_FS_TXBCNOK_MB4_INT_8821C BIT(28) 3475 #define BIT_FS_TXBCNOK_MB3_INT_8821C BIT(27) 3476 #define BIT_FS_TXBCNOK_MB2_INT_8821C BIT(26) 3477 #define BIT_FS_TXBCNOK_MB1_INT_8821C BIT(25) 3478 #define BIT_FS_TXBCNOK_MB0_INT_8821C BIT(24) 3479 #define BIT_FS_TXBCNERR_MB7_INT_8821C BIT(23) 3480 #define BIT_FS_TXBCNERR_MB6_INT_8821C BIT(22) 3481 #define BIT_FS_TXBCNERR_MB5_INT_8821C BIT(21) 3482 #define BIT_FS_TXBCNERR_MB4_INT_8821C BIT(20) 3483 #define BIT_FS_TXBCNERR_MB3_INT_8821C BIT(19) 3484 #define BIT_FS_TXBCNERR_MB2_INT_8821C BIT(18) 3485 #define BIT_FS_TXBCNERR_MB1_INT_8821C BIT(17) 3486 #define BIT_FS_TXBCNERR_MB0_INT_8821C BIT(16) 3487 #define BIT_CPU_MGQ_TXDONE_INT_8821C BIT(15) 3488 #define BIT_SIFS_OVERSPEC_INT_8821C BIT(14) 3489 #define BIT_FS_MGNTQ_RPTR_RELEASE_INT_8821C BIT(13) 3490 #define BIT_FS_MGNTQFF_TO_INT_8821C BIT(12) 3491 #define BIT_FS_DDMA1_LP_INT_8821C BIT(11) 3492 #define BIT_FS_DDMA1_HP_INT_8821C BIT(10) 3493 #define BIT_FS_DDMA0_LP_INT_8821C BIT(9) 3494 #define BIT_FS_DDMA0_HP_INT_8821C BIT(8) 3495 #define BIT_FS_TRXRPT_INT_8821C BIT(7) 3496 #define BIT_FS_C2H_W_READY_INT_8821C BIT(6) 3497 #define BIT_FS_HRCV_INT_8821C BIT(5) 3498 #define BIT_FS_H2CCMD_INT_8821C BIT(4) 3499 #define BIT_FS_TXPKTIN_INT_8821C BIT(3) 3500 #define BIT_FS_ERRORHDL_INT_8821C BIT(2) 3501 #define BIT_FS_TXCCX_INT_8821C BIT(1) 3502 #define BIT_FS_TXCLOSE_INT_8821C BIT(0) 3503 3504 /* 2 REG_FTIMR_8821C */ 3505 #define BIT_PS_TIMER_C_EARLY_INT_EN_8821C BIT(23) 3506 #define BIT_PS_TIMER_B_EARLY_INT_EN_8821C BIT(22) 3507 #define BIT_PS_TIMER_A_EARLY_INT_EN_8821C BIT(21) 3508 #define BIT_CPUMGQ_TX_TIMER_EARLY_INT_EN_8821C BIT(20) 3509 #define BIT_PS_TIMER_C_INT_EN_8821C BIT(19) 3510 #define BIT_PS_TIMER_B_INT_EN_8821C BIT(18) 3511 #define BIT_PS_TIMER_A_INT_EN_8821C BIT(17) 3512 #define BIT_CPUMGQ_TX_TIMER_INT_EN_8821C BIT(16) 3513 #define BIT_FS_PS_TIMEOUT2_EN_8821C BIT(15) 3514 #define BIT_FS_PS_TIMEOUT1_EN_8821C BIT(14) 3515 #define BIT_FS_PS_TIMEOUT0_EN_8821C BIT(13) 3516 #define BIT_FS_GTINT8_EN_8821C BIT(8) 3517 #define BIT_FS_GTINT7_EN_8821C BIT(7) 3518 #define BIT_FS_GTINT6_EN_8821C BIT(6) 3519 #define BIT_FS_GTINT5_EN_8821C BIT(5) 3520 #define BIT_FS_GTINT4_EN_8821C BIT(4) 3521 #define BIT_FS_GTINT3_EN_8821C BIT(3) 3522 #define BIT_FS_GTINT2_EN_8821C BIT(2) 3523 #define BIT_FS_GTINT1_EN_8821C BIT(1) 3524 #define BIT_FS_GTINT0_EN_8821C BIT(0) 3525 3526 /* 2 REG_FTISR_8821C */ 3527 #define BIT_PS_TIMER_C_EARLY__INT_8821C BIT(23) 3528 #define BIT_PS_TIMER_B_EARLY__INT_8821C BIT(22) 3529 #define BIT_PS_TIMER_A_EARLY__INT_8821C BIT(21) 3530 #define BIT_CPUMGQ_TX_TIMER_EARLY_INT_8821C BIT(20) 3531 #define BIT_PS_TIMER_C_INT_8821C BIT(19) 3532 #define BIT_PS_TIMER_B_INT_8821C BIT(18) 3533 #define BIT_PS_TIMER_A_INT_8821C BIT(17) 3534 #define BIT_CPUMGQ_TX_TIMER_INT_8821C BIT(16) 3535 #define BIT_FS_PS_TIMEOUT2_INT_8821C BIT(15) 3536 #define BIT_FS_PS_TIMEOUT1_INT_8821C BIT(14) 3537 #define BIT_FS_PS_TIMEOUT0_INT_8821C BIT(13) 3538 #define BIT_FS_GTINT8_INT_8821C BIT(8) 3539 #define BIT_FS_GTINT7_INT_8821C BIT(7) 3540 #define BIT_FS_GTINT6_INT_8821C BIT(6) 3541 #define BIT_FS_GTINT5_INT_8821C BIT(5) 3542 #define BIT_FS_GTINT4_INT_8821C BIT(4) 3543 #define BIT_FS_GTINT3_INT_8821C BIT(3) 3544 #define BIT_FS_GTINT2_INT_8821C BIT(2) 3545 #define BIT_FS_GTINT1_INT_8821C BIT(1) 3546 #define BIT_FS_GTINT0_INT_8821C BIT(0) 3547 3548 /* 2 REG_PKTBUF_DBG_CTRL_8821C */ 3549 3550 #define BIT_SHIFT_PKTBUF_WRITE_EN_8821C 24 3551 #define BIT_MASK_PKTBUF_WRITE_EN_8821C 0xff 3552 #define BIT_PKTBUF_WRITE_EN_8821C(x) \ 3553 (((x) & BIT_MASK_PKTBUF_WRITE_EN_8821C) \ 3554 << BIT_SHIFT_PKTBUF_WRITE_EN_8821C) 3555 #define BITS_PKTBUF_WRITE_EN_8821C \ 3556 (BIT_MASK_PKTBUF_WRITE_EN_8821C << BIT_SHIFT_PKTBUF_WRITE_EN_8821C) 3557 #define BIT_CLEAR_PKTBUF_WRITE_EN_8821C(x) ((x) & (~BITS_PKTBUF_WRITE_EN_8821C)) 3558 #define BIT_GET_PKTBUF_WRITE_EN_8821C(x) \ 3559 (((x) >> BIT_SHIFT_PKTBUF_WRITE_EN_8821C) & \ 3560 BIT_MASK_PKTBUF_WRITE_EN_8821C) 3561 #define BIT_SET_PKTBUF_WRITE_EN_8821C(x, v) \ 3562 (BIT_CLEAR_PKTBUF_WRITE_EN_8821C(x) | BIT_PKTBUF_WRITE_EN_8821C(v)) 3563 3564 #define BIT_TXRPTBUF_DBG_8821C BIT(23) 3565 3566 /* 2 REG_NOT_VALID_8821C */ 3567 #define BIT_TXPKTBUF_DBG_V2_8821C BIT(20) 3568 #define BIT_RXPKTBUF_DBG_8821C BIT(16) 3569 3570 #define BIT_SHIFT_PKTBUF_DBG_ADDR_8821C 0 3571 #define BIT_MASK_PKTBUF_DBG_ADDR_8821C 0x1fff 3572 #define BIT_PKTBUF_DBG_ADDR_8821C(x) \ 3573 (((x) & BIT_MASK_PKTBUF_DBG_ADDR_8821C) \ 3574 << BIT_SHIFT_PKTBUF_DBG_ADDR_8821C) 3575 #define BITS_PKTBUF_DBG_ADDR_8821C \ 3576 (BIT_MASK_PKTBUF_DBG_ADDR_8821C << BIT_SHIFT_PKTBUF_DBG_ADDR_8821C) 3577 #define BIT_CLEAR_PKTBUF_DBG_ADDR_8821C(x) ((x) & (~BITS_PKTBUF_DBG_ADDR_8821C)) 3578 #define BIT_GET_PKTBUF_DBG_ADDR_8821C(x) \ 3579 (((x) >> BIT_SHIFT_PKTBUF_DBG_ADDR_8821C) & \ 3580 BIT_MASK_PKTBUF_DBG_ADDR_8821C) 3581 #define BIT_SET_PKTBUF_DBG_ADDR_8821C(x, v) \ 3582 (BIT_CLEAR_PKTBUF_DBG_ADDR_8821C(x) | BIT_PKTBUF_DBG_ADDR_8821C(v)) 3583 3584 /* 2 REG_PKTBUF_DBG_DATA_L_8821C */ 3585 3586 #define BIT_SHIFT_PKTBUF_DBG_DATA_L_8821C 0 3587 #define BIT_MASK_PKTBUF_DBG_DATA_L_8821C 0xffffffffL 3588 #define BIT_PKTBUF_DBG_DATA_L_8821C(x) \ 3589 (((x) & BIT_MASK_PKTBUF_DBG_DATA_L_8821C) \ 3590 << BIT_SHIFT_PKTBUF_DBG_DATA_L_8821C) 3591 #define BITS_PKTBUF_DBG_DATA_L_8821C \ 3592 (BIT_MASK_PKTBUF_DBG_DATA_L_8821C << BIT_SHIFT_PKTBUF_DBG_DATA_L_8821C) 3593 #define BIT_CLEAR_PKTBUF_DBG_DATA_L_8821C(x) \ 3594 ((x) & (~BITS_PKTBUF_DBG_DATA_L_8821C)) 3595 #define BIT_GET_PKTBUF_DBG_DATA_L_8821C(x) \ 3596 (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_L_8821C) & \ 3597 BIT_MASK_PKTBUF_DBG_DATA_L_8821C) 3598 #define BIT_SET_PKTBUF_DBG_DATA_L_8821C(x, v) \ 3599 (BIT_CLEAR_PKTBUF_DBG_DATA_L_8821C(x) | BIT_PKTBUF_DBG_DATA_L_8821C(v)) 3600 3601 /* 2 REG_PKTBUF_DBG_DATA_H_8821C */ 3602 3603 #define BIT_SHIFT_PKTBUF_DBG_DATA_H_8821C 0 3604 #define BIT_MASK_PKTBUF_DBG_DATA_H_8821C 0xffffffffL 3605 #define BIT_PKTBUF_DBG_DATA_H_8821C(x) \ 3606 (((x) & BIT_MASK_PKTBUF_DBG_DATA_H_8821C) \ 3607 << BIT_SHIFT_PKTBUF_DBG_DATA_H_8821C) 3608 #define BITS_PKTBUF_DBG_DATA_H_8821C \ 3609 (BIT_MASK_PKTBUF_DBG_DATA_H_8821C << BIT_SHIFT_PKTBUF_DBG_DATA_H_8821C) 3610 #define BIT_CLEAR_PKTBUF_DBG_DATA_H_8821C(x) \ 3611 ((x) & (~BITS_PKTBUF_DBG_DATA_H_8821C)) 3612 #define BIT_GET_PKTBUF_DBG_DATA_H_8821C(x) \ 3613 (((x) >> BIT_SHIFT_PKTBUF_DBG_DATA_H_8821C) & \ 3614 BIT_MASK_PKTBUF_DBG_DATA_H_8821C) 3615 #define BIT_SET_PKTBUF_DBG_DATA_H_8821C(x, v) \ 3616 (BIT_CLEAR_PKTBUF_DBG_DATA_H_8821C(x) | BIT_PKTBUF_DBG_DATA_H_8821C(v)) 3617 3618 /* 2 REG_CPWM2_8821C */ 3619 3620 #define BIT_SHIFT_L0S_TO_RCVY_NUM_8821C 16 3621 #define BIT_MASK_L0S_TO_RCVY_NUM_8821C 0xff 3622 #define BIT_L0S_TO_RCVY_NUM_8821C(x) \ 3623 (((x) & BIT_MASK_L0S_TO_RCVY_NUM_8821C) \ 3624 << BIT_SHIFT_L0S_TO_RCVY_NUM_8821C) 3625 #define BITS_L0S_TO_RCVY_NUM_8821C \ 3626 (BIT_MASK_L0S_TO_RCVY_NUM_8821C << BIT_SHIFT_L0S_TO_RCVY_NUM_8821C) 3627 #define BIT_CLEAR_L0S_TO_RCVY_NUM_8821C(x) ((x) & (~BITS_L0S_TO_RCVY_NUM_8821C)) 3628 #define BIT_GET_L0S_TO_RCVY_NUM_8821C(x) \ 3629 (((x) >> BIT_SHIFT_L0S_TO_RCVY_NUM_8821C) & \ 3630 BIT_MASK_L0S_TO_RCVY_NUM_8821C) 3631 #define BIT_SET_L0S_TO_RCVY_NUM_8821C(x, v) \ 3632 (BIT_CLEAR_L0S_TO_RCVY_NUM_8821C(x) | BIT_L0S_TO_RCVY_NUM_8821C(v)) 3633 3634 #define BIT_CPWM2_TOGGLING_8821C BIT(15) 3635 3636 #define BIT_SHIFT_CPWM2_MOD_8821C 0 3637 #define BIT_MASK_CPWM2_MOD_8821C 0x7fff 3638 #define BIT_CPWM2_MOD_8821C(x) \ 3639 (((x) & BIT_MASK_CPWM2_MOD_8821C) << BIT_SHIFT_CPWM2_MOD_8821C) 3640 #define BITS_CPWM2_MOD_8821C \ 3641 (BIT_MASK_CPWM2_MOD_8821C << BIT_SHIFT_CPWM2_MOD_8821C) 3642 #define BIT_CLEAR_CPWM2_MOD_8821C(x) ((x) & (~BITS_CPWM2_MOD_8821C)) 3643 #define BIT_GET_CPWM2_MOD_8821C(x) \ 3644 (((x) >> BIT_SHIFT_CPWM2_MOD_8821C) & BIT_MASK_CPWM2_MOD_8821C) 3645 #define BIT_SET_CPWM2_MOD_8821C(x, v) \ 3646 (BIT_CLEAR_CPWM2_MOD_8821C(x) | BIT_CPWM2_MOD_8821C(v)) 3647 3648 /* 2 REG_TC0_CTRL_8821C */ 3649 #define BIT_TC0INT_EN_8821C BIT(26) 3650 #define BIT_TC0MODE_8821C BIT(25) 3651 #define BIT_TC0EN_8821C BIT(24) 3652 3653 #define BIT_SHIFT_TC0DATA_8821C 0 3654 #define BIT_MASK_TC0DATA_8821C 0xffffff 3655 #define BIT_TC0DATA_8821C(x) \ 3656 (((x) & BIT_MASK_TC0DATA_8821C) << BIT_SHIFT_TC0DATA_8821C) 3657 #define BITS_TC0DATA_8821C (BIT_MASK_TC0DATA_8821C << BIT_SHIFT_TC0DATA_8821C) 3658 #define BIT_CLEAR_TC0DATA_8821C(x) ((x) & (~BITS_TC0DATA_8821C)) 3659 #define BIT_GET_TC0DATA_8821C(x) \ 3660 (((x) >> BIT_SHIFT_TC0DATA_8821C) & BIT_MASK_TC0DATA_8821C) 3661 #define BIT_SET_TC0DATA_8821C(x, v) \ 3662 (BIT_CLEAR_TC0DATA_8821C(x) | BIT_TC0DATA_8821C(v)) 3663 3664 /* 2 REG_TC1_CTRL_8821C */ 3665 #define BIT_TC1INT_EN_8821C BIT(26) 3666 #define BIT_TC1MODE_8821C BIT(25) 3667 #define BIT_TC1EN_8821C BIT(24) 3668 3669 #define BIT_SHIFT_TC1DATA_8821C 0 3670 #define BIT_MASK_TC1DATA_8821C 0xffffff 3671 #define BIT_TC1DATA_8821C(x) \ 3672 (((x) & BIT_MASK_TC1DATA_8821C) << BIT_SHIFT_TC1DATA_8821C) 3673 #define BITS_TC1DATA_8821C (BIT_MASK_TC1DATA_8821C << BIT_SHIFT_TC1DATA_8821C) 3674 #define BIT_CLEAR_TC1DATA_8821C(x) ((x) & (~BITS_TC1DATA_8821C)) 3675 #define BIT_GET_TC1DATA_8821C(x) \ 3676 (((x) >> BIT_SHIFT_TC1DATA_8821C) & BIT_MASK_TC1DATA_8821C) 3677 #define BIT_SET_TC1DATA_8821C(x, v) \ 3678 (BIT_CLEAR_TC1DATA_8821C(x) | BIT_TC1DATA_8821C(v)) 3679 3680 /* 2 REG_TC2_CTRL_8821C */ 3681 #define BIT_TC2INT_EN_8821C BIT(26) 3682 #define BIT_TC2MODE_8821C BIT(25) 3683 #define BIT_TC2EN_8821C BIT(24) 3684 3685 #define BIT_SHIFT_TC2DATA_8821C 0 3686 #define BIT_MASK_TC2DATA_8821C 0xffffff 3687 #define BIT_TC2DATA_8821C(x) \ 3688 (((x) & BIT_MASK_TC2DATA_8821C) << BIT_SHIFT_TC2DATA_8821C) 3689 #define BITS_TC2DATA_8821C (BIT_MASK_TC2DATA_8821C << BIT_SHIFT_TC2DATA_8821C) 3690 #define BIT_CLEAR_TC2DATA_8821C(x) ((x) & (~BITS_TC2DATA_8821C)) 3691 #define BIT_GET_TC2DATA_8821C(x) \ 3692 (((x) >> BIT_SHIFT_TC2DATA_8821C) & BIT_MASK_TC2DATA_8821C) 3693 #define BIT_SET_TC2DATA_8821C(x, v) \ 3694 (BIT_CLEAR_TC2DATA_8821C(x) | BIT_TC2DATA_8821C(v)) 3695 3696 /* 2 REG_TC3_CTRL_8821C */ 3697 #define BIT_TC3INT_EN_8821C BIT(26) 3698 #define BIT_TC3MODE_8821C BIT(25) 3699 #define BIT_TC3EN_8821C BIT(24) 3700 3701 #define BIT_SHIFT_TC3DATA_8821C 0 3702 #define BIT_MASK_TC3DATA_8821C 0xffffff 3703 #define BIT_TC3DATA_8821C(x) \ 3704 (((x) & BIT_MASK_TC3DATA_8821C) << BIT_SHIFT_TC3DATA_8821C) 3705 #define BITS_TC3DATA_8821C (BIT_MASK_TC3DATA_8821C << BIT_SHIFT_TC3DATA_8821C) 3706 #define BIT_CLEAR_TC3DATA_8821C(x) ((x) & (~BITS_TC3DATA_8821C)) 3707 #define BIT_GET_TC3DATA_8821C(x) \ 3708 (((x) >> BIT_SHIFT_TC3DATA_8821C) & BIT_MASK_TC3DATA_8821C) 3709 #define BIT_SET_TC3DATA_8821C(x, v) \ 3710 (BIT_CLEAR_TC3DATA_8821C(x) | BIT_TC3DATA_8821C(v)) 3711 3712 /* 2 REG_TC4_CTRL_8821C */ 3713 #define BIT_TC4INT_EN_8821C BIT(26) 3714 #define BIT_TC4MODE_8821C BIT(25) 3715 #define BIT_TC4EN_8821C BIT(24) 3716 3717 #define BIT_SHIFT_TC4DATA_8821C 0 3718 #define BIT_MASK_TC4DATA_8821C 0xffffff 3719 #define BIT_TC4DATA_8821C(x) \ 3720 (((x) & BIT_MASK_TC4DATA_8821C) << BIT_SHIFT_TC4DATA_8821C) 3721 #define BITS_TC4DATA_8821C (BIT_MASK_TC4DATA_8821C << BIT_SHIFT_TC4DATA_8821C) 3722 #define BIT_CLEAR_TC4DATA_8821C(x) ((x) & (~BITS_TC4DATA_8821C)) 3723 #define BIT_GET_TC4DATA_8821C(x) \ 3724 (((x) >> BIT_SHIFT_TC4DATA_8821C) & BIT_MASK_TC4DATA_8821C) 3725 #define BIT_SET_TC4DATA_8821C(x, v) \ 3726 (BIT_CLEAR_TC4DATA_8821C(x) | BIT_TC4DATA_8821C(v)) 3727 3728 /* 2 REG_TCUNIT_BASE_8821C */ 3729 3730 #define BIT_SHIFT_TCUNIT_BASE_8821C 0 3731 #define BIT_MASK_TCUNIT_BASE_8821C 0x3fff 3732 #define BIT_TCUNIT_BASE_8821C(x) \ 3733 (((x) & BIT_MASK_TCUNIT_BASE_8821C) << BIT_SHIFT_TCUNIT_BASE_8821C) 3734 #define BITS_TCUNIT_BASE_8821C \ 3735 (BIT_MASK_TCUNIT_BASE_8821C << BIT_SHIFT_TCUNIT_BASE_8821C) 3736 #define BIT_CLEAR_TCUNIT_BASE_8821C(x) ((x) & (~BITS_TCUNIT_BASE_8821C)) 3737 #define BIT_GET_TCUNIT_BASE_8821C(x) \ 3738 (((x) >> BIT_SHIFT_TCUNIT_BASE_8821C) & BIT_MASK_TCUNIT_BASE_8821C) 3739 #define BIT_SET_TCUNIT_BASE_8821C(x, v) \ 3740 (BIT_CLEAR_TCUNIT_BASE_8821C(x) | BIT_TCUNIT_BASE_8821C(v)) 3741 3742 /* 2 REG_TC5_CTRL_8821C */ 3743 #define BIT_TC5INT_EN_8821C BIT(26) 3744 #define BIT_TC5MODE_8821C BIT(25) 3745 #define BIT_TC5EN_8821C BIT(24) 3746 3747 #define BIT_SHIFT_TC5DATA_8821C 0 3748 #define BIT_MASK_TC5DATA_8821C 0xffffff 3749 #define BIT_TC5DATA_8821C(x) \ 3750 (((x) & BIT_MASK_TC5DATA_8821C) << BIT_SHIFT_TC5DATA_8821C) 3751 #define BITS_TC5DATA_8821C (BIT_MASK_TC5DATA_8821C << BIT_SHIFT_TC5DATA_8821C) 3752 #define BIT_CLEAR_TC5DATA_8821C(x) ((x) & (~BITS_TC5DATA_8821C)) 3753 #define BIT_GET_TC5DATA_8821C(x) \ 3754 (((x) >> BIT_SHIFT_TC5DATA_8821C) & BIT_MASK_TC5DATA_8821C) 3755 #define BIT_SET_TC5DATA_8821C(x, v) \ 3756 (BIT_CLEAR_TC5DATA_8821C(x) | BIT_TC5DATA_8821C(v)) 3757 3758 /* 2 REG_TC6_CTRL_8821C */ 3759 #define BIT_TC6INT_EN_8821C BIT(26) 3760 #define BIT_TC6MODE_8821C BIT(25) 3761 #define BIT_TC6EN_8821C BIT(24) 3762 3763 #define BIT_SHIFT_TC6DATA_8821C 0 3764 #define BIT_MASK_TC6DATA_8821C 0xffffff 3765 #define BIT_TC6DATA_8821C(x) \ 3766 (((x) & BIT_MASK_TC6DATA_8821C) << BIT_SHIFT_TC6DATA_8821C) 3767 #define BITS_TC6DATA_8821C (BIT_MASK_TC6DATA_8821C << BIT_SHIFT_TC6DATA_8821C) 3768 #define BIT_CLEAR_TC6DATA_8821C(x) ((x) & (~BITS_TC6DATA_8821C)) 3769 #define BIT_GET_TC6DATA_8821C(x) \ 3770 (((x) >> BIT_SHIFT_TC6DATA_8821C) & BIT_MASK_TC6DATA_8821C) 3771 #define BIT_SET_TC6DATA_8821C(x, v) \ 3772 (BIT_CLEAR_TC6DATA_8821C(x) | BIT_TC6DATA_8821C(v)) 3773 3774 /* 2 REG_MBIST_DRF_FAIL_8821C */ 3775 3776 #define BIT_SHIFT_8051_MBIST_DRF_FAIL_8821C 26 3777 #define BIT_MASK_8051_MBIST_DRF_FAIL_8821C 0x3f 3778 #define BIT_8051_MBIST_DRF_FAIL_8821C(x) \ 3779 (((x) & BIT_MASK_8051_MBIST_DRF_FAIL_8821C) \ 3780 << BIT_SHIFT_8051_MBIST_DRF_FAIL_8821C) 3781 #define BITS_8051_MBIST_DRF_FAIL_8821C \ 3782 (BIT_MASK_8051_MBIST_DRF_FAIL_8821C \ 3783 << BIT_SHIFT_8051_MBIST_DRF_FAIL_8821C) 3784 #define BIT_CLEAR_8051_MBIST_DRF_FAIL_8821C(x) \ 3785 ((x) & (~BITS_8051_MBIST_DRF_FAIL_8821C)) 3786 #define BIT_GET_8051_MBIST_DRF_FAIL_8821C(x) \ 3787 (((x) >> BIT_SHIFT_8051_MBIST_DRF_FAIL_8821C) & \ 3788 BIT_MASK_8051_MBIST_DRF_FAIL_8821C) 3789 #define BIT_SET_8051_MBIST_DRF_FAIL_8821C(x, v) \ 3790 (BIT_CLEAR_8051_MBIST_DRF_FAIL_8821C(x) | \ 3791 BIT_8051_MBIST_DRF_FAIL_8821C(v)) 3792 3793 #define BIT_SHIFT_USB_MBIST_DRF_FAIL_8821C 24 3794 #define BIT_MASK_USB_MBIST_DRF_FAIL_8821C 0x3 3795 #define BIT_USB_MBIST_DRF_FAIL_8821C(x) \ 3796 (((x) & BIT_MASK_USB_MBIST_DRF_FAIL_8821C) \ 3797 << BIT_SHIFT_USB_MBIST_DRF_FAIL_8821C) 3798 #define BITS_USB_MBIST_DRF_FAIL_8821C \ 3799 (BIT_MASK_USB_MBIST_DRF_FAIL_8821C \ 3800 << BIT_SHIFT_USB_MBIST_DRF_FAIL_8821C) 3801 #define BIT_CLEAR_USB_MBIST_DRF_FAIL_8821C(x) \ 3802 ((x) & (~BITS_USB_MBIST_DRF_FAIL_8821C)) 3803 #define BIT_GET_USB_MBIST_DRF_FAIL_8821C(x) \ 3804 (((x) >> BIT_SHIFT_USB_MBIST_DRF_FAIL_8821C) & \ 3805 BIT_MASK_USB_MBIST_DRF_FAIL_8821C) 3806 #define BIT_SET_USB_MBIST_DRF_FAIL_8821C(x, v) \ 3807 (BIT_CLEAR_USB_MBIST_DRF_FAIL_8821C(x) | \ 3808 BIT_USB_MBIST_DRF_FAIL_8821C(v)) 3809 3810 #define BIT_SHIFT_PCIE_MBIST_DRF_FAIL_8821C 18 3811 #define BIT_MASK_PCIE_MBIST_DRF_FAIL_8821C 0x3f 3812 #define BIT_PCIE_MBIST_DRF_FAIL_8821C(x) \ 3813 (((x) & BIT_MASK_PCIE_MBIST_DRF_FAIL_8821C) \ 3814 << BIT_SHIFT_PCIE_MBIST_DRF_FAIL_8821C) 3815 #define BITS_PCIE_MBIST_DRF_FAIL_8821C \ 3816 (BIT_MASK_PCIE_MBIST_DRF_FAIL_8821C \ 3817 << BIT_SHIFT_PCIE_MBIST_DRF_FAIL_8821C) 3818 #define BIT_CLEAR_PCIE_MBIST_DRF_FAIL_8821C(x) \ 3819 ((x) & (~BITS_PCIE_MBIST_DRF_FAIL_8821C)) 3820 #define BIT_GET_PCIE_MBIST_DRF_FAIL_8821C(x) \ 3821 (((x) >> BIT_SHIFT_PCIE_MBIST_DRF_FAIL_8821C) & \ 3822 BIT_MASK_PCIE_MBIST_DRF_FAIL_8821C) 3823 #define BIT_SET_PCIE_MBIST_DRF_FAIL_8821C(x, v) \ 3824 (BIT_CLEAR_PCIE_MBIST_DRF_FAIL_8821C(x) | \ 3825 BIT_PCIE_MBIST_DRF_FAIL_8821C(v)) 3826 3827 #define BIT_SHIFT_MAC_MBIST_DRF_FAIL_8821C 0 3828 #define BIT_MASK_MAC_MBIST_DRF_FAIL_8821C 0x3ffff 3829 #define BIT_MAC_MBIST_DRF_FAIL_8821C(x) \ 3830 (((x) & BIT_MASK_MAC_MBIST_DRF_FAIL_8821C) \ 3831 << BIT_SHIFT_MAC_MBIST_DRF_FAIL_8821C) 3832 #define BITS_MAC_MBIST_DRF_FAIL_8821C \ 3833 (BIT_MASK_MAC_MBIST_DRF_FAIL_8821C \ 3834 << BIT_SHIFT_MAC_MBIST_DRF_FAIL_8821C) 3835 #define BIT_CLEAR_MAC_MBIST_DRF_FAIL_8821C(x) \ 3836 ((x) & (~BITS_MAC_MBIST_DRF_FAIL_8821C)) 3837 #define BIT_GET_MAC_MBIST_DRF_FAIL_8821C(x) \ 3838 (((x) >> BIT_SHIFT_MAC_MBIST_DRF_FAIL_8821C) & \ 3839 BIT_MASK_MAC_MBIST_DRF_FAIL_8821C) 3840 #define BIT_SET_MAC_MBIST_DRF_FAIL_8821C(x, v) \ 3841 (BIT_CLEAR_MAC_MBIST_DRF_FAIL_8821C(x) | \ 3842 BIT_MAC_MBIST_DRF_FAIL_8821C(v)) 3843 3844 /* 2 REG_MBIST_START_PAUSE_8821C */ 3845 3846 #define BIT_SHIFT_8051_MBIST_START_PAUSE_V1_8821C 26 3847 #define BIT_MASK_8051_MBIST_START_PAUSE_V1_8821C 0x3f 3848 #define BIT_8051_MBIST_START_PAUSE_V1_8821C(x) \ 3849 (((x) & BIT_MASK_8051_MBIST_START_PAUSE_V1_8821C) \ 3850 << BIT_SHIFT_8051_MBIST_START_PAUSE_V1_8821C) 3851 #define BITS_8051_MBIST_START_PAUSE_V1_8821C \ 3852 (BIT_MASK_8051_MBIST_START_PAUSE_V1_8821C \ 3853 << BIT_SHIFT_8051_MBIST_START_PAUSE_V1_8821C) 3854 #define BIT_CLEAR_8051_MBIST_START_PAUSE_V1_8821C(x) \ 3855 ((x) & (~BITS_8051_MBIST_START_PAUSE_V1_8821C)) 3856 #define BIT_GET_8051_MBIST_START_PAUSE_V1_8821C(x) \ 3857 (((x) >> BIT_SHIFT_8051_MBIST_START_PAUSE_V1_8821C) & \ 3858 BIT_MASK_8051_MBIST_START_PAUSE_V1_8821C) 3859 #define BIT_SET_8051_MBIST_START_PAUSE_V1_8821C(x, v) \ 3860 (BIT_CLEAR_8051_MBIST_START_PAUSE_V1_8821C(x) | \ 3861 BIT_8051_MBIST_START_PAUSE_V1_8821C(v)) 3862 3863 #define BIT_SHIFT_USB_MBIST_START_PAUSE_V1_8821C 24 3864 #define BIT_MASK_USB_MBIST_START_PAUSE_V1_8821C 0x3 3865 #define BIT_USB_MBIST_START_PAUSE_V1_8821C(x) \ 3866 (((x) & BIT_MASK_USB_MBIST_START_PAUSE_V1_8821C) \ 3867 << BIT_SHIFT_USB_MBIST_START_PAUSE_V1_8821C) 3868 #define BITS_USB_MBIST_START_PAUSE_V1_8821C \ 3869 (BIT_MASK_USB_MBIST_START_PAUSE_V1_8821C \ 3870 << BIT_SHIFT_USB_MBIST_START_PAUSE_V1_8821C) 3871 #define BIT_CLEAR_USB_MBIST_START_PAUSE_V1_8821C(x) \ 3872 ((x) & (~BITS_USB_MBIST_START_PAUSE_V1_8821C)) 3873 #define BIT_GET_USB_MBIST_START_PAUSE_V1_8821C(x) \ 3874 (((x) >> BIT_SHIFT_USB_MBIST_START_PAUSE_V1_8821C) & \ 3875 BIT_MASK_USB_MBIST_START_PAUSE_V1_8821C) 3876 #define BIT_SET_USB_MBIST_START_PAUSE_V1_8821C(x, v) \ 3877 (BIT_CLEAR_USB_MBIST_START_PAUSE_V1_8821C(x) | \ 3878 BIT_USB_MBIST_START_PAUSE_V1_8821C(v)) 3879 3880 #define BIT_SHIFT_PCIE_MBIST_START_PAUSE_V1_8821C 18 3881 #define BIT_MASK_PCIE_MBIST_START_PAUSE_V1_8821C 0x3f 3882 #define BIT_PCIE_MBIST_START_PAUSE_V1_8821C(x) \ 3883 (((x) & BIT_MASK_PCIE_MBIST_START_PAUSE_V1_8821C) \ 3884 << BIT_SHIFT_PCIE_MBIST_START_PAUSE_V1_8821C) 3885 #define BITS_PCIE_MBIST_START_PAUSE_V1_8821C \ 3886 (BIT_MASK_PCIE_MBIST_START_PAUSE_V1_8821C \ 3887 << BIT_SHIFT_PCIE_MBIST_START_PAUSE_V1_8821C) 3888 #define BIT_CLEAR_PCIE_MBIST_START_PAUSE_V1_8821C(x) \ 3889 ((x) & (~BITS_PCIE_MBIST_START_PAUSE_V1_8821C)) 3890 #define BIT_GET_PCIE_MBIST_START_PAUSE_V1_8821C(x) \ 3891 (((x) >> BIT_SHIFT_PCIE_MBIST_START_PAUSE_V1_8821C) & \ 3892 BIT_MASK_PCIE_MBIST_START_PAUSE_V1_8821C) 3893 #define BIT_SET_PCIE_MBIST_START_PAUSE_V1_8821C(x, v) \ 3894 (BIT_CLEAR_PCIE_MBIST_START_PAUSE_V1_8821C(x) | \ 3895 BIT_PCIE_MBIST_START_PAUSE_V1_8821C(v)) 3896 3897 #define BIT_SHIFT_MAC_MBIST_START_PAUSE_V1_8821C 0 3898 #define BIT_MASK_MAC_MBIST_START_PAUSE_V1_8821C 0x3ffff 3899 #define BIT_MAC_MBIST_START_PAUSE_V1_8821C(x) \ 3900 (((x) & BIT_MASK_MAC_MBIST_START_PAUSE_V1_8821C) \ 3901 << BIT_SHIFT_MAC_MBIST_START_PAUSE_V1_8821C) 3902 #define BITS_MAC_MBIST_START_PAUSE_V1_8821C \ 3903 (BIT_MASK_MAC_MBIST_START_PAUSE_V1_8821C \ 3904 << BIT_SHIFT_MAC_MBIST_START_PAUSE_V1_8821C) 3905 #define BIT_CLEAR_MAC_MBIST_START_PAUSE_V1_8821C(x) \ 3906 ((x) & (~BITS_MAC_MBIST_START_PAUSE_V1_8821C)) 3907 #define BIT_GET_MAC_MBIST_START_PAUSE_V1_8821C(x) \ 3908 (((x) >> BIT_SHIFT_MAC_MBIST_START_PAUSE_V1_8821C) & \ 3909 BIT_MASK_MAC_MBIST_START_PAUSE_V1_8821C) 3910 #define BIT_SET_MAC_MBIST_START_PAUSE_V1_8821C(x, v) \ 3911 (BIT_CLEAR_MAC_MBIST_START_PAUSE_V1_8821C(x) | \ 3912 BIT_MAC_MBIST_START_PAUSE_V1_8821C(v)) 3913 3914 /* 2 REG_MBIST_DONE_8821C */ 3915 3916 #define BIT_SHIFT_8051_MBIST_DONE_V1_8821C 26 3917 #define BIT_MASK_8051_MBIST_DONE_V1_8821C 0x3f 3918 #define BIT_8051_MBIST_DONE_V1_8821C(x) \ 3919 (((x) & BIT_MASK_8051_MBIST_DONE_V1_8821C) \ 3920 << BIT_SHIFT_8051_MBIST_DONE_V1_8821C) 3921 #define BITS_8051_MBIST_DONE_V1_8821C \ 3922 (BIT_MASK_8051_MBIST_DONE_V1_8821C \ 3923 << BIT_SHIFT_8051_MBIST_DONE_V1_8821C) 3924 #define BIT_CLEAR_8051_MBIST_DONE_V1_8821C(x) \ 3925 ((x) & (~BITS_8051_MBIST_DONE_V1_8821C)) 3926 #define BIT_GET_8051_MBIST_DONE_V1_8821C(x) \ 3927 (((x) >> BIT_SHIFT_8051_MBIST_DONE_V1_8821C) & \ 3928 BIT_MASK_8051_MBIST_DONE_V1_8821C) 3929 #define BIT_SET_8051_MBIST_DONE_V1_8821C(x, v) \ 3930 (BIT_CLEAR_8051_MBIST_DONE_V1_8821C(x) | \ 3931 BIT_8051_MBIST_DONE_V1_8821C(v)) 3932 3933 #define BIT_SHIFT_USB_MBIST_DONE_V1_8821C 24 3934 #define BIT_MASK_USB_MBIST_DONE_V1_8821C 0x3 3935 #define BIT_USB_MBIST_DONE_V1_8821C(x) \ 3936 (((x) & BIT_MASK_USB_MBIST_DONE_V1_8821C) \ 3937 << BIT_SHIFT_USB_MBIST_DONE_V1_8821C) 3938 #define BITS_USB_MBIST_DONE_V1_8821C \ 3939 (BIT_MASK_USB_MBIST_DONE_V1_8821C << BIT_SHIFT_USB_MBIST_DONE_V1_8821C) 3940 #define BIT_CLEAR_USB_MBIST_DONE_V1_8821C(x) \ 3941 ((x) & (~BITS_USB_MBIST_DONE_V1_8821C)) 3942 #define BIT_GET_USB_MBIST_DONE_V1_8821C(x) \ 3943 (((x) >> BIT_SHIFT_USB_MBIST_DONE_V1_8821C) & \ 3944 BIT_MASK_USB_MBIST_DONE_V1_8821C) 3945 #define BIT_SET_USB_MBIST_DONE_V1_8821C(x, v) \ 3946 (BIT_CLEAR_USB_MBIST_DONE_V1_8821C(x) | BIT_USB_MBIST_DONE_V1_8821C(v)) 3947 3948 #define BIT_SHIFT_PCIE_MBIST_DONE_V1_8821C 18 3949 #define BIT_MASK_PCIE_MBIST_DONE_V1_8821C 0x3f 3950 #define BIT_PCIE_MBIST_DONE_V1_8821C(x) \ 3951 (((x) & BIT_MASK_PCIE_MBIST_DONE_V1_8821C) \ 3952 << BIT_SHIFT_PCIE_MBIST_DONE_V1_8821C) 3953 #define BITS_PCIE_MBIST_DONE_V1_8821C \ 3954 (BIT_MASK_PCIE_MBIST_DONE_V1_8821C \ 3955 << BIT_SHIFT_PCIE_MBIST_DONE_V1_8821C) 3956 #define BIT_CLEAR_PCIE_MBIST_DONE_V1_8821C(x) \ 3957 ((x) & (~BITS_PCIE_MBIST_DONE_V1_8821C)) 3958 #define BIT_GET_PCIE_MBIST_DONE_V1_8821C(x) \ 3959 (((x) >> BIT_SHIFT_PCIE_MBIST_DONE_V1_8821C) & \ 3960 BIT_MASK_PCIE_MBIST_DONE_V1_8821C) 3961 #define BIT_SET_PCIE_MBIST_DONE_V1_8821C(x, v) \ 3962 (BIT_CLEAR_PCIE_MBIST_DONE_V1_8821C(x) | \ 3963 BIT_PCIE_MBIST_DONE_V1_8821C(v)) 3964 3965 #define BIT_SHIFT_MAC_MBIST_DONE_V1_8821C 0 3966 #define BIT_MASK_MAC_MBIST_DONE_V1_8821C 0x3ffff 3967 #define BIT_MAC_MBIST_DONE_V1_8821C(x) \ 3968 (((x) & BIT_MASK_MAC_MBIST_DONE_V1_8821C) \ 3969 << BIT_SHIFT_MAC_MBIST_DONE_V1_8821C) 3970 #define BITS_MAC_MBIST_DONE_V1_8821C \ 3971 (BIT_MASK_MAC_MBIST_DONE_V1_8821C << BIT_SHIFT_MAC_MBIST_DONE_V1_8821C) 3972 #define BIT_CLEAR_MAC_MBIST_DONE_V1_8821C(x) \ 3973 ((x) & (~BITS_MAC_MBIST_DONE_V1_8821C)) 3974 #define BIT_GET_MAC_MBIST_DONE_V1_8821C(x) \ 3975 (((x) >> BIT_SHIFT_MAC_MBIST_DONE_V1_8821C) & \ 3976 BIT_MASK_MAC_MBIST_DONE_V1_8821C) 3977 #define BIT_SET_MAC_MBIST_DONE_V1_8821C(x, v) \ 3978 (BIT_CLEAR_MAC_MBIST_DONE_V1_8821C(x) | BIT_MAC_MBIST_DONE_V1_8821C(v)) 3979 3980 /* 2 REG_MBIST_READ_BIST_RPT_8821C */ 3981 3982 #define BIT_SHIFT_MBIST_READ_BIST_RPT_8821C 0 3983 #define BIT_MASK_MBIST_READ_BIST_RPT_8821C 0xffffffffL 3984 #define BIT_MBIST_READ_BIST_RPT_8821C(x) \ 3985 (((x) & BIT_MASK_MBIST_READ_BIST_RPT_8821C) \ 3986 << BIT_SHIFT_MBIST_READ_BIST_RPT_8821C) 3987 #define BITS_MBIST_READ_BIST_RPT_8821C \ 3988 (BIT_MASK_MBIST_READ_BIST_RPT_8821C \ 3989 << BIT_SHIFT_MBIST_READ_BIST_RPT_8821C) 3990 #define BIT_CLEAR_MBIST_READ_BIST_RPT_8821C(x) \ 3991 ((x) & (~BITS_MBIST_READ_BIST_RPT_8821C)) 3992 #define BIT_GET_MBIST_READ_BIST_RPT_8821C(x) \ 3993 (((x) >> BIT_SHIFT_MBIST_READ_BIST_RPT_8821C) & \ 3994 BIT_MASK_MBIST_READ_BIST_RPT_8821C) 3995 #define BIT_SET_MBIST_READ_BIST_RPT_8821C(x, v) \ 3996 (BIT_CLEAR_MBIST_READ_BIST_RPT_8821C(x) | \ 3997 BIT_MBIST_READ_BIST_RPT_8821C(v)) 3998 3999 /* 2 REG_AES_DECRPT_DATA_8821C */ 4000 4001 #define BIT_SHIFT_IPS_CFG_ADDR_8821C 0 4002 #define BIT_MASK_IPS_CFG_ADDR_8821C 0xff 4003 #define BIT_IPS_CFG_ADDR_8821C(x) \ 4004 (((x) & BIT_MASK_IPS_CFG_ADDR_8821C) << BIT_SHIFT_IPS_CFG_ADDR_8821C) 4005 #define BITS_IPS_CFG_ADDR_8821C \ 4006 (BIT_MASK_IPS_CFG_ADDR_8821C << BIT_SHIFT_IPS_CFG_ADDR_8821C) 4007 #define BIT_CLEAR_IPS_CFG_ADDR_8821C(x) ((x) & (~BITS_IPS_CFG_ADDR_8821C)) 4008 #define BIT_GET_IPS_CFG_ADDR_8821C(x) \ 4009 (((x) >> BIT_SHIFT_IPS_CFG_ADDR_8821C) & BIT_MASK_IPS_CFG_ADDR_8821C) 4010 #define BIT_SET_IPS_CFG_ADDR_8821C(x, v) \ 4011 (BIT_CLEAR_IPS_CFG_ADDR_8821C(x) | BIT_IPS_CFG_ADDR_8821C(v)) 4012 4013 /* 2 REG_AES_DECRPT_CFG_8821C */ 4014 4015 #define BIT_SHIFT_IPS_CFG_DATA_8821C 0 4016 #define BIT_MASK_IPS_CFG_DATA_8821C 0xffffffffL 4017 #define BIT_IPS_CFG_DATA_8821C(x) \ 4018 (((x) & BIT_MASK_IPS_CFG_DATA_8821C) << BIT_SHIFT_IPS_CFG_DATA_8821C) 4019 #define BITS_IPS_CFG_DATA_8821C \ 4020 (BIT_MASK_IPS_CFG_DATA_8821C << BIT_SHIFT_IPS_CFG_DATA_8821C) 4021 #define BIT_CLEAR_IPS_CFG_DATA_8821C(x) ((x) & (~BITS_IPS_CFG_DATA_8821C)) 4022 #define BIT_GET_IPS_CFG_DATA_8821C(x) \ 4023 (((x) >> BIT_SHIFT_IPS_CFG_DATA_8821C) & BIT_MASK_IPS_CFG_DATA_8821C) 4024 #define BIT_SET_IPS_CFG_DATA_8821C(x, v) \ 4025 (BIT_CLEAR_IPS_CFG_DATA_8821C(x) | BIT_IPS_CFG_DATA_8821C(v)) 4026 4027 /* 2 REG_NOT_VALID_8821C */ 4028 4029 /* 2 REG_NOT_VALID_8821C */ 4030 4031 /* 2 REG_TMETER_8821C */ 4032 #define BIT_TEMP_VALID_8821C BIT(31) 4033 4034 #define BIT_SHIFT_TEMP_VALUE_8821C 24 4035 #define BIT_MASK_TEMP_VALUE_8821C 0x3f 4036 #define BIT_TEMP_VALUE_8821C(x) \ 4037 (((x) & BIT_MASK_TEMP_VALUE_8821C) << BIT_SHIFT_TEMP_VALUE_8821C) 4038 #define BITS_TEMP_VALUE_8821C \ 4039 (BIT_MASK_TEMP_VALUE_8821C << BIT_SHIFT_TEMP_VALUE_8821C) 4040 #define BIT_CLEAR_TEMP_VALUE_8821C(x) ((x) & (~BITS_TEMP_VALUE_8821C)) 4041 #define BIT_GET_TEMP_VALUE_8821C(x) \ 4042 (((x) >> BIT_SHIFT_TEMP_VALUE_8821C) & BIT_MASK_TEMP_VALUE_8821C) 4043 #define BIT_SET_TEMP_VALUE_8821C(x, v) \ 4044 (BIT_CLEAR_TEMP_VALUE_8821C(x) | BIT_TEMP_VALUE_8821C(v)) 4045 4046 #define BIT_SHIFT_REG_TMETER_TIMER_8821C 8 4047 #define BIT_MASK_REG_TMETER_TIMER_8821C 0xfff 4048 #define BIT_REG_TMETER_TIMER_8821C(x) \ 4049 (((x) & BIT_MASK_REG_TMETER_TIMER_8821C) \ 4050 << BIT_SHIFT_REG_TMETER_TIMER_8821C) 4051 #define BITS_REG_TMETER_TIMER_8821C \ 4052 (BIT_MASK_REG_TMETER_TIMER_8821C << BIT_SHIFT_REG_TMETER_TIMER_8821C) 4053 #define BIT_CLEAR_REG_TMETER_TIMER_8821C(x) \ 4054 ((x) & (~BITS_REG_TMETER_TIMER_8821C)) 4055 #define BIT_GET_REG_TMETER_TIMER_8821C(x) \ 4056 (((x) >> BIT_SHIFT_REG_TMETER_TIMER_8821C) & \ 4057 BIT_MASK_REG_TMETER_TIMER_8821C) 4058 #define BIT_SET_REG_TMETER_TIMER_8821C(x, v) \ 4059 (BIT_CLEAR_REG_TMETER_TIMER_8821C(x) | BIT_REG_TMETER_TIMER_8821C(v)) 4060 4061 #define BIT_SHIFT_REG_TEMP_DELTA_8821C 2 4062 #define BIT_MASK_REG_TEMP_DELTA_8821C 0x3f 4063 #define BIT_REG_TEMP_DELTA_8821C(x) \ 4064 (((x) & BIT_MASK_REG_TEMP_DELTA_8821C) \ 4065 << BIT_SHIFT_REG_TEMP_DELTA_8821C) 4066 #define BITS_REG_TEMP_DELTA_8821C \ 4067 (BIT_MASK_REG_TEMP_DELTA_8821C << BIT_SHIFT_REG_TEMP_DELTA_8821C) 4068 #define BIT_CLEAR_REG_TEMP_DELTA_8821C(x) ((x) & (~BITS_REG_TEMP_DELTA_8821C)) 4069 #define BIT_GET_REG_TEMP_DELTA_8821C(x) \ 4070 (((x) >> BIT_SHIFT_REG_TEMP_DELTA_8821C) & \ 4071 BIT_MASK_REG_TEMP_DELTA_8821C) 4072 #define BIT_SET_REG_TEMP_DELTA_8821C(x, v) \ 4073 (BIT_CLEAR_REG_TEMP_DELTA_8821C(x) | BIT_REG_TEMP_DELTA_8821C(v)) 4074 4075 #define BIT_REG_TMETER_EN_8821C BIT(0) 4076 4077 /* 2 REG_OSC_32K_CTRL_8821C */ 4078 4079 #define BIT_SHIFT_OSC_32K_CLKGEN_0_8821C 16 4080 #define BIT_MASK_OSC_32K_CLKGEN_0_8821C 0xffff 4081 #define BIT_OSC_32K_CLKGEN_0_8821C(x) \ 4082 (((x) & BIT_MASK_OSC_32K_CLKGEN_0_8821C) \ 4083 << BIT_SHIFT_OSC_32K_CLKGEN_0_8821C) 4084 #define BITS_OSC_32K_CLKGEN_0_8821C \ 4085 (BIT_MASK_OSC_32K_CLKGEN_0_8821C << BIT_SHIFT_OSC_32K_CLKGEN_0_8821C) 4086 #define BIT_CLEAR_OSC_32K_CLKGEN_0_8821C(x) \ 4087 ((x) & (~BITS_OSC_32K_CLKGEN_0_8821C)) 4088 #define BIT_GET_OSC_32K_CLKGEN_0_8821C(x) \ 4089 (((x) >> BIT_SHIFT_OSC_32K_CLKGEN_0_8821C) & \ 4090 BIT_MASK_OSC_32K_CLKGEN_0_8821C) 4091 #define BIT_SET_OSC_32K_CLKGEN_0_8821C(x, v) \ 4092 (BIT_CLEAR_OSC_32K_CLKGEN_0_8821C(x) | BIT_OSC_32K_CLKGEN_0_8821C(v)) 4093 4094 #define BIT_SHIFT_OSC_32K_RES_COMP_8821C 4 4095 #define BIT_MASK_OSC_32K_RES_COMP_8821C 0x3 4096 #define BIT_OSC_32K_RES_COMP_8821C(x) \ 4097 (((x) & BIT_MASK_OSC_32K_RES_COMP_8821C) \ 4098 << BIT_SHIFT_OSC_32K_RES_COMP_8821C) 4099 #define BITS_OSC_32K_RES_COMP_8821C \ 4100 (BIT_MASK_OSC_32K_RES_COMP_8821C << BIT_SHIFT_OSC_32K_RES_COMP_8821C) 4101 #define BIT_CLEAR_OSC_32K_RES_COMP_8821C(x) \ 4102 ((x) & (~BITS_OSC_32K_RES_COMP_8821C)) 4103 #define BIT_GET_OSC_32K_RES_COMP_8821C(x) \ 4104 (((x) >> BIT_SHIFT_OSC_32K_RES_COMP_8821C) & \ 4105 BIT_MASK_OSC_32K_RES_COMP_8821C) 4106 #define BIT_SET_OSC_32K_RES_COMP_8821C(x, v) \ 4107 (BIT_CLEAR_OSC_32K_RES_COMP_8821C(x) | BIT_OSC_32K_RES_COMP_8821C(v)) 4108 4109 #define BIT_OSC_32K_OUT_SEL_8821C BIT(3) 4110 #define BIT_ISO_WL_2_OSC_32K_8821C BIT(1) 4111 #define BIT_POW_CKGEN_8821C BIT(0) 4112 4113 /* 2 REG_32K_CAL_REG1_8821C */ 4114 #define BIT_CAL_32K_REG_WR_8821C BIT(31) 4115 #define BIT_CAL_32K_DBG_SEL_8821C BIT(22) 4116 4117 #define BIT_SHIFT_CAL_32K_REG_ADDR_8821C 16 4118 #define BIT_MASK_CAL_32K_REG_ADDR_8821C 0x3f 4119 #define BIT_CAL_32K_REG_ADDR_8821C(x) \ 4120 (((x) & BIT_MASK_CAL_32K_REG_ADDR_8821C) \ 4121 << BIT_SHIFT_CAL_32K_REG_ADDR_8821C) 4122 #define BITS_CAL_32K_REG_ADDR_8821C \ 4123 (BIT_MASK_CAL_32K_REG_ADDR_8821C << BIT_SHIFT_CAL_32K_REG_ADDR_8821C) 4124 #define BIT_CLEAR_CAL_32K_REG_ADDR_8821C(x) \ 4125 ((x) & (~BITS_CAL_32K_REG_ADDR_8821C)) 4126 #define BIT_GET_CAL_32K_REG_ADDR_8821C(x) \ 4127 (((x) >> BIT_SHIFT_CAL_32K_REG_ADDR_8821C) & \ 4128 BIT_MASK_CAL_32K_REG_ADDR_8821C) 4129 #define BIT_SET_CAL_32K_REG_ADDR_8821C(x, v) \ 4130 (BIT_CLEAR_CAL_32K_REG_ADDR_8821C(x) | BIT_CAL_32K_REG_ADDR_8821C(v)) 4131 4132 #define BIT_SHIFT_CAL_32K_REG_DATA_8821C 0 4133 #define BIT_MASK_CAL_32K_REG_DATA_8821C 0xffff 4134 #define BIT_CAL_32K_REG_DATA_8821C(x) \ 4135 (((x) & BIT_MASK_CAL_32K_REG_DATA_8821C) \ 4136 << BIT_SHIFT_CAL_32K_REG_DATA_8821C) 4137 #define BITS_CAL_32K_REG_DATA_8821C \ 4138 (BIT_MASK_CAL_32K_REG_DATA_8821C << BIT_SHIFT_CAL_32K_REG_DATA_8821C) 4139 #define BIT_CLEAR_CAL_32K_REG_DATA_8821C(x) \ 4140 ((x) & (~BITS_CAL_32K_REG_DATA_8821C)) 4141 #define BIT_GET_CAL_32K_REG_DATA_8821C(x) \ 4142 (((x) >> BIT_SHIFT_CAL_32K_REG_DATA_8821C) & \ 4143 BIT_MASK_CAL_32K_REG_DATA_8821C) 4144 #define BIT_SET_CAL_32K_REG_DATA_8821C(x, v) \ 4145 (BIT_CLEAR_CAL_32K_REG_DATA_8821C(x) | BIT_CAL_32K_REG_DATA_8821C(v)) 4146 4147 /* 2 REG_NOT_VALID_8821C */ 4148 4149 /* 2 REG_C2HEVT_8821C */ 4150 4151 #define BIT_SHIFT_C2HEVT_MSG_V1_8821C 0 4152 #define BIT_MASK_C2HEVT_MSG_V1_8821C 0xffffffffL 4153 #define BIT_C2HEVT_MSG_V1_8821C(x) \ 4154 (((x) & BIT_MASK_C2HEVT_MSG_V1_8821C) << BIT_SHIFT_C2HEVT_MSG_V1_8821C) 4155 #define BITS_C2HEVT_MSG_V1_8821C \ 4156 (BIT_MASK_C2HEVT_MSG_V1_8821C << BIT_SHIFT_C2HEVT_MSG_V1_8821C) 4157 #define BIT_CLEAR_C2HEVT_MSG_V1_8821C(x) ((x) & (~BITS_C2HEVT_MSG_V1_8821C)) 4158 #define BIT_GET_C2HEVT_MSG_V1_8821C(x) \ 4159 (((x) >> BIT_SHIFT_C2HEVT_MSG_V1_8821C) & BIT_MASK_C2HEVT_MSG_V1_8821C) 4160 #define BIT_SET_C2HEVT_MSG_V1_8821C(x, v) \ 4161 (BIT_CLEAR_C2HEVT_MSG_V1_8821C(x) | BIT_C2HEVT_MSG_V1_8821C(v)) 4162 4163 /* 2 REG_C2HEVT_1_8821C */ 4164 4165 #define BIT_SHIFT_C2HEVT_MSG_1_8821C 0 4166 #define BIT_MASK_C2HEVT_MSG_1_8821C 0xffffffffL 4167 #define BIT_C2HEVT_MSG_1_8821C(x) \ 4168 (((x) & BIT_MASK_C2HEVT_MSG_1_8821C) << BIT_SHIFT_C2HEVT_MSG_1_8821C) 4169 #define BITS_C2HEVT_MSG_1_8821C \ 4170 (BIT_MASK_C2HEVT_MSG_1_8821C << BIT_SHIFT_C2HEVT_MSG_1_8821C) 4171 #define BIT_CLEAR_C2HEVT_MSG_1_8821C(x) ((x) & (~BITS_C2HEVT_MSG_1_8821C)) 4172 #define BIT_GET_C2HEVT_MSG_1_8821C(x) \ 4173 (((x) >> BIT_SHIFT_C2HEVT_MSG_1_8821C) & BIT_MASK_C2HEVT_MSG_1_8821C) 4174 #define BIT_SET_C2HEVT_MSG_1_8821C(x, v) \ 4175 (BIT_CLEAR_C2HEVT_MSG_1_8821C(x) | BIT_C2HEVT_MSG_1_8821C(v)) 4176 4177 /* 2 REG_C2HEVT_2_8821C */ 4178 4179 #define BIT_SHIFT_C2HEVT_MSG_2_8821C 0 4180 #define BIT_MASK_C2HEVT_MSG_2_8821C 0xffffffffL 4181 #define BIT_C2HEVT_MSG_2_8821C(x) \ 4182 (((x) & BIT_MASK_C2HEVT_MSG_2_8821C) << BIT_SHIFT_C2HEVT_MSG_2_8821C) 4183 #define BITS_C2HEVT_MSG_2_8821C \ 4184 (BIT_MASK_C2HEVT_MSG_2_8821C << BIT_SHIFT_C2HEVT_MSG_2_8821C) 4185 #define BIT_CLEAR_C2HEVT_MSG_2_8821C(x) ((x) & (~BITS_C2HEVT_MSG_2_8821C)) 4186 #define BIT_GET_C2HEVT_MSG_2_8821C(x) \ 4187 (((x) >> BIT_SHIFT_C2HEVT_MSG_2_8821C) & BIT_MASK_C2HEVT_MSG_2_8821C) 4188 #define BIT_SET_C2HEVT_MSG_2_8821C(x, v) \ 4189 (BIT_CLEAR_C2HEVT_MSG_2_8821C(x) | BIT_C2HEVT_MSG_2_8821C(v)) 4190 4191 /* 2 REG_C2HEVT_3_8821C */ 4192 4193 #define BIT_SHIFT_C2HEVT_MSG_3_8821C 0 4194 #define BIT_MASK_C2HEVT_MSG_3_8821C 0xffffffffL 4195 #define BIT_C2HEVT_MSG_3_8821C(x) \ 4196 (((x) & BIT_MASK_C2HEVT_MSG_3_8821C) << BIT_SHIFT_C2HEVT_MSG_3_8821C) 4197 #define BITS_C2HEVT_MSG_3_8821C \ 4198 (BIT_MASK_C2HEVT_MSG_3_8821C << BIT_SHIFT_C2HEVT_MSG_3_8821C) 4199 #define BIT_CLEAR_C2HEVT_MSG_3_8821C(x) ((x) & (~BITS_C2HEVT_MSG_3_8821C)) 4200 #define BIT_GET_C2HEVT_MSG_3_8821C(x) \ 4201 (((x) >> BIT_SHIFT_C2HEVT_MSG_3_8821C) & BIT_MASK_C2HEVT_MSG_3_8821C) 4202 #define BIT_SET_C2HEVT_MSG_3_8821C(x, v) \ 4203 (BIT_CLEAR_C2HEVT_MSG_3_8821C(x) | BIT_C2HEVT_MSG_3_8821C(v)) 4204 4205 /* 2 REG_NOT_VALID_8821C */ 4206 4207 /* 2 REG_NOT_VALID_8821C */ 4208 4209 /* 2 REG_SW_DEFINED_PAGE1_8821C */ 4210 4211 #define BIT_SHIFT_SW_DEFINED_PAGE1_V1_8821C 0 4212 #define BIT_MASK_SW_DEFINED_PAGE1_V1_8821C 0xffffffffL 4213 #define BIT_SW_DEFINED_PAGE1_V1_8821C(x) \ 4214 (((x) & BIT_MASK_SW_DEFINED_PAGE1_V1_8821C) \ 4215 << BIT_SHIFT_SW_DEFINED_PAGE1_V1_8821C) 4216 #define BITS_SW_DEFINED_PAGE1_V1_8821C \ 4217 (BIT_MASK_SW_DEFINED_PAGE1_V1_8821C \ 4218 << BIT_SHIFT_SW_DEFINED_PAGE1_V1_8821C) 4219 #define BIT_CLEAR_SW_DEFINED_PAGE1_V1_8821C(x) \ 4220 ((x) & (~BITS_SW_DEFINED_PAGE1_V1_8821C)) 4221 #define BIT_GET_SW_DEFINED_PAGE1_V1_8821C(x) \ 4222 (((x) >> BIT_SHIFT_SW_DEFINED_PAGE1_V1_8821C) & \ 4223 BIT_MASK_SW_DEFINED_PAGE1_V1_8821C) 4224 #define BIT_SET_SW_DEFINED_PAGE1_V1_8821C(x, v) \ 4225 (BIT_CLEAR_SW_DEFINED_PAGE1_V1_8821C(x) | \ 4226 BIT_SW_DEFINED_PAGE1_V1_8821C(v)) 4227 4228 /* 2 REG_SW_DEFINED_PAGE2_8821C */ 4229 4230 #define BIT_SHIFT_SW_DEFINED_PAGE2_8821C 0 4231 #define BIT_MASK_SW_DEFINED_PAGE2_8821C 0xffffffffL 4232 #define BIT_SW_DEFINED_PAGE2_8821C(x) \ 4233 (((x) & BIT_MASK_SW_DEFINED_PAGE2_8821C) \ 4234 << BIT_SHIFT_SW_DEFINED_PAGE2_8821C) 4235 #define BITS_SW_DEFINED_PAGE2_8821C \ 4236 (BIT_MASK_SW_DEFINED_PAGE2_8821C << BIT_SHIFT_SW_DEFINED_PAGE2_8821C) 4237 #define BIT_CLEAR_SW_DEFINED_PAGE2_8821C(x) \ 4238 ((x) & (~BITS_SW_DEFINED_PAGE2_8821C)) 4239 #define BIT_GET_SW_DEFINED_PAGE2_8821C(x) \ 4240 (((x) >> BIT_SHIFT_SW_DEFINED_PAGE2_8821C) & \ 4241 BIT_MASK_SW_DEFINED_PAGE2_8821C) 4242 #define BIT_SET_SW_DEFINED_PAGE2_8821C(x, v) \ 4243 (BIT_CLEAR_SW_DEFINED_PAGE2_8821C(x) | BIT_SW_DEFINED_PAGE2_8821C(v)) 4244 4245 /* 2 REG_MCUTST_I_8821C */ 4246 4247 #define BIT_SHIFT_MCUDMSG_I_8821C 0 4248 #define BIT_MASK_MCUDMSG_I_8821C 0xffffffffL 4249 #define BIT_MCUDMSG_I_8821C(x) \ 4250 (((x) & BIT_MASK_MCUDMSG_I_8821C) << BIT_SHIFT_MCUDMSG_I_8821C) 4251 #define BITS_MCUDMSG_I_8821C \ 4252 (BIT_MASK_MCUDMSG_I_8821C << BIT_SHIFT_MCUDMSG_I_8821C) 4253 #define BIT_CLEAR_MCUDMSG_I_8821C(x) ((x) & (~BITS_MCUDMSG_I_8821C)) 4254 #define BIT_GET_MCUDMSG_I_8821C(x) \ 4255 (((x) >> BIT_SHIFT_MCUDMSG_I_8821C) & BIT_MASK_MCUDMSG_I_8821C) 4256 #define BIT_SET_MCUDMSG_I_8821C(x, v) \ 4257 (BIT_CLEAR_MCUDMSG_I_8821C(x) | BIT_MCUDMSG_I_8821C(v)) 4258 4259 /* 2 REG_MCUTST_II_8821C */ 4260 4261 #define BIT_SHIFT_MCUDMSG_II_8821C 0 4262 #define BIT_MASK_MCUDMSG_II_8821C 0xffffffffL 4263 #define BIT_MCUDMSG_II_8821C(x) \ 4264 (((x) & BIT_MASK_MCUDMSG_II_8821C) << BIT_SHIFT_MCUDMSG_II_8821C) 4265 #define BITS_MCUDMSG_II_8821C \ 4266 (BIT_MASK_MCUDMSG_II_8821C << BIT_SHIFT_MCUDMSG_II_8821C) 4267 #define BIT_CLEAR_MCUDMSG_II_8821C(x) ((x) & (~BITS_MCUDMSG_II_8821C)) 4268 #define BIT_GET_MCUDMSG_II_8821C(x) \ 4269 (((x) >> BIT_SHIFT_MCUDMSG_II_8821C) & BIT_MASK_MCUDMSG_II_8821C) 4270 #define BIT_SET_MCUDMSG_II_8821C(x, v) \ 4271 (BIT_CLEAR_MCUDMSG_II_8821C(x) | BIT_MCUDMSG_II_8821C(v)) 4272 4273 /* 2 REG_FMETHR_8821C */ 4274 #define BIT_FMSG_INT_8821C BIT(31) 4275 4276 #define BIT_SHIFT_FW_MSG_8821C 0 4277 #define BIT_MASK_FW_MSG_8821C 0xffffffffL 4278 #define BIT_FW_MSG_8821C(x) \ 4279 (((x) & BIT_MASK_FW_MSG_8821C) << BIT_SHIFT_FW_MSG_8821C) 4280 #define BITS_FW_MSG_8821C (BIT_MASK_FW_MSG_8821C << BIT_SHIFT_FW_MSG_8821C) 4281 #define BIT_CLEAR_FW_MSG_8821C(x) ((x) & (~BITS_FW_MSG_8821C)) 4282 #define BIT_GET_FW_MSG_8821C(x) \ 4283 (((x) >> BIT_SHIFT_FW_MSG_8821C) & BIT_MASK_FW_MSG_8821C) 4284 #define BIT_SET_FW_MSG_8821C(x, v) \ 4285 (BIT_CLEAR_FW_MSG_8821C(x) | BIT_FW_MSG_8821C(v)) 4286 4287 /* 2 REG_HMETFR_8821C */ 4288 4289 #define BIT_SHIFT_HRCV_MSG_8821C 24 4290 #define BIT_MASK_HRCV_MSG_8821C 0xff 4291 #define BIT_HRCV_MSG_8821C(x) \ 4292 (((x) & BIT_MASK_HRCV_MSG_8821C) << BIT_SHIFT_HRCV_MSG_8821C) 4293 #define BITS_HRCV_MSG_8821C \ 4294 (BIT_MASK_HRCV_MSG_8821C << BIT_SHIFT_HRCV_MSG_8821C) 4295 #define BIT_CLEAR_HRCV_MSG_8821C(x) ((x) & (~BITS_HRCV_MSG_8821C)) 4296 #define BIT_GET_HRCV_MSG_8821C(x) \ 4297 (((x) >> BIT_SHIFT_HRCV_MSG_8821C) & BIT_MASK_HRCV_MSG_8821C) 4298 #define BIT_SET_HRCV_MSG_8821C(x, v) \ 4299 (BIT_CLEAR_HRCV_MSG_8821C(x) | BIT_HRCV_MSG_8821C(v)) 4300 4301 #define BIT_INT_BOX3_8821C BIT(3) 4302 #define BIT_INT_BOX2_8821C BIT(2) 4303 #define BIT_INT_BOX1_8821C BIT(1) 4304 #define BIT_INT_BOX0_8821C BIT(0) 4305 4306 /* 2 REG_HMEBOX0_8821C */ 4307 4308 #define BIT_SHIFT_HOST_MSG_0_8821C 0 4309 #define BIT_MASK_HOST_MSG_0_8821C 0xffffffffL 4310 #define BIT_HOST_MSG_0_8821C(x) \ 4311 (((x) & BIT_MASK_HOST_MSG_0_8821C) << BIT_SHIFT_HOST_MSG_0_8821C) 4312 #define BITS_HOST_MSG_0_8821C \ 4313 (BIT_MASK_HOST_MSG_0_8821C << BIT_SHIFT_HOST_MSG_0_8821C) 4314 #define BIT_CLEAR_HOST_MSG_0_8821C(x) ((x) & (~BITS_HOST_MSG_0_8821C)) 4315 #define BIT_GET_HOST_MSG_0_8821C(x) \ 4316 (((x) >> BIT_SHIFT_HOST_MSG_0_8821C) & BIT_MASK_HOST_MSG_0_8821C) 4317 #define BIT_SET_HOST_MSG_0_8821C(x, v) \ 4318 (BIT_CLEAR_HOST_MSG_0_8821C(x) | BIT_HOST_MSG_0_8821C(v)) 4319 4320 /* 2 REG_HMEBOX1_8821C */ 4321 4322 #define BIT_SHIFT_HOST_MSG_1_8821C 0 4323 #define BIT_MASK_HOST_MSG_1_8821C 0xffffffffL 4324 #define BIT_HOST_MSG_1_8821C(x) \ 4325 (((x) & BIT_MASK_HOST_MSG_1_8821C) << BIT_SHIFT_HOST_MSG_1_8821C) 4326 #define BITS_HOST_MSG_1_8821C \ 4327 (BIT_MASK_HOST_MSG_1_8821C << BIT_SHIFT_HOST_MSG_1_8821C) 4328 #define BIT_CLEAR_HOST_MSG_1_8821C(x) ((x) & (~BITS_HOST_MSG_1_8821C)) 4329 #define BIT_GET_HOST_MSG_1_8821C(x) \ 4330 (((x) >> BIT_SHIFT_HOST_MSG_1_8821C) & BIT_MASK_HOST_MSG_1_8821C) 4331 #define BIT_SET_HOST_MSG_1_8821C(x, v) \ 4332 (BIT_CLEAR_HOST_MSG_1_8821C(x) | BIT_HOST_MSG_1_8821C(v)) 4333 4334 /* 2 REG_HMEBOX2_8821C */ 4335 4336 #define BIT_SHIFT_HOST_MSG_2_8821C 0 4337 #define BIT_MASK_HOST_MSG_2_8821C 0xffffffffL 4338 #define BIT_HOST_MSG_2_8821C(x) \ 4339 (((x) & BIT_MASK_HOST_MSG_2_8821C) << BIT_SHIFT_HOST_MSG_2_8821C) 4340 #define BITS_HOST_MSG_2_8821C \ 4341 (BIT_MASK_HOST_MSG_2_8821C << BIT_SHIFT_HOST_MSG_2_8821C) 4342 #define BIT_CLEAR_HOST_MSG_2_8821C(x) ((x) & (~BITS_HOST_MSG_2_8821C)) 4343 #define BIT_GET_HOST_MSG_2_8821C(x) \ 4344 (((x) >> BIT_SHIFT_HOST_MSG_2_8821C) & BIT_MASK_HOST_MSG_2_8821C) 4345 #define BIT_SET_HOST_MSG_2_8821C(x, v) \ 4346 (BIT_CLEAR_HOST_MSG_2_8821C(x) | BIT_HOST_MSG_2_8821C(v)) 4347 4348 /* 2 REG_HMEBOX3_8821C */ 4349 4350 #define BIT_SHIFT_HOST_MSG_3_8821C 0 4351 #define BIT_MASK_HOST_MSG_3_8821C 0xffffffffL 4352 #define BIT_HOST_MSG_3_8821C(x) \ 4353 (((x) & BIT_MASK_HOST_MSG_3_8821C) << BIT_SHIFT_HOST_MSG_3_8821C) 4354 #define BITS_HOST_MSG_3_8821C \ 4355 (BIT_MASK_HOST_MSG_3_8821C << BIT_SHIFT_HOST_MSG_3_8821C) 4356 #define BIT_CLEAR_HOST_MSG_3_8821C(x) ((x) & (~BITS_HOST_MSG_3_8821C)) 4357 #define BIT_GET_HOST_MSG_3_8821C(x) \ 4358 (((x) >> BIT_SHIFT_HOST_MSG_3_8821C) & BIT_MASK_HOST_MSG_3_8821C) 4359 #define BIT_SET_HOST_MSG_3_8821C(x, v) \ 4360 (BIT_CLEAR_HOST_MSG_3_8821C(x) | BIT_HOST_MSG_3_8821C(v)) 4361 4362 /* 2 REG_NOT_VALID_8821C */ 4363 4364 /* 2 REG_NOT_VALID_8821C */ 4365 4366 /* 2 REG_BB_ACCESS_CTRL_8821C */ 4367 4368 #define BIT_SHIFT_BB_WRITE_READ_8821C 30 4369 #define BIT_MASK_BB_WRITE_READ_8821C 0x3 4370 #define BIT_BB_WRITE_READ_8821C(x) \ 4371 (((x) & BIT_MASK_BB_WRITE_READ_8821C) << BIT_SHIFT_BB_WRITE_READ_8821C) 4372 #define BITS_BB_WRITE_READ_8821C \ 4373 (BIT_MASK_BB_WRITE_READ_8821C << BIT_SHIFT_BB_WRITE_READ_8821C) 4374 #define BIT_CLEAR_BB_WRITE_READ_8821C(x) ((x) & (~BITS_BB_WRITE_READ_8821C)) 4375 #define BIT_GET_BB_WRITE_READ_8821C(x) \ 4376 (((x) >> BIT_SHIFT_BB_WRITE_READ_8821C) & BIT_MASK_BB_WRITE_READ_8821C) 4377 #define BIT_SET_BB_WRITE_READ_8821C(x, v) \ 4378 (BIT_CLEAR_BB_WRITE_READ_8821C(x) | BIT_BB_WRITE_READ_8821C(v)) 4379 4380 #define BIT_SHIFT_BB_WRITE_EN_8821C 12 4381 #define BIT_MASK_BB_WRITE_EN_8821C 0xf 4382 #define BIT_BB_WRITE_EN_8821C(x) \ 4383 (((x) & BIT_MASK_BB_WRITE_EN_8821C) << BIT_SHIFT_BB_WRITE_EN_8821C) 4384 #define BITS_BB_WRITE_EN_8821C \ 4385 (BIT_MASK_BB_WRITE_EN_8821C << BIT_SHIFT_BB_WRITE_EN_8821C) 4386 #define BIT_CLEAR_BB_WRITE_EN_8821C(x) ((x) & (~BITS_BB_WRITE_EN_8821C)) 4387 #define BIT_GET_BB_WRITE_EN_8821C(x) \ 4388 (((x) >> BIT_SHIFT_BB_WRITE_EN_8821C) & BIT_MASK_BB_WRITE_EN_8821C) 4389 #define BIT_SET_BB_WRITE_EN_8821C(x, v) \ 4390 (BIT_CLEAR_BB_WRITE_EN_8821C(x) | BIT_BB_WRITE_EN_8821C(v)) 4391 4392 #define BIT_SHIFT_BB_ADDR_8821C 2 4393 #define BIT_MASK_BB_ADDR_8821C 0x1ff 4394 #define BIT_BB_ADDR_8821C(x) \ 4395 (((x) & BIT_MASK_BB_ADDR_8821C) << BIT_SHIFT_BB_ADDR_8821C) 4396 #define BITS_BB_ADDR_8821C (BIT_MASK_BB_ADDR_8821C << BIT_SHIFT_BB_ADDR_8821C) 4397 #define BIT_CLEAR_BB_ADDR_8821C(x) ((x) & (~BITS_BB_ADDR_8821C)) 4398 #define BIT_GET_BB_ADDR_8821C(x) \ 4399 (((x) >> BIT_SHIFT_BB_ADDR_8821C) & BIT_MASK_BB_ADDR_8821C) 4400 #define BIT_SET_BB_ADDR_8821C(x, v) \ 4401 (BIT_CLEAR_BB_ADDR_8821C(x) | BIT_BB_ADDR_8821C(v)) 4402 4403 #define BIT_BB_ERRACC_8821C BIT(0) 4404 4405 /* 2 REG_BB_ACCESS_DATA_8821C */ 4406 4407 #define BIT_SHIFT_BB_DATA_8821C 0 4408 #define BIT_MASK_BB_DATA_8821C 0xffffffffL 4409 #define BIT_BB_DATA_8821C(x) \ 4410 (((x) & BIT_MASK_BB_DATA_8821C) << BIT_SHIFT_BB_DATA_8821C) 4411 #define BITS_BB_DATA_8821C (BIT_MASK_BB_DATA_8821C << BIT_SHIFT_BB_DATA_8821C) 4412 #define BIT_CLEAR_BB_DATA_8821C(x) ((x) & (~BITS_BB_DATA_8821C)) 4413 #define BIT_GET_BB_DATA_8821C(x) \ 4414 (((x) >> BIT_SHIFT_BB_DATA_8821C) & BIT_MASK_BB_DATA_8821C) 4415 #define BIT_SET_BB_DATA_8821C(x, v) \ 4416 (BIT_CLEAR_BB_DATA_8821C(x) | BIT_BB_DATA_8821C(v)) 4417 4418 /* 2 REG_HMEBOX_E0_8821C */ 4419 4420 #define BIT_SHIFT_HMEBOX_E0_8821C 0 4421 #define BIT_MASK_HMEBOX_E0_8821C 0xffffffffL 4422 #define BIT_HMEBOX_E0_8821C(x) \ 4423 (((x) & BIT_MASK_HMEBOX_E0_8821C) << BIT_SHIFT_HMEBOX_E0_8821C) 4424 #define BITS_HMEBOX_E0_8821C \ 4425 (BIT_MASK_HMEBOX_E0_8821C << BIT_SHIFT_HMEBOX_E0_8821C) 4426 #define BIT_CLEAR_HMEBOX_E0_8821C(x) ((x) & (~BITS_HMEBOX_E0_8821C)) 4427 #define BIT_GET_HMEBOX_E0_8821C(x) \ 4428 (((x) >> BIT_SHIFT_HMEBOX_E0_8821C) & BIT_MASK_HMEBOX_E0_8821C) 4429 #define BIT_SET_HMEBOX_E0_8821C(x, v) \ 4430 (BIT_CLEAR_HMEBOX_E0_8821C(x) | BIT_HMEBOX_E0_8821C(v)) 4431 4432 /* 2 REG_HMEBOX_E1_8821C */ 4433 4434 #define BIT_SHIFT_HMEBOX_E1_8821C 0 4435 #define BIT_MASK_HMEBOX_E1_8821C 0xffffffffL 4436 #define BIT_HMEBOX_E1_8821C(x) \ 4437 (((x) & BIT_MASK_HMEBOX_E1_8821C) << BIT_SHIFT_HMEBOX_E1_8821C) 4438 #define BITS_HMEBOX_E1_8821C \ 4439 (BIT_MASK_HMEBOX_E1_8821C << BIT_SHIFT_HMEBOX_E1_8821C) 4440 #define BIT_CLEAR_HMEBOX_E1_8821C(x) ((x) & (~BITS_HMEBOX_E1_8821C)) 4441 #define BIT_GET_HMEBOX_E1_8821C(x) \ 4442 (((x) >> BIT_SHIFT_HMEBOX_E1_8821C) & BIT_MASK_HMEBOX_E1_8821C) 4443 #define BIT_SET_HMEBOX_E1_8821C(x, v) \ 4444 (BIT_CLEAR_HMEBOX_E1_8821C(x) | BIT_HMEBOX_E1_8821C(v)) 4445 4446 /* 2 REG_HMEBOX_E2_8821C */ 4447 4448 #define BIT_SHIFT_HMEBOX_E2_8821C 0 4449 #define BIT_MASK_HMEBOX_E2_8821C 0xffffffffL 4450 #define BIT_HMEBOX_E2_8821C(x) \ 4451 (((x) & BIT_MASK_HMEBOX_E2_8821C) << BIT_SHIFT_HMEBOX_E2_8821C) 4452 #define BITS_HMEBOX_E2_8821C \ 4453 (BIT_MASK_HMEBOX_E2_8821C << BIT_SHIFT_HMEBOX_E2_8821C) 4454 #define BIT_CLEAR_HMEBOX_E2_8821C(x) ((x) & (~BITS_HMEBOX_E2_8821C)) 4455 #define BIT_GET_HMEBOX_E2_8821C(x) \ 4456 (((x) >> BIT_SHIFT_HMEBOX_E2_8821C) & BIT_MASK_HMEBOX_E2_8821C) 4457 #define BIT_SET_HMEBOX_E2_8821C(x, v) \ 4458 (BIT_CLEAR_HMEBOX_E2_8821C(x) | BIT_HMEBOX_E2_8821C(v)) 4459 4460 /* 2 REG_HMEBOX_E3_8821C */ 4461 4462 #define BIT_SHIFT_HMEBOX_E3_8821C 0 4463 #define BIT_MASK_HMEBOX_E3_8821C 0xffffffffL 4464 #define BIT_HMEBOX_E3_8821C(x) \ 4465 (((x) & BIT_MASK_HMEBOX_E3_8821C) << BIT_SHIFT_HMEBOX_E3_8821C) 4466 #define BITS_HMEBOX_E3_8821C \ 4467 (BIT_MASK_HMEBOX_E3_8821C << BIT_SHIFT_HMEBOX_E3_8821C) 4468 #define BIT_CLEAR_HMEBOX_E3_8821C(x) ((x) & (~BITS_HMEBOX_E3_8821C)) 4469 #define BIT_GET_HMEBOX_E3_8821C(x) \ 4470 (((x) >> BIT_SHIFT_HMEBOX_E3_8821C) & BIT_MASK_HMEBOX_E3_8821C) 4471 #define BIT_SET_HMEBOX_E3_8821C(x, v) \ 4472 (BIT_CLEAR_HMEBOX_E3_8821C(x) | BIT_HMEBOX_E3_8821C(v)) 4473 4474 /* 2 REG_CR_EXT_8821C */ 4475 4476 #define BIT_SHIFT_PHY_REQ_DELAY_8821C 24 4477 #define BIT_MASK_PHY_REQ_DELAY_8821C 0xf 4478 #define BIT_PHY_REQ_DELAY_8821C(x) \ 4479 (((x) & BIT_MASK_PHY_REQ_DELAY_8821C) << BIT_SHIFT_PHY_REQ_DELAY_8821C) 4480 #define BITS_PHY_REQ_DELAY_8821C \ 4481 (BIT_MASK_PHY_REQ_DELAY_8821C << BIT_SHIFT_PHY_REQ_DELAY_8821C) 4482 #define BIT_CLEAR_PHY_REQ_DELAY_8821C(x) ((x) & (~BITS_PHY_REQ_DELAY_8821C)) 4483 #define BIT_GET_PHY_REQ_DELAY_8821C(x) \ 4484 (((x) >> BIT_SHIFT_PHY_REQ_DELAY_8821C) & BIT_MASK_PHY_REQ_DELAY_8821C) 4485 #define BIT_SET_PHY_REQ_DELAY_8821C(x, v) \ 4486 (BIT_CLEAR_PHY_REQ_DELAY_8821C(x) | BIT_PHY_REQ_DELAY_8821C(v)) 4487 4488 /* 2 REG_NOT_VALID_8821C */ 4489 #define BIT_SPD_DOWN_8821C BIT(16) 4490 4491 /* 2 REG_NOT_VALID_8821C */ 4492 4493 #define BIT_SHIFT_NETYPE4_8821C 4 4494 #define BIT_MASK_NETYPE4_8821C 0x3 4495 #define BIT_NETYPE4_8821C(x) \ 4496 (((x) & BIT_MASK_NETYPE4_8821C) << BIT_SHIFT_NETYPE4_8821C) 4497 #define BITS_NETYPE4_8821C (BIT_MASK_NETYPE4_8821C << BIT_SHIFT_NETYPE4_8821C) 4498 #define BIT_CLEAR_NETYPE4_8821C(x) ((x) & (~BITS_NETYPE4_8821C)) 4499 #define BIT_GET_NETYPE4_8821C(x) \ 4500 (((x) >> BIT_SHIFT_NETYPE4_8821C) & BIT_MASK_NETYPE4_8821C) 4501 #define BIT_SET_NETYPE4_8821C(x, v) \ 4502 (BIT_CLEAR_NETYPE4_8821C(x) | BIT_NETYPE4_8821C(v)) 4503 4504 #define BIT_SHIFT_NETYPE3_8821C 2 4505 #define BIT_MASK_NETYPE3_8821C 0x3 4506 #define BIT_NETYPE3_8821C(x) \ 4507 (((x) & BIT_MASK_NETYPE3_8821C) << BIT_SHIFT_NETYPE3_8821C) 4508 #define BITS_NETYPE3_8821C (BIT_MASK_NETYPE3_8821C << BIT_SHIFT_NETYPE3_8821C) 4509 #define BIT_CLEAR_NETYPE3_8821C(x) ((x) & (~BITS_NETYPE3_8821C)) 4510 #define BIT_GET_NETYPE3_8821C(x) \ 4511 (((x) >> BIT_SHIFT_NETYPE3_8821C) & BIT_MASK_NETYPE3_8821C) 4512 #define BIT_SET_NETYPE3_8821C(x, v) \ 4513 (BIT_CLEAR_NETYPE3_8821C(x) | BIT_NETYPE3_8821C(v)) 4514 4515 #define BIT_SHIFT_NETYPE2_8821C 0 4516 #define BIT_MASK_NETYPE2_8821C 0x3 4517 #define BIT_NETYPE2_8821C(x) \ 4518 (((x) & BIT_MASK_NETYPE2_8821C) << BIT_SHIFT_NETYPE2_8821C) 4519 #define BITS_NETYPE2_8821C (BIT_MASK_NETYPE2_8821C << BIT_SHIFT_NETYPE2_8821C) 4520 #define BIT_CLEAR_NETYPE2_8821C(x) ((x) & (~BITS_NETYPE2_8821C)) 4521 #define BIT_GET_NETYPE2_8821C(x) \ 4522 (((x) >> BIT_SHIFT_NETYPE2_8821C) & BIT_MASK_NETYPE2_8821C) 4523 #define BIT_SET_NETYPE2_8821C(x, v) \ 4524 (BIT_CLEAR_NETYPE2_8821C(x) | BIT_NETYPE2_8821C(v)) 4525 4526 /* 2 REG_NOT_VALID_8821C */ 4527 4528 /* 2 REG_NOT_VALID_8821C */ 4529 4530 /* 2 REG_NOT_VALID_8821C */ 4531 4532 /* 2 REG_NOT_VALID_8821C */ 4533 4534 /* 2 REG_FWFF_8821C */ 4535 4536 #define BIT_SHIFT_PKTNUM_TH_V1_8821C 24 4537 #define BIT_MASK_PKTNUM_TH_V1_8821C 0xff 4538 #define BIT_PKTNUM_TH_V1_8821C(x) \ 4539 (((x) & BIT_MASK_PKTNUM_TH_V1_8821C) << BIT_SHIFT_PKTNUM_TH_V1_8821C) 4540 #define BITS_PKTNUM_TH_V1_8821C \ 4541 (BIT_MASK_PKTNUM_TH_V1_8821C << BIT_SHIFT_PKTNUM_TH_V1_8821C) 4542 #define BIT_CLEAR_PKTNUM_TH_V1_8821C(x) ((x) & (~BITS_PKTNUM_TH_V1_8821C)) 4543 #define BIT_GET_PKTNUM_TH_V1_8821C(x) \ 4544 (((x) >> BIT_SHIFT_PKTNUM_TH_V1_8821C) & BIT_MASK_PKTNUM_TH_V1_8821C) 4545 #define BIT_SET_PKTNUM_TH_V1_8821C(x, v) \ 4546 (BIT_CLEAR_PKTNUM_TH_V1_8821C(x) | BIT_PKTNUM_TH_V1_8821C(v)) 4547 4548 #define BIT_SHIFT_TIMER_TH_8821C 16 4549 #define BIT_MASK_TIMER_TH_8821C 0xff 4550 #define BIT_TIMER_TH_8821C(x) \ 4551 (((x) & BIT_MASK_TIMER_TH_8821C) << BIT_SHIFT_TIMER_TH_8821C) 4552 #define BITS_TIMER_TH_8821C \ 4553 (BIT_MASK_TIMER_TH_8821C << BIT_SHIFT_TIMER_TH_8821C) 4554 #define BIT_CLEAR_TIMER_TH_8821C(x) ((x) & (~BITS_TIMER_TH_8821C)) 4555 #define BIT_GET_TIMER_TH_8821C(x) \ 4556 (((x) >> BIT_SHIFT_TIMER_TH_8821C) & BIT_MASK_TIMER_TH_8821C) 4557 #define BIT_SET_TIMER_TH_8821C(x, v) \ 4558 (BIT_CLEAR_TIMER_TH_8821C(x) | BIT_TIMER_TH_8821C(v)) 4559 4560 #define BIT_SHIFT_RXPKT1ENADDR_8821C 0 4561 #define BIT_MASK_RXPKT1ENADDR_8821C 0xffff 4562 #define BIT_RXPKT1ENADDR_8821C(x) \ 4563 (((x) & BIT_MASK_RXPKT1ENADDR_8821C) << BIT_SHIFT_RXPKT1ENADDR_8821C) 4564 #define BITS_RXPKT1ENADDR_8821C \ 4565 (BIT_MASK_RXPKT1ENADDR_8821C << BIT_SHIFT_RXPKT1ENADDR_8821C) 4566 #define BIT_CLEAR_RXPKT1ENADDR_8821C(x) ((x) & (~BITS_RXPKT1ENADDR_8821C)) 4567 #define BIT_GET_RXPKT1ENADDR_8821C(x) \ 4568 (((x) >> BIT_SHIFT_RXPKT1ENADDR_8821C) & BIT_MASK_RXPKT1ENADDR_8821C) 4569 #define BIT_SET_RXPKT1ENADDR_8821C(x, v) \ 4570 (BIT_CLEAR_RXPKT1ENADDR_8821C(x) | BIT_RXPKT1ENADDR_8821C(v)) 4571 4572 /* 2 REG_RXFF_PTR_V1_8821C */ 4573 4574 /* 2 REG_NOT_VALID_8821C */ 4575 4576 #define BIT_SHIFT_RXFF0_RDPTR_V2_8821C 0 4577 #define BIT_MASK_RXFF0_RDPTR_V2_8821C 0x3ffff 4578 #define BIT_RXFF0_RDPTR_V2_8821C(x) \ 4579 (((x) & BIT_MASK_RXFF0_RDPTR_V2_8821C) \ 4580 << BIT_SHIFT_RXFF0_RDPTR_V2_8821C) 4581 #define BITS_RXFF0_RDPTR_V2_8821C \ 4582 (BIT_MASK_RXFF0_RDPTR_V2_8821C << BIT_SHIFT_RXFF0_RDPTR_V2_8821C) 4583 #define BIT_CLEAR_RXFF0_RDPTR_V2_8821C(x) ((x) & (~BITS_RXFF0_RDPTR_V2_8821C)) 4584 #define BIT_GET_RXFF0_RDPTR_V2_8821C(x) \ 4585 (((x) >> BIT_SHIFT_RXFF0_RDPTR_V2_8821C) & \ 4586 BIT_MASK_RXFF0_RDPTR_V2_8821C) 4587 #define BIT_SET_RXFF0_RDPTR_V2_8821C(x, v) \ 4588 (BIT_CLEAR_RXFF0_RDPTR_V2_8821C(x) | BIT_RXFF0_RDPTR_V2_8821C(v)) 4589 4590 /* 2 REG_RXFF_WTR_V1_8821C */ 4591 4592 /* 2 REG_NOT_VALID_8821C */ 4593 4594 #define BIT_SHIFT_RXFF0_WTPTR_V2_8821C 0 4595 #define BIT_MASK_RXFF0_WTPTR_V2_8821C 0x3ffff 4596 #define BIT_RXFF0_WTPTR_V2_8821C(x) \ 4597 (((x) & BIT_MASK_RXFF0_WTPTR_V2_8821C) \ 4598 << BIT_SHIFT_RXFF0_WTPTR_V2_8821C) 4599 #define BITS_RXFF0_WTPTR_V2_8821C \ 4600 (BIT_MASK_RXFF0_WTPTR_V2_8821C << BIT_SHIFT_RXFF0_WTPTR_V2_8821C) 4601 #define BIT_CLEAR_RXFF0_WTPTR_V2_8821C(x) ((x) & (~BITS_RXFF0_WTPTR_V2_8821C)) 4602 #define BIT_GET_RXFF0_WTPTR_V2_8821C(x) \ 4603 (((x) >> BIT_SHIFT_RXFF0_WTPTR_V2_8821C) & \ 4604 BIT_MASK_RXFF0_WTPTR_V2_8821C) 4605 #define BIT_SET_RXFF0_WTPTR_V2_8821C(x, v) \ 4606 (BIT_CLEAR_RXFF0_WTPTR_V2_8821C(x) | BIT_RXFF0_WTPTR_V2_8821C(v)) 4607 4608 /* 2 REG_FE2IMR_8821C */ 4609 #define BIT__FE4ISR__IND_MSK_8821C BIT(29) 4610 #define BIT_FS_TXSC_DESC_DONE_INT_EN_8821C BIT(28) 4611 #define BIT_FS_TXSC_BKDONE_INT_EN_8821C BIT(27) 4612 #define BIT_FS_TXSC_BEDONE_INT_EN_8821C BIT(26) 4613 #define BIT_FS_TXSC_VIDONE_INT_EN_8821C BIT(25) 4614 #define BIT_FS_TXSC_VODONE_INT_EN_8821C BIT(24) 4615 #define BIT_FS_ATIM_MB7_INT_EN_8821C BIT(23) 4616 #define BIT_FS_ATIM_MB6_INT_EN_8821C BIT(22) 4617 #define BIT_FS_ATIM_MB5_INT_EN_8821C BIT(21) 4618 #define BIT_FS_ATIM_MB4_INT_EN_8821C BIT(20) 4619 #define BIT_FS_ATIM_MB3_INT_EN_8821C BIT(19) 4620 #define BIT_FS_ATIM_MB2_INT_EN_8821C BIT(18) 4621 #define BIT_FS_ATIM_MB1_INT_EN_8821C BIT(17) 4622 #define BIT_FS_ATIM_MB0_INT_EN_8821C BIT(16) 4623 #define BIT_FS_TBTT4INT_EN_8821C BIT(11) 4624 #define BIT_FS_TBTT3INT_EN_8821C BIT(10) 4625 #define BIT_FS_TBTT2INT_EN_8821C BIT(9) 4626 #define BIT_FS_TBTT1INT_EN_8821C BIT(8) 4627 #define BIT_FS_TBTT0_MB7INT_EN_8821C BIT(7) 4628 #define BIT_FS_TBTT0_MB6INT_EN_8821C BIT(6) 4629 #define BIT_FS_TBTT0_MB5INT_EN_8821C BIT(5) 4630 #define BIT_FS_TBTT0_MB4INT_EN_8821C BIT(4) 4631 #define BIT_FS_TBTT0_MB3INT_EN_8821C BIT(3) 4632 #define BIT_FS_TBTT0_MB2INT_EN_8821C BIT(2) 4633 #define BIT_FS_TBTT0_MB1INT_EN_8821C BIT(1) 4634 #define BIT_FS_TBTT0_INT_EN_8821C BIT(0) 4635 4636 /* 2 REG_FE2ISR_8821C */ 4637 #define BIT__FE4ISR__IND_INT_8821C BIT(29) 4638 #define BIT_FS_TXSC_DESC_DONE_INT_8821C BIT(28) 4639 #define BIT_FS_TXSC_BKDONE_INT_8821C BIT(27) 4640 #define BIT_FS_TXSC_BEDONE_INT_8821C BIT(26) 4641 #define BIT_FS_TXSC_VIDONE_INT_8821C BIT(25) 4642 #define BIT_FS_TXSC_VODONE_INT_8821C BIT(24) 4643 #define BIT_FS_ATIM_MB7_INT_8821C BIT(23) 4644 #define BIT_FS_ATIM_MB6_INT_8821C BIT(22) 4645 #define BIT_FS_ATIM_MB5_INT_8821C BIT(21) 4646 #define BIT_FS_ATIM_MB4_INT_8821C BIT(20) 4647 #define BIT_FS_ATIM_MB3_INT_8821C BIT(19) 4648 #define BIT_FS_ATIM_MB2_INT_8821C BIT(18) 4649 #define BIT_FS_ATIM_MB1_INT_8821C BIT(17) 4650 #define BIT_FS_ATIM_MB0_INT_8821C BIT(16) 4651 #define BIT_FS_TBTT4INT_8821C BIT(11) 4652 #define BIT_FS_TBTT3INT_8821C BIT(10) 4653 #define BIT_FS_TBTT2INT_8821C BIT(9) 4654 #define BIT_FS_TBTT1INT_8821C BIT(8) 4655 #define BIT_FS_TBTT0_MB7INT_8821C BIT(7) 4656 #define BIT_FS_TBTT0_MB6INT_8821C BIT(6) 4657 #define BIT_FS_TBTT0_MB5INT_8821C BIT(5) 4658 #define BIT_FS_TBTT0_MB4INT_8821C BIT(4) 4659 #define BIT_FS_TBTT0_MB3INT_8821C BIT(3) 4660 #define BIT_FS_TBTT0_MB2INT_8821C BIT(2) 4661 #define BIT_FS_TBTT0_MB1INT_8821C BIT(1) 4662 #define BIT_FS_TBTT0_INT_8821C BIT(0) 4663 4664 /* 2 REG_FE3IMR_8821C */ 4665 #define BIT_FS_CLI3_MTI_BCNIVLEAR_INT__EN_8821C BIT(31) 4666 #define BIT_FS_CLI2_MTI_BCNIVLEAR_INT__EN_8821C BIT(30) 4667 #define BIT_FS_CLI1_MTI_BCNIVLEAR_INT__EN_8821C BIT(29) 4668 #define BIT_FS_CLI0_MTI_BCNIVLEAR_INT__EN_8821C BIT(28) 4669 #define BIT_FS_BCNDMA4_INT_EN_8821C BIT(27) 4670 #define BIT_FS_BCNDMA3_INT_EN_8821C BIT(26) 4671 #define BIT_FS_BCNDMA2_INT_EN_8821C BIT(25) 4672 #define BIT_FS_BCNDMA1_INT_EN_8821C BIT(24) 4673 #define BIT_FS_BCNDMA0_MB7_INT_EN_8821C BIT(23) 4674 #define BIT_FS_BCNDMA0_MB6_INT_EN_8821C BIT(22) 4675 #define BIT_FS_BCNDMA0_MB5_INT_EN_8821C BIT(21) 4676 #define BIT_FS_BCNDMA0_MB4_INT_EN_8821C BIT(20) 4677 #define BIT_FS_BCNDMA0_MB3_INT_EN_8821C BIT(19) 4678 #define BIT_FS_BCNDMA0_MB2_INT_EN_8821C BIT(18) 4679 #define BIT_FS_BCNDMA0_MB1_INT_EN_8821C BIT(17) 4680 #define BIT_FS_BCNDMA0_INT_EN_8821C BIT(16) 4681 #define BIT_FS_MTI_BCNIVLEAR_INT__EN_8821C BIT(15) 4682 #define BIT_FS_BCNERLY4_INT_EN_8821C BIT(11) 4683 #define BIT_FS_BCNERLY3_INT_EN_8821C BIT(10) 4684 #define BIT_FS_BCNERLY2_INT_EN_8821C BIT(9) 4685 #define BIT_FS_BCNERLY1_INT_EN_8821C BIT(8) 4686 #define BIT_FS_BCNERLY0_MB7INT_EN_8821C BIT(7) 4687 #define BIT_FS_BCNERLY0_MB6INT_EN_8821C BIT(6) 4688 #define BIT_FS_BCNERLY0_MB5INT_EN_8821C BIT(5) 4689 #define BIT_FS_BCNERLY0_MB4INT_EN_8821C BIT(4) 4690 #define BIT_FS_BCNERLY0_MB3INT_EN_8821C BIT(3) 4691 #define BIT_FS_BCNERLY0_MB2INT_EN_8821C BIT(2) 4692 #define BIT_FS_BCNERLY0_MB1INT_EN_8821C BIT(1) 4693 #define BIT_FS_BCNERLY0_INT_EN_8821C BIT(0) 4694 4695 /* 2 REG_FE3ISR_8821C */ 4696 #define BIT_FS_CLI3_MTI_BCNIVLEAR_INT_8821C BIT(31) 4697 #define BIT_FS_CLI2_MTI_BCNIVLEAR_INT_8821C BIT(30) 4698 #define BIT_FS_CLI1_MTI_BCNIVLEAR_INT_8821C BIT(29) 4699 #define BIT_FS_CLI0_MTI_BCNIVLEAR_INT_8821C BIT(28) 4700 #define BIT_FS_BCNDMA4_INT_8821C BIT(27) 4701 #define BIT_FS_BCNDMA3_INT_8821C BIT(26) 4702 #define BIT_FS_BCNDMA2_INT_8821C BIT(25) 4703 #define BIT_FS_BCNDMA1_INT_8821C BIT(24) 4704 #define BIT_FS_BCNDMA0_MB7_INT_8821C BIT(23) 4705 #define BIT_FS_BCNDMA0_MB6_INT_8821C BIT(22) 4706 #define BIT_FS_BCNDMA0_MB5_INT_8821C BIT(21) 4707 #define BIT_FS_BCNDMA0_MB4_INT_8821C BIT(20) 4708 #define BIT_FS_BCNDMA0_MB3_INT_8821C BIT(19) 4709 #define BIT_FS_BCNDMA0_MB2_INT_8821C BIT(18) 4710 #define BIT_FS_BCNDMA0_MB1_INT_8821C BIT(17) 4711 #define BIT_FS_BCNDMA0_INT_8821C BIT(16) 4712 #define BIT_FS_MTI_BCNIVLEAR_INT_8821C BIT(15) 4713 #define BIT_FS_BCNERLY4_INT_8821C BIT(11) 4714 #define BIT_FS_BCNERLY3_INT_8821C BIT(10) 4715 #define BIT_FS_BCNERLY2_INT_8821C BIT(9) 4716 #define BIT_FS_BCNERLY1_INT_8821C BIT(8) 4717 #define BIT_FS_BCNERLY0_MB7INT_8821C BIT(7) 4718 #define BIT_FS_BCNERLY0_MB6INT_8821C BIT(6) 4719 #define BIT_FS_BCNERLY0_MB5INT_8821C BIT(5) 4720 #define BIT_FS_BCNERLY0_MB4INT_8821C BIT(4) 4721 #define BIT_FS_BCNERLY0_MB3INT_8821C BIT(3) 4722 #define BIT_FS_BCNERLY0_MB2INT_8821C BIT(2) 4723 #define BIT_FS_BCNERLY0_MB1INT_8821C BIT(1) 4724 #define BIT_FS_BCNERLY0_INT_8821C BIT(0) 4725 4726 /* 2 REG_FE4IMR_8821C */ 4727 #define BIT_FS_CLI3_TXPKTIN_INT_EN_8821C BIT(19) 4728 #define BIT_FS_CLI2_TXPKTIN_INT_EN_8821C BIT(18) 4729 #define BIT_FS_CLI1_TXPKTIN_INT_EN_8821C BIT(17) 4730 #define BIT_FS_CLI0_TXPKTIN_INT_EN_8821C BIT(16) 4731 #define BIT_FS_CLI3_RX_UMD0_INT_EN_8821C BIT(15) 4732 #define BIT_FS_CLI3_RX_UMD1_INT_EN_8821C BIT(14) 4733 #define BIT_FS_CLI3_RX_BMD0_INT_EN_8821C BIT(13) 4734 #define BIT_FS_CLI3_RX_BMD1_INT_EN_8821C BIT(12) 4735 #define BIT_FS_CLI2_RX_UMD0_INT_EN_8821C BIT(11) 4736 #define BIT_FS_CLI2_RX_UMD1_INT_EN_8821C BIT(10) 4737 #define BIT_FS_CLI2_RX_BMD0_INT_EN_8821C BIT(9) 4738 #define BIT_FS_CLI2_RX_BMD1_INT_EN_8821C BIT(8) 4739 #define BIT_FS_CLI1_RX_UMD0_INT_EN_8821C BIT(7) 4740 #define BIT_FS_CLI1_RX_UMD1_INT_EN_8821C BIT(6) 4741 #define BIT_FS_CLI1_RX_BMD0_INT_EN_8821C BIT(5) 4742 #define BIT_FS_CLI1_RX_BMD1_INT_EN_8821C BIT(4) 4743 #define BIT_FS_CLI0_RX_UMD0_INT_EN_8821C BIT(3) 4744 #define BIT_FS_CLI0_RX_UMD1_INT_EN_8821C BIT(2) 4745 #define BIT_FS_CLI0_RX_BMD0_INT_EN_8821C BIT(1) 4746 #define BIT_FS_CLI0_RX_BMD1_INT_EN_8821C BIT(0) 4747 4748 /* 2 REG_FE4ISR_8821C */ 4749 #define BIT_FS_CLI3_TXPKTIN_INT_8821C BIT(19) 4750 #define BIT_FS_CLI2_TXPKTIN_INT_8821C BIT(18) 4751 #define BIT_FS_CLI1_TXPKTIN_INT_8821C BIT(17) 4752 #define BIT_FS_CLI0_TXPKTIN_INT_8821C BIT(16) 4753 #define BIT_FS_CLI3_RX_UMD0_INT_8821C BIT(15) 4754 #define BIT_FS_CLI3_RX_UMD1_INT_8821C BIT(14) 4755 #define BIT_FS_CLI3_RX_BMD0_INT_8821C BIT(13) 4756 #define BIT_FS_CLI3_RX_BMD1_INT_8821C BIT(12) 4757 #define BIT_FS_CLI2_RX_UMD0_INT_8821C BIT(11) 4758 #define BIT_FS_CLI2_RX_UMD1_INT_8821C BIT(10) 4759 #define BIT_FS_CLI2_RX_BMD0_INT_8821C BIT(9) 4760 #define BIT_FS_CLI2_RX_BMD1_INT_8821C BIT(8) 4761 #define BIT_FS_CLI1_RX_UMD0_INT_8821C BIT(7) 4762 #define BIT_FS_CLI1_RX_UMD1_INT_8821C BIT(6) 4763 #define BIT_FS_CLI1_RX_BMD0_INT_8821C BIT(5) 4764 #define BIT_FS_CLI1_RX_BMD1_INT_8821C BIT(4) 4765 #define BIT_FS_CLI0_RX_UMD0_INT_8821C BIT(3) 4766 #define BIT_FS_CLI0_RX_UMD1_INT_8821C BIT(2) 4767 #define BIT_FS_CLI0_RX_BMD0_INT_8821C BIT(1) 4768 #define BIT_FS_CLI0_RX_BMD1_INT_8821C BIT(0) 4769 4770 /* 2 REG_FT1IMR_8821C */ 4771 #define BIT__FT2ISR__IND_MSK_8821C BIT(30) 4772 #define BIT_FTM_PTT_INT_EN_8821C BIT(29) 4773 #define BIT_RXFTMREQ_INT_EN_8821C BIT(28) 4774 #define BIT_RXFTM_INT_EN_8821C BIT(27) 4775 #define BIT_TXFTM_INT_EN_8821C BIT(26) 4776 #define BIT_FS_H2C_CMD_OK_INT_EN_8821C BIT(25) 4777 #define BIT_FS_H2C_CMD_FULL_INT_EN_8821C BIT(24) 4778 #define BIT_FS_MACID_PWRCHANGE5_INT_EN_8821C BIT(23) 4779 #define BIT_FS_MACID_PWRCHANGE4_INT_EN_8821C BIT(22) 4780 #define BIT_FS_MACID_PWRCHANGE3_INT_EN_8821C BIT(21) 4781 #define BIT_FS_MACID_PWRCHANGE2_INT_EN_8821C BIT(20) 4782 #define BIT_FS_MACID_PWRCHANGE1_INT_EN_8821C BIT(19) 4783 #define BIT_FS_MACID_PWRCHANGE0_INT_EN_8821C BIT(18) 4784 #define BIT_FS_CTWEND2_INT_EN_8821C BIT(17) 4785 #define BIT_FS_CTWEND1_INT_EN_8821C BIT(16) 4786 #define BIT_FS_CTWEND0_INT_EN_8821C BIT(15) 4787 #define BIT_FS_TX_NULL1_INT_EN_8821C BIT(14) 4788 #define BIT_FS_TX_NULL0_INT_EN_8821C BIT(13) 4789 #define BIT_FS_TSF_BIT32_TOGGLE_EN_8821C BIT(12) 4790 #define BIT_FS_P2P_RFON2_INT_EN_8821C BIT(11) 4791 #define BIT_FS_P2P_RFOFF2_INT_EN_8821C BIT(10) 4792 #define BIT_FS_P2P_RFON1_INT_EN_8821C BIT(9) 4793 #define BIT_FS_P2P_RFOFF1_INT_EN_8821C BIT(8) 4794 #define BIT_FS_P2P_RFON0_INT_EN_8821C BIT(7) 4795 #define BIT_FS_P2P_RFOFF0_INT_EN_8821C BIT(6) 4796 #define BIT_FS_RX_UAPSDMD1_EN_8821C BIT(5) 4797 #define BIT_FS_RX_UAPSDMD0_EN_8821C BIT(4) 4798 #define BIT_FS_TRIGGER_PKT_EN_8821C BIT(3) 4799 #define BIT_FS_EOSP_INT_EN_8821C BIT(2) 4800 #define BIT_FS_RPWM2_INT_EN_8821C BIT(1) 4801 #define BIT_FS_RPWM_INT_EN_8821C BIT(0) 4802 4803 /* 2 REG_FT1ISR_8821C */ 4804 #define BIT__FT2ISR__IND_INT_8821C BIT(30) 4805 #define BIT_FTM_PTT_INT_8821C BIT(29) 4806 #define BIT_RXFTMREQ_INT_8821C BIT(28) 4807 #define BIT_RXFTM_INT_8821C BIT(27) 4808 #define BIT_TXFTM_INT_8821C BIT(26) 4809 #define BIT_FS_H2C_CMD_OK_INT_8821C BIT(25) 4810 #define BIT_FS_H2C_CMD_FULL_INT_8821C BIT(24) 4811 #define BIT_FS_MACID_PWRCHANGE5_INT_8821C BIT(23) 4812 #define BIT_FS_MACID_PWRCHANGE4_INT_8821C BIT(22) 4813 #define BIT_FS_MACID_PWRCHANGE3_INT_8821C BIT(21) 4814 #define BIT_FS_MACID_PWRCHANGE2_INT_8821C BIT(20) 4815 #define BIT_FS_MACID_PWRCHANGE1_INT_8821C BIT(19) 4816 #define BIT_FS_MACID_PWRCHANGE0_INT_8821C BIT(18) 4817 #define BIT_FS_CTWEND2_INT_8821C BIT(17) 4818 #define BIT_FS_CTWEND1_INT_8821C BIT(16) 4819 #define BIT_FS_CTWEND0_INT_8821C BIT(15) 4820 #define BIT_FS_TX_NULL1_INT_8821C BIT(14) 4821 #define BIT_FS_TX_NULL0_INT_8821C BIT(13) 4822 #define BIT_FS_TSF_BIT32_TOGGLE_INT_8821C BIT(12) 4823 #define BIT_FS_P2P_RFON2_INT_8821C BIT(11) 4824 #define BIT_FS_P2P_RFOFF2_INT_8821C BIT(10) 4825 #define BIT_FS_P2P_RFON1_INT_8821C BIT(9) 4826 #define BIT_FS_P2P_RFOFF1_INT_8821C BIT(8) 4827 #define BIT_FS_P2P_RFON0_INT_8821C BIT(7) 4828 #define BIT_FS_P2P_RFOFF0_INT_8821C BIT(6) 4829 #define BIT_FS_RX_UAPSDMD1_INT_8821C BIT(5) 4830 #define BIT_FS_RX_UAPSDMD0_INT_8821C BIT(4) 4831 #define BIT_FS_TRIGGER_PKT_INT_8821C BIT(3) 4832 #define BIT_FS_EOSP_INT_8821C BIT(2) 4833 #define BIT_FS_RPWM2_INT_8821C BIT(1) 4834 #define BIT_FS_RPWM_INT_8821C BIT(0) 4835 4836 /* 2 REG_SPWR0_8821C */ 4837 4838 #define BIT_SHIFT_MID_31TO0_8821C 0 4839 #define BIT_MASK_MID_31TO0_8821C 0xffffffffL 4840 #define BIT_MID_31TO0_8821C(x) \ 4841 (((x) & BIT_MASK_MID_31TO0_8821C) << BIT_SHIFT_MID_31TO0_8821C) 4842 #define BITS_MID_31TO0_8821C \ 4843 (BIT_MASK_MID_31TO0_8821C << BIT_SHIFT_MID_31TO0_8821C) 4844 #define BIT_CLEAR_MID_31TO0_8821C(x) ((x) & (~BITS_MID_31TO0_8821C)) 4845 #define BIT_GET_MID_31TO0_8821C(x) \ 4846 (((x) >> BIT_SHIFT_MID_31TO0_8821C) & BIT_MASK_MID_31TO0_8821C) 4847 #define BIT_SET_MID_31TO0_8821C(x, v) \ 4848 (BIT_CLEAR_MID_31TO0_8821C(x) | BIT_MID_31TO0_8821C(v)) 4849 4850 /* 2 REG_SPWR1_8821C */ 4851 4852 #define BIT_SHIFT_MID_63TO32_8821C 0 4853 #define BIT_MASK_MID_63TO32_8821C 0xffffffffL 4854 #define BIT_MID_63TO32_8821C(x) \ 4855 (((x) & BIT_MASK_MID_63TO32_8821C) << BIT_SHIFT_MID_63TO32_8821C) 4856 #define BITS_MID_63TO32_8821C \ 4857 (BIT_MASK_MID_63TO32_8821C << BIT_SHIFT_MID_63TO32_8821C) 4858 #define BIT_CLEAR_MID_63TO32_8821C(x) ((x) & (~BITS_MID_63TO32_8821C)) 4859 #define BIT_GET_MID_63TO32_8821C(x) \ 4860 (((x) >> BIT_SHIFT_MID_63TO32_8821C) & BIT_MASK_MID_63TO32_8821C) 4861 #define BIT_SET_MID_63TO32_8821C(x, v) \ 4862 (BIT_CLEAR_MID_63TO32_8821C(x) | BIT_MID_63TO32_8821C(v)) 4863 4864 /* 2 REG_SPWR2_8821C */ 4865 4866 #define BIT_SHIFT_MID_95O64_8821C 0 4867 #define BIT_MASK_MID_95O64_8821C 0xffffffffL 4868 #define BIT_MID_95O64_8821C(x) \ 4869 (((x) & BIT_MASK_MID_95O64_8821C) << BIT_SHIFT_MID_95O64_8821C) 4870 #define BITS_MID_95O64_8821C \ 4871 (BIT_MASK_MID_95O64_8821C << BIT_SHIFT_MID_95O64_8821C) 4872 #define BIT_CLEAR_MID_95O64_8821C(x) ((x) & (~BITS_MID_95O64_8821C)) 4873 #define BIT_GET_MID_95O64_8821C(x) \ 4874 (((x) >> BIT_SHIFT_MID_95O64_8821C) & BIT_MASK_MID_95O64_8821C) 4875 #define BIT_SET_MID_95O64_8821C(x, v) \ 4876 (BIT_CLEAR_MID_95O64_8821C(x) | BIT_MID_95O64_8821C(v)) 4877 4878 /* 2 REG_SPWR3_8821C */ 4879 4880 #define BIT_SHIFT_MID_127TO96_8821C 0 4881 #define BIT_MASK_MID_127TO96_8821C 0xffffffffL 4882 #define BIT_MID_127TO96_8821C(x) \ 4883 (((x) & BIT_MASK_MID_127TO96_8821C) << BIT_SHIFT_MID_127TO96_8821C) 4884 #define BITS_MID_127TO96_8821C \ 4885 (BIT_MASK_MID_127TO96_8821C << BIT_SHIFT_MID_127TO96_8821C) 4886 #define BIT_CLEAR_MID_127TO96_8821C(x) ((x) & (~BITS_MID_127TO96_8821C)) 4887 #define BIT_GET_MID_127TO96_8821C(x) \ 4888 (((x) >> BIT_SHIFT_MID_127TO96_8821C) & BIT_MASK_MID_127TO96_8821C) 4889 #define BIT_SET_MID_127TO96_8821C(x, v) \ 4890 (BIT_CLEAR_MID_127TO96_8821C(x) | BIT_MID_127TO96_8821C(v)) 4891 4892 /* 2 REG_POWSEQ_8821C */ 4893 4894 #define BIT_SHIFT_SEQNUM_MID_8821C 16 4895 #define BIT_MASK_SEQNUM_MID_8821C 0xffff 4896 #define BIT_SEQNUM_MID_8821C(x) \ 4897 (((x) & BIT_MASK_SEQNUM_MID_8821C) << BIT_SHIFT_SEQNUM_MID_8821C) 4898 #define BITS_SEQNUM_MID_8821C \ 4899 (BIT_MASK_SEQNUM_MID_8821C << BIT_SHIFT_SEQNUM_MID_8821C) 4900 #define BIT_CLEAR_SEQNUM_MID_8821C(x) ((x) & (~BITS_SEQNUM_MID_8821C)) 4901 #define BIT_GET_SEQNUM_MID_8821C(x) \ 4902 (((x) >> BIT_SHIFT_SEQNUM_MID_8821C) & BIT_MASK_SEQNUM_MID_8821C) 4903 #define BIT_SET_SEQNUM_MID_8821C(x, v) \ 4904 (BIT_CLEAR_SEQNUM_MID_8821C(x) | BIT_SEQNUM_MID_8821C(v)) 4905 4906 #define BIT_SHIFT_REF_MID_8821C 0 4907 #define BIT_MASK_REF_MID_8821C 0x7f 4908 #define BIT_REF_MID_8821C(x) \ 4909 (((x) & BIT_MASK_REF_MID_8821C) << BIT_SHIFT_REF_MID_8821C) 4910 #define BITS_REF_MID_8821C (BIT_MASK_REF_MID_8821C << BIT_SHIFT_REF_MID_8821C) 4911 #define BIT_CLEAR_REF_MID_8821C(x) ((x) & (~BITS_REF_MID_8821C)) 4912 #define BIT_GET_REF_MID_8821C(x) \ 4913 (((x) >> BIT_SHIFT_REF_MID_8821C) & BIT_MASK_REF_MID_8821C) 4914 #define BIT_SET_REF_MID_8821C(x, v) \ 4915 (BIT_CLEAR_REF_MID_8821C(x) | BIT_REF_MID_8821C(v)) 4916 4917 /* 2 REG_NOT_VALID_8821C */ 4918 4919 /* 2 REG_TC7_CTRL_V1_8821C */ 4920 #define BIT_TC7INT_EN_8821C BIT(26) 4921 #define BIT_TC7MODE_8821C BIT(25) 4922 #define BIT_TC7EN_8821C BIT(24) 4923 4924 #define BIT_SHIFT_TC7DATA_8821C 0 4925 #define BIT_MASK_TC7DATA_8821C 0xffffff 4926 #define BIT_TC7DATA_8821C(x) \ 4927 (((x) & BIT_MASK_TC7DATA_8821C) << BIT_SHIFT_TC7DATA_8821C) 4928 #define BITS_TC7DATA_8821C (BIT_MASK_TC7DATA_8821C << BIT_SHIFT_TC7DATA_8821C) 4929 #define BIT_CLEAR_TC7DATA_8821C(x) ((x) & (~BITS_TC7DATA_8821C)) 4930 #define BIT_GET_TC7DATA_8821C(x) \ 4931 (((x) >> BIT_SHIFT_TC7DATA_8821C) & BIT_MASK_TC7DATA_8821C) 4932 #define BIT_SET_TC7DATA_8821C(x, v) \ 4933 (BIT_CLEAR_TC7DATA_8821C(x) | BIT_TC7DATA_8821C(v)) 4934 4935 /* 2 REG_TC8_CTRL_V1_8821C */ 4936 #define BIT_TC8INT_EN_8821C BIT(26) 4937 #define BIT_TC8MODE_8821C BIT(25) 4938 #define BIT_TC8EN_8821C BIT(24) 4939 4940 #define BIT_SHIFT_TC8DATA_8821C 0 4941 #define BIT_MASK_TC8DATA_8821C 0xffffff 4942 #define BIT_TC8DATA_8821C(x) \ 4943 (((x) & BIT_MASK_TC8DATA_8821C) << BIT_SHIFT_TC8DATA_8821C) 4944 #define BITS_TC8DATA_8821C (BIT_MASK_TC8DATA_8821C << BIT_SHIFT_TC8DATA_8821C) 4945 #define BIT_CLEAR_TC8DATA_8821C(x) ((x) & (~BITS_TC8DATA_8821C)) 4946 #define BIT_GET_TC8DATA_8821C(x) \ 4947 (((x) >> BIT_SHIFT_TC8DATA_8821C) & BIT_MASK_TC8DATA_8821C) 4948 #define BIT_SET_TC8DATA_8821C(x, v) \ 4949 (BIT_CLEAR_TC8DATA_8821C(x) | BIT_TC8DATA_8821C(v)) 4950 4951 /* 2 REG_RX_BCN_TBTT_ITVL0_8821C */ 4952 4953 #define BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT2_8821C 24 4954 #define BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT2_8821C 0xff 4955 #define BIT_RX_BCN_TBTT_ITVL_CLIENT2_8821C(x) \ 4956 (((x) & BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT2_8821C) \ 4957 << BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT2_8821C) 4958 #define BITS_RX_BCN_TBTT_ITVL_CLIENT2_8821C \ 4959 (BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT2_8821C \ 4960 << BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT2_8821C) 4961 #define BIT_CLEAR_RX_BCN_TBTT_ITVL_CLIENT2_8821C(x) \ 4962 ((x) & (~BITS_RX_BCN_TBTT_ITVL_CLIENT2_8821C)) 4963 #define BIT_GET_RX_BCN_TBTT_ITVL_CLIENT2_8821C(x) \ 4964 (((x) >> BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT2_8821C) & \ 4965 BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT2_8821C) 4966 #define BIT_SET_RX_BCN_TBTT_ITVL_CLIENT2_8821C(x, v) \ 4967 (BIT_CLEAR_RX_BCN_TBTT_ITVL_CLIENT2_8821C(x) | \ 4968 BIT_RX_BCN_TBTT_ITVL_CLIENT2_8821C(v)) 4969 4970 #define BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT1_8821C 16 4971 #define BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT1_8821C 0xff 4972 #define BIT_RX_BCN_TBTT_ITVL_CLIENT1_8821C(x) \ 4973 (((x) & BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT1_8821C) \ 4974 << BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT1_8821C) 4975 #define BITS_RX_BCN_TBTT_ITVL_CLIENT1_8821C \ 4976 (BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT1_8821C \ 4977 << BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT1_8821C) 4978 #define BIT_CLEAR_RX_BCN_TBTT_ITVL_CLIENT1_8821C(x) \ 4979 ((x) & (~BITS_RX_BCN_TBTT_ITVL_CLIENT1_8821C)) 4980 #define BIT_GET_RX_BCN_TBTT_ITVL_CLIENT1_8821C(x) \ 4981 (((x) >> BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT1_8821C) & \ 4982 BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT1_8821C) 4983 #define BIT_SET_RX_BCN_TBTT_ITVL_CLIENT1_8821C(x, v) \ 4984 (BIT_CLEAR_RX_BCN_TBTT_ITVL_CLIENT1_8821C(x) | \ 4985 BIT_RX_BCN_TBTT_ITVL_CLIENT1_8821C(v)) 4986 4987 #define BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT0_8821C 8 4988 #define BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT0_8821C 0xff 4989 #define BIT_RX_BCN_TBTT_ITVL_CLIENT0_8821C(x) \ 4990 (((x) & BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT0_8821C) \ 4991 << BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT0_8821C) 4992 #define BITS_RX_BCN_TBTT_ITVL_CLIENT0_8821C \ 4993 (BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT0_8821C \ 4994 << BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT0_8821C) 4995 #define BIT_CLEAR_RX_BCN_TBTT_ITVL_CLIENT0_8821C(x) \ 4996 ((x) & (~BITS_RX_BCN_TBTT_ITVL_CLIENT0_8821C)) 4997 #define BIT_GET_RX_BCN_TBTT_ITVL_CLIENT0_8821C(x) \ 4998 (((x) >> BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT0_8821C) & \ 4999 BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT0_8821C) 5000 #define BIT_SET_RX_BCN_TBTT_ITVL_CLIENT0_8821C(x, v) \ 5001 (BIT_CLEAR_RX_BCN_TBTT_ITVL_CLIENT0_8821C(x) | \ 5002 BIT_RX_BCN_TBTT_ITVL_CLIENT0_8821C(v)) 5003 5004 #define BIT_SHIFT_RX_BCN_TBTT_ITVL_PORT0_8821C 0 5005 #define BIT_MASK_RX_BCN_TBTT_ITVL_PORT0_8821C 0xff 5006 #define BIT_RX_BCN_TBTT_ITVL_PORT0_8821C(x) \ 5007 (((x) & BIT_MASK_RX_BCN_TBTT_ITVL_PORT0_8821C) \ 5008 << BIT_SHIFT_RX_BCN_TBTT_ITVL_PORT0_8821C) 5009 #define BITS_RX_BCN_TBTT_ITVL_PORT0_8821C \ 5010 (BIT_MASK_RX_BCN_TBTT_ITVL_PORT0_8821C \ 5011 << BIT_SHIFT_RX_BCN_TBTT_ITVL_PORT0_8821C) 5012 #define BIT_CLEAR_RX_BCN_TBTT_ITVL_PORT0_8821C(x) \ 5013 ((x) & (~BITS_RX_BCN_TBTT_ITVL_PORT0_8821C)) 5014 #define BIT_GET_RX_BCN_TBTT_ITVL_PORT0_8821C(x) \ 5015 (((x) >> BIT_SHIFT_RX_BCN_TBTT_ITVL_PORT0_8821C) & \ 5016 BIT_MASK_RX_BCN_TBTT_ITVL_PORT0_8821C) 5017 #define BIT_SET_RX_BCN_TBTT_ITVL_PORT0_8821C(x, v) \ 5018 (BIT_CLEAR_RX_BCN_TBTT_ITVL_PORT0_8821C(x) | \ 5019 BIT_RX_BCN_TBTT_ITVL_PORT0_8821C(v)) 5020 5021 /* 2 REG_RX_BCN_TBTT_ITVL1_8821C */ 5022 5023 #define BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT3_8821C 0 5024 #define BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT3_8821C 0xff 5025 #define BIT_RX_BCN_TBTT_ITVL_CLIENT3_8821C(x) \ 5026 (((x) & BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT3_8821C) \ 5027 << BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT3_8821C) 5028 #define BITS_RX_BCN_TBTT_ITVL_CLIENT3_8821C \ 5029 (BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT3_8821C \ 5030 << BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT3_8821C) 5031 #define BIT_CLEAR_RX_BCN_TBTT_ITVL_CLIENT3_8821C(x) \ 5032 ((x) & (~BITS_RX_BCN_TBTT_ITVL_CLIENT3_8821C)) 5033 #define BIT_GET_RX_BCN_TBTT_ITVL_CLIENT3_8821C(x) \ 5034 (((x) >> BIT_SHIFT_RX_BCN_TBTT_ITVL_CLIENT3_8821C) & \ 5035 BIT_MASK_RX_BCN_TBTT_ITVL_CLIENT3_8821C) 5036 #define BIT_SET_RX_BCN_TBTT_ITVL_CLIENT3_8821C(x, v) \ 5037 (BIT_CLEAR_RX_BCN_TBTT_ITVL_CLIENT3_8821C(x) | \ 5038 BIT_RX_BCN_TBTT_ITVL_CLIENT3_8821C(v)) 5039 5040 /* 2 REG_NOT_VALID_8821C */ 5041 5042 /* 2 REG_NOT_VALID_8821C */ 5043 5044 /* 2 REG_IO_WRAP_ERR_FLAG_8821C */ 5045 #define BIT_IO_WRAP_ERR_8821C BIT(0) 5046 5047 /* 2 REG_NOT_VALID_8821C */ 5048 5049 /* 2 REG_NOT_VALID_8821C */ 5050 5051 /* 2 REG_NOT_VALID_8821C */ 5052 5053 /* 2 REG_SPEED_SENSOR_8821C */ 5054 #define BIT_DSS_1_RST_N_8821C BIT(31) 5055 #define BIT_DSS_1_SPEED_EN_8821C BIT(30) 5056 #define BIT_DSS_1_WIRE_SEL_8821C BIT(29) 5057 #define BIT_DSS_ENCLK_8821C BIT(28) 5058 5059 #define BIT_SHIFT_DSS_1_RO_SEL_8821C 24 5060 #define BIT_MASK_DSS_1_RO_SEL_8821C 0x7 5061 #define BIT_DSS_1_RO_SEL_8821C(x) \ 5062 (((x) & BIT_MASK_DSS_1_RO_SEL_8821C) << BIT_SHIFT_DSS_1_RO_SEL_8821C) 5063 #define BITS_DSS_1_RO_SEL_8821C \ 5064 (BIT_MASK_DSS_1_RO_SEL_8821C << BIT_SHIFT_DSS_1_RO_SEL_8821C) 5065 #define BIT_CLEAR_DSS_1_RO_SEL_8821C(x) ((x) & (~BITS_DSS_1_RO_SEL_8821C)) 5066 #define BIT_GET_DSS_1_RO_SEL_8821C(x) \ 5067 (((x) >> BIT_SHIFT_DSS_1_RO_SEL_8821C) & BIT_MASK_DSS_1_RO_SEL_8821C) 5068 #define BIT_SET_DSS_1_RO_SEL_8821C(x, v) \ 5069 (BIT_CLEAR_DSS_1_RO_SEL_8821C(x) | BIT_DSS_1_RO_SEL_8821C(v)) 5070 5071 #define BIT_SHIFT_DSS_1_DATA_IN_8821C 0 5072 #define BIT_MASK_DSS_1_DATA_IN_8821C 0xfffff 5073 #define BIT_DSS_1_DATA_IN_8821C(x) \ 5074 (((x) & BIT_MASK_DSS_1_DATA_IN_8821C) << BIT_SHIFT_DSS_1_DATA_IN_8821C) 5075 #define BITS_DSS_1_DATA_IN_8821C \ 5076 (BIT_MASK_DSS_1_DATA_IN_8821C << BIT_SHIFT_DSS_1_DATA_IN_8821C) 5077 #define BIT_CLEAR_DSS_1_DATA_IN_8821C(x) ((x) & (~BITS_DSS_1_DATA_IN_8821C)) 5078 #define BIT_GET_DSS_1_DATA_IN_8821C(x) \ 5079 (((x) >> BIT_SHIFT_DSS_1_DATA_IN_8821C) & BIT_MASK_DSS_1_DATA_IN_8821C) 5080 #define BIT_SET_DSS_1_DATA_IN_8821C(x, v) \ 5081 (BIT_CLEAR_DSS_1_DATA_IN_8821C(x) | BIT_DSS_1_DATA_IN_8821C(v)) 5082 5083 /* 2 REG_SPEED_SENSOR1_8821C */ 5084 #define BIT_DSS_1_READY_8821C BIT(31) 5085 #define BIT_DSS_1_WSORT_GO_8821C BIT(30) 5086 5087 #define BIT_SHIFT_DSS_1_COUNT_OUT_8821C 0 5088 #define BIT_MASK_DSS_1_COUNT_OUT_8821C 0xfffff 5089 #define BIT_DSS_1_COUNT_OUT_8821C(x) \ 5090 (((x) & BIT_MASK_DSS_1_COUNT_OUT_8821C) \ 5091 << BIT_SHIFT_DSS_1_COUNT_OUT_8821C) 5092 #define BITS_DSS_1_COUNT_OUT_8821C \ 5093 (BIT_MASK_DSS_1_COUNT_OUT_8821C << BIT_SHIFT_DSS_1_COUNT_OUT_8821C) 5094 #define BIT_CLEAR_DSS_1_COUNT_OUT_8821C(x) ((x) & (~BITS_DSS_1_COUNT_OUT_8821C)) 5095 #define BIT_GET_DSS_1_COUNT_OUT_8821C(x) \ 5096 (((x) >> BIT_SHIFT_DSS_1_COUNT_OUT_8821C) & \ 5097 BIT_MASK_DSS_1_COUNT_OUT_8821C) 5098 #define BIT_SET_DSS_1_COUNT_OUT_8821C(x, v) \ 5099 (BIT_CLEAR_DSS_1_COUNT_OUT_8821C(x) | BIT_DSS_1_COUNT_OUT_8821C(v)) 5100 5101 /* 2 REG_SPEED_SENSOR2_8821C */ 5102 #define BIT_DSS_2_RST_N_8821C BIT(31) 5103 #define BIT_DSS_2_SPEED_EN_8821C BIT(30) 5104 #define BIT_DSS_2_WIRE_SEL_8821C BIT(29) 5105 #define BIT_DSS_ENCLK_8821C BIT(28) 5106 5107 #define BIT_SHIFT_DSS_2_RO_SEL_8821C 24 5108 #define BIT_MASK_DSS_2_RO_SEL_8821C 0x7 5109 #define BIT_DSS_2_RO_SEL_8821C(x) \ 5110 (((x) & BIT_MASK_DSS_2_RO_SEL_8821C) << BIT_SHIFT_DSS_2_RO_SEL_8821C) 5111 #define BITS_DSS_2_RO_SEL_8821C \ 5112 (BIT_MASK_DSS_2_RO_SEL_8821C << BIT_SHIFT_DSS_2_RO_SEL_8821C) 5113 #define BIT_CLEAR_DSS_2_RO_SEL_8821C(x) ((x) & (~BITS_DSS_2_RO_SEL_8821C)) 5114 #define BIT_GET_DSS_2_RO_SEL_8821C(x) \ 5115 (((x) >> BIT_SHIFT_DSS_2_RO_SEL_8821C) & BIT_MASK_DSS_2_RO_SEL_8821C) 5116 #define BIT_SET_DSS_2_RO_SEL_8821C(x, v) \ 5117 (BIT_CLEAR_DSS_2_RO_SEL_8821C(x) | BIT_DSS_2_RO_SEL_8821C(v)) 5118 5119 #define BIT_SHIFT_DSS_2_DATA_IN_8821C 0 5120 #define BIT_MASK_DSS_2_DATA_IN_8821C 0xfffff 5121 #define BIT_DSS_2_DATA_IN_8821C(x) \ 5122 (((x) & BIT_MASK_DSS_2_DATA_IN_8821C) << BIT_SHIFT_DSS_2_DATA_IN_8821C) 5123 #define BITS_DSS_2_DATA_IN_8821C \ 5124 (BIT_MASK_DSS_2_DATA_IN_8821C << BIT_SHIFT_DSS_2_DATA_IN_8821C) 5125 #define BIT_CLEAR_DSS_2_DATA_IN_8821C(x) ((x) & (~BITS_DSS_2_DATA_IN_8821C)) 5126 #define BIT_GET_DSS_2_DATA_IN_8821C(x) \ 5127 (((x) >> BIT_SHIFT_DSS_2_DATA_IN_8821C) & BIT_MASK_DSS_2_DATA_IN_8821C) 5128 #define BIT_SET_DSS_2_DATA_IN_8821C(x, v) \ 5129 (BIT_CLEAR_DSS_2_DATA_IN_8821C(x) | BIT_DSS_2_DATA_IN_8821C(v)) 5130 5131 /* 2 REG_SPEED_SENSOR3_8821C */ 5132 #define BIT_DSS_2_READY_8821C BIT(31) 5133 #define BIT_DSS_2_WSORT_GO_8821C BIT(30) 5134 5135 #define BIT_SHIFT_DSS_2_COUNT_OUT_8821C 0 5136 #define BIT_MASK_DSS_2_COUNT_OUT_8821C 0xfffff 5137 #define BIT_DSS_2_COUNT_OUT_8821C(x) \ 5138 (((x) & BIT_MASK_DSS_2_COUNT_OUT_8821C) \ 5139 << BIT_SHIFT_DSS_2_COUNT_OUT_8821C) 5140 #define BITS_DSS_2_COUNT_OUT_8821C \ 5141 (BIT_MASK_DSS_2_COUNT_OUT_8821C << BIT_SHIFT_DSS_2_COUNT_OUT_8821C) 5142 #define BIT_CLEAR_DSS_2_COUNT_OUT_8821C(x) ((x) & (~BITS_DSS_2_COUNT_OUT_8821C)) 5143 #define BIT_GET_DSS_2_COUNT_OUT_8821C(x) \ 5144 (((x) >> BIT_SHIFT_DSS_2_COUNT_OUT_8821C) & \ 5145 BIT_MASK_DSS_2_COUNT_OUT_8821C) 5146 #define BIT_SET_DSS_2_COUNT_OUT_8821C(x, v) \ 5147 (BIT_CLEAR_DSS_2_COUNT_OUT_8821C(x) | BIT_DSS_2_COUNT_OUT_8821C(v)) 5148 5149 /* 2 REG_SPEED_SENSOR4_8821C */ 5150 #define BIT_DSS_3_RST_N_8821C BIT(31) 5151 #define BIT_DSS_3_SPEED_EN_8821C BIT(30) 5152 #define BIT_DSS_3_WIRE_SEL_8821C BIT(29) 5153 #define BIT_DSS_ENCLK_8821C BIT(28) 5154 5155 #define BIT_SHIFT_DSS_3_RO_SEL_8821C 24 5156 #define BIT_MASK_DSS_3_RO_SEL_8821C 0x7 5157 #define BIT_DSS_3_RO_SEL_8821C(x) \ 5158 (((x) & BIT_MASK_DSS_3_RO_SEL_8821C) << BIT_SHIFT_DSS_3_RO_SEL_8821C) 5159 #define BITS_DSS_3_RO_SEL_8821C \ 5160 (BIT_MASK_DSS_3_RO_SEL_8821C << BIT_SHIFT_DSS_3_RO_SEL_8821C) 5161 #define BIT_CLEAR_DSS_3_RO_SEL_8821C(x) ((x) & (~BITS_DSS_3_RO_SEL_8821C)) 5162 #define BIT_GET_DSS_3_RO_SEL_8821C(x) \ 5163 (((x) >> BIT_SHIFT_DSS_3_RO_SEL_8821C) & BIT_MASK_DSS_3_RO_SEL_8821C) 5164 #define BIT_SET_DSS_3_RO_SEL_8821C(x, v) \ 5165 (BIT_CLEAR_DSS_3_RO_SEL_8821C(x) | BIT_DSS_3_RO_SEL_8821C(v)) 5166 5167 #define BIT_SHIFT_DSS_3_DATA_IN_8821C 0 5168 #define BIT_MASK_DSS_3_DATA_IN_8821C 0xfffff 5169 #define BIT_DSS_3_DATA_IN_8821C(x) \ 5170 (((x) & BIT_MASK_DSS_3_DATA_IN_8821C) << BIT_SHIFT_DSS_3_DATA_IN_8821C) 5171 #define BITS_DSS_3_DATA_IN_8821C \ 5172 (BIT_MASK_DSS_3_DATA_IN_8821C << BIT_SHIFT_DSS_3_DATA_IN_8821C) 5173 #define BIT_CLEAR_DSS_3_DATA_IN_8821C(x) ((x) & (~BITS_DSS_3_DATA_IN_8821C)) 5174 #define BIT_GET_DSS_3_DATA_IN_8821C(x) \ 5175 (((x) >> BIT_SHIFT_DSS_3_DATA_IN_8821C) & BIT_MASK_DSS_3_DATA_IN_8821C) 5176 #define BIT_SET_DSS_3_DATA_IN_8821C(x, v) \ 5177 (BIT_CLEAR_DSS_3_DATA_IN_8821C(x) | BIT_DSS_3_DATA_IN_8821C(v)) 5178 5179 /* 2 REG_SPEED_SENSOR5_8821C */ 5180 #define BIT_DSS_3_READY_8821C BIT(31) 5181 #define BIT_DSS_3_WSORT_GO_8821C BIT(30) 5182 5183 #define BIT_SHIFT_DSS_3_COUNT_OUT_8821C 0 5184 #define BIT_MASK_DSS_3_COUNT_OUT_8821C 0xfffff 5185 #define BIT_DSS_3_COUNT_OUT_8821C(x) \ 5186 (((x) & BIT_MASK_DSS_3_COUNT_OUT_8821C) \ 5187 << BIT_SHIFT_DSS_3_COUNT_OUT_8821C) 5188 #define BITS_DSS_3_COUNT_OUT_8821C \ 5189 (BIT_MASK_DSS_3_COUNT_OUT_8821C << BIT_SHIFT_DSS_3_COUNT_OUT_8821C) 5190 #define BIT_CLEAR_DSS_3_COUNT_OUT_8821C(x) ((x) & (~BITS_DSS_3_COUNT_OUT_8821C)) 5191 #define BIT_GET_DSS_3_COUNT_OUT_8821C(x) \ 5192 (((x) >> BIT_SHIFT_DSS_3_COUNT_OUT_8821C) & \ 5193 BIT_MASK_DSS_3_COUNT_OUT_8821C) 5194 #define BIT_SET_DSS_3_COUNT_OUT_8821C(x, v) \ 5195 (BIT_CLEAR_DSS_3_COUNT_OUT_8821C(x) | BIT_DSS_3_COUNT_OUT_8821C(v)) 5196 5197 /* 2 REG_NOT_VALID_8821C */ 5198 5199 /* 2 REG_NOT_VALID_8821C */ 5200 5201 /* 2 REG_NOT_VALID_8821C */ 5202 5203 /* 2 REG_NOT_VALID_8821C */ 5204 5205 /* 2 REG_NOT_VALID_8821C */ 5206 5207 /* 2 REG_NOT_VALID_8821C */ 5208 5209 /* 2 REG_NOT_VALID_8821C */ 5210 5211 /* 2 REG_NOT_VALID_8821C */ 5212 5213 /* 2 REG_NOT_VALID_8821C */ 5214 5215 /* 2 REG_NOT_VALID_8821C */ 5216 5217 /* 2 REG_NOT_VALID_8821C */ 5218 5219 /* 2 REG_COUNTER_CTRL_8821C */ 5220 5221 #define BIT_SHIFT_COUNTER_BASE_8821C 16 5222 #define BIT_MASK_COUNTER_BASE_8821C 0x1fff 5223 #define BIT_COUNTER_BASE_8821C(x) \ 5224 (((x) & BIT_MASK_COUNTER_BASE_8821C) << BIT_SHIFT_COUNTER_BASE_8821C) 5225 #define BITS_COUNTER_BASE_8821C \ 5226 (BIT_MASK_COUNTER_BASE_8821C << BIT_SHIFT_COUNTER_BASE_8821C) 5227 #define BIT_CLEAR_COUNTER_BASE_8821C(x) ((x) & (~BITS_COUNTER_BASE_8821C)) 5228 #define BIT_GET_COUNTER_BASE_8821C(x) \ 5229 (((x) >> BIT_SHIFT_COUNTER_BASE_8821C) & BIT_MASK_COUNTER_BASE_8821C) 5230 #define BIT_SET_COUNTER_BASE_8821C(x, v) \ 5231 (BIT_CLEAR_COUNTER_BASE_8821C(x) | BIT_COUNTER_BASE_8821C(v)) 5232 5233 #define BIT_EN_RTS_REQ_8821C BIT(9) 5234 #define BIT_EN_EDCA_REQ_8821C BIT(8) 5235 #define BIT_EN_PTCL_REQ_8821C BIT(7) 5236 #define BIT_EN_SCH_REQ_8821C BIT(6) 5237 #define BIT_USB_COUNT_EN_8821C BIT(5) 5238 #define BIT_PCIE_COUNT_EN_8821C BIT(4) 5239 #define BIT_RQPN_COUNT_EN_8821C BIT(3) 5240 #define BIT_RDE_COUNT_EN_8821C BIT(2) 5241 #define BIT_TDE_COUNT_EN_8821C BIT(1) 5242 #define BIT_DISABLE_COUNTER_8821C BIT(0) 5243 5244 /* 2 REG_COUNTER_THRESHOLD_8821C */ 5245 #define BIT_SEL_ALL_MACID_8821C BIT(31) 5246 5247 #define BIT_SHIFT_COUNTER_MACID_8821C 24 5248 #define BIT_MASK_COUNTER_MACID_8821C 0x7f 5249 #define BIT_COUNTER_MACID_8821C(x) \ 5250 (((x) & BIT_MASK_COUNTER_MACID_8821C) << BIT_SHIFT_COUNTER_MACID_8821C) 5251 #define BITS_COUNTER_MACID_8821C \ 5252 (BIT_MASK_COUNTER_MACID_8821C << BIT_SHIFT_COUNTER_MACID_8821C) 5253 #define BIT_CLEAR_COUNTER_MACID_8821C(x) ((x) & (~BITS_COUNTER_MACID_8821C)) 5254 #define BIT_GET_COUNTER_MACID_8821C(x) \ 5255 (((x) >> BIT_SHIFT_COUNTER_MACID_8821C) & BIT_MASK_COUNTER_MACID_8821C) 5256 #define BIT_SET_COUNTER_MACID_8821C(x, v) \ 5257 (BIT_CLEAR_COUNTER_MACID_8821C(x) | BIT_COUNTER_MACID_8821C(v)) 5258 5259 #define BIT_SHIFT_AGG_VALUE2_8821C 16 5260 #define BIT_MASK_AGG_VALUE2_8821C 0x7f 5261 #define BIT_AGG_VALUE2_8821C(x) \ 5262 (((x) & BIT_MASK_AGG_VALUE2_8821C) << BIT_SHIFT_AGG_VALUE2_8821C) 5263 #define BITS_AGG_VALUE2_8821C \ 5264 (BIT_MASK_AGG_VALUE2_8821C << BIT_SHIFT_AGG_VALUE2_8821C) 5265 #define BIT_CLEAR_AGG_VALUE2_8821C(x) ((x) & (~BITS_AGG_VALUE2_8821C)) 5266 #define BIT_GET_AGG_VALUE2_8821C(x) \ 5267 (((x) >> BIT_SHIFT_AGG_VALUE2_8821C) & BIT_MASK_AGG_VALUE2_8821C) 5268 #define BIT_SET_AGG_VALUE2_8821C(x, v) \ 5269 (BIT_CLEAR_AGG_VALUE2_8821C(x) | BIT_AGG_VALUE2_8821C(v)) 5270 5271 #define BIT_SHIFT_AGG_VALUE1_8821C 8 5272 #define BIT_MASK_AGG_VALUE1_8821C 0x7f 5273 #define BIT_AGG_VALUE1_8821C(x) \ 5274 (((x) & BIT_MASK_AGG_VALUE1_8821C) << BIT_SHIFT_AGG_VALUE1_8821C) 5275 #define BITS_AGG_VALUE1_8821C \ 5276 (BIT_MASK_AGG_VALUE1_8821C << BIT_SHIFT_AGG_VALUE1_8821C) 5277 #define BIT_CLEAR_AGG_VALUE1_8821C(x) ((x) & (~BITS_AGG_VALUE1_8821C)) 5278 #define BIT_GET_AGG_VALUE1_8821C(x) \ 5279 (((x) >> BIT_SHIFT_AGG_VALUE1_8821C) & BIT_MASK_AGG_VALUE1_8821C) 5280 #define BIT_SET_AGG_VALUE1_8821C(x, v) \ 5281 (BIT_CLEAR_AGG_VALUE1_8821C(x) | BIT_AGG_VALUE1_8821C(v)) 5282 5283 #define BIT_SHIFT_AGG_VALUE0_8821C 0 5284 #define BIT_MASK_AGG_VALUE0_8821C 0x7f 5285 #define BIT_AGG_VALUE0_8821C(x) \ 5286 (((x) & BIT_MASK_AGG_VALUE0_8821C) << BIT_SHIFT_AGG_VALUE0_8821C) 5287 #define BITS_AGG_VALUE0_8821C \ 5288 (BIT_MASK_AGG_VALUE0_8821C << BIT_SHIFT_AGG_VALUE0_8821C) 5289 #define BIT_CLEAR_AGG_VALUE0_8821C(x) ((x) & (~BITS_AGG_VALUE0_8821C)) 5290 #define BIT_GET_AGG_VALUE0_8821C(x) \ 5291 (((x) >> BIT_SHIFT_AGG_VALUE0_8821C) & BIT_MASK_AGG_VALUE0_8821C) 5292 #define BIT_SET_AGG_VALUE0_8821C(x, v) \ 5293 (BIT_CLEAR_AGG_VALUE0_8821C(x) | BIT_AGG_VALUE0_8821C(v)) 5294 5295 /* 2 REG_COUNTER_SET_8821C */ 5296 5297 #define BIT_SHIFT_REQUEST_RESET_8821C 16 5298 #define BIT_MASK_REQUEST_RESET_8821C 0xffff 5299 #define BIT_REQUEST_RESET_8821C(x) \ 5300 (((x) & BIT_MASK_REQUEST_RESET_8821C) << BIT_SHIFT_REQUEST_RESET_8821C) 5301 #define BITS_REQUEST_RESET_8821C \ 5302 (BIT_MASK_REQUEST_RESET_8821C << BIT_SHIFT_REQUEST_RESET_8821C) 5303 #define BIT_CLEAR_REQUEST_RESET_8821C(x) ((x) & (~BITS_REQUEST_RESET_8821C)) 5304 #define BIT_GET_REQUEST_RESET_8821C(x) \ 5305 (((x) >> BIT_SHIFT_REQUEST_RESET_8821C) & BIT_MASK_REQUEST_RESET_8821C) 5306 #define BIT_SET_REQUEST_RESET_8821C(x, v) \ 5307 (BIT_CLEAR_REQUEST_RESET_8821C(x) | BIT_REQUEST_RESET_8821C(v)) 5308 5309 #define BIT_SHIFT_REQUEST_START_8821C 0 5310 #define BIT_MASK_REQUEST_START_8821C 0xffff 5311 #define BIT_REQUEST_START_8821C(x) \ 5312 (((x) & BIT_MASK_REQUEST_START_8821C) << BIT_SHIFT_REQUEST_START_8821C) 5313 #define BITS_REQUEST_START_8821C \ 5314 (BIT_MASK_REQUEST_START_8821C << BIT_SHIFT_REQUEST_START_8821C) 5315 #define BIT_CLEAR_REQUEST_START_8821C(x) ((x) & (~BITS_REQUEST_START_8821C)) 5316 #define BIT_GET_REQUEST_START_8821C(x) \ 5317 (((x) >> BIT_SHIFT_REQUEST_START_8821C) & BIT_MASK_REQUEST_START_8821C) 5318 #define BIT_SET_REQUEST_START_8821C(x, v) \ 5319 (BIT_CLEAR_REQUEST_START_8821C(x) | BIT_REQUEST_START_8821C(v)) 5320 5321 /* 2 REG_COUNTER_OVERFLOW_8821C */ 5322 5323 #define BIT_SHIFT_CNT_OVF_REG_8821C 0 5324 #define BIT_MASK_CNT_OVF_REG_8821C 0xffff 5325 #define BIT_CNT_OVF_REG_8821C(x) \ 5326 (((x) & BIT_MASK_CNT_OVF_REG_8821C) << BIT_SHIFT_CNT_OVF_REG_8821C) 5327 #define BITS_CNT_OVF_REG_8821C \ 5328 (BIT_MASK_CNT_OVF_REG_8821C << BIT_SHIFT_CNT_OVF_REG_8821C) 5329 #define BIT_CLEAR_CNT_OVF_REG_8821C(x) ((x) & (~BITS_CNT_OVF_REG_8821C)) 5330 #define BIT_GET_CNT_OVF_REG_8821C(x) \ 5331 (((x) >> BIT_SHIFT_CNT_OVF_REG_8821C) & BIT_MASK_CNT_OVF_REG_8821C) 5332 #define BIT_SET_CNT_OVF_REG_8821C(x, v) \ 5333 (BIT_CLEAR_CNT_OVF_REG_8821C(x) | BIT_CNT_OVF_REG_8821C(v)) 5334 5335 /* 2 REG_TXDMA_LEN_THRESHOLD_8821C */ 5336 5337 #define BIT_SHIFT_TDE_LEN_TH1_8821C 16 5338 #define BIT_MASK_TDE_LEN_TH1_8821C 0xffff 5339 #define BIT_TDE_LEN_TH1_8821C(x) \ 5340 (((x) & BIT_MASK_TDE_LEN_TH1_8821C) << BIT_SHIFT_TDE_LEN_TH1_8821C) 5341 #define BITS_TDE_LEN_TH1_8821C \ 5342 (BIT_MASK_TDE_LEN_TH1_8821C << BIT_SHIFT_TDE_LEN_TH1_8821C) 5343 #define BIT_CLEAR_TDE_LEN_TH1_8821C(x) ((x) & (~BITS_TDE_LEN_TH1_8821C)) 5344 #define BIT_GET_TDE_LEN_TH1_8821C(x) \ 5345 (((x) >> BIT_SHIFT_TDE_LEN_TH1_8821C) & BIT_MASK_TDE_LEN_TH1_8821C) 5346 #define BIT_SET_TDE_LEN_TH1_8821C(x, v) \ 5347 (BIT_CLEAR_TDE_LEN_TH1_8821C(x) | BIT_TDE_LEN_TH1_8821C(v)) 5348 5349 #define BIT_SHIFT_TDE_LEN_TH0_8821C 0 5350 #define BIT_MASK_TDE_LEN_TH0_8821C 0xffff 5351 #define BIT_TDE_LEN_TH0_8821C(x) \ 5352 (((x) & BIT_MASK_TDE_LEN_TH0_8821C) << BIT_SHIFT_TDE_LEN_TH0_8821C) 5353 #define BITS_TDE_LEN_TH0_8821C \ 5354 (BIT_MASK_TDE_LEN_TH0_8821C << BIT_SHIFT_TDE_LEN_TH0_8821C) 5355 #define BIT_CLEAR_TDE_LEN_TH0_8821C(x) ((x) & (~BITS_TDE_LEN_TH0_8821C)) 5356 #define BIT_GET_TDE_LEN_TH0_8821C(x) \ 5357 (((x) >> BIT_SHIFT_TDE_LEN_TH0_8821C) & BIT_MASK_TDE_LEN_TH0_8821C) 5358 #define BIT_SET_TDE_LEN_TH0_8821C(x, v) \ 5359 (BIT_CLEAR_TDE_LEN_TH0_8821C(x) | BIT_TDE_LEN_TH0_8821C(v)) 5360 5361 /* 2 REG_RXDMA_LEN_THRESHOLD_8821C */ 5362 5363 #define BIT_SHIFT_RDE_LEN_TH1_8821C 16 5364 #define BIT_MASK_RDE_LEN_TH1_8821C 0xffff 5365 #define BIT_RDE_LEN_TH1_8821C(x) \ 5366 (((x) & BIT_MASK_RDE_LEN_TH1_8821C) << BIT_SHIFT_RDE_LEN_TH1_8821C) 5367 #define BITS_RDE_LEN_TH1_8821C \ 5368 (BIT_MASK_RDE_LEN_TH1_8821C << BIT_SHIFT_RDE_LEN_TH1_8821C) 5369 #define BIT_CLEAR_RDE_LEN_TH1_8821C(x) ((x) & (~BITS_RDE_LEN_TH1_8821C)) 5370 #define BIT_GET_RDE_LEN_TH1_8821C(x) \ 5371 (((x) >> BIT_SHIFT_RDE_LEN_TH1_8821C) & BIT_MASK_RDE_LEN_TH1_8821C) 5372 #define BIT_SET_RDE_LEN_TH1_8821C(x, v) \ 5373 (BIT_CLEAR_RDE_LEN_TH1_8821C(x) | BIT_RDE_LEN_TH1_8821C(v)) 5374 5375 #define BIT_SHIFT_RDE_LEN_TH0_8821C 0 5376 #define BIT_MASK_RDE_LEN_TH0_8821C 0xffff 5377 #define BIT_RDE_LEN_TH0_8821C(x) \ 5378 (((x) & BIT_MASK_RDE_LEN_TH0_8821C) << BIT_SHIFT_RDE_LEN_TH0_8821C) 5379 #define BITS_RDE_LEN_TH0_8821C \ 5380 (BIT_MASK_RDE_LEN_TH0_8821C << BIT_SHIFT_RDE_LEN_TH0_8821C) 5381 #define BIT_CLEAR_RDE_LEN_TH0_8821C(x) ((x) & (~BITS_RDE_LEN_TH0_8821C)) 5382 #define BIT_GET_RDE_LEN_TH0_8821C(x) \ 5383 (((x) >> BIT_SHIFT_RDE_LEN_TH0_8821C) & BIT_MASK_RDE_LEN_TH0_8821C) 5384 #define BIT_SET_RDE_LEN_TH0_8821C(x, v) \ 5385 (BIT_CLEAR_RDE_LEN_TH0_8821C(x) | BIT_RDE_LEN_TH0_8821C(v)) 5386 5387 /* 2 REG_PCIE_EXEC_TIME_THRESHOLD_8821C */ 5388 5389 #define BIT_SHIFT_COUNT_INT_SEL_8821C 16 5390 #define BIT_MASK_COUNT_INT_SEL_8821C 0x3 5391 #define BIT_COUNT_INT_SEL_8821C(x) \ 5392 (((x) & BIT_MASK_COUNT_INT_SEL_8821C) << BIT_SHIFT_COUNT_INT_SEL_8821C) 5393 #define BITS_COUNT_INT_SEL_8821C \ 5394 (BIT_MASK_COUNT_INT_SEL_8821C << BIT_SHIFT_COUNT_INT_SEL_8821C) 5395 #define BIT_CLEAR_COUNT_INT_SEL_8821C(x) ((x) & (~BITS_COUNT_INT_SEL_8821C)) 5396 #define BIT_GET_COUNT_INT_SEL_8821C(x) \ 5397 (((x) >> BIT_SHIFT_COUNT_INT_SEL_8821C) & BIT_MASK_COUNT_INT_SEL_8821C) 5398 #define BIT_SET_COUNT_INT_SEL_8821C(x, v) \ 5399 (BIT_CLEAR_COUNT_INT_SEL_8821C(x) | BIT_COUNT_INT_SEL_8821C(v)) 5400 5401 #define BIT_SHIFT_EXEC_TIME_TH_8821C 0 5402 #define BIT_MASK_EXEC_TIME_TH_8821C 0xffff 5403 #define BIT_EXEC_TIME_TH_8821C(x) \ 5404 (((x) & BIT_MASK_EXEC_TIME_TH_8821C) << BIT_SHIFT_EXEC_TIME_TH_8821C) 5405 #define BITS_EXEC_TIME_TH_8821C \ 5406 (BIT_MASK_EXEC_TIME_TH_8821C << BIT_SHIFT_EXEC_TIME_TH_8821C) 5407 #define BIT_CLEAR_EXEC_TIME_TH_8821C(x) ((x) & (~BITS_EXEC_TIME_TH_8821C)) 5408 #define BIT_GET_EXEC_TIME_TH_8821C(x) \ 5409 (((x) >> BIT_SHIFT_EXEC_TIME_TH_8821C) & BIT_MASK_EXEC_TIME_TH_8821C) 5410 #define BIT_SET_EXEC_TIME_TH_8821C(x, v) \ 5411 (BIT_CLEAR_EXEC_TIME_TH_8821C(x) | BIT_EXEC_TIME_TH_8821C(v)) 5412 5413 /* 2 REG_FT2IMR_8821C */ 5414 #define BIT_FS_CLI3_RX_UAPSDMD1_EN_8821C BIT(31) 5415 #define BIT_FS_CLI3_RX_UAPSDMD0_EN_8821C BIT(30) 5416 #define BIT_FS_CLI3_TRIGGER_PKT_EN_8821C BIT(29) 5417 #define BIT_FS_CLI3_EOSP_INT_EN_8821C BIT(28) 5418 #define BIT_FS_CLI2_RX_UAPSDMD1_EN_8821C BIT(27) 5419 #define BIT_FS_CLI2_RX_UAPSDMD0_EN_8821C BIT(26) 5420 #define BIT_FS_CLI2_TRIGGER_PKT_EN_8821C BIT(25) 5421 #define BIT_FS_CLI2_EOSP_INT_EN_8821C BIT(24) 5422 #define BIT_FS_CLI1_RX_UAPSDMD1_EN_8821C BIT(23) 5423 #define BIT_FS_CLI1_RX_UAPSDMD0_EN_8821C BIT(22) 5424 #define BIT_FS_CLI1_TRIGGER_PKT_EN_8821C BIT(21) 5425 #define BIT_FS_CLI1_EOSP_INT_EN_8821C BIT(20) 5426 #define BIT_FS_CLI0_RX_UAPSDMD1_EN_8821C BIT(19) 5427 #define BIT_FS_CLI0_RX_UAPSDMD0_EN_8821C BIT(18) 5428 #define BIT_FS_CLI0_TRIGGER_PKT_EN_8821C BIT(17) 5429 #define BIT_FS_CLI0_EOSP_INT_EN_8821C BIT(16) 5430 #define BIT_FS_TSF_BIT32_TOGGLE_P2P2_EN_8821C BIT(9) 5431 #define BIT_FS_TSF_BIT32_TOGGLE_P2P1_EN_8821C BIT(8) 5432 #define BIT_FS_CLI3_TX_NULL1_INT_EN_8821C BIT(7) 5433 #define BIT_FS_CLI3_TX_NULL0_INT_EN_8821C BIT(6) 5434 #define BIT_FS_CLI2_TX_NULL1_INT_EN_8821C BIT(5) 5435 #define BIT_FS_CLI2_TX_NULL0_INT_EN_8821C BIT(4) 5436 #define BIT_FS_CLI1_TX_NULL1_INT_EN_8821C BIT(3) 5437 #define BIT_FS_CLI1_TX_NULL0_INT_EN_8821C BIT(2) 5438 #define BIT_FS_CLI0_TX_NULL1_INT_EN_8821C BIT(1) 5439 #define BIT_FS_CLI0_TX_NULL0_INT_EN_8821C BIT(0) 5440 5441 /* 2 REG_FT2ISR_8821C */ 5442 #define BIT_FS_CLI3_RX_UAPSDMD1_INT_8821C BIT(31) 5443 #define BIT_FS_CLI3_RX_UAPSDMD0_INT_8821C BIT(30) 5444 #define BIT_FS_CLI3_TRIGGER_PKT_INT_8821C BIT(29) 5445 #define BIT_FS_CLI3_EOSP_INT_8821C BIT(28) 5446 #define BIT_FS_CLI2_RX_UAPSDMD1_INT_8821C BIT(27) 5447 #define BIT_FS_CLI2_RX_UAPSDMD0_INT_8821C BIT(26) 5448 #define BIT_FS_CLI2_TRIGGER_PKT_INT_8821C BIT(25) 5449 #define BIT_FS_CLI2_EOSP_INT_8821C BIT(24) 5450 #define BIT_FS_CLI1_RX_UAPSDMD1_INT_8821C BIT(23) 5451 #define BIT_FS_CLI1_RX_UAPSDMD0_INT_8821C BIT(22) 5452 #define BIT_FS_CLI1_TRIGGER_PKT_INT_8821C BIT(21) 5453 #define BIT_FS_CLI1_EOSP_INT_8821C BIT(20) 5454 #define BIT_FS_CLI0_RX_UAPSDMD1_INT_8821C BIT(19) 5455 #define BIT_FS_CLI0_RX_UAPSDMD0_INT_8821C BIT(18) 5456 #define BIT_FS_CLI0_TRIGGER_PKT_INT_8821C BIT(17) 5457 #define BIT_FS_CLI0_EOSP_INT_8821C BIT(16) 5458 #define BIT_FS_TSF_BIT32_TOGGLE_P2P2_INT_8821C BIT(9) 5459 #define BIT_FS_TSF_BIT32_TOGGLE_P2P1_INT_8821C BIT(8) 5460 #define BIT_FS_CLI3_TX_NULL1_INT_8821C BIT(7) 5461 #define BIT_FS_CLI3_TX_NULL0_INT_8821C BIT(6) 5462 #define BIT_FS_CLI2_TX_NULL1_INT_8821C BIT(5) 5463 #define BIT_FS_CLI2_TX_NULL0_INT_8821C BIT(4) 5464 #define BIT_FS_CLI1_TX_NULL1_INT_8821C BIT(3) 5465 #define BIT_FS_CLI1_TX_NULL0_INT_8821C BIT(2) 5466 #define BIT_FS_CLI0_TX_NULL1_INT_8821C BIT(1) 5467 #define BIT_FS_CLI0_TX_NULL0_INT_8821C BIT(0) 5468 5469 /* 2 REG_NOT_VALID_8821C */ 5470 5471 /* 2 REG_NOT_VALID_8821C */ 5472 5473 /* 2 REG_MSG2_8821C */ 5474 5475 #define BIT_SHIFT_FW_MSG2_8821C 0 5476 #define BIT_MASK_FW_MSG2_8821C 0xffffffffL 5477 #define BIT_FW_MSG2_8821C(x) \ 5478 (((x) & BIT_MASK_FW_MSG2_8821C) << BIT_SHIFT_FW_MSG2_8821C) 5479 #define BITS_FW_MSG2_8821C (BIT_MASK_FW_MSG2_8821C << BIT_SHIFT_FW_MSG2_8821C) 5480 #define BIT_CLEAR_FW_MSG2_8821C(x) ((x) & (~BITS_FW_MSG2_8821C)) 5481 #define BIT_GET_FW_MSG2_8821C(x) \ 5482 (((x) >> BIT_SHIFT_FW_MSG2_8821C) & BIT_MASK_FW_MSG2_8821C) 5483 #define BIT_SET_FW_MSG2_8821C(x, v) \ 5484 (BIT_CLEAR_FW_MSG2_8821C(x) | BIT_FW_MSG2_8821C(v)) 5485 5486 /* 2 REG_MSG3_8821C */ 5487 5488 #define BIT_SHIFT_FW_MSG3_8821C 0 5489 #define BIT_MASK_FW_MSG3_8821C 0xffffffffL 5490 #define BIT_FW_MSG3_8821C(x) \ 5491 (((x) & BIT_MASK_FW_MSG3_8821C) << BIT_SHIFT_FW_MSG3_8821C) 5492 #define BITS_FW_MSG3_8821C (BIT_MASK_FW_MSG3_8821C << BIT_SHIFT_FW_MSG3_8821C) 5493 #define BIT_CLEAR_FW_MSG3_8821C(x) ((x) & (~BITS_FW_MSG3_8821C)) 5494 #define BIT_GET_FW_MSG3_8821C(x) \ 5495 (((x) >> BIT_SHIFT_FW_MSG3_8821C) & BIT_MASK_FW_MSG3_8821C) 5496 #define BIT_SET_FW_MSG3_8821C(x, v) \ 5497 (BIT_CLEAR_FW_MSG3_8821C(x) | BIT_FW_MSG3_8821C(v)) 5498 5499 /* 2 REG_MSG4_8821C */ 5500 5501 #define BIT_SHIFT_FW_MSG4_8821C 0 5502 #define BIT_MASK_FW_MSG4_8821C 0xffffffffL 5503 #define BIT_FW_MSG4_8821C(x) \ 5504 (((x) & BIT_MASK_FW_MSG4_8821C) << BIT_SHIFT_FW_MSG4_8821C) 5505 #define BITS_FW_MSG4_8821C (BIT_MASK_FW_MSG4_8821C << BIT_SHIFT_FW_MSG4_8821C) 5506 #define BIT_CLEAR_FW_MSG4_8821C(x) ((x) & (~BITS_FW_MSG4_8821C)) 5507 #define BIT_GET_FW_MSG4_8821C(x) \ 5508 (((x) >> BIT_SHIFT_FW_MSG4_8821C) & BIT_MASK_FW_MSG4_8821C) 5509 #define BIT_SET_FW_MSG4_8821C(x, v) \ 5510 (BIT_CLEAR_FW_MSG4_8821C(x) | BIT_FW_MSG4_8821C(v)) 5511 5512 /* 2 REG_MSG5_8821C */ 5513 5514 #define BIT_SHIFT_FW_MSG5_8821C 0 5515 #define BIT_MASK_FW_MSG5_8821C 0xffffffffL 5516 #define BIT_FW_MSG5_8821C(x) \ 5517 (((x) & BIT_MASK_FW_MSG5_8821C) << BIT_SHIFT_FW_MSG5_8821C) 5518 #define BITS_FW_MSG5_8821C (BIT_MASK_FW_MSG5_8821C << BIT_SHIFT_FW_MSG5_8821C) 5519 #define BIT_CLEAR_FW_MSG5_8821C(x) ((x) & (~BITS_FW_MSG5_8821C)) 5520 #define BIT_GET_FW_MSG5_8821C(x) \ 5521 (((x) >> BIT_SHIFT_FW_MSG5_8821C) & BIT_MASK_FW_MSG5_8821C) 5522 #define BIT_SET_FW_MSG5_8821C(x, v) \ 5523 (BIT_CLEAR_FW_MSG5_8821C(x) | BIT_FW_MSG5_8821C(v)) 5524 5525 /* 2 REG_NOT_VALID_8821C */ 5526 5527 /* 2 REG_NOT_VALID_8821C */ 5528 5529 /* 2 REG_NOT_VALID_8821C */ 5530 5531 /* 2 REG_NOT_VALID_8821C */ 5532 5533 /* 2 REG_NOT_VALID_8821C */ 5534 5535 /* 2 REG_NOT_VALID_8821C */ 5536 5537 /* 2 REG_NOT_VALID_8821C */ 5538 5539 /* 2 REG_NOT_VALID_8821C */ 5540 5541 /* 2 REG_NOT_VALID_8821C */ 5542 5543 /* 2 REG_NOT_VALID_8821C */ 5544 5545 /* 2 REG_NOT_VALID_8821C */ 5546 5547 /* 2 REG_NOT_VALID_8821C */ 5548 5549 /* 2 REG_NOT_VALID_8821C */ 5550 5551 /* 2 REG_NOT_VALID_8821C */ 5552 5553 /* 2 REG_NOT_VALID_8821C */ 5554 5555 /* 2 REG_NOT_VALID_8821C */ 5556 5557 /* 2 REG_NOT_VALID_8821C */ 5558 5559 /* 2 REG_NOT_VALID_8821C */ 5560 5561 /* 2 REG_NOT_VALID_8821C */ 5562 5563 /* 2 REG_NOT_VALID_8821C */ 5564 5565 /* 2 REG_NOT_VALID_8821C */ 5566 5567 /* 2 REG_NOT_VALID_8821C */ 5568 5569 /* 2 REG_NOT_VALID_8821C */ 5570 5571 /* 2 REG_NOT_VALID_8821C */ 5572 5573 /* 2 REG_NOT_VALID_8821C */ 5574 5575 /* 2 REG_NOT_VALID_8821C */ 5576 5577 /* 2 REG_NOT_VALID_8821C */ 5578 5579 /* 2 REG_NOT_VALID_8821C */ 5580 5581 /* 2 REG_NOT_VALID_8821C */ 5582 5583 /* 2 REG_NOT_VALID_8821C */ 5584 5585 /* 2 REG_NOT_VALID_8821C */ 5586 5587 /* 2 REG_NOT_VALID_8821C */ 5588 5589 /* 2 REG_NOT_VALID_8821C */ 5590 5591 /* 2 REG_NOT_VALID_8821C */ 5592 5593 /* 2 REG_NOT_VALID_8821C */ 5594 5595 /* 2 REG_NOT_VALID_8821C */ 5596 5597 /* 2 REG_NOT_VALID_8821C */ 5598 5599 /* 2 REG_NOT_VALID_8821C */ 5600 5601 /* 2 REG_NOT_VALID_8821C */ 5602 5603 /* 2 REG_NOT_VALID_8821C */ 5604 5605 /* 2 REG_NOT_VALID_8821C */ 5606 5607 /* 2 REG_NOT_VALID_8821C */ 5608 5609 /* 2 REG_NOT_VALID_8821C */ 5610 5611 /* 2 REG_NOT_VALID_8821C */ 5612 5613 /* 2 REG_NOT_VALID_8821C */ 5614 5615 /* 2 REG_NOT_VALID_8821C */ 5616 5617 /* 2 REG_NOT_VALID_8821C */ 5618 5619 /* 2 REG_NOT_VALID_8821C */ 5620 5621 /* 2 REG_NOT_VALID_8821C */ 5622 5623 /* 2 REG_NOT_VALID_8821C */ 5624 5625 /* 2 REG_NOT_VALID_8821C */ 5626 5627 /* 2 REG_NOT_VALID_8821C */ 5628 5629 /* 2 REG_NOT_VALID_8821C */ 5630 5631 /* 2 REG_NOT_VALID_8821C */ 5632 5633 /* 2 REG_NOT_VALID_8821C */ 5634 5635 /* 2 REG_NOT_VALID_8821C */ 5636 5637 /* 2 REG_NOT_VALID_8821C */ 5638 5639 /* 2 REG_NOT_VALID_8821C */ 5640 5641 /* 2 REG_NOT_VALID_8821C */ 5642 5643 /* 2 REG_NOT_VALID_8821C */ 5644 5645 /* 2 REG_NOT_VALID_8821C */ 5646 5647 /* 2 REG_NOT_VALID_8821C */ 5648 5649 /* 2 REG_NOT_VALID_8821C */ 5650 5651 /* 2 REG_NOT_VALID_8821C */ 5652 5653 /* 2 REG_NOT_VALID_8821C */ 5654 5655 /* 2 REG_NOT_VALID_8821C */ 5656 5657 /* 2 REG_NOT_VALID_8821C */ 5658 5659 /* 2 REG_NOT_VALID_8821C */ 5660 5661 /* 2 REG_NOT_VALID_8821C */ 5662 5663 /* 2 REG_NOT_VALID_8821C */ 5664 5665 /* 2 REG_NOT_VALID_8821C */ 5666 5667 /* 2 REG_NOT_VALID_8821C */ 5668 5669 /* 2 REG_NOT_VALID_8821C */ 5670 5671 /* 2 REG_NOT_VALID_8821C */ 5672 5673 /* 2 REG_NOT_VALID_8821C */ 5674 5675 /* 2 REG_NOT_VALID_8821C */ 5676 5677 /* 2 REG_NOT_VALID_8821C */ 5678 5679 /* 2 REG_NOT_VALID_8821C */ 5680 5681 /* 2 REG_NOT_VALID_8821C */ 5682 5683 /* 2 REG_NOT_VALID_8821C */ 5684 5685 /* 2 REG_NOT_VALID_8821C */ 5686 5687 /* 2 REG_NOT_VALID_8821C */ 5688 5689 /* 2 REG_NOT_VALID_8821C */ 5690 5691 /* 2 REG_NOT_VALID_8821C */ 5692 5693 /* 2 REG_NOT_VALID_8821C */ 5694 5695 /* 2 REG_NOT_VALID_8821C */ 5696 5697 /* 2 REG_NOT_VALID_8821C */ 5698 5699 /* 2 REG_NOT_VALID_8821C */ 5700 5701 /* 2 REG_NOT_VALID_8821C */ 5702 5703 /* 2 REG_NOT_VALID_8821C */ 5704 5705 /* 2 REG_NOT_VALID_8821C */ 5706 5707 /* 2 REG_NOT_VALID_8821C */ 5708 5709 /* 2 REG_NOT_VALID_8821C */ 5710 5711 /* 2 REG_NOT_VALID_8821C */ 5712 5713 /* 2 REG_NOT_VALID_8821C */ 5714 5715 /* 2 REG_NOT_VALID_8821C */ 5716 5717 /* 2 REG_NOT_VALID_8821C */ 5718 5719 /* 2 REG_NOT_VALID_8821C */ 5720 5721 /* 2 REG_NOT_VALID_8821C */ 5722 5723 /* 2 REG_NOT_VALID_8821C */ 5724 5725 /* 2 REG_NOT_VALID_8821C */ 5726 5727 /* 2 REG_NOT_VALID_8821C */ 5728 5729 /* 2 REG_NOT_VALID_8821C */ 5730 5731 /* 2 REG_NOT_VALID_8821C */ 5732 5733 /* 2 REG_NOT_VALID_8821C */ 5734 5735 /* 2 REG_NOT_VALID_8821C */ 5736 5737 /* 2 REG_NOT_VALID_8821C */ 5738 5739 /* 2 REG_NOT_VALID_8821C */ 5740 5741 /* 2 REG_NOT_VALID_8821C */ 5742 5743 /* 2 REG_NOT_VALID_8821C */ 5744 5745 /* 2 REG_NOT_VALID_8821C */ 5746 5747 /* 2 REG_NOT_VALID_8821C */ 5748 5749 /* 2 REG_NOT_VALID_8821C */ 5750 5751 /* 2 REG_NOT_VALID_8821C */ 5752 5753 /* 2 REG_NOT_VALID_8821C */ 5754 5755 /* 2 REG_NOT_VALID_8821C */ 5756 5757 /* 2 REG_NOT_VALID_8821C */ 5758 5759 /* 2 REG_NOT_VALID_8821C */ 5760 5761 /* 2 REG_NOT_VALID_8821C */ 5762 5763 /* 2 REG_NOT_VALID_8821C */ 5764 5765 /* 2 REG_NOT_VALID_8821C */ 5766 5767 /* 2 REG_NOT_VALID_8821C */ 5768 5769 /* 2 REG_NOT_VALID_8821C */ 5770 5771 /* 2 REG_NOT_VALID_8821C */ 5772 5773 /* 2 REG_NOT_VALID_8821C */ 5774 5775 /* 2 REG_NOT_VALID_8821C */ 5776 5777 /* 2 REG_NOT_VALID_8821C */ 5778 5779 /* 2 REG_NOT_VALID_8821C */ 5780 5781 /* 2 REG_NOT_VALID_8821C */ 5782 5783 /* 2 REG_FIFOPAGE_CTRL_1_8821C */ 5784 5785 /* 2 REG_NOT_VALID_8821C */ 5786 5787 #define BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8821C 16 5788 #define BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8821C 0xff 5789 #define BIT_TX_OQT_HE_FREE_SPACE_V1_8821C(x) \ 5790 (((x) & BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8821C) \ 5791 << BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8821C) 5792 #define BITS_TX_OQT_HE_FREE_SPACE_V1_8821C \ 5793 (BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8821C \ 5794 << BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8821C) 5795 #define BIT_CLEAR_TX_OQT_HE_FREE_SPACE_V1_8821C(x) \ 5796 ((x) & (~BITS_TX_OQT_HE_FREE_SPACE_V1_8821C)) 5797 #define BIT_GET_TX_OQT_HE_FREE_SPACE_V1_8821C(x) \ 5798 (((x) >> BIT_SHIFT_TX_OQT_HE_FREE_SPACE_V1_8821C) & \ 5799 BIT_MASK_TX_OQT_HE_FREE_SPACE_V1_8821C) 5800 #define BIT_SET_TX_OQT_HE_FREE_SPACE_V1_8821C(x, v) \ 5801 (BIT_CLEAR_TX_OQT_HE_FREE_SPACE_V1_8821C(x) | \ 5802 BIT_TX_OQT_HE_FREE_SPACE_V1_8821C(v)) 5803 5804 /* 2 REG_NOT_VALID_8821C */ 5805 5806 #define BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8821C 0 5807 #define BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8821C 0xff 5808 #define BIT_TX_OQT_NL_FREE_SPACE_V1_8821C(x) \ 5809 (((x) & BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8821C) \ 5810 << BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8821C) 5811 #define BITS_TX_OQT_NL_FREE_SPACE_V1_8821C \ 5812 (BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8821C \ 5813 << BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8821C) 5814 #define BIT_CLEAR_TX_OQT_NL_FREE_SPACE_V1_8821C(x) \ 5815 ((x) & (~BITS_TX_OQT_NL_FREE_SPACE_V1_8821C)) 5816 #define BIT_GET_TX_OQT_NL_FREE_SPACE_V1_8821C(x) \ 5817 (((x) >> BIT_SHIFT_TX_OQT_NL_FREE_SPACE_V1_8821C) & \ 5818 BIT_MASK_TX_OQT_NL_FREE_SPACE_V1_8821C) 5819 #define BIT_SET_TX_OQT_NL_FREE_SPACE_V1_8821C(x, v) \ 5820 (BIT_CLEAR_TX_OQT_NL_FREE_SPACE_V1_8821C(x) | \ 5821 BIT_TX_OQT_NL_FREE_SPACE_V1_8821C(v)) 5822 5823 /* 2 REG_FIFOPAGE_CTRL_2_8821C */ 5824 #define BIT_BCN_VALID_1_V1_8821C BIT(31) 5825 5826 /* 2 REG_NOT_VALID_8821C */ 5827 5828 #define BIT_SHIFT_BCN_HEAD_1_V1_8821C 16 5829 #define BIT_MASK_BCN_HEAD_1_V1_8821C 0xfff 5830 #define BIT_BCN_HEAD_1_V1_8821C(x) \ 5831 (((x) & BIT_MASK_BCN_HEAD_1_V1_8821C) << BIT_SHIFT_BCN_HEAD_1_V1_8821C) 5832 #define BITS_BCN_HEAD_1_V1_8821C \ 5833 (BIT_MASK_BCN_HEAD_1_V1_8821C << BIT_SHIFT_BCN_HEAD_1_V1_8821C) 5834 #define BIT_CLEAR_BCN_HEAD_1_V1_8821C(x) ((x) & (~BITS_BCN_HEAD_1_V1_8821C)) 5835 #define BIT_GET_BCN_HEAD_1_V1_8821C(x) \ 5836 (((x) >> BIT_SHIFT_BCN_HEAD_1_V1_8821C) & BIT_MASK_BCN_HEAD_1_V1_8821C) 5837 #define BIT_SET_BCN_HEAD_1_V1_8821C(x, v) \ 5838 (BIT_CLEAR_BCN_HEAD_1_V1_8821C(x) | BIT_BCN_HEAD_1_V1_8821C(v)) 5839 5840 #define BIT_BCN_VALID_V1_8821C BIT(15) 5841 5842 /* 2 REG_NOT_VALID_8821C */ 5843 5844 #define BIT_SHIFT_BCN_HEAD_V1_8821C 0 5845 #define BIT_MASK_BCN_HEAD_V1_8821C 0xfff 5846 #define BIT_BCN_HEAD_V1_8821C(x) \ 5847 (((x) & BIT_MASK_BCN_HEAD_V1_8821C) << BIT_SHIFT_BCN_HEAD_V1_8821C) 5848 #define BITS_BCN_HEAD_V1_8821C \ 5849 (BIT_MASK_BCN_HEAD_V1_8821C << BIT_SHIFT_BCN_HEAD_V1_8821C) 5850 #define BIT_CLEAR_BCN_HEAD_V1_8821C(x) ((x) & (~BITS_BCN_HEAD_V1_8821C)) 5851 #define BIT_GET_BCN_HEAD_V1_8821C(x) \ 5852 (((x) >> BIT_SHIFT_BCN_HEAD_V1_8821C) & BIT_MASK_BCN_HEAD_V1_8821C) 5853 #define BIT_SET_BCN_HEAD_V1_8821C(x, v) \ 5854 (BIT_CLEAR_BCN_HEAD_V1_8821C(x) | BIT_BCN_HEAD_V1_8821C(v)) 5855 5856 /* 2 REG_AUTO_LLT_V1_8821C */ 5857 5858 #define BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C 24 5859 #define BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C 0xff 5860 #define BIT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C(x) \ 5861 (((x) & BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C) \ 5862 << BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C) 5863 #define BITS_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C \ 5864 (BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C \ 5865 << BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C) 5866 #define BIT_CLEAR_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C(x) \ 5867 ((x) & (~BITS_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C)) 5868 #define BIT_GET_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C(x) \ 5869 (((x) >> BIT_SHIFT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C) & \ 5870 BIT_MASK_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C) 5871 #define BIT_SET_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C(x, v) \ 5872 (BIT_CLEAR_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C(x) | \ 5873 BIT_MAX_TX_PKT_FOR_USB_AND_SDIO_V1_8821C(v)) 5874 5875 #define BIT_SHIFT_LLT_FREE_PAGE_V1_8821C 8 5876 #define BIT_MASK_LLT_FREE_PAGE_V1_8821C 0xffff 5877 #define BIT_LLT_FREE_PAGE_V1_8821C(x) \ 5878 (((x) & BIT_MASK_LLT_FREE_PAGE_V1_8821C) \ 5879 << BIT_SHIFT_LLT_FREE_PAGE_V1_8821C) 5880 #define BITS_LLT_FREE_PAGE_V1_8821C \ 5881 (BIT_MASK_LLT_FREE_PAGE_V1_8821C << BIT_SHIFT_LLT_FREE_PAGE_V1_8821C) 5882 #define BIT_CLEAR_LLT_FREE_PAGE_V1_8821C(x) \ 5883 ((x) & (~BITS_LLT_FREE_PAGE_V1_8821C)) 5884 #define BIT_GET_LLT_FREE_PAGE_V1_8821C(x) \ 5885 (((x) >> BIT_SHIFT_LLT_FREE_PAGE_V1_8821C) & \ 5886 BIT_MASK_LLT_FREE_PAGE_V1_8821C) 5887 #define BIT_SET_LLT_FREE_PAGE_V1_8821C(x, v) \ 5888 (BIT_CLEAR_LLT_FREE_PAGE_V1_8821C(x) | BIT_LLT_FREE_PAGE_V1_8821C(v)) 5889 5890 #define BIT_SHIFT_BLK_DESC_NUM_8821C 4 5891 #define BIT_MASK_BLK_DESC_NUM_8821C 0xf 5892 #define BIT_BLK_DESC_NUM_8821C(x) \ 5893 (((x) & BIT_MASK_BLK_DESC_NUM_8821C) << BIT_SHIFT_BLK_DESC_NUM_8821C) 5894 #define BITS_BLK_DESC_NUM_8821C \ 5895 (BIT_MASK_BLK_DESC_NUM_8821C << BIT_SHIFT_BLK_DESC_NUM_8821C) 5896 #define BIT_CLEAR_BLK_DESC_NUM_8821C(x) ((x) & (~BITS_BLK_DESC_NUM_8821C)) 5897 #define BIT_GET_BLK_DESC_NUM_8821C(x) \ 5898 (((x) >> BIT_SHIFT_BLK_DESC_NUM_8821C) & BIT_MASK_BLK_DESC_NUM_8821C) 5899 #define BIT_SET_BLK_DESC_NUM_8821C(x, v) \ 5900 (BIT_CLEAR_BLK_DESC_NUM_8821C(x) | BIT_BLK_DESC_NUM_8821C(v)) 5901 5902 #define BIT_R_BCN_HEAD_SEL_8821C BIT(3) 5903 #define BIT_R_EN_BCN_SW_HEAD_SEL_8821C BIT(2) 5904 #define BIT_LLT_DBG_SEL_8821C BIT(1) 5905 #define BIT_AUTO_INIT_LLT_V1_8821C BIT(0) 5906 5907 /* 2 REG_TXDMA_OFFSET_CHK_8821C */ 5908 #define BIT_EM_CHKSUM_FIN_8821C BIT(31) 5909 #define BIT_EMN_PCIE_DMA_MOD_8821C BIT(30) 5910 #define BIT_EN_TXQUE_CLR_8821C BIT(29) 5911 #define BIT_EN_PCIE_FIFO_MODE_8821C BIT(28) 5912 5913 #define BIT_SHIFT_PG_UNDER_TH_V1_8821C 16 5914 #define BIT_MASK_PG_UNDER_TH_V1_8821C 0xfff 5915 #define BIT_PG_UNDER_TH_V1_8821C(x) \ 5916 (((x) & BIT_MASK_PG_UNDER_TH_V1_8821C) \ 5917 << BIT_SHIFT_PG_UNDER_TH_V1_8821C) 5918 #define BITS_PG_UNDER_TH_V1_8821C \ 5919 (BIT_MASK_PG_UNDER_TH_V1_8821C << BIT_SHIFT_PG_UNDER_TH_V1_8821C) 5920 #define BIT_CLEAR_PG_UNDER_TH_V1_8821C(x) ((x) & (~BITS_PG_UNDER_TH_V1_8821C)) 5921 #define BIT_GET_PG_UNDER_TH_V1_8821C(x) \ 5922 (((x) >> BIT_SHIFT_PG_UNDER_TH_V1_8821C) & \ 5923 BIT_MASK_PG_UNDER_TH_V1_8821C) 5924 #define BIT_SET_PG_UNDER_TH_V1_8821C(x, v) \ 5925 (BIT_CLEAR_PG_UNDER_TH_V1_8821C(x) | BIT_PG_UNDER_TH_V1_8821C(v)) 5926 5927 /* 2 REG_NOT_VALID_8821C */ 5928 #define BIT_SDIO_TXDESC_CHKSUM_EN_8821C BIT(13) 5929 #define BIT_RST_RDPTR_8821C BIT(12) 5930 #define BIT_RST_WRPTR_8821C BIT(11) 5931 #define BIT_CHK_PG_TH_EN_8821C BIT(10) 5932 #define BIT_DROP_DATA_EN_8821C BIT(9) 5933 #define BIT_CHECK_OFFSET_EN_8821C BIT(8) 5934 5935 #define BIT_SHIFT_CHECK_OFFSET_8821C 0 5936 #define BIT_MASK_CHECK_OFFSET_8821C 0xff 5937 #define BIT_CHECK_OFFSET_8821C(x) \ 5938 (((x) & BIT_MASK_CHECK_OFFSET_8821C) << BIT_SHIFT_CHECK_OFFSET_8821C) 5939 #define BITS_CHECK_OFFSET_8821C \ 5940 (BIT_MASK_CHECK_OFFSET_8821C << BIT_SHIFT_CHECK_OFFSET_8821C) 5941 #define BIT_CLEAR_CHECK_OFFSET_8821C(x) ((x) & (~BITS_CHECK_OFFSET_8821C)) 5942 #define BIT_GET_CHECK_OFFSET_8821C(x) \ 5943 (((x) >> BIT_SHIFT_CHECK_OFFSET_8821C) & BIT_MASK_CHECK_OFFSET_8821C) 5944 #define BIT_SET_CHECK_OFFSET_8821C(x, v) \ 5945 (BIT_CLEAR_CHECK_OFFSET_8821C(x) | BIT_CHECK_OFFSET_8821C(v)) 5946 5947 /* 2 REG_TXDMA_STATUS_8821C */ 5948 #define BIT_TXPKTBUF_REQ_ERR_8821C BIT(18) 5949 #define BIT_HI_OQT_UDN_8821C BIT(17) 5950 #define BIT_HI_OQT_OVF_8821C BIT(16) 5951 #define BIT_PAYLOAD_CHKSUM_ERR_8821C BIT(15) 5952 #define BIT_PAYLOAD_UDN_8821C BIT(14) 5953 #define BIT_PAYLOAD_OVF_8821C BIT(13) 5954 #define BIT_DSC_CHKSUM_FAIL_8821C BIT(12) 5955 #define BIT_UNKNOWN_QSEL_8821C BIT(11) 5956 #define BIT_EP_QSEL_DIFF_8821C BIT(10) 5957 #define BIT_TX_OFFS_UNMATCH_8821C BIT(9) 5958 #define BIT_TXOQT_UDN_8821C BIT(8) 5959 #define BIT_TXOQT_OVF_8821C BIT(7) 5960 #define BIT_TXDMA_SFF_UDN_8821C BIT(6) 5961 #define BIT_TXDMA_SFF_OVF_8821C BIT(5) 5962 #define BIT_LLT_NULL_PG_8821C BIT(4) 5963 #define BIT_PAGE_UDN_8821C BIT(3) 5964 #define BIT_PAGE_OVF_8821C BIT(2) 5965 #define BIT_TXFF_PG_UDN_8821C BIT(1) 5966 #define BIT_TXFF_PG_OVF_8821C BIT(0) 5967 5968 /* 2 REG_TX_DMA_DBG_8821C */ 5969 5970 /* 2 REG_TQPNT1_8821C */ 5971 #define BIT_HPQ_INT_EN_8821C BIT(31) 5972 5973 #define BIT_SHIFT_HPQ_HIGH_TH_V1_8821C 16 5974 #define BIT_MASK_HPQ_HIGH_TH_V1_8821C 0xfff 5975 #define BIT_HPQ_HIGH_TH_V1_8821C(x) \ 5976 (((x) & BIT_MASK_HPQ_HIGH_TH_V1_8821C) \ 5977 << BIT_SHIFT_HPQ_HIGH_TH_V1_8821C) 5978 #define BITS_HPQ_HIGH_TH_V1_8821C \ 5979 (BIT_MASK_HPQ_HIGH_TH_V1_8821C << BIT_SHIFT_HPQ_HIGH_TH_V1_8821C) 5980 #define BIT_CLEAR_HPQ_HIGH_TH_V1_8821C(x) ((x) & (~BITS_HPQ_HIGH_TH_V1_8821C)) 5981 #define BIT_GET_HPQ_HIGH_TH_V1_8821C(x) \ 5982 (((x) >> BIT_SHIFT_HPQ_HIGH_TH_V1_8821C) & \ 5983 BIT_MASK_HPQ_HIGH_TH_V1_8821C) 5984 #define BIT_SET_HPQ_HIGH_TH_V1_8821C(x, v) \ 5985 (BIT_CLEAR_HPQ_HIGH_TH_V1_8821C(x) | BIT_HPQ_HIGH_TH_V1_8821C(v)) 5986 5987 #define BIT_SHIFT_HPQ_LOW_TH_V1_8821C 0 5988 #define BIT_MASK_HPQ_LOW_TH_V1_8821C 0xfff 5989 #define BIT_HPQ_LOW_TH_V1_8821C(x) \ 5990 (((x) & BIT_MASK_HPQ_LOW_TH_V1_8821C) << BIT_SHIFT_HPQ_LOW_TH_V1_8821C) 5991 #define BITS_HPQ_LOW_TH_V1_8821C \ 5992 (BIT_MASK_HPQ_LOW_TH_V1_8821C << BIT_SHIFT_HPQ_LOW_TH_V1_8821C) 5993 #define BIT_CLEAR_HPQ_LOW_TH_V1_8821C(x) ((x) & (~BITS_HPQ_LOW_TH_V1_8821C)) 5994 #define BIT_GET_HPQ_LOW_TH_V1_8821C(x) \ 5995 (((x) >> BIT_SHIFT_HPQ_LOW_TH_V1_8821C) & BIT_MASK_HPQ_LOW_TH_V1_8821C) 5996 #define BIT_SET_HPQ_LOW_TH_V1_8821C(x, v) \ 5997 (BIT_CLEAR_HPQ_LOW_TH_V1_8821C(x) | BIT_HPQ_LOW_TH_V1_8821C(v)) 5998 5999 /* 2 REG_TQPNT2_8821C */ 6000 #define BIT_NPQ_INT_EN_8821C BIT(31) 6001 6002 #define BIT_SHIFT_NPQ_HIGH_TH_V1_8821C 16 6003 #define BIT_MASK_NPQ_HIGH_TH_V1_8821C 0xfff 6004 #define BIT_NPQ_HIGH_TH_V1_8821C(x) \ 6005 (((x) & BIT_MASK_NPQ_HIGH_TH_V1_8821C) \ 6006 << BIT_SHIFT_NPQ_HIGH_TH_V1_8821C) 6007 #define BITS_NPQ_HIGH_TH_V1_8821C \ 6008 (BIT_MASK_NPQ_HIGH_TH_V1_8821C << BIT_SHIFT_NPQ_HIGH_TH_V1_8821C) 6009 #define BIT_CLEAR_NPQ_HIGH_TH_V1_8821C(x) ((x) & (~BITS_NPQ_HIGH_TH_V1_8821C)) 6010 #define BIT_GET_NPQ_HIGH_TH_V1_8821C(x) \ 6011 (((x) >> BIT_SHIFT_NPQ_HIGH_TH_V1_8821C) & \ 6012 BIT_MASK_NPQ_HIGH_TH_V1_8821C) 6013 #define BIT_SET_NPQ_HIGH_TH_V1_8821C(x, v) \ 6014 (BIT_CLEAR_NPQ_HIGH_TH_V1_8821C(x) | BIT_NPQ_HIGH_TH_V1_8821C(v)) 6015 6016 #define BIT_SHIFT_NPQ_LOW_TH_V1_8821C 0 6017 #define BIT_MASK_NPQ_LOW_TH_V1_8821C 0xfff 6018 #define BIT_NPQ_LOW_TH_V1_8821C(x) \ 6019 (((x) & BIT_MASK_NPQ_LOW_TH_V1_8821C) << BIT_SHIFT_NPQ_LOW_TH_V1_8821C) 6020 #define BITS_NPQ_LOW_TH_V1_8821C \ 6021 (BIT_MASK_NPQ_LOW_TH_V1_8821C << BIT_SHIFT_NPQ_LOW_TH_V1_8821C) 6022 #define BIT_CLEAR_NPQ_LOW_TH_V1_8821C(x) ((x) & (~BITS_NPQ_LOW_TH_V1_8821C)) 6023 #define BIT_GET_NPQ_LOW_TH_V1_8821C(x) \ 6024 (((x) >> BIT_SHIFT_NPQ_LOW_TH_V1_8821C) & BIT_MASK_NPQ_LOW_TH_V1_8821C) 6025 #define BIT_SET_NPQ_LOW_TH_V1_8821C(x, v) \ 6026 (BIT_CLEAR_NPQ_LOW_TH_V1_8821C(x) | BIT_NPQ_LOW_TH_V1_8821C(v)) 6027 6028 /* 2 REG_TQPNT3_8821C */ 6029 #define BIT_LPQ_INT_EN_8821C BIT(31) 6030 6031 #define BIT_SHIFT_LPQ_HIGH_TH_V1_8821C 16 6032 #define BIT_MASK_LPQ_HIGH_TH_V1_8821C 0xfff 6033 #define BIT_LPQ_HIGH_TH_V1_8821C(x) \ 6034 (((x) & BIT_MASK_LPQ_HIGH_TH_V1_8821C) \ 6035 << BIT_SHIFT_LPQ_HIGH_TH_V1_8821C) 6036 #define BITS_LPQ_HIGH_TH_V1_8821C \ 6037 (BIT_MASK_LPQ_HIGH_TH_V1_8821C << BIT_SHIFT_LPQ_HIGH_TH_V1_8821C) 6038 #define BIT_CLEAR_LPQ_HIGH_TH_V1_8821C(x) ((x) & (~BITS_LPQ_HIGH_TH_V1_8821C)) 6039 #define BIT_GET_LPQ_HIGH_TH_V1_8821C(x) \ 6040 (((x) >> BIT_SHIFT_LPQ_HIGH_TH_V1_8821C) & \ 6041 BIT_MASK_LPQ_HIGH_TH_V1_8821C) 6042 #define BIT_SET_LPQ_HIGH_TH_V1_8821C(x, v) \ 6043 (BIT_CLEAR_LPQ_HIGH_TH_V1_8821C(x) | BIT_LPQ_HIGH_TH_V1_8821C(v)) 6044 6045 #define BIT_SHIFT_LPQ_LOW_TH_V1_8821C 0 6046 #define BIT_MASK_LPQ_LOW_TH_V1_8821C 0xfff 6047 #define BIT_LPQ_LOW_TH_V1_8821C(x) \ 6048 (((x) & BIT_MASK_LPQ_LOW_TH_V1_8821C) << BIT_SHIFT_LPQ_LOW_TH_V1_8821C) 6049 #define BITS_LPQ_LOW_TH_V1_8821C \ 6050 (BIT_MASK_LPQ_LOW_TH_V1_8821C << BIT_SHIFT_LPQ_LOW_TH_V1_8821C) 6051 #define BIT_CLEAR_LPQ_LOW_TH_V1_8821C(x) ((x) & (~BITS_LPQ_LOW_TH_V1_8821C)) 6052 #define BIT_GET_LPQ_LOW_TH_V1_8821C(x) \ 6053 (((x) >> BIT_SHIFT_LPQ_LOW_TH_V1_8821C) & BIT_MASK_LPQ_LOW_TH_V1_8821C) 6054 #define BIT_SET_LPQ_LOW_TH_V1_8821C(x, v) \ 6055 (BIT_CLEAR_LPQ_LOW_TH_V1_8821C(x) | BIT_LPQ_LOW_TH_V1_8821C(v)) 6056 6057 /* 2 REG_TQPNT4_8821C */ 6058 #define BIT_EXQ_INT_EN_8821C BIT(31) 6059 6060 #define BIT_SHIFT_EXQ_HIGH_TH_V1_8821C 16 6061 #define BIT_MASK_EXQ_HIGH_TH_V1_8821C 0xfff 6062 #define BIT_EXQ_HIGH_TH_V1_8821C(x) \ 6063 (((x) & BIT_MASK_EXQ_HIGH_TH_V1_8821C) \ 6064 << BIT_SHIFT_EXQ_HIGH_TH_V1_8821C) 6065 #define BITS_EXQ_HIGH_TH_V1_8821C \ 6066 (BIT_MASK_EXQ_HIGH_TH_V1_8821C << BIT_SHIFT_EXQ_HIGH_TH_V1_8821C) 6067 #define BIT_CLEAR_EXQ_HIGH_TH_V1_8821C(x) ((x) & (~BITS_EXQ_HIGH_TH_V1_8821C)) 6068 #define BIT_GET_EXQ_HIGH_TH_V1_8821C(x) \ 6069 (((x) >> BIT_SHIFT_EXQ_HIGH_TH_V1_8821C) & \ 6070 BIT_MASK_EXQ_HIGH_TH_V1_8821C) 6071 #define BIT_SET_EXQ_HIGH_TH_V1_8821C(x, v) \ 6072 (BIT_CLEAR_EXQ_HIGH_TH_V1_8821C(x) | BIT_EXQ_HIGH_TH_V1_8821C(v)) 6073 6074 #define BIT_SHIFT_EXQ_LOW_TH_V1_8821C 0 6075 #define BIT_MASK_EXQ_LOW_TH_V1_8821C 0xfff 6076 #define BIT_EXQ_LOW_TH_V1_8821C(x) \ 6077 (((x) & BIT_MASK_EXQ_LOW_TH_V1_8821C) << BIT_SHIFT_EXQ_LOW_TH_V1_8821C) 6078 #define BITS_EXQ_LOW_TH_V1_8821C \ 6079 (BIT_MASK_EXQ_LOW_TH_V1_8821C << BIT_SHIFT_EXQ_LOW_TH_V1_8821C) 6080 #define BIT_CLEAR_EXQ_LOW_TH_V1_8821C(x) ((x) & (~BITS_EXQ_LOW_TH_V1_8821C)) 6081 #define BIT_GET_EXQ_LOW_TH_V1_8821C(x) \ 6082 (((x) >> BIT_SHIFT_EXQ_LOW_TH_V1_8821C) & BIT_MASK_EXQ_LOW_TH_V1_8821C) 6083 #define BIT_SET_EXQ_LOW_TH_V1_8821C(x, v) \ 6084 (BIT_CLEAR_EXQ_LOW_TH_V1_8821C(x) | BIT_EXQ_LOW_TH_V1_8821C(v)) 6085 6086 /* 2 REG_RQPN_CTRL_1_8821C */ 6087 6088 #define BIT_SHIFT_TXPKTNUM_H_8821C 16 6089 #define BIT_MASK_TXPKTNUM_H_8821C 0xffff 6090 #define BIT_TXPKTNUM_H_8821C(x) \ 6091 (((x) & BIT_MASK_TXPKTNUM_H_8821C) << BIT_SHIFT_TXPKTNUM_H_8821C) 6092 #define BITS_TXPKTNUM_H_8821C \ 6093 (BIT_MASK_TXPKTNUM_H_8821C << BIT_SHIFT_TXPKTNUM_H_8821C) 6094 #define BIT_CLEAR_TXPKTNUM_H_8821C(x) ((x) & (~BITS_TXPKTNUM_H_8821C)) 6095 #define BIT_GET_TXPKTNUM_H_8821C(x) \ 6096 (((x) >> BIT_SHIFT_TXPKTNUM_H_8821C) & BIT_MASK_TXPKTNUM_H_8821C) 6097 #define BIT_SET_TXPKTNUM_H_8821C(x, v) \ 6098 (BIT_CLEAR_TXPKTNUM_H_8821C(x) | BIT_TXPKTNUM_H_8821C(v)) 6099 6100 #define BIT_SHIFT_TXPKTNUM_V2_8821C 0 6101 #define BIT_MASK_TXPKTNUM_V2_8821C 0xffff 6102 #define BIT_TXPKTNUM_V2_8821C(x) \ 6103 (((x) & BIT_MASK_TXPKTNUM_V2_8821C) << BIT_SHIFT_TXPKTNUM_V2_8821C) 6104 #define BITS_TXPKTNUM_V2_8821C \ 6105 (BIT_MASK_TXPKTNUM_V2_8821C << BIT_SHIFT_TXPKTNUM_V2_8821C) 6106 #define BIT_CLEAR_TXPKTNUM_V2_8821C(x) ((x) & (~BITS_TXPKTNUM_V2_8821C)) 6107 #define BIT_GET_TXPKTNUM_V2_8821C(x) \ 6108 (((x) >> BIT_SHIFT_TXPKTNUM_V2_8821C) & BIT_MASK_TXPKTNUM_V2_8821C) 6109 #define BIT_SET_TXPKTNUM_V2_8821C(x, v) \ 6110 (BIT_CLEAR_TXPKTNUM_V2_8821C(x) | BIT_TXPKTNUM_V2_8821C(v)) 6111 6112 /* 2 REG_RQPN_CTRL_2_8821C */ 6113 #define BIT_LD_RQPN_8821C BIT(31) 6114 #define BIT_EXQ_PUBLIC_DIS_V1_8821C BIT(19) 6115 #define BIT_NPQ_PUBLIC_DIS_V1_8821C BIT(18) 6116 #define BIT_LPQ_PUBLIC_DIS_V1_8821C BIT(17) 6117 #define BIT_HPQ_PUBLIC_DIS_V1_8821C BIT(16) 6118 #define BIT_SDIO_TXAGG_ALIGN_ADJUST_EN_8821C BIT(15) 6119 6120 #define BIT_SHIFT_SDIO_TXAGG_ALIGN_SIZE_8821C 0 6121 #define BIT_MASK_SDIO_TXAGG_ALIGN_SIZE_8821C 0xfff 6122 #define BIT_SDIO_TXAGG_ALIGN_SIZE_8821C(x) \ 6123 (((x) & BIT_MASK_SDIO_TXAGG_ALIGN_SIZE_8821C) \ 6124 << BIT_SHIFT_SDIO_TXAGG_ALIGN_SIZE_8821C) 6125 #define BITS_SDIO_TXAGG_ALIGN_SIZE_8821C \ 6126 (BIT_MASK_SDIO_TXAGG_ALIGN_SIZE_8821C \ 6127 << BIT_SHIFT_SDIO_TXAGG_ALIGN_SIZE_8821C) 6128 #define BIT_CLEAR_SDIO_TXAGG_ALIGN_SIZE_8821C(x) \ 6129 ((x) & (~BITS_SDIO_TXAGG_ALIGN_SIZE_8821C)) 6130 #define BIT_GET_SDIO_TXAGG_ALIGN_SIZE_8821C(x) \ 6131 (((x) >> BIT_SHIFT_SDIO_TXAGG_ALIGN_SIZE_8821C) & \ 6132 BIT_MASK_SDIO_TXAGG_ALIGN_SIZE_8821C) 6133 #define BIT_SET_SDIO_TXAGG_ALIGN_SIZE_8821C(x, v) \ 6134 (BIT_CLEAR_SDIO_TXAGG_ALIGN_SIZE_8821C(x) | \ 6135 BIT_SDIO_TXAGG_ALIGN_SIZE_8821C(v)) 6136 6137 /* 2 REG_FIFOPAGE_INFO_1_8821C */ 6138 6139 #define BIT_SHIFT_HPQ_AVAL_PG_V1_8821C 16 6140 #define BIT_MASK_HPQ_AVAL_PG_V1_8821C 0xfff 6141 #define BIT_HPQ_AVAL_PG_V1_8821C(x) \ 6142 (((x) & BIT_MASK_HPQ_AVAL_PG_V1_8821C) \ 6143 << BIT_SHIFT_HPQ_AVAL_PG_V1_8821C) 6144 #define BITS_HPQ_AVAL_PG_V1_8821C \ 6145 (BIT_MASK_HPQ_AVAL_PG_V1_8821C << BIT_SHIFT_HPQ_AVAL_PG_V1_8821C) 6146 #define BIT_CLEAR_HPQ_AVAL_PG_V1_8821C(x) ((x) & (~BITS_HPQ_AVAL_PG_V1_8821C)) 6147 #define BIT_GET_HPQ_AVAL_PG_V1_8821C(x) \ 6148 (((x) >> BIT_SHIFT_HPQ_AVAL_PG_V1_8821C) & \ 6149 BIT_MASK_HPQ_AVAL_PG_V1_8821C) 6150 #define BIT_SET_HPQ_AVAL_PG_V1_8821C(x, v) \ 6151 (BIT_CLEAR_HPQ_AVAL_PG_V1_8821C(x) | BIT_HPQ_AVAL_PG_V1_8821C(v)) 6152 6153 #define BIT_SHIFT_HPQ_V1_8821C 0 6154 #define BIT_MASK_HPQ_V1_8821C 0xfff 6155 #define BIT_HPQ_V1_8821C(x) \ 6156 (((x) & BIT_MASK_HPQ_V1_8821C) << BIT_SHIFT_HPQ_V1_8821C) 6157 #define BITS_HPQ_V1_8821C (BIT_MASK_HPQ_V1_8821C << BIT_SHIFT_HPQ_V1_8821C) 6158 #define BIT_CLEAR_HPQ_V1_8821C(x) ((x) & (~BITS_HPQ_V1_8821C)) 6159 #define BIT_GET_HPQ_V1_8821C(x) \ 6160 (((x) >> BIT_SHIFT_HPQ_V1_8821C) & BIT_MASK_HPQ_V1_8821C) 6161 #define BIT_SET_HPQ_V1_8821C(x, v) \ 6162 (BIT_CLEAR_HPQ_V1_8821C(x) | BIT_HPQ_V1_8821C(v)) 6163 6164 /* 2 REG_FIFOPAGE_INFO_2_8821C */ 6165 6166 #define BIT_SHIFT_LPQ_AVAL_PG_V1_8821C 16 6167 #define BIT_MASK_LPQ_AVAL_PG_V1_8821C 0xfff 6168 #define BIT_LPQ_AVAL_PG_V1_8821C(x) \ 6169 (((x) & BIT_MASK_LPQ_AVAL_PG_V1_8821C) \ 6170 << BIT_SHIFT_LPQ_AVAL_PG_V1_8821C) 6171 #define BITS_LPQ_AVAL_PG_V1_8821C \ 6172 (BIT_MASK_LPQ_AVAL_PG_V1_8821C << BIT_SHIFT_LPQ_AVAL_PG_V1_8821C) 6173 #define BIT_CLEAR_LPQ_AVAL_PG_V1_8821C(x) ((x) & (~BITS_LPQ_AVAL_PG_V1_8821C)) 6174 #define BIT_GET_LPQ_AVAL_PG_V1_8821C(x) \ 6175 (((x) >> BIT_SHIFT_LPQ_AVAL_PG_V1_8821C) & \ 6176 BIT_MASK_LPQ_AVAL_PG_V1_8821C) 6177 #define BIT_SET_LPQ_AVAL_PG_V1_8821C(x, v) \ 6178 (BIT_CLEAR_LPQ_AVAL_PG_V1_8821C(x) | BIT_LPQ_AVAL_PG_V1_8821C(v)) 6179 6180 #define BIT_SHIFT_LPQ_V1_8821C 0 6181 #define BIT_MASK_LPQ_V1_8821C 0xfff 6182 #define BIT_LPQ_V1_8821C(x) \ 6183 (((x) & BIT_MASK_LPQ_V1_8821C) << BIT_SHIFT_LPQ_V1_8821C) 6184 #define BITS_LPQ_V1_8821C (BIT_MASK_LPQ_V1_8821C << BIT_SHIFT_LPQ_V1_8821C) 6185 #define BIT_CLEAR_LPQ_V1_8821C(x) ((x) & (~BITS_LPQ_V1_8821C)) 6186 #define BIT_GET_LPQ_V1_8821C(x) \ 6187 (((x) >> BIT_SHIFT_LPQ_V1_8821C) & BIT_MASK_LPQ_V1_8821C) 6188 #define BIT_SET_LPQ_V1_8821C(x, v) \ 6189 (BIT_CLEAR_LPQ_V1_8821C(x) | BIT_LPQ_V1_8821C(v)) 6190 6191 /* 2 REG_FIFOPAGE_INFO_3_8821C */ 6192 6193 #define BIT_SHIFT_NPQ_AVAL_PG_V1_8821C 16 6194 #define BIT_MASK_NPQ_AVAL_PG_V1_8821C 0xfff 6195 #define BIT_NPQ_AVAL_PG_V1_8821C(x) \ 6196 (((x) & BIT_MASK_NPQ_AVAL_PG_V1_8821C) \ 6197 << BIT_SHIFT_NPQ_AVAL_PG_V1_8821C) 6198 #define BITS_NPQ_AVAL_PG_V1_8821C \ 6199 (BIT_MASK_NPQ_AVAL_PG_V1_8821C << BIT_SHIFT_NPQ_AVAL_PG_V1_8821C) 6200 #define BIT_CLEAR_NPQ_AVAL_PG_V1_8821C(x) ((x) & (~BITS_NPQ_AVAL_PG_V1_8821C)) 6201 #define BIT_GET_NPQ_AVAL_PG_V1_8821C(x) \ 6202 (((x) >> BIT_SHIFT_NPQ_AVAL_PG_V1_8821C) & \ 6203 BIT_MASK_NPQ_AVAL_PG_V1_8821C) 6204 #define BIT_SET_NPQ_AVAL_PG_V1_8821C(x, v) \ 6205 (BIT_CLEAR_NPQ_AVAL_PG_V1_8821C(x) | BIT_NPQ_AVAL_PG_V1_8821C(v)) 6206 6207 #define BIT_SHIFT_NPQ_V1_8821C 0 6208 #define BIT_MASK_NPQ_V1_8821C 0xfff 6209 #define BIT_NPQ_V1_8821C(x) \ 6210 (((x) & BIT_MASK_NPQ_V1_8821C) << BIT_SHIFT_NPQ_V1_8821C) 6211 #define BITS_NPQ_V1_8821C (BIT_MASK_NPQ_V1_8821C << BIT_SHIFT_NPQ_V1_8821C) 6212 #define BIT_CLEAR_NPQ_V1_8821C(x) ((x) & (~BITS_NPQ_V1_8821C)) 6213 #define BIT_GET_NPQ_V1_8821C(x) \ 6214 (((x) >> BIT_SHIFT_NPQ_V1_8821C) & BIT_MASK_NPQ_V1_8821C) 6215 #define BIT_SET_NPQ_V1_8821C(x, v) \ 6216 (BIT_CLEAR_NPQ_V1_8821C(x) | BIT_NPQ_V1_8821C(v)) 6217 6218 /* 2 REG_FIFOPAGE_INFO_4_8821C */ 6219 6220 #define BIT_SHIFT_EXQ_AVAL_PG_V1_8821C 16 6221 #define BIT_MASK_EXQ_AVAL_PG_V1_8821C 0xfff 6222 #define BIT_EXQ_AVAL_PG_V1_8821C(x) \ 6223 (((x) & BIT_MASK_EXQ_AVAL_PG_V1_8821C) \ 6224 << BIT_SHIFT_EXQ_AVAL_PG_V1_8821C) 6225 #define BITS_EXQ_AVAL_PG_V1_8821C \ 6226 (BIT_MASK_EXQ_AVAL_PG_V1_8821C << BIT_SHIFT_EXQ_AVAL_PG_V1_8821C) 6227 #define BIT_CLEAR_EXQ_AVAL_PG_V1_8821C(x) ((x) & (~BITS_EXQ_AVAL_PG_V1_8821C)) 6228 #define BIT_GET_EXQ_AVAL_PG_V1_8821C(x) \ 6229 (((x) >> BIT_SHIFT_EXQ_AVAL_PG_V1_8821C) & \ 6230 BIT_MASK_EXQ_AVAL_PG_V1_8821C) 6231 #define BIT_SET_EXQ_AVAL_PG_V1_8821C(x, v) \ 6232 (BIT_CLEAR_EXQ_AVAL_PG_V1_8821C(x) | BIT_EXQ_AVAL_PG_V1_8821C(v)) 6233 6234 #define BIT_SHIFT_EXQ_V1_8821C 0 6235 #define BIT_MASK_EXQ_V1_8821C 0xfff 6236 #define BIT_EXQ_V1_8821C(x) \ 6237 (((x) & BIT_MASK_EXQ_V1_8821C) << BIT_SHIFT_EXQ_V1_8821C) 6238 #define BITS_EXQ_V1_8821C (BIT_MASK_EXQ_V1_8821C << BIT_SHIFT_EXQ_V1_8821C) 6239 #define BIT_CLEAR_EXQ_V1_8821C(x) ((x) & (~BITS_EXQ_V1_8821C)) 6240 #define BIT_GET_EXQ_V1_8821C(x) \ 6241 (((x) >> BIT_SHIFT_EXQ_V1_8821C) & BIT_MASK_EXQ_V1_8821C) 6242 #define BIT_SET_EXQ_V1_8821C(x, v) \ 6243 (BIT_CLEAR_EXQ_V1_8821C(x) | BIT_EXQ_V1_8821C(v)) 6244 6245 /* 2 REG_FIFOPAGE_INFO_5_8821C */ 6246 6247 #define BIT_SHIFT_PUBQ_AVAL_PG_V1_8821C 16 6248 #define BIT_MASK_PUBQ_AVAL_PG_V1_8821C 0xfff 6249 #define BIT_PUBQ_AVAL_PG_V1_8821C(x) \ 6250 (((x) & BIT_MASK_PUBQ_AVAL_PG_V1_8821C) \ 6251 << BIT_SHIFT_PUBQ_AVAL_PG_V1_8821C) 6252 #define BITS_PUBQ_AVAL_PG_V1_8821C \ 6253 (BIT_MASK_PUBQ_AVAL_PG_V1_8821C << BIT_SHIFT_PUBQ_AVAL_PG_V1_8821C) 6254 #define BIT_CLEAR_PUBQ_AVAL_PG_V1_8821C(x) ((x) & (~BITS_PUBQ_AVAL_PG_V1_8821C)) 6255 #define BIT_GET_PUBQ_AVAL_PG_V1_8821C(x) \ 6256 (((x) >> BIT_SHIFT_PUBQ_AVAL_PG_V1_8821C) & \ 6257 BIT_MASK_PUBQ_AVAL_PG_V1_8821C) 6258 #define BIT_SET_PUBQ_AVAL_PG_V1_8821C(x, v) \ 6259 (BIT_CLEAR_PUBQ_AVAL_PG_V1_8821C(x) | BIT_PUBQ_AVAL_PG_V1_8821C(v)) 6260 6261 #define BIT_SHIFT_PUBQ_V1_8821C 0 6262 #define BIT_MASK_PUBQ_V1_8821C 0xfff 6263 #define BIT_PUBQ_V1_8821C(x) \ 6264 (((x) & BIT_MASK_PUBQ_V1_8821C) << BIT_SHIFT_PUBQ_V1_8821C) 6265 #define BITS_PUBQ_V1_8821C (BIT_MASK_PUBQ_V1_8821C << BIT_SHIFT_PUBQ_V1_8821C) 6266 #define BIT_CLEAR_PUBQ_V1_8821C(x) ((x) & (~BITS_PUBQ_V1_8821C)) 6267 #define BIT_GET_PUBQ_V1_8821C(x) \ 6268 (((x) >> BIT_SHIFT_PUBQ_V1_8821C) & BIT_MASK_PUBQ_V1_8821C) 6269 #define BIT_SET_PUBQ_V1_8821C(x, v) \ 6270 (BIT_CLEAR_PUBQ_V1_8821C(x) | BIT_PUBQ_V1_8821C(v)) 6271 6272 /* 2 REG_H2C_HEAD_8821C */ 6273 6274 #define BIT_SHIFT_H2C_HEAD_8821C 0 6275 #define BIT_MASK_H2C_HEAD_8821C 0x3ffff 6276 #define BIT_H2C_HEAD_8821C(x) \ 6277 (((x) & BIT_MASK_H2C_HEAD_8821C) << BIT_SHIFT_H2C_HEAD_8821C) 6278 #define BITS_H2C_HEAD_8821C \ 6279 (BIT_MASK_H2C_HEAD_8821C << BIT_SHIFT_H2C_HEAD_8821C) 6280 #define BIT_CLEAR_H2C_HEAD_8821C(x) ((x) & (~BITS_H2C_HEAD_8821C)) 6281 #define BIT_GET_H2C_HEAD_8821C(x) \ 6282 (((x) >> BIT_SHIFT_H2C_HEAD_8821C) & BIT_MASK_H2C_HEAD_8821C) 6283 #define BIT_SET_H2C_HEAD_8821C(x, v) \ 6284 (BIT_CLEAR_H2C_HEAD_8821C(x) | BIT_H2C_HEAD_8821C(v)) 6285 6286 /* 2 REG_H2C_TAIL_8821C */ 6287 6288 #define BIT_SHIFT_H2C_TAIL_8821C 0 6289 #define BIT_MASK_H2C_TAIL_8821C 0x3ffff 6290 #define BIT_H2C_TAIL_8821C(x) \ 6291 (((x) & BIT_MASK_H2C_TAIL_8821C) << BIT_SHIFT_H2C_TAIL_8821C) 6292 #define BITS_H2C_TAIL_8821C \ 6293 (BIT_MASK_H2C_TAIL_8821C << BIT_SHIFT_H2C_TAIL_8821C) 6294 #define BIT_CLEAR_H2C_TAIL_8821C(x) ((x) & (~BITS_H2C_TAIL_8821C)) 6295 #define BIT_GET_H2C_TAIL_8821C(x) \ 6296 (((x) >> BIT_SHIFT_H2C_TAIL_8821C) & BIT_MASK_H2C_TAIL_8821C) 6297 #define BIT_SET_H2C_TAIL_8821C(x, v) \ 6298 (BIT_CLEAR_H2C_TAIL_8821C(x) | BIT_H2C_TAIL_8821C(v)) 6299 6300 /* 2 REG_H2C_READ_ADDR_8821C */ 6301 6302 #define BIT_SHIFT_H2C_READ_ADDR_8821C 0 6303 #define BIT_MASK_H2C_READ_ADDR_8821C 0x3ffff 6304 #define BIT_H2C_READ_ADDR_8821C(x) \ 6305 (((x) & BIT_MASK_H2C_READ_ADDR_8821C) << BIT_SHIFT_H2C_READ_ADDR_8821C) 6306 #define BITS_H2C_READ_ADDR_8821C \ 6307 (BIT_MASK_H2C_READ_ADDR_8821C << BIT_SHIFT_H2C_READ_ADDR_8821C) 6308 #define BIT_CLEAR_H2C_READ_ADDR_8821C(x) ((x) & (~BITS_H2C_READ_ADDR_8821C)) 6309 #define BIT_GET_H2C_READ_ADDR_8821C(x) \ 6310 (((x) >> BIT_SHIFT_H2C_READ_ADDR_8821C) & BIT_MASK_H2C_READ_ADDR_8821C) 6311 #define BIT_SET_H2C_READ_ADDR_8821C(x, v) \ 6312 (BIT_CLEAR_H2C_READ_ADDR_8821C(x) | BIT_H2C_READ_ADDR_8821C(v)) 6313 6314 /* 2 REG_H2C_WR_ADDR_8821C */ 6315 6316 #define BIT_SHIFT_H2C_WR_ADDR_8821C 0 6317 #define BIT_MASK_H2C_WR_ADDR_8821C 0x3ffff 6318 #define BIT_H2C_WR_ADDR_8821C(x) \ 6319 (((x) & BIT_MASK_H2C_WR_ADDR_8821C) << BIT_SHIFT_H2C_WR_ADDR_8821C) 6320 #define BITS_H2C_WR_ADDR_8821C \ 6321 (BIT_MASK_H2C_WR_ADDR_8821C << BIT_SHIFT_H2C_WR_ADDR_8821C) 6322 #define BIT_CLEAR_H2C_WR_ADDR_8821C(x) ((x) & (~BITS_H2C_WR_ADDR_8821C)) 6323 #define BIT_GET_H2C_WR_ADDR_8821C(x) \ 6324 (((x) >> BIT_SHIFT_H2C_WR_ADDR_8821C) & BIT_MASK_H2C_WR_ADDR_8821C) 6325 #define BIT_SET_H2C_WR_ADDR_8821C(x, v) \ 6326 (BIT_CLEAR_H2C_WR_ADDR_8821C(x) | BIT_H2C_WR_ADDR_8821C(v)) 6327 6328 /* 2 REG_H2C_INFO_8821C */ 6329 #define BIT_H2C_SPACE_VLD_8821C BIT(3) 6330 #define BIT_H2C_WR_ADDR_RST_8821C BIT(2) 6331 6332 #define BIT_SHIFT_H2C_LEN_SEL_8821C 0 6333 #define BIT_MASK_H2C_LEN_SEL_8821C 0x3 6334 #define BIT_H2C_LEN_SEL_8821C(x) \ 6335 (((x) & BIT_MASK_H2C_LEN_SEL_8821C) << BIT_SHIFT_H2C_LEN_SEL_8821C) 6336 #define BITS_H2C_LEN_SEL_8821C \ 6337 (BIT_MASK_H2C_LEN_SEL_8821C << BIT_SHIFT_H2C_LEN_SEL_8821C) 6338 #define BIT_CLEAR_H2C_LEN_SEL_8821C(x) ((x) & (~BITS_H2C_LEN_SEL_8821C)) 6339 #define BIT_GET_H2C_LEN_SEL_8821C(x) \ 6340 (((x) >> BIT_SHIFT_H2C_LEN_SEL_8821C) & BIT_MASK_H2C_LEN_SEL_8821C) 6341 #define BIT_SET_H2C_LEN_SEL_8821C(x, v) \ 6342 (BIT_CLEAR_H2C_LEN_SEL_8821C(x) | BIT_H2C_LEN_SEL_8821C(v)) 6343 6344 /* 2 REG_RXDMA_AGG_PG_TH_8821C */ 6345 #define BIT_USB_RXDMA_AGG_EN_8821C BIT(31) 6346 #define BIT_EN_PRE_CALC_8821C BIT(29) 6347 #define BIT_RXAGG_SW_EN_8821C BIT(28) 6348 #define BIT_RXAGG_SW_TRIG_8821C BIT(27) 6349 6350 /* 2 REG_NOT_VALID_8821C */ 6351 6352 #define BIT_SHIFT_PKT_NUM_WOL_8821C 16 6353 #define BIT_MASK_PKT_NUM_WOL_8821C 0xff 6354 #define BIT_PKT_NUM_WOL_8821C(x) \ 6355 (((x) & BIT_MASK_PKT_NUM_WOL_8821C) << BIT_SHIFT_PKT_NUM_WOL_8821C) 6356 #define BITS_PKT_NUM_WOL_8821C \ 6357 (BIT_MASK_PKT_NUM_WOL_8821C << BIT_SHIFT_PKT_NUM_WOL_8821C) 6358 #define BIT_CLEAR_PKT_NUM_WOL_8821C(x) ((x) & (~BITS_PKT_NUM_WOL_8821C)) 6359 #define BIT_GET_PKT_NUM_WOL_8821C(x) \ 6360 (((x) >> BIT_SHIFT_PKT_NUM_WOL_8821C) & BIT_MASK_PKT_NUM_WOL_8821C) 6361 #define BIT_SET_PKT_NUM_WOL_8821C(x, v) \ 6362 (BIT_CLEAR_PKT_NUM_WOL_8821C(x) | BIT_PKT_NUM_WOL_8821C(v)) 6363 6364 #define BIT_SHIFT_DMA_AGG_TO_V1_8821C 8 6365 #define BIT_MASK_DMA_AGG_TO_V1_8821C 0xff 6366 #define BIT_DMA_AGG_TO_V1_8821C(x) \ 6367 (((x) & BIT_MASK_DMA_AGG_TO_V1_8821C) << BIT_SHIFT_DMA_AGG_TO_V1_8821C) 6368 #define BITS_DMA_AGG_TO_V1_8821C \ 6369 (BIT_MASK_DMA_AGG_TO_V1_8821C << BIT_SHIFT_DMA_AGG_TO_V1_8821C) 6370 #define BIT_CLEAR_DMA_AGG_TO_V1_8821C(x) ((x) & (~BITS_DMA_AGG_TO_V1_8821C)) 6371 #define BIT_GET_DMA_AGG_TO_V1_8821C(x) \ 6372 (((x) >> BIT_SHIFT_DMA_AGG_TO_V1_8821C) & BIT_MASK_DMA_AGG_TO_V1_8821C) 6373 #define BIT_SET_DMA_AGG_TO_V1_8821C(x, v) \ 6374 (BIT_CLEAR_DMA_AGG_TO_V1_8821C(x) | BIT_DMA_AGG_TO_V1_8821C(v)) 6375 6376 #define BIT_SHIFT_RXDMA_AGG_PG_TH_8821C 0 6377 #define BIT_MASK_RXDMA_AGG_PG_TH_8821C 0xff 6378 #define BIT_RXDMA_AGG_PG_TH_8821C(x) \ 6379 (((x) & BIT_MASK_RXDMA_AGG_PG_TH_8821C) \ 6380 << BIT_SHIFT_RXDMA_AGG_PG_TH_8821C) 6381 #define BITS_RXDMA_AGG_PG_TH_8821C \ 6382 (BIT_MASK_RXDMA_AGG_PG_TH_8821C << BIT_SHIFT_RXDMA_AGG_PG_TH_8821C) 6383 #define BIT_CLEAR_RXDMA_AGG_PG_TH_8821C(x) ((x) & (~BITS_RXDMA_AGG_PG_TH_8821C)) 6384 #define BIT_GET_RXDMA_AGG_PG_TH_8821C(x) \ 6385 (((x) >> BIT_SHIFT_RXDMA_AGG_PG_TH_8821C) & \ 6386 BIT_MASK_RXDMA_AGG_PG_TH_8821C) 6387 #define BIT_SET_RXDMA_AGG_PG_TH_8821C(x, v) \ 6388 (BIT_CLEAR_RXDMA_AGG_PG_TH_8821C(x) | BIT_RXDMA_AGG_PG_TH_8821C(v)) 6389 6390 /* 2 REG_RXPKT_NUM_8821C */ 6391 6392 #define BIT_SHIFT_RXPKT_NUM_8821C 24 6393 #define BIT_MASK_RXPKT_NUM_8821C 0xff 6394 #define BIT_RXPKT_NUM_8821C(x) \ 6395 (((x) & BIT_MASK_RXPKT_NUM_8821C) << BIT_SHIFT_RXPKT_NUM_8821C) 6396 #define BITS_RXPKT_NUM_8821C \ 6397 (BIT_MASK_RXPKT_NUM_8821C << BIT_SHIFT_RXPKT_NUM_8821C) 6398 #define BIT_CLEAR_RXPKT_NUM_8821C(x) ((x) & (~BITS_RXPKT_NUM_8821C)) 6399 #define BIT_GET_RXPKT_NUM_8821C(x) \ 6400 (((x) >> BIT_SHIFT_RXPKT_NUM_8821C) & BIT_MASK_RXPKT_NUM_8821C) 6401 #define BIT_SET_RXPKT_NUM_8821C(x, v) \ 6402 (BIT_CLEAR_RXPKT_NUM_8821C(x) | BIT_RXPKT_NUM_8821C(v)) 6403 6404 #define BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8821C 20 6405 #define BIT_MASK_FW_UPD_RDPTR19_TO_16_8821C 0xf 6406 #define BIT_FW_UPD_RDPTR19_TO_16_8821C(x) \ 6407 (((x) & BIT_MASK_FW_UPD_RDPTR19_TO_16_8821C) \ 6408 << BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8821C) 6409 #define BITS_FW_UPD_RDPTR19_TO_16_8821C \ 6410 (BIT_MASK_FW_UPD_RDPTR19_TO_16_8821C \ 6411 << BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8821C) 6412 #define BIT_CLEAR_FW_UPD_RDPTR19_TO_16_8821C(x) \ 6413 ((x) & (~BITS_FW_UPD_RDPTR19_TO_16_8821C)) 6414 #define BIT_GET_FW_UPD_RDPTR19_TO_16_8821C(x) \ 6415 (((x) >> BIT_SHIFT_FW_UPD_RDPTR19_TO_16_8821C) & \ 6416 BIT_MASK_FW_UPD_RDPTR19_TO_16_8821C) 6417 #define BIT_SET_FW_UPD_RDPTR19_TO_16_8821C(x, v) \ 6418 (BIT_CLEAR_FW_UPD_RDPTR19_TO_16_8821C(x) | \ 6419 BIT_FW_UPD_RDPTR19_TO_16_8821C(v)) 6420 6421 #define BIT_RXDMA_REQ_8821C BIT(19) 6422 #define BIT_RW_RELEASE_EN_8821C BIT(18) 6423 #define BIT_RXDMA_IDLE_8821C BIT(17) 6424 #define BIT_RXPKT_RELEASE_POLL_8821C BIT(16) 6425 6426 #define BIT_SHIFT_FW_UPD_RDPTR_8821C 0 6427 #define BIT_MASK_FW_UPD_RDPTR_8821C 0xffff 6428 #define BIT_FW_UPD_RDPTR_8821C(x) \ 6429 (((x) & BIT_MASK_FW_UPD_RDPTR_8821C) << BIT_SHIFT_FW_UPD_RDPTR_8821C) 6430 #define BITS_FW_UPD_RDPTR_8821C \ 6431 (BIT_MASK_FW_UPD_RDPTR_8821C << BIT_SHIFT_FW_UPD_RDPTR_8821C) 6432 #define BIT_CLEAR_FW_UPD_RDPTR_8821C(x) ((x) & (~BITS_FW_UPD_RDPTR_8821C)) 6433 #define BIT_GET_FW_UPD_RDPTR_8821C(x) \ 6434 (((x) >> BIT_SHIFT_FW_UPD_RDPTR_8821C) & BIT_MASK_FW_UPD_RDPTR_8821C) 6435 #define BIT_SET_FW_UPD_RDPTR_8821C(x, v) \ 6436 (BIT_CLEAR_FW_UPD_RDPTR_8821C(x) | BIT_FW_UPD_RDPTR_8821C(v)) 6437 6438 /* 2 REG_RXDMA_STATUS_8821C */ 6439 #define BIT_C2H_PKT_OVF_8821C BIT(7) 6440 #define BIT_AGG_CONFGI_ISSUE_8821C BIT(6) 6441 #define BIT_FW_POLL_ISSUE_8821C BIT(5) 6442 #define BIT_RX_DATA_UDN_8821C BIT(4) 6443 #define BIT_RX_SFF_UDN_8821C BIT(3) 6444 #define BIT_RX_SFF_OVF_8821C BIT(2) 6445 #define BIT_RXPKT_OVF_8821C BIT(0) 6446 6447 /* 2 REG_RXDMA_DPR_8821C */ 6448 6449 #define BIT_SHIFT_RDE_DEBUG_8821C 0 6450 #define BIT_MASK_RDE_DEBUG_8821C 0xffffffffL 6451 #define BIT_RDE_DEBUG_8821C(x) \ 6452 (((x) & BIT_MASK_RDE_DEBUG_8821C) << BIT_SHIFT_RDE_DEBUG_8821C) 6453 #define BITS_RDE_DEBUG_8821C \ 6454 (BIT_MASK_RDE_DEBUG_8821C << BIT_SHIFT_RDE_DEBUG_8821C) 6455 #define BIT_CLEAR_RDE_DEBUG_8821C(x) ((x) & (~BITS_RDE_DEBUG_8821C)) 6456 #define BIT_GET_RDE_DEBUG_8821C(x) \ 6457 (((x) >> BIT_SHIFT_RDE_DEBUG_8821C) & BIT_MASK_RDE_DEBUG_8821C) 6458 #define BIT_SET_RDE_DEBUG_8821C(x, v) \ 6459 (BIT_CLEAR_RDE_DEBUG_8821C(x) | BIT_RDE_DEBUG_8821C(v)) 6460 6461 /* 2 REG_RXDMA_MODE_8821C */ 6462 6463 #define BIT_SHIFT_PKTNUM_TH_V2_8821C 24 6464 #define BIT_MASK_PKTNUM_TH_V2_8821C 0x1f 6465 #define BIT_PKTNUM_TH_V2_8821C(x) \ 6466 (((x) & BIT_MASK_PKTNUM_TH_V2_8821C) << BIT_SHIFT_PKTNUM_TH_V2_8821C) 6467 #define BITS_PKTNUM_TH_V2_8821C \ 6468 (BIT_MASK_PKTNUM_TH_V2_8821C << BIT_SHIFT_PKTNUM_TH_V2_8821C) 6469 #define BIT_CLEAR_PKTNUM_TH_V2_8821C(x) ((x) & (~BITS_PKTNUM_TH_V2_8821C)) 6470 #define BIT_GET_PKTNUM_TH_V2_8821C(x) \ 6471 (((x) >> BIT_SHIFT_PKTNUM_TH_V2_8821C) & BIT_MASK_PKTNUM_TH_V2_8821C) 6472 #define BIT_SET_PKTNUM_TH_V2_8821C(x, v) \ 6473 (BIT_CLEAR_PKTNUM_TH_V2_8821C(x) | BIT_PKTNUM_TH_V2_8821C(v)) 6474 6475 #define BIT_TXBA_BREAK_USBAGG_8821C BIT(23) 6476 6477 #define BIT_SHIFT_PKTLEN_PARA_8821C 16 6478 #define BIT_MASK_PKTLEN_PARA_8821C 0x7 6479 #define BIT_PKTLEN_PARA_8821C(x) \ 6480 (((x) & BIT_MASK_PKTLEN_PARA_8821C) << BIT_SHIFT_PKTLEN_PARA_8821C) 6481 #define BITS_PKTLEN_PARA_8821C \ 6482 (BIT_MASK_PKTLEN_PARA_8821C << BIT_SHIFT_PKTLEN_PARA_8821C) 6483 #define BIT_CLEAR_PKTLEN_PARA_8821C(x) ((x) & (~BITS_PKTLEN_PARA_8821C)) 6484 #define BIT_GET_PKTLEN_PARA_8821C(x) \ 6485 (((x) >> BIT_SHIFT_PKTLEN_PARA_8821C) & BIT_MASK_PKTLEN_PARA_8821C) 6486 #define BIT_SET_PKTLEN_PARA_8821C(x, v) \ 6487 (BIT_CLEAR_PKTLEN_PARA_8821C(x) | BIT_PKTLEN_PARA_8821C(v)) 6488 6489 #define BIT_SHIFT_BURST_SIZE_8821C 4 6490 #define BIT_MASK_BURST_SIZE_8821C 0x3 6491 #define BIT_BURST_SIZE_8821C(x) \ 6492 (((x) & BIT_MASK_BURST_SIZE_8821C) << BIT_SHIFT_BURST_SIZE_8821C) 6493 #define BITS_BURST_SIZE_8821C \ 6494 (BIT_MASK_BURST_SIZE_8821C << BIT_SHIFT_BURST_SIZE_8821C) 6495 #define BIT_CLEAR_BURST_SIZE_8821C(x) ((x) & (~BITS_BURST_SIZE_8821C)) 6496 #define BIT_GET_BURST_SIZE_8821C(x) \ 6497 (((x) >> BIT_SHIFT_BURST_SIZE_8821C) & BIT_MASK_BURST_SIZE_8821C) 6498 #define BIT_SET_BURST_SIZE_8821C(x, v) \ 6499 (BIT_CLEAR_BURST_SIZE_8821C(x) | BIT_BURST_SIZE_8821C(v)) 6500 6501 #define BIT_SHIFT_BURST_CNT_8821C 2 6502 #define BIT_MASK_BURST_CNT_8821C 0x3 6503 #define BIT_BURST_CNT_8821C(x) \ 6504 (((x) & BIT_MASK_BURST_CNT_8821C) << BIT_SHIFT_BURST_CNT_8821C) 6505 #define BITS_BURST_CNT_8821C \ 6506 (BIT_MASK_BURST_CNT_8821C << BIT_SHIFT_BURST_CNT_8821C) 6507 #define BIT_CLEAR_BURST_CNT_8821C(x) ((x) & (~BITS_BURST_CNT_8821C)) 6508 #define BIT_GET_BURST_CNT_8821C(x) \ 6509 (((x) >> BIT_SHIFT_BURST_CNT_8821C) & BIT_MASK_BURST_CNT_8821C) 6510 #define BIT_SET_BURST_CNT_8821C(x, v) \ 6511 (BIT_CLEAR_BURST_CNT_8821C(x) | BIT_BURST_CNT_8821C(v)) 6512 6513 #define BIT_DMA_MODE_8821C BIT(1) 6514 6515 /* 2 REG_C2H_PKT_8821C */ 6516 6517 #define BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8821C 24 6518 #define BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8821C 0xf 6519 #define BIT_R_C2H_STR_ADDR_16_TO_19_8821C(x) \ 6520 (((x) & BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8821C) \ 6521 << BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8821C) 6522 #define BITS_R_C2H_STR_ADDR_16_TO_19_8821C \ 6523 (BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8821C \ 6524 << BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8821C) 6525 #define BIT_CLEAR_R_C2H_STR_ADDR_16_TO_19_8821C(x) \ 6526 ((x) & (~BITS_R_C2H_STR_ADDR_16_TO_19_8821C)) 6527 #define BIT_GET_R_C2H_STR_ADDR_16_TO_19_8821C(x) \ 6528 (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_16_TO_19_8821C) & \ 6529 BIT_MASK_R_C2H_STR_ADDR_16_TO_19_8821C) 6530 #define BIT_SET_R_C2H_STR_ADDR_16_TO_19_8821C(x, v) \ 6531 (BIT_CLEAR_R_C2H_STR_ADDR_16_TO_19_8821C(x) | \ 6532 BIT_R_C2H_STR_ADDR_16_TO_19_8821C(v)) 6533 6534 #define BIT_R_C2H_PKT_REQ_8821C BIT(16) 6535 6536 #define BIT_SHIFT_R_C2H_STR_ADDR_8821C 0 6537 #define BIT_MASK_R_C2H_STR_ADDR_8821C 0xffff 6538 #define BIT_R_C2H_STR_ADDR_8821C(x) \ 6539 (((x) & BIT_MASK_R_C2H_STR_ADDR_8821C) \ 6540 << BIT_SHIFT_R_C2H_STR_ADDR_8821C) 6541 #define BITS_R_C2H_STR_ADDR_8821C \ 6542 (BIT_MASK_R_C2H_STR_ADDR_8821C << BIT_SHIFT_R_C2H_STR_ADDR_8821C) 6543 #define BIT_CLEAR_R_C2H_STR_ADDR_8821C(x) ((x) & (~BITS_R_C2H_STR_ADDR_8821C)) 6544 #define BIT_GET_R_C2H_STR_ADDR_8821C(x) \ 6545 (((x) >> BIT_SHIFT_R_C2H_STR_ADDR_8821C) & \ 6546 BIT_MASK_R_C2H_STR_ADDR_8821C) 6547 #define BIT_SET_R_C2H_STR_ADDR_8821C(x, v) \ 6548 (BIT_CLEAR_R_C2H_STR_ADDR_8821C(x) | BIT_R_C2H_STR_ADDR_8821C(v)) 6549 6550 /* 2 REG_FWFF_C2H_8821C */ 6551 6552 #define BIT_SHIFT_C2H_DMA_ADDR_8821C 0 6553 #define BIT_MASK_C2H_DMA_ADDR_8821C 0x3ffff 6554 #define BIT_C2H_DMA_ADDR_8821C(x) \ 6555 (((x) & BIT_MASK_C2H_DMA_ADDR_8821C) << BIT_SHIFT_C2H_DMA_ADDR_8821C) 6556 #define BITS_C2H_DMA_ADDR_8821C \ 6557 (BIT_MASK_C2H_DMA_ADDR_8821C << BIT_SHIFT_C2H_DMA_ADDR_8821C) 6558 #define BIT_CLEAR_C2H_DMA_ADDR_8821C(x) ((x) & (~BITS_C2H_DMA_ADDR_8821C)) 6559 #define BIT_GET_C2H_DMA_ADDR_8821C(x) \ 6560 (((x) >> BIT_SHIFT_C2H_DMA_ADDR_8821C) & BIT_MASK_C2H_DMA_ADDR_8821C) 6561 #define BIT_SET_C2H_DMA_ADDR_8821C(x, v) \ 6562 (BIT_CLEAR_C2H_DMA_ADDR_8821C(x) | BIT_C2H_DMA_ADDR_8821C(v)) 6563 6564 /* 2 REG_FWFF_CTRL_8821C */ 6565 #define BIT_FWFF_DMAPKT_REQ_8821C BIT(31) 6566 6567 #define BIT_SHIFT_FWFF_DMA_PKT_NUM_8821C 16 6568 #define BIT_MASK_FWFF_DMA_PKT_NUM_8821C 0xff 6569 #define BIT_FWFF_DMA_PKT_NUM_8821C(x) \ 6570 (((x) & BIT_MASK_FWFF_DMA_PKT_NUM_8821C) \ 6571 << BIT_SHIFT_FWFF_DMA_PKT_NUM_8821C) 6572 #define BITS_FWFF_DMA_PKT_NUM_8821C \ 6573 (BIT_MASK_FWFF_DMA_PKT_NUM_8821C << BIT_SHIFT_FWFF_DMA_PKT_NUM_8821C) 6574 #define BIT_CLEAR_FWFF_DMA_PKT_NUM_8821C(x) \ 6575 ((x) & (~BITS_FWFF_DMA_PKT_NUM_8821C)) 6576 #define BIT_GET_FWFF_DMA_PKT_NUM_8821C(x) \ 6577 (((x) >> BIT_SHIFT_FWFF_DMA_PKT_NUM_8821C) & \ 6578 BIT_MASK_FWFF_DMA_PKT_NUM_8821C) 6579 #define BIT_SET_FWFF_DMA_PKT_NUM_8821C(x, v) \ 6580 (BIT_CLEAR_FWFF_DMA_PKT_NUM_8821C(x) | BIT_FWFF_DMA_PKT_NUM_8821C(v)) 6581 6582 #define BIT_SHIFT_FWFF_STR_ADDR_8821C 0 6583 #define BIT_MASK_FWFF_STR_ADDR_8821C 0xffff 6584 #define BIT_FWFF_STR_ADDR_8821C(x) \ 6585 (((x) & BIT_MASK_FWFF_STR_ADDR_8821C) << BIT_SHIFT_FWFF_STR_ADDR_8821C) 6586 #define BITS_FWFF_STR_ADDR_8821C \ 6587 (BIT_MASK_FWFF_STR_ADDR_8821C << BIT_SHIFT_FWFF_STR_ADDR_8821C) 6588 #define BIT_CLEAR_FWFF_STR_ADDR_8821C(x) ((x) & (~BITS_FWFF_STR_ADDR_8821C)) 6589 #define BIT_GET_FWFF_STR_ADDR_8821C(x) \ 6590 (((x) >> BIT_SHIFT_FWFF_STR_ADDR_8821C) & BIT_MASK_FWFF_STR_ADDR_8821C) 6591 #define BIT_SET_FWFF_STR_ADDR_8821C(x, v) \ 6592 (BIT_CLEAR_FWFF_STR_ADDR_8821C(x) | BIT_FWFF_STR_ADDR_8821C(v)) 6593 6594 /* 2 REG_FWFF_PKT_INFO_8821C */ 6595 6596 #define BIT_SHIFT_FWFF_PKT_QUEUED_8821C 16 6597 #define BIT_MASK_FWFF_PKT_QUEUED_8821C 0xff 6598 #define BIT_FWFF_PKT_QUEUED_8821C(x) \ 6599 (((x) & BIT_MASK_FWFF_PKT_QUEUED_8821C) \ 6600 << BIT_SHIFT_FWFF_PKT_QUEUED_8821C) 6601 #define BITS_FWFF_PKT_QUEUED_8821C \ 6602 (BIT_MASK_FWFF_PKT_QUEUED_8821C << BIT_SHIFT_FWFF_PKT_QUEUED_8821C) 6603 #define BIT_CLEAR_FWFF_PKT_QUEUED_8821C(x) ((x) & (~BITS_FWFF_PKT_QUEUED_8821C)) 6604 #define BIT_GET_FWFF_PKT_QUEUED_8821C(x) \ 6605 (((x) >> BIT_SHIFT_FWFF_PKT_QUEUED_8821C) & \ 6606 BIT_MASK_FWFF_PKT_QUEUED_8821C) 6607 #define BIT_SET_FWFF_PKT_QUEUED_8821C(x, v) \ 6608 (BIT_CLEAR_FWFF_PKT_QUEUED_8821C(x) | BIT_FWFF_PKT_QUEUED_8821C(v)) 6609 6610 #define BIT_SHIFT_FWFF_PKT_STR_ADDR_8821C 0 6611 #define BIT_MASK_FWFF_PKT_STR_ADDR_8821C 0xffff 6612 #define BIT_FWFF_PKT_STR_ADDR_8821C(x) \ 6613 (((x) & BIT_MASK_FWFF_PKT_STR_ADDR_8821C) \ 6614 << BIT_SHIFT_FWFF_PKT_STR_ADDR_8821C) 6615 #define BITS_FWFF_PKT_STR_ADDR_8821C \ 6616 (BIT_MASK_FWFF_PKT_STR_ADDR_8821C << BIT_SHIFT_FWFF_PKT_STR_ADDR_8821C) 6617 #define BIT_CLEAR_FWFF_PKT_STR_ADDR_8821C(x) \ 6618 ((x) & (~BITS_FWFF_PKT_STR_ADDR_8821C)) 6619 #define BIT_GET_FWFF_PKT_STR_ADDR_8821C(x) \ 6620 (((x) >> BIT_SHIFT_FWFF_PKT_STR_ADDR_8821C) & \ 6621 BIT_MASK_FWFF_PKT_STR_ADDR_8821C) 6622 #define BIT_SET_FWFF_PKT_STR_ADDR_8821C(x, v) \ 6623 (BIT_CLEAR_FWFF_PKT_STR_ADDR_8821C(x) | BIT_FWFF_PKT_STR_ADDR_8821C(v)) 6624 6625 /* 2 REG_DDMA_CH0SA_8821C */ 6626 6627 #define BIT_SHIFT_DDMACH0_SA_8821C 0 6628 #define BIT_MASK_DDMACH0_SA_8821C 0xffffffffL 6629 #define BIT_DDMACH0_SA_8821C(x) \ 6630 (((x) & BIT_MASK_DDMACH0_SA_8821C) << BIT_SHIFT_DDMACH0_SA_8821C) 6631 #define BITS_DDMACH0_SA_8821C \ 6632 (BIT_MASK_DDMACH0_SA_8821C << BIT_SHIFT_DDMACH0_SA_8821C) 6633 #define BIT_CLEAR_DDMACH0_SA_8821C(x) ((x) & (~BITS_DDMACH0_SA_8821C)) 6634 #define BIT_GET_DDMACH0_SA_8821C(x) \ 6635 (((x) >> BIT_SHIFT_DDMACH0_SA_8821C) & BIT_MASK_DDMACH0_SA_8821C) 6636 #define BIT_SET_DDMACH0_SA_8821C(x, v) \ 6637 (BIT_CLEAR_DDMACH0_SA_8821C(x) | BIT_DDMACH0_SA_8821C(v)) 6638 6639 /* 2 REG_DDMA_CH0DA_8821C */ 6640 6641 #define BIT_SHIFT_DDMACH0_DA_8821C 0 6642 #define BIT_MASK_DDMACH0_DA_8821C 0xffffffffL 6643 #define BIT_DDMACH0_DA_8821C(x) \ 6644 (((x) & BIT_MASK_DDMACH0_DA_8821C) << BIT_SHIFT_DDMACH0_DA_8821C) 6645 #define BITS_DDMACH0_DA_8821C \ 6646 (BIT_MASK_DDMACH0_DA_8821C << BIT_SHIFT_DDMACH0_DA_8821C) 6647 #define BIT_CLEAR_DDMACH0_DA_8821C(x) ((x) & (~BITS_DDMACH0_DA_8821C)) 6648 #define BIT_GET_DDMACH0_DA_8821C(x) \ 6649 (((x) >> BIT_SHIFT_DDMACH0_DA_8821C) & BIT_MASK_DDMACH0_DA_8821C) 6650 #define BIT_SET_DDMACH0_DA_8821C(x, v) \ 6651 (BIT_CLEAR_DDMACH0_DA_8821C(x) | BIT_DDMACH0_DA_8821C(v)) 6652 6653 /* 2 REG_DDMA_CH0CTRL_8821C */ 6654 #define BIT_DDMACH0_OWN_8821C BIT(31) 6655 #define BIT_DDMACH0_IDMEM_ERR_8821C BIT(30) 6656 #define BIT_DDMACH0_CHKSUM_EN_8821C BIT(29) 6657 #define BIT_DDMACH0_DA_W_DISABLE_8821C BIT(28) 6658 #define BIT_DDMACH0_CHKSUM_STS_8821C BIT(27) 6659 #define BIT_DDMACH0_DDMA_MODE_8821C BIT(26) 6660 #define BIT_DDMACH0_RESET_CHKSUM_STS_8821C BIT(25) 6661 #define BIT_DDMACH0_CHKSUM_CONT_8821C BIT(24) 6662 6663 #define BIT_SHIFT_DDMACH0_DLEN_8821C 0 6664 #define BIT_MASK_DDMACH0_DLEN_8821C 0x3ffff 6665 #define BIT_DDMACH0_DLEN_8821C(x) \ 6666 (((x) & BIT_MASK_DDMACH0_DLEN_8821C) << BIT_SHIFT_DDMACH0_DLEN_8821C) 6667 #define BITS_DDMACH0_DLEN_8821C \ 6668 (BIT_MASK_DDMACH0_DLEN_8821C << BIT_SHIFT_DDMACH0_DLEN_8821C) 6669 #define BIT_CLEAR_DDMACH0_DLEN_8821C(x) ((x) & (~BITS_DDMACH0_DLEN_8821C)) 6670 #define BIT_GET_DDMACH0_DLEN_8821C(x) \ 6671 (((x) >> BIT_SHIFT_DDMACH0_DLEN_8821C) & BIT_MASK_DDMACH0_DLEN_8821C) 6672 #define BIT_SET_DDMACH0_DLEN_8821C(x, v) \ 6673 (BIT_CLEAR_DDMACH0_DLEN_8821C(x) | BIT_DDMACH0_DLEN_8821C(v)) 6674 6675 /* 2 REG_DDMA_CH1SA_8821C */ 6676 6677 #define BIT_SHIFT_DDMACH1_SA_8821C 0 6678 #define BIT_MASK_DDMACH1_SA_8821C 0xffffffffL 6679 #define BIT_DDMACH1_SA_8821C(x) \ 6680 (((x) & BIT_MASK_DDMACH1_SA_8821C) << BIT_SHIFT_DDMACH1_SA_8821C) 6681 #define BITS_DDMACH1_SA_8821C \ 6682 (BIT_MASK_DDMACH1_SA_8821C << BIT_SHIFT_DDMACH1_SA_8821C) 6683 #define BIT_CLEAR_DDMACH1_SA_8821C(x) ((x) & (~BITS_DDMACH1_SA_8821C)) 6684 #define BIT_GET_DDMACH1_SA_8821C(x) \ 6685 (((x) >> BIT_SHIFT_DDMACH1_SA_8821C) & BIT_MASK_DDMACH1_SA_8821C) 6686 #define BIT_SET_DDMACH1_SA_8821C(x, v) \ 6687 (BIT_CLEAR_DDMACH1_SA_8821C(x) | BIT_DDMACH1_SA_8821C(v)) 6688 6689 /* 2 REG_DDMA_CH1DA_8821C */ 6690 6691 #define BIT_SHIFT_DDMACH1_DA_8821C 0 6692 #define BIT_MASK_DDMACH1_DA_8821C 0xffffffffL 6693 #define BIT_DDMACH1_DA_8821C(x) \ 6694 (((x) & BIT_MASK_DDMACH1_DA_8821C) << BIT_SHIFT_DDMACH1_DA_8821C) 6695 #define BITS_DDMACH1_DA_8821C \ 6696 (BIT_MASK_DDMACH1_DA_8821C << BIT_SHIFT_DDMACH1_DA_8821C) 6697 #define BIT_CLEAR_DDMACH1_DA_8821C(x) ((x) & (~BITS_DDMACH1_DA_8821C)) 6698 #define BIT_GET_DDMACH1_DA_8821C(x) \ 6699 (((x) >> BIT_SHIFT_DDMACH1_DA_8821C) & BIT_MASK_DDMACH1_DA_8821C) 6700 #define BIT_SET_DDMACH1_DA_8821C(x, v) \ 6701 (BIT_CLEAR_DDMACH1_DA_8821C(x) | BIT_DDMACH1_DA_8821C(v)) 6702 6703 /* 2 REG_DDMA_CH1CTRL_8821C */ 6704 #define BIT_DDMACH1_OWN_8821C BIT(31) 6705 #define BIT_DDMACH1_IDMEM_ERR_8821C BIT(30) 6706 #define BIT_DDMACH1_CHKSUM_EN_8821C BIT(29) 6707 #define BIT_DDMACH1_DA_W_DISABLE_8821C BIT(28) 6708 #define BIT_DDMACH1_CHKSUM_STS_8821C BIT(27) 6709 #define BIT_DDMACH1_DDMA_MODE_8821C BIT(26) 6710 #define BIT_DDMACH1_RESET_CHKSUM_STS_8821C BIT(25) 6711 #define BIT_DDMACH1_CHKSUM_CONT_8821C BIT(24) 6712 6713 #define BIT_SHIFT_DDMACH1_DLEN_8821C 0 6714 #define BIT_MASK_DDMACH1_DLEN_8821C 0x3ffff 6715 #define BIT_DDMACH1_DLEN_8821C(x) \ 6716 (((x) & BIT_MASK_DDMACH1_DLEN_8821C) << BIT_SHIFT_DDMACH1_DLEN_8821C) 6717 #define BITS_DDMACH1_DLEN_8821C \ 6718 (BIT_MASK_DDMACH1_DLEN_8821C << BIT_SHIFT_DDMACH1_DLEN_8821C) 6719 #define BIT_CLEAR_DDMACH1_DLEN_8821C(x) ((x) & (~BITS_DDMACH1_DLEN_8821C)) 6720 #define BIT_GET_DDMACH1_DLEN_8821C(x) \ 6721 (((x) >> BIT_SHIFT_DDMACH1_DLEN_8821C) & BIT_MASK_DDMACH1_DLEN_8821C) 6722 #define BIT_SET_DDMACH1_DLEN_8821C(x, v) \ 6723 (BIT_CLEAR_DDMACH1_DLEN_8821C(x) | BIT_DDMACH1_DLEN_8821C(v)) 6724 6725 /* 2 REG_DDMA_CH2SA_8821C */ 6726 6727 #define BIT_SHIFT_DDMACH2_SA_8821C 0 6728 #define BIT_MASK_DDMACH2_SA_8821C 0xffffffffL 6729 #define BIT_DDMACH2_SA_8821C(x) \ 6730 (((x) & BIT_MASK_DDMACH2_SA_8821C) << BIT_SHIFT_DDMACH2_SA_8821C) 6731 #define BITS_DDMACH2_SA_8821C \ 6732 (BIT_MASK_DDMACH2_SA_8821C << BIT_SHIFT_DDMACH2_SA_8821C) 6733 #define BIT_CLEAR_DDMACH2_SA_8821C(x) ((x) & (~BITS_DDMACH2_SA_8821C)) 6734 #define BIT_GET_DDMACH2_SA_8821C(x) \ 6735 (((x) >> BIT_SHIFT_DDMACH2_SA_8821C) & BIT_MASK_DDMACH2_SA_8821C) 6736 #define BIT_SET_DDMACH2_SA_8821C(x, v) \ 6737 (BIT_CLEAR_DDMACH2_SA_8821C(x) | BIT_DDMACH2_SA_8821C(v)) 6738 6739 /* 2 REG_DDMA_CH2DA_8821C */ 6740 6741 #define BIT_SHIFT_DDMACH2_DA_8821C 0 6742 #define BIT_MASK_DDMACH2_DA_8821C 0xffffffffL 6743 #define BIT_DDMACH2_DA_8821C(x) \ 6744 (((x) & BIT_MASK_DDMACH2_DA_8821C) << BIT_SHIFT_DDMACH2_DA_8821C) 6745 #define BITS_DDMACH2_DA_8821C \ 6746 (BIT_MASK_DDMACH2_DA_8821C << BIT_SHIFT_DDMACH2_DA_8821C) 6747 #define BIT_CLEAR_DDMACH2_DA_8821C(x) ((x) & (~BITS_DDMACH2_DA_8821C)) 6748 #define BIT_GET_DDMACH2_DA_8821C(x) \ 6749 (((x) >> BIT_SHIFT_DDMACH2_DA_8821C) & BIT_MASK_DDMACH2_DA_8821C) 6750 #define BIT_SET_DDMACH2_DA_8821C(x, v) \ 6751 (BIT_CLEAR_DDMACH2_DA_8821C(x) | BIT_DDMACH2_DA_8821C(v)) 6752 6753 /* 2 REG_DDMA_CH2CTRL_8821C */ 6754 #define BIT_DDMACH2_OWN_8821C BIT(31) 6755 #define BIT_DDMACH2_IDMEM_ERR_8821C BIT(30) 6756 #define BIT_DDMACH2_CHKSUM_EN_8821C BIT(29) 6757 #define BIT_DDMACH2_DA_W_DISABLE_8821C BIT(28) 6758 #define BIT_DDMACH2_CHKSUM_STS_8821C BIT(27) 6759 #define BIT_DDMACH2_DDMA_MODE_8821C BIT(26) 6760 #define BIT_DDMACH2_RESET_CHKSUM_STS_8821C BIT(25) 6761 #define BIT_DDMACH2_CHKSUM_CONT_8821C BIT(24) 6762 6763 #define BIT_SHIFT_DDMACH2_DLEN_8821C 0 6764 #define BIT_MASK_DDMACH2_DLEN_8821C 0x3ffff 6765 #define BIT_DDMACH2_DLEN_8821C(x) \ 6766 (((x) & BIT_MASK_DDMACH2_DLEN_8821C) << BIT_SHIFT_DDMACH2_DLEN_8821C) 6767 #define BITS_DDMACH2_DLEN_8821C \ 6768 (BIT_MASK_DDMACH2_DLEN_8821C << BIT_SHIFT_DDMACH2_DLEN_8821C) 6769 #define BIT_CLEAR_DDMACH2_DLEN_8821C(x) ((x) & (~BITS_DDMACH2_DLEN_8821C)) 6770 #define BIT_GET_DDMACH2_DLEN_8821C(x) \ 6771 (((x) >> BIT_SHIFT_DDMACH2_DLEN_8821C) & BIT_MASK_DDMACH2_DLEN_8821C) 6772 #define BIT_SET_DDMACH2_DLEN_8821C(x, v) \ 6773 (BIT_CLEAR_DDMACH2_DLEN_8821C(x) | BIT_DDMACH2_DLEN_8821C(v)) 6774 6775 /* 2 REG_DDMA_CH3SA_8821C */ 6776 6777 #define BIT_SHIFT_DDMACH3_SA_8821C 0 6778 #define BIT_MASK_DDMACH3_SA_8821C 0xffffffffL 6779 #define BIT_DDMACH3_SA_8821C(x) \ 6780 (((x) & BIT_MASK_DDMACH3_SA_8821C) << BIT_SHIFT_DDMACH3_SA_8821C) 6781 #define BITS_DDMACH3_SA_8821C \ 6782 (BIT_MASK_DDMACH3_SA_8821C << BIT_SHIFT_DDMACH3_SA_8821C) 6783 #define BIT_CLEAR_DDMACH3_SA_8821C(x) ((x) & (~BITS_DDMACH3_SA_8821C)) 6784 #define BIT_GET_DDMACH3_SA_8821C(x) \ 6785 (((x) >> BIT_SHIFT_DDMACH3_SA_8821C) & BIT_MASK_DDMACH3_SA_8821C) 6786 #define BIT_SET_DDMACH3_SA_8821C(x, v) \ 6787 (BIT_CLEAR_DDMACH3_SA_8821C(x) | BIT_DDMACH3_SA_8821C(v)) 6788 6789 /* 2 REG_DDMA_CH3DA_8821C */ 6790 6791 #define BIT_SHIFT_DDMACH3_DA_8821C 0 6792 #define BIT_MASK_DDMACH3_DA_8821C 0xffffffffL 6793 #define BIT_DDMACH3_DA_8821C(x) \ 6794 (((x) & BIT_MASK_DDMACH3_DA_8821C) << BIT_SHIFT_DDMACH3_DA_8821C) 6795 #define BITS_DDMACH3_DA_8821C \ 6796 (BIT_MASK_DDMACH3_DA_8821C << BIT_SHIFT_DDMACH3_DA_8821C) 6797 #define BIT_CLEAR_DDMACH3_DA_8821C(x) ((x) & (~BITS_DDMACH3_DA_8821C)) 6798 #define BIT_GET_DDMACH3_DA_8821C(x) \ 6799 (((x) >> BIT_SHIFT_DDMACH3_DA_8821C) & BIT_MASK_DDMACH3_DA_8821C) 6800 #define BIT_SET_DDMACH3_DA_8821C(x, v) \ 6801 (BIT_CLEAR_DDMACH3_DA_8821C(x) | BIT_DDMACH3_DA_8821C(v)) 6802 6803 /* 2 REG_DDMA_CH3CTRL_8821C */ 6804 #define BIT_DDMACH3_OWN_8821C BIT(31) 6805 #define BIT_DDMACH3_IDMEM_ERR_8821C BIT(30) 6806 #define BIT_DDMACH3_CHKSUM_EN_8821C BIT(29) 6807 #define BIT_DDMACH3_DA_W_DISABLE_8821C BIT(28) 6808 #define BIT_DDMACH3_CHKSUM_STS_8821C BIT(27) 6809 #define BIT_DDMACH3_DDMA_MODE_8821C BIT(26) 6810 #define BIT_DDMACH3_RESET_CHKSUM_STS_8821C BIT(25) 6811 #define BIT_DDMACH3_CHKSUM_CONT_8821C BIT(24) 6812 6813 #define BIT_SHIFT_DDMACH3_DLEN_8821C 0 6814 #define BIT_MASK_DDMACH3_DLEN_8821C 0x3ffff 6815 #define BIT_DDMACH3_DLEN_8821C(x) \ 6816 (((x) & BIT_MASK_DDMACH3_DLEN_8821C) << BIT_SHIFT_DDMACH3_DLEN_8821C) 6817 #define BITS_DDMACH3_DLEN_8821C \ 6818 (BIT_MASK_DDMACH3_DLEN_8821C << BIT_SHIFT_DDMACH3_DLEN_8821C) 6819 #define BIT_CLEAR_DDMACH3_DLEN_8821C(x) ((x) & (~BITS_DDMACH3_DLEN_8821C)) 6820 #define BIT_GET_DDMACH3_DLEN_8821C(x) \ 6821 (((x) >> BIT_SHIFT_DDMACH3_DLEN_8821C) & BIT_MASK_DDMACH3_DLEN_8821C) 6822 #define BIT_SET_DDMACH3_DLEN_8821C(x, v) \ 6823 (BIT_CLEAR_DDMACH3_DLEN_8821C(x) | BIT_DDMACH3_DLEN_8821C(v)) 6824 6825 /* 2 REG_DDMA_CH4SA_8821C */ 6826 6827 #define BIT_SHIFT_DDMACH4_SA_8821C 0 6828 #define BIT_MASK_DDMACH4_SA_8821C 0xffffffffL 6829 #define BIT_DDMACH4_SA_8821C(x) \ 6830 (((x) & BIT_MASK_DDMACH4_SA_8821C) << BIT_SHIFT_DDMACH4_SA_8821C) 6831 #define BITS_DDMACH4_SA_8821C \ 6832 (BIT_MASK_DDMACH4_SA_8821C << BIT_SHIFT_DDMACH4_SA_8821C) 6833 #define BIT_CLEAR_DDMACH4_SA_8821C(x) ((x) & (~BITS_DDMACH4_SA_8821C)) 6834 #define BIT_GET_DDMACH4_SA_8821C(x) \ 6835 (((x) >> BIT_SHIFT_DDMACH4_SA_8821C) & BIT_MASK_DDMACH4_SA_8821C) 6836 #define BIT_SET_DDMACH4_SA_8821C(x, v) \ 6837 (BIT_CLEAR_DDMACH4_SA_8821C(x) | BIT_DDMACH4_SA_8821C(v)) 6838 6839 /* 2 REG_DDMA_CH4DA_8821C */ 6840 6841 #define BIT_SHIFT_DDMACH4_DA_8821C 0 6842 #define BIT_MASK_DDMACH4_DA_8821C 0xffffffffL 6843 #define BIT_DDMACH4_DA_8821C(x) \ 6844 (((x) & BIT_MASK_DDMACH4_DA_8821C) << BIT_SHIFT_DDMACH4_DA_8821C) 6845 #define BITS_DDMACH4_DA_8821C \ 6846 (BIT_MASK_DDMACH4_DA_8821C << BIT_SHIFT_DDMACH4_DA_8821C) 6847 #define BIT_CLEAR_DDMACH4_DA_8821C(x) ((x) & (~BITS_DDMACH4_DA_8821C)) 6848 #define BIT_GET_DDMACH4_DA_8821C(x) \ 6849 (((x) >> BIT_SHIFT_DDMACH4_DA_8821C) & BIT_MASK_DDMACH4_DA_8821C) 6850 #define BIT_SET_DDMACH4_DA_8821C(x, v) \ 6851 (BIT_CLEAR_DDMACH4_DA_8821C(x) | BIT_DDMACH4_DA_8821C(v)) 6852 6853 /* 2 REG_DDMA_CH4CTRL_8821C */ 6854 #define BIT_DDMACH4_OWN_8821C BIT(31) 6855 #define BIT_DDMACH4_IDMEM_ERR_8821C BIT(30) 6856 #define BIT_DDMACH4_CHKSUM_EN_8821C BIT(29) 6857 #define BIT_DDMACH4_DA_W_DISABLE_8821C BIT(28) 6858 #define BIT_DDMACH4_CHKSUM_STS_8821C BIT(27) 6859 #define BIT_DDMACH4_DDMA_MODE_8821C BIT(26) 6860 #define BIT_DDMACH4_RESET_CHKSUM_STS_8821C BIT(25) 6861 #define BIT_DDMACH4_CHKSUM_CONT_8821C BIT(24) 6862 6863 #define BIT_SHIFT_DDMACH4_DLEN_8821C 0 6864 #define BIT_MASK_DDMACH4_DLEN_8821C 0x3ffff 6865 #define BIT_DDMACH4_DLEN_8821C(x) \ 6866 (((x) & BIT_MASK_DDMACH4_DLEN_8821C) << BIT_SHIFT_DDMACH4_DLEN_8821C) 6867 #define BITS_DDMACH4_DLEN_8821C \ 6868 (BIT_MASK_DDMACH4_DLEN_8821C << BIT_SHIFT_DDMACH4_DLEN_8821C) 6869 #define BIT_CLEAR_DDMACH4_DLEN_8821C(x) ((x) & (~BITS_DDMACH4_DLEN_8821C)) 6870 #define BIT_GET_DDMACH4_DLEN_8821C(x) \ 6871 (((x) >> BIT_SHIFT_DDMACH4_DLEN_8821C) & BIT_MASK_DDMACH4_DLEN_8821C) 6872 #define BIT_SET_DDMACH4_DLEN_8821C(x, v) \ 6873 (BIT_CLEAR_DDMACH4_DLEN_8821C(x) | BIT_DDMACH4_DLEN_8821C(v)) 6874 6875 /* 2 REG_DDMA_CH5SA_8821C */ 6876 6877 #define BIT_SHIFT_DDMACH5_SA_8821C 0 6878 #define BIT_MASK_DDMACH5_SA_8821C 0xffffffffL 6879 #define BIT_DDMACH5_SA_8821C(x) \ 6880 (((x) & BIT_MASK_DDMACH5_SA_8821C) << BIT_SHIFT_DDMACH5_SA_8821C) 6881 #define BITS_DDMACH5_SA_8821C \ 6882 (BIT_MASK_DDMACH5_SA_8821C << BIT_SHIFT_DDMACH5_SA_8821C) 6883 #define BIT_CLEAR_DDMACH5_SA_8821C(x) ((x) & (~BITS_DDMACH5_SA_8821C)) 6884 #define BIT_GET_DDMACH5_SA_8821C(x) \ 6885 (((x) >> BIT_SHIFT_DDMACH5_SA_8821C) & BIT_MASK_DDMACH5_SA_8821C) 6886 #define BIT_SET_DDMACH5_SA_8821C(x, v) \ 6887 (BIT_CLEAR_DDMACH5_SA_8821C(x) | BIT_DDMACH5_SA_8821C(v)) 6888 6889 /* 2 REG_DDMA_CH5DA_8821C */ 6890 6891 #define BIT_SHIFT_DDMACH5_DA_8821C 0 6892 #define BIT_MASK_DDMACH5_DA_8821C 0xffffffffL 6893 #define BIT_DDMACH5_DA_8821C(x) \ 6894 (((x) & BIT_MASK_DDMACH5_DA_8821C) << BIT_SHIFT_DDMACH5_DA_8821C) 6895 #define BITS_DDMACH5_DA_8821C \ 6896 (BIT_MASK_DDMACH5_DA_8821C << BIT_SHIFT_DDMACH5_DA_8821C) 6897 #define BIT_CLEAR_DDMACH5_DA_8821C(x) ((x) & (~BITS_DDMACH5_DA_8821C)) 6898 #define BIT_GET_DDMACH5_DA_8821C(x) \ 6899 (((x) >> BIT_SHIFT_DDMACH5_DA_8821C) & BIT_MASK_DDMACH5_DA_8821C) 6900 #define BIT_SET_DDMACH5_DA_8821C(x, v) \ 6901 (BIT_CLEAR_DDMACH5_DA_8821C(x) | BIT_DDMACH5_DA_8821C(v)) 6902 6903 /* 2 REG_DDMA_CH5CTRL_8821C */ 6904 #define BIT_DDMACH5_OWN_8821C BIT(31) 6905 #define BIT_DDMACH5_IDMEM_ERR_8821C BIT(30) 6906 #define BIT_DDMACH5_CHKSUM_EN_8821C BIT(29) 6907 #define BIT_DDMACH5_DA_W_DISABLE_8821C BIT(28) 6908 #define BIT_DDMACH5_CHKSUM_STS_8821C BIT(27) 6909 #define BIT_DDMACH5_DDMA_MODE_8821C BIT(26) 6910 #define BIT_DDMACH5_RESET_CHKSUM_STS_8821C BIT(25) 6911 #define BIT_DDMACH5_CHKSUM_CONT_8821C BIT(24) 6912 6913 #define BIT_SHIFT_DDMACH5_DLEN_8821C 0 6914 #define BIT_MASK_DDMACH5_DLEN_8821C 0x3ffff 6915 #define BIT_DDMACH5_DLEN_8821C(x) \ 6916 (((x) & BIT_MASK_DDMACH5_DLEN_8821C) << BIT_SHIFT_DDMACH5_DLEN_8821C) 6917 #define BITS_DDMACH5_DLEN_8821C \ 6918 (BIT_MASK_DDMACH5_DLEN_8821C << BIT_SHIFT_DDMACH5_DLEN_8821C) 6919 #define BIT_CLEAR_DDMACH5_DLEN_8821C(x) ((x) & (~BITS_DDMACH5_DLEN_8821C)) 6920 #define BIT_GET_DDMACH5_DLEN_8821C(x) \ 6921 (((x) >> BIT_SHIFT_DDMACH5_DLEN_8821C) & BIT_MASK_DDMACH5_DLEN_8821C) 6922 #define BIT_SET_DDMACH5_DLEN_8821C(x, v) \ 6923 (BIT_CLEAR_DDMACH5_DLEN_8821C(x) | BIT_DDMACH5_DLEN_8821C(v)) 6924 6925 /* 2 REG_DDMA_INT_MSK_8821C */ 6926 #define BIT_DDMACH5_MSK_8821C BIT(5) 6927 #define BIT_DDMACH4_MSK_8821C BIT(4) 6928 #define BIT_DDMACH3_MSK_8821C BIT(3) 6929 #define BIT_DDMACH2_MSK_8821C BIT(2) 6930 #define BIT_DDMACH1_MSK_8821C BIT(1) 6931 #define BIT_DDMACH0_MSK_8821C BIT(0) 6932 6933 /* 2 REG_DDMA_CHSTATUS_8821C */ 6934 #define BIT_DDMACH5_BUSY_8821C BIT(5) 6935 #define BIT_DDMACH4_BUSY_8821C BIT(4) 6936 #define BIT_DDMACH3_BUSY_8821C BIT(3) 6937 #define BIT_DDMACH2_BUSY_8821C BIT(2) 6938 #define BIT_DDMACH1_BUSY_8821C BIT(1) 6939 #define BIT_DDMACH0_BUSY_8821C BIT(0) 6940 6941 /* 2 REG_DDMA_CHKSUM_8821C */ 6942 6943 #define BIT_SHIFT_IDDMA0_CHKSUM_8821C 0 6944 #define BIT_MASK_IDDMA0_CHKSUM_8821C 0xffff 6945 #define BIT_IDDMA0_CHKSUM_8821C(x) \ 6946 (((x) & BIT_MASK_IDDMA0_CHKSUM_8821C) << BIT_SHIFT_IDDMA0_CHKSUM_8821C) 6947 #define BITS_IDDMA0_CHKSUM_8821C \ 6948 (BIT_MASK_IDDMA0_CHKSUM_8821C << BIT_SHIFT_IDDMA0_CHKSUM_8821C) 6949 #define BIT_CLEAR_IDDMA0_CHKSUM_8821C(x) ((x) & (~BITS_IDDMA0_CHKSUM_8821C)) 6950 #define BIT_GET_IDDMA0_CHKSUM_8821C(x) \ 6951 (((x) >> BIT_SHIFT_IDDMA0_CHKSUM_8821C) & BIT_MASK_IDDMA0_CHKSUM_8821C) 6952 #define BIT_SET_IDDMA0_CHKSUM_8821C(x, v) \ 6953 (BIT_CLEAR_IDDMA0_CHKSUM_8821C(x) | BIT_IDDMA0_CHKSUM_8821C(v)) 6954 6955 /* 2 REG_DDMA_MONITOR_8821C */ 6956 #define BIT_IDDMA0_PERMU_UNDERFLOW_8821C BIT(14) 6957 #define BIT_IDDMA0_FIFO_UNDERFLOW_8821C BIT(13) 6958 #define BIT_IDDMA0_FIFO_OVERFLOW_8821C BIT(12) 6959 #define BIT_CH5_ERR_8821C BIT(5) 6960 #define BIT_CH4_ERR_8821C BIT(4) 6961 #define BIT_CH3_ERR_8821C BIT(3) 6962 #define BIT_CH2_ERR_8821C BIT(2) 6963 #define BIT_CH1_ERR_8821C BIT(1) 6964 #define BIT_CH0_ERR_8821C BIT(0) 6965 6966 /* 2 REG_NOT_VALID_8821C */ 6967 6968 /* 2 REG_PCIE_CTRL_8821C */ 6969 #define BIT_PCIEIO_PERSTB_SEL_8821C BIT(31) 6970 6971 #define BIT_SHIFT_PCIE_MAX_RXDMA_8821C 28 6972 #define BIT_MASK_PCIE_MAX_RXDMA_8821C 0x7 6973 #define BIT_PCIE_MAX_RXDMA_8821C(x) \ 6974 (((x) & BIT_MASK_PCIE_MAX_RXDMA_8821C) \ 6975 << BIT_SHIFT_PCIE_MAX_RXDMA_8821C) 6976 #define BITS_PCIE_MAX_RXDMA_8821C \ 6977 (BIT_MASK_PCIE_MAX_RXDMA_8821C << BIT_SHIFT_PCIE_MAX_RXDMA_8821C) 6978 #define BIT_CLEAR_PCIE_MAX_RXDMA_8821C(x) ((x) & (~BITS_PCIE_MAX_RXDMA_8821C)) 6979 #define BIT_GET_PCIE_MAX_RXDMA_8821C(x) \ 6980 (((x) >> BIT_SHIFT_PCIE_MAX_RXDMA_8821C) & \ 6981 BIT_MASK_PCIE_MAX_RXDMA_8821C) 6982 #define BIT_SET_PCIE_MAX_RXDMA_8821C(x, v) \ 6983 (BIT_CLEAR_PCIE_MAX_RXDMA_8821C(x) | BIT_PCIE_MAX_RXDMA_8821C(v)) 6984 6985 #define BIT_MULRW_8821C BIT(27) 6986 6987 #define BIT_SHIFT_PCIE_MAX_TXDMA_8821C 24 6988 #define BIT_MASK_PCIE_MAX_TXDMA_8821C 0x7 6989 #define BIT_PCIE_MAX_TXDMA_8821C(x) \ 6990 (((x) & BIT_MASK_PCIE_MAX_TXDMA_8821C) \ 6991 << BIT_SHIFT_PCIE_MAX_TXDMA_8821C) 6992 #define BITS_PCIE_MAX_TXDMA_8821C \ 6993 (BIT_MASK_PCIE_MAX_TXDMA_8821C << BIT_SHIFT_PCIE_MAX_TXDMA_8821C) 6994 #define BIT_CLEAR_PCIE_MAX_TXDMA_8821C(x) ((x) & (~BITS_PCIE_MAX_TXDMA_8821C)) 6995 #define BIT_GET_PCIE_MAX_TXDMA_8821C(x) \ 6996 (((x) >> BIT_SHIFT_PCIE_MAX_TXDMA_8821C) & \ 6997 BIT_MASK_PCIE_MAX_TXDMA_8821C) 6998 #define BIT_SET_PCIE_MAX_TXDMA_8821C(x, v) \ 6999 (BIT_CLEAR_PCIE_MAX_TXDMA_8821C(x) | BIT_PCIE_MAX_TXDMA_8821C(v)) 7000 7001 #define BIT_EN_CPL_TIMEOUT_PS_8821C BIT(22) 7002 #define BIT_REG_TXDMA_FAIL_PS_8821C BIT(21) 7003 #define BIT_PCIE_RST_TRXDMA_INTF_8821C BIT(20) 7004 #define BIT_EN_HWENTR_L1_8821C BIT(19) 7005 #define BIT_EN_ADV_CLKGATE_8821C BIT(18) 7006 #define BIT_PCIE_EN_SWENT_L23_8821C BIT(17) 7007 #define BIT_PCIE_EN_HWEXT_L1_8821C BIT(16) 7008 #define BIT_RX_CLOSE_EN_8821C BIT(15) 7009 #define BIT_STOP_BCNQ_8821C BIT(14) 7010 #define BIT_STOP_MGQ_8821C BIT(13) 7011 #define BIT_STOP_VOQ_8821C BIT(12) 7012 #define BIT_STOP_VIQ_8821C BIT(11) 7013 #define BIT_STOP_BEQ_8821C BIT(10) 7014 #define BIT_STOP_BKQ_8821C BIT(9) 7015 #define BIT_STOP_RXQ_8821C BIT(8) 7016 #define BIT_STOP_HI7Q_8821C BIT(7) 7017 #define BIT_STOP_HI6Q_8821C BIT(6) 7018 #define BIT_STOP_HI5Q_8821C BIT(5) 7019 #define BIT_STOP_HI4Q_8821C BIT(4) 7020 #define BIT_STOP_HI3Q_8821C BIT(3) 7021 #define BIT_STOP_HI2Q_8821C BIT(2) 7022 #define BIT_STOP_HI1Q_8821C BIT(1) 7023 #define BIT_STOP_HI0Q_8821C BIT(0) 7024 7025 /* 2 REG_INT_MIG_8821C */ 7026 7027 #define BIT_SHIFT_TXTTIMER_MATCH_NUM_8821C 28 7028 #define BIT_MASK_TXTTIMER_MATCH_NUM_8821C 0xf 7029 #define BIT_TXTTIMER_MATCH_NUM_8821C(x) \ 7030 (((x) & BIT_MASK_TXTTIMER_MATCH_NUM_8821C) \ 7031 << BIT_SHIFT_TXTTIMER_MATCH_NUM_8821C) 7032 #define BITS_TXTTIMER_MATCH_NUM_8821C \ 7033 (BIT_MASK_TXTTIMER_MATCH_NUM_8821C \ 7034 << BIT_SHIFT_TXTTIMER_MATCH_NUM_8821C) 7035 #define BIT_CLEAR_TXTTIMER_MATCH_NUM_8821C(x) \ 7036 ((x) & (~BITS_TXTTIMER_MATCH_NUM_8821C)) 7037 #define BIT_GET_TXTTIMER_MATCH_NUM_8821C(x) \ 7038 (((x) >> BIT_SHIFT_TXTTIMER_MATCH_NUM_8821C) & \ 7039 BIT_MASK_TXTTIMER_MATCH_NUM_8821C) 7040 #define BIT_SET_TXTTIMER_MATCH_NUM_8821C(x, v) \ 7041 (BIT_CLEAR_TXTTIMER_MATCH_NUM_8821C(x) | \ 7042 BIT_TXTTIMER_MATCH_NUM_8821C(v)) 7043 7044 #define BIT_SHIFT_TXPKT_NUM_MATCH_8821C 24 7045 #define BIT_MASK_TXPKT_NUM_MATCH_8821C 0xf 7046 #define BIT_TXPKT_NUM_MATCH_8821C(x) \ 7047 (((x) & BIT_MASK_TXPKT_NUM_MATCH_8821C) \ 7048 << BIT_SHIFT_TXPKT_NUM_MATCH_8821C) 7049 #define BITS_TXPKT_NUM_MATCH_8821C \ 7050 (BIT_MASK_TXPKT_NUM_MATCH_8821C << BIT_SHIFT_TXPKT_NUM_MATCH_8821C) 7051 #define BIT_CLEAR_TXPKT_NUM_MATCH_8821C(x) ((x) & (~BITS_TXPKT_NUM_MATCH_8821C)) 7052 #define BIT_GET_TXPKT_NUM_MATCH_8821C(x) \ 7053 (((x) >> BIT_SHIFT_TXPKT_NUM_MATCH_8821C) & \ 7054 BIT_MASK_TXPKT_NUM_MATCH_8821C) 7055 #define BIT_SET_TXPKT_NUM_MATCH_8821C(x, v) \ 7056 (BIT_CLEAR_TXPKT_NUM_MATCH_8821C(x) | BIT_TXPKT_NUM_MATCH_8821C(v)) 7057 7058 #define BIT_SHIFT_RXTTIMER_MATCH_NUM_8821C 20 7059 #define BIT_MASK_RXTTIMER_MATCH_NUM_8821C 0xf 7060 #define BIT_RXTTIMER_MATCH_NUM_8821C(x) \ 7061 (((x) & BIT_MASK_RXTTIMER_MATCH_NUM_8821C) \ 7062 << BIT_SHIFT_RXTTIMER_MATCH_NUM_8821C) 7063 #define BITS_RXTTIMER_MATCH_NUM_8821C \ 7064 (BIT_MASK_RXTTIMER_MATCH_NUM_8821C \ 7065 << BIT_SHIFT_RXTTIMER_MATCH_NUM_8821C) 7066 #define BIT_CLEAR_RXTTIMER_MATCH_NUM_8821C(x) \ 7067 ((x) & (~BITS_RXTTIMER_MATCH_NUM_8821C)) 7068 #define BIT_GET_RXTTIMER_MATCH_NUM_8821C(x) \ 7069 (((x) >> BIT_SHIFT_RXTTIMER_MATCH_NUM_8821C) & \ 7070 BIT_MASK_RXTTIMER_MATCH_NUM_8821C) 7071 #define BIT_SET_RXTTIMER_MATCH_NUM_8821C(x, v) \ 7072 (BIT_CLEAR_RXTTIMER_MATCH_NUM_8821C(x) | \ 7073 BIT_RXTTIMER_MATCH_NUM_8821C(v)) 7074 7075 #define BIT_SHIFT_RXPKT_NUM_MATCH_8821C 16 7076 #define BIT_MASK_RXPKT_NUM_MATCH_8821C 0xf 7077 #define BIT_RXPKT_NUM_MATCH_8821C(x) \ 7078 (((x) & BIT_MASK_RXPKT_NUM_MATCH_8821C) \ 7079 << BIT_SHIFT_RXPKT_NUM_MATCH_8821C) 7080 #define BITS_RXPKT_NUM_MATCH_8821C \ 7081 (BIT_MASK_RXPKT_NUM_MATCH_8821C << BIT_SHIFT_RXPKT_NUM_MATCH_8821C) 7082 #define BIT_CLEAR_RXPKT_NUM_MATCH_8821C(x) ((x) & (~BITS_RXPKT_NUM_MATCH_8821C)) 7083 #define BIT_GET_RXPKT_NUM_MATCH_8821C(x) \ 7084 (((x) >> BIT_SHIFT_RXPKT_NUM_MATCH_8821C) & \ 7085 BIT_MASK_RXPKT_NUM_MATCH_8821C) 7086 #define BIT_SET_RXPKT_NUM_MATCH_8821C(x, v) \ 7087 (BIT_CLEAR_RXPKT_NUM_MATCH_8821C(x) | BIT_RXPKT_NUM_MATCH_8821C(v)) 7088 7089 #define BIT_SHIFT_MIGRATE_TIMER_8821C 0 7090 #define BIT_MASK_MIGRATE_TIMER_8821C 0xffff 7091 #define BIT_MIGRATE_TIMER_8821C(x) \ 7092 (((x) & BIT_MASK_MIGRATE_TIMER_8821C) << BIT_SHIFT_MIGRATE_TIMER_8821C) 7093 #define BITS_MIGRATE_TIMER_8821C \ 7094 (BIT_MASK_MIGRATE_TIMER_8821C << BIT_SHIFT_MIGRATE_TIMER_8821C) 7095 #define BIT_CLEAR_MIGRATE_TIMER_8821C(x) ((x) & (~BITS_MIGRATE_TIMER_8821C)) 7096 #define BIT_GET_MIGRATE_TIMER_8821C(x) \ 7097 (((x) >> BIT_SHIFT_MIGRATE_TIMER_8821C) & BIT_MASK_MIGRATE_TIMER_8821C) 7098 #define BIT_SET_MIGRATE_TIMER_8821C(x, v) \ 7099 (BIT_CLEAR_MIGRATE_TIMER_8821C(x) | BIT_MIGRATE_TIMER_8821C(v)) 7100 7101 /* 2 REG_BCNQ_TXBD_DESA_8821C */ 7102 7103 #define BIT_SHIFT_BCNQ_TXBD_DESA_8821C 0 7104 #define BIT_MASK_BCNQ_TXBD_DESA_8821C 0xffffffffffffffffL 7105 #define BIT_BCNQ_TXBD_DESA_8821C(x) \ 7106 (((x) & BIT_MASK_BCNQ_TXBD_DESA_8821C) \ 7107 << BIT_SHIFT_BCNQ_TXBD_DESA_8821C) 7108 #define BITS_BCNQ_TXBD_DESA_8821C \ 7109 (BIT_MASK_BCNQ_TXBD_DESA_8821C << BIT_SHIFT_BCNQ_TXBD_DESA_8821C) 7110 #define BIT_CLEAR_BCNQ_TXBD_DESA_8821C(x) ((x) & (~BITS_BCNQ_TXBD_DESA_8821C)) 7111 #define BIT_GET_BCNQ_TXBD_DESA_8821C(x) \ 7112 (((x) >> BIT_SHIFT_BCNQ_TXBD_DESA_8821C) & \ 7113 BIT_MASK_BCNQ_TXBD_DESA_8821C) 7114 #define BIT_SET_BCNQ_TXBD_DESA_8821C(x, v) \ 7115 (BIT_CLEAR_BCNQ_TXBD_DESA_8821C(x) | BIT_BCNQ_TXBD_DESA_8821C(v)) 7116 7117 /* 2 REG_MGQ_TXBD_DESA_8821C */ 7118 7119 #define BIT_SHIFT_MGQ_TXBD_DESA_8821C 0 7120 #define BIT_MASK_MGQ_TXBD_DESA_8821C 0xffffffffffffffffL 7121 #define BIT_MGQ_TXBD_DESA_8821C(x) \ 7122 (((x) & BIT_MASK_MGQ_TXBD_DESA_8821C) << BIT_SHIFT_MGQ_TXBD_DESA_8821C) 7123 #define BITS_MGQ_TXBD_DESA_8821C \ 7124 (BIT_MASK_MGQ_TXBD_DESA_8821C << BIT_SHIFT_MGQ_TXBD_DESA_8821C) 7125 #define BIT_CLEAR_MGQ_TXBD_DESA_8821C(x) ((x) & (~BITS_MGQ_TXBD_DESA_8821C)) 7126 #define BIT_GET_MGQ_TXBD_DESA_8821C(x) \ 7127 (((x) >> BIT_SHIFT_MGQ_TXBD_DESA_8821C) & BIT_MASK_MGQ_TXBD_DESA_8821C) 7128 #define BIT_SET_MGQ_TXBD_DESA_8821C(x, v) \ 7129 (BIT_CLEAR_MGQ_TXBD_DESA_8821C(x) | BIT_MGQ_TXBD_DESA_8821C(v)) 7130 7131 /* 2 REG_VOQ_TXBD_DESA_8821C */ 7132 7133 #define BIT_SHIFT_VOQ_TXBD_DESA_8821C 0 7134 #define BIT_MASK_VOQ_TXBD_DESA_8821C 0xffffffffffffffffL 7135 #define BIT_VOQ_TXBD_DESA_8821C(x) \ 7136 (((x) & BIT_MASK_VOQ_TXBD_DESA_8821C) << BIT_SHIFT_VOQ_TXBD_DESA_8821C) 7137 #define BITS_VOQ_TXBD_DESA_8821C \ 7138 (BIT_MASK_VOQ_TXBD_DESA_8821C << BIT_SHIFT_VOQ_TXBD_DESA_8821C) 7139 #define BIT_CLEAR_VOQ_TXBD_DESA_8821C(x) ((x) & (~BITS_VOQ_TXBD_DESA_8821C)) 7140 #define BIT_GET_VOQ_TXBD_DESA_8821C(x) \ 7141 (((x) >> BIT_SHIFT_VOQ_TXBD_DESA_8821C) & BIT_MASK_VOQ_TXBD_DESA_8821C) 7142 #define BIT_SET_VOQ_TXBD_DESA_8821C(x, v) \ 7143 (BIT_CLEAR_VOQ_TXBD_DESA_8821C(x) | BIT_VOQ_TXBD_DESA_8821C(v)) 7144 7145 /* 2 REG_VIQ_TXBD_DESA_8821C */ 7146 7147 #define BIT_SHIFT_VIQ_TXBD_DESA_8821C 0 7148 #define BIT_MASK_VIQ_TXBD_DESA_8821C 0xffffffffffffffffL 7149 #define BIT_VIQ_TXBD_DESA_8821C(x) \ 7150 (((x) & BIT_MASK_VIQ_TXBD_DESA_8821C) << BIT_SHIFT_VIQ_TXBD_DESA_8821C) 7151 #define BITS_VIQ_TXBD_DESA_8821C \ 7152 (BIT_MASK_VIQ_TXBD_DESA_8821C << BIT_SHIFT_VIQ_TXBD_DESA_8821C) 7153 #define BIT_CLEAR_VIQ_TXBD_DESA_8821C(x) ((x) & (~BITS_VIQ_TXBD_DESA_8821C)) 7154 #define BIT_GET_VIQ_TXBD_DESA_8821C(x) \ 7155 (((x) >> BIT_SHIFT_VIQ_TXBD_DESA_8821C) & BIT_MASK_VIQ_TXBD_DESA_8821C) 7156 #define BIT_SET_VIQ_TXBD_DESA_8821C(x, v) \ 7157 (BIT_CLEAR_VIQ_TXBD_DESA_8821C(x) | BIT_VIQ_TXBD_DESA_8821C(v)) 7158 7159 /* 2 REG_BEQ_TXBD_DESA_8821C */ 7160 7161 #define BIT_SHIFT_BEQ_TXBD_DESA_8821C 0 7162 #define BIT_MASK_BEQ_TXBD_DESA_8821C 0xffffffffffffffffL 7163 #define BIT_BEQ_TXBD_DESA_8821C(x) \ 7164 (((x) & BIT_MASK_BEQ_TXBD_DESA_8821C) << BIT_SHIFT_BEQ_TXBD_DESA_8821C) 7165 #define BITS_BEQ_TXBD_DESA_8821C \ 7166 (BIT_MASK_BEQ_TXBD_DESA_8821C << BIT_SHIFT_BEQ_TXBD_DESA_8821C) 7167 #define BIT_CLEAR_BEQ_TXBD_DESA_8821C(x) ((x) & (~BITS_BEQ_TXBD_DESA_8821C)) 7168 #define BIT_GET_BEQ_TXBD_DESA_8821C(x) \ 7169 (((x) >> BIT_SHIFT_BEQ_TXBD_DESA_8821C) & BIT_MASK_BEQ_TXBD_DESA_8821C) 7170 #define BIT_SET_BEQ_TXBD_DESA_8821C(x, v) \ 7171 (BIT_CLEAR_BEQ_TXBD_DESA_8821C(x) | BIT_BEQ_TXBD_DESA_8821C(v)) 7172 7173 /* 2 REG_BKQ_TXBD_DESA_8821C */ 7174 7175 #define BIT_SHIFT_BKQ_TXBD_DESA_8821C 0 7176 #define BIT_MASK_BKQ_TXBD_DESA_8821C 0xffffffffffffffffL 7177 #define BIT_BKQ_TXBD_DESA_8821C(x) \ 7178 (((x) & BIT_MASK_BKQ_TXBD_DESA_8821C) << BIT_SHIFT_BKQ_TXBD_DESA_8821C) 7179 #define BITS_BKQ_TXBD_DESA_8821C \ 7180 (BIT_MASK_BKQ_TXBD_DESA_8821C << BIT_SHIFT_BKQ_TXBD_DESA_8821C) 7181 #define BIT_CLEAR_BKQ_TXBD_DESA_8821C(x) ((x) & (~BITS_BKQ_TXBD_DESA_8821C)) 7182 #define BIT_GET_BKQ_TXBD_DESA_8821C(x) \ 7183 (((x) >> BIT_SHIFT_BKQ_TXBD_DESA_8821C) & BIT_MASK_BKQ_TXBD_DESA_8821C) 7184 #define BIT_SET_BKQ_TXBD_DESA_8821C(x, v) \ 7185 (BIT_CLEAR_BKQ_TXBD_DESA_8821C(x) | BIT_BKQ_TXBD_DESA_8821C(v)) 7186 7187 /* 2 REG_RXQ_RXBD_DESA_8821C */ 7188 7189 #define BIT_SHIFT_RXQ_RXBD_DESA_8821C 0 7190 #define BIT_MASK_RXQ_RXBD_DESA_8821C 0xffffffffffffffffL 7191 #define BIT_RXQ_RXBD_DESA_8821C(x) \ 7192 (((x) & BIT_MASK_RXQ_RXBD_DESA_8821C) << BIT_SHIFT_RXQ_RXBD_DESA_8821C) 7193 #define BITS_RXQ_RXBD_DESA_8821C \ 7194 (BIT_MASK_RXQ_RXBD_DESA_8821C << BIT_SHIFT_RXQ_RXBD_DESA_8821C) 7195 #define BIT_CLEAR_RXQ_RXBD_DESA_8821C(x) ((x) & (~BITS_RXQ_RXBD_DESA_8821C)) 7196 #define BIT_GET_RXQ_RXBD_DESA_8821C(x) \ 7197 (((x) >> BIT_SHIFT_RXQ_RXBD_DESA_8821C) & BIT_MASK_RXQ_RXBD_DESA_8821C) 7198 #define BIT_SET_RXQ_RXBD_DESA_8821C(x, v) \ 7199 (BIT_CLEAR_RXQ_RXBD_DESA_8821C(x) | BIT_RXQ_RXBD_DESA_8821C(v)) 7200 7201 /* 2 REG_HI0Q_TXBD_DESA_8821C */ 7202 7203 #define BIT_SHIFT_HI0Q_TXBD_DESA_8821C 0 7204 #define BIT_MASK_HI0Q_TXBD_DESA_8821C 0xffffffffffffffffL 7205 #define BIT_HI0Q_TXBD_DESA_8821C(x) \ 7206 (((x) & BIT_MASK_HI0Q_TXBD_DESA_8821C) \ 7207 << BIT_SHIFT_HI0Q_TXBD_DESA_8821C) 7208 #define BITS_HI0Q_TXBD_DESA_8821C \ 7209 (BIT_MASK_HI0Q_TXBD_DESA_8821C << BIT_SHIFT_HI0Q_TXBD_DESA_8821C) 7210 #define BIT_CLEAR_HI0Q_TXBD_DESA_8821C(x) ((x) & (~BITS_HI0Q_TXBD_DESA_8821C)) 7211 #define BIT_GET_HI0Q_TXBD_DESA_8821C(x) \ 7212 (((x) >> BIT_SHIFT_HI0Q_TXBD_DESA_8821C) & \ 7213 BIT_MASK_HI0Q_TXBD_DESA_8821C) 7214 #define BIT_SET_HI0Q_TXBD_DESA_8821C(x, v) \ 7215 (BIT_CLEAR_HI0Q_TXBD_DESA_8821C(x) | BIT_HI0Q_TXBD_DESA_8821C(v)) 7216 7217 /* 2 REG_HI1Q_TXBD_DESA_8821C */ 7218 7219 #define BIT_SHIFT_HI1Q_TXBD_DESA_8821C 0 7220 #define BIT_MASK_HI1Q_TXBD_DESA_8821C 0xffffffffffffffffL 7221 #define BIT_HI1Q_TXBD_DESA_8821C(x) \ 7222 (((x) & BIT_MASK_HI1Q_TXBD_DESA_8821C) \ 7223 << BIT_SHIFT_HI1Q_TXBD_DESA_8821C) 7224 #define BITS_HI1Q_TXBD_DESA_8821C \ 7225 (BIT_MASK_HI1Q_TXBD_DESA_8821C << BIT_SHIFT_HI1Q_TXBD_DESA_8821C) 7226 #define BIT_CLEAR_HI1Q_TXBD_DESA_8821C(x) ((x) & (~BITS_HI1Q_TXBD_DESA_8821C)) 7227 #define BIT_GET_HI1Q_TXBD_DESA_8821C(x) \ 7228 (((x) >> BIT_SHIFT_HI1Q_TXBD_DESA_8821C) & \ 7229 BIT_MASK_HI1Q_TXBD_DESA_8821C) 7230 #define BIT_SET_HI1Q_TXBD_DESA_8821C(x, v) \ 7231 (BIT_CLEAR_HI1Q_TXBD_DESA_8821C(x) | BIT_HI1Q_TXBD_DESA_8821C(v)) 7232 7233 /* 2 REG_HI2Q_TXBD_DESA_8821C */ 7234 7235 #define BIT_SHIFT_HI2Q_TXBD_DESA_8821C 0 7236 #define BIT_MASK_HI2Q_TXBD_DESA_8821C 0xffffffffffffffffL 7237 #define BIT_HI2Q_TXBD_DESA_8821C(x) \ 7238 (((x) & BIT_MASK_HI2Q_TXBD_DESA_8821C) \ 7239 << BIT_SHIFT_HI2Q_TXBD_DESA_8821C) 7240 #define BITS_HI2Q_TXBD_DESA_8821C \ 7241 (BIT_MASK_HI2Q_TXBD_DESA_8821C << BIT_SHIFT_HI2Q_TXBD_DESA_8821C) 7242 #define BIT_CLEAR_HI2Q_TXBD_DESA_8821C(x) ((x) & (~BITS_HI2Q_TXBD_DESA_8821C)) 7243 #define BIT_GET_HI2Q_TXBD_DESA_8821C(x) \ 7244 (((x) >> BIT_SHIFT_HI2Q_TXBD_DESA_8821C) & \ 7245 BIT_MASK_HI2Q_TXBD_DESA_8821C) 7246 #define BIT_SET_HI2Q_TXBD_DESA_8821C(x, v) \ 7247 (BIT_CLEAR_HI2Q_TXBD_DESA_8821C(x) | BIT_HI2Q_TXBD_DESA_8821C(v)) 7248 7249 /* 2 REG_HI3Q_TXBD_DESA_8821C */ 7250 7251 #define BIT_SHIFT_HI3Q_TXBD_DESA_8821C 0 7252 #define BIT_MASK_HI3Q_TXBD_DESA_8821C 0xffffffffffffffffL 7253 #define BIT_HI3Q_TXBD_DESA_8821C(x) \ 7254 (((x) & BIT_MASK_HI3Q_TXBD_DESA_8821C) \ 7255 << BIT_SHIFT_HI3Q_TXBD_DESA_8821C) 7256 #define BITS_HI3Q_TXBD_DESA_8821C \ 7257 (BIT_MASK_HI3Q_TXBD_DESA_8821C << BIT_SHIFT_HI3Q_TXBD_DESA_8821C) 7258 #define BIT_CLEAR_HI3Q_TXBD_DESA_8821C(x) ((x) & (~BITS_HI3Q_TXBD_DESA_8821C)) 7259 #define BIT_GET_HI3Q_TXBD_DESA_8821C(x) \ 7260 (((x) >> BIT_SHIFT_HI3Q_TXBD_DESA_8821C) & \ 7261 BIT_MASK_HI3Q_TXBD_DESA_8821C) 7262 #define BIT_SET_HI3Q_TXBD_DESA_8821C(x, v) \ 7263 (BIT_CLEAR_HI3Q_TXBD_DESA_8821C(x) | BIT_HI3Q_TXBD_DESA_8821C(v)) 7264 7265 /* 2 REG_HI4Q_TXBD_DESA_8821C */ 7266 7267 #define BIT_SHIFT_HI4Q_TXBD_DESA_8821C 0 7268 #define BIT_MASK_HI4Q_TXBD_DESA_8821C 0xffffffffffffffffL 7269 #define BIT_HI4Q_TXBD_DESA_8821C(x) \ 7270 (((x) & BIT_MASK_HI4Q_TXBD_DESA_8821C) \ 7271 << BIT_SHIFT_HI4Q_TXBD_DESA_8821C) 7272 #define BITS_HI4Q_TXBD_DESA_8821C \ 7273 (BIT_MASK_HI4Q_TXBD_DESA_8821C << BIT_SHIFT_HI4Q_TXBD_DESA_8821C) 7274 #define BIT_CLEAR_HI4Q_TXBD_DESA_8821C(x) ((x) & (~BITS_HI4Q_TXBD_DESA_8821C)) 7275 #define BIT_GET_HI4Q_TXBD_DESA_8821C(x) \ 7276 (((x) >> BIT_SHIFT_HI4Q_TXBD_DESA_8821C) & \ 7277 BIT_MASK_HI4Q_TXBD_DESA_8821C) 7278 #define BIT_SET_HI4Q_TXBD_DESA_8821C(x, v) \ 7279 (BIT_CLEAR_HI4Q_TXBD_DESA_8821C(x) | BIT_HI4Q_TXBD_DESA_8821C(v)) 7280 7281 /* 2 REG_HI5Q_TXBD_DESA_8821C */ 7282 7283 #define BIT_SHIFT_HI5Q_TXBD_DESA_8821C 0 7284 #define BIT_MASK_HI5Q_TXBD_DESA_8821C 0xffffffffffffffffL 7285 #define BIT_HI5Q_TXBD_DESA_8821C(x) \ 7286 (((x) & BIT_MASK_HI5Q_TXBD_DESA_8821C) \ 7287 << BIT_SHIFT_HI5Q_TXBD_DESA_8821C) 7288 #define BITS_HI5Q_TXBD_DESA_8821C \ 7289 (BIT_MASK_HI5Q_TXBD_DESA_8821C << BIT_SHIFT_HI5Q_TXBD_DESA_8821C) 7290 #define BIT_CLEAR_HI5Q_TXBD_DESA_8821C(x) ((x) & (~BITS_HI5Q_TXBD_DESA_8821C)) 7291 #define BIT_GET_HI5Q_TXBD_DESA_8821C(x) \ 7292 (((x) >> BIT_SHIFT_HI5Q_TXBD_DESA_8821C) & \ 7293 BIT_MASK_HI5Q_TXBD_DESA_8821C) 7294 #define BIT_SET_HI5Q_TXBD_DESA_8821C(x, v) \ 7295 (BIT_CLEAR_HI5Q_TXBD_DESA_8821C(x) | BIT_HI5Q_TXBD_DESA_8821C(v)) 7296 7297 /* 2 REG_HI6Q_TXBD_DESA_8821C */ 7298 7299 #define BIT_SHIFT_HI6Q_TXBD_DESA_8821C 0 7300 #define BIT_MASK_HI6Q_TXBD_DESA_8821C 0xffffffffffffffffL 7301 #define BIT_HI6Q_TXBD_DESA_8821C(x) \ 7302 (((x) & BIT_MASK_HI6Q_TXBD_DESA_8821C) \ 7303 << BIT_SHIFT_HI6Q_TXBD_DESA_8821C) 7304 #define BITS_HI6Q_TXBD_DESA_8821C \ 7305 (BIT_MASK_HI6Q_TXBD_DESA_8821C << BIT_SHIFT_HI6Q_TXBD_DESA_8821C) 7306 #define BIT_CLEAR_HI6Q_TXBD_DESA_8821C(x) ((x) & (~BITS_HI6Q_TXBD_DESA_8821C)) 7307 #define BIT_GET_HI6Q_TXBD_DESA_8821C(x) \ 7308 (((x) >> BIT_SHIFT_HI6Q_TXBD_DESA_8821C) & \ 7309 BIT_MASK_HI6Q_TXBD_DESA_8821C) 7310 #define BIT_SET_HI6Q_TXBD_DESA_8821C(x, v) \ 7311 (BIT_CLEAR_HI6Q_TXBD_DESA_8821C(x) | BIT_HI6Q_TXBD_DESA_8821C(v)) 7312 7313 /* 2 REG_HI7Q_TXBD_DESA_8821C */ 7314 7315 #define BIT_SHIFT_HI7Q_TXBD_DESA_8821C 0 7316 #define BIT_MASK_HI7Q_TXBD_DESA_8821C 0xffffffffffffffffL 7317 #define BIT_HI7Q_TXBD_DESA_8821C(x) \ 7318 (((x) & BIT_MASK_HI7Q_TXBD_DESA_8821C) \ 7319 << BIT_SHIFT_HI7Q_TXBD_DESA_8821C) 7320 #define BITS_HI7Q_TXBD_DESA_8821C \ 7321 (BIT_MASK_HI7Q_TXBD_DESA_8821C << BIT_SHIFT_HI7Q_TXBD_DESA_8821C) 7322 #define BIT_CLEAR_HI7Q_TXBD_DESA_8821C(x) ((x) & (~BITS_HI7Q_TXBD_DESA_8821C)) 7323 #define BIT_GET_HI7Q_TXBD_DESA_8821C(x) \ 7324 (((x) >> BIT_SHIFT_HI7Q_TXBD_DESA_8821C) & \ 7325 BIT_MASK_HI7Q_TXBD_DESA_8821C) 7326 #define BIT_SET_HI7Q_TXBD_DESA_8821C(x, v) \ 7327 (BIT_CLEAR_HI7Q_TXBD_DESA_8821C(x) | BIT_HI7Q_TXBD_DESA_8821C(v)) 7328 7329 /* 2 REG_MGQ_TXBD_NUM_8821C */ 7330 #define BIT_PCIE_MGQ_FLAG_8821C BIT(14) 7331 7332 #define BIT_SHIFT_MGQ_DESC_MODE_8821C 12 7333 #define BIT_MASK_MGQ_DESC_MODE_8821C 0x3 7334 #define BIT_MGQ_DESC_MODE_8821C(x) \ 7335 (((x) & BIT_MASK_MGQ_DESC_MODE_8821C) << BIT_SHIFT_MGQ_DESC_MODE_8821C) 7336 #define BITS_MGQ_DESC_MODE_8821C \ 7337 (BIT_MASK_MGQ_DESC_MODE_8821C << BIT_SHIFT_MGQ_DESC_MODE_8821C) 7338 #define BIT_CLEAR_MGQ_DESC_MODE_8821C(x) ((x) & (~BITS_MGQ_DESC_MODE_8821C)) 7339 #define BIT_GET_MGQ_DESC_MODE_8821C(x) \ 7340 (((x) >> BIT_SHIFT_MGQ_DESC_MODE_8821C) & BIT_MASK_MGQ_DESC_MODE_8821C) 7341 #define BIT_SET_MGQ_DESC_MODE_8821C(x, v) \ 7342 (BIT_CLEAR_MGQ_DESC_MODE_8821C(x) | BIT_MGQ_DESC_MODE_8821C(v)) 7343 7344 #define BIT_SHIFT_MGQ_DESC_NUM_8821C 0 7345 #define BIT_MASK_MGQ_DESC_NUM_8821C 0xfff 7346 #define BIT_MGQ_DESC_NUM_8821C(x) \ 7347 (((x) & BIT_MASK_MGQ_DESC_NUM_8821C) << BIT_SHIFT_MGQ_DESC_NUM_8821C) 7348 #define BITS_MGQ_DESC_NUM_8821C \ 7349 (BIT_MASK_MGQ_DESC_NUM_8821C << BIT_SHIFT_MGQ_DESC_NUM_8821C) 7350 #define BIT_CLEAR_MGQ_DESC_NUM_8821C(x) ((x) & (~BITS_MGQ_DESC_NUM_8821C)) 7351 #define BIT_GET_MGQ_DESC_NUM_8821C(x) \ 7352 (((x) >> BIT_SHIFT_MGQ_DESC_NUM_8821C) & BIT_MASK_MGQ_DESC_NUM_8821C) 7353 #define BIT_SET_MGQ_DESC_NUM_8821C(x, v) \ 7354 (BIT_CLEAR_MGQ_DESC_NUM_8821C(x) | BIT_MGQ_DESC_NUM_8821C(v)) 7355 7356 /* 2 REG_RX_RXBD_NUM_8821C */ 7357 #define BIT_SYS_32_64_8821C BIT(15) 7358 7359 #define BIT_SHIFT_BCNQ_DESC_MODE_8821C 13 7360 #define BIT_MASK_BCNQ_DESC_MODE_8821C 0x3 7361 #define BIT_BCNQ_DESC_MODE_8821C(x) \ 7362 (((x) & BIT_MASK_BCNQ_DESC_MODE_8821C) \ 7363 << BIT_SHIFT_BCNQ_DESC_MODE_8821C) 7364 #define BITS_BCNQ_DESC_MODE_8821C \ 7365 (BIT_MASK_BCNQ_DESC_MODE_8821C << BIT_SHIFT_BCNQ_DESC_MODE_8821C) 7366 #define BIT_CLEAR_BCNQ_DESC_MODE_8821C(x) ((x) & (~BITS_BCNQ_DESC_MODE_8821C)) 7367 #define BIT_GET_BCNQ_DESC_MODE_8821C(x) \ 7368 (((x) >> BIT_SHIFT_BCNQ_DESC_MODE_8821C) & \ 7369 BIT_MASK_BCNQ_DESC_MODE_8821C) 7370 #define BIT_SET_BCNQ_DESC_MODE_8821C(x, v) \ 7371 (BIT_CLEAR_BCNQ_DESC_MODE_8821C(x) | BIT_BCNQ_DESC_MODE_8821C(v)) 7372 7373 #define BIT_PCIE_BCNQ_FLAG_8821C BIT(12) 7374 7375 #define BIT_SHIFT_RXQ_DESC_NUM_8821C 0 7376 #define BIT_MASK_RXQ_DESC_NUM_8821C 0xfff 7377 #define BIT_RXQ_DESC_NUM_8821C(x) \ 7378 (((x) & BIT_MASK_RXQ_DESC_NUM_8821C) << BIT_SHIFT_RXQ_DESC_NUM_8821C) 7379 #define BITS_RXQ_DESC_NUM_8821C \ 7380 (BIT_MASK_RXQ_DESC_NUM_8821C << BIT_SHIFT_RXQ_DESC_NUM_8821C) 7381 #define BIT_CLEAR_RXQ_DESC_NUM_8821C(x) ((x) & (~BITS_RXQ_DESC_NUM_8821C)) 7382 #define BIT_GET_RXQ_DESC_NUM_8821C(x) \ 7383 (((x) >> BIT_SHIFT_RXQ_DESC_NUM_8821C) & BIT_MASK_RXQ_DESC_NUM_8821C) 7384 #define BIT_SET_RXQ_DESC_NUM_8821C(x, v) \ 7385 (BIT_CLEAR_RXQ_DESC_NUM_8821C(x) | BIT_RXQ_DESC_NUM_8821C(v)) 7386 7387 /* 2 REG_VOQ_TXBD_NUM_8821C */ 7388 #define BIT_PCIE_VOQ_FLAG_8821C BIT(14) 7389 7390 #define BIT_SHIFT_VOQ_DESC_MODE_8821C 12 7391 #define BIT_MASK_VOQ_DESC_MODE_8821C 0x3 7392 #define BIT_VOQ_DESC_MODE_8821C(x) \ 7393 (((x) & BIT_MASK_VOQ_DESC_MODE_8821C) << BIT_SHIFT_VOQ_DESC_MODE_8821C) 7394 #define BITS_VOQ_DESC_MODE_8821C \ 7395 (BIT_MASK_VOQ_DESC_MODE_8821C << BIT_SHIFT_VOQ_DESC_MODE_8821C) 7396 #define BIT_CLEAR_VOQ_DESC_MODE_8821C(x) ((x) & (~BITS_VOQ_DESC_MODE_8821C)) 7397 #define BIT_GET_VOQ_DESC_MODE_8821C(x) \ 7398 (((x) >> BIT_SHIFT_VOQ_DESC_MODE_8821C) & BIT_MASK_VOQ_DESC_MODE_8821C) 7399 #define BIT_SET_VOQ_DESC_MODE_8821C(x, v) \ 7400 (BIT_CLEAR_VOQ_DESC_MODE_8821C(x) | BIT_VOQ_DESC_MODE_8821C(v)) 7401 7402 #define BIT_SHIFT_VOQ_DESC_NUM_8821C 0 7403 #define BIT_MASK_VOQ_DESC_NUM_8821C 0xfff 7404 #define BIT_VOQ_DESC_NUM_8821C(x) \ 7405 (((x) & BIT_MASK_VOQ_DESC_NUM_8821C) << BIT_SHIFT_VOQ_DESC_NUM_8821C) 7406 #define BITS_VOQ_DESC_NUM_8821C \ 7407 (BIT_MASK_VOQ_DESC_NUM_8821C << BIT_SHIFT_VOQ_DESC_NUM_8821C) 7408 #define BIT_CLEAR_VOQ_DESC_NUM_8821C(x) ((x) & (~BITS_VOQ_DESC_NUM_8821C)) 7409 #define BIT_GET_VOQ_DESC_NUM_8821C(x) \ 7410 (((x) >> BIT_SHIFT_VOQ_DESC_NUM_8821C) & BIT_MASK_VOQ_DESC_NUM_8821C) 7411 #define BIT_SET_VOQ_DESC_NUM_8821C(x, v) \ 7412 (BIT_CLEAR_VOQ_DESC_NUM_8821C(x) | BIT_VOQ_DESC_NUM_8821C(v)) 7413 7414 /* 2 REG_VIQ_TXBD_NUM_8821C */ 7415 #define BIT_PCIE_VIQ_FLAG_8821C BIT(14) 7416 7417 #define BIT_SHIFT_VIQ_DESC_MODE_8821C 12 7418 #define BIT_MASK_VIQ_DESC_MODE_8821C 0x3 7419 #define BIT_VIQ_DESC_MODE_8821C(x) \ 7420 (((x) & BIT_MASK_VIQ_DESC_MODE_8821C) << BIT_SHIFT_VIQ_DESC_MODE_8821C) 7421 #define BITS_VIQ_DESC_MODE_8821C \ 7422 (BIT_MASK_VIQ_DESC_MODE_8821C << BIT_SHIFT_VIQ_DESC_MODE_8821C) 7423 #define BIT_CLEAR_VIQ_DESC_MODE_8821C(x) ((x) & (~BITS_VIQ_DESC_MODE_8821C)) 7424 #define BIT_GET_VIQ_DESC_MODE_8821C(x) \ 7425 (((x) >> BIT_SHIFT_VIQ_DESC_MODE_8821C) & BIT_MASK_VIQ_DESC_MODE_8821C) 7426 #define BIT_SET_VIQ_DESC_MODE_8821C(x, v) \ 7427 (BIT_CLEAR_VIQ_DESC_MODE_8821C(x) | BIT_VIQ_DESC_MODE_8821C(v)) 7428 7429 #define BIT_SHIFT_VIQ_DESC_NUM_8821C 0 7430 #define BIT_MASK_VIQ_DESC_NUM_8821C 0xfff 7431 #define BIT_VIQ_DESC_NUM_8821C(x) \ 7432 (((x) & BIT_MASK_VIQ_DESC_NUM_8821C) << BIT_SHIFT_VIQ_DESC_NUM_8821C) 7433 #define BITS_VIQ_DESC_NUM_8821C \ 7434 (BIT_MASK_VIQ_DESC_NUM_8821C << BIT_SHIFT_VIQ_DESC_NUM_8821C) 7435 #define BIT_CLEAR_VIQ_DESC_NUM_8821C(x) ((x) & (~BITS_VIQ_DESC_NUM_8821C)) 7436 #define BIT_GET_VIQ_DESC_NUM_8821C(x) \ 7437 (((x) >> BIT_SHIFT_VIQ_DESC_NUM_8821C) & BIT_MASK_VIQ_DESC_NUM_8821C) 7438 #define BIT_SET_VIQ_DESC_NUM_8821C(x, v) \ 7439 (BIT_CLEAR_VIQ_DESC_NUM_8821C(x) | BIT_VIQ_DESC_NUM_8821C(v)) 7440 7441 /* 2 REG_BEQ_TXBD_NUM_8821C */ 7442 #define BIT_PCIE_BEQ_FLAG_8821C BIT(14) 7443 7444 #define BIT_SHIFT_BEQ_DESC_MODE_8821C 12 7445 #define BIT_MASK_BEQ_DESC_MODE_8821C 0x3 7446 #define BIT_BEQ_DESC_MODE_8821C(x) \ 7447 (((x) & BIT_MASK_BEQ_DESC_MODE_8821C) << BIT_SHIFT_BEQ_DESC_MODE_8821C) 7448 #define BITS_BEQ_DESC_MODE_8821C \ 7449 (BIT_MASK_BEQ_DESC_MODE_8821C << BIT_SHIFT_BEQ_DESC_MODE_8821C) 7450 #define BIT_CLEAR_BEQ_DESC_MODE_8821C(x) ((x) & (~BITS_BEQ_DESC_MODE_8821C)) 7451 #define BIT_GET_BEQ_DESC_MODE_8821C(x) \ 7452 (((x) >> BIT_SHIFT_BEQ_DESC_MODE_8821C) & BIT_MASK_BEQ_DESC_MODE_8821C) 7453 #define BIT_SET_BEQ_DESC_MODE_8821C(x, v) \ 7454 (BIT_CLEAR_BEQ_DESC_MODE_8821C(x) | BIT_BEQ_DESC_MODE_8821C(v)) 7455 7456 #define BIT_SHIFT_BEQ_DESC_NUM_8821C 0 7457 #define BIT_MASK_BEQ_DESC_NUM_8821C 0xfff 7458 #define BIT_BEQ_DESC_NUM_8821C(x) \ 7459 (((x) & BIT_MASK_BEQ_DESC_NUM_8821C) << BIT_SHIFT_BEQ_DESC_NUM_8821C) 7460 #define BITS_BEQ_DESC_NUM_8821C \ 7461 (BIT_MASK_BEQ_DESC_NUM_8821C << BIT_SHIFT_BEQ_DESC_NUM_8821C) 7462 #define BIT_CLEAR_BEQ_DESC_NUM_8821C(x) ((x) & (~BITS_BEQ_DESC_NUM_8821C)) 7463 #define BIT_GET_BEQ_DESC_NUM_8821C(x) \ 7464 (((x) >> BIT_SHIFT_BEQ_DESC_NUM_8821C) & BIT_MASK_BEQ_DESC_NUM_8821C) 7465 #define BIT_SET_BEQ_DESC_NUM_8821C(x, v) \ 7466 (BIT_CLEAR_BEQ_DESC_NUM_8821C(x) | BIT_BEQ_DESC_NUM_8821C(v)) 7467 7468 /* 2 REG_BKQ_TXBD_NUM_8821C */ 7469 #define BIT_PCIE_BKQ_FLAG_8821C BIT(14) 7470 7471 #define BIT_SHIFT_BKQ_DESC_MODE_8821C 12 7472 #define BIT_MASK_BKQ_DESC_MODE_8821C 0x3 7473 #define BIT_BKQ_DESC_MODE_8821C(x) \ 7474 (((x) & BIT_MASK_BKQ_DESC_MODE_8821C) << BIT_SHIFT_BKQ_DESC_MODE_8821C) 7475 #define BITS_BKQ_DESC_MODE_8821C \ 7476 (BIT_MASK_BKQ_DESC_MODE_8821C << BIT_SHIFT_BKQ_DESC_MODE_8821C) 7477 #define BIT_CLEAR_BKQ_DESC_MODE_8821C(x) ((x) & (~BITS_BKQ_DESC_MODE_8821C)) 7478 #define BIT_GET_BKQ_DESC_MODE_8821C(x) \ 7479 (((x) >> BIT_SHIFT_BKQ_DESC_MODE_8821C) & BIT_MASK_BKQ_DESC_MODE_8821C) 7480 #define BIT_SET_BKQ_DESC_MODE_8821C(x, v) \ 7481 (BIT_CLEAR_BKQ_DESC_MODE_8821C(x) | BIT_BKQ_DESC_MODE_8821C(v)) 7482 7483 #define BIT_SHIFT_BKQ_DESC_NUM_8821C 0 7484 #define BIT_MASK_BKQ_DESC_NUM_8821C 0xfff 7485 #define BIT_BKQ_DESC_NUM_8821C(x) \ 7486 (((x) & BIT_MASK_BKQ_DESC_NUM_8821C) << BIT_SHIFT_BKQ_DESC_NUM_8821C) 7487 #define BITS_BKQ_DESC_NUM_8821C \ 7488 (BIT_MASK_BKQ_DESC_NUM_8821C << BIT_SHIFT_BKQ_DESC_NUM_8821C) 7489 #define BIT_CLEAR_BKQ_DESC_NUM_8821C(x) ((x) & (~BITS_BKQ_DESC_NUM_8821C)) 7490 #define BIT_GET_BKQ_DESC_NUM_8821C(x) \ 7491 (((x) >> BIT_SHIFT_BKQ_DESC_NUM_8821C) & BIT_MASK_BKQ_DESC_NUM_8821C) 7492 #define BIT_SET_BKQ_DESC_NUM_8821C(x, v) \ 7493 (BIT_CLEAR_BKQ_DESC_NUM_8821C(x) | BIT_BKQ_DESC_NUM_8821C(v)) 7494 7495 /* 2 REG_HI0Q_TXBD_NUM_8821C */ 7496 #define BIT_HI0Q_FLAG_8821C BIT(14) 7497 7498 #define BIT_SHIFT_HI0Q_DESC_MODE_8821C 12 7499 #define BIT_MASK_HI0Q_DESC_MODE_8821C 0x3 7500 #define BIT_HI0Q_DESC_MODE_8821C(x) \ 7501 (((x) & BIT_MASK_HI0Q_DESC_MODE_8821C) \ 7502 << BIT_SHIFT_HI0Q_DESC_MODE_8821C) 7503 #define BITS_HI0Q_DESC_MODE_8821C \ 7504 (BIT_MASK_HI0Q_DESC_MODE_8821C << BIT_SHIFT_HI0Q_DESC_MODE_8821C) 7505 #define BIT_CLEAR_HI0Q_DESC_MODE_8821C(x) ((x) & (~BITS_HI0Q_DESC_MODE_8821C)) 7506 #define BIT_GET_HI0Q_DESC_MODE_8821C(x) \ 7507 (((x) >> BIT_SHIFT_HI0Q_DESC_MODE_8821C) & \ 7508 BIT_MASK_HI0Q_DESC_MODE_8821C) 7509 #define BIT_SET_HI0Q_DESC_MODE_8821C(x, v) \ 7510 (BIT_CLEAR_HI0Q_DESC_MODE_8821C(x) | BIT_HI0Q_DESC_MODE_8821C(v)) 7511 7512 #define BIT_SHIFT_HI0Q_DESC_NUM_8821C 0 7513 #define BIT_MASK_HI0Q_DESC_NUM_8821C 0xfff 7514 #define BIT_HI0Q_DESC_NUM_8821C(x) \ 7515 (((x) & BIT_MASK_HI0Q_DESC_NUM_8821C) << BIT_SHIFT_HI0Q_DESC_NUM_8821C) 7516 #define BITS_HI0Q_DESC_NUM_8821C \ 7517 (BIT_MASK_HI0Q_DESC_NUM_8821C << BIT_SHIFT_HI0Q_DESC_NUM_8821C) 7518 #define BIT_CLEAR_HI0Q_DESC_NUM_8821C(x) ((x) & (~BITS_HI0Q_DESC_NUM_8821C)) 7519 #define BIT_GET_HI0Q_DESC_NUM_8821C(x) \ 7520 (((x) >> BIT_SHIFT_HI0Q_DESC_NUM_8821C) & BIT_MASK_HI0Q_DESC_NUM_8821C) 7521 #define BIT_SET_HI0Q_DESC_NUM_8821C(x, v) \ 7522 (BIT_CLEAR_HI0Q_DESC_NUM_8821C(x) | BIT_HI0Q_DESC_NUM_8821C(v)) 7523 7524 /* 2 REG_HI1Q_TXBD_NUM_8821C */ 7525 #define BIT_HI1Q_FLAG_8821C BIT(14) 7526 7527 #define BIT_SHIFT_HI1Q_DESC_MODE_8821C 12 7528 #define BIT_MASK_HI1Q_DESC_MODE_8821C 0x3 7529 #define BIT_HI1Q_DESC_MODE_8821C(x) \ 7530 (((x) & BIT_MASK_HI1Q_DESC_MODE_8821C) \ 7531 << BIT_SHIFT_HI1Q_DESC_MODE_8821C) 7532 #define BITS_HI1Q_DESC_MODE_8821C \ 7533 (BIT_MASK_HI1Q_DESC_MODE_8821C << BIT_SHIFT_HI1Q_DESC_MODE_8821C) 7534 #define BIT_CLEAR_HI1Q_DESC_MODE_8821C(x) ((x) & (~BITS_HI1Q_DESC_MODE_8821C)) 7535 #define BIT_GET_HI1Q_DESC_MODE_8821C(x) \ 7536 (((x) >> BIT_SHIFT_HI1Q_DESC_MODE_8821C) & \ 7537 BIT_MASK_HI1Q_DESC_MODE_8821C) 7538 #define BIT_SET_HI1Q_DESC_MODE_8821C(x, v) \ 7539 (BIT_CLEAR_HI1Q_DESC_MODE_8821C(x) | BIT_HI1Q_DESC_MODE_8821C(v)) 7540 7541 #define BIT_SHIFT_HI1Q_DESC_NUM_8821C 0 7542 #define BIT_MASK_HI1Q_DESC_NUM_8821C 0xfff 7543 #define BIT_HI1Q_DESC_NUM_8821C(x) \ 7544 (((x) & BIT_MASK_HI1Q_DESC_NUM_8821C) << BIT_SHIFT_HI1Q_DESC_NUM_8821C) 7545 #define BITS_HI1Q_DESC_NUM_8821C \ 7546 (BIT_MASK_HI1Q_DESC_NUM_8821C << BIT_SHIFT_HI1Q_DESC_NUM_8821C) 7547 #define BIT_CLEAR_HI1Q_DESC_NUM_8821C(x) ((x) & (~BITS_HI1Q_DESC_NUM_8821C)) 7548 #define BIT_GET_HI1Q_DESC_NUM_8821C(x) \ 7549 (((x) >> BIT_SHIFT_HI1Q_DESC_NUM_8821C) & BIT_MASK_HI1Q_DESC_NUM_8821C) 7550 #define BIT_SET_HI1Q_DESC_NUM_8821C(x, v) \ 7551 (BIT_CLEAR_HI1Q_DESC_NUM_8821C(x) | BIT_HI1Q_DESC_NUM_8821C(v)) 7552 7553 /* 2 REG_HI2Q_TXBD_NUM_8821C */ 7554 #define BIT_HI2Q_FLAG_8821C BIT(14) 7555 7556 #define BIT_SHIFT_HI2Q_DESC_MODE_8821C 12 7557 #define BIT_MASK_HI2Q_DESC_MODE_8821C 0x3 7558 #define BIT_HI2Q_DESC_MODE_8821C(x) \ 7559 (((x) & BIT_MASK_HI2Q_DESC_MODE_8821C) \ 7560 << BIT_SHIFT_HI2Q_DESC_MODE_8821C) 7561 #define BITS_HI2Q_DESC_MODE_8821C \ 7562 (BIT_MASK_HI2Q_DESC_MODE_8821C << BIT_SHIFT_HI2Q_DESC_MODE_8821C) 7563 #define BIT_CLEAR_HI2Q_DESC_MODE_8821C(x) ((x) & (~BITS_HI2Q_DESC_MODE_8821C)) 7564 #define BIT_GET_HI2Q_DESC_MODE_8821C(x) \ 7565 (((x) >> BIT_SHIFT_HI2Q_DESC_MODE_8821C) & \ 7566 BIT_MASK_HI2Q_DESC_MODE_8821C) 7567 #define BIT_SET_HI2Q_DESC_MODE_8821C(x, v) \ 7568 (BIT_CLEAR_HI2Q_DESC_MODE_8821C(x) | BIT_HI2Q_DESC_MODE_8821C(v)) 7569 7570 #define BIT_SHIFT_HI2Q_DESC_NUM_8821C 0 7571 #define BIT_MASK_HI2Q_DESC_NUM_8821C 0xfff 7572 #define BIT_HI2Q_DESC_NUM_8821C(x) \ 7573 (((x) & BIT_MASK_HI2Q_DESC_NUM_8821C) << BIT_SHIFT_HI2Q_DESC_NUM_8821C) 7574 #define BITS_HI2Q_DESC_NUM_8821C \ 7575 (BIT_MASK_HI2Q_DESC_NUM_8821C << BIT_SHIFT_HI2Q_DESC_NUM_8821C) 7576 #define BIT_CLEAR_HI2Q_DESC_NUM_8821C(x) ((x) & (~BITS_HI2Q_DESC_NUM_8821C)) 7577 #define BIT_GET_HI2Q_DESC_NUM_8821C(x) \ 7578 (((x) >> BIT_SHIFT_HI2Q_DESC_NUM_8821C) & BIT_MASK_HI2Q_DESC_NUM_8821C) 7579 #define BIT_SET_HI2Q_DESC_NUM_8821C(x, v) \ 7580 (BIT_CLEAR_HI2Q_DESC_NUM_8821C(x) | BIT_HI2Q_DESC_NUM_8821C(v)) 7581 7582 /* 2 REG_HI3Q_TXBD_NUM_8821C */ 7583 #define BIT_HI3Q_FLAG_8821C BIT(14) 7584 7585 #define BIT_SHIFT_HI3Q_DESC_MODE_8821C 12 7586 #define BIT_MASK_HI3Q_DESC_MODE_8821C 0x3 7587 #define BIT_HI3Q_DESC_MODE_8821C(x) \ 7588 (((x) & BIT_MASK_HI3Q_DESC_MODE_8821C) \ 7589 << BIT_SHIFT_HI3Q_DESC_MODE_8821C) 7590 #define BITS_HI3Q_DESC_MODE_8821C \ 7591 (BIT_MASK_HI3Q_DESC_MODE_8821C << BIT_SHIFT_HI3Q_DESC_MODE_8821C) 7592 #define BIT_CLEAR_HI3Q_DESC_MODE_8821C(x) ((x) & (~BITS_HI3Q_DESC_MODE_8821C)) 7593 #define BIT_GET_HI3Q_DESC_MODE_8821C(x) \ 7594 (((x) >> BIT_SHIFT_HI3Q_DESC_MODE_8821C) & \ 7595 BIT_MASK_HI3Q_DESC_MODE_8821C) 7596 #define BIT_SET_HI3Q_DESC_MODE_8821C(x, v) \ 7597 (BIT_CLEAR_HI3Q_DESC_MODE_8821C(x) | BIT_HI3Q_DESC_MODE_8821C(v)) 7598 7599 #define BIT_SHIFT_HI3Q_DESC_NUM_8821C 0 7600 #define BIT_MASK_HI3Q_DESC_NUM_8821C 0xfff 7601 #define BIT_HI3Q_DESC_NUM_8821C(x) \ 7602 (((x) & BIT_MASK_HI3Q_DESC_NUM_8821C) << BIT_SHIFT_HI3Q_DESC_NUM_8821C) 7603 #define BITS_HI3Q_DESC_NUM_8821C \ 7604 (BIT_MASK_HI3Q_DESC_NUM_8821C << BIT_SHIFT_HI3Q_DESC_NUM_8821C) 7605 #define BIT_CLEAR_HI3Q_DESC_NUM_8821C(x) ((x) & (~BITS_HI3Q_DESC_NUM_8821C)) 7606 #define BIT_GET_HI3Q_DESC_NUM_8821C(x) \ 7607 (((x) >> BIT_SHIFT_HI3Q_DESC_NUM_8821C) & BIT_MASK_HI3Q_DESC_NUM_8821C) 7608 #define BIT_SET_HI3Q_DESC_NUM_8821C(x, v) \ 7609 (BIT_CLEAR_HI3Q_DESC_NUM_8821C(x) | BIT_HI3Q_DESC_NUM_8821C(v)) 7610 7611 /* 2 REG_HI4Q_TXBD_NUM_8821C */ 7612 #define BIT_HI4Q_FLAG_8821C BIT(14) 7613 7614 #define BIT_SHIFT_HI4Q_DESC_MODE_8821C 12 7615 #define BIT_MASK_HI4Q_DESC_MODE_8821C 0x3 7616 #define BIT_HI4Q_DESC_MODE_8821C(x) \ 7617 (((x) & BIT_MASK_HI4Q_DESC_MODE_8821C) \ 7618 << BIT_SHIFT_HI4Q_DESC_MODE_8821C) 7619 #define BITS_HI4Q_DESC_MODE_8821C \ 7620 (BIT_MASK_HI4Q_DESC_MODE_8821C << BIT_SHIFT_HI4Q_DESC_MODE_8821C) 7621 #define BIT_CLEAR_HI4Q_DESC_MODE_8821C(x) ((x) & (~BITS_HI4Q_DESC_MODE_8821C)) 7622 #define BIT_GET_HI4Q_DESC_MODE_8821C(x) \ 7623 (((x) >> BIT_SHIFT_HI4Q_DESC_MODE_8821C) & \ 7624 BIT_MASK_HI4Q_DESC_MODE_8821C) 7625 #define BIT_SET_HI4Q_DESC_MODE_8821C(x, v) \ 7626 (BIT_CLEAR_HI4Q_DESC_MODE_8821C(x) | BIT_HI4Q_DESC_MODE_8821C(v)) 7627 7628 #define BIT_SHIFT_HI4Q_DESC_NUM_8821C 0 7629 #define BIT_MASK_HI4Q_DESC_NUM_8821C 0xfff 7630 #define BIT_HI4Q_DESC_NUM_8821C(x) \ 7631 (((x) & BIT_MASK_HI4Q_DESC_NUM_8821C) << BIT_SHIFT_HI4Q_DESC_NUM_8821C) 7632 #define BITS_HI4Q_DESC_NUM_8821C \ 7633 (BIT_MASK_HI4Q_DESC_NUM_8821C << BIT_SHIFT_HI4Q_DESC_NUM_8821C) 7634 #define BIT_CLEAR_HI4Q_DESC_NUM_8821C(x) ((x) & (~BITS_HI4Q_DESC_NUM_8821C)) 7635 #define BIT_GET_HI4Q_DESC_NUM_8821C(x) \ 7636 (((x) >> BIT_SHIFT_HI4Q_DESC_NUM_8821C) & BIT_MASK_HI4Q_DESC_NUM_8821C) 7637 #define BIT_SET_HI4Q_DESC_NUM_8821C(x, v) \ 7638 (BIT_CLEAR_HI4Q_DESC_NUM_8821C(x) | BIT_HI4Q_DESC_NUM_8821C(v)) 7639 7640 /* 2 REG_HI5Q_TXBD_NUM_8821C */ 7641 #define BIT_HI5Q_FLAG_8821C BIT(14) 7642 7643 #define BIT_SHIFT_HI5Q_DESC_MODE_8821C 12 7644 #define BIT_MASK_HI5Q_DESC_MODE_8821C 0x3 7645 #define BIT_HI5Q_DESC_MODE_8821C(x) \ 7646 (((x) & BIT_MASK_HI5Q_DESC_MODE_8821C) \ 7647 << BIT_SHIFT_HI5Q_DESC_MODE_8821C) 7648 #define BITS_HI5Q_DESC_MODE_8821C \ 7649 (BIT_MASK_HI5Q_DESC_MODE_8821C << BIT_SHIFT_HI5Q_DESC_MODE_8821C) 7650 #define BIT_CLEAR_HI5Q_DESC_MODE_8821C(x) ((x) & (~BITS_HI5Q_DESC_MODE_8821C)) 7651 #define BIT_GET_HI5Q_DESC_MODE_8821C(x) \ 7652 (((x) >> BIT_SHIFT_HI5Q_DESC_MODE_8821C) & \ 7653 BIT_MASK_HI5Q_DESC_MODE_8821C) 7654 #define BIT_SET_HI5Q_DESC_MODE_8821C(x, v) \ 7655 (BIT_CLEAR_HI5Q_DESC_MODE_8821C(x) | BIT_HI5Q_DESC_MODE_8821C(v)) 7656 7657 #define BIT_SHIFT_HI5Q_DESC_NUM_8821C 0 7658 #define BIT_MASK_HI5Q_DESC_NUM_8821C 0xfff 7659 #define BIT_HI5Q_DESC_NUM_8821C(x) \ 7660 (((x) & BIT_MASK_HI5Q_DESC_NUM_8821C) << BIT_SHIFT_HI5Q_DESC_NUM_8821C) 7661 #define BITS_HI5Q_DESC_NUM_8821C \ 7662 (BIT_MASK_HI5Q_DESC_NUM_8821C << BIT_SHIFT_HI5Q_DESC_NUM_8821C) 7663 #define BIT_CLEAR_HI5Q_DESC_NUM_8821C(x) ((x) & (~BITS_HI5Q_DESC_NUM_8821C)) 7664 #define BIT_GET_HI5Q_DESC_NUM_8821C(x) \ 7665 (((x) >> BIT_SHIFT_HI5Q_DESC_NUM_8821C) & BIT_MASK_HI5Q_DESC_NUM_8821C) 7666 #define BIT_SET_HI5Q_DESC_NUM_8821C(x, v) \ 7667 (BIT_CLEAR_HI5Q_DESC_NUM_8821C(x) | BIT_HI5Q_DESC_NUM_8821C(v)) 7668 7669 /* 2 REG_HI6Q_TXBD_NUM_8821C */ 7670 #define BIT_HI6Q_FLAG_8821C BIT(14) 7671 7672 #define BIT_SHIFT_HI6Q_DESC_MODE_8821C 12 7673 #define BIT_MASK_HI6Q_DESC_MODE_8821C 0x3 7674 #define BIT_HI6Q_DESC_MODE_8821C(x) \ 7675 (((x) & BIT_MASK_HI6Q_DESC_MODE_8821C) \ 7676 << BIT_SHIFT_HI6Q_DESC_MODE_8821C) 7677 #define BITS_HI6Q_DESC_MODE_8821C \ 7678 (BIT_MASK_HI6Q_DESC_MODE_8821C << BIT_SHIFT_HI6Q_DESC_MODE_8821C) 7679 #define BIT_CLEAR_HI6Q_DESC_MODE_8821C(x) ((x) & (~BITS_HI6Q_DESC_MODE_8821C)) 7680 #define BIT_GET_HI6Q_DESC_MODE_8821C(x) \ 7681 (((x) >> BIT_SHIFT_HI6Q_DESC_MODE_8821C) & \ 7682 BIT_MASK_HI6Q_DESC_MODE_8821C) 7683 #define BIT_SET_HI6Q_DESC_MODE_8821C(x, v) \ 7684 (BIT_CLEAR_HI6Q_DESC_MODE_8821C(x) | BIT_HI6Q_DESC_MODE_8821C(v)) 7685 7686 #define BIT_SHIFT_HI6Q_DESC_NUM_8821C 0 7687 #define BIT_MASK_HI6Q_DESC_NUM_8821C 0xfff 7688 #define BIT_HI6Q_DESC_NUM_8821C(x) \ 7689 (((x) & BIT_MASK_HI6Q_DESC_NUM_8821C) << BIT_SHIFT_HI6Q_DESC_NUM_8821C) 7690 #define BITS_HI6Q_DESC_NUM_8821C \ 7691 (BIT_MASK_HI6Q_DESC_NUM_8821C << BIT_SHIFT_HI6Q_DESC_NUM_8821C) 7692 #define BIT_CLEAR_HI6Q_DESC_NUM_8821C(x) ((x) & (~BITS_HI6Q_DESC_NUM_8821C)) 7693 #define BIT_GET_HI6Q_DESC_NUM_8821C(x) \ 7694 (((x) >> BIT_SHIFT_HI6Q_DESC_NUM_8821C) & BIT_MASK_HI6Q_DESC_NUM_8821C) 7695 #define BIT_SET_HI6Q_DESC_NUM_8821C(x, v) \ 7696 (BIT_CLEAR_HI6Q_DESC_NUM_8821C(x) | BIT_HI6Q_DESC_NUM_8821C(v)) 7697 7698 /* 2 REG_HI7Q_TXBD_NUM_8821C */ 7699 #define BIT_HI7Q_FLAG_8821C BIT(14) 7700 7701 #define BIT_SHIFT_HI7Q_DESC_MODE_8821C 12 7702 #define BIT_MASK_HI7Q_DESC_MODE_8821C 0x3 7703 #define BIT_HI7Q_DESC_MODE_8821C(x) \ 7704 (((x) & BIT_MASK_HI7Q_DESC_MODE_8821C) \ 7705 << BIT_SHIFT_HI7Q_DESC_MODE_8821C) 7706 #define BITS_HI7Q_DESC_MODE_8821C \ 7707 (BIT_MASK_HI7Q_DESC_MODE_8821C << BIT_SHIFT_HI7Q_DESC_MODE_8821C) 7708 #define BIT_CLEAR_HI7Q_DESC_MODE_8821C(x) ((x) & (~BITS_HI7Q_DESC_MODE_8821C)) 7709 #define BIT_GET_HI7Q_DESC_MODE_8821C(x) \ 7710 (((x) >> BIT_SHIFT_HI7Q_DESC_MODE_8821C) & \ 7711 BIT_MASK_HI7Q_DESC_MODE_8821C) 7712 #define BIT_SET_HI7Q_DESC_MODE_8821C(x, v) \ 7713 (BIT_CLEAR_HI7Q_DESC_MODE_8821C(x) | BIT_HI7Q_DESC_MODE_8821C(v)) 7714 7715 #define BIT_SHIFT_HI7Q_DESC_NUM_8821C 0 7716 #define BIT_MASK_HI7Q_DESC_NUM_8821C 0xfff 7717 #define BIT_HI7Q_DESC_NUM_8821C(x) \ 7718 (((x) & BIT_MASK_HI7Q_DESC_NUM_8821C) << BIT_SHIFT_HI7Q_DESC_NUM_8821C) 7719 #define BITS_HI7Q_DESC_NUM_8821C \ 7720 (BIT_MASK_HI7Q_DESC_NUM_8821C << BIT_SHIFT_HI7Q_DESC_NUM_8821C) 7721 #define BIT_CLEAR_HI7Q_DESC_NUM_8821C(x) ((x) & (~BITS_HI7Q_DESC_NUM_8821C)) 7722 #define BIT_GET_HI7Q_DESC_NUM_8821C(x) \ 7723 (((x) >> BIT_SHIFT_HI7Q_DESC_NUM_8821C) & BIT_MASK_HI7Q_DESC_NUM_8821C) 7724 #define BIT_SET_HI7Q_DESC_NUM_8821C(x, v) \ 7725 (BIT_CLEAR_HI7Q_DESC_NUM_8821C(x) | BIT_HI7Q_DESC_NUM_8821C(v)) 7726 7727 /* 2 REG_TSFTIMER_HCI_8821C */ 7728 7729 #define BIT_SHIFT_TSFT2_HCI_8821C 16 7730 #define BIT_MASK_TSFT2_HCI_8821C 0xffff 7731 #define BIT_TSFT2_HCI_8821C(x) \ 7732 (((x) & BIT_MASK_TSFT2_HCI_8821C) << BIT_SHIFT_TSFT2_HCI_8821C) 7733 #define BITS_TSFT2_HCI_8821C \ 7734 (BIT_MASK_TSFT2_HCI_8821C << BIT_SHIFT_TSFT2_HCI_8821C) 7735 #define BIT_CLEAR_TSFT2_HCI_8821C(x) ((x) & (~BITS_TSFT2_HCI_8821C)) 7736 #define BIT_GET_TSFT2_HCI_8821C(x) \ 7737 (((x) >> BIT_SHIFT_TSFT2_HCI_8821C) & BIT_MASK_TSFT2_HCI_8821C) 7738 #define BIT_SET_TSFT2_HCI_8821C(x, v) \ 7739 (BIT_CLEAR_TSFT2_HCI_8821C(x) | BIT_TSFT2_HCI_8821C(v)) 7740 7741 #define BIT_SHIFT_TSFT1_HCI_8821C 0 7742 #define BIT_MASK_TSFT1_HCI_8821C 0xffff 7743 #define BIT_TSFT1_HCI_8821C(x) \ 7744 (((x) & BIT_MASK_TSFT1_HCI_8821C) << BIT_SHIFT_TSFT1_HCI_8821C) 7745 #define BITS_TSFT1_HCI_8821C \ 7746 (BIT_MASK_TSFT1_HCI_8821C << BIT_SHIFT_TSFT1_HCI_8821C) 7747 #define BIT_CLEAR_TSFT1_HCI_8821C(x) ((x) & (~BITS_TSFT1_HCI_8821C)) 7748 #define BIT_GET_TSFT1_HCI_8821C(x) \ 7749 (((x) >> BIT_SHIFT_TSFT1_HCI_8821C) & BIT_MASK_TSFT1_HCI_8821C) 7750 #define BIT_SET_TSFT1_HCI_8821C(x, v) \ 7751 (BIT_CLEAR_TSFT1_HCI_8821C(x) | BIT_TSFT1_HCI_8821C(v)) 7752 7753 /* 2 REG_BD_RWPTR_CLR_8821C */ 7754 #define BIT_CLR_HI7Q_HW_IDX_8821C BIT(29) 7755 #define BIT_CLR_HI6Q_HW_IDX_8821C BIT(28) 7756 #define BIT_CLR_HI5Q_HW_IDX_8821C BIT(27) 7757 #define BIT_CLR_HI4Q_HW_IDX_8821C BIT(26) 7758 #define BIT_CLR_HI3Q_HW_IDX_8821C BIT(25) 7759 #define BIT_CLR_HI2Q_HW_IDX_8821C BIT(24) 7760 #define BIT_CLR_HI1Q_HW_IDX_8821C BIT(23) 7761 #define BIT_CLR_HI0Q_HW_IDX_8821C BIT(22) 7762 #define BIT_CLR_BKQ_HW_IDX_8821C BIT(21) 7763 #define BIT_CLR_BEQ_HW_IDX_8821C BIT(20) 7764 #define BIT_CLR_VIQ_HW_IDX_8821C BIT(19) 7765 #define BIT_CLR_VOQ_HW_IDX_8821C BIT(18) 7766 #define BIT_CLR_MGQ_HW_IDX_8821C BIT(17) 7767 #define BIT_CLR_RXQ_HW_IDX_8821C BIT(16) 7768 #define BIT_CLR_HI7Q_HOST_IDX_8821C BIT(13) 7769 #define BIT_CLR_HI6Q_HOST_IDX_8821C BIT(12) 7770 #define BIT_CLR_HI5Q_HOST_IDX_8821C BIT(11) 7771 #define BIT_CLR_HI4Q_HOST_IDX_8821C BIT(10) 7772 #define BIT_CLR_HI3Q_HOST_IDX_8821C BIT(9) 7773 #define BIT_CLR_HI2Q_HOST_IDX_8821C BIT(8) 7774 #define BIT_CLR_HI1Q_HOST_IDX_8821C BIT(7) 7775 #define BIT_CLR_HI0Q_HOST_IDX_8821C BIT(6) 7776 #define BIT_CLR_BKQ_HOST_IDX_8821C BIT(5) 7777 #define BIT_CLR_BEQ_HOST_IDX_8821C BIT(4) 7778 #define BIT_CLR_VIQ_HOST_IDX_8821C BIT(3) 7779 #define BIT_CLR_VOQ_HOST_IDX_8821C BIT(2) 7780 #define BIT_CLR_MGQ_HOST_IDX_8821C BIT(1) 7781 #define BIT_CLR_RXQ_HOST_IDX_8821C BIT(0) 7782 7783 /* 2 REG_VOQ_TXBD_IDX_8821C */ 7784 7785 #define BIT_SHIFT_VOQ_HW_IDX_8821C 16 7786 #define BIT_MASK_VOQ_HW_IDX_8821C 0xfff 7787 #define BIT_VOQ_HW_IDX_8821C(x) \ 7788 (((x) & BIT_MASK_VOQ_HW_IDX_8821C) << BIT_SHIFT_VOQ_HW_IDX_8821C) 7789 #define BITS_VOQ_HW_IDX_8821C \ 7790 (BIT_MASK_VOQ_HW_IDX_8821C << BIT_SHIFT_VOQ_HW_IDX_8821C) 7791 #define BIT_CLEAR_VOQ_HW_IDX_8821C(x) ((x) & (~BITS_VOQ_HW_IDX_8821C)) 7792 #define BIT_GET_VOQ_HW_IDX_8821C(x) \ 7793 (((x) >> BIT_SHIFT_VOQ_HW_IDX_8821C) & BIT_MASK_VOQ_HW_IDX_8821C) 7794 #define BIT_SET_VOQ_HW_IDX_8821C(x, v) \ 7795 (BIT_CLEAR_VOQ_HW_IDX_8821C(x) | BIT_VOQ_HW_IDX_8821C(v)) 7796 7797 #define BIT_SHIFT_VOQ_HOST_IDX_8821C 0 7798 #define BIT_MASK_VOQ_HOST_IDX_8821C 0xfff 7799 #define BIT_VOQ_HOST_IDX_8821C(x) \ 7800 (((x) & BIT_MASK_VOQ_HOST_IDX_8821C) << BIT_SHIFT_VOQ_HOST_IDX_8821C) 7801 #define BITS_VOQ_HOST_IDX_8821C \ 7802 (BIT_MASK_VOQ_HOST_IDX_8821C << BIT_SHIFT_VOQ_HOST_IDX_8821C) 7803 #define BIT_CLEAR_VOQ_HOST_IDX_8821C(x) ((x) & (~BITS_VOQ_HOST_IDX_8821C)) 7804 #define BIT_GET_VOQ_HOST_IDX_8821C(x) \ 7805 (((x) >> BIT_SHIFT_VOQ_HOST_IDX_8821C) & BIT_MASK_VOQ_HOST_IDX_8821C) 7806 #define BIT_SET_VOQ_HOST_IDX_8821C(x, v) \ 7807 (BIT_CLEAR_VOQ_HOST_IDX_8821C(x) | BIT_VOQ_HOST_IDX_8821C(v)) 7808 7809 /* 2 REG_VIQ_TXBD_IDX_8821C */ 7810 7811 #define BIT_SHIFT_VIQ_HW_IDX_8821C 16 7812 #define BIT_MASK_VIQ_HW_IDX_8821C 0xfff 7813 #define BIT_VIQ_HW_IDX_8821C(x) \ 7814 (((x) & BIT_MASK_VIQ_HW_IDX_8821C) << BIT_SHIFT_VIQ_HW_IDX_8821C) 7815 #define BITS_VIQ_HW_IDX_8821C \ 7816 (BIT_MASK_VIQ_HW_IDX_8821C << BIT_SHIFT_VIQ_HW_IDX_8821C) 7817 #define BIT_CLEAR_VIQ_HW_IDX_8821C(x) ((x) & (~BITS_VIQ_HW_IDX_8821C)) 7818 #define BIT_GET_VIQ_HW_IDX_8821C(x) \ 7819 (((x) >> BIT_SHIFT_VIQ_HW_IDX_8821C) & BIT_MASK_VIQ_HW_IDX_8821C) 7820 #define BIT_SET_VIQ_HW_IDX_8821C(x, v) \ 7821 (BIT_CLEAR_VIQ_HW_IDX_8821C(x) | BIT_VIQ_HW_IDX_8821C(v)) 7822 7823 #define BIT_SHIFT_VIQ_HOST_IDX_8821C 0 7824 #define BIT_MASK_VIQ_HOST_IDX_8821C 0xfff 7825 #define BIT_VIQ_HOST_IDX_8821C(x) \ 7826 (((x) & BIT_MASK_VIQ_HOST_IDX_8821C) << BIT_SHIFT_VIQ_HOST_IDX_8821C) 7827 #define BITS_VIQ_HOST_IDX_8821C \ 7828 (BIT_MASK_VIQ_HOST_IDX_8821C << BIT_SHIFT_VIQ_HOST_IDX_8821C) 7829 #define BIT_CLEAR_VIQ_HOST_IDX_8821C(x) ((x) & (~BITS_VIQ_HOST_IDX_8821C)) 7830 #define BIT_GET_VIQ_HOST_IDX_8821C(x) \ 7831 (((x) >> BIT_SHIFT_VIQ_HOST_IDX_8821C) & BIT_MASK_VIQ_HOST_IDX_8821C) 7832 #define BIT_SET_VIQ_HOST_IDX_8821C(x, v) \ 7833 (BIT_CLEAR_VIQ_HOST_IDX_8821C(x) | BIT_VIQ_HOST_IDX_8821C(v)) 7834 7835 /* 2 REG_BEQ_TXBD_IDX_8821C */ 7836 7837 #define BIT_SHIFT_BEQ_HW_IDX_8821C 16 7838 #define BIT_MASK_BEQ_HW_IDX_8821C 0xfff 7839 #define BIT_BEQ_HW_IDX_8821C(x) \ 7840 (((x) & BIT_MASK_BEQ_HW_IDX_8821C) << BIT_SHIFT_BEQ_HW_IDX_8821C) 7841 #define BITS_BEQ_HW_IDX_8821C \ 7842 (BIT_MASK_BEQ_HW_IDX_8821C << BIT_SHIFT_BEQ_HW_IDX_8821C) 7843 #define BIT_CLEAR_BEQ_HW_IDX_8821C(x) ((x) & (~BITS_BEQ_HW_IDX_8821C)) 7844 #define BIT_GET_BEQ_HW_IDX_8821C(x) \ 7845 (((x) >> BIT_SHIFT_BEQ_HW_IDX_8821C) & BIT_MASK_BEQ_HW_IDX_8821C) 7846 #define BIT_SET_BEQ_HW_IDX_8821C(x, v) \ 7847 (BIT_CLEAR_BEQ_HW_IDX_8821C(x) | BIT_BEQ_HW_IDX_8821C(v)) 7848 7849 #define BIT_SHIFT_BEQ_HOST_IDX_8821C 0 7850 #define BIT_MASK_BEQ_HOST_IDX_8821C 0xfff 7851 #define BIT_BEQ_HOST_IDX_8821C(x) \ 7852 (((x) & BIT_MASK_BEQ_HOST_IDX_8821C) << BIT_SHIFT_BEQ_HOST_IDX_8821C) 7853 #define BITS_BEQ_HOST_IDX_8821C \ 7854 (BIT_MASK_BEQ_HOST_IDX_8821C << BIT_SHIFT_BEQ_HOST_IDX_8821C) 7855 #define BIT_CLEAR_BEQ_HOST_IDX_8821C(x) ((x) & (~BITS_BEQ_HOST_IDX_8821C)) 7856 #define BIT_GET_BEQ_HOST_IDX_8821C(x) \ 7857 (((x) >> BIT_SHIFT_BEQ_HOST_IDX_8821C) & BIT_MASK_BEQ_HOST_IDX_8821C) 7858 #define BIT_SET_BEQ_HOST_IDX_8821C(x, v) \ 7859 (BIT_CLEAR_BEQ_HOST_IDX_8821C(x) | BIT_BEQ_HOST_IDX_8821C(v)) 7860 7861 /* 2 REG_BKQ_TXBD_IDX_8821C */ 7862 7863 #define BIT_SHIFT_BKQ_HW_IDX_8821C 16 7864 #define BIT_MASK_BKQ_HW_IDX_8821C 0xfff 7865 #define BIT_BKQ_HW_IDX_8821C(x) \ 7866 (((x) & BIT_MASK_BKQ_HW_IDX_8821C) << BIT_SHIFT_BKQ_HW_IDX_8821C) 7867 #define BITS_BKQ_HW_IDX_8821C \ 7868 (BIT_MASK_BKQ_HW_IDX_8821C << BIT_SHIFT_BKQ_HW_IDX_8821C) 7869 #define BIT_CLEAR_BKQ_HW_IDX_8821C(x) ((x) & (~BITS_BKQ_HW_IDX_8821C)) 7870 #define BIT_GET_BKQ_HW_IDX_8821C(x) \ 7871 (((x) >> BIT_SHIFT_BKQ_HW_IDX_8821C) & BIT_MASK_BKQ_HW_IDX_8821C) 7872 #define BIT_SET_BKQ_HW_IDX_8821C(x, v) \ 7873 (BIT_CLEAR_BKQ_HW_IDX_8821C(x) | BIT_BKQ_HW_IDX_8821C(v)) 7874 7875 #define BIT_SHIFT_BKQ_HOST_IDX_8821C 0 7876 #define BIT_MASK_BKQ_HOST_IDX_8821C 0xfff 7877 #define BIT_BKQ_HOST_IDX_8821C(x) \ 7878 (((x) & BIT_MASK_BKQ_HOST_IDX_8821C) << BIT_SHIFT_BKQ_HOST_IDX_8821C) 7879 #define BITS_BKQ_HOST_IDX_8821C \ 7880 (BIT_MASK_BKQ_HOST_IDX_8821C << BIT_SHIFT_BKQ_HOST_IDX_8821C) 7881 #define BIT_CLEAR_BKQ_HOST_IDX_8821C(x) ((x) & (~BITS_BKQ_HOST_IDX_8821C)) 7882 #define BIT_GET_BKQ_HOST_IDX_8821C(x) \ 7883 (((x) >> BIT_SHIFT_BKQ_HOST_IDX_8821C) & BIT_MASK_BKQ_HOST_IDX_8821C) 7884 #define BIT_SET_BKQ_HOST_IDX_8821C(x, v) \ 7885 (BIT_CLEAR_BKQ_HOST_IDX_8821C(x) | BIT_BKQ_HOST_IDX_8821C(v)) 7886 7887 /* 2 REG_MGQ_TXBD_IDX_8821C */ 7888 7889 #define BIT_SHIFT_MGQ_HW_IDX_8821C 16 7890 #define BIT_MASK_MGQ_HW_IDX_8821C 0xfff 7891 #define BIT_MGQ_HW_IDX_8821C(x) \ 7892 (((x) & BIT_MASK_MGQ_HW_IDX_8821C) << BIT_SHIFT_MGQ_HW_IDX_8821C) 7893 #define BITS_MGQ_HW_IDX_8821C \ 7894 (BIT_MASK_MGQ_HW_IDX_8821C << BIT_SHIFT_MGQ_HW_IDX_8821C) 7895 #define BIT_CLEAR_MGQ_HW_IDX_8821C(x) ((x) & (~BITS_MGQ_HW_IDX_8821C)) 7896 #define BIT_GET_MGQ_HW_IDX_8821C(x) \ 7897 (((x) >> BIT_SHIFT_MGQ_HW_IDX_8821C) & BIT_MASK_MGQ_HW_IDX_8821C) 7898 #define BIT_SET_MGQ_HW_IDX_8821C(x, v) \ 7899 (BIT_CLEAR_MGQ_HW_IDX_8821C(x) | BIT_MGQ_HW_IDX_8821C(v)) 7900 7901 #define BIT_SHIFT_MGQ_HOST_IDX_8821C 0 7902 #define BIT_MASK_MGQ_HOST_IDX_8821C 0xfff 7903 #define BIT_MGQ_HOST_IDX_8821C(x) \ 7904 (((x) & BIT_MASK_MGQ_HOST_IDX_8821C) << BIT_SHIFT_MGQ_HOST_IDX_8821C) 7905 #define BITS_MGQ_HOST_IDX_8821C \ 7906 (BIT_MASK_MGQ_HOST_IDX_8821C << BIT_SHIFT_MGQ_HOST_IDX_8821C) 7907 #define BIT_CLEAR_MGQ_HOST_IDX_8821C(x) ((x) & (~BITS_MGQ_HOST_IDX_8821C)) 7908 #define BIT_GET_MGQ_HOST_IDX_8821C(x) \ 7909 (((x) >> BIT_SHIFT_MGQ_HOST_IDX_8821C) & BIT_MASK_MGQ_HOST_IDX_8821C) 7910 #define BIT_SET_MGQ_HOST_IDX_8821C(x, v) \ 7911 (BIT_CLEAR_MGQ_HOST_IDX_8821C(x) | BIT_MGQ_HOST_IDX_8821C(v)) 7912 7913 /* 2 REG_RXQ_RXBD_IDX_8821C */ 7914 7915 #define BIT_SHIFT_RXQ_HW_IDX_8821C 16 7916 #define BIT_MASK_RXQ_HW_IDX_8821C 0xfff 7917 #define BIT_RXQ_HW_IDX_8821C(x) \ 7918 (((x) & BIT_MASK_RXQ_HW_IDX_8821C) << BIT_SHIFT_RXQ_HW_IDX_8821C) 7919 #define BITS_RXQ_HW_IDX_8821C \ 7920 (BIT_MASK_RXQ_HW_IDX_8821C << BIT_SHIFT_RXQ_HW_IDX_8821C) 7921 #define BIT_CLEAR_RXQ_HW_IDX_8821C(x) ((x) & (~BITS_RXQ_HW_IDX_8821C)) 7922 #define BIT_GET_RXQ_HW_IDX_8821C(x) \ 7923 (((x) >> BIT_SHIFT_RXQ_HW_IDX_8821C) & BIT_MASK_RXQ_HW_IDX_8821C) 7924 #define BIT_SET_RXQ_HW_IDX_8821C(x, v) \ 7925 (BIT_CLEAR_RXQ_HW_IDX_8821C(x) | BIT_RXQ_HW_IDX_8821C(v)) 7926 7927 #define BIT_SHIFT_RXQ_HOST_IDX_8821C 0 7928 #define BIT_MASK_RXQ_HOST_IDX_8821C 0xfff 7929 #define BIT_RXQ_HOST_IDX_8821C(x) \ 7930 (((x) & BIT_MASK_RXQ_HOST_IDX_8821C) << BIT_SHIFT_RXQ_HOST_IDX_8821C) 7931 #define BITS_RXQ_HOST_IDX_8821C \ 7932 (BIT_MASK_RXQ_HOST_IDX_8821C << BIT_SHIFT_RXQ_HOST_IDX_8821C) 7933 #define BIT_CLEAR_RXQ_HOST_IDX_8821C(x) ((x) & (~BITS_RXQ_HOST_IDX_8821C)) 7934 #define BIT_GET_RXQ_HOST_IDX_8821C(x) \ 7935 (((x) >> BIT_SHIFT_RXQ_HOST_IDX_8821C) & BIT_MASK_RXQ_HOST_IDX_8821C) 7936 #define BIT_SET_RXQ_HOST_IDX_8821C(x, v) \ 7937 (BIT_CLEAR_RXQ_HOST_IDX_8821C(x) | BIT_RXQ_HOST_IDX_8821C(v)) 7938 7939 /* 2 REG_HI0Q_TXBD_IDX_8821C */ 7940 7941 #define BIT_SHIFT_HI0Q_HW_IDX_8821C 16 7942 #define BIT_MASK_HI0Q_HW_IDX_8821C 0xfff 7943 #define BIT_HI0Q_HW_IDX_8821C(x) \ 7944 (((x) & BIT_MASK_HI0Q_HW_IDX_8821C) << BIT_SHIFT_HI0Q_HW_IDX_8821C) 7945 #define BITS_HI0Q_HW_IDX_8821C \ 7946 (BIT_MASK_HI0Q_HW_IDX_8821C << BIT_SHIFT_HI0Q_HW_IDX_8821C) 7947 #define BIT_CLEAR_HI0Q_HW_IDX_8821C(x) ((x) & (~BITS_HI0Q_HW_IDX_8821C)) 7948 #define BIT_GET_HI0Q_HW_IDX_8821C(x) \ 7949 (((x) >> BIT_SHIFT_HI0Q_HW_IDX_8821C) & BIT_MASK_HI0Q_HW_IDX_8821C) 7950 #define BIT_SET_HI0Q_HW_IDX_8821C(x, v) \ 7951 (BIT_CLEAR_HI0Q_HW_IDX_8821C(x) | BIT_HI0Q_HW_IDX_8821C(v)) 7952 7953 #define BIT_SHIFT_HI0Q_HOST_IDX_8821C 0 7954 #define BIT_MASK_HI0Q_HOST_IDX_8821C 0xfff 7955 #define BIT_HI0Q_HOST_IDX_8821C(x) \ 7956 (((x) & BIT_MASK_HI0Q_HOST_IDX_8821C) << BIT_SHIFT_HI0Q_HOST_IDX_8821C) 7957 #define BITS_HI0Q_HOST_IDX_8821C \ 7958 (BIT_MASK_HI0Q_HOST_IDX_8821C << BIT_SHIFT_HI0Q_HOST_IDX_8821C) 7959 #define BIT_CLEAR_HI0Q_HOST_IDX_8821C(x) ((x) & (~BITS_HI0Q_HOST_IDX_8821C)) 7960 #define BIT_GET_HI0Q_HOST_IDX_8821C(x) \ 7961 (((x) >> BIT_SHIFT_HI0Q_HOST_IDX_8821C) & BIT_MASK_HI0Q_HOST_IDX_8821C) 7962 #define BIT_SET_HI0Q_HOST_IDX_8821C(x, v) \ 7963 (BIT_CLEAR_HI0Q_HOST_IDX_8821C(x) | BIT_HI0Q_HOST_IDX_8821C(v)) 7964 7965 /* 2 REG_HI1Q_TXBD_IDX_8821C */ 7966 7967 #define BIT_SHIFT_HI1Q_HW_IDX_8821C 16 7968 #define BIT_MASK_HI1Q_HW_IDX_8821C 0xfff 7969 #define BIT_HI1Q_HW_IDX_8821C(x) \ 7970 (((x) & BIT_MASK_HI1Q_HW_IDX_8821C) << BIT_SHIFT_HI1Q_HW_IDX_8821C) 7971 #define BITS_HI1Q_HW_IDX_8821C \ 7972 (BIT_MASK_HI1Q_HW_IDX_8821C << BIT_SHIFT_HI1Q_HW_IDX_8821C) 7973 #define BIT_CLEAR_HI1Q_HW_IDX_8821C(x) ((x) & (~BITS_HI1Q_HW_IDX_8821C)) 7974 #define BIT_GET_HI1Q_HW_IDX_8821C(x) \ 7975 (((x) >> BIT_SHIFT_HI1Q_HW_IDX_8821C) & BIT_MASK_HI1Q_HW_IDX_8821C) 7976 #define BIT_SET_HI1Q_HW_IDX_8821C(x, v) \ 7977 (BIT_CLEAR_HI1Q_HW_IDX_8821C(x) | BIT_HI1Q_HW_IDX_8821C(v)) 7978 7979 #define BIT_SHIFT_HI1Q_HOST_IDX_8821C 0 7980 #define BIT_MASK_HI1Q_HOST_IDX_8821C 0xfff 7981 #define BIT_HI1Q_HOST_IDX_8821C(x) \ 7982 (((x) & BIT_MASK_HI1Q_HOST_IDX_8821C) << BIT_SHIFT_HI1Q_HOST_IDX_8821C) 7983 #define BITS_HI1Q_HOST_IDX_8821C \ 7984 (BIT_MASK_HI1Q_HOST_IDX_8821C << BIT_SHIFT_HI1Q_HOST_IDX_8821C) 7985 #define BIT_CLEAR_HI1Q_HOST_IDX_8821C(x) ((x) & (~BITS_HI1Q_HOST_IDX_8821C)) 7986 #define BIT_GET_HI1Q_HOST_IDX_8821C(x) \ 7987 (((x) >> BIT_SHIFT_HI1Q_HOST_IDX_8821C) & BIT_MASK_HI1Q_HOST_IDX_8821C) 7988 #define BIT_SET_HI1Q_HOST_IDX_8821C(x, v) \ 7989 (BIT_CLEAR_HI1Q_HOST_IDX_8821C(x) | BIT_HI1Q_HOST_IDX_8821C(v)) 7990 7991 /* 2 REG_HI2Q_TXBD_IDX_8821C */ 7992 7993 #define BIT_SHIFT_HI2Q_HW_IDX_8821C 16 7994 #define BIT_MASK_HI2Q_HW_IDX_8821C 0xfff 7995 #define BIT_HI2Q_HW_IDX_8821C(x) \ 7996 (((x) & BIT_MASK_HI2Q_HW_IDX_8821C) << BIT_SHIFT_HI2Q_HW_IDX_8821C) 7997 #define BITS_HI2Q_HW_IDX_8821C \ 7998 (BIT_MASK_HI2Q_HW_IDX_8821C << BIT_SHIFT_HI2Q_HW_IDX_8821C) 7999 #define BIT_CLEAR_HI2Q_HW_IDX_8821C(x) ((x) & (~BITS_HI2Q_HW_IDX_8821C)) 8000 #define BIT_GET_HI2Q_HW_IDX_8821C(x) \ 8001 (((x) >> BIT_SHIFT_HI2Q_HW_IDX_8821C) & BIT_MASK_HI2Q_HW_IDX_8821C) 8002 #define BIT_SET_HI2Q_HW_IDX_8821C(x, v) \ 8003 (BIT_CLEAR_HI2Q_HW_IDX_8821C(x) | BIT_HI2Q_HW_IDX_8821C(v)) 8004 8005 #define BIT_SHIFT_HI2Q_HOST_IDX_8821C 0 8006 #define BIT_MASK_HI2Q_HOST_IDX_8821C 0xfff 8007 #define BIT_HI2Q_HOST_IDX_8821C(x) \ 8008 (((x) & BIT_MASK_HI2Q_HOST_IDX_8821C) << BIT_SHIFT_HI2Q_HOST_IDX_8821C) 8009 #define BITS_HI2Q_HOST_IDX_8821C \ 8010 (BIT_MASK_HI2Q_HOST_IDX_8821C << BIT_SHIFT_HI2Q_HOST_IDX_8821C) 8011 #define BIT_CLEAR_HI2Q_HOST_IDX_8821C(x) ((x) & (~BITS_HI2Q_HOST_IDX_8821C)) 8012 #define BIT_GET_HI2Q_HOST_IDX_8821C(x) \ 8013 (((x) >> BIT_SHIFT_HI2Q_HOST_IDX_8821C) & BIT_MASK_HI2Q_HOST_IDX_8821C) 8014 #define BIT_SET_HI2Q_HOST_IDX_8821C(x, v) \ 8015 (BIT_CLEAR_HI2Q_HOST_IDX_8821C(x) | BIT_HI2Q_HOST_IDX_8821C(v)) 8016 8017 /* 2 REG_HI3Q_TXBD_IDX_8821C */ 8018 8019 #define BIT_SHIFT_HI3Q_HW_IDX_8821C 16 8020 #define BIT_MASK_HI3Q_HW_IDX_8821C 0xfff 8021 #define BIT_HI3Q_HW_IDX_8821C(x) \ 8022 (((x) & BIT_MASK_HI3Q_HW_IDX_8821C) << BIT_SHIFT_HI3Q_HW_IDX_8821C) 8023 #define BITS_HI3Q_HW_IDX_8821C \ 8024 (BIT_MASK_HI3Q_HW_IDX_8821C << BIT_SHIFT_HI3Q_HW_IDX_8821C) 8025 #define BIT_CLEAR_HI3Q_HW_IDX_8821C(x) ((x) & (~BITS_HI3Q_HW_IDX_8821C)) 8026 #define BIT_GET_HI3Q_HW_IDX_8821C(x) \ 8027 (((x) >> BIT_SHIFT_HI3Q_HW_IDX_8821C) & BIT_MASK_HI3Q_HW_IDX_8821C) 8028 #define BIT_SET_HI3Q_HW_IDX_8821C(x, v) \ 8029 (BIT_CLEAR_HI3Q_HW_IDX_8821C(x) | BIT_HI3Q_HW_IDX_8821C(v)) 8030 8031 #define BIT_SHIFT_HI3Q_HOST_IDX_8821C 0 8032 #define BIT_MASK_HI3Q_HOST_IDX_8821C 0xfff 8033 #define BIT_HI3Q_HOST_IDX_8821C(x) \ 8034 (((x) & BIT_MASK_HI3Q_HOST_IDX_8821C) << BIT_SHIFT_HI3Q_HOST_IDX_8821C) 8035 #define BITS_HI3Q_HOST_IDX_8821C \ 8036 (BIT_MASK_HI3Q_HOST_IDX_8821C << BIT_SHIFT_HI3Q_HOST_IDX_8821C) 8037 #define BIT_CLEAR_HI3Q_HOST_IDX_8821C(x) ((x) & (~BITS_HI3Q_HOST_IDX_8821C)) 8038 #define BIT_GET_HI3Q_HOST_IDX_8821C(x) \ 8039 (((x) >> BIT_SHIFT_HI3Q_HOST_IDX_8821C) & BIT_MASK_HI3Q_HOST_IDX_8821C) 8040 #define BIT_SET_HI3Q_HOST_IDX_8821C(x, v) \ 8041 (BIT_CLEAR_HI3Q_HOST_IDX_8821C(x) | BIT_HI3Q_HOST_IDX_8821C(v)) 8042 8043 /* 2 REG_HI4Q_TXBD_IDX_8821C */ 8044 8045 #define BIT_SHIFT_HI4Q_HW_IDX_8821C 16 8046 #define BIT_MASK_HI4Q_HW_IDX_8821C 0xfff 8047 #define BIT_HI4Q_HW_IDX_8821C(x) \ 8048 (((x) & BIT_MASK_HI4Q_HW_IDX_8821C) << BIT_SHIFT_HI4Q_HW_IDX_8821C) 8049 #define BITS_HI4Q_HW_IDX_8821C \ 8050 (BIT_MASK_HI4Q_HW_IDX_8821C << BIT_SHIFT_HI4Q_HW_IDX_8821C) 8051 #define BIT_CLEAR_HI4Q_HW_IDX_8821C(x) ((x) & (~BITS_HI4Q_HW_IDX_8821C)) 8052 #define BIT_GET_HI4Q_HW_IDX_8821C(x) \ 8053 (((x) >> BIT_SHIFT_HI4Q_HW_IDX_8821C) & BIT_MASK_HI4Q_HW_IDX_8821C) 8054 #define BIT_SET_HI4Q_HW_IDX_8821C(x, v) \ 8055 (BIT_CLEAR_HI4Q_HW_IDX_8821C(x) | BIT_HI4Q_HW_IDX_8821C(v)) 8056 8057 #define BIT_SHIFT_HI4Q_HOST_IDX_8821C 0 8058 #define BIT_MASK_HI4Q_HOST_IDX_8821C 0xfff 8059 #define BIT_HI4Q_HOST_IDX_8821C(x) \ 8060 (((x) & BIT_MASK_HI4Q_HOST_IDX_8821C) << BIT_SHIFT_HI4Q_HOST_IDX_8821C) 8061 #define BITS_HI4Q_HOST_IDX_8821C \ 8062 (BIT_MASK_HI4Q_HOST_IDX_8821C << BIT_SHIFT_HI4Q_HOST_IDX_8821C) 8063 #define BIT_CLEAR_HI4Q_HOST_IDX_8821C(x) ((x) & (~BITS_HI4Q_HOST_IDX_8821C)) 8064 #define BIT_GET_HI4Q_HOST_IDX_8821C(x) \ 8065 (((x) >> BIT_SHIFT_HI4Q_HOST_IDX_8821C) & BIT_MASK_HI4Q_HOST_IDX_8821C) 8066 #define BIT_SET_HI4Q_HOST_IDX_8821C(x, v) \ 8067 (BIT_CLEAR_HI4Q_HOST_IDX_8821C(x) | BIT_HI4Q_HOST_IDX_8821C(v)) 8068 8069 /* 2 REG_HI5Q_TXBD_IDX_8821C */ 8070 8071 #define BIT_SHIFT_HI5Q_HW_IDX_8821C 16 8072 #define BIT_MASK_HI5Q_HW_IDX_8821C 0xfff 8073 #define BIT_HI5Q_HW_IDX_8821C(x) \ 8074 (((x) & BIT_MASK_HI5Q_HW_IDX_8821C) << BIT_SHIFT_HI5Q_HW_IDX_8821C) 8075 #define BITS_HI5Q_HW_IDX_8821C \ 8076 (BIT_MASK_HI5Q_HW_IDX_8821C << BIT_SHIFT_HI5Q_HW_IDX_8821C) 8077 #define BIT_CLEAR_HI5Q_HW_IDX_8821C(x) ((x) & (~BITS_HI5Q_HW_IDX_8821C)) 8078 #define BIT_GET_HI5Q_HW_IDX_8821C(x) \ 8079 (((x) >> BIT_SHIFT_HI5Q_HW_IDX_8821C) & BIT_MASK_HI5Q_HW_IDX_8821C) 8080 #define BIT_SET_HI5Q_HW_IDX_8821C(x, v) \ 8081 (BIT_CLEAR_HI5Q_HW_IDX_8821C(x) | BIT_HI5Q_HW_IDX_8821C(v)) 8082 8083 #define BIT_SHIFT_HI5Q_HOST_IDX_8821C 0 8084 #define BIT_MASK_HI5Q_HOST_IDX_8821C 0xfff 8085 #define BIT_HI5Q_HOST_IDX_8821C(x) \ 8086 (((x) & BIT_MASK_HI5Q_HOST_IDX_8821C) << BIT_SHIFT_HI5Q_HOST_IDX_8821C) 8087 #define BITS_HI5Q_HOST_IDX_8821C \ 8088 (BIT_MASK_HI5Q_HOST_IDX_8821C << BIT_SHIFT_HI5Q_HOST_IDX_8821C) 8089 #define BIT_CLEAR_HI5Q_HOST_IDX_8821C(x) ((x) & (~BITS_HI5Q_HOST_IDX_8821C)) 8090 #define BIT_GET_HI5Q_HOST_IDX_8821C(x) \ 8091 (((x) >> BIT_SHIFT_HI5Q_HOST_IDX_8821C) & BIT_MASK_HI5Q_HOST_IDX_8821C) 8092 #define BIT_SET_HI5Q_HOST_IDX_8821C(x, v) \ 8093 (BIT_CLEAR_HI5Q_HOST_IDX_8821C(x) | BIT_HI5Q_HOST_IDX_8821C(v)) 8094 8095 /* 2 REG_HI6Q_TXBD_IDX_8821C */ 8096 8097 #define BIT_SHIFT_HI6Q_HW_IDX_8821C 16 8098 #define BIT_MASK_HI6Q_HW_IDX_8821C 0xfff 8099 #define BIT_HI6Q_HW_IDX_8821C(x) \ 8100 (((x) & BIT_MASK_HI6Q_HW_IDX_8821C) << BIT_SHIFT_HI6Q_HW_IDX_8821C) 8101 #define BITS_HI6Q_HW_IDX_8821C \ 8102 (BIT_MASK_HI6Q_HW_IDX_8821C << BIT_SHIFT_HI6Q_HW_IDX_8821C) 8103 #define BIT_CLEAR_HI6Q_HW_IDX_8821C(x) ((x) & (~BITS_HI6Q_HW_IDX_8821C)) 8104 #define BIT_GET_HI6Q_HW_IDX_8821C(x) \ 8105 (((x) >> BIT_SHIFT_HI6Q_HW_IDX_8821C) & BIT_MASK_HI6Q_HW_IDX_8821C) 8106 #define BIT_SET_HI6Q_HW_IDX_8821C(x, v) \ 8107 (BIT_CLEAR_HI6Q_HW_IDX_8821C(x) | BIT_HI6Q_HW_IDX_8821C(v)) 8108 8109 #define BIT_SHIFT_HI6Q_HOST_IDX_8821C 0 8110 #define BIT_MASK_HI6Q_HOST_IDX_8821C 0xfff 8111 #define BIT_HI6Q_HOST_IDX_8821C(x) \ 8112 (((x) & BIT_MASK_HI6Q_HOST_IDX_8821C) << BIT_SHIFT_HI6Q_HOST_IDX_8821C) 8113 #define BITS_HI6Q_HOST_IDX_8821C \ 8114 (BIT_MASK_HI6Q_HOST_IDX_8821C << BIT_SHIFT_HI6Q_HOST_IDX_8821C) 8115 #define BIT_CLEAR_HI6Q_HOST_IDX_8821C(x) ((x) & (~BITS_HI6Q_HOST_IDX_8821C)) 8116 #define BIT_GET_HI6Q_HOST_IDX_8821C(x) \ 8117 (((x) >> BIT_SHIFT_HI6Q_HOST_IDX_8821C) & BIT_MASK_HI6Q_HOST_IDX_8821C) 8118 #define BIT_SET_HI6Q_HOST_IDX_8821C(x, v) \ 8119 (BIT_CLEAR_HI6Q_HOST_IDX_8821C(x) | BIT_HI6Q_HOST_IDX_8821C(v)) 8120 8121 /* 2 REG_HI7Q_TXBD_IDX_8821C */ 8122 8123 #define BIT_SHIFT_HI7Q_HW_IDX_8821C 16 8124 #define BIT_MASK_HI7Q_HW_IDX_8821C 0xfff 8125 #define BIT_HI7Q_HW_IDX_8821C(x) \ 8126 (((x) & BIT_MASK_HI7Q_HW_IDX_8821C) << BIT_SHIFT_HI7Q_HW_IDX_8821C) 8127 #define BITS_HI7Q_HW_IDX_8821C \ 8128 (BIT_MASK_HI7Q_HW_IDX_8821C << BIT_SHIFT_HI7Q_HW_IDX_8821C) 8129 #define BIT_CLEAR_HI7Q_HW_IDX_8821C(x) ((x) & (~BITS_HI7Q_HW_IDX_8821C)) 8130 #define BIT_GET_HI7Q_HW_IDX_8821C(x) \ 8131 (((x) >> BIT_SHIFT_HI7Q_HW_IDX_8821C) & BIT_MASK_HI7Q_HW_IDX_8821C) 8132 #define BIT_SET_HI7Q_HW_IDX_8821C(x, v) \ 8133 (BIT_CLEAR_HI7Q_HW_IDX_8821C(x) | BIT_HI7Q_HW_IDX_8821C(v)) 8134 8135 #define BIT_SHIFT_HI7Q_HOST_IDX_8821C 0 8136 #define BIT_MASK_HI7Q_HOST_IDX_8821C 0xfff 8137 #define BIT_HI7Q_HOST_IDX_8821C(x) \ 8138 (((x) & BIT_MASK_HI7Q_HOST_IDX_8821C) << BIT_SHIFT_HI7Q_HOST_IDX_8821C) 8139 #define BITS_HI7Q_HOST_IDX_8821C \ 8140 (BIT_MASK_HI7Q_HOST_IDX_8821C << BIT_SHIFT_HI7Q_HOST_IDX_8821C) 8141 #define BIT_CLEAR_HI7Q_HOST_IDX_8821C(x) ((x) & (~BITS_HI7Q_HOST_IDX_8821C)) 8142 #define BIT_GET_HI7Q_HOST_IDX_8821C(x) \ 8143 (((x) >> BIT_SHIFT_HI7Q_HOST_IDX_8821C) & BIT_MASK_HI7Q_HOST_IDX_8821C) 8144 #define BIT_SET_HI7Q_HOST_IDX_8821C(x, v) \ 8145 (BIT_CLEAR_HI7Q_HOST_IDX_8821C(x) | BIT_HI7Q_HOST_IDX_8821C(v)) 8146 8147 /* 2 REG_DBG_SEL_V1_8821C */ 8148 8149 #define BIT_SHIFT_DBG_SEL_8821C 0 8150 #define BIT_MASK_DBG_SEL_8821C 0xff 8151 #define BIT_DBG_SEL_8821C(x) \ 8152 (((x) & BIT_MASK_DBG_SEL_8821C) << BIT_SHIFT_DBG_SEL_8821C) 8153 #define BITS_DBG_SEL_8821C (BIT_MASK_DBG_SEL_8821C << BIT_SHIFT_DBG_SEL_8821C) 8154 #define BIT_CLEAR_DBG_SEL_8821C(x) ((x) & (~BITS_DBG_SEL_8821C)) 8155 #define BIT_GET_DBG_SEL_8821C(x) \ 8156 (((x) >> BIT_SHIFT_DBG_SEL_8821C) & BIT_MASK_DBG_SEL_8821C) 8157 #define BIT_SET_DBG_SEL_8821C(x, v) \ 8158 (BIT_CLEAR_DBG_SEL_8821C(x) | BIT_DBG_SEL_8821C(v)) 8159 8160 /* 2 REG_PCIE_HRPWM1_V1_8821C */ 8161 8162 #define BIT_SHIFT_PCIE_HRPWM_8821C 0 8163 #define BIT_MASK_PCIE_HRPWM_8821C 0xff 8164 #define BIT_PCIE_HRPWM_8821C(x) \ 8165 (((x) & BIT_MASK_PCIE_HRPWM_8821C) << BIT_SHIFT_PCIE_HRPWM_8821C) 8166 #define BITS_PCIE_HRPWM_8821C \ 8167 (BIT_MASK_PCIE_HRPWM_8821C << BIT_SHIFT_PCIE_HRPWM_8821C) 8168 #define BIT_CLEAR_PCIE_HRPWM_8821C(x) ((x) & (~BITS_PCIE_HRPWM_8821C)) 8169 #define BIT_GET_PCIE_HRPWM_8821C(x) \ 8170 (((x) >> BIT_SHIFT_PCIE_HRPWM_8821C) & BIT_MASK_PCIE_HRPWM_8821C) 8171 #define BIT_SET_PCIE_HRPWM_8821C(x, v) \ 8172 (BIT_CLEAR_PCIE_HRPWM_8821C(x) | BIT_PCIE_HRPWM_8821C(v)) 8173 8174 /* 2 REG_PCIE_HCPWM1_V1_8821C */ 8175 8176 #define BIT_SHIFT_PCIE_HCPWM_8821C 0 8177 #define BIT_MASK_PCIE_HCPWM_8821C 0xff 8178 #define BIT_PCIE_HCPWM_8821C(x) \ 8179 (((x) & BIT_MASK_PCIE_HCPWM_8821C) << BIT_SHIFT_PCIE_HCPWM_8821C) 8180 #define BITS_PCIE_HCPWM_8821C \ 8181 (BIT_MASK_PCIE_HCPWM_8821C << BIT_SHIFT_PCIE_HCPWM_8821C) 8182 #define BIT_CLEAR_PCIE_HCPWM_8821C(x) ((x) & (~BITS_PCIE_HCPWM_8821C)) 8183 #define BIT_GET_PCIE_HCPWM_8821C(x) \ 8184 (((x) >> BIT_SHIFT_PCIE_HCPWM_8821C) & BIT_MASK_PCIE_HCPWM_8821C) 8185 #define BIT_SET_PCIE_HCPWM_8821C(x, v) \ 8186 (BIT_CLEAR_PCIE_HCPWM_8821C(x) | BIT_PCIE_HCPWM_8821C(v)) 8187 8188 /* 2 REG_PCIE_CTRL2_8821C */ 8189 #define BIT_DIS_TXDMA_PRE_8821C BIT(7) 8190 #define BIT_DIS_RXDMA_PRE_8821C BIT(6) 8191 8192 #define BIT_SHIFT_HPS_CLKR_PCIE_8821C 4 8193 #define BIT_MASK_HPS_CLKR_PCIE_8821C 0x3 8194 #define BIT_HPS_CLKR_PCIE_8821C(x) \ 8195 (((x) & BIT_MASK_HPS_CLKR_PCIE_8821C) << BIT_SHIFT_HPS_CLKR_PCIE_8821C) 8196 #define BITS_HPS_CLKR_PCIE_8821C \ 8197 (BIT_MASK_HPS_CLKR_PCIE_8821C << BIT_SHIFT_HPS_CLKR_PCIE_8821C) 8198 #define BIT_CLEAR_HPS_CLKR_PCIE_8821C(x) ((x) & (~BITS_HPS_CLKR_PCIE_8821C)) 8199 #define BIT_GET_HPS_CLKR_PCIE_8821C(x) \ 8200 (((x) >> BIT_SHIFT_HPS_CLKR_PCIE_8821C) & BIT_MASK_HPS_CLKR_PCIE_8821C) 8201 #define BIT_SET_HPS_CLKR_PCIE_8821C(x, v) \ 8202 (BIT_CLEAR_HPS_CLKR_PCIE_8821C(x) | BIT_HPS_CLKR_PCIE_8821C(v)) 8203 8204 #define BIT_PCIE_INT_8821C BIT(3) 8205 #define BIT_TXFLAG_EXIT_L1_EN_8821C BIT(2) 8206 #define BIT_EN_RXDMA_ALIGN_8821C BIT(1) 8207 #define BIT_EN_TXDMA_ALIGN_8821C BIT(0) 8208 8209 /* 2 REG_PCIE_HRPWM2_V1_8821C */ 8210 8211 #define BIT_SHIFT_PCIE_HRPWM2_8821C 0 8212 #define BIT_MASK_PCIE_HRPWM2_8821C 0xffff 8213 #define BIT_PCIE_HRPWM2_8821C(x) \ 8214 (((x) & BIT_MASK_PCIE_HRPWM2_8821C) << BIT_SHIFT_PCIE_HRPWM2_8821C) 8215 #define BITS_PCIE_HRPWM2_8821C \ 8216 (BIT_MASK_PCIE_HRPWM2_8821C << BIT_SHIFT_PCIE_HRPWM2_8821C) 8217 #define BIT_CLEAR_PCIE_HRPWM2_8821C(x) ((x) & (~BITS_PCIE_HRPWM2_8821C)) 8218 #define BIT_GET_PCIE_HRPWM2_8821C(x) \ 8219 (((x) >> BIT_SHIFT_PCIE_HRPWM2_8821C) & BIT_MASK_PCIE_HRPWM2_8821C) 8220 #define BIT_SET_PCIE_HRPWM2_8821C(x, v) \ 8221 (BIT_CLEAR_PCIE_HRPWM2_8821C(x) | BIT_PCIE_HRPWM2_8821C(v)) 8222 8223 /* 2 REG_PCIE_HCPWM2_V1_8821C */ 8224 8225 #define BIT_SHIFT_PCIE_HCPWM2_8821C 0 8226 #define BIT_MASK_PCIE_HCPWM2_8821C 0xffff 8227 #define BIT_PCIE_HCPWM2_8821C(x) \ 8228 (((x) & BIT_MASK_PCIE_HCPWM2_8821C) << BIT_SHIFT_PCIE_HCPWM2_8821C) 8229 #define BITS_PCIE_HCPWM2_8821C \ 8230 (BIT_MASK_PCIE_HCPWM2_8821C << BIT_SHIFT_PCIE_HCPWM2_8821C) 8231 #define BIT_CLEAR_PCIE_HCPWM2_8821C(x) ((x) & (~BITS_PCIE_HCPWM2_8821C)) 8232 #define BIT_GET_PCIE_HCPWM2_8821C(x) \ 8233 (((x) >> BIT_SHIFT_PCIE_HCPWM2_8821C) & BIT_MASK_PCIE_HCPWM2_8821C) 8234 #define BIT_SET_PCIE_HCPWM2_8821C(x, v) \ 8235 (BIT_CLEAR_PCIE_HCPWM2_8821C(x) | BIT_PCIE_HCPWM2_8821C(v)) 8236 8237 /* 2 REG_PCIE_H2C_MSG_V1_8821C */ 8238 8239 #define BIT_SHIFT_DRV2FW_INFO_8821C 0 8240 #define BIT_MASK_DRV2FW_INFO_8821C 0xffffffffL 8241 #define BIT_DRV2FW_INFO_8821C(x) \ 8242 (((x) & BIT_MASK_DRV2FW_INFO_8821C) << BIT_SHIFT_DRV2FW_INFO_8821C) 8243 #define BITS_DRV2FW_INFO_8821C \ 8244 (BIT_MASK_DRV2FW_INFO_8821C << BIT_SHIFT_DRV2FW_INFO_8821C) 8245 #define BIT_CLEAR_DRV2FW_INFO_8821C(x) ((x) & (~BITS_DRV2FW_INFO_8821C)) 8246 #define BIT_GET_DRV2FW_INFO_8821C(x) \ 8247 (((x) >> BIT_SHIFT_DRV2FW_INFO_8821C) & BIT_MASK_DRV2FW_INFO_8821C) 8248 #define BIT_SET_DRV2FW_INFO_8821C(x, v) \ 8249 (BIT_CLEAR_DRV2FW_INFO_8821C(x) | BIT_DRV2FW_INFO_8821C(v)) 8250 8251 /* 2 REG_PCIE_C2H_MSG_V1_8821C */ 8252 8253 #define BIT_SHIFT_HCI_PCIE_C2H_MSG_8821C 0 8254 #define BIT_MASK_HCI_PCIE_C2H_MSG_8821C 0xffffffffL 8255 #define BIT_HCI_PCIE_C2H_MSG_8821C(x) \ 8256 (((x) & BIT_MASK_HCI_PCIE_C2H_MSG_8821C) \ 8257 << BIT_SHIFT_HCI_PCIE_C2H_MSG_8821C) 8258 #define BITS_HCI_PCIE_C2H_MSG_8821C \ 8259 (BIT_MASK_HCI_PCIE_C2H_MSG_8821C << BIT_SHIFT_HCI_PCIE_C2H_MSG_8821C) 8260 #define BIT_CLEAR_HCI_PCIE_C2H_MSG_8821C(x) \ 8261 ((x) & (~BITS_HCI_PCIE_C2H_MSG_8821C)) 8262 #define BIT_GET_HCI_PCIE_C2H_MSG_8821C(x) \ 8263 (((x) >> BIT_SHIFT_HCI_PCIE_C2H_MSG_8821C) & \ 8264 BIT_MASK_HCI_PCIE_C2H_MSG_8821C) 8265 #define BIT_SET_HCI_PCIE_C2H_MSG_8821C(x, v) \ 8266 (BIT_CLEAR_HCI_PCIE_C2H_MSG_8821C(x) | BIT_HCI_PCIE_C2H_MSG_8821C(v)) 8267 8268 /* 2 REG_DBI_WDATA_V1_8821C */ 8269 8270 #define BIT_SHIFT_DBI_WDATA_8821C 0 8271 #define BIT_MASK_DBI_WDATA_8821C 0xffffffffL 8272 #define BIT_DBI_WDATA_8821C(x) \ 8273 (((x) & BIT_MASK_DBI_WDATA_8821C) << BIT_SHIFT_DBI_WDATA_8821C) 8274 #define BITS_DBI_WDATA_8821C \ 8275 (BIT_MASK_DBI_WDATA_8821C << BIT_SHIFT_DBI_WDATA_8821C) 8276 #define BIT_CLEAR_DBI_WDATA_8821C(x) ((x) & (~BITS_DBI_WDATA_8821C)) 8277 #define BIT_GET_DBI_WDATA_8821C(x) \ 8278 (((x) >> BIT_SHIFT_DBI_WDATA_8821C) & BIT_MASK_DBI_WDATA_8821C) 8279 #define BIT_SET_DBI_WDATA_8821C(x, v) \ 8280 (BIT_CLEAR_DBI_WDATA_8821C(x) | BIT_DBI_WDATA_8821C(v)) 8281 8282 /* 2 REG_DBI_RDATA_V1_8821C */ 8283 8284 #define BIT_SHIFT_DBI_RDATA_8821C 0 8285 #define BIT_MASK_DBI_RDATA_8821C 0xffffffffL 8286 #define BIT_DBI_RDATA_8821C(x) \ 8287 (((x) & BIT_MASK_DBI_RDATA_8821C) << BIT_SHIFT_DBI_RDATA_8821C) 8288 #define BITS_DBI_RDATA_8821C \ 8289 (BIT_MASK_DBI_RDATA_8821C << BIT_SHIFT_DBI_RDATA_8821C) 8290 #define BIT_CLEAR_DBI_RDATA_8821C(x) ((x) & (~BITS_DBI_RDATA_8821C)) 8291 #define BIT_GET_DBI_RDATA_8821C(x) \ 8292 (((x) >> BIT_SHIFT_DBI_RDATA_8821C) & BIT_MASK_DBI_RDATA_8821C) 8293 #define BIT_SET_DBI_RDATA_8821C(x, v) \ 8294 (BIT_CLEAR_DBI_RDATA_8821C(x) | BIT_DBI_RDATA_8821C(v)) 8295 8296 /* 2 REG_DBI_FLAG_V1_8821C */ 8297 #define BIT_EN_STUCK_DBG_8821C BIT(26) 8298 #define BIT_RX_STUCK_8821C BIT(25) 8299 #define BIT_TX_STUCK_8821C BIT(24) 8300 #define BIT_DBI_RFLAG_8821C BIT(17) 8301 #define BIT_DBI_WFLAG_8821C BIT(16) 8302 8303 #define BIT_SHIFT_DBI_WREN_8821C 12 8304 #define BIT_MASK_DBI_WREN_8821C 0xf 8305 #define BIT_DBI_WREN_8821C(x) \ 8306 (((x) & BIT_MASK_DBI_WREN_8821C) << BIT_SHIFT_DBI_WREN_8821C) 8307 #define BITS_DBI_WREN_8821C \ 8308 (BIT_MASK_DBI_WREN_8821C << BIT_SHIFT_DBI_WREN_8821C) 8309 #define BIT_CLEAR_DBI_WREN_8821C(x) ((x) & (~BITS_DBI_WREN_8821C)) 8310 #define BIT_GET_DBI_WREN_8821C(x) \ 8311 (((x) >> BIT_SHIFT_DBI_WREN_8821C) & BIT_MASK_DBI_WREN_8821C) 8312 #define BIT_SET_DBI_WREN_8821C(x, v) \ 8313 (BIT_CLEAR_DBI_WREN_8821C(x) | BIT_DBI_WREN_8821C(v)) 8314 8315 #define BIT_SHIFT_DBI_ADDR_8821C 0 8316 #define BIT_MASK_DBI_ADDR_8821C 0xfff 8317 #define BIT_DBI_ADDR_8821C(x) \ 8318 (((x) & BIT_MASK_DBI_ADDR_8821C) << BIT_SHIFT_DBI_ADDR_8821C) 8319 #define BITS_DBI_ADDR_8821C \ 8320 (BIT_MASK_DBI_ADDR_8821C << BIT_SHIFT_DBI_ADDR_8821C) 8321 #define BIT_CLEAR_DBI_ADDR_8821C(x) ((x) & (~BITS_DBI_ADDR_8821C)) 8322 #define BIT_GET_DBI_ADDR_8821C(x) \ 8323 (((x) >> BIT_SHIFT_DBI_ADDR_8821C) & BIT_MASK_DBI_ADDR_8821C) 8324 #define BIT_SET_DBI_ADDR_8821C(x, v) \ 8325 (BIT_CLEAR_DBI_ADDR_8821C(x) | BIT_DBI_ADDR_8821C(v)) 8326 8327 /* 2 REG_MDIO_V1_8821C */ 8328 8329 #define BIT_SHIFT_MDIO_RDATA_8821C 16 8330 #define BIT_MASK_MDIO_RDATA_8821C 0xffff 8331 #define BIT_MDIO_RDATA_8821C(x) \ 8332 (((x) & BIT_MASK_MDIO_RDATA_8821C) << BIT_SHIFT_MDIO_RDATA_8821C) 8333 #define BITS_MDIO_RDATA_8821C \ 8334 (BIT_MASK_MDIO_RDATA_8821C << BIT_SHIFT_MDIO_RDATA_8821C) 8335 #define BIT_CLEAR_MDIO_RDATA_8821C(x) ((x) & (~BITS_MDIO_RDATA_8821C)) 8336 #define BIT_GET_MDIO_RDATA_8821C(x) \ 8337 (((x) >> BIT_SHIFT_MDIO_RDATA_8821C) & BIT_MASK_MDIO_RDATA_8821C) 8338 #define BIT_SET_MDIO_RDATA_8821C(x, v) \ 8339 (BIT_CLEAR_MDIO_RDATA_8821C(x) | BIT_MDIO_RDATA_8821C(v)) 8340 8341 #define BIT_SHIFT_MDIO_WDATA_8821C 0 8342 #define BIT_MASK_MDIO_WDATA_8821C 0xffff 8343 #define BIT_MDIO_WDATA_8821C(x) \ 8344 (((x) & BIT_MASK_MDIO_WDATA_8821C) << BIT_SHIFT_MDIO_WDATA_8821C) 8345 #define BITS_MDIO_WDATA_8821C \ 8346 (BIT_MASK_MDIO_WDATA_8821C << BIT_SHIFT_MDIO_WDATA_8821C) 8347 #define BIT_CLEAR_MDIO_WDATA_8821C(x) ((x) & (~BITS_MDIO_WDATA_8821C)) 8348 #define BIT_GET_MDIO_WDATA_8821C(x) \ 8349 (((x) >> BIT_SHIFT_MDIO_WDATA_8821C) & BIT_MASK_MDIO_WDATA_8821C) 8350 #define BIT_SET_MDIO_WDATA_8821C(x, v) \ 8351 (BIT_CLEAR_MDIO_WDATA_8821C(x) | BIT_MDIO_WDATA_8821C(v)) 8352 8353 /* 2 REG_PCIE_MIX_CFG_8821C */ 8354 8355 #define BIT_SHIFT_MDIO_PHY_ADDR_8821C 24 8356 #define BIT_MASK_MDIO_PHY_ADDR_8821C 0x1f 8357 #define BIT_MDIO_PHY_ADDR_8821C(x) \ 8358 (((x) & BIT_MASK_MDIO_PHY_ADDR_8821C) << BIT_SHIFT_MDIO_PHY_ADDR_8821C) 8359 #define BITS_MDIO_PHY_ADDR_8821C \ 8360 (BIT_MASK_MDIO_PHY_ADDR_8821C << BIT_SHIFT_MDIO_PHY_ADDR_8821C) 8361 #define BIT_CLEAR_MDIO_PHY_ADDR_8821C(x) ((x) & (~BITS_MDIO_PHY_ADDR_8821C)) 8362 #define BIT_GET_MDIO_PHY_ADDR_8821C(x) \ 8363 (((x) >> BIT_SHIFT_MDIO_PHY_ADDR_8821C) & BIT_MASK_MDIO_PHY_ADDR_8821C) 8364 #define BIT_SET_MDIO_PHY_ADDR_8821C(x, v) \ 8365 (BIT_CLEAR_MDIO_PHY_ADDR_8821C(x) | BIT_MDIO_PHY_ADDR_8821C(v)) 8366 8367 #define BIT_SHIFT_WATCH_DOG_RECORD_V1_8821C 10 8368 #define BIT_MASK_WATCH_DOG_RECORD_V1_8821C 0x3fff 8369 #define BIT_WATCH_DOG_RECORD_V1_8821C(x) \ 8370 (((x) & BIT_MASK_WATCH_DOG_RECORD_V1_8821C) \ 8371 << BIT_SHIFT_WATCH_DOG_RECORD_V1_8821C) 8372 #define BITS_WATCH_DOG_RECORD_V1_8821C \ 8373 (BIT_MASK_WATCH_DOG_RECORD_V1_8821C \ 8374 << BIT_SHIFT_WATCH_DOG_RECORD_V1_8821C) 8375 #define BIT_CLEAR_WATCH_DOG_RECORD_V1_8821C(x) \ 8376 ((x) & (~BITS_WATCH_DOG_RECORD_V1_8821C)) 8377 #define BIT_GET_WATCH_DOG_RECORD_V1_8821C(x) \ 8378 (((x) >> BIT_SHIFT_WATCH_DOG_RECORD_V1_8821C) & \ 8379 BIT_MASK_WATCH_DOG_RECORD_V1_8821C) 8380 #define BIT_SET_WATCH_DOG_RECORD_V1_8821C(x, v) \ 8381 (BIT_CLEAR_WATCH_DOG_RECORD_V1_8821C(x) | \ 8382 BIT_WATCH_DOG_RECORD_V1_8821C(v)) 8383 8384 #define BIT_R_IO_TIMEOUT_FLAG_V1_8821C BIT(9) 8385 #define BIT_EN_WATCH_DOG_8821C BIT(8) 8386 #define BIT_ECRC_EN_V1_8821C BIT(7) 8387 #define BIT_MDIO_RFLAG_V1_8821C BIT(6) 8388 #define BIT_MDIO_WFLAG_V1_8821C BIT(5) 8389 8390 #define BIT_SHIFT_MDIO_REG_ADDR_V1_8821C 0 8391 #define BIT_MASK_MDIO_REG_ADDR_V1_8821C 0x1f 8392 #define BIT_MDIO_REG_ADDR_V1_8821C(x) \ 8393 (((x) & BIT_MASK_MDIO_REG_ADDR_V1_8821C) \ 8394 << BIT_SHIFT_MDIO_REG_ADDR_V1_8821C) 8395 #define BITS_MDIO_REG_ADDR_V1_8821C \ 8396 (BIT_MASK_MDIO_REG_ADDR_V1_8821C << BIT_SHIFT_MDIO_REG_ADDR_V1_8821C) 8397 #define BIT_CLEAR_MDIO_REG_ADDR_V1_8821C(x) \ 8398 ((x) & (~BITS_MDIO_REG_ADDR_V1_8821C)) 8399 #define BIT_GET_MDIO_REG_ADDR_V1_8821C(x) \ 8400 (((x) >> BIT_SHIFT_MDIO_REG_ADDR_V1_8821C) & \ 8401 BIT_MASK_MDIO_REG_ADDR_V1_8821C) 8402 #define BIT_SET_MDIO_REG_ADDR_V1_8821C(x, v) \ 8403 (BIT_CLEAR_MDIO_REG_ADDR_V1_8821C(x) | BIT_MDIO_REG_ADDR_V1_8821C(v)) 8404 8405 /* 2 REG_HCI_MIX_CFG_8821C */ 8406 #define BIT_HOST_GEN2_SUPPORT_8821C BIT(20) 8407 8408 #define BIT_SHIFT_TXDMA_ERR_FLAG_8821C 16 8409 #define BIT_MASK_TXDMA_ERR_FLAG_8821C 0xf 8410 #define BIT_TXDMA_ERR_FLAG_8821C(x) \ 8411 (((x) & BIT_MASK_TXDMA_ERR_FLAG_8821C) \ 8412 << BIT_SHIFT_TXDMA_ERR_FLAG_8821C) 8413 #define BITS_TXDMA_ERR_FLAG_8821C \ 8414 (BIT_MASK_TXDMA_ERR_FLAG_8821C << BIT_SHIFT_TXDMA_ERR_FLAG_8821C) 8415 #define BIT_CLEAR_TXDMA_ERR_FLAG_8821C(x) ((x) & (~BITS_TXDMA_ERR_FLAG_8821C)) 8416 #define BIT_GET_TXDMA_ERR_FLAG_8821C(x) \ 8417 (((x) >> BIT_SHIFT_TXDMA_ERR_FLAG_8821C) & \ 8418 BIT_MASK_TXDMA_ERR_FLAG_8821C) 8419 #define BIT_SET_TXDMA_ERR_FLAG_8821C(x, v) \ 8420 (BIT_CLEAR_TXDMA_ERR_FLAG_8821C(x) | BIT_TXDMA_ERR_FLAG_8821C(v)) 8421 8422 #define BIT_SHIFT_EARLY_MODE_SEL_8821C 12 8423 #define BIT_MASK_EARLY_MODE_SEL_8821C 0xf 8424 #define BIT_EARLY_MODE_SEL_8821C(x) \ 8425 (((x) & BIT_MASK_EARLY_MODE_SEL_8821C) \ 8426 << BIT_SHIFT_EARLY_MODE_SEL_8821C) 8427 #define BITS_EARLY_MODE_SEL_8821C \ 8428 (BIT_MASK_EARLY_MODE_SEL_8821C << BIT_SHIFT_EARLY_MODE_SEL_8821C) 8429 #define BIT_CLEAR_EARLY_MODE_SEL_8821C(x) ((x) & (~BITS_EARLY_MODE_SEL_8821C)) 8430 #define BIT_GET_EARLY_MODE_SEL_8821C(x) \ 8431 (((x) >> BIT_SHIFT_EARLY_MODE_SEL_8821C) & \ 8432 BIT_MASK_EARLY_MODE_SEL_8821C) 8433 #define BIT_SET_EARLY_MODE_SEL_8821C(x, v) \ 8434 (BIT_CLEAR_EARLY_MODE_SEL_8821C(x) | BIT_EARLY_MODE_SEL_8821C(v)) 8435 8436 #define BIT_EPHY_RX50_EN_8821C BIT(11) 8437 8438 #define BIT_SHIFT_MSI_TIMEOUT_ID_V1_8821C 8 8439 #define BIT_MASK_MSI_TIMEOUT_ID_V1_8821C 0x7 8440 #define BIT_MSI_TIMEOUT_ID_V1_8821C(x) \ 8441 (((x) & BIT_MASK_MSI_TIMEOUT_ID_V1_8821C) \ 8442 << BIT_SHIFT_MSI_TIMEOUT_ID_V1_8821C) 8443 #define BITS_MSI_TIMEOUT_ID_V1_8821C \ 8444 (BIT_MASK_MSI_TIMEOUT_ID_V1_8821C << BIT_SHIFT_MSI_TIMEOUT_ID_V1_8821C) 8445 #define BIT_CLEAR_MSI_TIMEOUT_ID_V1_8821C(x) \ 8446 ((x) & (~BITS_MSI_TIMEOUT_ID_V1_8821C)) 8447 #define BIT_GET_MSI_TIMEOUT_ID_V1_8821C(x) \ 8448 (((x) >> BIT_SHIFT_MSI_TIMEOUT_ID_V1_8821C) & \ 8449 BIT_MASK_MSI_TIMEOUT_ID_V1_8821C) 8450 #define BIT_SET_MSI_TIMEOUT_ID_V1_8821C(x, v) \ 8451 (BIT_CLEAR_MSI_TIMEOUT_ID_V1_8821C(x) | BIT_MSI_TIMEOUT_ID_V1_8821C(v)) 8452 8453 #define BIT_RADDR_RD_8821C BIT(7) 8454 #define BIT_EN_MUL_TAG_8821C BIT(6) 8455 #define BIT_EN_EARLY_MODE_8821C BIT(5) 8456 #define BIT_L0S_LINK_OFF_8821C BIT(4) 8457 #define BIT_ACT_LINK_OFF_8821C BIT(3) 8458 #define BIT_EN_SLOW_MAC_TX_8821C BIT(2) 8459 #define BIT_EN_SLOW_MAC_RX_8821C BIT(1) 8460 8461 /* 2 REG_STC_INT_CS_8821C(PCIE STATE CHANGE INTERRUPT CONTROL AND STATUS) */ 8462 #define BIT_STC_INT_EN_8821C BIT(31) 8463 8464 #define BIT_SHIFT_STC_INT_FLAG_8821C 16 8465 #define BIT_MASK_STC_INT_FLAG_8821C 0xff 8466 #define BIT_STC_INT_FLAG_8821C(x) \ 8467 (((x) & BIT_MASK_STC_INT_FLAG_8821C) << BIT_SHIFT_STC_INT_FLAG_8821C) 8468 #define BITS_STC_INT_FLAG_8821C \ 8469 (BIT_MASK_STC_INT_FLAG_8821C << BIT_SHIFT_STC_INT_FLAG_8821C) 8470 #define BIT_CLEAR_STC_INT_FLAG_8821C(x) ((x) & (~BITS_STC_INT_FLAG_8821C)) 8471 #define BIT_GET_STC_INT_FLAG_8821C(x) \ 8472 (((x) >> BIT_SHIFT_STC_INT_FLAG_8821C) & BIT_MASK_STC_INT_FLAG_8821C) 8473 #define BIT_SET_STC_INT_FLAG_8821C(x, v) \ 8474 (BIT_CLEAR_STC_INT_FLAG_8821C(x) | BIT_STC_INT_FLAG_8821C(v)) 8475 8476 #define BIT_SHIFT_STC_INT_IDX_8821C 8 8477 #define BIT_MASK_STC_INT_IDX_8821C 0x7 8478 #define BIT_STC_INT_IDX_8821C(x) \ 8479 (((x) & BIT_MASK_STC_INT_IDX_8821C) << BIT_SHIFT_STC_INT_IDX_8821C) 8480 #define BITS_STC_INT_IDX_8821C \ 8481 (BIT_MASK_STC_INT_IDX_8821C << BIT_SHIFT_STC_INT_IDX_8821C) 8482 #define BIT_CLEAR_STC_INT_IDX_8821C(x) ((x) & (~BITS_STC_INT_IDX_8821C)) 8483 #define BIT_GET_STC_INT_IDX_8821C(x) \ 8484 (((x) >> BIT_SHIFT_STC_INT_IDX_8821C) & BIT_MASK_STC_INT_IDX_8821C) 8485 #define BIT_SET_STC_INT_IDX_8821C(x, v) \ 8486 (BIT_CLEAR_STC_INT_IDX_8821C(x) | BIT_STC_INT_IDX_8821C(v)) 8487 8488 #define BIT_SHIFT_STC_INT_REALTIME_CS_8821C 0 8489 #define BIT_MASK_STC_INT_REALTIME_CS_8821C 0x3f 8490 #define BIT_STC_INT_REALTIME_CS_8821C(x) \ 8491 (((x) & BIT_MASK_STC_INT_REALTIME_CS_8821C) \ 8492 << BIT_SHIFT_STC_INT_REALTIME_CS_8821C) 8493 #define BITS_STC_INT_REALTIME_CS_8821C \ 8494 (BIT_MASK_STC_INT_REALTIME_CS_8821C \ 8495 << BIT_SHIFT_STC_INT_REALTIME_CS_8821C) 8496 #define BIT_CLEAR_STC_INT_REALTIME_CS_8821C(x) \ 8497 ((x) & (~BITS_STC_INT_REALTIME_CS_8821C)) 8498 #define BIT_GET_STC_INT_REALTIME_CS_8821C(x) \ 8499 (((x) >> BIT_SHIFT_STC_INT_REALTIME_CS_8821C) & \ 8500 BIT_MASK_STC_INT_REALTIME_CS_8821C) 8501 #define BIT_SET_STC_INT_REALTIME_CS_8821C(x, v) \ 8502 (BIT_CLEAR_STC_INT_REALTIME_CS_8821C(x) | \ 8503 BIT_STC_INT_REALTIME_CS_8821C(v)) 8504 8505 /* 2 REG_ST_INT_CFG_8821C(PCIE STATE CHANGE INTERRUPT CONFIGURATION) */ 8506 #define BIT_STC_INT_GRP_EN_8821C BIT(31) 8507 8508 #define BIT_SHIFT_STC_INT_EXPECT_LS_8821C 8 8509 #define BIT_MASK_STC_INT_EXPECT_LS_8821C 0x3f 8510 #define BIT_STC_INT_EXPECT_LS_8821C(x) \ 8511 (((x) & BIT_MASK_STC_INT_EXPECT_LS_8821C) \ 8512 << BIT_SHIFT_STC_INT_EXPECT_LS_8821C) 8513 #define BITS_STC_INT_EXPECT_LS_8821C \ 8514 (BIT_MASK_STC_INT_EXPECT_LS_8821C << BIT_SHIFT_STC_INT_EXPECT_LS_8821C) 8515 #define BIT_CLEAR_STC_INT_EXPECT_LS_8821C(x) \ 8516 ((x) & (~BITS_STC_INT_EXPECT_LS_8821C)) 8517 #define BIT_GET_STC_INT_EXPECT_LS_8821C(x) \ 8518 (((x) >> BIT_SHIFT_STC_INT_EXPECT_LS_8821C) & \ 8519 BIT_MASK_STC_INT_EXPECT_LS_8821C) 8520 #define BIT_SET_STC_INT_EXPECT_LS_8821C(x, v) \ 8521 (BIT_CLEAR_STC_INT_EXPECT_LS_8821C(x) | BIT_STC_INT_EXPECT_LS_8821C(v)) 8522 8523 #define BIT_SHIFT_STC_INT_EXPECT_CS_8821C 0 8524 #define BIT_MASK_STC_INT_EXPECT_CS_8821C 0x3f 8525 #define BIT_STC_INT_EXPECT_CS_8821C(x) \ 8526 (((x) & BIT_MASK_STC_INT_EXPECT_CS_8821C) \ 8527 << BIT_SHIFT_STC_INT_EXPECT_CS_8821C) 8528 #define BITS_STC_INT_EXPECT_CS_8821C \ 8529 (BIT_MASK_STC_INT_EXPECT_CS_8821C << BIT_SHIFT_STC_INT_EXPECT_CS_8821C) 8530 #define BIT_CLEAR_STC_INT_EXPECT_CS_8821C(x) \ 8531 ((x) & (~BITS_STC_INT_EXPECT_CS_8821C)) 8532 #define BIT_GET_STC_INT_EXPECT_CS_8821C(x) \ 8533 (((x) >> BIT_SHIFT_STC_INT_EXPECT_CS_8821C) & \ 8534 BIT_MASK_STC_INT_EXPECT_CS_8821C) 8535 #define BIT_SET_STC_INT_EXPECT_CS_8821C(x, v) \ 8536 (BIT_CLEAR_STC_INT_EXPECT_CS_8821C(x) | BIT_STC_INT_EXPECT_CS_8821C(v)) 8537 8538 /* 2 REG_CMU_DLY_CTRL_8821C(PCIE PHY CLOCK MGT UNIT DELAY CONTROL ) */ 8539 #define BIT_CMU_DLY_EN_8821C BIT(31) 8540 #define BIT_CMU_DLY_MODE_8821C BIT(30) 8541 8542 #define BIT_SHIFT_CMU_DLY_PRE_DIV_8821C 0 8543 #define BIT_MASK_CMU_DLY_PRE_DIV_8821C 0xff 8544 #define BIT_CMU_DLY_PRE_DIV_8821C(x) \ 8545 (((x) & BIT_MASK_CMU_DLY_PRE_DIV_8821C) \ 8546 << BIT_SHIFT_CMU_DLY_PRE_DIV_8821C) 8547 #define BITS_CMU_DLY_PRE_DIV_8821C \ 8548 (BIT_MASK_CMU_DLY_PRE_DIV_8821C << BIT_SHIFT_CMU_DLY_PRE_DIV_8821C) 8549 #define BIT_CLEAR_CMU_DLY_PRE_DIV_8821C(x) ((x) & (~BITS_CMU_DLY_PRE_DIV_8821C)) 8550 #define BIT_GET_CMU_DLY_PRE_DIV_8821C(x) \ 8551 (((x) >> BIT_SHIFT_CMU_DLY_PRE_DIV_8821C) & \ 8552 BIT_MASK_CMU_DLY_PRE_DIV_8821C) 8553 #define BIT_SET_CMU_DLY_PRE_DIV_8821C(x, v) \ 8554 (BIT_CLEAR_CMU_DLY_PRE_DIV_8821C(x) | BIT_CMU_DLY_PRE_DIV_8821C(v)) 8555 8556 /* 2 REG_CMU_DLY_CFG_8821C(PCIE PHY CLOCK MGT UNIT DELAY CONFIGURATION ) */ 8557 8558 #define BIT_SHIFT_CMU_DLY_LTR_A2I_8821C 24 8559 #define BIT_MASK_CMU_DLY_LTR_A2I_8821C 0xff 8560 #define BIT_CMU_DLY_LTR_A2I_8821C(x) \ 8561 (((x) & BIT_MASK_CMU_DLY_LTR_A2I_8821C) \ 8562 << BIT_SHIFT_CMU_DLY_LTR_A2I_8821C) 8563 #define BITS_CMU_DLY_LTR_A2I_8821C \ 8564 (BIT_MASK_CMU_DLY_LTR_A2I_8821C << BIT_SHIFT_CMU_DLY_LTR_A2I_8821C) 8565 #define BIT_CLEAR_CMU_DLY_LTR_A2I_8821C(x) ((x) & (~BITS_CMU_DLY_LTR_A2I_8821C)) 8566 #define BIT_GET_CMU_DLY_LTR_A2I_8821C(x) \ 8567 (((x) >> BIT_SHIFT_CMU_DLY_LTR_A2I_8821C) & \ 8568 BIT_MASK_CMU_DLY_LTR_A2I_8821C) 8569 #define BIT_SET_CMU_DLY_LTR_A2I_8821C(x, v) \ 8570 (BIT_CLEAR_CMU_DLY_LTR_A2I_8821C(x) | BIT_CMU_DLY_LTR_A2I_8821C(v)) 8571 8572 #define BIT_SHIFT_CMU_DLY_LTR_I2A_8821C 16 8573 #define BIT_MASK_CMU_DLY_LTR_I2A_8821C 0xff 8574 #define BIT_CMU_DLY_LTR_I2A_8821C(x) \ 8575 (((x) & BIT_MASK_CMU_DLY_LTR_I2A_8821C) \ 8576 << BIT_SHIFT_CMU_DLY_LTR_I2A_8821C) 8577 #define BITS_CMU_DLY_LTR_I2A_8821C \ 8578 (BIT_MASK_CMU_DLY_LTR_I2A_8821C << BIT_SHIFT_CMU_DLY_LTR_I2A_8821C) 8579 #define BIT_CLEAR_CMU_DLY_LTR_I2A_8821C(x) ((x) & (~BITS_CMU_DLY_LTR_I2A_8821C)) 8580 #define BIT_GET_CMU_DLY_LTR_I2A_8821C(x) \ 8581 (((x) >> BIT_SHIFT_CMU_DLY_LTR_I2A_8821C) & \ 8582 BIT_MASK_CMU_DLY_LTR_I2A_8821C) 8583 #define BIT_SET_CMU_DLY_LTR_I2A_8821C(x, v) \ 8584 (BIT_CLEAR_CMU_DLY_LTR_I2A_8821C(x) | BIT_CMU_DLY_LTR_I2A_8821C(v)) 8585 8586 #define BIT_SHIFT_CMU_DLY_LTR_IDLE_8821C 8 8587 #define BIT_MASK_CMU_DLY_LTR_IDLE_8821C 0xff 8588 #define BIT_CMU_DLY_LTR_IDLE_8821C(x) \ 8589 (((x) & BIT_MASK_CMU_DLY_LTR_IDLE_8821C) \ 8590 << BIT_SHIFT_CMU_DLY_LTR_IDLE_8821C) 8591 #define BITS_CMU_DLY_LTR_IDLE_8821C \ 8592 (BIT_MASK_CMU_DLY_LTR_IDLE_8821C << BIT_SHIFT_CMU_DLY_LTR_IDLE_8821C) 8593 #define BIT_CLEAR_CMU_DLY_LTR_IDLE_8821C(x) \ 8594 ((x) & (~BITS_CMU_DLY_LTR_IDLE_8821C)) 8595 #define BIT_GET_CMU_DLY_LTR_IDLE_8821C(x) \ 8596 (((x) >> BIT_SHIFT_CMU_DLY_LTR_IDLE_8821C) & \ 8597 BIT_MASK_CMU_DLY_LTR_IDLE_8821C) 8598 #define BIT_SET_CMU_DLY_LTR_IDLE_8821C(x, v) \ 8599 (BIT_CLEAR_CMU_DLY_LTR_IDLE_8821C(x) | BIT_CMU_DLY_LTR_IDLE_8821C(v)) 8600 8601 #define BIT_SHIFT_CMU_DLY_LTR_ACT_8821C 0 8602 #define BIT_MASK_CMU_DLY_LTR_ACT_8821C 0xff 8603 #define BIT_CMU_DLY_LTR_ACT_8821C(x) \ 8604 (((x) & BIT_MASK_CMU_DLY_LTR_ACT_8821C) \ 8605 << BIT_SHIFT_CMU_DLY_LTR_ACT_8821C) 8606 #define BITS_CMU_DLY_LTR_ACT_8821C \ 8607 (BIT_MASK_CMU_DLY_LTR_ACT_8821C << BIT_SHIFT_CMU_DLY_LTR_ACT_8821C) 8608 #define BIT_CLEAR_CMU_DLY_LTR_ACT_8821C(x) ((x) & (~BITS_CMU_DLY_LTR_ACT_8821C)) 8609 #define BIT_GET_CMU_DLY_LTR_ACT_8821C(x) \ 8610 (((x) >> BIT_SHIFT_CMU_DLY_LTR_ACT_8821C) & \ 8611 BIT_MASK_CMU_DLY_LTR_ACT_8821C) 8612 #define BIT_SET_CMU_DLY_LTR_ACT_8821C(x, v) \ 8613 (BIT_CLEAR_CMU_DLY_LTR_ACT_8821C(x) | BIT_CMU_DLY_LTR_ACT_8821C(v)) 8614 8615 /* 2 REG_H2CQ_TXBD_DESA_8821C */ 8616 8617 #define BIT_SHIFT_H2CQ_TXBD_DESA_8821C 0 8618 #define BIT_MASK_H2CQ_TXBD_DESA_8821C 0xffffffffffffffffL 8619 #define BIT_H2CQ_TXBD_DESA_8821C(x) \ 8620 (((x) & BIT_MASK_H2CQ_TXBD_DESA_8821C) \ 8621 << BIT_SHIFT_H2CQ_TXBD_DESA_8821C) 8622 #define BITS_H2CQ_TXBD_DESA_8821C \ 8623 (BIT_MASK_H2CQ_TXBD_DESA_8821C << BIT_SHIFT_H2CQ_TXBD_DESA_8821C) 8624 #define BIT_CLEAR_H2CQ_TXBD_DESA_8821C(x) ((x) & (~BITS_H2CQ_TXBD_DESA_8821C)) 8625 #define BIT_GET_H2CQ_TXBD_DESA_8821C(x) \ 8626 (((x) >> BIT_SHIFT_H2CQ_TXBD_DESA_8821C) & \ 8627 BIT_MASK_H2CQ_TXBD_DESA_8821C) 8628 #define BIT_SET_H2CQ_TXBD_DESA_8821C(x, v) \ 8629 (BIT_CLEAR_H2CQ_TXBD_DESA_8821C(x) | BIT_H2CQ_TXBD_DESA_8821C(v)) 8630 8631 /* 2 REG_H2CQ_TXBD_NUM_8821C */ 8632 #define BIT_PCIE_H2CQ_FLAG_8821C BIT(14) 8633 8634 #define BIT_SHIFT_H2CQ_DESC_MODE_8821C 12 8635 #define BIT_MASK_H2CQ_DESC_MODE_8821C 0x3 8636 #define BIT_H2CQ_DESC_MODE_8821C(x) \ 8637 (((x) & BIT_MASK_H2CQ_DESC_MODE_8821C) \ 8638 << BIT_SHIFT_H2CQ_DESC_MODE_8821C) 8639 #define BITS_H2CQ_DESC_MODE_8821C \ 8640 (BIT_MASK_H2CQ_DESC_MODE_8821C << BIT_SHIFT_H2CQ_DESC_MODE_8821C) 8641 #define BIT_CLEAR_H2CQ_DESC_MODE_8821C(x) ((x) & (~BITS_H2CQ_DESC_MODE_8821C)) 8642 #define BIT_GET_H2CQ_DESC_MODE_8821C(x) \ 8643 (((x) >> BIT_SHIFT_H2CQ_DESC_MODE_8821C) & \ 8644 BIT_MASK_H2CQ_DESC_MODE_8821C) 8645 #define BIT_SET_H2CQ_DESC_MODE_8821C(x, v) \ 8646 (BIT_CLEAR_H2CQ_DESC_MODE_8821C(x) | BIT_H2CQ_DESC_MODE_8821C(v)) 8647 8648 #define BIT_SHIFT_H2CQ_DESC_NUM_8821C 0 8649 #define BIT_MASK_H2CQ_DESC_NUM_8821C 0xfff 8650 #define BIT_H2CQ_DESC_NUM_8821C(x) \ 8651 (((x) & BIT_MASK_H2CQ_DESC_NUM_8821C) << BIT_SHIFT_H2CQ_DESC_NUM_8821C) 8652 #define BITS_H2CQ_DESC_NUM_8821C \ 8653 (BIT_MASK_H2CQ_DESC_NUM_8821C << BIT_SHIFT_H2CQ_DESC_NUM_8821C) 8654 #define BIT_CLEAR_H2CQ_DESC_NUM_8821C(x) ((x) & (~BITS_H2CQ_DESC_NUM_8821C)) 8655 #define BIT_GET_H2CQ_DESC_NUM_8821C(x) \ 8656 (((x) >> BIT_SHIFT_H2CQ_DESC_NUM_8821C) & BIT_MASK_H2CQ_DESC_NUM_8821C) 8657 #define BIT_SET_H2CQ_DESC_NUM_8821C(x, v) \ 8658 (BIT_CLEAR_H2CQ_DESC_NUM_8821C(x) | BIT_H2CQ_DESC_NUM_8821C(v)) 8659 8660 /* 2 REG_H2CQ_TXBD_IDX_8821C */ 8661 8662 #define BIT_SHIFT_H2CQ_HW_IDX_8821C 16 8663 #define BIT_MASK_H2CQ_HW_IDX_8821C 0xfff 8664 #define BIT_H2CQ_HW_IDX_8821C(x) \ 8665 (((x) & BIT_MASK_H2CQ_HW_IDX_8821C) << BIT_SHIFT_H2CQ_HW_IDX_8821C) 8666 #define BITS_H2CQ_HW_IDX_8821C \ 8667 (BIT_MASK_H2CQ_HW_IDX_8821C << BIT_SHIFT_H2CQ_HW_IDX_8821C) 8668 #define BIT_CLEAR_H2CQ_HW_IDX_8821C(x) ((x) & (~BITS_H2CQ_HW_IDX_8821C)) 8669 #define BIT_GET_H2CQ_HW_IDX_8821C(x) \ 8670 (((x) >> BIT_SHIFT_H2CQ_HW_IDX_8821C) & BIT_MASK_H2CQ_HW_IDX_8821C) 8671 #define BIT_SET_H2CQ_HW_IDX_8821C(x, v) \ 8672 (BIT_CLEAR_H2CQ_HW_IDX_8821C(x) | BIT_H2CQ_HW_IDX_8821C(v)) 8673 8674 #define BIT_SHIFT_H2CQ_HOST_IDX_8821C 0 8675 #define BIT_MASK_H2CQ_HOST_IDX_8821C 0xfff 8676 #define BIT_H2CQ_HOST_IDX_8821C(x) \ 8677 (((x) & BIT_MASK_H2CQ_HOST_IDX_8821C) << BIT_SHIFT_H2CQ_HOST_IDX_8821C) 8678 #define BITS_H2CQ_HOST_IDX_8821C \ 8679 (BIT_MASK_H2CQ_HOST_IDX_8821C << BIT_SHIFT_H2CQ_HOST_IDX_8821C) 8680 #define BIT_CLEAR_H2CQ_HOST_IDX_8821C(x) ((x) & (~BITS_H2CQ_HOST_IDX_8821C)) 8681 #define BIT_GET_H2CQ_HOST_IDX_8821C(x) \ 8682 (((x) >> BIT_SHIFT_H2CQ_HOST_IDX_8821C) & BIT_MASK_H2CQ_HOST_IDX_8821C) 8683 #define BIT_SET_H2CQ_HOST_IDX_8821C(x, v) \ 8684 (BIT_CLEAR_H2CQ_HOST_IDX_8821C(x) | BIT_H2CQ_HOST_IDX_8821C(v)) 8685 8686 /* 2 REG_H2CQ_CSR_8821C[31:0] (H2CQ CONTROL AND STATUS) */ 8687 #define BIT_H2CQ_FULL_8821C BIT(31) 8688 #define BIT_CLR_H2CQ_HOST_IDX_8821C BIT(16) 8689 #define BIT_CLR_H2CQ_HW_IDX_8821C BIT(8) 8690 #define BIT_STOP_H2CQ_8821C BIT(0) 8691 8692 /* 2 REG_NOT_VALID_8821C */ 8693 8694 /* 2 REG_Q0_INFO_8821C */ 8695 8696 #define BIT_SHIFT_QUEUEMACID_Q0_V1_8821C 25 8697 #define BIT_MASK_QUEUEMACID_Q0_V1_8821C 0x7f 8698 #define BIT_QUEUEMACID_Q0_V1_8821C(x) \ 8699 (((x) & BIT_MASK_QUEUEMACID_Q0_V1_8821C) \ 8700 << BIT_SHIFT_QUEUEMACID_Q0_V1_8821C) 8701 #define BITS_QUEUEMACID_Q0_V1_8821C \ 8702 (BIT_MASK_QUEUEMACID_Q0_V1_8821C << BIT_SHIFT_QUEUEMACID_Q0_V1_8821C) 8703 #define BIT_CLEAR_QUEUEMACID_Q0_V1_8821C(x) \ 8704 ((x) & (~BITS_QUEUEMACID_Q0_V1_8821C)) 8705 #define BIT_GET_QUEUEMACID_Q0_V1_8821C(x) \ 8706 (((x) >> BIT_SHIFT_QUEUEMACID_Q0_V1_8821C) & \ 8707 BIT_MASK_QUEUEMACID_Q0_V1_8821C) 8708 #define BIT_SET_QUEUEMACID_Q0_V1_8821C(x, v) \ 8709 (BIT_CLEAR_QUEUEMACID_Q0_V1_8821C(x) | BIT_QUEUEMACID_Q0_V1_8821C(v)) 8710 8711 #define BIT_SHIFT_QUEUEAC_Q0_V1_8821C 23 8712 #define BIT_MASK_QUEUEAC_Q0_V1_8821C 0x3 8713 #define BIT_QUEUEAC_Q0_V1_8821C(x) \ 8714 (((x) & BIT_MASK_QUEUEAC_Q0_V1_8821C) << BIT_SHIFT_QUEUEAC_Q0_V1_8821C) 8715 #define BITS_QUEUEAC_Q0_V1_8821C \ 8716 (BIT_MASK_QUEUEAC_Q0_V1_8821C << BIT_SHIFT_QUEUEAC_Q0_V1_8821C) 8717 #define BIT_CLEAR_QUEUEAC_Q0_V1_8821C(x) ((x) & (~BITS_QUEUEAC_Q0_V1_8821C)) 8718 #define BIT_GET_QUEUEAC_Q0_V1_8821C(x) \ 8719 (((x) >> BIT_SHIFT_QUEUEAC_Q0_V1_8821C) & BIT_MASK_QUEUEAC_Q0_V1_8821C) 8720 #define BIT_SET_QUEUEAC_Q0_V1_8821C(x, v) \ 8721 (BIT_CLEAR_QUEUEAC_Q0_V1_8821C(x) | BIT_QUEUEAC_Q0_V1_8821C(v)) 8722 8723 #define BIT_TIDEMPTY_Q0_V1_8821C BIT(22) 8724 8725 #define BIT_SHIFT_TAIL_PKT_Q0_V2_8821C 11 8726 #define BIT_MASK_TAIL_PKT_Q0_V2_8821C 0x7ff 8727 #define BIT_TAIL_PKT_Q0_V2_8821C(x) \ 8728 (((x) & BIT_MASK_TAIL_PKT_Q0_V2_8821C) \ 8729 << BIT_SHIFT_TAIL_PKT_Q0_V2_8821C) 8730 #define BITS_TAIL_PKT_Q0_V2_8821C \ 8731 (BIT_MASK_TAIL_PKT_Q0_V2_8821C << BIT_SHIFT_TAIL_PKT_Q0_V2_8821C) 8732 #define BIT_CLEAR_TAIL_PKT_Q0_V2_8821C(x) ((x) & (~BITS_TAIL_PKT_Q0_V2_8821C)) 8733 #define BIT_GET_TAIL_PKT_Q0_V2_8821C(x) \ 8734 (((x) >> BIT_SHIFT_TAIL_PKT_Q0_V2_8821C) & \ 8735 BIT_MASK_TAIL_PKT_Q0_V2_8821C) 8736 #define BIT_SET_TAIL_PKT_Q0_V2_8821C(x, v) \ 8737 (BIT_CLEAR_TAIL_PKT_Q0_V2_8821C(x) | BIT_TAIL_PKT_Q0_V2_8821C(v)) 8738 8739 #define BIT_SHIFT_HEAD_PKT_Q0_V1_8821C 0 8740 #define BIT_MASK_HEAD_PKT_Q0_V1_8821C 0x7ff 8741 #define BIT_HEAD_PKT_Q0_V1_8821C(x) \ 8742 (((x) & BIT_MASK_HEAD_PKT_Q0_V1_8821C) \ 8743 << BIT_SHIFT_HEAD_PKT_Q0_V1_8821C) 8744 #define BITS_HEAD_PKT_Q0_V1_8821C \ 8745 (BIT_MASK_HEAD_PKT_Q0_V1_8821C << BIT_SHIFT_HEAD_PKT_Q0_V1_8821C) 8746 #define BIT_CLEAR_HEAD_PKT_Q0_V1_8821C(x) ((x) & (~BITS_HEAD_PKT_Q0_V1_8821C)) 8747 #define BIT_GET_HEAD_PKT_Q0_V1_8821C(x) \ 8748 (((x) >> BIT_SHIFT_HEAD_PKT_Q0_V1_8821C) & \ 8749 BIT_MASK_HEAD_PKT_Q0_V1_8821C) 8750 #define BIT_SET_HEAD_PKT_Q0_V1_8821C(x, v) \ 8751 (BIT_CLEAR_HEAD_PKT_Q0_V1_8821C(x) | BIT_HEAD_PKT_Q0_V1_8821C(v)) 8752 8753 /* 2 REG_Q1_INFO_8821C */ 8754 8755 #define BIT_SHIFT_QUEUEMACID_Q1_V1_8821C 25 8756 #define BIT_MASK_QUEUEMACID_Q1_V1_8821C 0x7f 8757 #define BIT_QUEUEMACID_Q1_V1_8821C(x) \ 8758 (((x) & BIT_MASK_QUEUEMACID_Q1_V1_8821C) \ 8759 << BIT_SHIFT_QUEUEMACID_Q1_V1_8821C) 8760 #define BITS_QUEUEMACID_Q1_V1_8821C \ 8761 (BIT_MASK_QUEUEMACID_Q1_V1_8821C << BIT_SHIFT_QUEUEMACID_Q1_V1_8821C) 8762 #define BIT_CLEAR_QUEUEMACID_Q1_V1_8821C(x) \ 8763 ((x) & (~BITS_QUEUEMACID_Q1_V1_8821C)) 8764 #define BIT_GET_QUEUEMACID_Q1_V1_8821C(x) \ 8765 (((x) >> BIT_SHIFT_QUEUEMACID_Q1_V1_8821C) & \ 8766 BIT_MASK_QUEUEMACID_Q1_V1_8821C) 8767 #define BIT_SET_QUEUEMACID_Q1_V1_8821C(x, v) \ 8768 (BIT_CLEAR_QUEUEMACID_Q1_V1_8821C(x) | BIT_QUEUEMACID_Q1_V1_8821C(v)) 8769 8770 #define BIT_SHIFT_QUEUEAC_Q1_V1_8821C 23 8771 #define BIT_MASK_QUEUEAC_Q1_V1_8821C 0x3 8772 #define BIT_QUEUEAC_Q1_V1_8821C(x) \ 8773 (((x) & BIT_MASK_QUEUEAC_Q1_V1_8821C) << BIT_SHIFT_QUEUEAC_Q1_V1_8821C) 8774 #define BITS_QUEUEAC_Q1_V1_8821C \ 8775 (BIT_MASK_QUEUEAC_Q1_V1_8821C << BIT_SHIFT_QUEUEAC_Q1_V1_8821C) 8776 #define BIT_CLEAR_QUEUEAC_Q1_V1_8821C(x) ((x) & (~BITS_QUEUEAC_Q1_V1_8821C)) 8777 #define BIT_GET_QUEUEAC_Q1_V1_8821C(x) \ 8778 (((x) >> BIT_SHIFT_QUEUEAC_Q1_V1_8821C) & BIT_MASK_QUEUEAC_Q1_V1_8821C) 8779 #define BIT_SET_QUEUEAC_Q1_V1_8821C(x, v) \ 8780 (BIT_CLEAR_QUEUEAC_Q1_V1_8821C(x) | BIT_QUEUEAC_Q1_V1_8821C(v)) 8781 8782 #define BIT_TIDEMPTY_Q1_V1_8821C BIT(22) 8783 8784 #define BIT_SHIFT_TAIL_PKT_Q1_V2_8821C 11 8785 #define BIT_MASK_TAIL_PKT_Q1_V2_8821C 0x7ff 8786 #define BIT_TAIL_PKT_Q1_V2_8821C(x) \ 8787 (((x) & BIT_MASK_TAIL_PKT_Q1_V2_8821C) \ 8788 << BIT_SHIFT_TAIL_PKT_Q1_V2_8821C) 8789 #define BITS_TAIL_PKT_Q1_V2_8821C \ 8790 (BIT_MASK_TAIL_PKT_Q1_V2_8821C << BIT_SHIFT_TAIL_PKT_Q1_V2_8821C) 8791 #define BIT_CLEAR_TAIL_PKT_Q1_V2_8821C(x) ((x) & (~BITS_TAIL_PKT_Q1_V2_8821C)) 8792 #define BIT_GET_TAIL_PKT_Q1_V2_8821C(x) \ 8793 (((x) >> BIT_SHIFT_TAIL_PKT_Q1_V2_8821C) & \ 8794 BIT_MASK_TAIL_PKT_Q1_V2_8821C) 8795 #define BIT_SET_TAIL_PKT_Q1_V2_8821C(x, v) \ 8796 (BIT_CLEAR_TAIL_PKT_Q1_V2_8821C(x) | BIT_TAIL_PKT_Q1_V2_8821C(v)) 8797 8798 #define BIT_SHIFT_HEAD_PKT_Q1_V1_8821C 0 8799 #define BIT_MASK_HEAD_PKT_Q1_V1_8821C 0x7ff 8800 #define BIT_HEAD_PKT_Q1_V1_8821C(x) \ 8801 (((x) & BIT_MASK_HEAD_PKT_Q1_V1_8821C) \ 8802 << BIT_SHIFT_HEAD_PKT_Q1_V1_8821C) 8803 #define BITS_HEAD_PKT_Q1_V1_8821C \ 8804 (BIT_MASK_HEAD_PKT_Q1_V1_8821C << BIT_SHIFT_HEAD_PKT_Q1_V1_8821C) 8805 #define BIT_CLEAR_HEAD_PKT_Q1_V1_8821C(x) ((x) & (~BITS_HEAD_PKT_Q1_V1_8821C)) 8806 #define BIT_GET_HEAD_PKT_Q1_V1_8821C(x) \ 8807 (((x) >> BIT_SHIFT_HEAD_PKT_Q1_V1_8821C) & \ 8808 BIT_MASK_HEAD_PKT_Q1_V1_8821C) 8809 #define BIT_SET_HEAD_PKT_Q1_V1_8821C(x, v) \ 8810 (BIT_CLEAR_HEAD_PKT_Q1_V1_8821C(x) | BIT_HEAD_PKT_Q1_V1_8821C(v)) 8811 8812 /* 2 REG_Q2_INFO_8821C */ 8813 8814 #define BIT_SHIFT_QUEUEMACID_Q2_V1_8821C 25 8815 #define BIT_MASK_QUEUEMACID_Q2_V1_8821C 0x7f 8816 #define BIT_QUEUEMACID_Q2_V1_8821C(x) \ 8817 (((x) & BIT_MASK_QUEUEMACID_Q2_V1_8821C) \ 8818 << BIT_SHIFT_QUEUEMACID_Q2_V1_8821C) 8819 #define BITS_QUEUEMACID_Q2_V1_8821C \ 8820 (BIT_MASK_QUEUEMACID_Q2_V1_8821C << BIT_SHIFT_QUEUEMACID_Q2_V1_8821C) 8821 #define BIT_CLEAR_QUEUEMACID_Q2_V1_8821C(x) \ 8822 ((x) & (~BITS_QUEUEMACID_Q2_V1_8821C)) 8823 #define BIT_GET_QUEUEMACID_Q2_V1_8821C(x) \ 8824 (((x) >> BIT_SHIFT_QUEUEMACID_Q2_V1_8821C) & \ 8825 BIT_MASK_QUEUEMACID_Q2_V1_8821C) 8826 #define BIT_SET_QUEUEMACID_Q2_V1_8821C(x, v) \ 8827 (BIT_CLEAR_QUEUEMACID_Q2_V1_8821C(x) | BIT_QUEUEMACID_Q2_V1_8821C(v)) 8828 8829 #define BIT_SHIFT_QUEUEAC_Q2_V1_8821C 23 8830 #define BIT_MASK_QUEUEAC_Q2_V1_8821C 0x3 8831 #define BIT_QUEUEAC_Q2_V1_8821C(x) \ 8832 (((x) & BIT_MASK_QUEUEAC_Q2_V1_8821C) << BIT_SHIFT_QUEUEAC_Q2_V1_8821C) 8833 #define BITS_QUEUEAC_Q2_V1_8821C \ 8834 (BIT_MASK_QUEUEAC_Q2_V1_8821C << BIT_SHIFT_QUEUEAC_Q2_V1_8821C) 8835 #define BIT_CLEAR_QUEUEAC_Q2_V1_8821C(x) ((x) & (~BITS_QUEUEAC_Q2_V1_8821C)) 8836 #define BIT_GET_QUEUEAC_Q2_V1_8821C(x) \ 8837 (((x) >> BIT_SHIFT_QUEUEAC_Q2_V1_8821C) & BIT_MASK_QUEUEAC_Q2_V1_8821C) 8838 #define BIT_SET_QUEUEAC_Q2_V1_8821C(x, v) \ 8839 (BIT_CLEAR_QUEUEAC_Q2_V1_8821C(x) | BIT_QUEUEAC_Q2_V1_8821C(v)) 8840 8841 #define BIT_TIDEMPTY_Q2_V1_8821C BIT(22) 8842 8843 #define BIT_SHIFT_TAIL_PKT_Q2_V2_8821C 11 8844 #define BIT_MASK_TAIL_PKT_Q2_V2_8821C 0x7ff 8845 #define BIT_TAIL_PKT_Q2_V2_8821C(x) \ 8846 (((x) & BIT_MASK_TAIL_PKT_Q2_V2_8821C) \ 8847 << BIT_SHIFT_TAIL_PKT_Q2_V2_8821C) 8848 #define BITS_TAIL_PKT_Q2_V2_8821C \ 8849 (BIT_MASK_TAIL_PKT_Q2_V2_8821C << BIT_SHIFT_TAIL_PKT_Q2_V2_8821C) 8850 #define BIT_CLEAR_TAIL_PKT_Q2_V2_8821C(x) ((x) & (~BITS_TAIL_PKT_Q2_V2_8821C)) 8851 #define BIT_GET_TAIL_PKT_Q2_V2_8821C(x) \ 8852 (((x) >> BIT_SHIFT_TAIL_PKT_Q2_V2_8821C) & \ 8853 BIT_MASK_TAIL_PKT_Q2_V2_8821C) 8854 #define BIT_SET_TAIL_PKT_Q2_V2_8821C(x, v) \ 8855 (BIT_CLEAR_TAIL_PKT_Q2_V2_8821C(x) | BIT_TAIL_PKT_Q2_V2_8821C(v)) 8856 8857 #define BIT_SHIFT_HEAD_PKT_Q2_V1_8821C 0 8858 #define BIT_MASK_HEAD_PKT_Q2_V1_8821C 0x7ff 8859 #define BIT_HEAD_PKT_Q2_V1_8821C(x) \ 8860 (((x) & BIT_MASK_HEAD_PKT_Q2_V1_8821C) \ 8861 << BIT_SHIFT_HEAD_PKT_Q2_V1_8821C) 8862 #define BITS_HEAD_PKT_Q2_V1_8821C \ 8863 (BIT_MASK_HEAD_PKT_Q2_V1_8821C << BIT_SHIFT_HEAD_PKT_Q2_V1_8821C) 8864 #define BIT_CLEAR_HEAD_PKT_Q2_V1_8821C(x) ((x) & (~BITS_HEAD_PKT_Q2_V1_8821C)) 8865 #define BIT_GET_HEAD_PKT_Q2_V1_8821C(x) \ 8866 (((x) >> BIT_SHIFT_HEAD_PKT_Q2_V1_8821C) & \ 8867 BIT_MASK_HEAD_PKT_Q2_V1_8821C) 8868 #define BIT_SET_HEAD_PKT_Q2_V1_8821C(x, v) \ 8869 (BIT_CLEAR_HEAD_PKT_Q2_V1_8821C(x) | BIT_HEAD_PKT_Q2_V1_8821C(v)) 8870 8871 /* 2 REG_Q3_INFO_8821C */ 8872 8873 #define BIT_SHIFT_QUEUEMACID_Q3_V1_8821C 25 8874 #define BIT_MASK_QUEUEMACID_Q3_V1_8821C 0x7f 8875 #define BIT_QUEUEMACID_Q3_V1_8821C(x) \ 8876 (((x) & BIT_MASK_QUEUEMACID_Q3_V1_8821C) \ 8877 << BIT_SHIFT_QUEUEMACID_Q3_V1_8821C) 8878 #define BITS_QUEUEMACID_Q3_V1_8821C \ 8879 (BIT_MASK_QUEUEMACID_Q3_V1_8821C << BIT_SHIFT_QUEUEMACID_Q3_V1_8821C) 8880 #define BIT_CLEAR_QUEUEMACID_Q3_V1_8821C(x) \ 8881 ((x) & (~BITS_QUEUEMACID_Q3_V1_8821C)) 8882 #define BIT_GET_QUEUEMACID_Q3_V1_8821C(x) \ 8883 (((x) >> BIT_SHIFT_QUEUEMACID_Q3_V1_8821C) & \ 8884 BIT_MASK_QUEUEMACID_Q3_V1_8821C) 8885 #define BIT_SET_QUEUEMACID_Q3_V1_8821C(x, v) \ 8886 (BIT_CLEAR_QUEUEMACID_Q3_V1_8821C(x) | BIT_QUEUEMACID_Q3_V1_8821C(v)) 8887 8888 #define BIT_SHIFT_QUEUEAC_Q3_V1_8821C 23 8889 #define BIT_MASK_QUEUEAC_Q3_V1_8821C 0x3 8890 #define BIT_QUEUEAC_Q3_V1_8821C(x) \ 8891 (((x) & BIT_MASK_QUEUEAC_Q3_V1_8821C) << BIT_SHIFT_QUEUEAC_Q3_V1_8821C) 8892 #define BITS_QUEUEAC_Q3_V1_8821C \ 8893 (BIT_MASK_QUEUEAC_Q3_V1_8821C << BIT_SHIFT_QUEUEAC_Q3_V1_8821C) 8894 #define BIT_CLEAR_QUEUEAC_Q3_V1_8821C(x) ((x) & (~BITS_QUEUEAC_Q3_V1_8821C)) 8895 #define BIT_GET_QUEUEAC_Q3_V1_8821C(x) \ 8896 (((x) >> BIT_SHIFT_QUEUEAC_Q3_V1_8821C) & BIT_MASK_QUEUEAC_Q3_V1_8821C) 8897 #define BIT_SET_QUEUEAC_Q3_V1_8821C(x, v) \ 8898 (BIT_CLEAR_QUEUEAC_Q3_V1_8821C(x) | BIT_QUEUEAC_Q3_V1_8821C(v)) 8899 8900 #define BIT_TIDEMPTY_Q3_V1_8821C BIT(22) 8901 8902 #define BIT_SHIFT_TAIL_PKT_Q3_V2_8821C 11 8903 #define BIT_MASK_TAIL_PKT_Q3_V2_8821C 0x7ff 8904 #define BIT_TAIL_PKT_Q3_V2_8821C(x) \ 8905 (((x) & BIT_MASK_TAIL_PKT_Q3_V2_8821C) \ 8906 << BIT_SHIFT_TAIL_PKT_Q3_V2_8821C) 8907 #define BITS_TAIL_PKT_Q3_V2_8821C \ 8908 (BIT_MASK_TAIL_PKT_Q3_V2_8821C << BIT_SHIFT_TAIL_PKT_Q3_V2_8821C) 8909 #define BIT_CLEAR_TAIL_PKT_Q3_V2_8821C(x) ((x) & (~BITS_TAIL_PKT_Q3_V2_8821C)) 8910 #define BIT_GET_TAIL_PKT_Q3_V2_8821C(x) \ 8911 (((x) >> BIT_SHIFT_TAIL_PKT_Q3_V2_8821C) & \ 8912 BIT_MASK_TAIL_PKT_Q3_V2_8821C) 8913 #define BIT_SET_TAIL_PKT_Q3_V2_8821C(x, v) \ 8914 (BIT_CLEAR_TAIL_PKT_Q3_V2_8821C(x) | BIT_TAIL_PKT_Q3_V2_8821C(v)) 8915 8916 #define BIT_SHIFT_HEAD_PKT_Q3_V1_8821C 0 8917 #define BIT_MASK_HEAD_PKT_Q3_V1_8821C 0x7ff 8918 #define BIT_HEAD_PKT_Q3_V1_8821C(x) \ 8919 (((x) & BIT_MASK_HEAD_PKT_Q3_V1_8821C) \ 8920 << BIT_SHIFT_HEAD_PKT_Q3_V1_8821C) 8921 #define BITS_HEAD_PKT_Q3_V1_8821C \ 8922 (BIT_MASK_HEAD_PKT_Q3_V1_8821C << BIT_SHIFT_HEAD_PKT_Q3_V1_8821C) 8923 #define BIT_CLEAR_HEAD_PKT_Q3_V1_8821C(x) ((x) & (~BITS_HEAD_PKT_Q3_V1_8821C)) 8924 #define BIT_GET_HEAD_PKT_Q3_V1_8821C(x) \ 8925 (((x) >> BIT_SHIFT_HEAD_PKT_Q3_V1_8821C) & \ 8926 BIT_MASK_HEAD_PKT_Q3_V1_8821C) 8927 #define BIT_SET_HEAD_PKT_Q3_V1_8821C(x, v) \ 8928 (BIT_CLEAR_HEAD_PKT_Q3_V1_8821C(x) | BIT_HEAD_PKT_Q3_V1_8821C(v)) 8929 8930 /* 2 REG_MGQ_INFO_8821C */ 8931 8932 #define BIT_SHIFT_QUEUEMACID_MGQ_V1_8821C 25 8933 #define BIT_MASK_QUEUEMACID_MGQ_V1_8821C 0x7f 8934 #define BIT_QUEUEMACID_MGQ_V1_8821C(x) \ 8935 (((x) & BIT_MASK_QUEUEMACID_MGQ_V1_8821C) \ 8936 << BIT_SHIFT_QUEUEMACID_MGQ_V1_8821C) 8937 #define BITS_QUEUEMACID_MGQ_V1_8821C \ 8938 (BIT_MASK_QUEUEMACID_MGQ_V1_8821C << BIT_SHIFT_QUEUEMACID_MGQ_V1_8821C) 8939 #define BIT_CLEAR_QUEUEMACID_MGQ_V1_8821C(x) \ 8940 ((x) & (~BITS_QUEUEMACID_MGQ_V1_8821C)) 8941 #define BIT_GET_QUEUEMACID_MGQ_V1_8821C(x) \ 8942 (((x) >> BIT_SHIFT_QUEUEMACID_MGQ_V1_8821C) & \ 8943 BIT_MASK_QUEUEMACID_MGQ_V1_8821C) 8944 #define BIT_SET_QUEUEMACID_MGQ_V1_8821C(x, v) \ 8945 (BIT_CLEAR_QUEUEMACID_MGQ_V1_8821C(x) | BIT_QUEUEMACID_MGQ_V1_8821C(v)) 8946 8947 #define BIT_SHIFT_QUEUEAC_MGQ_V1_8821C 23 8948 #define BIT_MASK_QUEUEAC_MGQ_V1_8821C 0x3 8949 #define BIT_QUEUEAC_MGQ_V1_8821C(x) \ 8950 (((x) & BIT_MASK_QUEUEAC_MGQ_V1_8821C) \ 8951 << BIT_SHIFT_QUEUEAC_MGQ_V1_8821C) 8952 #define BITS_QUEUEAC_MGQ_V1_8821C \ 8953 (BIT_MASK_QUEUEAC_MGQ_V1_8821C << BIT_SHIFT_QUEUEAC_MGQ_V1_8821C) 8954 #define BIT_CLEAR_QUEUEAC_MGQ_V1_8821C(x) ((x) & (~BITS_QUEUEAC_MGQ_V1_8821C)) 8955 #define BIT_GET_QUEUEAC_MGQ_V1_8821C(x) \ 8956 (((x) >> BIT_SHIFT_QUEUEAC_MGQ_V1_8821C) & \ 8957 BIT_MASK_QUEUEAC_MGQ_V1_8821C) 8958 #define BIT_SET_QUEUEAC_MGQ_V1_8821C(x, v) \ 8959 (BIT_CLEAR_QUEUEAC_MGQ_V1_8821C(x) | BIT_QUEUEAC_MGQ_V1_8821C(v)) 8960 8961 #define BIT_TIDEMPTY_MGQ_V1_8821C BIT(22) 8962 8963 #define BIT_SHIFT_TAIL_PKT_MGQ_V2_8821C 11 8964 #define BIT_MASK_TAIL_PKT_MGQ_V2_8821C 0x7ff 8965 #define BIT_TAIL_PKT_MGQ_V2_8821C(x) \ 8966 (((x) & BIT_MASK_TAIL_PKT_MGQ_V2_8821C) \ 8967 << BIT_SHIFT_TAIL_PKT_MGQ_V2_8821C) 8968 #define BITS_TAIL_PKT_MGQ_V2_8821C \ 8969 (BIT_MASK_TAIL_PKT_MGQ_V2_8821C << BIT_SHIFT_TAIL_PKT_MGQ_V2_8821C) 8970 #define BIT_CLEAR_TAIL_PKT_MGQ_V2_8821C(x) ((x) & (~BITS_TAIL_PKT_MGQ_V2_8821C)) 8971 #define BIT_GET_TAIL_PKT_MGQ_V2_8821C(x) \ 8972 (((x) >> BIT_SHIFT_TAIL_PKT_MGQ_V2_8821C) & \ 8973 BIT_MASK_TAIL_PKT_MGQ_V2_8821C) 8974 #define BIT_SET_TAIL_PKT_MGQ_V2_8821C(x, v) \ 8975 (BIT_CLEAR_TAIL_PKT_MGQ_V2_8821C(x) | BIT_TAIL_PKT_MGQ_V2_8821C(v)) 8976 8977 #define BIT_SHIFT_HEAD_PKT_MGQ_V1_8821C 0 8978 #define BIT_MASK_HEAD_PKT_MGQ_V1_8821C 0x7ff 8979 #define BIT_HEAD_PKT_MGQ_V1_8821C(x) \ 8980 (((x) & BIT_MASK_HEAD_PKT_MGQ_V1_8821C) \ 8981 << BIT_SHIFT_HEAD_PKT_MGQ_V1_8821C) 8982 #define BITS_HEAD_PKT_MGQ_V1_8821C \ 8983 (BIT_MASK_HEAD_PKT_MGQ_V1_8821C << BIT_SHIFT_HEAD_PKT_MGQ_V1_8821C) 8984 #define BIT_CLEAR_HEAD_PKT_MGQ_V1_8821C(x) ((x) & (~BITS_HEAD_PKT_MGQ_V1_8821C)) 8985 #define BIT_GET_HEAD_PKT_MGQ_V1_8821C(x) \ 8986 (((x) >> BIT_SHIFT_HEAD_PKT_MGQ_V1_8821C) & \ 8987 BIT_MASK_HEAD_PKT_MGQ_V1_8821C) 8988 #define BIT_SET_HEAD_PKT_MGQ_V1_8821C(x, v) \ 8989 (BIT_CLEAR_HEAD_PKT_MGQ_V1_8821C(x) | BIT_HEAD_PKT_MGQ_V1_8821C(v)) 8990 8991 /* 2 REG_HIQ_INFO_8821C */ 8992 8993 #define BIT_SHIFT_QUEUEMACID_HIQ_V1_8821C 25 8994 #define BIT_MASK_QUEUEMACID_HIQ_V1_8821C 0x7f 8995 #define BIT_QUEUEMACID_HIQ_V1_8821C(x) \ 8996 (((x) & BIT_MASK_QUEUEMACID_HIQ_V1_8821C) \ 8997 << BIT_SHIFT_QUEUEMACID_HIQ_V1_8821C) 8998 #define BITS_QUEUEMACID_HIQ_V1_8821C \ 8999 (BIT_MASK_QUEUEMACID_HIQ_V1_8821C << BIT_SHIFT_QUEUEMACID_HIQ_V1_8821C) 9000 #define BIT_CLEAR_QUEUEMACID_HIQ_V1_8821C(x) \ 9001 ((x) & (~BITS_QUEUEMACID_HIQ_V1_8821C)) 9002 #define BIT_GET_QUEUEMACID_HIQ_V1_8821C(x) \ 9003 (((x) >> BIT_SHIFT_QUEUEMACID_HIQ_V1_8821C) & \ 9004 BIT_MASK_QUEUEMACID_HIQ_V1_8821C) 9005 #define BIT_SET_QUEUEMACID_HIQ_V1_8821C(x, v) \ 9006 (BIT_CLEAR_QUEUEMACID_HIQ_V1_8821C(x) | BIT_QUEUEMACID_HIQ_V1_8821C(v)) 9007 9008 #define BIT_SHIFT_QUEUEAC_HIQ_V1_8821C 23 9009 #define BIT_MASK_QUEUEAC_HIQ_V1_8821C 0x3 9010 #define BIT_QUEUEAC_HIQ_V1_8821C(x) \ 9011 (((x) & BIT_MASK_QUEUEAC_HIQ_V1_8821C) \ 9012 << BIT_SHIFT_QUEUEAC_HIQ_V1_8821C) 9013 #define BITS_QUEUEAC_HIQ_V1_8821C \ 9014 (BIT_MASK_QUEUEAC_HIQ_V1_8821C << BIT_SHIFT_QUEUEAC_HIQ_V1_8821C) 9015 #define BIT_CLEAR_QUEUEAC_HIQ_V1_8821C(x) ((x) & (~BITS_QUEUEAC_HIQ_V1_8821C)) 9016 #define BIT_GET_QUEUEAC_HIQ_V1_8821C(x) \ 9017 (((x) >> BIT_SHIFT_QUEUEAC_HIQ_V1_8821C) & \ 9018 BIT_MASK_QUEUEAC_HIQ_V1_8821C) 9019 #define BIT_SET_QUEUEAC_HIQ_V1_8821C(x, v) \ 9020 (BIT_CLEAR_QUEUEAC_HIQ_V1_8821C(x) | BIT_QUEUEAC_HIQ_V1_8821C(v)) 9021 9022 #define BIT_TIDEMPTY_HIQ_V1_8821C BIT(22) 9023 9024 #define BIT_SHIFT_TAIL_PKT_HIQ_V2_8821C 11 9025 #define BIT_MASK_TAIL_PKT_HIQ_V2_8821C 0x7ff 9026 #define BIT_TAIL_PKT_HIQ_V2_8821C(x) \ 9027 (((x) & BIT_MASK_TAIL_PKT_HIQ_V2_8821C) \ 9028 << BIT_SHIFT_TAIL_PKT_HIQ_V2_8821C) 9029 #define BITS_TAIL_PKT_HIQ_V2_8821C \ 9030 (BIT_MASK_TAIL_PKT_HIQ_V2_8821C << BIT_SHIFT_TAIL_PKT_HIQ_V2_8821C) 9031 #define BIT_CLEAR_TAIL_PKT_HIQ_V2_8821C(x) ((x) & (~BITS_TAIL_PKT_HIQ_V2_8821C)) 9032 #define BIT_GET_TAIL_PKT_HIQ_V2_8821C(x) \ 9033 (((x) >> BIT_SHIFT_TAIL_PKT_HIQ_V2_8821C) & \ 9034 BIT_MASK_TAIL_PKT_HIQ_V2_8821C) 9035 #define BIT_SET_TAIL_PKT_HIQ_V2_8821C(x, v) \ 9036 (BIT_CLEAR_TAIL_PKT_HIQ_V2_8821C(x) | BIT_TAIL_PKT_HIQ_V2_8821C(v)) 9037 9038 #define BIT_SHIFT_HEAD_PKT_HIQ_V1_8821C 0 9039 #define BIT_MASK_HEAD_PKT_HIQ_V1_8821C 0x7ff 9040 #define BIT_HEAD_PKT_HIQ_V1_8821C(x) \ 9041 (((x) & BIT_MASK_HEAD_PKT_HIQ_V1_8821C) \ 9042 << BIT_SHIFT_HEAD_PKT_HIQ_V1_8821C) 9043 #define BITS_HEAD_PKT_HIQ_V1_8821C \ 9044 (BIT_MASK_HEAD_PKT_HIQ_V1_8821C << BIT_SHIFT_HEAD_PKT_HIQ_V1_8821C) 9045 #define BIT_CLEAR_HEAD_PKT_HIQ_V1_8821C(x) ((x) & (~BITS_HEAD_PKT_HIQ_V1_8821C)) 9046 #define BIT_GET_HEAD_PKT_HIQ_V1_8821C(x) \ 9047 (((x) >> BIT_SHIFT_HEAD_PKT_HIQ_V1_8821C) & \ 9048 BIT_MASK_HEAD_PKT_HIQ_V1_8821C) 9049 #define BIT_SET_HEAD_PKT_HIQ_V1_8821C(x, v) \ 9050 (BIT_CLEAR_HEAD_PKT_HIQ_V1_8821C(x) | BIT_HEAD_PKT_HIQ_V1_8821C(v)) 9051 9052 /* 2 REG_BCNQ_INFO_8821C */ 9053 9054 #define BIT_SHIFT_BCNQ_HEAD_PG_V1_8821C 0 9055 #define BIT_MASK_BCNQ_HEAD_PG_V1_8821C 0xfff 9056 #define BIT_BCNQ_HEAD_PG_V1_8821C(x) \ 9057 (((x) & BIT_MASK_BCNQ_HEAD_PG_V1_8821C) \ 9058 << BIT_SHIFT_BCNQ_HEAD_PG_V1_8821C) 9059 #define BITS_BCNQ_HEAD_PG_V1_8821C \ 9060 (BIT_MASK_BCNQ_HEAD_PG_V1_8821C << BIT_SHIFT_BCNQ_HEAD_PG_V1_8821C) 9061 #define BIT_CLEAR_BCNQ_HEAD_PG_V1_8821C(x) ((x) & (~BITS_BCNQ_HEAD_PG_V1_8821C)) 9062 #define BIT_GET_BCNQ_HEAD_PG_V1_8821C(x) \ 9063 (((x) >> BIT_SHIFT_BCNQ_HEAD_PG_V1_8821C) & \ 9064 BIT_MASK_BCNQ_HEAD_PG_V1_8821C) 9065 #define BIT_SET_BCNQ_HEAD_PG_V1_8821C(x, v) \ 9066 (BIT_CLEAR_BCNQ_HEAD_PG_V1_8821C(x) | BIT_BCNQ_HEAD_PG_V1_8821C(v)) 9067 9068 /* 2 REG_TXPKT_EMPTY_8821C */ 9069 #define BIT_BCNQ_EMPTY_8821C BIT(11) 9070 #define BIT_HQQ_EMPTY_8821C BIT(10) 9071 #define BIT_MQQ_EMPTY_8821C BIT(9) 9072 #define BIT_MGQ_CPU_EMPTY_8821C BIT(8) 9073 #define BIT_AC7Q_EMPTY_8821C BIT(7) 9074 #define BIT_AC6Q_EMPTY_8821C BIT(6) 9075 #define BIT_AC5Q_EMPTY_8821C BIT(5) 9076 #define BIT_AC4Q_EMPTY_8821C BIT(4) 9077 #define BIT_AC3Q_EMPTY_8821C BIT(3) 9078 #define BIT_AC2Q_EMPTY_8821C BIT(2) 9079 #define BIT_AC1Q_EMPTY_8821C BIT(1) 9080 #define BIT_AC0Q_EMPTY_8821C BIT(0) 9081 9082 /* 2 REG_CPU_MGQ_INFO_8821C */ 9083 #define BIT_BCN1_POLL_8821C BIT(30) 9084 #define BIT_CPUMGT_POLL_8821C BIT(29) 9085 #define BIT_BCN_POLL_8821C BIT(28) 9086 #define BIT_CPUMGQ_FW_NUM_V1_8821C BIT(12) 9087 9088 #define BIT_SHIFT_FW_FREE_TAIL_V1_8821C 0 9089 #define BIT_MASK_FW_FREE_TAIL_V1_8821C 0xfff 9090 #define BIT_FW_FREE_TAIL_V1_8821C(x) \ 9091 (((x) & BIT_MASK_FW_FREE_TAIL_V1_8821C) \ 9092 << BIT_SHIFT_FW_FREE_TAIL_V1_8821C) 9093 #define BITS_FW_FREE_TAIL_V1_8821C \ 9094 (BIT_MASK_FW_FREE_TAIL_V1_8821C << BIT_SHIFT_FW_FREE_TAIL_V1_8821C) 9095 #define BIT_CLEAR_FW_FREE_TAIL_V1_8821C(x) ((x) & (~BITS_FW_FREE_TAIL_V1_8821C)) 9096 #define BIT_GET_FW_FREE_TAIL_V1_8821C(x) \ 9097 (((x) >> BIT_SHIFT_FW_FREE_TAIL_V1_8821C) & \ 9098 BIT_MASK_FW_FREE_TAIL_V1_8821C) 9099 #define BIT_SET_FW_FREE_TAIL_V1_8821C(x, v) \ 9100 (BIT_CLEAR_FW_FREE_TAIL_V1_8821C(x) | BIT_FW_FREE_TAIL_V1_8821C(v)) 9101 9102 /* 2 REG_FWHW_TXQ_CTRL_8821C */ 9103 #define BIT_RTS_LIMIT_IN_OFDM_8821C BIT(23) 9104 #define BIT_EN_BCNQ_DL_8821C BIT(22) 9105 #define BIT_EN_RD_RESP_NAV_BK_8821C BIT(21) 9106 #define BIT_EN_WR_FREE_TAIL_8821C BIT(20) 9107 9108 #define BIT_SHIFT_EN_QUEUE_RPT_8821C 8 9109 #define BIT_MASK_EN_QUEUE_RPT_8821C 0xff 9110 #define BIT_EN_QUEUE_RPT_8821C(x) \ 9111 (((x) & BIT_MASK_EN_QUEUE_RPT_8821C) << BIT_SHIFT_EN_QUEUE_RPT_8821C) 9112 #define BITS_EN_QUEUE_RPT_8821C \ 9113 (BIT_MASK_EN_QUEUE_RPT_8821C << BIT_SHIFT_EN_QUEUE_RPT_8821C) 9114 #define BIT_CLEAR_EN_QUEUE_RPT_8821C(x) ((x) & (~BITS_EN_QUEUE_RPT_8821C)) 9115 #define BIT_GET_EN_QUEUE_RPT_8821C(x) \ 9116 (((x) >> BIT_SHIFT_EN_QUEUE_RPT_8821C) & BIT_MASK_EN_QUEUE_RPT_8821C) 9117 #define BIT_SET_EN_QUEUE_RPT_8821C(x, v) \ 9118 (BIT_CLEAR_EN_QUEUE_RPT_8821C(x) | BIT_EN_QUEUE_RPT_8821C(v)) 9119 9120 #define BIT_EN_RTY_BK_8821C BIT(7) 9121 #define BIT_EN_USE_INI_RAT_8821C BIT(6) 9122 #define BIT_EN_RTS_NAV_BK_8821C BIT(5) 9123 #define BIT_DIS_SSN_CHECK_8821C BIT(4) 9124 #define BIT_MACID_MATCH_RTS_8821C BIT(3) 9125 #define BIT_EN_BCN_TRXRPT_V1_8821C BIT(2) 9126 #define BIT_R_EN_FTMRPT_V1_8821C BIT(1) 9127 #define BIT_R_BMC_NAV_PROTECT_8821C BIT(0) 9128 9129 /* 2 REG_DATAFB_SEL_8821C */ 9130 #define BIT_BROADCAST_RTY_EN_8821C BIT(3) 9131 #define BIT_EN_RTY_BK_COD_8821C BIT(2) 9132 9133 #define BIT_SHIFT__R_DATA_FALLBACK_SEL_8821C 0 9134 #define BIT_MASK__R_DATA_FALLBACK_SEL_8821C 0x3 9135 #define BIT__R_DATA_FALLBACK_SEL_8821C(x) \ 9136 (((x) & BIT_MASK__R_DATA_FALLBACK_SEL_8821C) \ 9137 << BIT_SHIFT__R_DATA_FALLBACK_SEL_8821C) 9138 #define BITS__R_DATA_FALLBACK_SEL_8821C \ 9139 (BIT_MASK__R_DATA_FALLBACK_SEL_8821C \ 9140 << BIT_SHIFT__R_DATA_FALLBACK_SEL_8821C) 9141 #define BIT_CLEAR__R_DATA_FALLBACK_SEL_8821C(x) \ 9142 ((x) & (~BITS__R_DATA_FALLBACK_SEL_8821C)) 9143 #define BIT_GET__R_DATA_FALLBACK_SEL_8821C(x) \ 9144 (((x) >> BIT_SHIFT__R_DATA_FALLBACK_SEL_8821C) & \ 9145 BIT_MASK__R_DATA_FALLBACK_SEL_8821C) 9146 #define BIT_SET__R_DATA_FALLBACK_SEL_8821C(x, v) \ 9147 (BIT_CLEAR__R_DATA_FALLBACK_SEL_8821C(x) | \ 9148 BIT__R_DATA_FALLBACK_SEL_8821C(v)) 9149 9150 /* 2 REG_BCNQ_BDNY_V1_8821C */ 9151 9152 #define BIT_SHIFT_BCNQ_PGBNDY_V1_8821C 0 9153 #define BIT_MASK_BCNQ_PGBNDY_V1_8821C 0xfff 9154 #define BIT_BCNQ_PGBNDY_V1_8821C(x) \ 9155 (((x) & BIT_MASK_BCNQ_PGBNDY_V1_8821C) \ 9156 << BIT_SHIFT_BCNQ_PGBNDY_V1_8821C) 9157 #define BITS_BCNQ_PGBNDY_V1_8821C \ 9158 (BIT_MASK_BCNQ_PGBNDY_V1_8821C << BIT_SHIFT_BCNQ_PGBNDY_V1_8821C) 9159 #define BIT_CLEAR_BCNQ_PGBNDY_V1_8821C(x) ((x) & (~BITS_BCNQ_PGBNDY_V1_8821C)) 9160 #define BIT_GET_BCNQ_PGBNDY_V1_8821C(x) \ 9161 (((x) >> BIT_SHIFT_BCNQ_PGBNDY_V1_8821C) & \ 9162 BIT_MASK_BCNQ_PGBNDY_V1_8821C) 9163 #define BIT_SET_BCNQ_PGBNDY_V1_8821C(x, v) \ 9164 (BIT_CLEAR_BCNQ_PGBNDY_V1_8821C(x) | BIT_BCNQ_PGBNDY_V1_8821C(v)) 9165 9166 /* 2 REG_LIFETIME_EN_8821C */ 9167 #define BIT_BT_INT_CPU_8821C BIT(7) 9168 #define BIT_BT_INT_PTA_8821C BIT(6) 9169 #define BIT_EN_CTRL_RTYBIT_8821C BIT(4) 9170 #define BIT_LIFETIME_BK_EN_8821C BIT(3) 9171 #define BIT_LIFETIME_BE_EN_8821C BIT(2) 9172 #define BIT_LIFETIME_VI_EN_8821C BIT(1) 9173 #define BIT_LIFETIME_VO_EN_8821C BIT(0) 9174 9175 /* 2 REG_NOT_VALID_8821C */ 9176 9177 /* 2 REG_SPEC_SIFS_8821C */ 9178 9179 #define BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8821C 8 9180 #define BIT_MASK_SPEC_SIFS_OFDM_PTCL_8821C 0xff 9181 #define BIT_SPEC_SIFS_OFDM_PTCL_8821C(x) \ 9182 (((x) & BIT_MASK_SPEC_SIFS_OFDM_PTCL_8821C) \ 9183 << BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8821C) 9184 #define BITS_SPEC_SIFS_OFDM_PTCL_8821C \ 9185 (BIT_MASK_SPEC_SIFS_OFDM_PTCL_8821C \ 9186 << BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8821C) 9187 #define BIT_CLEAR_SPEC_SIFS_OFDM_PTCL_8821C(x) \ 9188 ((x) & (~BITS_SPEC_SIFS_OFDM_PTCL_8821C)) 9189 #define BIT_GET_SPEC_SIFS_OFDM_PTCL_8821C(x) \ 9190 (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_PTCL_8821C) & \ 9191 BIT_MASK_SPEC_SIFS_OFDM_PTCL_8821C) 9192 #define BIT_SET_SPEC_SIFS_OFDM_PTCL_8821C(x, v) \ 9193 (BIT_CLEAR_SPEC_SIFS_OFDM_PTCL_8821C(x) | \ 9194 BIT_SPEC_SIFS_OFDM_PTCL_8821C(v)) 9195 9196 #define BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8821C 0 9197 #define BIT_MASK_SPEC_SIFS_CCK_PTCL_8821C 0xff 9198 #define BIT_SPEC_SIFS_CCK_PTCL_8821C(x) \ 9199 (((x) & BIT_MASK_SPEC_SIFS_CCK_PTCL_8821C) \ 9200 << BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8821C) 9201 #define BITS_SPEC_SIFS_CCK_PTCL_8821C \ 9202 (BIT_MASK_SPEC_SIFS_CCK_PTCL_8821C \ 9203 << BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8821C) 9204 #define BIT_CLEAR_SPEC_SIFS_CCK_PTCL_8821C(x) \ 9205 ((x) & (~BITS_SPEC_SIFS_CCK_PTCL_8821C)) 9206 #define BIT_GET_SPEC_SIFS_CCK_PTCL_8821C(x) \ 9207 (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_PTCL_8821C) & \ 9208 BIT_MASK_SPEC_SIFS_CCK_PTCL_8821C) 9209 #define BIT_SET_SPEC_SIFS_CCK_PTCL_8821C(x, v) \ 9210 (BIT_CLEAR_SPEC_SIFS_CCK_PTCL_8821C(x) | \ 9211 BIT_SPEC_SIFS_CCK_PTCL_8821C(v)) 9212 9213 /* 2 REG_RETRY_LIMIT_8821C */ 9214 9215 #define BIT_SHIFT_SRL_8821C 8 9216 #define BIT_MASK_SRL_8821C 0x3f 9217 #define BIT_SRL_8821C(x) (((x) & BIT_MASK_SRL_8821C) << BIT_SHIFT_SRL_8821C) 9218 #define BITS_SRL_8821C (BIT_MASK_SRL_8821C << BIT_SHIFT_SRL_8821C) 9219 #define BIT_CLEAR_SRL_8821C(x) ((x) & (~BITS_SRL_8821C)) 9220 #define BIT_GET_SRL_8821C(x) (((x) >> BIT_SHIFT_SRL_8821C) & BIT_MASK_SRL_8821C) 9221 #define BIT_SET_SRL_8821C(x, v) (BIT_CLEAR_SRL_8821C(x) | BIT_SRL_8821C(v)) 9222 9223 #define BIT_SHIFT_LRL_8821C 0 9224 #define BIT_MASK_LRL_8821C 0x3f 9225 #define BIT_LRL_8821C(x) (((x) & BIT_MASK_LRL_8821C) << BIT_SHIFT_LRL_8821C) 9226 #define BITS_LRL_8821C (BIT_MASK_LRL_8821C << BIT_SHIFT_LRL_8821C) 9227 #define BIT_CLEAR_LRL_8821C(x) ((x) & (~BITS_LRL_8821C)) 9228 #define BIT_GET_LRL_8821C(x) (((x) >> BIT_SHIFT_LRL_8821C) & BIT_MASK_LRL_8821C) 9229 #define BIT_SET_LRL_8821C(x, v) (BIT_CLEAR_LRL_8821C(x) | BIT_LRL_8821C(v)) 9230 9231 /* 2 REG_TXBF_CTRL_8821C */ 9232 #define BIT_R_ENABLE_NDPA_8821C BIT(31) 9233 #define BIT_USE_NDPA_PARAMETER_8821C BIT(30) 9234 #define BIT_R_PROP_TXBF_8821C BIT(29) 9235 #define BIT_R_EN_NDPA_INT_8821C BIT(28) 9236 #define BIT_R_TXBF1_80M_8821C BIT(27) 9237 #define BIT_R_TXBF1_40M_8821C BIT(26) 9238 #define BIT_R_TXBF1_20M_8821C BIT(25) 9239 9240 #define BIT_SHIFT_R_TXBF1_AID_8821C 16 9241 #define BIT_MASK_R_TXBF1_AID_8821C 0x1ff 9242 #define BIT_R_TXBF1_AID_8821C(x) \ 9243 (((x) & BIT_MASK_R_TXBF1_AID_8821C) << BIT_SHIFT_R_TXBF1_AID_8821C) 9244 #define BITS_R_TXBF1_AID_8821C \ 9245 (BIT_MASK_R_TXBF1_AID_8821C << BIT_SHIFT_R_TXBF1_AID_8821C) 9246 #define BIT_CLEAR_R_TXBF1_AID_8821C(x) ((x) & (~BITS_R_TXBF1_AID_8821C)) 9247 #define BIT_GET_R_TXBF1_AID_8821C(x) \ 9248 (((x) >> BIT_SHIFT_R_TXBF1_AID_8821C) & BIT_MASK_R_TXBF1_AID_8821C) 9249 #define BIT_SET_R_TXBF1_AID_8821C(x, v) \ 9250 (BIT_CLEAR_R_TXBF1_AID_8821C(x) | BIT_R_TXBF1_AID_8821C(v)) 9251 9252 #define BIT_DIS_NDP_BFEN_8821C BIT(15) 9253 #define BIT_R_TXBCN_NOBLOCK_NDP_8821C BIT(14) 9254 #define BIT_R_TXBF0_80M_8821C BIT(11) 9255 #define BIT_R_TXBF0_40M_8821C BIT(10) 9256 #define BIT_R_TXBF0_20M_8821C BIT(9) 9257 9258 #define BIT_SHIFT_R_TXBF0_AID_8821C 0 9259 #define BIT_MASK_R_TXBF0_AID_8821C 0x1ff 9260 #define BIT_R_TXBF0_AID_8821C(x) \ 9261 (((x) & BIT_MASK_R_TXBF0_AID_8821C) << BIT_SHIFT_R_TXBF0_AID_8821C) 9262 #define BITS_R_TXBF0_AID_8821C \ 9263 (BIT_MASK_R_TXBF0_AID_8821C << BIT_SHIFT_R_TXBF0_AID_8821C) 9264 #define BIT_CLEAR_R_TXBF0_AID_8821C(x) ((x) & (~BITS_R_TXBF0_AID_8821C)) 9265 #define BIT_GET_R_TXBF0_AID_8821C(x) \ 9266 (((x) >> BIT_SHIFT_R_TXBF0_AID_8821C) & BIT_MASK_R_TXBF0_AID_8821C) 9267 #define BIT_SET_R_TXBF0_AID_8821C(x, v) \ 9268 (BIT_CLEAR_R_TXBF0_AID_8821C(x) | BIT_R_TXBF0_AID_8821C(v)) 9269 9270 /* 2 REG_DARFRC_8821C */ 9271 9272 #define BIT_SHIFT_DARF_RC4_8821C 24 9273 #define BIT_MASK_DARF_RC4_8821C 0x1f 9274 #define BIT_DARF_RC4_8821C(x) \ 9275 (((x) & BIT_MASK_DARF_RC4_8821C) << BIT_SHIFT_DARF_RC4_8821C) 9276 #define BITS_DARF_RC4_8821C \ 9277 (BIT_MASK_DARF_RC4_8821C << BIT_SHIFT_DARF_RC4_8821C) 9278 #define BIT_CLEAR_DARF_RC4_8821C(x) ((x) & (~BITS_DARF_RC4_8821C)) 9279 #define BIT_GET_DARF_RC4_8821C(x) \ 9280 (((x) >> BIT_SHIFT_DARF_RC4_8821C) & BIT_MASK_DARF_RC4_8821C) 9281 #define BIT_SET_DARF_RC4_8821C(x, v) \ 9282 (BIT_CLEAR_DARF_RC4_8821C(x) | BIT_DARF_RC4_8821C(v)) 9283 9284 #define BIT_SHIFT_DARF_RC3_8821C 16 9285 #define BIT_MASK_DARF_RC3_8821C 0x1f 9286 #define BIT_DARF_RC3_8821C(x) \ 9287 (((x) & BIT_MASK_DARF_RC3_8821C) << BIT_SHIFT_DARF_RC3_8821C) 9288 #define BITS_DARF_RC3_8821C \ 9289 (BIT_MASK_DARF_RC3_8821C << BIT_SHIFT_DARF_RC3_8821C) 9290 #define BIT_CLEAR_DARF_RC3_8821C(x) ((x) & (~BITS_DARF_RC3_8821C)) 9291 #define BIT_GET_DARF_RC3_8821C(x) \ 9292 (((x) >> BIT_SHIFT_DARF_RC3_8821C) & BIT_MASK_DARF_RC3_8821C) 9293 #define BIT_SET_DARF_RC3_8821C(x, v) \ 9294 (BIT_CLEAR_DARF_RC3_8821C(x) | BIT_DARF_RC3_8821C(v)) 9295 9296 #define BIT_SHIFT_DARF_RC2_8821C 8 9297 #define BIT_MASK_DARF_RC2_8821C 0x1f 9298 #define BIT_DARF_RC2_8821C(x) \ 9299 (((x) & BIT_MASK_DARF_RC2_8821C) << BIT_SHIFT_DARF_RC2_8821C) 9300 #define BITS_DARF_RC2_8821C \ 9301 (BIT_MASK_DARF_RC2_8821C << BIT_SHIFT_DARF_RC2_8821C) 9302 #define BIT_CLEAR_DARF_RC2_8821C(x) ((x) & (~BITS_DARF_RC2_8821C)) 9303 #define BIT_GET_DARF_RC2_8821C(x) \ 9304 (((x) >> BIT_SHIFT_DARF_RC2_8821C) & BIT_MASK_DARF_RC2_8821C) 9305 #define BIT_SET_DARF_RC2_8821C(x, v) \ 9306 (BIT_CLEAR_DARF_RC2_8821C(x) | BIT_DARF_RC2_8821C(v)) 9307 9308 #define BIT_SHIFT_DARF_RC1_8821C 0 9309 #define BIT_MASK_DARF_RC1_8821C 0x1f 9310 #define BIT_DARF_RC1_8821C(x) \ 9311 (((x) & BIT_MASK_DARF_RC1_8821C) << BIT_SHIFT_DARF_RC1_8821C) 9312 #define BITS_DARF_RC1_8821C \ 9313 (BIT_MASK_DARF_RC1_8821C << BIT_SHIFT_DARF_RC1_8821C) 9314 #define BIT_CLEAR_DARF_RC1_8821C(x) ((x) & (~BITS_DARF_RC1_8821C)) 9315 #define BIT_GET_DARF_RC1_8821C(x) \ 9316 (((x) >> BIT_SHIFT_DARF_RC1_8821C) & BIT_MASK_DARF_RC1_8821C) 9317 #define BIT_SET_DARF_RC1_8821C(x, v) \ 9318 (BIT_CLEAR_DARF_RC1_8821C(x) | BIT_DARF_RC1_8821C(v)) 9319 9320 /* 2 REG_DARFRCH_8821C */ 9321 9322 #define BIT_SHIFT_DARF_RC8_V1_8821C 24 9323 #define BIT_MASK_DARF_RC8_V1_8821C 0x1f 9324 #define BIT_DARF_RC8_V1_8821C(x) \ 9325 (((x) & BIT_MASK_DARF_RC8_V1_8821C) << BIT_SHIFT_DARF_RC8_V1_8821C) 9326 #define BITS_DARF_RC8_V1_8821C \ 9327 (BIT_MASK_DARF_RC8_V1_8821C << BIT_SHIFT_DARF_RC8_V1_8821C) 9328 #define BIT_CLEAR_DARF_RC8_V1_8821C(x) ((x) & (~BITS_DARF_RC8_V1_8821C)) 9329 #define BIT_GET_DARF_RC8_V1_8821C(x) \ 9330 (((x) >> BIT_SHIFT_DARF_RC8_V1_8821C) & BIT_MASK_DARF_RC8_V1_8821C) 9331 #define BIT_SET_DARF_RC8_V1_8821C(x, v) \ 9332 (BIT_CLEAR_DARF_RC8_V1_8821C(x) | BIT_DARF_RC8_V1_8821C(v)) 9333 9334 #define BIT_SHIFT_DARF_RC7_V1_8821C 16 9335 #define BIT_MASK_DARF_RC7_V1_8821C 0x1f 9336 #define BIT_DARF_RC7_V1_8821C(x) \ 9337 (((x) & BIT_MASK_DARF_RC7_V1_8821C) << BIT_SHIFT_DARF_RC7_V1_8821C) 9338 #define BITS_DARF_RC7_V1_8821C \ 9339 (BIT_MASK_DARF_RC7_V1_8821C << BIT_SHIFT_DARF_RC7_V1_8821C) 9340 #define BIT_CLEAR_DARF_RC7_V1_8821C(x) ((x) & (~BITS_DARF_RC7_V1_8821C)) 9341 #define BIT_GET_DARF_RC7_V1_8821C(x) \ 9342 (((x) >> BIT_SHIFT_DARF_RC7_V1_8821C) & BIT_MASK_DARF_RC7_V1_8821C) 9343 #define BIT_SET_DARF_RC7_V1_8821C(x, v) \ 9344 (BIT_CLEAR_DARF_RC7_V1_8821C(x) | BIT_DARF_RC7_V1_8821C(v)) 9345 9346 #define BIT_SHIFT_DARF_RC6_V1_8821C 8 9347 #define BIT_MASK_DARF_RC6_V1_8821C 0x1f 9348 #define BIT_DARF_RC6_V1_8821C(x) \ 9349 (((x) & BIT_MASK_DARF_RC6_V1_8821C) << BIT_SHIFT_DARF_RC6_V1_8821C) 9350 #define BITS_DARF_RC6_V1_8821C \ 9351 (BIT_MASK_DARF_RC6_V1_8821C << BIT_SHIFT_DARF_RC6_V1_8821C) 9352 #define BIT_CLEAR_DARF_RC6_V1_8821C(x) ((x) & (~BITS_DARF_RC6_V1_8821C)) 9353 #define BIT_GET_DARF_RC6_V1_8821C(x) \ 9354 (((x) >> BIT_SHIFT_DARF_RC6_V1_8821C) & BIT_MASK_DARF_RC6_V1_8821C) 9355 #define BIT_SET_DARF_RC6_V1_8821C(x, v) \ 9356 (BIT_CLEAR_DARF_RC6_V1_8821C(x) | BIT_DARF_RC6_V1_8821C(v)) 9357 9358 #define BIT_SHIFT_DARF_RC5_V1_8821C 0 9359 #define BIT_MASK_DARF_RC5_V1_8821C 0x1f 9360 #define BIT_DARF_RC5_V1_8821C(x) \ 9361 (((x) & BIT_MASK_DARF_RC5_V1_8821C) << BIT_SHIFT_DARF_RC5_V1_8821C) 9362 #define BITS_DARF_RC5_V1_8821C \ 9363 (BIT_MASK_DARF_RC5_V1_8821C << BIT_SHIFT_DARF_RC5_V1_8821C) 9364 #define BIT_CLEAR_DARF_RC5_V1_8821C(x) ((x) & (~BITS_DARF_RC5_V1_8821C)) 9365 #define BIT_GET_DARF_RC5_V1_8821C(x) \ 9366 (((x) >> BIT_SHIFT_DARF_RC5_V1_8821C) & BIT_MASK_DARF_RC5_V1_8821C) 9367 #define BIT_SET_DARF_RC5_V1_8821C(x, v) \ 9368 (BIT_CLEAR_DARF_RC5_V1_8821C(x) | BIT_DARF_RC5_V1_8821C(v)) 9369 9370 /* 2 REG_RARFRC_8821C */ 9371 9372 #define BIT_SHIFT_RARF_RC4_8821C 24 9373 #define BIT_MASK_RARF_RC4_8821C 0x1f 9374 #define BIT_RARF_RC4_8821C(x) \ 9375 (((x) & BIT_MASK_RARF_RC4_8821C) << BIT_SHIFT_RARF_RC4_8821C) 9376 #define BITS_RARF_RC4_8821C \ 9377 (BIT_MASK_RARF_RC4_8821C << BIT_SHIFT_RARF_RC4_8821C) 9378 #define BIT_CLEAR_RARF_RC4_8821C(x) ((x) & (~BITS_RARF_RC4_8821C)) 9379 #define BIT_GET_RARF_RC4_8821C(x) \ 9380 (((x) >> BIT_SHIFT_RARF_RC4_8821C) & BIT_MASK_RARF_RC4_8821C) 9381 #define BIT_SET_RARF_RC4_8821C(x, v) \ 9382 (BIT_CLEAR_RARF_RC4_8821C(x) | BIT_RARF_RC4_8821C(v)) 9383 9384 #define BIT_SHIFT_RARF_RC3_8821C 16 9385 #define BIT_MASK_RARF_RC3_8821C 0x1f 9386 #define BIT_RARF_RC3_8821C(x) \ 9387 (((x) & BIT_MASK_RARF_RC3_8821C) << BIT_SHIFT_RARF_RC3_8821C) 9388 #define BITS_RARF_RC3_8821C \ 9389 (BIT_MASK_RARF_RC3_8821C << BIT_SHIFT_RARF_RC3_8821C) 9390 #define BIT_CLEAR_RARF_RC3_8821C(x) ((x) & (~BITS_RARF_RC3_8821C)) 9391 #define BIT_GET_RARF_RC3_8821C(x) \ 9392 (((x) >> BIT_SHIFT_RARF_RC3_8821C) & BIT_MASK_RARF_RC3_8821C) 9393 #define BIT_SET_RARF_RC3_8821C(x, v) \ 9394 (BIT_CLEAR_RARF_RC3_8821C(x) | BIT_RARF_RC3_8821C(v)) 9395 9396 #define BIT_SHIFT_RARF_RC2_8821C 8 9397 #define BIT_MASK_RARF_RC2_8821C 0x1f 9398 #define BIT_RARF_RC2_8821C(x) \ 9399 (((x) & BIT_MASK_RARF_RC2_8821C) << BIT_SHIFT_RARF_RC2_8821C) 9400 #define BITS_RARF_RC2_8821C \ 9401 (BIT_MASK_RARF_RC2_8821C << BIT_SHIFT_RARF_RC2_8821C) 9402 #define BIT_CLEAR_RARF_RC2_8821C(x) ((x) & (~BITS_RARF_RC2_8821C)) 9403 #define BIT_GET_RARF_RC2_8821C(x) \ 9404 (((x) >> BIT_SHIFT_RARF_RC2_8821C) & BIT_MASK_RARF_RC2_8821C) 9405 #define BIT_SET_RARF_RC2_8821C(x, v) \ 9406 (BIT_CLEAR_RARF_RC2_8821C(x) | BIT_RARF_RC2_8821C(v)) 9407 9408 #define BIT_SHIFT_RARF_RC1_8821C 0 9409 #define BIT_MASK_RARF_RC1_8821C 0x1f 9410 #define BIT_RARF_RC1_8821C(x) \ 9411 (((x) & BIT_MASK_RARF_RC1_8821C) << BIT_SHIFT_RARF_RC1_8821C) 9412 #define BITS_RARF_RC1_8821C \ 9413 (BIT_MASK_RARF_RC1_8821C << BIT_SHIFT_RARF_RC1_8821C) 9414 #define BIT_CLEAR_RARF_RC1_8821C(x) ((x) & (~BITS_RARF_RC1_8821C)) 9415 #define BIT_GET_RARF_RC1_8821C(x) \ 9416 (((x) >> BIT_SHIFT_RARF_RC1_8821C) & BIT_MASK_RARF_RC1_8821C) 9417 #define BIT_SET_RARF_RC1_8821C(x, v) \ 9418 (BIT_CLEAR_RARF_RC1_8821C(x) | BIT_RARF_RC1_8821C(v)) 9419 9420 /* 2 REG_RARFRCH_8821C */ 9421 9422 #define BIT_SHIFT_RARF_RC8_V1_8821C 24 9423 #define BIT_MASK_RARF_RC8_V1_8821C 0x1f 9424 #define BIT_RARF_RC8_V1_8821C(x) \ 9425 (((x) & BIT_MASK_RARF_RC8_V1_8821C) << BIT_SHIFT_RARF_RC8_V1_8821C) 9426 #define BITS_RARF_RC8_V1_8821C \ 9427 (BIT_MASK_RARF_RC8_V1_8821C << BIT_SHIFT_RARF_RC8_V1_8821C) 9428 #define BIT_CLEAR_RARF_RC8_V1_8821C(x) ((x) & (~BITS_RARF_RC8_V1_8821C)) 9429 #define BIT_GET_RARF_RC8_V1_8821C(x) \ 9430 (((x) >> BIT_SHIFT_RARF_RC8_V1_8821C) & BIT_MASK_RARF_RC8_V1_8821C) 9431 #define BIT_SET_RARF_RC8_V1_8821C(x, v) \ 9432 (BIT_CLEAR_RARF_RC8_V1_8821C(x) | BIT_RARF_RC8_V1_8821C(v)) 9433 9434 #define BIT_SHIFT_RARF_RC7_V1_8821C 16 9435 #define BIT_MASK_RARF_RC7_V1_8821C 0x1f 9436 #define BIT_RARF_RC7_V1_8821C(x) \ 9437 (((x) & BIT_MASK_RARF_RC7_V1_8821C) << BIT_SHIFT_RARF_RC7_V1_8821C) 9438 #define BITS_RARF_RC7_V1_8821C \ 9439 (BIT_MASK_RARF_RC7_V1_8821C << BIT_SHIFT_RARF_RC7_V1_8821C) 9440 #define BIT_CLEAR_RARF_RC7_V1_8821C(x) ((x) & (~BITS_RARF_RC7_V1_8821C)) 9441 #define BIT_GET_RARF_RC7_V1_8821C(x) \ 9442 (((x) >> BIT_SHIFT_RARF_RC7_V1_8821C) & BIT_MASK_RARF_RC7_V1_8821C) 9443 #define BIT_SET_RARF_RC7_V1_8821C(x, v) \ 9444 (BIT_CLEAR_RARF_RC7_V1_8821C(x) | BIT_RARF_RC7_V1_8821C(v)) 9445 9446 #define BIT_SHIFT_RARF_RC6_V1_8821C 8 9447 #define BIT_MASK_RARF_RC6_V1_8821C 0x1f 9448 #define BIT_RARF_RC6_V1_8821C(x) \ 9449 (((x) & BIT_MASK_RARF_RC6_V1_8821C) << BIT_SHIFT_RARF_RC6_V1_8821C) 9450 #define BITS_RARF_RC6_V1_8821C \ 9451 (BIT_MASK_RARF_RC6_V1_8821C << BIT_SHIFT_RARF_RC6_V1_8821C) 9452 #define BIT_CLEAR_RARF_RC6_V1_8821C(x) ((x) & (~BITS_RARF_RC6_V1_8821C)) 9453 #define BIT_GET_RARF_RC6_V1_8821C(x) \ 9454 (((x) >> BIT_SHIFT_RARF_RC6_V1_8821C) & BIT_MASK_RARF_RC6_V1_8821C) 9455 #define BIT_SET_RARF_RC6_V1_8821C(x, v) \ 9456 (BIT_CLEAR_RARF_RC6_V1_8821C(x) | BIT_RARF_RC6_V1_8821C(v)) 9457 9458 #define BIT_SHIFT_RARF_RC5_V1_8821C 0 9459 #define BIT_MASK_RARF_RC5_V1_8821C 0x1f 9460 #define BIT_RARF_RC5_V1_8821C(x) \ 9461 (((x) & BIT_MASK_RARF_RC5_V1_8821C) << BIT_SHIFT_RARF_RC5_V1_8821C) 9462 #define BITS_RARF_RC5_V1_8821C \ 9463 (BIT_MASK_RARF_RC5_V1_8821C << BIT_SHIFT_RARF_RC5_V1_8821C) 9464 #define BIT_CLEAR_RARF_RC5_V1_8821C(x) ((x) & (~BITS_RARF_RC5_V1_8821C)) 9465 #define BIT_GET_RARF_RC5_V1_8821C(x) \ 9466 (((x) >> BIT_SHIFT_RARF_RC5_V1_8821C) & BIT_MASK_RARF_RC5_V1_8821C) 9467 #define BIT_SET_RARF_RC5_V1_8821C(x, v) \ 9468 (BIT_CLEAR_RARF_RC5_V1_8821C(x) | BIT_RARF_RC5_V1_8821C(v)) 9469 9470 /* 2 REG_RRSR_8821C */ 9471 9472 #define BIT_SHIFT_RRSR_RSC_8821C 21 9473 #define BIT_MASK_RRSR_RSC_8821C 0x3 9474 #define BIT_RRSR_RSC_8821C(x) \ 9475 (((x) & BIT_MASK_RRSR_RSC_8821C) << BIT_SHIFT_RRSR_RSC_8821C) 9476 #define BITS_RRSR_RSC_8821C \ 9477 (BIT_MASK_RRSR_RSC_8821C << BIT_SHIFT_RRSR_RSC_8821C) 9478 #define BIT_CLEAR_RRSR_RSC_8821C(x) ((x) & (~BITS_RRSR_RSC_8821C)) 9479 #define BIT_GET_RRSR_RSC_8821C(x) \ 9480 (((x) >> BIT_SHIFT_RRSR_RSC_8821C) & BIT_MASK_RRSR_RSC_8821C) 9481 #define BIT_SET_RRSR_RSC_8821C(x, v) \ 9482 (BIT_CLEAR_RRSR_RSC_8821C(x) | BIT_RRSR_RSC_8821C(v)) 9483 9484 #define BIT_SHIFT_RRSC_BITMAP_8821C 0 9485 #define BIT_MASK_RRSC_BITMAP_8821C 0xfffff 9486 #define BIT_RRSC_BITMAP_8821C(x) \ 9487 (((x) & BIT_MASK_RRSC_BITMAP_8821C) << BIT_SHIFT_RRSC_BITMAP_8821C) 9488 #define BITS_RRSC_BITMAP_8821C \ 9489 (BIT_MASK_RRSC_BITMAP_8821C << BIT_SHIFT_RRSC_BITMAP_8821C) 9490 #define BIT_CLEAR_RRSC_BITMAP_8821C(x) ((x) & (~BITS_RRSC_BITMAP_8821C)) 9491 #define BIT_GET_RRSC_BITMAP_8821C(x) \ 9492 (((x) >> BIT_SHIFT_RRSC_BITMAP_8821C) & BIT_MASK_RRSC_BITMAP_8821C) 9493 #define BIT_SET_RRSC_BITMAP_8821C(x, v) \ 9494 (BIT_CLEAR_RRSC_BITMAP_8821C(x) | BIT_RRSC_BITMAP_8821C(v)) 9495 9496 /* 2 REG_NOT_VALID_8821C */ 9497 9498 /* 2 REG_ARFR0_8821C */ 9499 9500 #define BIT_SHIFT_ARFRL0_8821C 0 9501 #define BIT_MASK_ARFRL0_8821C 0xffffffffL 9502 #define BIT_ARFRL0_8821C(x) \ 9503 (((x) & BIT_MASK_ARFRL0_8821C) << BIT_SHIFT_ARFRL0_8821C) 9504 #define BITS_ARFRL0_8821C (BIT_MASK_ARFRL0_8821C << BIT_SHIFT_ARFRL0_8821C) 9505 #define BIT_CLEAR_ARFRL0_8821C(x) ((x) & (~BITS_ARFRL0_8821C)) 9506 #define BIT_GET_ARFRL0_8821C(x) \ 9507 (((x) >> BIT_SHIFT_ARFRL0_8821C) & BIT_MASK_ARFRL0_8821C) 9508 #define BIT_SET_ARFRL0_8821C(x, v) \ 9509 (BIT_CLEAR_ARFRL0_8821C(x) | BIT_ARFRL0_8821C(v)) 9510 9511 /* 2 REG_ARFRH0_8821C */ 9512 9513 #define BIT_SHIFT_ARFRH0_8821C 0 9514 #define BIT_MASK_ARFRH0_8821C 0xffffffffL 9515 #define BIT_ARFRH0_8821C(x) \ 9516 (((x) & BIT_MASK_ARFRH0_8821C) << BIT_SHIFT_ARFRH0_8821C) 9517 #define BITS_ARFRH0_8821C (BIT_MASK_ARFRH0_8821C << BIT_SHIFT_ARFRH0_8821C) 9518 #define BIT_CLEAR_ARFRH0_8821C(x) ((x) & (~BITS_ARFRH0_8821C)) 9519 #define BIT_GET_ARFRH0_8821C(x) \ 9520 (((x) >> BIT_SHIFT_ARFRH0_8821C) & BIT_MASK_ARFRH0_8821C) 9521 #define BIT_SET_ARFRH0_8821C(x, v) \ 9522 (BIT_CLEAR_ARFRH0_8821C(x) | BIT_ARFRH0_8821C(v)) 9523 9524 /* 2 REG_ARFR1_V1_8821C */ 9525 9526 #define BIT_SHIFT_ARFRL1_8821C 0 9527 #define BIT_MASK_ARFRL1_8821C 0xffffffffL 9528 #define BIT_ARFRL1_8821C(x) \ 9529 (((x) & BIT_MASK_ARFRL1_8821C) << BIT_SHIFT_ARFRL1_8821C) 9530 #define BITS_ARFRL1_8821C (BIT_MASK_ARFRL1_8821C << BIT_SHIFT_ARFRL1_8821C) 9531 #define BIT_CLEAR_ARFRL1_8821C(x) ((x) & (~BITS_ARFRL1_8821C)) 9532 #define BIT_GET_ARFRL1_8821C(x) \ 9533 (((x) >> BIT_SHIFT_ARFRL1_8821C) & BIT_MASK_ARFRL1_8821C) 9534 #define BIT_SET_ARFRL1_8821C(x, v) \ 9535 (BIT_CLEAR_ARFRL1_8821C(x) | BIT_ARFRL1_8821C(v)) 9536 9537 /* 2 REG_ARFRH1_V1_8821C */ 9538 9539 #define BIT_SHIFT_ARFRH1_8821C 0 9540 #define BIT_MASK_ARFRH1_8821C 0xffffffffL 9541 #define BIT_ARFRH1_8821C(x) \ 9542 (((x) & BIT_MASK_ARFRH1_8821C) << BIT_SHIFT_ARFRH1_8821C) 9543 #define BITS_ARFRH1_8821C (BIT_MASK_ARFRH1_8821C << BIT_SHIFT_ARFRH1_8821C) 9544 #define BIT_CLEAR_ARFRH1_8821C(x) ((x) & (~BITS_ARFRH1_8821C)) 9545 #define BIT_GET_ARFRH1_8821C(x) \ 9546 (((x) >> BIT_SHIFT_ARFRH1_8821C) & BIT_MASK_ARFRH1_8821C) 9547 #define BIT_SET_ARFRH1_8821C(x, v) \ 9548 (BIT_CLEAR_ARFRH1_8821C(x) | BIT_ARFRH1_8821C(v)) 9549 9550 /* 2 REG_CCK_CHECK_8821C */ 9551 #define BIT_CHECK_CCK_EN_8821C BIT(7) 9552 #define BIT_EN_BCN_PKT_REL_8821C BIT(6) 9553 #define BIT_BCN_PORT_SEL_8821C BIT(5) 9554 #define BIT_MOREDATA_BYPASS_8821C BIT(4) 9555 #define BIT_EN_CLR_CMD_REL_BCN_PKT_8821C BIT(3) 9556 #define BIT_R_EN_SET_MOREDATA_8821C BIT(2) 9557 #define BIT__R_DIS_CLEAR_MACID_RELEASE_8821C BIT(1) 9558 #define BIT__R_MACID_RELEASE_EN_8821C BIT(0) 9559 9560 /* 2 REG_AMPDU_MAX_TIME_V1_8821C */ 9561 9562 #define BIT_SHIFT_AMPDU_MAX_TIME_8821C 0 9563 #define BIT_MASK_AMPDU_MAX_TIME_8821C 0xff 9564 #define BIT_AMPDU_MAX_TIME_8821C(x) \ 9565 (((x) & BIT_MASK_AMPDU_MAX_TIME_8821C) \ 9566 << BIT_SHIFT_AMPDU_MAX_TIME_8821C) 9567 #define BITS_AMPDU_MAX_TIME_8821C \ 9568 (BIT_MASK_AMPDU_MAX_TIME_8821C << BIT_SHIFT_AMPDU_MAX_TIME_8821C) 9569 #define BIT_CLEAR_AMPDU_MAX_TIME_8821C(x) ((x) & (~BITS_AMPDU_MAX_TIME_8821C)) 9570 #define BIT_GET_AMPDU_MAX_TIME_8821C(x) \ 9571 (((x) >> BIT_SHIFT_AMPDU_MAX_TIME_8821C) & \ 9572 BIT_MASK_AMPDU_MAX_TIME_8821C) 9573 #define BIT_SET_AMPDU_MAX_TIME_8821C(x, v) \ 9574 (BIT_CLEAR_AMPDU_MAX_TIME_8821C(x) | BIT_AMPDU_MAX_TIME_8821C(v)) 9575 9576 /* 2 REG_BCNQ1_BDNY_V1_8821C */ 9577 9578 #define BIT_SHIFT_BCNQ1_PGBNDY_V1_8821C 0 9579 #define BIT_MASK_BCNQ1_PGBNDY_V1_8821C 0xfff 9580 #define BIT_BCNQ1_PGBNDY_V1_8821C(x) \ 9581 (((x) & BIT_MASK_BCNQ1_PGBNDY_V1_8821C) \ 9582 << BIT_SHIFT_BCNQ1_PGBNDY_V1_8821C) 9583 #define BITS_BCNQ1_PGBNDY_V1_8821C \ 9584 (BIT_MASK_BCNQ1_PGBNDY_V1_8821C << BIT_SHIFT_BCNQ1_PGBNDY_V1_8821C) 9585 #define BIT_CLEAR_BCNQ1_PGBNDY_V1_8821C(x) ((x) & (~BITS_BCNQ1_PGBNDY_V1_8821C)) 9586 #define BIT_GET_BCNQ1_PGBNDY_V1_8821C(x) \ 9587 (((x) >> BIT_SHIFT_BCNQ1_PGBNDY_V1_8821C) & \ 9588 BIT_MASK_BCNQ1_PGBNDY_V1_8821C) 9589 #define BIT_SET_BCNQ1_PGBNDY_V1_8821C(x, v) \ 9590 (BIT_CLEAR_BCNQ1_PGBNDY_V1_8821C(x) | BIT_BCNQ1_PGBNDY_V1_8821C(v)) 9591 9592 /* 2 REG_AMPDU_MAX_LENGTH_8821C */ 9593 9594 #define BIT_SHIFT_AMPDU_MAX_LENGTH_8821C 0 9595 #define BIT_MASK_AMPDU_MAX_LENGTH_8821C 0xffffffffL 9596 #define BIT_AMPDU_MAX_LENGTH_8821C(x) \ 9597 (((x) & BIT_MASK_AMPDU_MAX_LENGTH_8821C) \ 9598 << BIT_SHIFT_AMPDU_MAX_LENGTH_8821C) 9599 #define BITS_AMPDU_MAX_LENGTH_8821C \ 9600 (BIT_MASK_AMPDU_MAX_LENGTH_8821C << BIT_SHIFT_AMPDU_MAX_LENGTH_8821C) 9601 #define BIT_CLEAR_AMPDU_MAX_LENGTH_8821C(x) \ 9602 ((x) & (~BITS_AMPDU_MAX_LENGTH_8821C)) 9603 #define BIT_GET_AMPDU_MAX_LENGTH_8821C(x) \ 9604 (((x) >> BIT_SHIFT_AMPDU_MAX_LENGTH_8821C) & \ 9605 BIT_MASK_AMPDU_MAX_LENGTH_8821C) 9606 #define BIT_SET_AMPDU_MAX_LENGTH_8821C(x, v) \ 9607 (BIT_CLEAR_AMPDU_MAX_LENGTH_8821C(x) | BIT_AMPDU_MAX_LENGTH_8821C(v)) 9608 9609 /* 2 REG_ACQ_STOP_8821C */ 9610 #define BIT_AC7Q_STOP_8821C BIT(7) 9611 #define BIT_AC6Q_STOP_8821C BIT(6) 9612 #define BIT_AC5Q_STOP_8821C BIT(5) 9613 #define BIT_AC4Q_STOP_8821C BIT(4) 9614 #define BIT_AC3Q_STOP_8821C BIT(3) 9615 #define BIT_AC2Q_STOP_8821C BIT(2) 9616 #define BIT_AC1Q_STOP_8821C BIT(1) 9617 #define BIT_AC0Q_STOP_8821C BIT(0) 9618 9619 /* 2 REG_NDPA_RATE_8821C */ 9620 9621 #define BIT_SHIFT_R_NDPA_RATE_V1_8821C 0 9622 #define BIT_MASK_R_NDPA_RATE_V1_8821C 0xff 9623 #define BIT_R_NDPA_RATE_V1_8821C(x) \ 9624 (((x) & BIT_MASK_R_NDPA_RATE_V1_8821C) \ 9625 << BIT_SHIFT_R_NDPA_RATE_V1_8821C) 9626 #define BITS_R_NDPA_RATE_V1_8821C \ 9627 (BIT_MASK_R_NDPA_RATE_V1_8821C << BIT_SHIFT_R_NDPA_RATE_V1_8821C) 9628 #define BIT_CLEAR_R_NDPA_RATE_V1_8821C(x) ((x) & (~BITS_R_NDPA_RATE_V1_8821C)) 9629 #define BIT_GET_R_NDPA_RATE_V1_8821C(x) \ 9630 (((x) >> BIT_SHIFT_R_NDPA_RATE_V1_8821C) & \ 9631 BIT_MASK_R_NDPA_RATE_V1_8821C) 9632 #define BIT_SET_R_NDPA_RATE_V1_8821C(x, v) \ 9633 (BIT_CLEAR_R_NDPA_RATE_V1_8821C(x) | BIT_R_NDPA_RATE_V1_8821C(v)) 9634 9635 /* 2 REG_TX_HANG_CTRL_8821C */ 9636 #define BIT_R_EN_GNT_BT_AWAKE_8821C BIT(3) 9637 #define BIT_EN_EOF_V1_8821C BIT(2) 9638 #define BIT_DIS_OQT_BLOCK_8821C BIT(1) 9639 #define BIT_SEARCH_QUEUE_EN_8821C BIT(0) 9640 9641 /* 2 REG_NDPA_OPT_CTRL_8821C */ 9642 #define BIT_R_DIS_MACID_RELEASE_RTY_8821C BIT(5) 9643 9644 #define BIT_SHIFT_BW_SIGTA_8821C 3 9645 #define BIT_MASK_BW_SIGTA_8821C 0x3 9646 #define BIT_BW_SIGTA_8821C(x) \ 9647 (((x) & BIT_MASK_BW_SIGTA_8821C) << BIT_SHIFT_BW_SIGTA_8821C) 9648 #define BITS_BW_SIGTA_8821C \ 9649 (BIT_MASK_BW_SIGTA_8821C << BIT_SHIFT_BW_SIGTA_8821C) 9650 #define BIT_CLEAR_BW_SIGTA_8821C(x) ((x) & (~BITS_BW_SIGTA_8821C)) 9651 #define BIT_GET_BW_SIGTA_8821C(x) \ 9652 (((x) >> BIT_SHIFT_BW_SIGTA_8821C) & BIT_MASK_BW_SIGTA_8821C) 9653 #define BIT_SET_BW_SIGTA_8821C(x, v) \ 9654 (BIT_CLEAR_BW_SIGTA_8821C(x) | BIT_BW_SIGTA_8821C(v)) 9655 9656 #define BIT_EN_BAR_SIGTA_8821C BIT(2) 9657 9658 #define BIT_SHIFT_R_NDPA_BW_8821C 0 9659 #define BIT_MASK_R_NDPA_BW_8821C 0x3 9660 #define BIT_R_NDPA_BW_8821C(x) \ 9661 (((x) & BIT_MASK_R_NDPA_BW_8821C) << BIT_SHIFT_R_NDPA_BW_8821C) 9662 #define BITS_R_NDPA_BW_8821C \ 9663 (BIT_MASK_R_NDPA_BW_8821C << BIT_SHIFT_R_NDPA_BW_8821C) 9664 #define BIT_CLEAR_R_NDPA_BW_8821C(x) ((x) & (~BITS_R_NDPA_BW_8821C)) 9665 #define BIT_GET_R_NDPA_BW_8821C(x) \ 9666 (((x) >> BIT_SHIFT_R_NDPA_BW_8821C) & BIT_MASK_R_NDPA_BW_8821C) 9667 #define BIT_SET_R_NDPA_BW_8821C(x, v) \ 9668 (BIT_CLEAR_R_NDPA_BW_8821C(x) | BIT_R_NDPA_BW_8821C(v)) 9669 9670 /* 2 REG_NOT_VALID_8821C */ 9671 9672 /* 2 REG_RD_RESP_PKT_TH_8821C */ 9673 9674 #define BIT_SHIFT_RD_RESP_PKT_TH_V1_8821C 0 9675 #define BIT_MASK_RD_RESP_PKT_TH_V1_8821C 0x3f 9676 #define BIT_RD_RESP_PKT_TH_V1_8821C(x) \ 9677 (((x) & BIT_MASK_RD_RESP_PKT_TH_V1_8821C) \ 9678 << BIT_SHIFT_RD_RESP_PKT_TH_V1_8821C) 9679 #define BITS_RD_RESP_PKT_TH_V1_8821C \ 9680 (BIT_MASK_RD_RESP_PKT_TH_V1_8821C << BIT_SHIFT_RD_RESP_PKT_TH_V1_8821C) 9681 #define BIT_CLEAR_RD_RESP_PKT_TH_V1_8821C(x) \ 9682 ((x) & (~BITS_RD_RESP_PKT_TH_V1_8821C)) 9683 #define BIT_GET_RD_RESP_PKT_TH_V1_8821C(x) \ 9684 (((x) >> BIT_SHIFT_RD_RESP_PKT_TH_V1_8821C) & \ 9685 BIT_MASK_RD_RESP_PKT_TH_V1_8821C) 9686 #define BIT_SET_RD_RESP_PKT_TH_V1_8821C(x, v) \ 9687 (BIT_CLEAR_RD_RESP_PKT_TH_V1_8821C(x) | BIT_RD_RESP_PKT_TH_V1_8821C(v)) 9688 9689 /* 2 REG_CMDQ_INFO_8821C */ 9690 9691 #define BIT_SHIFT_QUEUEMACID_CMDQ_V1_8821C 25 9692 #define BIT_MASK_QUEUEMACID_CMDQ_V1_8821C 0x7f 9693 #define BIT_QUEUEMACID_CMDQ_V1_8821C(x) \ 9694 (((x) & BIT_MASK_QUEUEMACID_CMDQ_V1_8821C) \ 9695 << BIT_SHIFT_QUEUEMACID_CMDQ_V1_8821C) 9696 #define BITS_QUEUEMACID_CMDQ_V1_8821C \ 9697 (BIT_MASK_QUEUEMACID_CMDQ_V1_8821C \ 9698 << BIT_SHIFT_QUEUEMACID_CMDQ_V1_8821C) 9699 #define BIT_CLEAR_QUEUEMACID_CMDQ_V1_8821C(x) \ 9700 ((x) & (~BITS_QUEUEMACID_CMDQ_V1_8821C)) 9701 #define BIT_GET_QUEUEMACID_CMDQ_V1_8821C(x) \ 9702 (((x) >> BIT_SHIFT_QUEUEMACID_CMDQ_V1_8821C) & \ 9703 BIT_MASK_QUEUEMACID_CMDQ_V1_8821C) 9704 #define BIT_SET_QUEUEMACID_CMDQ_V1_8821C(x, v) \ 9705 (BIT_CLEAR_QUEUEMACID_CMDQ_V1_8821C(x) | \ 9706 BIT_QUEUEMACID_CMDQ_V1_8821C(v)) 9707 9708 #define BIT_SHIFT_QUEUEAC_CMDQ_V1_8821C 23 9709 #define BIT_MASK_QUEUEAC_CMDQ_V1_8821C 0x3 9710 #define BIT_QUEUEAC_CMDQ_V1_8821C(x) \ 9711 (((x) & BIT_MASK_QUEUEAC_CMDQ_V1_8821C) \ 9712 << BIT_SHIFT_QUEUEAC_CMDQ_V1_8821C) 9713 #define BITS_QUEUEAC_CMDQ_V1_8821C \ 9714 (BIT_MASK_QUEUEAC_CMDQ_V1_8821C << BIT_SHIFT_QUEUEAC_CMDQ_V1_8821C) 9715 #define BIT_CLEAR_QUEUEAC_CMDQ_V1_8821C(x) ((x) & (~BITS_QUEUEAC_CMDQ_V1_8821C)) 9716 #define BIT_GET_QUEUEAC_CMDQ_V1_8821C(x) \ 9717 (((x) >> BIT_SHIFT_QUEUEAC_CMDQ_V1_8821C) & \ 9718 BIT_MASK_QUEUEAC_CMDQ_V1_8821C) 9719 #define BIT_SET_QUEUEAC_CMDQ_V1_8821C(x, v) \ 9720 (BIT_CLEAR_QUEUEAC_CMDQ_V1_8821C(x) | BIT_QUEUEAC_CMDQ_V1_8821C(v)) 9721 9722 #define BIT_TIDEMPTY_CMDQ_V1_8821C BIT(22) 9723 9724 #define BIT_SHIFT_TAIL_PKT_Q4_V2_8821C 11 9725 #define BIT_MASK_TAIL_PKT_Q4_V2_8821C 0x7ff 9726 #define BIT_TAIL_PKT_Q4_V2_8821C(x) \ 9727 (((x) & BIT_MASK_TAIL_PKT_Q4_V2_8821C) \ 9728 << BIT_SHIFT_TAIL_PKT_Q4_V2_8821C) 9729 #define BITS_TAIL_PKT_Q4_V2_8821C \ 9730 (BIT_MASK_TAIL_PKT_Q4_V2_8821C << BIT_SHIFT_TAIL_PKT_Q4_V2_8821C) 9731 #define BIT_CLEAR_TAIL_PKT_Q4_V2_8821C(x) ((x) & (~BITS_TAIL_PKT_Q4_V2_8821C)) 9732 #define BIT_GET_TAIL_PKT_Q4_V2_8821C(x) \ 9733 (((x) >> BIT_SHIFT_TAIL_PKT_Q4_V2_8821C) & \ 9734 BIT_MASK_TAIL_PKT_Q4_V2_8821C) 9735 #define BIT_SET_TAIL_PKT_Q4_V2_8821C(x, v) \ 9736 (BIT_CLEAR_TAIL_PKT_Q4_V2_8821C(x) | BIT_TAIL_PKT_Q4_V2_8821C(v)) 9737 9738 #define BIT_SHIFT_HEAD_PKT_CMDQ_V1_8821C 0 9739 #define BIT_MASK_HEAD_PKT_CMDQ_V1_8821C 0x7ff 9740 #define BIT_HEAD_PKT_CMDQ_V1_8821C(x) \ 9741 (((x) & BIT_MASK_HEAD_PKT_CMDQ_V1_8821C) \ 9742 << BIT_SHIFT_HEAD_PKT_CMDQ_V1_8821C) 9743 #define BITS_HEAD_PKT_CMDQ_V1_8821C \ 9744 (BIT_MASK_HEAD_PKT_CMDQ_V1_8821C << BIT_SHIFT_HEAD_PKT_CMDQ_V1_8821C) 9745 #define BIT_CLEAR_HEAD_PKT_CMDQ_V1_8821C(x) \ 9746 ((x) & (~BITS_HEAD_PKT_CMDQ_V1_8821C)) 9747 #define BIT_GET_HEAD_PKT_CMDQ_V1_8821C(x) \ 9748 (((x) >> BIT_SHIFT_HEAD_PKT_CMDQ_V1_8821C) & \ 9749 BIT_MASK_HEAD_PKT_CMDQ_V1_8821C) 9750 #define BIT_SET_HEAD_PKT_CMDQ_V1_8821C(x, v) \ 9751 (BIT_CLEAR_HEAD_PKT_CMDQ_V1_8821C(x) | BIT_HEAD_PKT_CMDQ_V1_8821C(v)) 9752 9753 /* 2 REG_Q4_INFO_8821C */ 9754 9755 #define BIT_SHIFT_QUEUEMACID_Q4_V1_8821C 25 9756 #define BIT_MASK_QUEUEMACID_Q4_V1_8821C 0x7f 9757 #define BIT_QUEUEMACID_Q4_V1_8821C(x) \ 9758 (((x) & BIT_MASK_QUEUEMACID_Q4_V1_8821C) \ 9759 << BIT_SHIFT_QUEUEMACID_Q4_V1_8821C) 9760 #define BITS_QUEUEMACID_Q4_V1_8821C \ 9761 (BIT_MASK_QUEUEMACID_Q4_V1_8821C << BIT_SHIFT_QUEUEMACID_Q4_V1_8821C) 9762 #define BIT_CLEAR_QUEUEMACID_Q4_V1_8821C(x) \ 9763 ((x) & (~BITS_QUEUEMACID_Q4_V1_8821C)) 9764 #define BIT_GET_QUEUEMACID_Q4_V1_8821C(x) \ 9765 (((x) >> BIT_SHIFT_QUEUEMACID_Q4_V1_8821C) & \ 9766 BIT_MASK_QUEUEMACID_Q4_V1_8821C) 9767 #define BIT_SET_QUEUEMACID_Q4_V1_8821C(x, v) \ 9768 (BIT_CLEAR_QUEUEMACID_Q4_V1_8821C(x) | BIT_QUEUEMACID_Q4_V1_8821C(v)) 9769 9770 #define BIT_SHIFT_QUEUEAC_Q4_V1_8821C 23 9771 #define BIT_MASK_QUEUEAC_Q4_V1_8821C 0x3 9772 #define BIT_QUEUEAC_Q4_V1_8821C(x) \ 9773 (((x) & BIT_MASK_QUEUEAC_Q4_V1_8821C) << BIT_SHIFT_QUEUEAC_Q4_V1_8821C) 9774 #define BITS_QUEUEAC_Q4_V1_8821C \ 9775 (BIT_MASK_QUEUEAC_Q4_V1_8821C << BIT_SHIFT_QUEUEAC_Q4_V1_8821C) 9776 #define BIT_CLEAR_QUEUEAC_Q4_V1_8821C(x) ((x) & (~BITS_QUEUEAC_Q4_V1_8821C)) 9777 #define BIT_GET_QUEUEAC_Q4_V1_8821C(x) \ 9778 (((x) >> BIT_SHIFT_QUEUEAC_Q4_V1_8821C) & BIT_MASK_QUEUEAC_Q4_V1_8821C) 9779 #define BIT_SET_QUEUEAC_Q4_V1_8821C(x, v) \ 9780 (BIT_CLEAR_QUEUEAC_Q4_V1_8821C(x) | BIT_QUEUEAC_Q4_V1_8821C(v)) 9781 9782 #define BIT_TIDEMPTY_Q4_V1_8821C BIT(22) 9783 9784 #define BIT_SHIFT_TAIL_PKT_Q4_V2_8821C 11 9785 #define BIT_MASK_TAIL_PKT_Q4_V2_8821C 0x7ff 9786 #define BIT_TAIL_PKT_Q4_V2_8821C(x) \ 9787 (((x) & BIT_MASK_TAIL_PKT_Q4_V2_8821C) \ 9788 << BIT_SHIFT_TAIL_PKT_Q4_V2_8821C) 9789 #define BITS_TAIL_PKT_Q4_V2_8821C \ 9790 (BIT_MASK_TAIL_PKT_Q4_V2_8821C << BIT_SHIFT_TAIL_PKT_Q4_V2_8821C) 9791 #define BIT_CLEAR_TAIL_PKT_Q4_V2_8821C(x) ((x) & (~BITS_TAIL_PKT_Q4_V2_8821C)) 9792 #define BIT_GET_TAIL_PKT_Q4_V2_8821C(x) \ 9793 (((x) >> BIT_SHIFT_TAIL_PKT_Q4_V2_8821C) & \ 9794 BIT_MASK_TAIL_PKT_Q4_V2_8821C) 9795 #define BIT_SET_TAIL_PKT_Q4_V2_8821C(x, v) \ 9796 (BIT_CLEAR_TAIL_PKT_Q4_V2_8821C(x) | BIT_TAIL_PKT_Q4_V2_8821C(v)) 9797 9798 #define BIT_SHIFT_HEAD_PKT_Q4_V1_8821C 0 9799 #define BIT_MASK_HEAD_PKT_Q4_V1_8821C 0x7ff 9800 #define BIT_HEAD_PKT_Q4_V1_8821C(x) \ 9801 (((x) & BIT_MASK_HEAD_PKT_Q4_V1_8821C) \ 9802 << BIT_SHIFT_HEAD_PKT_Q4_V1_8821C) 9803 #define BITS_HEAD_PKT_Q4_V1_8821C \ 9804 (BIT_MASK_HEAD_PKT_Q4_V1_8821C << BIT_SHIFT_HEAD_PKT_Q4_V1_8821C) 9805 #define BIT_CLEAR_HEAD_PKT_Q4_V1_8821C(x) ((x) & (~BITS_HEAD_PKT_Q4_V1_8821C)) 9806 #define BIT_GET_HEAD_PKT_Q4_V1_8821C(x) \ 9807 (((x) >> BIT_SHIFT_HEAD_PKT_Q4_V1_8821C) & \ 9808 BIT_MASK_HEAD_PKT_Q4_V1_8821C) 9809 #define BIT_SET_HEAD_PKT_Q4_V1_8821C(x, v) \ 9810 (BIT_CLEAR_HEAD_PKT_Q4_V1_8821C(x) | BIT_HEAD_PKT_Q4_V1_8821C(v)) 9811 9812 /* 2 REG_Q5_INFO_8821C */ 9813 9814 #define BIT_SHIFT_QUEUEMACID_Q5_V1_8821C 25 9815 #define BIT_MASK_QUEUEMACID_Q5_V1_8821C 0x7f 9816 #define BIT_QUEUEMACID_Q5_V1_8821C(x) \ 9817 (((x) & BIT_MASK_QUEUEMACID_Q5_V1_8821C) \ 9818 << BIT_SHIFT_QUEUEMACID_Q5_V1_8821C) 9819 #define BITS_QUEUEMACID_Q5_V1_8821C \ 9820 (BIT_MASK_QUEUEMACID_Q5_V1_8821C << BIT_SHIFT_QUEUEMACID_Q5_V1_8821C) 9821 #define BIT_CLEAR_QUEUEMACID_Q5_V1_8821C(x) \ 9822 ((x) & (~BITS_QUEUEMACID_Q5_V1_8821C)) 9823 #define BIT_GET_QUEUEMACID_Q5_V1_8821C(x) \ 9824 (((x) >> BIT_SHIFT_QUEUEMACID_Q5_V1_8821C) & \ 9825 BIT_MASK_QUEUEMACID_Q5_V1_8821C) 9826 #define BIT_SET_QUEUEMACID_Q5_V1_8821C(x, v) \ 9827 (BIT_CLEAR_QUEUEMACID_Q5_V1_8821C(x) | BIT_QUEUEMACID_Q5_V1_8821C(v)) 9828 9829 #define BIT_SHIFT_QUEUEAC_Q5_V1_8821C 23 9830 #define BIT_MASK_QUEUEAC_Q5_V1_8821C 0x3 9831 #define BIT_QUEUEAC_Q5_V1_8821C(x) \ 9832 (((x) & BIT_MASK_QUEUEAC_Q5_V1_8821C) << BIT_SHIFT_QUEUEAC_Q5_V1_8821C) 9833 #define BITS_QUEUEAC_Q5_V1_8821C \ 9834 (BIT_MASK_QUEUEAC_Q5_V1_8821C << BIT_SHIFT_QUEUEAC_Q5_V1_8821C) 9835 #define BIT_CLEAR_QUEUEAC_Q5_V1_8821C(x) ((x) & (~BITS_QUEUEAC_Q5_V1_8821C)) 9836 #define BIT_GET_QUEUEAC_Q5_V1_8821C(x) \ 9837 (((x) >> BIT_SHIFT_QUEUEAC_Q5_V1_8821C) & BIT_MASK_QUEUEAC_Q5_V1_8821C) 9838 #define BIT_SET_QUEUEAC_Q5_V1_8821C(x, v) \ 9839 (BIT_CLEAR_QUEUEAC_Q5_V1_8821C(x) | BIT_QUEUEAC_Q5_V1_8821C(v)) 9840 9841 #define BIT_TIDEMPTY_Q5_V1_8821C BIT(22) 9842 9843 #define BIT_SHIFT_TAIL_PKT_Q5_V2_8821C 11 9844 #define BIT_MASK_TAIL_PKT_Q5_V2_8821C 0x7ff 9845 #define BIT_TAIL_PKT_Q5_V2_8821C(x) \ 9846 (((x) & BIT_MASK_TAIL_PKT_Q5_V2_8821C) \ 9847 << BIT_SHIFT_TAIL_PKT_Q5_V2_8821C) 9848 #define BITS_TAIL_PKT_Q5_V2_8821C \ 9849 (BIT_MASK_TAIL_PKT_Q5_V2_8821C << BIT_SHIFT_TAIL_PKT_Q5_V2_8821C) 9850 #define BIT_CLEAR_TAIL_PKT_Q5_V2_8821C(x) ((x) & (~BITS_TAIL_PKT_Q5_V2_8821C)) 9851 #define BIT_GET_TAIL_PKT_Q5_V2_8821C(x) \ 9852 (((x) >> BIT_SHIFT_TAIL_PKT_Q5_V2_8821C) & \ 9853 BIT_MASK_TAIL_PKT_Q5_V2_8821C) 9854 #define BIT_SET_TAIL_PKT_Q5_V2_8821C(x, v) \ 9855 (BIT_CLEAR_TAIL_PKT_Q5_V2_8821C(x) | BIT_TAIL_PKT_Q5_V2_8821C(v)) 9856 9857 #define BIT_SHIFT_HEAD_PKT_Q5_V1_8821C 0 9858 #define BIT_MASK_HEAD_PKT_Q5_V1_8821C 0x7ff 9859 #define BIT_HEAD_PKT_Q5_V1_8821C(x) \ 9860 (((x) & BIT_MASK_HEAD_PKT_Q5_V1_8821C) \ 9861 << BIT_SHIFT_HEAD_PKT_Q5_V1_8821C) 9862 #define BITS_HEAD_PKT_Q5_V1_8821C \ 9863 (BIT_MASK_HEAD_PKT_Q5_V1_8821C << BIT_SHIFT_HEAD_PKT_Q5_V1_8821C) 9864 #define BIT_CLEAR_HEAD_PKT_Q5_V1_8821C(x) ((x) & (~BITS_HEAD_PKT_Q5_V1_8821C)) 9865 #define BIT_GET_HEAD_PKT_Q5_V1_8821C(x) \ 9866 (((x) >> BIT_SHIFT_HEAD_PKT_Q5_V1_8821C) & \ 9867 BIT_MASK_HEAD_PKT_Q5_V1_8821C) 9868 #define BIT_SET_HEAD_PKT_Q5_V1_8821C(x, v) \ 9869 (BIT_CLEAR_HEAD_PKT_Q5_V1_8821C(x) | BIT_HEAD_PKT_Q5_V1_8821C(v)) 9870 9871 /* 2 REG_Q6_INFO_8821C */ 9872 9873 #define BIT_SHIFT_QUEUEMACID_Q6_V1_8821C 25 9874 #define BIT_MASK_QUEUEMACID_Q6_V1_8821C 0x7f 9875 #define BIT_QUEUEMACID_Q6_V1_8821C(x) \ 9876 (((x) & BIT_MASK_QUEUEMACID_Q6_V1_8821C) \ 9877 << BIT_SHIFT_QUEUEMACID_Q6_V1_8821C) 9878 #define BITS_QUEUEMACID_Q6_V1_8821C \ 9879 (BIT_MASK_QUEUEMACID_Q6_V1_8821C << BIT_SHIFT_QUEUEMACID_Q6_V1_8821C) 9880 #define BIT_CLEAR_QUEUEMACID_Q6_V1_8821C(x) \ 9881 ((x) & (~BITS_QUEUEMACID_Q6_V1_8821C)) 9882 #define BIT_GET_QUEUEMACID_Q6_V1_8821C(x) \ 9883 (((x) >> BIT_SHIFT_QUEUEMACID_Q6_V1_8821C) & \ 9884 BIT_MASK_QUEUEMACID_Q6_V1_8821C) 9885 #define BIT_SET_QUEUEMACID_Q6_V1_8821C(x, v) \ 9886 (BIT_CLEAR_QUEUEMACID_Q6_V1_8821C(x) | BIT_QUEUEMACID_Q6_V1_8821C(v)) 9887 9888 #define BIT_SHIFT_QUEUEAC_Q6_V1_8821C 23 9889 #define BIT_MASK_QUEUEAC_Q6_V1_8821C 0x3 9890 #define BIT_QUEUEAC_Q6_V1_8821C(x) \ 9891 (((x) & BIT_MASK_QUEUEAC_Q6_V1_8821C) << BIT_SHIFT_QUEUEAC_Q6_V1_8821C) 9892 #define BITS_QUEUEAC_Q6_V1_8821C \ 9893 (BIT_MASK_QUEUEAC_Q6_V1_8821C << BIT_SHIFT_QUEUEAC_Q6_V1_8821C) 9894 #define BIT_CLEAR_QUEUEAC_Q6_V1_8821C(x) ((x) & (~BITS_QUEUEAC_Q6_V1_8821C)) 9895 #define BIT_GET_QUEUEAC_Q6_V1_8821C(x) \ 9896 (((x) >> BIT_SHIFT_QUEUEAC_Q6_V1_8821C) & BIT_MASK_QUEUEAC_Q6_V1_8821C) 9897 #define BIT_SET_QUEUEAC_Q6_V1_8821C(x, v) \ 9898 (BIT_CLEAR_QUEUEAC_Q6_V1_8821C(x) | BIT_QUEUEAC_Q6_V1_8821C(v)) 9899 9900 #define BIT_TIDEMPTY_Q6_V1_8821C BIT(22) 9901 9902 #define BIT_SHIFT_TAIL_PKT_Q6_V2_8821C 11 9903 #define BIT_MASK_TAIL_PKT_Q6_V2_8821C 0x7ff 9904 #define BIT_TAIL_PKT_Q6_V2_8821C(x) \ 9905 (((x) & BIT_MASK_TAIL_PKT_Q6_V2_8821C) \ 9906 << BIT_SHIFT_TAIL_PKT_Q6_V2_8821C) 9907 #define BITS_TAIL_PKT_Q6_V2_8821C \ 9908 (BIT_MASK_TAIL_PKT_Q6_V2_8821C << BIT_SHIFT_TAIL_PKT_Q6_V2_8821C) 9909 #define BIT_CLEAR_TAIL_PKT_Q6_V2_8821C(x) ((x) & (~BITS_TAIL_PKT_Q6_V2_8821C)) 9910 #define BIT_GET_TAIL_PKT_Q6_V2_8821C(x) \ 9911 (((x) >> BIT_SHIFT_TAIL_PKT_Q6_V2_8821C) & \ 9912 BIT_MASK_TAIL_PKT_Q6_V2_8821C) 9913 #define BIT_SET_TAIL_PKT_Q6_V2_8821C(x, v) \ 9914 (BIT_CLEAR_TAIL_PKT_Q6_V2_8821C(x) | BIT_TAIL_PKT_Q6_V2_8821C(v)) 9915 9916 #define BIT_SHIFT_HEAD_PKT_Q6_V1_8821C 0 9917 #define BIT_MASK_HEAD_PKT_Q6_V1_8821C 0x7ff 9918 #define BIT_HEAD_PKT_Q6_V1_8821C(x) \ 9919 (((x) & BIT_MASK_HEAD_PKT_Q6_V1_8821C) \ 9920 << BIT_SHIFT_HEAD_PKT_Q6_V1_8821C) 9921 #define BITS_HEAD_PKT_Q6_V1_8821C \ 9922 (BIT_MASK_HEAD_PKT_Q6_V1_8821C << BIT_SHIFT_HEAD_PKT_Q6_V1_8821C) 9923 #define BIT_CLEAR_HEAD_PKT_Q6_V1_8821C(x) ((x) & (~BITS_HEAD_PKT_Q6_V1_8821C)) 9924 #define BIT_GET_HEAD_PKT_Q6_V1_8821C(x) \ 9925 (((x) >> BIT_SHIFT_HEAD_PKT_Q6_V1_8821C) & \ 9926 BIT_MASK_HEAD_PKT_Q6_V1_8821C) 9927 #define BIT_SET_HEAD_PKT_Q6_V1_8821C(x, v) \ 9928 (BIT_CLEAR_HEAD_PKT_Q6_V1_8821C(x) | BIT_HEAD_PKT_Q6_V1_8821C(v)) 9929 9930 /* 2 REG_Q7_INFO_8821C */ 9931 9932 #define BIT_SHIFT_QUEUEMACID_Q7_V1_8821C 25 9933 #define BIT_MASK_QUEUEMACID_Q7_V1_8821C 0x7f 9934 #define BIT_QUEUEMACID_Q7_V1_8821C(x) \ 9935 (((x) & BIT_MASK_QUEUEMACID_Q7_V1_8821C) \ 9936 << BIT_SHIFT_QUEUEMACID_Q7_V1_8821C) 9937 #define BITS_QUEUEMACID_Q7_V1_8821C \ 9938 (BIT_MASK_QUEUEMACID_Q7_V1_8821C << BIT_SHIFT_QUEUEMACID_Q7_V1_8821C) 9939 #define BIT_CLEAR_QUEUEMACID_Q7_V1_8821C(x) \ 9940 ((x) & (~BITS_QUEUEMACID_Q7_V1_8821C)) 9941 #define BIT_GET_QUEUEMACID_Q7_V1_8821C(x) \ 9942 (((x) >> BIT_SHIFT_QUEUEMACID_Q7_V1_8821C) & \ 9943 BIT_MASK_QUEUEMACID_Q7_V1_8821C) 9944 #define BIT_SET_QUEUEMACID_Q7_V1_8821C(x, v) \ 9945 (BIT_CLEAR_QUEUEMACID_Q7_V1_8821C(x) | BIT_QUEUEMACID_Q7_V1_8821C(v)) 9946 9947 #define BIT_SHIFT_QUEUEAC_Q7_V1_8821C 23 9948 #define BIT_MASK_QUEUEAC_Q7_V1_8821C 0x3 9949 #define BIT_QUEUEAC_Q7_V1_8821C(x) \ 9950 (((x) & BIT_MASK_QUEUEAC_Q7_V1_8821C) << BIT_SHIFT_QUEUEAC_Q7_V1_8821C) 9951 #define BITS_QUEUEAC_Q7_V1_8821C \ 9952 (BIT_MASK_QUEUEAC_Q7_V1_8821C << BIT_SHIFT_QUEUEAC_Q7_V1_8821C) 9953 #define BIT_CLEAR_QUEUEAC_Q7_V1_8821C(x) ((x) & (~BITS_QUEUEAC_Q7_V1_8821C)) 9954 #define BIT_GET_QUEUEAC_Q7_V1_8821C(x) \ 9955 (((x) >> BIT_SHIFT_QUEUEAC_Q7_V1_8821C) & BIT_MASK_QUEUEAC_Q7_V1_8821C) 9956 #define BIT_SET_QUEUEAC_Q7_V1_8821C(x, v) \ 9957 (BIT_CLEAR_QUEUEAC_Q7_V1_8821C(x) | BIT_QUEUEAC_Q7_V1_8821C(v)) 9958 9959 #define BIT_TIDEMPTY_Q7_V1_8821C BIT(22) 9960 9961 #define BIT_SHIFT_TAIL_PKT_Q7_V2_8821C 11 9962 #define BIT_MASK_TAIL_PKT_Q7_V2_8821C 0x7ff 9963 #define BIT_TAIL_PKT_Q7_V2_8821C(x) \ 9964 (((x) & BIT_MASK_TAIL_PKT_Q7_V2_8821C) \ 9965 << BIT_SHIFT_TAIL_PKT_Q7_V2_8821C) 9966 #define BITS_TAIL_PKT_Q7_V2_8821C \ 9967 (BIT_MASK_TAIL_PKT_Q7_V2_8821C << BIT_SHIFT_TAIL_PKT_Q7_V2_8821C) 9968 #define BIT_CLEAR_TAIL_PKT_Q7_V2_8821C(x) ((x) & (~BITS_TAIL_PKT_Q7_V2_8821C)) 9969 #define BIT_GET_TAIL_PKT_Q7_V2_8821C(x) \ 9970 (((x) >> BIT_SHIFT_TAIL_PKT_Q7_V2_8821C) & \ 9971 BIT_MASK_TAIL_PKT_Q7_V2_8821C) 9972 #define BIT_SET_TAIL_PKT_Q7_V2_8821C(x, v) \ 9973 (BIT_CLEAR_TAIL_PKT_Q7_V2_8821C(x) | BIT_TAIL_PKT_Q7_V2_8821C(v)) 9974 9975 #define BIT_SHIFT_HEAD_PKT_Q7_V1_8821C 0 9976 #define BIT_MASK_HEAD_PKT_Q7_V1_8821C 0x7ff 9977 #define BIT_HEAD_PKT_Q7_V1_8821C(x) \ 9978 (((x) & BIT_MASK_HEAD_PKT_Q7_V1_8821C) \ 9979 << BIT_SHIFT_HEAD_PKT_Q7_V1_8821C) 9980 #define BITS_HEAD_PKT_Q7_V1_8821C \ 9981 (BIT_MASK_HEAD_PKT_Q7_V1_8821C << BIT_SHIFT_HEAD_PKT_Q7_V1_8821C) 9982 #define BIT_CLEAR_HEAD_PKT_Q7_V1_8821C(x) ((x) & (~BITS_HEAD_PKT_Q7_V1_8821C)) 9983 #define BIT_GET_HEAD_PKT_Q7_V1_8821C(x) \ 9984 (((x) >> BIT_SHIFT_HEAD_PKT_Q7_V1_8821C) & \ 9985 BIT_MASK_HEAD_PKT_Q7_V1_8821C) 9986 #define BIT_SET_HEAD_PKT_Q7_V1_8821C(x, v) \ 9987 (BIT_CLEAR_HEAD_PKT_Q7_V1_8821C(x) | BIT_HEAD_PKT_Q7_V1_8821C(v)) 9988 9989 /* 2 REG_WMAC_LBK_BUF_HD_V1_8821C */ 9990 9991 #define BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8821C 0 9992 #define BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8821C 0xfff 9993 #define BIT_WMAC_LBK_BUF_HEAD_V1_8821C(x) \ 9994 (((x) & BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8821C) \ 9995 << BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8821C) 9996 #define BITS_WMAC_LBK_BUF_HEAD_V1_8821C \ 9997 (BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8821C \ 9998 << BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8821C) 9999 #define BIT_CLEAR_WMAC_LBK_BUF_HEAD_V1_8821C(x) \ 10000 ((x) & (~BITS_WMAC_LBK_BUF_HEAD_V1_8821C)) 10001 #define BIT_GET_WMAC_LBK_BUF_HEAD_V1_8821C(x) \ 10002 (((x) >> BIT_SHIFT_WMAC_LBK_BUF_HEAD_V1_8821C) & \ 10003 BIT_MASK_WMAC_LBK_BUF_HEAD_V1_8821C) 10004 #define BIT_SET_WMAC_LBK_BUF_HEAD_V1_8821C(x, v) \ 10005 (BIT_CLEAR_WMAC_LBK_BUF_HEAD_V1_8821C(x) | \ 10006 BIT_WMAC_LBK_BUF_HEAD_V1_8821C(v)) 10007 10008 /* 2 REG_MGQ_BDNY_V1_8821C */ 10009 10010 #define BIT_SHIFT_MGQ_PGBNDY_V1_8821C 0 10011 #define BIT_MASK_MGQ_PGBNDY_V1_8821C 0xfff 10012 #define BIT_MGQ_PGBNDY_V1_8821C(x) \ 10013 (((x) & BIT_MASK_MGQ_PGBNDY_V1_8821C) << BIT_SHIFT_MGQ_PGBNDY_V1_8821C) 10014 #define BITS_MGQ_PGBNDY_V1_8821C \ 10015 (BIT_MASK_MGQ_PGBNDY_V1_8821C << BIT_SHIFT_MGQ_PGBNDY_V1_8821C) 10016 #define BIT_CLEAR_MGQ_PGBNDY_V1_8821C(x) ((x) & (~BITS_MGQ_PGBNDY_V1_8821C)) 10017 #define BIT_GET_MGQ_PGBNDY_V1_8821C(x) \ 10018 (((x) >> BIT_SHIFT_MGQ_PGBNDY_V1_8821C) & BIT_MASK_MGQ_PGBNDY_V1_8821C) 10019 #define BIT_SET_MGQ_PGBNDY_V1_8821C(x, v) \ 10020 (BIT_CLEAR_MGQ_PGBNDY_V1_8821C(x) | BIT_MGQ_PGBNDY_V1_8821C(v)) 10021 10022 /* 2 REG_TXRPT_CTRL_8821C */ 10023 10024 #define BIT_SHIFT_TRXRPT_TIMER_TH_8821C 24 10025 #define BIT_MASK_TRXRPT_TIMER_TH_8821C 0xff 10026 #define BIT_TRXRPT_TIMER_TH_8821C(x) \ 10027 (((x) & BIT_MASK_TRXRPT_TIMER_TH_8821C) \ 10028 << BIT_SHIFT_TRXRPT_TIMER_TH_8821C) 10029 #define BITS_TRXRPT_TIMER_TH_8821C \ 10030 (BIT_MASK_TRXRPT_TIMER_TH_8821C << BIT_SHIFT_TRXRPT_TIMER_TH_8821C) 10031 #define BIT_CLEAR_TRXRPT_TIMER_TH_8821C(x) ((x) & (~BITS_TRXRPT_TIMER_TH_8821C)) 10032 #define BIT_GET_TRXRPT_TIMER_TH_8821C(x) \ 10033 (((x) >> BIT_SHIFT_TRXRPT_TIMER_TH_8821C) & \ 10034 BIT_MASK_TRXRPT_TIMER_TH_8821C) 10035 #define BIT_SET_TRXRPT_TIMER_TH_8821C(x, v) \ 10036 (BIT_CLEAR_TRXRPT_TIMER_TH_8821C(x) | BIT_TRXRPT_TIMER_TH_8821C(v)) 10037 10038 #define BIT_SHIFT_TRXRPT_LEN_TH_8821C 16 10039 #define BIT_MASK_TRXRPT_LEN_TH_8821C 0xff 10040 #define BIT_TRXRPT_LEN_TH_8821C(x) \ 10041 (((x) & BIT_MASK_TRXRPT_LEN_TH_8821C) << BIT_SHIFT_TRXRPT_LEN_TH_8821C) 10042 #define BITS_TRXRPT_LEN_TH_8821C \ 10043 (BIT_MASK_TRXRPT_LEN_TH_8821C << BIT_SHIFT_TRXRPT_LEN_TH_8821C) 10044 #define BIT_CLEAR_TRXRPT_LEN_TH_8821C(x) ((x) & (~BITS_TRXRPT_LEN_TH_8821C)) 10045 #define BIT_GET_TRXRPT_LEN_TH_8821C(x) \ 10046 (((x) >> BIT_SHIFT_TRXRPT_LEN_TH_8821C) & BIT_MASK_TRXRPT_LEN_TH_8821C) 10047 #define BIT_SET_TRXRPT_LEN_TH_8821C(x, v) \ 10048 (BIT_CLEAR_TRXRPT_LEN_TH_8821C(x) | BIT_TRXRPT_LEN_TH_8821C(v)) 10049 10050 #define BIT_SHIFT_TRXRPT_READ_PTR_8821C 8 10051 #define BIT_MASK_TRXRPT_READ_PTR_8821C 0xff 10052 #define BIT_TRXRPT_READ_PTR_8821C(x) \ 10053 (((x) & BIT_MASK_TRXRPT_READ_PTR_8821C) \ 10054 << BIT_SHIFT_TRXRPT_READ_PTR_8821C) 10055 #define BITS_TRXRPT_READ_PTR_8821C \ 10056 (BIT_MASK_TRXRPT_READ_PTR_8821C << BIT_SHIFT_TRXRPT_READ_PTR_8821C) 10057 #define BIT_CLEAR_TRXRPT_READ_PTR_8821C(x) ((x) & (~BITS_TRXRPT_READ_PTR_8821C)) 10058 #define BIT_GET_TRXRPT_READ_PTR_8821C(x) \ 10059 (((x) >> BIT_SHIFT_TRXRPT_READ_PTR_8821C) & \ 10060 BIT_MASK_TRXRPT_READ_PTR_8821C) 10061 #define BIT_SET_TRXRPT_READ_PTR_8821C(x, v) \ 10062 (BIT_CLEAR_TRXRPT_READ_PTR_8821C(x) | BIT_TRXRPT_READ_PTR_8821C(v)) 10063 10064 #define BIT_SHIFT_TRXRPT_WRITE_PTR_8821C 0 10065 #define BIT_MASK_TRXRPT_WRITE_PTR_8821C 0xff 10066 #define BIT_TRXRPT_WRITE_PTR_8821C(x) \ 10067 (((x) & BIT_MASK_TRXRPT_WRITE_PTR_8821C) \ 10068 << BIT_SHIFT_TRXRPT_WRITE_PTR_8821C) 10069 #define BITS_TRXRPT_WRITE_PTR_8821C \ 10070 (BIT_MASK_TRXRPT_WRITE_PTR_8821C << BIT_SHIFT_TRXRPT_WRITE_PTR_8821C) 10071 #define BIT_CLEAR_TRXRPT_WRITE_PTR_8821C(x) \ 10072 ((x) & (~BITS_TRXRPT_WRITE_PTR_8821C)) 10073 #define BIT_GET_TRXRPT_WRITE_PTR_8821C(x) \ 10074 (((x) >> BIT_SHIFT_TRXRPT_WRITE_PTR_8821C) & \ 10075 BIT_MASK_TRXRPT_WRITE_PTR_8821C) 10076 #define BIT_SET_TRXRPT_WRITE_PTR_8821C(x, v) \ 10077 (BIT_CLEAR_TRXRPT_WRITE_PTR_8821C(x) | BIT_TRXRPT_WRITE_PTR_8821C(v)) 10078 10079 /* 2 REG_INIRTS_RATE_SEL_8821C */ 10080 #define BIT_LEAG_RTS_BW_DUP_8821C BIT(5) 10081 10082 /* 2 REG_BASIC_CFEND_RATE_8821C */ 10083 10084 #define BIT_SHIFT_BASIC_CFEND_RATE_8821C 0 10085 #define BIT_MASK_BASIC_CFEND_RATE_8821C 0x1f 10086 #define BIT_BASIC_CFEND_RATE_8821C(x) \ 10087 (((x) & BIT_MASK_BASIC_CFEND_RATE_8821C) \ 10088 << BIT_SHIFT_BASIC_CFEND_RATE_8821C) 10089 #define BITS_BASIC_CFEND_RATE_8821C \ 10090 (BIT_MASK_BASIC_CFEND_RATE_8821C << BIT_SHIFT_BASIC_CFEND_RATE_8821C) 10091 #define BIT_CLEAR_BASIC_CFEND_RATE_8821C(x) \ 10092 ((x) & (~BITS_BASIC_CFEND_RATE_8821C)) 10093 #define BIT_GET_BASIC_CFEND_RATE_8821C(x) \ 10094 (((x) >> BIT_SHIFT_BASIC_CFEND_RATE_8821C) & \ 10095 BIT_MASK_BASIC_CFEND_RATE_8821C) 10096 #define BIT_SET_BASIC_CFEND_RATE_8821C(x, v) \ 10097 (BIT_CLEAR_BASIC_CFEND_RATE_8821C(x) | BIT_BASIC_CFEND_RATE_8821C(v)) 10098 10099 /* 2 REG_STBC_CFEND_RATE_8821C */ 10100 10101 #define BIT_SHIFT_STBC_CFEND_RATE_8821C 0 10102 #define BIT_MASK_STBC_CFEND_RATE_8821C 0x1f 10103 #define BIT_STBC_CFEND_RATE_8821C(x) \ 10104 (((x) & BIT_MASK_STBC_CFEND_RATE_8821C) \ 10105 << BIT_SHIFT_STBC_CFEND_RATE_8821C) 10106 #define BITS_STBC_CFEND_RATE_8821C \ 10107 (BIT_MASK_STBC_CFEND_RATE_8821C << BIT_SHIFT_STBC_CFEND_RATE_8821C) 10108 #define BIT_CLEAR_STBC_CFEND_RATE_8821C(x) ((x) & (~BITS_STBC_CFEND_RATE_8821C)) 10109 #define BIT_GET_STBC_CFEND_RATE_8821C(x) \ 10110 (((x) >> BIT_SHIFT_STBC_CFEND_RATE_8821C) & \ 10111 BIT_MASK_STBC_CFEND_RATE_8821C) 10112 #define BIT_SET_STBC_CFEND_RATE_8821C(x, v) \ 10113 (BIT_CLEAR_STBC_CFEND_RATE_8821C(x) | BIT_STBC_CFEND_RATE_8821C(v)) 10114 10115 /* 2 REG_DATA_SC_8821C */ 10116 10117 #define BIT_SHIFT_TXSC_40M_8821C 4 10118 #define BIT_MASK_TXSC_40M_8821C 0xf 10119 #define BIT_TXSC_40M_8821C(x) \ 10120 (((x) & BIT_MASK_TXSC_40M_8821C) << BIT_SHIFT_TXSC_40M_8821C) 10121 #define BITS_TXSC_40M_8821C \ 10122 (BIT_MASK_TXSC_40M_8821C << BIT_SHIFT_TXSC_40M_8821C) 10123 #define BIT_CLEAR_TXSC_40M_8821C(x) ((x) & (~BITS_TXSC_40M_8821C)) 10124 #define BIT_GET_TXSC_40M_8821C(x) \ 10125 (((x) >> BIT_SHIFT_TXSC_40M_8821C) & BIT_MASK_TXSC_40M_8821C) 10126 #define BIT_SET_TXSC_40M_8821C(x, v) \ 10127 (BIT_CLEAR_TXSC_40M_8821C(x) | BIT_TXSC_40M_8821C(v)) 10128 10129 #define BIT_SHIFT_TXSC_20M_8821C 0 10130 #define BIT_MASK_TXSC_20M_8821C 0xf 10131 #define BIT_TXSC_20M_8821C(x) \ 10132 (((x) & BIT_MASK_TXSC_20M_8821C) << BIT_SHIFT_TXSC_20M_8821C) 10133 #define BITS_TXSC_20M_8821C \ 10134 (BIT_MASK_TXSC_20M_8821C << BIT_SHIFT_TXSC_20M_8821C) 10135 #define BIT_CLEAR_TXSC_20M_8821C(x) ((x) & (~BITS_TXSC_20M_8821C)) 10136 #define BIT_GET_TXSC_20M_8821C(x) \ 10137 (((x) >> BIT_SHIFT_TXSC_20M_8821C) & BIT_MASK_TXSC_20M_8821C) 10138 #define BIT_SET_TXSC_20M_8821C(x, v) \ 10139 (BIT_CLEAR_TXSC_20M_8821C(x) | BIT_TXSC_20M_8821C(v)) 10140 10141 /* 2 REG_MACID_SLEEP3_8821C */ 10142 10143 #define BIT_SHIFT_MACID127_96_PKTSLEEP_8821C 0 10144 #define BIT_MASK_MACID127_96_PKTSLEEP_8821C 0xffffffffL 10145 #define BIT_MACID127_96_PKTSLEEP_8821C(x) \ 10146 (((x) & BIT_MASK_MACID127_96_PKTSLEEP_8821C) \ 10147 << BIT_SHIFT_MACID127_96_PKTSLEEP_8821C) 10148 #define BITS_MACID127_96_PKTSLEEP_8821C \ 10149 (BIT_MASK_MACID127_96_PKTSLEEP_8821C \ 10150 << BIT_SHIFT_MACID127_96_PKTSLEEP_8821C) 10151 #define BIT_CLEAR_MACID127_96_PKTSLEEP_8821C(x) \ 10152 ((x) & (~BITS_MACID127_96_PKTSLEEP_8821C)) 10153 #define BIT_GET_MACID127_96_PKTSLEEP_8821C(x) \ 10154 (((x) >> BIT_SHIFT_MACID127_96_PKTSLEEP_8821C) & \ 10155 BIT_MASK_MACID127_96_PKTSLEEP_8821C) 10156 #define BIT_SET_MACID127_96_PKTSLEEP_8821C(x, v) \ 10157 (BIT_CLEAR_MACID127_96_PKTSLEEP_8821C(x) | \ 10158 BIT_MACID127_96_PKTSLEEP_8821C(v)) 10159 10160 /* 2 REG_MACID_SLEEP1_8821C */ 10161 10162 #define BIT_SHIFT_MACID63_32_PKTSLEEP_8821C 0 10163 #define BIT_MASK_MACID63_32_PKTSLEEP_8821C 0xffffffffL 10164 #define BIT_MACID63_32_PKTSLEEP_8821C(x) \ 10165 (((x) & BIT_MASK_MACID63_32_PKTSLEEP_8821C) \ 10166 << BIT_SHIFT_MACID63_32_PKTSLEEP_8821C) 10167 #define BITS_MACID63_32_PKTSLEEP_8821C \ 10168 (BIT_MASK_MACID63_32_PKTSLEEP_8821C \ 10169 << BIT_SHIFT_MACID63_32_PKTSLEEP_8821C) 10170 #define BIT_CLEAR_MACID63_32_PKTSLEEP_8821C(x) \ 10171 ((x) & (~BITS_MACID63_32_PKTSLEEP_8821C)) 10172 #define BIT_GET_MACID63_32_PKTSLEEP_8821C(x) \ 10173 (((x) >> BIT_SHIFT_MACID63_32_PKTSLEEP_8821C) & \ 10174 BIT_MASK_MACID63_32_PKTSLEEP_8821C) 10175 #define BIT_SET_MACID63_32_PKTSLEEP_8821C(x, v) \ 10176 (BIT_CLEAR_MACID63_32_PKTSLEEP_8821C(x) | \ 10177 BIT_MACID63_32_PKTSLEEP_8821C(v)) 10178 10179 /* 2 REG_ARFR2_V1_8821C */ 10180 10181 #define BIT_SHIFT_ARFRL2_8821C 0 10182 #define BIT_MASK_ARFRL2_8821C 0xffffffffL 10183 #define BIT_ARFRL2_8821C(x) \ 10184 (((x) & BIT_MASK_ARFRL2_8821C) << BIT_SHIFT_ARFRL2_8821C) 10185 #define BITS_ARFRL2_8821C (BIT_MASK_ARFRL2_8821C << BIT_SHIFT_ARFRL2_8821C) 10186 #define BIT_CLEAR_ARFRL2_8821C(x) ((x) & (~BITS_ARFRL2_8821C)) 10187 #define BIT_GET_ARFRL2_8821C(x) \ 10188 (((x) >> BIT_SHIFT_ARFRL2_8821C) & BIT_MASK_ARFRL2_8821C) 10189 #define BIT_SET_ARFRL2_8821C(x, v) \ 10190 (BIT_CLEAR_ARFRL2_8821C(x) | BIT_ARFRL2_8821C(v)) 10191 10192 /* 2 REG_ARFRH2_V1_8821C */ 10193 10194 #define BIT_SHIFT_ARFRH2_8821C 0 10195 #define BIT_MASK_ARFRH2_8821C 0xffffffffL 10196 #define BIT_ARFRH2_8821C(x) \ 10197 (((x) & BIT_MASK_ARFRH2_8821C) << BIT_SHIFT_ARFRH2_8821C) 10198 #define BITS_ARFRH2_8821C (BIT_MASK_ARFRH2_8821C << BIT_SHIFT_ARFRH2_8821C) 10199 #define BIT_CLEAR_ARFRH2_8821C(x) ((x) & (~BITS_ARFRH2_8821C)) 10200 #define BIT_GET_ARFRH2_8821C(x) \ 10201 (((x) >> BIT_SHIFT_ARFRH2_8821C) & BIT_MASK_ARFRH2_8821C) 10202 #define BIT_SET_ARFRH2_8821C(x, v) \ 10203 (BIT_CLEAR_ARFRH2_8821C(x) | BIT_ARFRH2_8821C(v)) 10204 10205 /* 2 REG_ARFR3_V1_8821C */ 10206 10207 #define BIT_SHIFT_ARFRL3_8821C 0 10208 #define BIT_MASK_ARFRL3_8821C 0xffffffffL 10209 #define BIT_ARFRL3_8821C(x) \ 10210 (((x) & BIT_MASK_ARFRL3_8821C) << BIT_SHIFT_ARFRL3_8821C) 10211 #define BITS_ARFRL3_8821C (BIT_MASK_ARFRL3_8821C << BIT_SHIFT_ARFRL3_8821C) 10212 #define BIT_CLEAR_ARFRL3_8821C(x) ((x) & (~BITS_ARFRL3_8821C)) 10213 #define BIT_GET_ARFRL3_8821C(x) \ 10214 (((x) >> BIT_SHIFT_ARFRL3_8821C) & BIT_MASK_ARFRL3_8821C) 10215 #define BIT_SET_ARFRL3_8821C(x, v) \ 10216 (BIT_CLEAR_ARFRL3_8821C(x) | BIT_ARFRL3_8821C(v)) 10217 10218 /* 2 REG_ARFRH3_V1_8821C */ 10219 10220 #define BIT_SHIFT_ARFRH3_8821C 0 10221 #define BIT_MASK_ARFRH3_8821C 0xffffffffL 10222 #define BIT_ARFRH3_8821C(x) \ 10223 (((x) & BIT_MASK_ARFRH3_8821C) << BIT_SHIFT_ARFRH3_8821C) 10224 #define BITS_ARFRH3_8821C (BIT_MASK_ARFRH3_8821C << BIT_SHIFT_ARFRH3_8821C) 10225 #define BIT_CLEAR_ARFRH3_8821C(x) ((x) & (~BITS_ARFRH3_8821C)) 10226 #define BIT_GET_ARFRH3_8821C(x) \ 10227 (((x) >> BIT_SHIFT_ARFRH3_8821C) & BIT_MASK_ARFRH3_8821C) 10228 #define BIT_SET_ARFRH3_8821C(x, v) \ 10229 (BIT_CLEAR_ARFRH3_8821C(x) | BIT_ARFRH3_8821C(v)) 10230 10231 /* 2 REG_ARFR4_8821C */ 10232 10233 #define BIT_SHIFT_ARFRL4_8821C 0 10234 #define BIT_MASK_ARFRL4_8821C 0xffffffffL 10235 #define BIT_ARFRL4_8821C(x) \ 10236 (((x) & BIT_MASK_ARFRL4_8821C) << BIT_SHIFT_ARFRL4_8821C) 10237 #define BITS_ARFRL4_8821C (BIT_MASK_ARFRL4_8821C << BIT_SHIFT_ARFRL4_8821C) 10238 #define BIT_CLEAR_ARFRL4_8821C(x) ((x) & (~BITS_ARFRL4_8821C)) 10239 #define BIT_GET_ARFRL4_8821C(x) \ 10240 (((x) >> BIT_SHIFT_ARFRL4_8821C) & BIT_MASK_ARFRL4_8821C) 10241 #define BIT_SET_ARFRL4_8821C(x, v) \ 10242 (BIT_CLEAR_ARFRL4_8821C(x) | BIT_ARFRL4_8821C(v)) 10243 10244 /* 2 REG_ARFRH4_8821C */ 10245 10246 #define BIT_SHIFT_ARFRH4_8821C 0 10247 #define BIT_MASK_ARFRH4_8821C 0xffffffffL 10248 #define BIT_ARFRH4_8821C(x) \ 10249 (((x) & BIT_MASK_ARFRH4_8821C) << BIT_SHIFT_ARFRH4_8821C) 10250 #define BITS_ARFRH4_8821C (BIT_MASK_ARFRH4_8821C << BIT_SHIFT_ARFRH4_8821C) 10251 #define BIT_CLEAR_ARFRH4_8821C(x) ((x) & (~BITS_ARFRH4_8821C)) 10252 #define BIT_GET_ARFRH4_8821C(x) \ 10253 (((x) >> BIT_SHIFT_ARFRH4_8821C) & BIT_MASK_ARFRH4_8821C) 10254 #define BIT_SET_ARFRH4_8821C(x, v) \ 10255 (BIT_CLEAR_ARFRH4_8821C(x) | BIT_ARFRH4_8821C(v)) 10256 10257 /* 2 REG_ARFR5_8821C */ 10258 10259 #define BIT_SHIFT_ARFRL5_8821C 0 10260 #define BIT_MASK_ARFRL5_8821C 0xffffffffL 10261 #define BIT_ARFRL5_8821C(x) \ 10262 (((x) & BIT_MASK_ARFRL5_8821C) << BIT_SHIFT_ARFRL5_8821C) 10263 #define BITS_ARFRL5_8821C (BIT_MASK_ARFRL5_8821C << BIT_SHIFT_ARFRL5_8821C) 10264 #define BIT_CLEAR_ARFRL5_8821C(x) ((x) & (~BITS_ARFRL5_8821C)) 10265 #define BIT_GET_ARFRL5_8821C(x) \ 10266 (((x) >> BIT_SHIFT_ARFRL5_8821C) & BIT_MASK_ARFRL5_8821C) 10267 #define BIT_SET_ARFRL5_8821C(x, v) \ 10268 (BIT_CLEAR_ARFRL5_8821C(x) | BIT_ARFRL5_8821C(v)) 10269 10270 /* 2 REG_ARFRH5_8821C */ 10271 10272 #define BIT_SHIFT_ARFRH5_8821C 0 10273 #define BIT_MASK_ARFRH5_8821C 0xffffffffL 10274 #define BIT_ARFRH5_8821C(x) \ 10275 (((x) & BIT_MASK_ARFRH5_8821C) << BIT_SHIFT_ARFRH5_8821C) 10276 #define BITS_ARFRH5_8821C (BIT_MASK_ARFRH5_8821C << BIT_SHIFT_ARFRH5_8821C) 10277 #define BIT_CLEAR_ARFRH5_8821C(x) ((x) & (~BITS_ARFRH5_8821C)) 10278 #define BIT_GET_ARFRH5_8821C(x) \ 10279 (((x) >> BIT_SHIFT_ARFRH5_8821C) & BIT_MASK_ARFRH5_8821C) 10280 #define BIT_SET_ARFRH5_8821C(x, v) \ 10281 (BIT_CLEAR_ARFRH5_8821C(x) | BIT_ARFRH5_8821C(v)) 10282 10283 /* 2 REG_TXRPT_START_OFFSET_8821C */ 10284 10285 #define BIT_SHIFT_R_MUTAB_TXRPT_OFFSET_8821C 24 10286 #define BIT_MASK_R_MUTAB_TXRPT_OFFSET_8821C 0xff 10287 #define BIT_R_MUTAB_TXRPT_OFFSET_8821C(x) \ 10288 (((x) & BIT_MASK_R_MUTAB_TXRPT_OFFSET_8821C) \ 10289 << BIT_SHIFT_R_MUTAB_TXRPT_OFFSET_8821C) 10290 #define BITS_R_MUTAB_TXRPT_OFFSET_8821C \ 10291 (BIT_MASK_R_MUTAB_TXRPT_OFFSET_8821C \ 10292 << BIT_SHIFT_R_MUTAB_TXRPT_OFFSET_8821C) 10293 #define BIT_CLEAR_R_MUTAB_TXRPT_OFFSET_8821C(x) \ 10294 ((x) & (~BITS_R_MUTAB_TXRPT_OFFSET_8821C)) 10295 #define BIT_GET_R_MUTAB_TXRPT_OFFSET_8821C(x) \ 10296 (((x) >> BIT_SHIFT_R_MUTAB_TXRPT_OFFSET_8821C) & \ 10297 BIT_MASK_R_MUTAB_TXRPT_OFFSET_8821C) 10298 #define BIT_SET_R_MUTAB_TXRPT_OFFSET_8821C(x, v) \ 10299 (BIT_CLEAR_R_MUTAB_TXRPT_OFFSET_8821C(x) | \ 10300 BIT_R_MUTAB_TXRPT_OFFSET_8821C(v)) 10301 10302 #define BIT__R_RPTFIFO_1K_8821C BIT(16) 10303 10304 #define BIT_SHIFT_MACID_CTRL_OFFSET_8821C 8 10305 #define BIT_MASK_MACID_CTRL_OFFSET_8821C 0xff 10306 #define BIT_MACID_CTRL_OFFSET_8821C(x) \ 10307 (((x) & BIT_MASK_MACID_CTRL_OFFSET_8821C) \ 10308 << BIT_SHIFT_MACID_CTRL_OFFSET_8821C) 10309 #define BITS_MACID_CTRL_OFFSET_8821C \ 10310 (BIT_MASK_MACID_CTRL_OFFSET_8821C << BIT_SHIFT_MACID_CTRL_OFFSET_8821C) 10311 #define BIT_CLEAR_MACID_CTRL_OFFSET_8821C(x) \ 10312 ((x) & (~BITS_MACID_CTRL_OFFSET_8821C)) 10313 #define BIT_GET_MACID_CTRL_OFFSET_8821C(x) \ 10314 (((x) >> BIT_SHIFT_MACID_CTRL_OFFSET_8821C) & \ 10315 BIT_MASK_MACID_CTRL_OFFSET_8821C) 10316 #define BIT_SET_MACID_CTRL_OFFSET_8821C(x, v) \ 10317 (BIT_CLEAR_MACID_CTRL_OFFSET_8821C(x) | BIT_MACID_CTRL_OFFSET_8821C(v)) 10318 10319 #define BIT_SHIFT_AMPDU_TXRPT_OFFSET_8821C 0 10320 #define BIT_MASK_AMPDU_TXRPT_OFFSET_8821C 0xff 10321 #define BIT_AMPDU_TXRPT_OFFSET_8821C(x) \ 10322 (((x) & BIT_MASK_AMPDU_TXRPT_OFFSET_8821C) \ 10323 << BIT_SHIFT_AMPDU_TXRPT_OFFSET_8821C) 10324 #define BITS_AMPDU_TXRPT_OFFSET_8821C \ 10325 (BIT_MASK_AMPDU_TXRPT_OFFSET_8821C \ 10326 << BIT_SHIFT_AMPDU_TXRPT_OFFSET_8821C) 10327 #define BIT_CLEAR_AMPDU_TXRPT_OFFSET_8821C(x) \ 10328 ((x) & (~BITS_AMPDU_TXRPT_OFFSET_8821C)) 10329 #define BIT_GET_AMPDU_TXRPT_OFFSET_8821C(x) \ 10330 (((x) >> BIT_SHIFT_AMPDU_TXRPT_OFFSET_8821C) & \ 10331 BIT_MASK_AMPDU_TXRPT_OFFSET_8821C) 10332 #define BIT_SET_AMPDU_TXRPT_OFFSET_8821C(x, v) \ 10333 (BIT_CLEAR_AMPDU_TXRPT_OFFSET_8821C(x) | \ 10334 BIT_AMPDU_TXRPT_OFFSET_8821C(v)) 10335 10336 /* 2 REG_POWER_STAGE1_8821C */ 10337 #define BIT_PTA_WL_PRI_MASK_CPU_MGQ_8821C BIT(31) 10338 #define BIT_PTA_WL_PRI_MASK_BCNQ_8821C BIT(30) 10339 #define BIT_PTA_WL_PRI_MASK_HIQ_8821C BIT(29) 10340 #define BIT_PTA_WL_PRI_MASK_MGQ_8821C BIT(28) 10341 #define BIT_PTA_WL_PRI_MASK_BK_8821C BIT(27) 10342 #define BIT_PTA_WL_PRI_MASK_BE_8821C BIT(26) 10343 #define BIT_PTA_WL_PRI_MASK_VI_8821C BIT(25) 10344 #define BIT_PTA_WL_PRI_MASK_VO_8821C BIT(24) 10345 10346 #define BIT_SHIFT_POWER_STAGE1_8821C 0 10347 #define BIT_MASK_POWER_STAGE1_8821C 0xffffff 10348 #define BIT_POWER_STAGE1_8821C(x) \ 10349 (((x) & BIT_MASK_POWER_STAGE1_8821C) << BIT_SHIFT_POWER_STAGE1_8821C) 10350 #define BITS_POWER_STAGE1_8821C \ 10351 (BIT_MASK_POWER_STAGE1_8821C << BIT_SHIFT_POWER_STAGE1_8821C) 10352 #define BIT_CLEAR_POWER_STAGE1_8821C(x) ((x) & (~BITS_POWER_STAGE1_8821C)) 10353 #define BIT_GET_POWER_STAGE1_8821C(x) \ 10354 (((x) >> BIT_SHIFT_POWER_STAGE1_8821C) & BIT_MASK_POWER_STAGE1_8821C) 10355 #define BIT_SET_POWER_STAGE1_8821C(x, v) \ 10356 (BIT_CLEAR_POWER_STAGE1_8821C(x) | BIT_POWER_STAGE1_8821C(v)) 10357 10358 /* 2 REG_POWER_STAGE2_8821C */ 10359 #define BIT__R_CTRL_PKT_POW_ADJ_8821C BIT(24) 10360 10361 #define BIT_SHIFT_POWER_STAGE2_8821C 0 10362 #define BIT_MASK_POWER_STAGE2_8821C 0xffffff 10363 #define BIT_POWER_STAGE2_8821C(x) \ 10364 (((x) & BIT_MASK_POWER_STAGE2_8821C) << BIT_SHIFT_POWER_STAGE2_8821C) 10365 #define BITS_POWER_STAGE2_8821C \ 10366 (BIT_MASK_POWER_STAGE2_8821C << BIT_SHIFT_POWER_STAGE2_8821C) 10367 #define BIT_CLEAR_POWER_STAGE2_8821C(x) ((x) & (~BITS_POWER_STAGE2_8821C)) 10368 #define BIT_GET_POWER_STAGE2_8821C(x) \ 10369 (((x) >> BIT_SHIFT_POWER_STAGE2_8821C) & BIT_MASK_POWER_STAGE2_8821C) 10370 #define BIT_SET_POWER_STAGE2_8821C(x, v) \ 10371 (BIT_CLEAR_POWER_STAGE2_8821C(x) | BIT_POWER_STAGE2_8821C(v)) 10372 10373 /* 2 REG_SW_AMPDU_BURST_MODE_CTRL_8821C */ 10374 10375 #define BIT_SHIFT_PAD_NUM_THRES_8821C 24 10376 #define BIT_MASK_PAD_NUM_THRES_8821C 0x3f 10377 #define BIT_PAD_NUM_THRES_8821C(x) \ 10378 (((x) & BIT_MASK_PAD_NUM_THRES_8821C) << BIT_SHIFT_PAD_NUM_THRES_8821C) 10379 #define BITS_PAD_NUM_THRES_8821C \ 10380 (BIT_MASK_PAD_NUM_THRES_8821C << BIT_SHIFT_PAD_NUM_THRES_8821C) 10381 #define BIT_CLEAR_PAD_NUM_THRES_8821C(x) ((x) & (~BITS_PAD_NUM_THRES_8821C)) 10382 #define BIT_GET_PAD_NUM_THRES_8821C(x) \ 10383 (((x) >> BIT_SHIFT_PAD_NUM_THRES_8821C) & BIT_MASK_PAD_NUM_THRES_8821C) 10384 #define BIT_SET_PAD_NUM_THRES_8821C(x, v) \ 10385 (BIT_CLEAR_PAD_NUM_THRES_8821C(x) | BIT_PAD_NUM_THRES_8821C(v)) 10386 10387 #define BIT_R_DMA_THIS_QUEUE_BK_8821C BIT(23) 10388 #define BIT_R_DMA_THIS_QUEUE_BE_8821C BIT(22) 10389 #define BIT_R_DMA_THIS_QUEUE_VI_8821C BIT(21) 10390 #define BIT_R_DMA_THIS_QUEUE_VO_8821C BIT(20) 10391 10392 #define BIT_SHIFT_R_TOTAL_LEN_TH_8821C 8 10393 #define BIT_MASK_R_TOTAL_LEN_TH_8821C 0xfff 10394 #define BIT_R_TOTAL_LEN_TH_8821C(x) \ 10395 (((x) & BIT_MASK_R_TOTAL_LEN_TH_8821C) \ 10396 << BIT_SHIFT_R_TOTAL_LEN_TH_8821C) 10397 #define BITS_R_TOTAL_LEN_TH_8821C \ 10398 (BIT_MASK_R_TOTAL_LEN_TH_8821C << BIT_SHIFT_R_TOTAL_LEN_TH_8821C) 10399 #define BIT_CLEAR_R_TOTAL_LEN_TH_8821C(x) ((x) & (~BITS_R_TOTAL_LEN_TH_8821C)) 10400 #define BIT_GET_R_TOTAL_LEN_TH_8821C(x) \ 10401 (((x) >> BIT_SHIFT_R_TOTAL_LEN_TH_8821C) & \ 10402 BIT_MASK_R_TOTAL_LEN_TH_8821C) 10403 #define BIT_SET_R_TOTAL_LEN_TH_8821C(x, v) \ 10404 (BIT_CLEAR_R_TOTAL_LEN_TH_8821C(x) | BIT_R_TOTAL_LEN_TH_8821C(v)) 10405 10406 #define BIT_EN_NEW_EARLY_8821C BIT(7) 10407 #define BIT_PRE_TX_CMD_8821C BIT(6) 10408 10409 #define BIT_SHIFT_NUM_SCL_EN_8821C 4 10410 #define BIT_MASK_NUM_SCL_EN_8821C 0x3 10411 #define BIT_NUM_SCL_EN_8821C(x) \ 10412 (((x) & BIT_MASK_NUM_SCL_EN_8821C) << BIT_SHIFT_NUM_SCL_EN_8821C) 10413 #define BITS_NUM_SCL_EN_8821C \ 10414 (BIT_MASK_NUM_SCL_EN_8821C << BIT_SHIFT_NUM_SCL_EN_8821C) 10415 #define BIT_CLEAR_NUM_SCL_EN_8821C(x) ((x) & (~BITS_NUM_SCL_EN_8821C)) 10416 #define BIT_GET_NUM_SCL_EN_8821C(x) \ 10417 (((x) >> BIT_SHIFT_NUM_SCL_EN_8821C) & BIT_MASK_NUM_SCL_EN_8821C) 10418 #define BIT_SET_NUM_SCL_EN_8821C(x, v) \ 10419 (BIT_CLEAR_NUM_SCL_EN_8821C(x) | BIT_NUM_SCL_EN_8821C(v)) 10420 10421 #define BIT_BK_EN_8821C BIT(3) 10422 #define BIT_BE_EN_8821C BIT(2) 10423 #define BIT_VI_EN_8821C BIT(1) 10424 #define BIT_VO_EN_8821C BIT(0) 10425 10426 /* 2 REG_PKT_LIFE_TIME_8821C */ 10427 10428 #define BIT_SHIFT_PKT_LIFTIME_BEBK_8821C 16 10429 #define BIT_MASK_PKT_LIFTIME_BEBK_8821C 0xffff 10430 #define BIT_PKT_LIFTIME_BEBK_8821C(x) \ 10431 (((x) & BIT_MASK_PKT_LIFTIME_BEBK_8821C) \ 10432 << BIT_SHIFT_PKT_LIFTIME_BEBK_8821C) 10433 #define BITS_PKT_LIFTIME_BEBK_8821C \ 10434 (BIT_MASK_PKT_LIFTIME_BEBK_8821C << BIT_SHIFT_PKT_LIFTIME_BEBK_8821C) 10435 #define BIT_CLEAR_PKT_LIFTIME_BEBK_8821C(x) \ 10436 ((x) & (~BITS_PKT_LIFTIME_BEBK_8821C)) 10437 #define BIT_GET_PKT_LIFTIME_BEBK_8821C(x) \ 10438 (((x) >> BIT_SHIFT_PKT_LIFTIME_BEBK_8821C) & \ 10439 BIT_MASK_PKT_LIFTIME_BEBK_8821C) 10440 #define BIT_SET_PKT_LIFTIME_BEBK_8821C(x, v) \ 10441 (BIT_CLEAR_PKT_LIFTIME_BEBK_8821C(x) | BIT_PKT_LIFTIME_BEBK_8821C(v)) 10442 10443 #define BIT_SHIFT_PKT_LIFTIME_VOVI_8821C 0 10444 #define BIT_MASK_PKT_LIFTIME_VOVI_8821C 0xffff 10445 #define BIT_PKT_LIFTIME_VOVI_8821C(x) \ 10446 (((x) & BIT_MASK_PKT_LIFTIME_VOVI_8821C) \ 10447 << BIT_SHIFT_PKT_LIFTIME_VOVI_8821C) 10448 #define BITS_PKT_LIFTIME_VOVI_8821C \ 10449 (BIT_MASK_PKT_LIFTIME_VOVI_8821C << BIT_SHIFT_PKT_LIFTIME_VOVI_8821C) 10450 #define BIT_CLEAR_PKT_LIFTIME_VOVI_8821C(x) \ 10451 ((x) & (~BITS_PKT_LIFTIME_VOVI_8821C)) 10452 #define BIT_GET_PKT_LIFTIME_VOVI_8821C(x) \ 10453 (((x) >> BIT_SHIFT_PKT_LIFTIME_VOVI_8821C) & \ 10454 BIT_MASK_PKT_LIFTIME_VOVI_8821C) 10455 #define BIT_SET_PKT_LIFTIME_VOVI_8821C(x, v) \ 10456 (BIT_CLEAR_PKT_LIFTIME_VOVI_8821C(x) | BIT_PKT_LIFTIME_VOVI_8821C(v)) 10457 10458 /* 2 REG_STBC_SETTING_8821C */ 10459 10460 #define BIT_SHIFT_CDEND_TXTIME_L_8821C 4 10461 #define BIT_MASK_CDEND_TXTIME_L_8821C 0xf 10462 #define BIT_CDEND_TXTIME_L_8821C(x) \ 10463 (((x) & BIT_MASK_CDEND_TXTIME_L_8821C) \ 10464 << BIT_SHIFT_CDEND_TXTIME_L_8821C) 10465 #define BITS_CDEND_TXTIME_L_8821C \ 10466 (BIT_MASK_CDEND_TXTIME_L_8821C << BIT_SHIFT_CDEND_TXTIME_L_8821C) 10467 #define BIT_CLEAR_CDEND_TXTIME_L_8821C(x) ((x) & (~BITS_CDEND_TXTIME_L_8821C)) 10468 #define BIT_GET_CDEND_TXTIME_L_8821C(x) \ 10469 (((x) >> BIT_SHIFT_CDEND_TXTIME_L_8821C) & \ 10470 BIT_MASK_CDEND_TXTIME_L_8821C) 10471 #define BIT_SET_CDEND_TXTIME_L_8821C(x, v) \ 10472 (BIT_CLEAR_CDEND_TXTIME_L_8821C(x) | BIT_CDEND_TXTIME_L_8821C(v)) 10473 10474 #define BIT_SHIFT_NESS_8821C 2 10475 #define BIT_MASK_NESS_8821C 0x3 10476 #define BIT_NESS_8821C(x) (((x) & BIT_MASK_NESS_8821C) << BIT_SHIFT_NESS_8821C) 10477 #define BITS_NESS_8821C (BIT_MASK_NESS_8821C << BIT_SHIFT_NESS_8821C) 10478 #define BIT_CLEAR_NESS_8821C(x) ((x) & (~BITS_NESS_8821C)) 10479 #define BIT_GET_NESS_8821C(x) \ 10480 (((x) >> BIT_SHIFT_NESS_8821C) & BIT_MASK_NESS_8821C) 10481 #define BIT_SET_NESS_8821C(x, v) (BIT_CLEAR_NESS_8821C(x) | BIT_NESS_8821C(v)) 10482 10483 #define BIT_SHIFT_STBC_CFEND_8821C 0 10484 #define BIT_MASK_STBC_CFEND_8821C 0x3 10485 #define BIT_STBC_CFEND_8821C(x) \ 10486 (((x) & BIT_MASK_STBC_CFEND_8821C) << BIT_SHIFT_STBC_CFEND_8821C) 10487 #define BITS_STBC_CFEND_8821C \ 10488 (BIT_MASK_STBC_CFEND_8821C << BIT_SHIFT_STBC_CFEND_8821C) 10489 #define BIT_CLEAR_STBC_CFEND_8821C(x) ((x) & (~BITS_STBC_CFEND_8821C)) 10490 #define BIT_GET_STBC_CFEND_8821C(x) \ 10491 (((x) >> BIT_SHIFT_STBC_CFEND_8821C) & BIT_MASK_STBC_CFEND_8821C) 10492 #define BIT_SET_STBC_CFEND_8821C(x, v) \ 10493 (BIT_CLEAR_STBC_CFEND_8821C(x) | BIT_STBC_CFEND_8821C(v)) 10494 10495 /* 2 REG_STBC_SETTING2_8821C */ 10496 10497 #define BIT_SHIFT_CDEND_TXTIME_H_8821C 0 10498 #define BIT_MASK_CDEND_TXTIME_H_8821C 0x1f 10499 #define BIT_CDEND_TXTIME_H_8821C(x) \ 10500 (((x) & BIT_MASK_CDEND_TXTIME_H_8821C) \ 10501 << BIT_SHIFT_CDEND_TXTIME_H_8821C) 10502 #define BITS_CDEND_TXTIME_H_8821C \ 10503 (BIT_MASK_CDEND_TXTIME_H_8821C << BIT_SHIFT_CDEND_TXTIME_H_8821C) 10504 #define BIT_CLEAR_CDEND_TXTIME_H_8821C(x) ((x) & (~BITS_CDEND_TXTIME_H_8821C)) 10505 #define BIT_GET_CDEND_TXTIME_H_8821C(x) \ 10506 (((x) >> BIT_SHIFT_CDEND_TXTIME_H_8821C) & \ 10507 BIT_MASK_CDEND_TXTIME_H_8821C) 10508 #define BIT_SET_CDEND_TXTIME_H_8821C(x, v) \ 10509 (BIT_CLEAR_CDEND_TXTIME_H_8821C(x) | BIT_CDEND_TXTIME_H_8821C(v)) 10510 10511 /* 2 REG_QUEUE_CTRL_8821C */ 10512 #define BIT_PTA_EDCCA_EN_8821C BIT(5) 10513 #define BIT_PTA_WL_TX_EN_8821C BIT(4) 10514 #define BIT_R_USE_DATA_BW_8821C BIT(3) 10515 #define BIT_TRI_PKT_INT_MODE1_8821C BIT(2) 10516 #define BIT_TRI_PKT_INT_MODE0_8821C BIT(1) 10517 #define BIT_ACQ_MODE_SEL_8821C BIT(0) 10518 10519 /* 2 REG_SINGLE_AMPDU_CTRL_8821C */ 10520 #define BIT_EN_SINGLE_APMDU_8821C BIT(7) 10521 10522 /* 2 REG_PROT_MODE_CTRL_8821C */ 10523 10524 #define BIT_SHIFT_RTS_MAX_AGG_NUM_8821C 24 10525 #define BIT_MASK_RTS_MAX_AGG_NUM_8821C 0x3f 10526 #define BIT_RTS_MAX_AGG_NUM_8821C(x) \ 10527 (((x) & BIT_MASK_RTS_MAX_AGG_NUM_8821C) \ 10528 << BIT_SHIFT_RTS_MAX_AGG_NUM_8821C) 10529 #define BITS_RTS_MAX_AGG_NUM_8821C \ 10530 (BIT_MASK_RTS_MAX_AGG_NUM_8821C << BIT_SHIFT_RTS_MAX_AGG_NUM_8821C) 10531 #define BIT_CLEAR_RTS_MAX_AGG_NUM_8821C(x) ((x) & (~BITS_RTS_MAX_AGG_NUM_8821C)) 10532 #define BIT_GET_RTS_MAX_AGG_NUM_8821C(x) \ 10533 (((x) >> BIT_SHIFT_RTS_MAX_AGG_NUM_8821C) & \ 10534 BIT_MASK_RTS_MAX_AGG_NUM_8821C) 10535 #define BIT_SET_RTS_MAX_AGG_NUM_8821C(x, v) \ 10536 (BIT_CLEAR_RTS_MAX_AGG_NUM_8821C(x) | BIT_RTS_MAX_AGG_NUM_8821C(v)) 10537 10538 #define BIT_SHIFT_MAX_AGG_NUM_8821C 16 10539 #define BIT_MASK_MAX_AGG_NUM_8821C 0x3f 10540 #define BIT_MAX_AGG_NUM_8821C(x) \ 10541 (((x) & BIT_MASK_MAX_AGG_NUM_8821C) << BIT_SHIFT_MAX_AGG_NUM_8821C) 10542 #define BITS_MAX_AGG_NUM_8821C \ 10543 (BIT_MASK_MAX_AGG_NUM_8821C << BIT_SHIFT_MAX_AGG_NUM_8821C) 10544 #define BIT_CLEAR_MAX_AGG_NUM_8821C(x) ((x) & (~BITS_MAX_AGG_NUM_8821C)) 10545 #define BIT_GET_MAX_AGG_NUM_8821C(x) \ 10546 (((x) >> BIT_SHIFT_MAX_AGG_NUM_8821C) & BIT_MASK_MAX_AGG_NUM_8821C) 10547 #define BIT_SET_MAX_AGG_NUM_8821C(x, v) \ 10548 (BIT_CLEAR_MAX_AGG_NUM_8821C(x) | BIT_MAX_AGG_NUM_8821C(v)) 10549 10550 #define BIT_SHIFT_RTS_TXTIME_TH_8821C 8 10551 #define BIT_MASK_RTS_TXTIME_TH_8821C 0xff 10552 #define BIT_RTS_TXTIME_TH_8821C(x) \ 10553 (((x) & BIT_MASK_RTS_TXTIME_TH_8821C) << BIT_SHIFT_RTS_TXTIME_TH_8821C) 10554 #define BITS_RTS_TXTIME_TH_8821C \ 10555 (BIT_MASK_RTS_TXTIME_TH_8821C << BIT_SHIFT_RTS_TXTIME_TH_8821C) 10556 #define BIT_CLEAR_RTS_TXTIME_TH_8821C(x) ((x) & (~BITS_RTS_TXTIME_TH_8821C)) 10557 #define BIT_GET_RTS_TXTIME_TH_8821C(x) \ 10558 (((x) >> BIT_SHIFT_RTS_TXTIME_TH_8821C) & BIT_MASK_RTS_TXTIME_TH_8821C) 10559 #define BIT_SET_RTS_TXTIME_TH_8821C(x, v) \ 10560 (BIT_CLEAR_RTS_TXTIME_TH_8821C(x) | BIT_RTS_TXTIME_TH_8821C(v)) 10561 10562 #define BIT_SHIFT_RTS_LEN_TH_8821C 0 10563 #define BIT_MASK_RTS_LEN_TH_8821C 0xff 10564 #define BIT_RTS_LEN_TH_8821C(x) \ 10565 (((x) & BIT_MASK_RTS_LEN_TH_8821C) << BIT_SHIFT_RTS_LEN_TH_8821C) 10566 #define BITS_RTS_LEN_TH_8821C \ 10567 (BIT_MASK_RTS_LEN_TH_8821C << BIT_SHIFT_RTS_LEN_TH_8821C) 10568 #define BIT_CLEAR_RTS_LEN_TH_8821C(x) ((x) & (~BITS_RTS_LEN_TH_8821C)) 10569 #define BIT_GET_RTS_LEN_TH_8821C(x) \ 10570 (((x) >> BIT_SHIFT_RTS_LEN_TH_8821C) & BIT_MASK_RTS_LEN_TH_8821C) 10571 #define BIT_SET_RTS_LEN_TH_8821C(x, v) \ 10572 (BIT_CLEAR_RTS_LEN_TH_8821C(x) | BIT_RTS_LEN_TH_8821C(v)) 10573 10574 /* 2 REG_BAR_MODE_CTRL_8821C */ 10575 10576 #define BIT_SHIFT_BAR_RTY_LMT_8821C 16 10577 #define BIT_MASK_BAR_RTY_LMT_8821C 0x3 10578 #define BIT_BAR_RTY_LMT_8821C(x) \ 10579 (((x) & BIT_MASK_BAR_RTY_LMT_8821C) << BIT_SHIFT_BAR_RTY_LMT_8821C) 10580 #define BITS_BAR_RTY_LMT_8821C \ 10581 (BIT_MASK_BAR_RTY_LMT_8821C << BIT_SHIFT_BAR_RTY_LMT_8821C) 10582 #define BIT_CLEAR_BAR_RTY_LMT_8821C(x) ((x) & (~BITS_BAR_RTY_LMT_8821C)) 10583 #define BIT_GET_BAR_RTY_LMT_8821C(x) \ 10584 (((x) >> BIT_SHIFT_BAR_RTY_LMT_8821C) & BIT_MASK_BAR_RTY_LMT_8821C) 10585 #define BIT_SET_BAR_RTY_LMT_8821C(x, v) \ 10586 (BIT_CLEAR_BAR_RTY_LMT_8821C(x) | BIT_BAR_RTY_LMT_8821C(v)) 10587 10588 #define BIT_SHIFT_BAR_PKT_TXTIME_TH_8821C 8 10589 #define BIT_MASK_BAR_PKT_TXTIME_TH_8821C 0xff 10590 #define BIT_BAR_PKT_TXTIME_TH_8821C(x) \ 10591 (((x) & BIT_MASK_BAR_PKT_TXTIME_TH_8821C) \ 10592 << BIT_SHIFT_BAR_PKT_TXTIME_TH_8821C) 10593 #define BITS_BAR_PKT_TXTIME_TH_8821C \ 10594 (BIT_MASK_BAR_PKT_TXTIME_TH_8821C << BIT_SHIFT_BAR_PKT_TXTIME_TH_8821C) 10595 #define BIT_CLEAR_BAR_PKT_TXTIME_TH_8821C(x) \ 10596 ((x) & (~BITS_BAR_PKT_TXTIME_TH_8821C)) 10597 #define BIT_GET_BAR_PKT_TXTIME_TH_8821C(x) \ 10598 (((x) >> BIT_SHIFT_BAR_PKT_TXTIME_TH_8821C) & \ 10599 BIT_MASK_BAR_PKT_TXTIME_TH_8821C) 10600 #define BIT_SET_BAR_PKT_TXTIME_TH_8821C(x, v) \ 10601 (BIT_CLEAR_BAR_PKT_TXTIME_TH_8821C(x) | BIT_BAR_PKT_TXTIME_TH_8821C(v)) 10602 10603 #define BIT_BAR_EN_V1_8821C BIT(6) 10604 10605 #define BIT_SHIFT_BAR_PKTNUM_TH_V1_8821C 0 10606 #define BIT_MASK_BAR_PKTNUM_TH_V1_8821C 0x3f 10607 #define BIT_BAR_PKTNUM_TH_V1_8821C(x) \ 10608 (((x) & BIT_MASK_BAR_PKTNUM_TH_V1_8821C) \ 10609 << BIT_SHIFT_BAR_PKTNUM_TH_V1_8821C) 10610 #define BITS_BAR_PKTNUM_TH_V1_8821C \ 10611 (BIT_MASK_BAR_PKTNUM_TH_V1_8821C << BIT_SHIFT_BAR_PKTNUM_TH_V1_8821C) 10612 #define BIT_CLEAR_BAR_PKTNUM_TH_V1_8821C(x) \ 10613 ((x) & (~BITS_BAR_PKTNUM_TH_V1_8821C)) 10614 #define BIT_GET_BAR_PKTNUM_TH_V1_8821C(x) \ 10615 (((x) >> BIT_SHIFT_BAR_PKTNUM_TH_V1_8821C) & \ 10616 BIT_MASK_BAR_PKTNUM_TH_V1_8821C) 10617 #define BIT_SET_BAR_PKTNUM_TH_V1_8821C(x, v) \ 10618 (BIT_CLEAR_BAR_PKTNUM_TH_V1_8821C(x) | BIT_BAR_PKTNUM_TH_V1_8821C(v)) 10619 10620 /* 2 REG_RA_TRY_RATE_AGG_LMT_8821C */ 10621 10622 #define BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8821C 0 10623 #define BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8821C 0x3f 10624 #define BIT_RA_TRY_RATE_AGG_LMT_V1_8821C(x) \ 10625 (((x) & BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8821C) \ 10626 << BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8821C) 10627 #define BITS_RA_TRY_RATE_AGG_LMT_V1_8821C \ 10628 (BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8821C \ 10629 << BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8821C) 10630 #define BIT_CLEAR_RA_TRY_RATE_AGG_LMT_V1_8821C(x) \ 10631 ((x) & (~BITS_RA_TRY_RATE_AGG_LMT_V1_8821C)) 10632 #define BIT_GET_RA_TRY_RATE_AGG_LMT_V1_8821C(x) \ 10633 (((x) >> BIT_SHIFT_RA_TRY_RATE_AGG_LMT_V1_8821C) & \ 10634 BIT_MASK_RA_TRY_RATE_AGG_LMT_V1_8821C) 10635 #define BIT_SET_RA_TRY_RATE_AGG_LMT_V1_8821C(x, v) \ 10636 (BIT_CLEAR_RA_TRY_RATE_AGG_LMT_V1_8821C(x) | \ 10637 BIT_RA_TRY_RATE_AGG_LMT_V1_8821C(v)) 10638 10639 /* 2 REG_MACID_SLEEP2_8821C */ 10640 10641 #define BIT_SHIFT_MACID95_64PKTSLEEP_8821C 0 10642 #define BIT_MASK_MACID95_64PKTSLEEP_8821C 0xffffffffL 10643 #define BIT_MACID95_64PKTSLEEP_8821C(x) \ 10644 (((x) & BIT_MASK_MACID95_64PKTSLEEP_8821C) \ 10645 << BIT_SHIFT_MACID95_64PKTSLEEP_8821C) 10646 #define BITS_MACID95_64PKTSLEEP_8821C \ 10647 (BIT_MASK_MACID95_64PKTSLEEP_8821C \ 10648 << BIT_SHIFT_MACID95_64PKTSLEEP_8821C) 10649 #define BIT_CLEAR_MACID95_64PKTSLEEP_8821C(x) \ 10650 ((x) & (~BITS_MACID95_64PKTSLEEP_8821C)) 10651 #define BIT_GET_MACID95_64PKTSLEEP_8821C(x) \ 10652 (((x) >> BIT_SHIFT_MACID95_64PKTSLEEP_8821C) & \ 10653 BIT_MASK_MACID95_64PKTSLEEP_8821C) 10654 #define BIT_SET_MACID95_64PKTSLEEP_8821C(x, v) \ 10655 (BIT_CLEAR_MACID95_64PKTSLEEP_8821C(x) | \ 10656 BIT_MACID95_64PKTSLEEP_8821C(v)) 10657 10658 /* 2 REG_MACID_SLEEP_8821C */ 10659 10660 #define BIT_SHIFT_MACID31_0_PKTSLEEP_8821C 0 10661 #define BIT_MASK_MACID31_0_PKTSLEEP_8821C 0xffffffffL 10662 #define BIT_MACID31_0_PKTSLEEP_8821C(x) \ 10663 (((x) & BIT_MASK_MACID31_0_PKTSLEEP_8821C) \ 10664 << BIT_SHIFT_MACID31_0_PKTSLEEP_8821C) 10665 #define BITS_MACID31_0_PKTSLEEP_8821C \ 10666 (BIT_MASK_MACID31_0_PKTSLEEP_8821C \ 10667 << BIT_SHIFT_MACID31_0_PKTSLEEP_8821C) 10668 #define BIT_CLEAR_MACID31_0_PKTSLEEP_8821C(x) \ 10669 ((x) & (~BITS_MACID31_0_PKTSLEEP_8821C)) 10670 #define BIT_GET_MACID31_0_PKTSLEEP_8821C(x) \ 10671 (((x) >> BIT_SHIFT_MACID31_0_PKTSLEEP_8821C) & \ 10672 BIT_MASK_MACID31_0_PKTSLEEP_8821C) 10673 #define BIT_SET_MACID31_0_PKTSLEEP_8821C(x, v) \ 10674 (BIT_CLEAR_MACID31_0_PKTSLEEP_8821C(x) | \ 10675 BIT_MACID31_0_PKTSLEEP_8821C(v)) 10676 10677 /* 2 REG_HW_SEQ0_8821C */ 10678 10679 #define BIT_SHIFT_HW_SSN_SEQ0_8821C 0 10680 #define BIT_MASK_HW_SSN_SEQ0_8821C 0xfff 10681 #define BIT_HW_SSN_SEQ0_8821C(x) \ 10682 (((x) & BIT_MASK_HW_SSN_SEQ0_8821C) << BIT_SHIFT_HW_SSN_SEQ0_8821C) 10683 #define BITS_HW_SSN_SEQ0_8821C \ 10684 (BIT_MASK_HW_SSN_SEQ0_8821C << BIT_SHIFT_HW_SSN_SEQ0_8821C) 10685 #define BIT_CLEAR_HW_SSN_SEQ0_8821C(x) ((x) & (~BITS_HW_SSN_SEQ0_8821C)) 10686 #define BIT_GET_HW_SSN_SEQ0_8821C(x) \ 10687 (((x) >> BIT_SHIFT_HW_SSN_SEQ0_8821C) & BIT_MASK_HW_SSN_SEQ0_8821C) 10688 #define BIT_SET_HW_SSN_SEQ0_8821C(x, v) \ 10689 (BIT_CLEAR_HW_SSN_SEQ0_8821C(x) | BIT_HW_SSN_SEQ0_8821C(v)) 10690 10691 /* 2 REG_HW_SEQ1_8821C */ 10692 10693 #define BIT_SHIFT_HW_SSN_SEQ1_8821C 0 10694 #define BIT_MASK_HW_SSN_SEQ1_8821C 0xfff 10695 #define BIT_HW_SSN_SEQ1_8821C(x) \ 10696 (((x) & BIT_MASK_HW_SSN_SEQ1_8821C) << BIT_SHIFT_HW_SSN_SEQ1_8821C) 10697 #define BITS_HW_SSN_SEQ1_8821C \ 10698 (BIT_MASK_HW_SSN_SEQ1_8821C << BIT_SHIFT_HW_SSN_SEQ1_8821C) 10699 #define BIT_CLEAR_HW_SSN_SEQ1_8821C(x) ((x) & (~BITS_HW_SSN_SEQ1_8821C)) 10700 #define BIT_GET_HW_SSN_SEQ1_8821C(x) \ 10701 (((x) >> BIT_SHIFT_HW_SSN_SEQ1_8821C) & BIT_MASK_HW_SSN_SEQ1_8821C) 10702 #define BIT_SET_HW_SSN_SEQ1_8821C(x, v) \ 10703 (BIT_CLEAR_HW_SSN_SEQ1_8821C(x) | BIT_HW_SSN_SEQ1_8821C(v)) 10704 10705 /* 2 REG_HW_SEQ2_8821C */ 10706 10707 #define BIT_SHIFT_HW_SSN_SEQ2_8821C 0 10708 #define BIT_MASK_HW_SSN_SEQ2_8821C 0xfff 10709 #define BIT_HW_SSN_SEQ2_8821C(x) \ 10710 (((x) & BIT_MASK_HW_SSN_SEQ2_8821C) << BIT_SHIFT_HW_SSN_SEQ2_8821C) 10711 #define BITS_HW_SSN_SEQ2_8821C \ 10712 (BIT_MASK_HW_SSN_SEQ2_8821C << BIT_SHIFT_HW_SSN_SEQ2_8821C) 10713 #define BIT_CLEAR_HW_SSN_SEQ2_8821C(x) ((x) & (~BITS_HW_SSN_SEQ2_8821C)) 10714 #define BIT_GET_HW_SSN_SEQ2_8821C(x) \ 10715 (((x) >> BIT_SHIFT_HW_SSN_SEQ2_8821C) & BIT_MASK_HW_SSN_SEQ2_8821C) 10716 #define BIT_SET_HW_SSN_SEQ2_8821C(x, v) \ 10717 (BIT_CLEAR_HW_SSN_SEQ2_8821C(x) | BIT_HW_SSN_SEQ2_8821C(v)) 10718 10719 /* 2 REG_HW_SEQ3_8821C */ 10720 10721 #define BIT_SHIFT_CSI_HWSEQ_SEL_8821C 12 10722 #define BIT_MASK_CSI_HWSEQ_SEL_8821C 0x3 10723 #define BIT_CSI_HWSEQ_SEL_8821C(x) \ 10724 (((x) & BIT_MASK_CSI_HWSEQ_SEL_8821C) << BIT_SHIFT_CSI_HWSEQ_SEL_8821C) 10725 #define BITS_CSI_HWSEQ_SEL_8821C \ 10726 (BIT_MASK_CSI_HWSEQ_SEL_8821C << BIT_SHIFT_CSI_HWSEQ_SEL_8821C) 10727 #define BIT_CLEAR_CSI_HWSEQ_SEL_8821C(x) ((x) & (~BITS_CSI_HWSEQ_SEL_8821C)) 10728 #define BIT_GET_CSI_HWSEQ_SEL_8821C(x) \ 10729 (((x) >> BIT_SHIFT_CSI_HWSEQ_SEL_8821C) & BIT_MASK_CSI_HWSEQ_SEL_8821C) 10730 #define BIT_SET_CSI_HWSEQ_SEL_8821C(x, v) \ 10731 (BIT_CLEAR_CSI_HWSEQ_SEL_8821C(x) | BIT_CSI_HWSEQ_SEL_8821C(v)) 10732 10733 #define BIT_SHIFT_HW_SSN_SEQ3_8821C 0 10734 #define BIT_MASK_HW_SSN_SEQ3_8821C 0xfff 10735 #define BIT_HW_SSN_SEQ3_8821C(x) \ 10736 (((x) & BIT_MASK_HW_SSN_SEQ3_8821C) << BIT_SHIFT_HW_SSN_SEQ3_8821C) 10737 #define BITS_HW_SSN_SEQ3_8821C \ 10738 (BIT_MASK_HW_SSN_SEQ3_8821C << BIT_SHIFT_HW_SSN_SEQ3_8821C) 10739 #define BIT_CLEAR_HW_SSN_SEQ3_8821C(x) ((x) & (~BITS_HW_SSN_SEQ3_8821C)) 10740 #define BIT_GET_HW_SSN_SEQ3_8821C(x) \ 10741 (((x) >> BIT_SHIFT_HW_SSN_SEQ3_8821C) & BIT_MASK_HW_SSN_SEQ3_8821C) 10742 #define BIT_SET_HW_SSN_SEQ3_8821C(x, v) \ 10743 (BIT_CLEAR_HW_SSN_SEQ3_8821C(x) | BIT_HW_SSN_SEQ3_8821C(v)) 10744 10745 /* 2 REG_NULL_PKT_STATUS_V1_8821C */ 10746 10747 #define BIT_SHIFT_PTCL_TOTAL_PG_V2_8821C 2 10748 #define BIT_MASK_PTCL_TOTAL_PG_V2_8821C 0x3fff 10749 #define BIT_PTCL_TOTAL_PG_V2_8821C(x) \ 10750 (((x) & BIT_MASK_PTCL_TOTAL_PG_V2_8821C) \ 10751 << BIT_SHIFT_PTCL_TOTAL_PG_V2_8821C) 10752 #define BITS_PTCL_TOTAL_PG_V2_8821C \ 10753 (BIT_MASK_PTCL_TOTAL_PG_V2_8821C << BIT_SHIFT_PTCL_TOTAL_PG_V2_8821C) 10754 #define BIT_CLEAR_PTCL_TOTAL_PG_V2_8821C(x) \ 10755 ((x) & (~BITS_PTCL_TOTAL_PG_V2_8821C)) 10756 #define BIT_GET_PTCL_TOTAL_PG_V2_8821C(x) \ 10757 (((x) >> BIT_SHIFT_PTCL_TOTAL_PG_V2_8821C) & \ 10758 BIT_MASK_PTCL_TOTAL_PG_V2_8821C) 10759 #define BIT_SET_PTCL_TOTAL_PG_V2_8821C(x, v) \ 10760 (BIT_CLEAR_PTCL_TOTAL_PG_V2_8821C(x) | BIT_PTCL_TOTAL_PG_V2_8821C(v)) 10761 10762 #define BIT_TX_NULL_1_8821C BIT(1) 10763 #define BIT_TX_NULL_0_8821C BIT(0) 10764 10765 /* 2 REG_PTCL_ERR_STATUS_8821C */ 10766 #define BIT_PTCL_RATE_TABLE_INVALID_8821C BIT(7) 10767 #define BIT_FTM_T2R_ERROR_8821C BIT(6) 10768 #define BIT_PTCL_ERR0_8821C BIT(5) 10769 #define BIT_PTCL_ERR1_8821C BIT(4) 10770 #define BIT_PTCL_ERR2_8821C BIT(3) 10771 #define BIT_PTCL_ERR3_8821C BIT(2) 10772 #define BIT_PTCL_ERR4_8821C BIT(1) 10773 #define BIT_PTCL_ERR5_8821C BIT(0) 10774 10775 /* 2 REG_NULL_PKT_STATUS_EXTEND_8821C */ 10776 #define BIT_CLI3_TX_NULL_1_8821C BIT(7) 10777 #define BIT_CLI3_TX_NULL_0_8821C BIT(6) 10778 #define BIT_CLI2_TX_NULL_1_8821C BIT(5) 10779 #define BIT_CLI2_TX_NULL_0_8821C BIT(4) 10780 #define BIT_CLI1_TX_NULL_1_8821C BIT(3) 10781 #define BIT_CLI1_TX_NULL_0_8821C BIT(2) 10782 #define BIT_CLI0_TX_NULL_1_8821C BIT(1) 10783 #define BIT_CLI0_TX_NULL_0_8821C BIT(0) 10784 10785 /* 2 REG_VIDEO_ENHANCEMENT_FUN_8821C */ 10786 #define BIT_HIQ_DROP_8821C BIT(7) 10787 #define BIT_MGQ_DROP_8821C BIT(6) 10788 #define BIT_VIDEO_JUST_DROP_8821C BIT(1) 10789 #define BIT_VIDEO_ENHANCEMENT_FUN_EN_8821C BIT(0) 10790 10791 /* 2 REG_PRECNT_CTRL_8821C */ 10792 #define BIT_EN_PRECNT_8821C BIT(11) 10793 10794 #define BIT_SHIFT_PRECNT_TH_8821C 0 10795 #define BIT_MASK_PRECNT_TH_8821C 0x7ff 10796 #define BIT_PRECNT_TH_8821C(x) \ 10797 (((x) & BIT_MASK_PRECNT_TH_8821C) << BIT_SHIFT_PRECNT_TH_8821C) 10798 #define BITS_PRECNT_TH_8821C \ 10799 (BIT_MASK_PRECNT_TH_8821C << BIT_SHIFT_PRECNT_TH_8821C) 10800 #define BIT_CLEAR_PRECNT_TH_8821C(x) ((x) & (~BITS_PRECNT_TH_8821C)) 10801 #define BIT_GET_PRECNT_TH_8821C(x) \ 10802 (((x) >> BIT_SHIFT_PRECNT_TH_8821C) & BIT_MASK_PRECNT_TH_8821C) 10803 #define BIT_SET_PRECNT_TH_8821C(x, v) \ 10804 (BIT_CLEAR_PRECNT_TH_8821C(x) | BIT_PRECNT_TH_8821C(v)) 10805 10806 /* 2 REG_NOT_VALID_8821C */ 10807 10808 /* 2 REG_BT_POLLUTE_PKT_CNT_8821C */ 10809 10810 #define BIT_SHIFT_BT_POLLUTE_PKT_CNT_8821C 0 10811 #define BIT_MASK_BT_POLLUTE_PKT_CNT_8821C 0xffff 10812 #define BIT_BT_POLLUTE_PKT_CNT_8821C(x) \ 10813 (((x) & BIT_MASK_BT_POLLUTE_PKT_CNT_8821C) \ 10814 << BIT_SHIFT_BT_POLLUTE_PKT_CNT_8821C) 10815 #define BITS_BT_POLLUTE_PKT_CNT_8821C \ 10816 (BIT_MASK_BT_POLLUTE_PKT_CNT_8821C \ 10817 << BIT_SHIFT_BT_POLLUTE_PKT_CNT_8821C) 10818 #define BIT_CLEAR_BT_POLLUTE_PKT_CNT_8821C(x) \ 10819 ((x) & (~BITS_BT_POLLUTE_PKT_CNT_8821C)) 10820 #define BIT_GET_BT_POLLUTE_PKT_CNT_8821C(x) \ 10821 (((x) >> BIT_SHIFT_BT_POLLUTE_PKT_CNT_8821C) & \ 10822 BIT_MASK_BT_POLLUTE_PKT_CNT_8821C) 10823 #define BIT_SET_BT_POLLUTE_PKT_CNT_8821C(x, v) \ 10824 (BIT_CLEAR_BT_POLLUTE_PKT_CNT_8821C(x) | \ 10825 BIT_BT_POLLUTE_PKT_CNT_8821C(v)) 10826 10827 /* 2 REG_NOT_VALID_8821C */ 10828 10829 /* 2 REG_PTCL_DBG_8821C */ 10830 10831 #define BIT_SHIFT_PTCL_DBG_8821C 0 10832 #define BIT_MASK_PTCL_DBG_8821C 0xffffffffL 10833 #define BIT_PTCL_DBG_8821C(x) \ 10834 (((x) & BIT_MASK_PTCL_DBG_8821C) << BIT_SHIFT_PTCL_DBG_8821C) 10835 #define BITS_PTCL_DBG_8821C \ 10836 (BIT_MASK_PTCL_DBG_8821C << BIT_SHIFT_PTCL_DBG_8821C) 10837 #define BIT_CLEAR_PTCL_DBG_8821C(x) ((x) & (~BITS_PTCL_DBG_8821C)) 10838 #define BIT_GET_PTCL_DBG_8821C(x) \ 10839 (((x) >> BIT_SHIFT_PTCL_DBG_8821C) & BIT_MASK_PTCL_DBG_8821C) 10840 #define BIT_SET_PTCL_DBG_8821C(x, v) \ 10841 (BIT_CLEAR_PTCL_DBG_8821C(x) | BIT_PTCL_DBG_8821C(v)) 10842 10843 /* 2 REG_NOT_VALID_8821C */ 10844 10845 /* 2 REG_CPUMGQ_TIMER_CTRL2_8821C */ 10846 10847 #define BIT_SHIFT_TRI_HEAD_ADDR_8821C 16 10848 #define BIT_MASK_TRI_HEAD_ADDR_8821C 0xfff 10849 #define BIT_TRI_HEAD_ADDR_8821C(x) \ 10850 (((x) & BIT_MASK_TRI_HEAD_ADDR_8821C) << BIT_SHIFT_TRI_HEAD_ADDR_8821C) 10851 #define BITS_TRI_HEAD_ADDR_8821C \ 10852 (BIT_MASK_TRI_HEAD_ADDR_8821C << BIT_SHIFT_TRI_HEAD_ADDR_8821C) 10853 #define BIT_CLEAR_TRI_HEAD_ADDR_8821C(x) ((x) & (~BITS_TRI_HEAD_ADDR_8821C)) 10854 #define BIT_GET_TRI_HEAD_ADDR_8821C(x) \ 10855 (((x) >> BIT_SHIFT_TRI_HEAD_ADDR_8821C) & BIT_MASK_TRI_HEAD_ADDR_8821C) 10856 #define BIT_SET_TRI_HEAD_ADDR_8821C(x, v) \ 10857 (BIT_CLEAR_TRI_HEAD_ADDR_8821C(x) | BIT_TRI_HEAD_ADDR_8821C(v)) 10858 10859 #define BIT_DROP_TH_EN_8821C BIT(8) 10860 10861 #define BIT_SHIFT_DROP_TH_8821C 0 10862 #define BIT_MASK_DROP_TH_8821C 0xff 10863 #define BIT_DROP_TH_8821C(x) \ 10864 (((x) & BIT_MASK_DROP_TH_8821C) << BIT_SHIFT_DROP_TH_8821C) 10865 #define BITS_DROP_TH_8821C (BIT_MASK_DROP_TH_8821C << BIT_SHIFT_DROP_TH_8821C) 10866 #define BIT_CLEAR_DROP_TH_8821C(x) ((x) & (~BITS_DROP_TH_8821C)) 10867 #define BIT_GET_DROP_TH_8821C(x) \ 10868 (((x) >> BIT_SHIFT_DROP_TH_8821C) & BIT_MASK_DROP_TH_8821C) 10869 #define BIT_SET_DROP_TH_8821C(x, v) \ 10870 (BIT_CLEAR_DROP_TH_8821C(x) | BIT_DROP_TH_8821C(v)) 10871 10872 /* 2 REG_NOT_VALID_8821C */ 10873 10874 /* 2 REG_DUMMY_PAGE4_V1_8821C */ 10875 10876 /* 2 REG_MOREDATA_8821C */ 10877 #define BIT_MOREDATA_CTRL2_EN_V1_8821C BIT(3) 10878 #define BIT_MOREDATA_CTRL1_EN_V1_8821C BIT(2) 10879 #define BIT_PKTIN_MOREDATA_REPLACE_ENABLE_V1_8821C BIT(0) 10880 10881 /* 2 REG_Q0_Q1_INFO_8821C */ 10882 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_8821C BIT(31) 10883 10884 #define BIT_SHIFT_GTAB_ID_8821C 28 10885 #define BIT_MASK_GTAB_ID_8821C 0x7 10886 #define BIT_GTAB_ID_8821C(x) \ 10887 (((x) & BIT_MASK_GTAB_ID_8821C) << BIT_SHIFT_GTAB_ID_8821C) 10888 #define BITS_GTAB_ID_8821C (BIT_MASK_GTAB_ID_8821C << BIT_SHIFT_GTAB_ID_8821C) 10889 #define BIT_CLEAR_GTAB_ID_8821C(x) ((x) & (~BITS_GTAB_ID_8821C)) 10890 #define BIT_GET_GTAB_ID_8821C(x) \ 10891 (((x) >> BIT_SHIFT_GTAB_ID_8821C) & BIT_MASK_GTAB_ID_8821C) 10892 #define BIT_SET_GTAB_ID_8821C(x, v) \ 10893 (BIT_CLEAR_GTAB_ID_8821C(x) | BIT_GTAB_ID_8821C(v)) 10894 10895 #define BIT_SHIFT_AC1_PKT_INFO_8821C 16 10896 #define BIT_MASK_AC1_PKT_INFO_8821C 0xfff 10897 #define BIT_AC1_PKT_INFO_8821C(x) \ 10898 (((x) & BIT_MASK_AC1_PKT_INFO_8821C) << BIT_SHIFT_AC1_PKT_INFO_8821C) 10899 #define BITS_AC1_PKT_INFO_8821C \ 10900 (BIT_MASK_AC1_PKT_INFO_8821C << BIT_SHIFT_AC1_PKT_INFO_8821C) 10901 #define BIT_CLEAR_AC1_PKT_INFO_8821C(x) ((x) & (~BITS_AC1_PKT_INFO_8821C)) 10902 #define BIT_GET_AC1_PKT_INFO_8821C(x) \ 10903 (((x) >> BIT_SHIFT_AC1_PKT_INFO_8821C) & BIT_MASK_AC1_PKT_INFO_8821C) 10904 #define BIT_SET_AC1_PKT_INFO_8821C(x, v) \ 10905 (BIT_CLEAR_AC1_PKT_INFO_8821C(x) | BIT_AC1_PKT_INFO_8821C(v)) 10906 10907 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8821C BIT(15) 10908 10909 #define BIT_SHIFT_GTAB_ID_V1_8821C 12 10910 #define BIT_MASK_GTAB_ID_V1_8821C 0x7 10911 #define BIT_GTAB_ID_V1_8821C(x) \ 10912 (((x) & BIT_MASK_GTAB_ID_V1_8821C) << BIT_SHIFT_GTAB_ID_V1_8821C) 10913 #define BITS_GTAB_ID_V1_8821C \ 10914 (BIT_MASK_GTAB_ID_V1_8821C << BIT_SHIFT_GTAB_ID_V1_8821C) 10915 #define BIT_CLEAR_GTAB_ID_V1_8821C(x) ((x) & (~BITS_GTAB_ID_V1_8821C)) 10916 #define BIT_GET_GTAB_ID_V1_8821C(x) \ 10917 (((x) >> BIT_SHIFT_GTAB_ID_V1_8821C) & BIT_MASK_GTAB_ID_V1_8821C) 10918 #define BIT_SET_GTAB_ID_V1_8821C(x, v) \ 10919 (BIT_CLEAR_GTAB_ID_V1_8821C(x) | BIT_GTAB_ID_V1_8821C(v)) 10920 10921 #define BIT_SHIFT_AC0_PKT_INFO_8821C 0 10922 #define BIT_MASK_AC0_PKT_INFO_8821C 0xfff 10923 #define BIT_AC0_PKT_INFO_8821C(x) \ 10924 (((x) & BIT_MASK_AC0_PKT_INFO_8821C) << BIT_SHIFT_AC0_PKT_INFO_8821C) 10925 #define BITS_AC0_PKT_INFO_8821C \ 10926 (BIT_MASK_AC0_PKT_INFO_8821C << BIT_SHIFT_AC0_PKT_INFO_8821C) 10927 #define BIT_CLEAR_AC0_PKT_INFO_8821C(x) ((x) & (~BITS_AC0_PKT_INFO_8821C)) 10928 #define BIT_GET_AC0_PKT_INFO_8821C(x) \ 10929 (((x) >> BIT_SHIFT_AC0_PKT_INFO_8821C) & BIT_MASK_AC0_PKT_INFO_8821C) 10930 #define BIT_SET_AC0_PKT_INFO_8821C(x, v) \ 10931 (BIT_CLEAR_AC0_PKT_INFO_8821C(x) | BIT_AC0_PKT_INFO_8821C(v)) 10932 10933 /* 2 REG_Q2_Q3_INFO_8821C */ 10934 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_8821C BIT(31) 10935 10936 #define BIT_SHIFT_GTAB_ID_8821C 28 10937 #define BIT_MASK_GTAB_ID_8821C 0x7 10938 #define BIT_GTAB_ID_8821C(x) \ 10939 (((x) & BIT_MASK_GTAB_ID_8821C) << BIT_SHIFT_GTAB_ID_8821C) 10940 #define BITS_GTAB_ID_8821C (BIT_MASK_GTAB_ID_8821C << BIT_SHIFT_GTAB_ID_8821C) 10941 #define BIT_CLEAR_GTAB_ID_8821C(x) ((x) & (~BITS_GTAB_ID_8821C)) 10942 #define BIT_GET_GTAB_ID_8821C(x) \ 10943 (((x) >> BIT_SHIFT_GTAB_ID_8821C) & BIT_MASK_GTAB_ID_8821C) 10944 #define BIT_SET_GTAB_ID_8821C(x, v) \ 10945 (BIT_CLEAR_GTAB_ID_8821C(x) | BIT_GTAB_ID_8821C(v)) 10946 10947 #define BIT_SHIFT_AC3_PKT_INFO_8821C 16 10948 #define BIT_MASK_AC3_PKT_INFO_8821C 0xfff 10949 #define BIT_AC3_PKT_INFO_8821C(x) \ 10950 (((x) & BIT_MASK_AC3_PKT_INFO_8821C) << BIT_SHIFT_AC3_PKT_INFO_8821C) 10951 #define BITS_AC3_PKT_INFO_8821C \ 10952 (BIT_MASK_AC3_PKT_INFO_8821C << BIT_SHIFT_AC3_PKT_INFO_8821C) 10953 #define BIT_CLEAR_AC3_PKT_INFO_8821C(x) ((x) & (~BITS_AC3_PKT_INFO_8821C)) 10954 #define BIT_GET_AC3_PKT_INFO_8821C(x) \ 10955 (((x) >> BIT_SHIFT_AC3_PKT_INFO_8821C) & BIT_MASK_AC3_PKT_INFO_8821C) 10956 #define BIT_SET_AC3_PKT_INFO_8821C(x, v) \ 10957 (BIT_CLEAR_AC3_PKT_INFO_8821C(x) | BIT_AC3_PKT_INFO_8821C(v)) 10958 10959 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8821C BIT(15) 10960 10961 #define BIT_SHIFT_GTAB_ID_V1_8821C 12 10962 #define BIT_MASK_GTAB_ID_V1_8821C 0x7 10963 #define BIT_GTAB_ID_V1_8821C(x) \ 10964 (((x) & BIT_MASK_GTAB_ID_V1_8821C) << BIT_SHIFT_GTAB_ID_V1_8821C) 10965 #define BITS_GTAB_ID_V1_8821C \ 10966 (BIT_MASK_GTAB_ID_V1_8821C << BIT_SHIFT_GTAB_ID_V1_8821C) 10967 #define BIT_CLEAR_GTAB_ID_V1_8821C(x) ((x) & (~BITS_GTAB_ID_V1_8821C)) 10968 #define BIT_GET_GTAB_ID_V1_8821C(x) \ 10969 (((x) >> BIT_SHIFT_GTAB_ID_V1_8821C) & BIT_MASK_GTAB_ID_V1_8821C) 10970 #define BIT_SET_GTAB_ID_V1_8821C(x, v) \ 10971 (BIT_CLEAR_GTAB_ID_V1_8821C(x) | BIT_GTAB_ID_V1_8821C(v)) 10972 10973 #define BIT_SHIFT_AC2_PKT_INFO_8821C 0 10974 #define BIT_MASK_AC2_PKT_INFO_8821C 0xfff 10975 #define BIT_AC2_PKT_INFO_8821C(x) \ 10976 (((x) & BIT_MASK_AC2_PKT_INFO_8821C) << BIT_SHIFT_AC2_PKT_INFO_8821C) 10977 #define BITS_AC2_PKT_INFO_8821C \ 10978 (BIT_MASK_AC2_PKT_INFO_8821C << BIT_SHIFT_AC2_PKT_INFO_8821C) 10979 #define BIT_CLEAR_AC2_PKT_INFO_8821C(x) ((x) & (~BITS_AC2_PKT_INFO_8821C)) 10980 #define BIT_GET_AC2_PKT_INFO_8821C(x) \ 10981 (((x) >> BIT_SHIFT_AC2_PKT_INFO_8821C) & BIT_MASK_AC2_PKT_INFO_8821C) 10982 #define BIT_SET_AC2_PKT_INFO_8821C(x, v) \ 10983 (BIT_CLEAR_AC2_PKT_INFO_8821C(x) | BIT_AC2_PKT_INFO_8821C(v)) 10984 10985 /* 2 REG_Q4_Q5_INFO_8821C */ 10986 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_8821C BIT(31) 10987 10988 #define BIT_SHIFT_GTAB_ID_8821C 28 10989 #define BIT_MASK_GTAB_ID_8821C 0x7 10990 #define BIT_GTAB_ID_8821C(x) \ 10991 (((x) & BIT_MASK_GTAB_ID_8821C) << BIT_SHIFT_GTAB_ID_8821C) 10992 #define BITS_GTAB_ID_8821C (BIT_MASK_GTAB_ID_8821C << BIT_SHIFT_GTAB_ID_8821C) 10993 #define BIT_CLEAR_GTAB_ID_8821C(x) ((x) & (~BITS_GTAB_ID_8821C)) 10994 #define BIT_GET_GTAB_ID_8821C(x) \ 10995 (((x) >> BIT_SHIFT_GTAB_ID_8821C) & BIT_MASK_GTAB_ID_8821C) 10996 #define BIT_SET_GTAB_ID_8821C(x, v) \ 10997 (BIT_CLEAR_GTAB_ID_8821C(x) | BIT_GTAB_ID_8821C(v)) 10998 10999 #define BIT_SHIFT_AC5_PKT_INFO_8821C 16 11000 #define BIT_MASK_AC5_PKT_INFO_8821C 0xfff 11001 #define BIT_AC5_PKT_INFO_8821C(x) \ 11002 (((x) & BIT_MASK_AC5_PKT_INFO_8821C) << BIT_SHIFT_AC5_PKT_INFO_8821C) 11003 #define BITS_AC5_PKT_INFO_8821C \ 11004 (BIT_MASK_AC5_PKT_INFO_8821C << BIT_SHIFT_AC5_PKT_INFO_8821C) 11005 #define BIT_CLEAR_AC5_PKT_INFO_8821C(x) ((x) & (~BITS_AC5_PKT_INFO_8821C)) 11006 #define BIT_GET_AC5_PKT_INFO_8821C(x) \ 11007 (((x) >> BIT_SHIFT_AC5_PKT_INFO_8821C) & BIT_MASK_AC5_PKT_INFO_8821C) 11008 #define BIT_SET_AC5_PKT_INFO_8821C(x, v) \ 11009 (BIT_CLEAR_AC5_PKT_INFO_8821C(x) | BIT_AC5_PKT_INFO_8821C(v)) 11010 11011 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8821C BIT(15) 11012 11013 #define BIT_SHIFT_GTAB_ID_V1_8821C 12 11014 #define BIT_MASK_GTAB_ID_V1_8821C 0x7 11015 #define BIT_GTAB_ID_V1_8821C(x) \ 11016 (((x) & BIT_MASK_GTAB_ID_V1_8821C) << BIT_SHIFT_GTAB_ID_V1_8821C) 11017 #define BITS_GTAB_ID_V1_8821C \ 11018 (BIT_MASK_GTAB_ID_V1_8821C << BIT_SHIFT_GTAB_ID_V1_8821C) 11019 #define BIT_CLEAR_GTAB_ID_V1_8821C(x) ((x) & (~BITS_GTAB_ID_V1_8821C)) 11020 #define BIT_GET_GTAB_ID_V1_8821C(x) \ 11021 (((x) >> BIT_SHIFT_GTAB_ID_V1_8821C) & BIT_MASK_GTAB_ID_V1_8821C) 11022 #define BIT_SET_GTAB_ID_V1_8821C(x, v) \ 11023 (BIT_CLEAR_GTAB_ID_V1_8821C(x) | BIT_GTAB_ID_V1_8821C(v)) 11024 11025 #define BIT_SHIFT_AC4_PKT_INFO_8821C 0 11026 #define BIT_MASK_AC4_PKT_INFO_8821C 0xfff 11027 #define BIT_AC4_PKT_INFO_8821C(x) \ 11028 (((x) & BIT_MASK_AC4_PKT_INFO_8821C) << BIT_SHIFT_AC4_PKT_INFO_8821C) 11029 #define BITS_AC4_PKT_INFO_8821C \ 11030 (BIT_MASK_AC4_PKT_INFO_8821C << BIT_SHIFT_AC4_PKT_INFO_8821C) 11031 #define BIT_CLEAR_AC4_PKT_INFO_8821C(x) ((x) & (~BITS_AC4_PKT_INFO_8821C)) 11032 #define BIT_GET_AC4_PKT_INFO_8821C(x) \ 11033 (((x) >> BIT_SHIFT_AC4_PKT_INFO_8821C) & BIT_MASK_AC4_PKT_INFO_8821C) 11034 #define BIT_SET_AC4_PKT_INFO_8821C(x, v) \ 11035 (BIT_CLEAR_AC4_PKT_INFO_8821C(x) | BIT_AC4_PKT_INFO_8821C(v)) 11036 11037 /* 2 REG_Q6_Q7_INFO_8821C */ 11038 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_8821C BIT(31) 11039 11040 #define BIT_SHIFT_GTAB_ID_8821C 28 11041 #define BIT_MASK_GTAB_ID_8821C 0x7 11042 #define BIT_GTAB_ID_8821C(x) \ 11043 (((x) & BIT_MASK_GTAB_ID_8821C) << BIT_SHIFT_GTAB_ID_8821C) 11044 #define BITS_GTAB_ID_8821C (BIT_MASK_GTAB_ID_8821C << BIT_SHIFT_GTAB_ID_8821C) 11045 #define BIT_CLEAR_GTAB_ID_8821C(x) ((x) & (~BITS_GTAB_ID_8821C)) 11046 #define BIT_GET_GTAB_ID_8821C(x) \ 11047 (((x) >> BIT_SHIFT_GTAB_ID_8821C) & BIT_MASK_GTAB_ID_8821C) 11048 #define BIT_SET_GTAB_ID_8821C(x, v) \ 11049 (BIT_CLEAR_GTAB_ID_8821C(x) | BIT_GTAB_ID_8821C(v)) 11050 11051 #define BIT_SHIFT_AC7_PKT_INFO_8821C 16 11052 #define BIT_MASK_AC7_PKT_INFO_8821C 0xfff 11053 #define BIT_AC7_PKT_INFO_8821C(x) \ 11054 (((x) & BIT_MASK_AC7_PKT_INFO_8821C) << BIT_SHIFT_AC7_PKT_INFO_8821C) 11055 #define BITS_AC7_PKT_INFO_8821C \ 11056 (BIT_MASK_AC7_PKT_INFO_8821C << BIT_SHIFT_AC7_PKT_INFO_8821C) 11057 #define BIT_CLEAR_AC7_PKT_INFO_8821C(x) ((x) & (~BITS_AC7_PKT_INFO_8821C)) 11058 #define BIT_GET_AC7_PKT_INFO_8821C(x) \ 11059 (((x) >> BIT_SHIFT_AC7_PKT_INFO_8821C) & BIT_MASK_AC7_PKT_INFO_8821C) 11060 #define BIT_SET_AC7_PKT_INFO_8821C(x, v) \ 11061 (BIT_CLEAR_AC7_PKT_INFO_8821C(x) | BIT_AC7_PKT_INFO_8821C(v)) 11062 11063 #define BIT_QUEUE_MACID_AC_NOT_THE_SAME_V1_8821C BIT(15) 11064 11065 #define BIT_SHIFT_GTAB_ID_V1_8821C 12 11066 #define BIT_MASK_GTAB_ID_V1_8821C 0x7 11067 #define BIT_GTAB_ID_V1_8821C(x) \ 11068 (((x) & BIT_MASK_GTAB_ID_V1_8821C) << BIT_SHIFT_GTAB_ID_V1_8821C) 11069 #define BITS_GTAB_ID_V1_8821C \ 11070 (BIT_MASK_GTAB_ID_V1_8821C << BIT_SHIFT_GTAB_ID_V1_8821C) 11071 #define BIT_CLEAR_GTAB_ID_V1_8821C(x) ((x) & (~BITS_GTAB_ID_V1_8821C)) 11072 #define BIT_GET_GTAB_ID_V1_8821C(x) \ 11073 (((x) >> BIT_SHIFT_GTAB_ID_V1_8821C) & BIT_MASK_GTAB_ID_V1_8821C) 11074 #define BIT_SET_GTAB_ID_V1_8821C(x, v) \ 11075 (BIT_CLEAR_GTAB_ID_V1_8821C(x) | BIT_GTAB_ID_V1_8821C(v)) 11076 11077 #define BIT_SHIFT_AC6_PKT_INFO_8821C 0 11078 #define BIT_MASK_AC6_PKT_INFO_8821C 0xfff 11079 #define BIT_AC6_PKT_INFO_8821C(x) \ 11080 (((x) & BIT_MASK_AC6_PKT_INFO_8821C) << BIT_SHIFT_AC6_PKT_INFO_8821C) 11081 #define BITS_AC6_PKT_INFO_8821C \ 11082 (BIT_MASK_AC6_PKT_INFO_8821C << BIT_SHIFT_AC6_PKT_INFO_8821C) 11083 #define BIT_CLEAR_AC6_PKT_INFO_8821C(x) ((x) & (~BITS_AC6_PKT_INFO_8821C)) 11084 #define BIT_GET_AC6_PKT_INFO_8821C(x) \ 11085 (((x) >> BIT_SHIFT_AC6_PKT_INFO_8821C) & BIT_MASK_AC6_PKT_INFO_8821C) 11086 #define BIT_SET_AC6_PKT_INFO_8821C(x, v) \ 11087 (BIT_CLEAR_AC6_PKT_INFO_8821C(x) | BIT_AC6_PKT_INFO_8821C(v)) 11088 11089 /* 2 REG_MGQ_HIQ_INFO_8821C */ 11090 11091 #define BIT_SHIFT_HIQ_PKT_INFO_8821C 16 11092 #define BIT_MASK_HIQ_PKT_INFO_8821C 0xfff 11093 #define BIT_HIQ_PKT_INFO_8821C(x) \ 11094 (((x) & BIT_MASK_HIQ_PKT_INFO_8821C) << BIT_SHIFT_HIQ_PKT_INFO_8821C) 11095 #define BITS_HIQ_PKT_INFO_8821C \ 11096 (BIT_MASK_HIQ_PKT_INFO_8821C << BIT_SHIFT_HIQ_PKT_INFO_8821C) 11097 #define BIT_CLEAR_HIQ_PKT_INFO_8821C(x) ((x) & (~BITS_HIQ_PKT_INFO_8821C)) 11098 #define BIT_GET_HIQ_PKT_INFO_8821C(x) \ 11099 (((x) >> BIT_SHIFT_HIQ_PKT_INFO_8821C) & BIT_MASK_HIQ_PKT_INFO_8821C) 11100 #define BIT_SET_HIQ_PKT_INFO_8821C(x, v) \ 11101 (BIT_CLEAR_HIQ_PKT_INFO_8821C(x) | BIT_HIQ_PKT_INFO_8821C(v)) 11102 11103 #define BIT_SHIFT_MGQ_PKT_INFO_8821C 0 11104 #define BIT_MASK_MGQ_PKT_INFO_8821C 0xfff 11105 #define BIT_MGQ_PKT_INFO_8821C(x) \ 11106 (((x) & BIT_MASK_MGQ_PKT_INFO_8821C) << BIT_SHIFT_MGQ_PKT_INFO_8821C) 11107 #define BITS_MGQ_PKT_INFO_8821C \ 11108 (BIT_MASK_MGQ_PKT_INFO_8821C << BIT_SHIFT_MGQ_PKT_INFO_8821C) 11109 #define BIT_CLEAR_MGQ_PKT_INFO_8821C(x) ((x) & (~BITS_MGQ_PKT_INFO_8821C)) 11110 #define BIT_GET_MGQ_PKT_INFO_8821C(x) \ 11111 (((x) >> BIT_SHIFT_MGQ_PKT_INFO_8821C) & BIT_MASK_MGQ_PKT_INFO_8821C) 11112 #define BIT_SET_MGQ_PKT_INFO_8821C(x, v) \ 11113 (BIT_CLEAR_MGQ_PKT_INFO_8821C(x) | BIT_MGQ_PKT_INFO_8821C(v)) 11114 11115 /* 2 REG_CMDQ_BCNQ_INFO_8821C */ 11116 11117 #define BIT_SHIFT_CMDQ_PKT_INFO_8821C 16 11118 #define BIT_MASK_CMDQ_PKT_INFO_8821C 0xfff 11119 #define BIT_CMDQ_PKT_INFO_8821C(x) \ 11120 (((x) & BIT_MASK_CMDQ_PKT_INFO_8821C) << BIT_SHIFT_CMDQ_PKT_INFO_8821C) 11121 #define BITS_CMDQ_PKT_INFO_8821C \ 11122 (BIT_MASK_CMDQ_PKT_INFO_8821C << BIT_SHIFT_CMDQ_PKT_INFO_8821C) 11123 #define BIT_CLEAR_CMDQ_PKT_INFO_8821C(x) ((x) & (~BITS_CMDQ_PKT_INFO_8821C)) 11124 #define BIT_GET_CMDQ_PKT_INFO_8821C(x) \ 11125 (((x) >> BIT_SHIFT_CMDQ_PKT_INFO_8821C) & BIT_MASK_CMDQ_PKT_INFO_8821C) 11126 #define BIT_SET_CMDQ_PKT_INFO_8821C(x, v) \ 11127 (BIT_CLEAR_CMDQ_PKT_INFO_8821C(x) | BIT_CMDQ_PKT_INFO_8821C(v)) 11128 11129 #define BIT_SHIFT_BCNQ_PKT_INFO_8821C 0 11130 #define BIT_MASK_BCNQ_PKT_INFO_8821C 0xfff 11131 #define BIT_BCNQ_PKT_INFO_8821C(x) \ 11132 (((x) & BIT_MASK_BCNQ_PKT_INFO_8821C) << BIT_SHIFT_BCNQ_PKT_INFO_8821C) 11133 #define BITS_BCNQ_PKT_INFO_8821C \ 11134 (BIT_MASK_BCNQ_PKT_INFO_8821C << BIT_SHIFT_BCNQ_PKT_INFO_8821C) 11135 #define BIT_CLEAR_BCNQ_PKT_INFO_8821C(x) ((x) & (~BITS_BCNQ_PKT_INFO_8821C)) 11136 #define BIT_GET_BCNQ_PKT_INFO_8821C(x) \ 11137 (((x) >> BIT_SHIFT_BCNQ_PKT_INFO_8821C) & BIT_MASK_BCNQ_PKT_INFO_8821C) 11138 #define BIT_SET_BCNQ_PKT_INFO_8821C(x, v) \ 11139 (BIT_CLEAR_BCNQ_PKT_INFO_8821C(x) | BIT_BCNQ_PKT_INFO_8821C(v)) 11140 11141 /* 2 REG_USEREG_SETTING_8821C */ 11142 #define BIT_NDPA_USEREG_8821C BIT(21) 11143 11144 #define BIT_SHIFT_RETRY_USEREG_8821C 19 11145 #define BIT_MASK_RETRY_USEREG_8821C 0x3 11146 #define BIT_RETRY_USEREG_8821C(x) \ 11147 (((x) & BIT_MASK_RETRY_USEREG_8821C) << BIT_SHIFT_RETRY_USEREG_8821C) 11148 #define BITS_RETRY_USEREG_8821C \ 11149 (BIT_MASK_RETRY_USEREG_8821C << BIT_SHIFT_RETRY_USEREG_8821C) 11150 #define BIT_CLEAR_RETRY_USEREG_8821C(x) ((x) & (~BITS_RETRY_USEREG_8821C)) 11151 #define BIT_GET_RETRY_USEREG_8821C(x) \ 11152 (((x) >> BIT_SHIFT_RETRY_USEREG_8821C) & BIT_MASK_RETRY_USEREG_8821C) 11153 #define BIT_SET_RETRY_USEREG_8821C(x, v) \ 11154 (BIT_CLEAR_RETRY_USEREG_8821C(x) | BIT_RETRY_USEREG_8821C(v)) 11155 11156 #define BIT_SHIFT_TRYPKT_USEREG_8821C 17 11157 #define BIT_MASK_TRYPKT_USEREG_8821C 0x3 11158 #define BIT_TRYPKT_USEREG_8821C(x) \ 11159 (((x) & BIT_MASK_TRYPKT_USEREG_8821C) << BIT_SHIFT_TRYPKT_USEREG_8821C) 11160 #define BITS_TRYPKT_USEREG_8821C \ 11161 (BIT_MASK_TRYPKT_USEREG_8821C << BIT_SHIFT_TRYPKT_USEREG_8821C) 11162 #define BIT_CLEAR_TRYPKT_USEREG_8821C(x) ((x) & (~BITS_TRYPKT_USEREG_8821C)) 11163 #define BIT_GET_TRYPKT_USEREG_8821C(x) \ 11164 (((x) >> BIT_SHIFT_TRYPKT_USEREG_8821C) & BIT_MASK_TRYPKT_USEREG_8821C) 11165 #define BIT_SET_TRYPKT_USEREG_8821C(x, v) \ 11166 (BIT_CLEAR_TRYPKT_USEREG_8821C(x) | BIT_TRYPKT_USEREG_8821C(v)) 11167 11168 #define BIT_CTLPKT_USEREG_8821C BIT(16) 11169 11170 /* 2 REG_AESIV_SETTING_8821C */ 11171 11172 #define BIT_SHIFT_AESIV_OFFSET_8821C 0 11173 #define BIT_MASK_AESIV_OFFSET_8821C 0xfff 11174 #define BIT_AESIV_OFFSET_8821C(x) \ 11175 (((x) & BIT_MASK_AESIV_OFFSET_8821C) << BIT_SHIFT_AESIV_OFFSET_8821C) 11176 #define BITS_AESIV_OFFSET_8821C \ 11177 (BIT_MASK_AESIV_OFFSET_8821C << BIT_SHIFT_AESIV_OFFSET_8821C) 11178 #define BIT_CLEAR_AESIV_OFFSET_8821C(x) ((x) & (~BITS_AESIV_OFFSET_8821C)) 11179 #define BIT_GET_AESIV_OFFSET_8821C(x) \ 11180 (((x) >> BIT_SHIFT_AESIV_OFFSET_8821C) & BIT_MASK_AESIV_OFFSET_8821C) 11181 #define BIT_SET_AESIV_OFFSET_8821C(x, v) \ 11182 (BIT_CLEAR_AESIV_OFFSET_8821C(x) | BIT_AESIV_OFFSET_8821C(v)) 11183 11184 /* 2 REG_BF0_TIME_SETTING_8821C */ 11185 #define BIT_BF0_TIMER_SET_8821C BIT(31) 11186 #define BIT_BF0_TIMER_CLR_8821C BIT(30) 11187 #define BIT_BF0_UPDATE_EN_8821C BIT(29) 11188 #define BIT_BF0_TIMER_EN_8821C BIT(28) 11189 11190 #define BIT_SHIFT_BF0_PRETIME_OVER_8821C 16 11191 #define BIT_MASK_BF0_PRETIME_OVER_8821C 0xfff 11192 #define BIT_BF0_PRETIME_OVER_8821C(x) \ 11193 (((x) & BIT_MASK_BF0_PRETIME_OVER_8821C) \ 11194 << BIT_SHIFT_BF0_PRETIME_OVER_8821C) 11195 #define BITS_BF0_PRETIME_OVER_8821C \ 11196 (BIT_MASK_BF0_PRETIME_OVER_8821C << BIT_SHIFT_BF0_PRETIME_OVER_8821C) 11197 #define BIT_CLEAR_BF0_PRETIME_OVER_8821C(x) \ 11198 ((x) & (~BITS_BF0_PRETIME_OVER_8821C)) 11199 #define BIT_GET_BF0_PRETIME_OVER_8821C(x) \ 11200 (((x) >> BIT_SHIFT_BF0_PRETIME_OVER_8821C) & \ 11201 BIT_MASK_BF0_PRETIME_OVER_8821C) 11202 #define BIT_SET_BF0_PRETIME_OVER_8821C(x, v) \ 11203 (BIT_CLEAR_BF0_PRETIME_OVER_8821C(x) | BIT_BF0_PRETIME_OVER_8821C(v)) 11204 11205 #define BIT_SHIFT_BF0_LIFETIME_8821C 0 11206 #define BIT_MASK_BF0_LIFETIME_8821C 0xffff 11207 #define BIT_BF0_LIFETIME_8821C(x) \ 11208 (((x) & BIT_MASK_BF0_LIFETIME_8821C) << BIT_SHIFT_BF0_LIFETIME_8821C) 11209 #define BITS_BF0_LIFETIME_8821C \ 11210 (BIT_MASK_BF0_LIFETIME_8821C << BIT_SHIFT_BF0_LIFETIME_8821C) 11211 #define BIT_CLEAR_BF0_LIFETIME_8821C(x) ((x) & (~BITS_BF0_LIFETIME_8821C)) 11212 #define BIT_GET_BF0_LIFETIME_8821C(x) \ 11213 (((x) >> BIT_SHIFT_BF0_LIFETIME_8821C) & BIT_MASK_BF0_LIFETIME_8821C) 11214 #define BIT_SET_BF0_LIFETIME_8821C(x, v) \ 11215 (BIT_CLEAR_BF0_LIFETIME_8821C(x) | BIT_BF0_LIFETIME_8821C(v)) 11216 11217 /* 2 REG_BF1_TIME_SETTING_8821C */ 11218 #define BIT_BF1_TIMER_SET_8821C BIT(31) 11219 #define BIT_BF1_TIMER_CLR_8821C BIT(30) 11220 #define BIT_BF1_UPDATE_EN_8821C BIT(29) 11221 #define BIT_BF1_TIMER_EN_8821C BIT(28) 11222 11223 #define BIT_SHIFT_BF1_PRETIME_OVER_8821C 16 11224 #define BIT_MASK_BF1_PRETIME_OVER_8821C 0xfff 11225 #define BIT_BF1_PRETIME_OVER_8821C(x) \ 11226 (((x) & BIT_MASK_BF1_PRETIME_OVER_8821C) \ 11227 << BIT_SHIFT_BF1_PRETIME_OVER_8821C) 11228 #define BITS_BF1_PRETIME_OVER_8821C \ 11229 (BIT_MASK_BF1_PRETIME_OVER_8821C << BIT_SHIFT_BF1_PRETIME_OVER_8821C) 11230 #define BIT_CLEAR_BF1_PRETIME_OVER_8821C(x) \ 11231 ((x) & (~BITS_BF1_PRETIME_OVER_8821C)) 11232 #define BIT_GET_BF1_PRETIME_OVER_8821C(x) \ 11233 (((x) >> BIT_SHIFT_BF1_PRETIME_OVER_8821C) & \ 11234 BIT_MASK_BF1_PRETIME_OVER_8821C) 11235 #define BIT_SET_BF1_PRETIME_OVER_8821C(x, v) \ 11236 (BIT_CLEAR_BF1_PRETIME_OVER_8821C(x) | BIT_BF1_PRETIME_OVER_8821C(v)) 11237 11238 #define BIT_SHIFT_BF1_LIFETIME_8821C 0 11239 #define BIT_MASK_BF1_LIFETIME_8821C 0xffff 11240 #define BIT_BF1_LIFETIME_8821C(x) \ 11241 (((x) & BIT_MASK_BF1_LIFETIME_8821C) << BIT_SHIFT_BF1_LIFETIME_8821C) 11242 #define BITS_BF1_LIFETIME_8821C \ 11243 (BIT_MASK_BF1_LIFETIME_8821C << BIT_SHIFT_BF1_LIFETIME_8821C) 11244 #define BIT_CLEAR_BF1_LIFETIME_8821C(x) ((x) & (~BITS_BF1_LIFETIME_8821C)) 11245 #define BIT_GET_BF1_LIFETIME_8821C(x) \ 11246 (((x) >> BIT_SHIFT_BF1_LIFETIME_8821C) & BIT_MASK_BF1_LIFETIME_8821C) 11247 #define BIT_SET_BF1_LIFETIME_8821C(x, v) \ 11248 (BIT_CLEAR_BF1_LIFETIME_8821C(x) | BIT_BF1_LIFETIME_8821C(v)) 11249 11250 /* 2 REG_BF_TIMEOUT_EN_8821C */ 11251 #define BIT_EN_VHT_LDPC_8821C BIT(9) 11252 #define BIT_EN_HT_LDPC_8821C BIT(8) 11253 #define BIT_BF1_TIMEOUT_EN_8821C BIT(1) 11254 #define BIT_BF0_TIMEOUT_EN_8821C BIT(0) 11255 11256 /* 2 REG_MACID_RELEASE0_8821C */ 11257 11258 #define BIT_SHIFT_MACID31_0_RELEASE_8821C 0 11259 #define BIT_MASK_MACID31_0_RELEASE_8821C 0xffffffffL 11260 #define BIT_MACID31_0_RELEASE_8821C(x) \ 11261 (((x) & BIT_MASK_MACID31_0_RELEASE_8821C) \ 11262 << BIT_SHIFT_MACID31_0_RELEASE_8821C) 11263 #define BITS_MACID31_0_RELEASE_8821C \ 11264 (BIT_MASK_MACID31_0_RELEASE_8821C << BIT_SHIFT_MACID31_0_RELEASE_8821C) 11265 #define BIT_CLEAR_MACID31_0_RELEASE_8821C(x) \ 11266 ((x) & (~BITS_MACID31_0_RELEASE_8821C)) 11267 #define BIT_GET_MACID31_0_RELEASE_8821C(x) \ 11268 (((x) >> BIT_SHIFT_MACID31_0_RELEASE_8821C) & \ 11269 BIT_MASK_MACID31_0_RELEASE_8821C) 11270 #define BIT_SET_MACID31_0_RELEASE_8821C(x, v) \ 11271 (BIT_CLEAR_MACID31_0_RELEASE_8821C(x) | BIT_MACID31_0_RELEASE_8821C(v)) 11272 11273 /* 2 REG_MACID_RELEASE1_8821C */ 11274 11275 #define BIT_SHIFT_MACID63_32_RELEASE_8821C 0 11276 #define BIT_MASK_MACID63_32_RELEASE_8821C 0xffffffffL 11277 #define BIT_MACID63_32_RELEASE_8821C(x) \ 11278 (((x) & BIT_MASK_MACID63_32_RELEASE_8821C) \ 11279 << BIT_SHIFT_MACID63_32_RELEASE_8821C) 11280 #define BITS_MACID63_32_RELEASE_8821C \ 11281 (BIT_MASK_MACID63_32_RELEASE_8821C \ 11282 << BIT_SHIFT_MACID63_32_RELEASE_8821C) 11283 #define BIT_CLEAR_MACID63_32_RELEASE_8821C(x) \ 11284 ((x) & (~BITS_MACID63_32_RELEASE_8821C)) 11285 #define BIT_GET_MACID63_32_RELEASE_8821C(x) \ 11286 (((x) >> BIT_SHIFT_MACID63_32_RELEASE_8821C) & \ 11287 BIT_MASK_MACID63_32_RELEASE_8821C) 11288 #define BIT_SET_MACID63_32_RELEASE_8821C(x, v) \ 11289 (BIT_CLEAR_MACID63_32_RELEASE_8821C(x) | \ 11290 BIT_MACID63_32_RELEASE_8821C(v)) 11291 11292 /* 2 REG_MACID_RELEASE2_8821C */ 11293 11294 #define BIT_SHIFT_MACID95_64_RELEASE_8821C 0 11295 #define BIT_MASK_MACID95_64_RELEASE_8821C 0xffffffffL 11296 #define BIT_MACID95_64_RELEASE_8821C(x) \ 11297 (((x) & BIT_MASK_MACID95_64_RELEASE_8821C) \ 11298 << BIT_SHIFT_MACID95_64_RELEASE_8821C) 11299 #define BITS_MACID95_64_RELEASE_8821C \ 11300 (BIT_MASK_MACID95_64_RELEASE_8821C \ 11301 << BIT_SHIFT_MACID95_64_RELEASE_8821C) 11302 #define BIT_CLEAR_MACID95_64_RELEASE_8821C(x) \ 11303 ((x) & (~BITS_MACID95_64_RELEASE_8821C)) 11304 #define BIT_GET_MACID95_64_RELEASE_8821C(x) \ 11305 (((x) >> BIT_SHIFT_MACID95_64_RELEASE_8821C) & \ 11306 BIT_MASK_MACID95_64_RELEASE_8821C) 11307 #define BIT_SET_MACID95_64_RELEASE_8821C(x, v) \ 11308 (BIT_CLEAR_MACID95_64_RELEASE_8821C(x) | \ 11309 BIT_MACID95_64_RELEASE_8821C(v)) 11310 11311 /* 2 REG_MACID_RELEASE3_8821C */ 11312 11313 #define BIT_SHIFT_MACID127_96_RELEASE_8821C 0 11314 #define BIT_MASK_MACID127_96_RELEASE_8821C 0xffffffffL 11315 #define BIT_MACID127_96_RELEASE_8821C(x) \ 11316 (((x) & BIT_MASK_MACID127_96_RELEASE_8821C) \ 11317 << BIT_SHIFT_MACID127_96_RELEASE_8821C) 11318 #define BITS_MACID127_96_RELEASE_8821C \ 11319 (BIT_MASK_MACID127_96_RELEASE_8821C \ 11320 << BIT_SHIFT_MACID127_96_RELEASE_8821C) 11321 #define BIT_CLEAR_MACID127_96_RELEASE_8821C(x) \ 11322 ((x) & (~BITS_MACID127_96_RELEASE_8821C)) 11323 #define BIT_GET_MACID127_96_RELEASE_8821C(x) \ 11324 (((x) >> BIT_SHIFT_MACID127_96_RELEASE_8821C) & \ 11325 BIT_MASK_MACID127_96_RELEASE_8821C) 11326 #define BIT_SET_MACID127_96_RELEASE_8821C(x, v) \ 11327 (BIT_CLEAR_MACID127_96_RELEASE_8821C(x) | \ 11328 BIT_MACID127_96_RELEASE_8821C(v)) 11329 11330 /* 2 REG_MACID_RELEASE_SETTING_8821C */ 11331 #define BIT_MACID_VALUE_8821C BIT(7) 11332 11333 #define BIT_SHIFT_MACID_OFFSET_8821C 0 11334 #define BIT_MASK_MACID_OFFSET_8821C 0x7f 11335 #define BIT_MACID_OFFSET_8821C(x) \ 11336 (((x) & BIT_MASK_MACID_OFFSET_8821C) << BIT_SHIFT_MACID_OFFSET_8821C) 11337 #define BITS_MACID_OFFSET_8821C \ 11338 (BIT_MASK_MACID_OFFSET_8821C << BIT_SHIFT_MACID_OFFSET_8821C) 11339 #define BIT_CLEAR_MACID_OFFSET_8821C(x) ((x) & (~BITS_MACID_OFFSET_8821C)) 11340 #define BIT_GET_MACID_OFFSET_8821C(x) \ 11341 (((x) >> BIT_SHIFT_MACID_OFFSET_8821C) & BIT_MASK_MACID_OFFSET_8821C) 11342 #define BIT_SET_MACID_OFFSET_8821C(x, v) \ 11343 (BIT_CLEAR_MACID_OFFSET_8821C(x) | BIT_MACID_OFFSET_8821C(v)) 11344 11345 /* 2 REG_FAST_EDCA_VOVI_SETTING_8821C */ 11346 11347 #define BIT_SHIFT_VI_FAST_EDCA_TO_8821C 24 11348 #define BIT_MASK_VI_FAST_EDCA_TO_8821C 0xff 11349 #define BIT_VI_FAST_EDCA_TO_8821C(x) \ 11350 (((x) & BIT_MASK_VI_FAST_EDCA_TO_8821C) \ 11351 << BIT_SHIFT_VI_FAST_EDCA_TO_8821C) 11352 #define BITS_VI_FAST_EDCA_TO_8821C \ 11353 (BIT_MASK_VI_FAST_EDCA_TO_8821C << BIT_SHIFT_VI_FAST_EDCA_TO_8821C) 11354 #define BIT_CLEAR_VI_FAST_EDCA_TO_8821C(x) ((x) & (~BITS_VI_FAST_EDCA_TO_8821C)) 11355 #define BIT_GET_VI_FAST_EDCA_TO_8821C(x) \ 11356 (((x) >> BIT_SHIFT_VI_FAST_EDCA_TO_8821C) & \ 11357 BIT_MASK_VI_FAST_EDCA_TO_8821C) 11358 #define BIT_SET_VI_FAST_EDCA_TO_8821C(x, v) \ 11359 (BIT_CLEAR_VI_FAST_EDCA_TO_8821C(x) | BIT_VI_FAST_EDCA_TO_8821C(v)) 11360 11361 #define BIT_VI_THRESHOLD_SEL_8821C BIT(23) 11362 11363 #define BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8821C 16 11364 #define BIT_MASK_VI_FAST_EDCA_PKT_TH_8821C 0x7f 11365 #define BIT_VI_FAST_EDCA_PKT_TH_8821C(x) \ 11366 (((x) & BIT_MASK_VI_FAST_EDCA_PKT_TH_8821C) \ 11367 << BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8821C) 11368 #define BITS_VI_FAST_EDCA_PKT_TH_8821C \ 11369 (BIT_MASK_VI_FAST_EDCA_PKT_TH_8821C \ 11370 << BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8821C) 11371 #define BIT_CLEAR_VI_FAST_EDCA_PKT_TH_8821C(x) \ 11372 ((x) & (~BITS_VI_FAST_EDCA_PKT_TH_8821C)) 11373 #define BIT_GET_VI_FAST_EDCA_PKT_TH_8821C(x) \ 11374 (((x) >> BIT_SHIFT_VI_FAST_EDCA_PKT_TH_8821C) & \ 11375 BIT_MASK_VI_FAST_EDCA_PKT_TH_8821C) 11376 #define BIT_SET_VI_FAST_EDCA_PKT_TH_8821C(x, v) \ 11377 (BIT_CLEAR_VI_FAST_EDCA_PKT_TH_8821C(x) | \ 11378 BIT_VI_FAST_EDCA_PKT_TH_8821C(v)) 11379 11380 #define BIT_SHIFT_VO_FAST_EDCA_TO_8821C 8 11381 #define BIT_MASK_VO_FAST_EDCA_TO_8821C 0xff 11382 #define BIT_VO_FAST_EDCA_TO_8821C(x) \ 11383 (((x) & BIT_MASK_VO_FAST_EDCA_TO_8821C) \ 11384 << BIT_SHIFT_VO_FAST_EDCA_TO_8821C) 11385 #define BITS_VO_FAST_EDCA_TO_8821C \ 11386 (BIT_MASK_VO_FAST_EDCA_TO_8821C << BIT_SHIFT_VO_FAST_EDCA_TO_8821C) 11387 #define BIT_CLEAR_VO_FAST_EDCA_TO_8821C(x) ((x) & (~BITS_VO_FAST_EDCA_TO_8821C)) 11388 #define BIT_GET_VO_FAST_EDCA_TO_8821C(x) \ 11389 (((x) >> BIT_SHIFT_VO_FAST_EDCA_TO_8821C) & \ 11390 BIT_MASK_VO_FAST_EDCA_TO_8821C) 11391 #define BIT_SET_VO_FAST_EDCA_TO_8821C(x, v) \ 11392 (BIT_CLEAR_VO_FAST_EDCA_TO_8821C(x) | BIT_VO_FAST_EDCA_TO_8821C(v)) 11393 11394 #define BIT_VO_THRESHOLD_SEL_8821C BIT(7) 11395 11396 #define BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8821C 0 11397 #define BIT_MASK_VO_FAST_EDCA_PKT_TH_8821C 0x7f 11398 #define BIT_VO_FAST_EDCA_PKT_TH_8821C(x) \ 11399 (((x) & BIT_MASK_VO_FAST_EDCA_PKT_TH_8821C) \ 11400 << BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8821C) 11401 #define BITS_VO_FAST_EDCA_PKT_TH_8821C \ 11402 (BIT_MASK_VO_FAST_EDCA_PKT_TH_8821C \ 11403 << BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8821C) 11404 #define BIT_CLEAR_VO_FAST_EDCA_PKT_TH_8821C(x) \ 11405 ((x) & (~BITS_VO_FAST_EDCA_PKT_TH_8821C)) 11406 #define BIT_GET_VO_FAST_EDCA_PKT_TH_8821C(x) \ 11407 (((x) >> BIT_SHIFT_VO_FAST_EDCA_PKT_TH_8821C) & \ 11408 BIT_MASK_VO_FAST_EDCA_PKT_TH_8821C) 11409 #define BIT_SET_VO_FAST_EDCA_PKT_TH_8821C(x, v) \ 11410 (BIT_CLEAR_VO_FAST_EDCA_PKT_TH_8821C(x) | \ 11411 BIT_VO_FAST_EDCA_PKT_TH_8821C(v)) 11412 11413 /* 2 REG_FAST_EDCA_BEBK_SETTING_8821C */ 11414 11415 #define BIT_SHIFT_BK_FAST_EDCA_TO_8821C 24 11416 #define BIT_MASK_BK_FAST_EDCA_TO_8821C 0xff 11417 #define BIT_BK_FAST_EDCA_TO_8821C(x) \ 11418 (((x) & BIT_MASK_BK_FAST_EDCA_TO_8821C) \ 11419 << BIT_SHIFT_BK_FAST_EDCA_TO_8821C) 11420 #define BITS_BK_FAST_EDCA_TO_8821C \ 11421 (BIT_MASK_BK_FAST_EDCA_TO_8821C << BIT_SHIFT_BK_FAST_EDCA_TO_8821C) 11422 #define BIT_CLEAR_BK_FAST_EDCA_TO_8821C(x) ((x) & (~BITS_BK_FAST_EDCA_TO_8821C)) 11423 #define BIT_GET_BK_FAST_EDCA_TO_8821C(x) \ 11424 (((x) >> BIT_SHIFT_BK_FAST_EDCA_TO_8821C) & \ 11425 BIT_MASK_BK_FAST_EDCA_TO_8821C) 11426 #define BIT_SET_BK_FAST_EDCA_TO_8821C(x, v) \ 11427 (BIT_CLEAR_BK_FAST_EDCA_TO_8821C(x) | BIT_BK_FAST_EDCA_TO_8821C(v)) 11428 11429 #define BIT_BK_THRESHOLD_SEL_8821C BIT(23) 11430 11431 #define BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8821C 16 11432 #define BIT_MASK_BK_FAST_EDCA_PKT_TH_8821C 0x7f 11433 #define BIT_BK_FAST_EDCA_PKT_TH_8821C(x) \ 11434 (((x) & BIT_MASK_BK_FAST_EDCA_PKT_TH_8821C) \ 11435 << BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8821C) 11436 #define BITS_BK_FAST_EDCA_PKT_TH_8821C \ 11437 (BIT_MASK_BK_FAST_EDCA_PKT_TH_8821C \ 11438 << BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8821C) 11439 #define BIT_CLEAR_BK_FAST_EDCA_PKT_TH_8821C(x) \ 11440 ((x) & (~BITS_BK_FAST_EDCA_PKT_TH_8821C)) 11441 #define BIT_GET_BK_FAST_EDCA_PKT_TH_8821C(x) \ 11442 (((x) >> BIT_SHIFT_BK_FAST_EDCA_PKT_TH_8821C) & \ 11443 BIT_MASK_BK_FAST_EDCA_PKT_TH_8821C) 11444 #define BIT_SET_BK_FAST_EDCA_PKT_TH_8821C(x, v) \ 11445 (BIT_CLEAR_BK_FAST_EDCA_PKT_TH_8821C(x) | \ 11446 BIT_BK_FAST_EDCA_PKT_TH_8821C(v)) 11447 11448 #define BIT_SHIFT_BE_FAST_EDCA_TO_8821C 8 11449 #define BIT_MASK_BE_FAST_EDCA_TO_8821C 0xff 11450 #define BIT_BE_FAST_EDCA_TO_8821C(x) \ 11451 (((x) & BIT_MASK_BE_FAST_EDCA_TO_8821C) \ 11452 << BIT_SHIFT_BE_FAST_EDCA_TO_8821C) 11453 #define BITS_BE_FAST_EDCA_TO_8821C \ 11454 (BIT_MASK_BE_FAST_EDCA_TO_8821C << BIT_SHIFT_BE_FAST_EDCA_TO_8821C) 11455 #define BIT_CLEAR_BE_FAST_EDCA_TO_8821C(x) ((x) & (~BITS_BE_FAST_EDCA_TO_8821C)) 11456 #define BIT_GET_BE_FAST_EDCA_TO_8821C(x) \ 11457 (((x) >> BIT_SHIFT_BE_FAST_EDCA_TO_8821C) & \ 11458 BIT_MASK_BE_FAST_EDCA_TO_8821C) 11459 #define BIT_SET_BE_FAST_EDCA_TO_8821C(x, v) \ 11460 (BIT_CLEAR_BE_FAST_EDCA_TO_8821C(x) | BIT_BE_FAST_EDCA_TO_8821C(v)) 11461 11462 #define BIT_BE_THRESHOLD_SEL_8821C BIT(7) 11463 11464 #define BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8821C 0 11465 #define BIT_MASK_BE_FAST_EDCA_PKT_TH_8821C 0x7f 11466 #define BIT_BE_FAST_EDCA_PKT_TH_8821C(x) \ 11467 (((x) & BIT_MASK_BE_FAST_EDCA_PKT_TH_8821C) \ 11468 << BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8821C) 11469 #define BITS_BE_FAST_EDCA_PKT_TH_8821C \ 11470 (BIT_MASK_BE_FAST_EDCA_PKT_TH_8821C \ 11471 << BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8821C) 11472 #define BIT_CLEAR_BE_FAST_EDCA_PKT_TH_8821C(x) \ 11473 ((x) & (~BITS_BE_FAST_EDCA_PKT_TH_8821C)) 11474 #define BIT_GET_BE_FAST_EDCA_PKT_TH_8821C(x) \ 11475 (((x) >> BIT_SHIFT_BE_FAST_EDCA_PKT_TH_8821C) & \ 11476 BIT_MASK_BE_FAST_EDCA_PKT_TH_8821C) 11477 #define BIT_SET_BE_FAST_EDCA_PKT_TH_8821C(x, v) \ 11478 (BIT_CLEAR_BE_FAST_EDCA_PKT_TH_8821C(x) | \ 11479 BIT_BE_FAST_EDCA_PKT_TH_8821C(v)) 11480 11481 /* 2 REG_MACID_DROP0_8821C */ 11482 11483 #define BIT_SHIFT_MACID31_0_DROP_8821C 0 11484 #define BIT_MASK_MACID31_0_DROP_8821C 0xffffffffL 11485 #define BIT_MACID31_0_DROP_8821C(x) \ 11486 (((x) & BIT_MASK_MACID31_0_DROP_8821C) \ 11487 << BIT_SHIFT_MACID31_0_DROP_8821C) 11488 #define BITS_MACID31_0_DROP_8821C \ 11489 (BIT_MASK_MACID31_0_DROP_8821C << BIT_SHIFT_MACID31_0_DROP_8821C) 11490 #define BIT_CLEAR_MACID31_0_DROP_8821C(x) ((x) & (~BITS_MACID31_0_DROP_8821C)) 11491 #define BIT_GET_MACID31_0_DROP_8821C(x) \ 11492 (((x) >> BIT_SHIFT_MACID31_0_DROP_8821C) & \ 11493 BIT_MASK_MACID31_0_DROP_8821C) 11494 #define BIT_SET_MACID31_0_DROP_8821C(x, v) \ 11495 (BIT_CLEAR_MACID31_0_DROP_8821C(x) | BIT_MACID31_0_DROP_8821C(v)) 11496 11497 /* 2 REG_MACID_DROP1_8821C */ 11498 11499 #define BIT_SHIFT_MACID63_32_DROP_8821C 0 11500 #define BIT_MASK_MACID63_32_DROP_8821C 0xffffffffL 11501 #define BIT_MACID63_32_DROP_8821C(x) \ 11502 (((x) & BIT_MASK_MACID63_32_DROP_8821C) \ 11503 << BIT_SHIFT_MACID63_32_DROP_8821C) 11504 #define BITS_MACID63_32_DROP_8821C \ 11505 (BIT_MASK_MACID63_32_DROP_8821C << BIT_SHIFT_MACID63_32_DROP_8821C) 11506 #define BIT_CLEAR_MACID63_32_DROP_8821C(x) ((x) & (~BITS_MACID63_32_DROP_8821C)) 11507 #define BIT_GET_MACID63_32_DROP_8821C(x) \ 11508 (((x) >> BIT_SHIFT_MACID63_32_DROP_8821C) & \ 11509 BIT_MASK_MACID63_32_DROP_8821C) 11510 #define BIT_SET_MACID63_32_DROP_8821C(x, v) \ 11511 (BIT_CLEAR_MACID63_32_DROP_8821C(x) | BIT_MACID63_32_DROP_8821C(v)) 11512 11513 /* 2 REG_MACID_DROP2_8821C */ 11514 11515 #define BIT_SHIFT_MACID95_64_DROP_8821C 0 11516 #define BIT_MASK_MACID95_64_DROP_8821C 0xffffffffL 11517 #define BIT_MACID95_64_DROP_8821C(x) \ 11518 (((x) & BIT_MASK_MACID95_64_DROP_8821C) \ 11519 << BIT_SHIFT_MACID95_64_DROP_8821C) 11520 #define BITS_MACID95_64_DROP_8821C \ 11521 (BIT_MASK_MACID95_64_DROP_8821C << BIT_SHIFT_MACID95_64_DROP_8821C) 11522 #define BIT_CLEAR_MACID95_64_DROP_8821C(x) ((x) & (~BITS_MACID95_64_DROP_8821C)) 11523 #define BIT_GET_MACID95_64_DROP_8821C(x) \ 11524 (((x) >> BIT_SHIFT_MACID95_64_DROP_8821C) & \ 11525 BIT_MASK_MACID95_64_DROP_8821C) 11526 #define BIT_SET_MACID95_64_DROP_8821C(x, v) \ 11527 (BIT_CLEAR_MACID95_64_DROP_8821C(x) | BIT_MACID95_64_DROP_8821C(v)) 11528 11529 /* 2 REG_MACID_DROP3_8821C */ 11530 11531 #define BIT_SHIFT_MACID127_96_DROP_8821C 0 11532 #define BIT_MASK_MACID127_96_DROP_8821C 0xffffffffL 11533 #define BIT_MACID127_96_DROP_8821C(x) \ 11534 (((x) & BIT_MASK_MACID127_96_DROP_8821C) \ 11535 << BIT_SHIFT_MACID127_96_DROP_8821C) 11536 #define BITS_MACID127_96_DROP_8821C \ 11537 (BIT_MASK_MACID127_96_DROP_8821C << BIT_SHIFT_MACID127_96_DROP_8821C) 11538 #define BIT_CLEAR_MACID127_96_DROP_8821C(x) \ 11539 ((x) & (~BITS_MACID127_96_DROP_8821C)) 11540 #define BIT_GET_MACID127_96_DROP_8821C(x) \ 11541 (((x) >> BIT_SHIFT_MACID127_96_DROP_8821C) & \ 11542 BIT_MASK_MACID127_96_DROP_8821C) 11543 #define BIT_SET_MACID127_96_DROP_8821C(x, v) \ 11544 (BIT_CLEAR_MACID127_96_DROP_8821C(x) | BIT_MACID127_96_DROP_8821C(v)) 11545 11546 /* 2 REG_R_MACID_RELEASE_SUCCESS_0_8821C */ 11547 11548 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8821C 0 11549 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8821C 0xffffffffL 11550 #define BIT_R_MACID_RELEASE_SUCCESS_0_8821C(x) \ 11551 (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8821C) \ 11552 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8821C) 11553 #define BITS_R_MACID_RELEASE_SUCCESS_0_8821C \ 11554 (BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8821C \ 11555 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8821C) 11556 #define BIT_CLEAR_R_MACID_RELEASE_SUCCESS_0_8821C(x) \ 11557 ((x) & (~BITS_R_MACID_RELEASE_SUCCESS_0_8821C)) 11558 #define BIT_GET_R_MACID_RELEASE_SUCCESS_0_8821C(x) \ 11559 (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_0_8821C) & \ 11560 BIT_MASK_R_MACID_RELEASE_SUCCESS_0_8821C) 11561 #define BIT_SET_R_MACID_RELEASE_SUCCESS_0_8821C(x, v) \ 11562 (BIT_CLEAR_R_MACID_RELEASE_SUCCESS_0_8821C(x) | \ 11563 BIT_R_MACID_RELEASE_SUCCESS_0_8821C(v)) 11564 11565 /* 2 REG_R_MACID_RELEASE_SUCCESS_1_8821C */ 11566 11567 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8821C 0 11568 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8821C 0xffffffffL 11569 #define BIT_R_MACID_RELEASE_SUCCESS_1_8821C(x) \ 11570 (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8821C) \ 11571 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8821C) 11572 #define BITS_R_MACID_RELEASE_SUCCESS_1_8821C \ 11573 (BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8821C \ 11574 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8821C) 11575 #define BIT_CLEAR_R_MACID_RELEASE_SUCCESS_1_8821C(x) \ 11576 ((x) & (~BITS_R_MACID_RELEASE_SUCCESS_1_8821C)) 11577 #define BIT_GET_R_MACID_RELEASE_SUCCESS_1_8821C(x) \ 11578 (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_1_8821C) & \ 11579 BIT_MASK_R_MACID_RELEASE_SUCCESS_1_8821C) 11580 #define BIT_SET_R_MACID_RELEASE_SUCCESS_1_8821C(x, v) \ 11581 (BIT_CLEAR_R_MACID_RELEASE_SUCCESS_1_8821C(x) | \ 11582 BIT_R_MACID_RELEASE_SUCCESS_1_8821C(v)) 11583 11584 /* 2 REG_R_MACID_RELEASE_SUCCESS_2_8821C */ 11585 11586 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8821C 0 11587 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8821C 0xffffffffL 11588 #define BIT_R_MACID_RELEASE_SUCCESS_2_8821C(x) \ 11589 (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8821C) \ 11590 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8821C) 11591 #define BITS_R_MACID_RELEASE_SUCCESS_2_8821C \ 11592 (BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8821C \ 11593 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8821C) 11594 #define BIT_CLEAR_R_MACID_RELEASE_SUCCESS_2_8821C(x) \ 11595 ((x) & (~BITS_R_MACID_RELEASE_SUCCESS_2_8821C)) 11596 #define BIT_GET_R_MACID_RELEASE_SUCCESS_2_8821C(x) \ 11597 (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_2_8821C) & \ 11598 BIT_MASK_R_MACID_RELEASE_SUCCESS_2_8821C) 11599 #define BIT_SET_R_MACID_RELEASE_SUCCESS_2_8821C(x, v) \ 11600 (BIT_CLEAR_R_MACID_RELEASE_SUCCESS_2_8821C(x) | \ 11601 BIT_R_MACID_RELEASE_SUCCESS_2_8821C(v)) 11602 11603 /* 2 REG_R_MACID_RELEASE_SUCCESS_3_8821C */ 11604 11605 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8821C 0 11606 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8821C 0xffffffffL 11607 #define BIT_R_MACID_RELEASE_SUCCESS_3_8821C(x) \ 11608 (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8821C) \ 11609 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8821C) 11610 #define BITS_R_MACID_RELEASE_SUCCESS_3_8821C \ 11611 (BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8821C \ 11612 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8821C) 11613 #define BIT_CLEAR_R_MACID_RELEASE_SUCCESS_3_8821C(x) \ 11614 ((x) & (~BITS_R_MACID_RELEASE_SUCCESS_3_8821C)) 11615 #define BIT_GET_R_MACID_RELEASE_SUCCESS_3_8821C(x) \ 11616 (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_3_8821C) & \ 11617 BIT_MASK_R_MACID_RELEASE_SUCCESS_3_8821C) 11618 #define BIT_SET_R_MACID_RELEASE_SUCCESS_3_8821C(x, v) \ 11619 (BIT_CLEAR_R_MACID_RELEASE_SUCCESS_3_8821C(x) | \ 11620 BIT_R_MACID_RELEASE_SUCCESS_3_8821C(v)) 11621 11622 /* 2 REG_MGQ_FIFO_WRITE_POINTER_8821C */ 11623 #define BIT_MGQ_FIFO_OV_8821C BIT(7) 11624 #define BIT_MGQ_FIFO_WPTR_ERROR_8821C BIT(6) 11625 #define BIT_EN_MGQ_FIFO_LIFETIME_8821C BIT(5) 11626 11627 #define BIT_SHIFT_MGQ_FIFO_WPTR_8821C 0 11628 #define BIT_MASK_MGQ_FIFO_WPTR_8821C 0x1f 11629 #define BIT_MGQ_FIFO_WPTR_8821C(x) \ 11630 (((x) & BIT_MASK_MGQ_FIFO_WPTR_8821C) << BIT_SHIFT_MGQ_FIFO_WPTR_8821C) 11631 #define BITS_MGQ_FIFO_WPTR_8821C \ 11632 (BIT_MASK_MGQ_FIFO_WPTR_8821C << BIT_SHIFT_MGQ_FIFO_WPTR_8821C) 11633 #define BIT_CLEAR_MGQ_FIFO_WPTR_8821C(x) ((x) & (~BITS_MGQ_FIFO_WPTR_8821C)) 11634 #define BIT_GET_MGQ_FIFO_WPTR_8821C(x) \ 11635 (((x) >> BIT_SHIFT_MGQ_FIFO_WPTR_8821C) & BIT_MASK_MGQ_FIFO_WPTR_8821C) 11636 #define BIT_SET_MGQ_FIFO_WPTR_8821C(x, v) \ 11637 (BIT_CLEAR_MGQ_FIFO_WPTR_8821C(x) | BIT_MGQ_FIFO_WPTR_8821C(v)) 11638 11639 /* 2 REG_MGQ_FIFO_READ_POINTER_8821C */ 11640 11641 #define BIT_SHIFT_MGQ_FIFO_SIZE_8821C 14 11642 #define BIT_MASK_MGQ_FIFO_SIZE_8821C 0x3 11643 #define BIT_MGQ_FIFO_SIZE_8821C(x) \ 11644 (((x) & BIT_MASK_MGQ_FIFO_SIZE_8821C) << BIT_SHIFT_MGQ_FIFO_SIZE_8821C) 11645 #define BITS_MGQ_FIFO_SIZE_8821C \ 11646 (BIT_MASK_MGQ_FIFO_SIZE_8821C << BIT_SHIFT_MGQ_FIFO_SIZE_8821C) 11647 #define BIT_CLEAR_MGQ_FIFO_SIZE_8821C(x) ((x) & (~BITS_MGQ_FIFO_SIZE_8821C)) 11648 #define BIT_GET_MGQ_FIFO_SIZE_8821C(x) \ 11649 (((x) >> BIT_SHIFT_MGQ_FIFO_SIZE_8821C) & BIT_MASK_MGQ_FIFO_SIZE_8821C) 11650 #define BIT_SET_MGQ_FIFO_SIZE_8821C(x, v) \ 11651 (BIT_CLEAR_MGQ_FIFO_SIZE_8821C(x) | BIT_MGQ_FIFO_SIZE_8821C(v)) 11652 11653 #define BIT_MGQ_FIFO_PAUSE_8821C BIT(13) 11654 11655 #define BIT_SHIFT_MGQ_FIFO_RPTR_8821C 8 11656 #define BIT_MASK_MGQ_FIFO_RPTR_8821C 0x1f 11657 #define BIT_MGQ_FIFO_RPTR_8821C(x) \ 11658 (((x) & BIT_MASK_MGQ_FIFO_RPTR_8821C) << BIT_SHIFT_MGQ_FIFO_RPTR_8821C) 11659 #define BITS_MGQ_FIFO_RPTR_8821C \ 11660 (BIT_MASK_MGQ_FIFO_RPTR_8821C << BIT_SHIFT_MGQ_FIFO_RPTR_8821C) 11661 #define BIT_CLEAR_MGQ_FIFO_RPTR_8821C(x) ((x) & (~BITS_MGQ_FIFO_RPTR_8821C)) 11662 #define BIT_GET_MGQ_FIFO_RPTR_8821C(x) \ 11663 (((x) >> BIT_SHIFT_MGQ_FIFO_RPTR_8821C) & BIT_MASK_MGQ_FIFO_RPTR_8821C) 11664 #define BIT_SET_MGQ_FIFO_RPTR_8821C(x, v) \ 11665 (BIT_CLEAR_MGQ_FIFO_RPTR_8821C(x) | BIT_MGQ_FIFO_RPTR_8821C(v)) 11666 11667 /* 2 REG_MGQ_FIFO_ENABLE_8821C */ 11668 #define BIT_MGQ_FIFO_EN_8821C BIT(15) 11669 11670 #define BIT_SHIFT_MGQ_FIFO_PG_SIZE_8821C 12 11671 #define BIT_MASK_MGQ_FIFO_PG_SIZE_8821C 0x7 11672 #define BIT_MGQ_FIFO_PG_SIZE_8821C(x) \ 11673 (((x) & BIT_MASK_MGQ_FIFO_PG_SIZE_8821C) \ 11674 << BIT_SHIFT_MGQ_FIFO_PG_SIZE_8821C) 11675 #define BITS_MGQ_FIFO_PG_SIZE_8821C \ 11676 (BIT_MASK_MGQ_FIFO_PG_SIZE_8821C << BIT_SHIFT_MGQ_FIFO_PG_SIZE_8821C) 11677 #define BIT_CLEAR_MGQ_FIFO_PG_SIZE_8821C(x) \ 11678 ((x) & (~BITS_MGQ_FIFO_PG_SIZE_8821C)) 11679 #define BIT_GET_MGQ_FIFO_PG_SIZE_8821C(x) \ 11680 (((x) >> BIT_SHIFT_MGQ_FIFO_PG_SIZE_8821C) & \ 11681 BIT_MASK_MGQ_FIFO_PG_SIZE_8821C) 11682 #define BIT_SET_MGQ_FIFO_PG_SIZE_8821C(x, v) \ 11683 (BIT_CLEAR_MGQ_FIFO_PG_SIZE_8821C(x) | BIT_MGQ_FIFO_PG_SIZE_8821C(v)) 11684 11685 #define BIT_SHIFT_MGQ_FIFO_START_PG_8821C 0 11686 #define BIT_MASK_MGQ_FIFO_START_PG_8821C 0xfff 11687 #define BIT_MGQ_FIFO_START_PG_8821C(x) \ 11688 (((x) & BIT_MASK_MGQ_FIFO_START_PG_8821C) \ 11689 << BIT_SHIFT_MGQ_FIFO_START_PG_8821C) 11690 #define BITS_MGQ_FIFO_START_PG_8821C \ 11691 (BIT_MASK_MGQ_FIFO_START_PG_8821C << BIT_SHIFT_MGQ_FIFO_START_PG_8821C) 11692 #define BIT_CLEAR_MGQ_FIFO_START_PG_8821C(x) \ 11693 ((x) & (~BITS_MGQ_FIFO_START_PG_8821C)) 11694 #define BIT_GET_MGQ_FIFO_START_PG_8821C(x) \ 11695 (((x) >> BIT_SHIFT_MGQ_FIFO_START_PG_8821C) & \ 11696 BIT_MASK_MGQ_FIFO_START_PG_8821C) 11697 #define BIT_SET_MGQ_FIFO_START_PG_8821C(x, v) \ 11698 (BIT_CLEAR_MGQ_FIFO_START_PG_8821C(x) | BIT_MGQ_FIFO_START_PG_8821C(v)) 11699 11700 /* 2 REG_MGQ_FIFO_RELEASE_INT_MASK_8821C */ 11701 11702 #define BIT_SHIFT_MGQ_FIFO_REL_INT_MASK_8821C 0 11703 #define BIT_MASK_MGQ_FIFO_REL_INT_MASK_8821C 0xffff 11704 #define BIT_MGQ_FIFO_REL_INT_MASK_8821C(x) \ 11705 (((x) & BIT_MASK_MGQ_FIFO_REL_INT_MASK_8821C) \ 11706 << BIT_SHIFT_MGQ_FIFO_REL_INT_MASK_8821C) 11707 #define BITS_MGQ_FIFO_REL_INT_MASK_8821C \ 11708 (BIT_MASK_MGQ_FIFO_REL_INT_MASK_8821C \ 11709 << BIT_SHIFT_MGQ_FIFO_REL_INT_MASK_8821C) 11710 #define BIT_CLEAR_MGQ_FIFO_REL_INT_MASK_8821C(x) \ 11711 ((x) & (~BITS_MGQ_FIFO_REL_INT_MASK_8821C)) 11712 #define BIT_GET_MGQ_FIFO_REL_INT_MASK_8821C(x) \ 11713 (((x) >> BIT_SHIFT_MGQ_FIFO_REL_INT_MASK_8821C) & \ 11714 BIT_MASK_MGQ_FIFO_REL_INT_MASK_8821C) 11715 #define BIT_SET_MGQ_FIFO_REL_INT_MASK_8821C(x, v) \ 11716 (BIT_CLEAR_MGQ_FIFO_REL_INT_MASK_8821C(x) | \ 11717 BIT_MGQ_FIFO_REL_INT_MASK_8821C(v)) 11718 11719 /* 2 REG_MGQ_FIFO_RELEASE_INT_FLAG_8821C */ 11720 11721 #define BIT_SHIFT_MGQ_FIFO_REL_INT_FLAG_8821C 0 11722 #define BIT_MASK_MGQ_FIFO_REL_INT_FLAG_8821C 0xffff 11723 #define BIT_MGQ_FIFO_REL_INT_FLAG_8821C(x) \ 11724 (((x) & BIT_MASK_MGQ_FIFO_REL_INT_FLAG_8821C) \ 11725 << BIT_SHIFT_MGQ_FIFO_REL_INT_FLAG_8821C) 11726 #define BITS_MGQ_FIFO_REL_INT_FLAG_8821C \ 11727 (BIT_MASK_MGQ_FIFO_REL_INT_FLAG_8821C \ 11728 << BIT_SHIFT_MGQ_FIFO_REL_INT_FLAG_8821C) 11729 #define BIT_CLEAR_MGQ_FIFO_REL_INT_FLAG_8821C(x) \ 11730 ((x) & (~BITS_MGQ_FIFO_REL_INT_FLAG_8821C)) 11731 #define BIT_GET_MGQ_FIFO_REL_INT_FLAG_8821C(x) \ 11732 (((x) >> BIT_SHIFT_MGQ_FIFO_REL_INT_FLAG_8821C) & \ 11733 BIT_MASK_MGQ_FIFO_REL_INT_FLAG_8821C) 11734 #define BIT_SET_MGQ_FIFO_REL_INT_FLAG_8821C(x, v) \ 11735 (BIT_CLEAR_MGQ_FIFO_REL_INT_FLAG_8821C(x) | \ 11736 BIT_MGQ_FIFO_REL_INT_FLAG_8821C(v)) 11737 11738 /* 2 REG_MGQ_FIFO_VALID_MAP_8821C */ 11739 11740 #define BIT_SHIFT_MGQ_FIFO_PKT_VALID_MAP_8821C 0 11741 #define BIT_MASK_MGQ_FIFO_PKT_VALID_MAP_8821C 0xffff 11742 #define BIT_MGQ_FIFO_PKT_VALID_MAP_8821C(x) \ 11743 (((x) & BIT_MASK_MGQ_FIFO_PKT_VALID_MAP_8821C) \ 11744 << BIT_SHIFT_MGQ_FIFO_PKT_VALID_MAP_8821C) 11745 #define BITS_MGQ_FIFO_PKT_VALID_MAP_8821C \ 11746 (BIT_MASK_MGQ_FIFO_PKT_VALID_MAP_8821C \ 11747 << BIT_SHIFT_MGQ_FIFO_PKT_VALID_MAP_8821C) 11748 #define BIT_CLEAR_MGQ_FIFO_PKT_VALID_MAP_8821C(x) \ 11749 ((x) & (~BITS_MGQ_FIFO_PKT_VALID_MAP_8821C)) 11750 #define BIT_GET_MGQ_FIFO_PKT_VALID_MAP_8821C(x) \ 11751 (((x) >> BIT_SHIFT_MGQ_FIFO_PKT_VALID_MAP_8821C) & \ 11752 BIT_MASK_MGQ_FIFO_PKT_VALID_MAP_8821C) 11753 #define BIT_SET_MGQ_FIFO_PKT_VALID_MAP_8821C(x, v) \ 11754 (BIT_CLEAR_MGQ_FIFO_PKT_VALID_MAP_8821C(x) | \ 11755 BIT_MGQ_FIFO_PKT_VALID_MAP_8821C(v)) 11756 11757 /* 2 REG_MGQ_FIFO_LIFETIME_8821C */ 11758 11759 #define BIT_SHIFT_MGQ_FIFO_LIFETIME_8821C 0 11760 #define BIT_MASK_MGQ_FIFO_LIFETIME_8821C 0xffff 11761 #define BIT_MGQ_FIFO_LIFETIME_8821C(x) \ 11762 (((x) & BIT_MASK_MGQ_FIFO_LIFETIME_8821C) \ 11763 << BIT_SHIFT_MGQ_FIFO_LIFETIME_8821C) 11764 #define BITS_MGQ_FIFO_LIFETIME_8821C \ 11765 (BIT_MASK_MGQ_FIFO_LIFETIME_8821C << BIT_SHIFT_MGQ_FIFO_LIFETIME_8821C) 11766 #define BIT_CLEAR_MGQ_FIFO_LIFETIME_8821C(x) \ 11767 ((x) & (~BITS_MGQ_FIFO_LIFETIME_8821C)) 11768 #define BIT_GET_MGQ_FIFO_LIFETIME_8821C(x) \ 11769 (((x) >> BIT_SHIFT_MGQ_FIFO_LIFETIME_8821C) & \ 11770 BIT_MASK_MGQ_FIFO_LIFETIME_8821C) 11771 #define BIT_SET_MGQ_FIFO_LIFETIME_8821C(x, v) \ 11772 (BIT_CLEAR_MGQ_FIFO_LIFETIME_8821C(x) | BIT_MGQ_FIFO_LIFETIME_8821C(v)) 11773 11774 /* 2 REG_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C */ 11775 11776 #define BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C 0 11777 #define BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C 0x7f 11778 #define BIT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C(x) \ 11779 (((x) & BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C) \ 11780 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C) 11781 #define BITS_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C \ 11782 (BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C \ 11783 << BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C) 11784 #define BIT_CLEAR_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C(x) \ 11785 ((x) & (~BITS_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C)) 11786 #define BIT_GET_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C(x) \ 11787 (((x) >> BIT_SHIFT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C) & \ 11788 BIT_MASK_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C) 11789 #define BIT_SET_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C(x, v) \ 11790 (BIT_CLEAR_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C(x) | \ 11791 BIT_R_MACID_RELEASE_SUCCESS_CLEAR_OFFSET_8821C(v)) 11792 11793 /* 2 REG_SHCUT_SETTING_8821C */ 11794 11795 /* 2 REG_SHCUT_LLC_ETH_TYPE0_8821C */ 11796 11797 /* 2 REG_SHCUT_LLC_ETH_TYPE1_8821C */ 11798 11799 /* 2 REG_SHCUT_LLC_OUI0_8821C */ 11800 11801 /* 2 REG_SHCUT_LLC_OUI1_8821C */ 11802 11803 /* 2 REG_SHCUT_LLC_OUI2_8821C */ 11804 11805 /* 2 REG_MU_TX_CTL_8821C */ 11806 #define BIT_R_MU_P1_WAIT_STATE_EN_8821C BIT(16) 11807 11808 #define BIT_SHIFT_R_MU_RL_8821C 12 11809 #define BIT_MASK_R_MU_RL_8821C 0xf 11810 #define BIT_R_MU_RL_8821C(x) \ 11811 (((x) & BIT_MASK_R_MU_RL_8821C) << BIT_SHIFT_R_MU_RL_8821C) 11812 #define BITS_R_MU_RL_8821C (BIT_MASK_R_MU_RL_8821C << BIT_SHIFT_R_MU_RL_8821C) 11813 #define BIT_CLEAR_R_MU_RL_8821C(x) ((x) & (~BITS_R_MU_RL_8821C)) 11814 #define BIT_GET_R_MU_RL_8821C(x) \ 11815 (((x) >> BIT_SHIFT_R_MU_RL_8821C) & BIT_MASK_R_MU_RL_8821C) 11816 #define BIT_SET_R_MU_RL_8821C(x, v) \ 11817 (BIT_CLEAR_R_MU_RL_8821C(x) | BIT_R_MU_RL_8821C(v)) 11818 11819 #define BIT_R_FORCE_P1_RATEDOWN_8821C BIT(11) 11820 11821 #define BIT_SHIFT_R_MU_TAB_SEL_8821C 8 11822 #define BIT_MASK_R_MU_TAB_SEL_8821C 0x7 11823 #define BIT_R_MU_TAB_SEL_8821C(x) \ 11824 (((x) & BIT_MASK_R_MU_TAB_SEL_8821C) << BIT_SHIFT_R_MU_TAB_SEL_8821C) 11825 #define BITS_R_MU_TAB_SEL_8821C \ 11826 (BIT_MASK_R_MU_TAB_SEL_8821C << BIT_SHIFT_R_MU_TAB_SEL_8821C) 11827 #define BIT_CLEAR_R_MU_TAB_SEL_8821C(x) ((x) & (~BITS_R_MU_TAB_SEL_8821C)) 11828 #define BIT_GET_R_MU_TAB_SEL_8821C(x) \ 11829 (((x) >> BIT_SHIFT_R_MU_TAB_SEL_8821C) & BIT_MASK_R_MU_TAB_SEL_8821C) 11830 #define BIT_SET_R_MU_TAB_SEL_8821C(x, v) \ 11831 (BIT_CLEAR_R_MU_TAB_SEL_8821C(x) | BIT_R_MU_TAB_SEL_8821C(v)) 11832 11833 #define BIT_R_EN_MU_MIMO_8821C BIT(7) 11834 #define BIT_R_EN_REVERS_GTAB_8821C BIT(6) 11835 11836 #define BIT_SHIFT_R_MU_TABLE_VALID_8821C 0 11837 #define BIT_MASK_R_MU_TABLE_VALID_8821C 0x3f 11838 #define BIT_R_MU_TABLE_VALID_8821C(x) \ 11839 (((x) & BIT_MASK_R_MU_TABLE_VALID_8821C) \ 11840 << BIT_SHIFT_R_MU_TABLE_VALID_8821C) 11841 #define BITS_R_MU_TABLE_VALID_8821C \ 11842 (BIT_MASK_R_MU_TABLE_VALID_8821C << BIT_SHIFT_R_MU_TABLE_VALID_8821C) 11843 #define BIT_CLEAR_R_MU_TABLE_VALID_8821C(x) \ 11844 ((x) & (~BITS_R_MU_TABLE_VALID_8821C)) 11845 #define BIT_GET_R_MU_TABLE_VALID_8821C(x) \ 11846 (((x) >> BIT_SHIFT_R_MU_TABLE_VALID_8821C) & \ 11847 BIT_MASK_R_MU_TABLE_VALID_8821C) 11848 #define BIT_SET_R_MU_TABLE_VALID_8821C(x, v) \ 11849 (BIT_CLEAR_R_MU_TABLE_VALID_8821C(x) | BIT_R_MU_TABLE_VALID_8821C(v)) 11850 11851 /* 2 REG_MU_STA_GID_VLD_8821C */ 11852 11853 #define BIT_SHIFT_R_MU_STA_GTAB_VALID_8821C 0 11854 #define BIT_MASK_R_MU_STA_GTAB_VALID_8821C 0xffffffffL 11855 #define BIT_R_MU_STA_GTAB_VALID_8821C(x) \ 11856 (((x) & BIT_MASK_R_MU_STA_GTAB_VALID_8821C) \ 11857 << BIT_SHIFT_R_MU_STA_GTAB_VALID_8821C) 11858 #define BITS_R_MU_STA_GTAB_VALID_8821C \ 11859 (BIT_MASK_R_MU_STA_GTAB_VALID_8821C \ 11860 << BIT_SHIFT_R_MU_STA_GTAB_VALID_8821C) 11861 #define BIT_CLEAR_R_MU_STA_GTAB_VALID_8821C(x) \ 11862 ((x) & (~BITS_R_MU_STA_GTAB_VALID_8821C)) 11863 #define BIT_GET_R_MU_STA_GTAB_VALID_8821C(x) \ 11864 (((x) >> BIT_SHIFT_R_MU_STA_GTAB_VALID_8821C) & \ 11865 BIT_MASK_R_MU_STA_GTAB_VALID_8821C) 11866 #define BIT_SET_R_MU_STA_GTAB_VALID_8821C(x, v) \ 11867 (BIT_CLEAR_R_MU_STA_GTAB_VALID_8821C(x) | \ 11868 BIT_R_MU_STA_GTAB_VALID_8821C(v)) 11869 11870 /* 2 REG_MU_STA_USER_POS_INFO_8821C */ 11871 11872 #define BIT_SHIFT_R_MU_STA_GTAB_POSITION_L_8821C 0 11873 #define BIT_MASK_R_MU_STA_GTAB_POSITION_L_8821C 0xffffffffL 11874 #define BIT_R_MU_STA_GTAB_POSITION_L_8821C(x) \ 11875 (((x) & BIT_MASK_R_MU_STA_GTAB_POSITION_L_8821C) \ 11876 << BIT_SHIFT_R_MU_STA_GTAB_POSITION_L_8821C) 11877 #define BITS_R_MU_STA_GTAB_POSITION_L_8821C \ 11878 (BIT_MASK_R_MU_STA_GTAB_POSITION_L_8821C \ 11879 << BIT_SHIFT_R_MU_STA_GTAB_POSITION_L_8821C) 11880 #define BIT_CLEAR_R_MU_STA_GTAB_POSITION_L_8821C(x) \ 11881 ((x) & (~BITS_R_MU_STA_GTAB_POSITION_L_8821C)) 11882 #define BIT_GET_R_MU_STA_GTAB_POSITION_L_8821C(x) \ 11883 (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_L_8821C) & \ 11884 BIT_MASK_R_MU_STA_GTAB_POSITION_L_8821C) 11885 #define BIT_SET_R_MU_STA_GTAB_POSITION_L_8821C(x, v) \ 11886 (BIT_CLEAR_R_MU_STA_GTAB_POSITION_L_8821C(x) | \ 11887 BIT_R_MU_STA_GTAB_POSITION_L_8821C(v)) 11888 11889 /* 2 REG_MU_STA_USER_POS_INFO_H_8821C */ 11890 11891 #define BIT_SHIFT_R_MU_STA_GTAB_POSITION_H_8821C 0 11892 #define BIT_MASK_R_MU_STA_GTAB_POSITION_H_8821C 0xffffffffL 11893 #define BIT_R_MU_STA_GTAB_POSITION_H_8821C(x) \ 11894 (((x) & BIT_MASK_R_MU_STA_GTAB_POSITION_H_8821C) \ 11895 << BIT_SHIFT_R_MU_STA_GTAB_POSITION_H_8821C) 11896 #define BITS_R_MU_STA_GTAB_POSITION_H_8821C \ 11897 (BIT_MASK_R_MU_STA_GTAB_POSITION_H_8821C \ 11898 << BIT_SHIFT_R_MU_STA_GTAB_POSITION_H_8821C) 11899 #define BIT_CLEAR_R_MU_STA_GTAB_POSITION_H_8821C(x) \ 11900 ((x) & (~BITS_R_MU_STA_GTAB_POSITION_H_8821C)) 11901 #define BIT_GET_R_MU_STA_GTAB_POSITION_H_8821C(x) \ 11902 (((x) >> BIT_SHIFT_R_MU_STA_GTAB_POSITION_H_8821C) & \ 11903 BIT_MASK_R_MU_STA_GTAB_POSITION_H_8821C) 11904 #define BIT_SET_R_MU_STA_GTAB_POSITION_H_8821C(x, v) \ 11905 (BIT_CLEAR_R_MU_STA_GTAB_POSITION_H_8821C(x) | \ 11906 BIT_R_MU_STA_GTAB_POSITION_H_8821C(v)) 11907 11908 /* 2 REG_MU_TRX_DBG_CNT_8821C */ 11909 #define BIT_MU_DNGCNT_RST_8821C BIT(20) 11910 11911 #define BIT_SHIFT_MU_DBGCNT_SEL_8821C 16 11912 #define BIT_MASK_MU_DBGCNT_SEL_8821C 0xf 11913 #define BIT_MU_DBGCNT_SEL_8821C(x) \ 11914 (((x) & BIT_MASK_MU_DBGCNT_SEL_8821C) << BIT_SHIFT_MU_DBGCNT_SEL_8821C) 11915 #define BITS_MU_DBGCNT_SEL_8821C \ 11916 (BIT_MASK_MU_DBGCNT_SEL_8821C << BIT_SHIFT_MU_DBGCNT_SEL_8821C) 11917 #define BIT_CLEAR_MU_DBGCNT_SEL_8821C(x) ((x) & (~BITS_MU_DBGCNT_SEL_8821C)) 11918 #define BIT_GET_MU_DBGCNT_SEL_8821C(x) \ 11919 (((x) >> BIT_SHIFT_MU_DBGCNT_SEL_8821C) & BIT_MASK_MU_DBGCNT_SEL_8821C) 11920 #define BIT_SET_MU_DBGCNT_SEL_8821C(x, v) \ 11921 (BIT_CLEAR_MU_DBGCNT_SEL_8821C(x) | BIT_MU_DBGCNT_SEL_8821C(v)) 11922 11923 #define BIT_SHIFT_MU_DNGCNT_8821C 0 11924 #define BIT_MASK_MU_DNGCNT_8821C 0xffff 11925 #define BIT_MU_DNGCNT_8821C(x) \ 11926 (((x) & BIT_MASK_MU_DNGCNT_8821C) << BIT_SHIFT_MU_DNGCNT_8821C) 11927 #define BITS_MU_DNGCNT_8821C \ 11928 (BIT_MASK_MU_DNGCNT_8821C << BIT_SHIFT_MU_DNGCNT_8821C) 11929 #define BIT_CLEAR_MU_DNGCNT_8821C(x) ((x) & (~BITS_MU_DNGCNT_8821C)) 11930 #define BIT_GET_MU_DNGCNT_8821C(x) \ 11931 (((x) >> BIT_SHIFT_MU_DNGCNT_8821C) & BIT_MASK_MU_DNGCNT_8821C) 11932 #define BIT_SET_MU_DNGCNT_8821C(x, v) \ 11933 (BIT_CLEAR_MU_DNGCNT_8821C(x) | BIT_MU_DNGCNT_8821C(v)) 11934 11935 /* 2 REG_NOT_VALID_8821C */ 11936 11937 /* 2 REG_EDCA_VO_PARAM_8821C */ 11938 11939 #define BIT_SHIFT_TXOPLIMIT_8821C 16 11940 #define BIT_MASK_TXOPLIMIT_8821C 0x7ff 11941 #define BIT_TXOPLIMIT_8821C(x) \ 11942 (((x) & BIT_MASK_TXOPLIMIT_8821C) << BIT_SHIFT_TXOPLIMIT_8821C) 11943 #define BITS_TXOPLIMIT_8821C \ 11944 (BIT_MASK_TXOPLIMIT_8821C << BIT_SHIFT_TXOPLIMIT_8821C) 11945 #define BIT_CLEAR_TXOPLIMIT_8821C(x) ((x) & (~BITS_TXOPLIMIT_8821C)) 11946 #define BIT_GET_TXOPLIMIT_8821C(x) \ 11947 (((x) >> BIT_SHIFT_TXOPLIMIT_8821C) & BIT_MASK_TXOPLIMIT_8821C) 11948 #define BIT_SET_TXOPLIMIT_8821C(x, v) \ 11949 (BIT_CLEAR_TXOPLIMIT_8821C(x) | BIT_TXOPLIMIT_8821C(v)) 11950 11951 #define BIT_SHIFT_CW_8821C 8 11952 #define BIT_MASK_CW_8821C 0xff 11953 #define BIT_CW_8821C(x) (((x) & BIT_MASK_CW_8821C) << BIT_SHIFT_CW_8821C) 11954 #define BITS_CW_8821C (BIT_MASK_CW_8821C << BIT_SHIFT_CW_8821C) 11955 #define BIT_CLEAR_CW_8821C(x) ((x) & (~BITS_CW_8821C)) 11956 #define BIT_GET_CW_8821C(x) (((x) >> BIT_SHIFT_CW_8821C) & BIT_MASK_CW_8821C) 11957 #define BIT_SET_CW_8821C(x, v) (BIT_CLEAR_CW_8821C(x) | BIT_CW_8821C(v)) 11958 11959 #define BIT_SHIFT_AIFS_8821C 0 11960 #define BIT_MASK_AIFS_8821C 0xff 11961 #define BIT_AIFS_8821C(x) (((x) & BIT_MASK_AIFS_8821C) << BIT_SHIFT_AIFS_8821C) 11962 #define BITS_AIFS_8821C (BIT_MASK_AIFS_8821C << BIT_SHIFT_AIFS_8821C) 11963 #define BIT_CLEAR_AIFS_8821C(x) ((x) & (~BITS_AIFS_8821C)) 11964 #define BIT_GET_AIFS_8821C(x) \ 11965 (((x) >> BIT_SHIFT_AIFS_8821C) & BIT_MASK_AIFS_8821C) 11966 #define BIT_SET_AIFS_8821C(x, v) (BIT_CLEAR_AIFS_8821C(x) | BIT_AIFS_8821C(v)) 11967 11968 /* 2 REG_EDCA_VI_PARAM_8821C */ 11969 11970 /* 2 REG_NOT_VALID_8821C */ 11971 11972 #define BIT_SHIFT_TXOPLIMIT_8821C 16 11973 #define BIT_MASK_TXOPLIMIT_8821C 0x7ff 11974 #define BIT_TXOPLIMIT_8821C(x) \ 11975 (((x) & BIT_MASK_TXOPLIMIT_8821C) << BIT_SHIFT_TXOPLIMIT_8821C) 11976 #define BITS_TXOPLIMIT_8821C \ 11977 (BIT_MASK_TXOPLIMIT_8821C << BIT_SHIFT_TXOPLIMIT_8821C) 11978 #define BIT_CLEAR_TXOPLIMIT_8821C(x) ((x) & (~BITS_TXOPLIMIT_8821C)) 11979 #define BIT_GET_TXOPLIMIT_8821C(x) \ 11980 (((x) >> BIT_SHIFT_TXOPLIMIT_8821C) & BIT_MASK_TXOPLIMIT_8821C) 11981 #define BIT_SET_TXOPLIMIT_8821C(x, v) \ 11982 (BIT_CLEAR_TXOPLIMIT_8821C(x) | BIT_TXOPLIMIT_8821C(v)) 11983 11984 #define BIT_SHIFT_CW_8821C 8 11985 #define BIT_MASK_CW_8821C 0xff 11986 #define BIT_CW_8821C(x) (((x) & BIT_MASK_CW_8821C) << BIT_SHIFT_CW_8821C) 11987 #define BITS_CW_8821C (BIT_MASK_CW_8821C << BIT_SHIFT_CW_8821C) 11988 #define BIT_CLEAR_CW_8821C(x) ((x) & (~BITS_CW_8821C)) 11989 #define BIT_GET_CW_8821C(x) (((x) >> BIT_SHIFT_CW_8821C) & BIT_MASK_CW_8821C) 11990 #define BIT_SET_CW_8821C(x, v) (BIT_CLEAR_CW_8821C(x) | BIT_CW_8821C(v)) 11991 11992 #define BIT_SHIFT_AIFS_8821C 0 11993 #define BIT_MASK_AIFS_8821C 0xff 11994 #define BIT_AIFS_8821C(x) (((x) & BIT_MASK_AIFS_8821C) << BIT_SHIFT_AIFS_8821C) 11995 #define BITS_AIFS_8821C (BIT_MASK_AIFS_8821C << BIT_SHIFT_AIFS_8821C) 11996 #define BIT_CLEAR_AIFS_8821C(x) ((x) & (~BITS_AIFS_8821C)) 11997 #define BIT_GET_AIFS_8821C(x) \ 11998 (((x) >> BIT_SHIFT_AIFS_8821C) & BIT_MASK_AIFS_8821C) 11999 #define BIT_SET_AIFS_8821C(x, v) (BIT_CLEAR_AIFS_8821C(x) | BIT_AIFS_8821C(v)) 12000 12001 /* 2 REG_EDCA_BE_PARAM_8821C */ 12002 12003 /* 2 REG_NOT_VALID_8821C */ 12004 12005 #define BIT_SHIFT_TXOPLIMIT_8821C 16 12006 #define BIT_MASK_TXOPLIMIT_8821C 0x7ff 12007 #define BIT_TXOPLIMIT_8821C(x) \ 12008 (((x) & BIT_MASK_TXOPLIMIT_8821C) << BIT_SHIFT_TXOPLIMIT_8821C) 12009 #define BITS_TXOPLIMIT_8821C \ 12010 (BIT_MASK_TXOPLIMIT_8821C << BIT_SHIFT_TXOPLIMIT_8821C) 12011 #define BIT_CLEAR_TXOPLIMIT_8821C(x) ((x) & (~BITS_TXOPLIMIT_8821C)) 12012 #define BIT_GET_TXOPLIMIT_8821C(x) \ 12013 (((x) >> BIT_SHIFT_TXOPLIMIT_8821C) & BIT_MASK_TXOPLIMIT_8821C) 12014 #define BIT_SET_TXOPLIMIT_8821C(x, v) \ 12015 (BIT_CLEAR_TXOPLIMIT_8821C(x) | BIT_TXOPLIMIT_8821C(v)) 12016 12017 #define BIT_SHIFT_CW_8821C 8 12018 #define BIT_MASK_CW_8821C 0xff 12019 #define BIT_CW_8821C(x) (((x) & BIT_MASK_CW_8821C) << BIT_SHIFT_CW_8821C) 12020 #define BITS_CW_8821C (BIT_MASK_CW_8821C << BIT_SHIFT_CW_8821C) 12021 #define BIT_CLEAR_CW_8821C(x) ((x) & (~BITS_CW_8821C)) 12022 #define BIT_GET_CW_8821C(x) (((x) >> BIT_SHIFT_CW_8821C) & BIT_MASK_CW_8821C) 12023 #define BIT_SET_CW_8821C(x, v) (BIT_CLEAR_CW_8821C(x) | BIT_CW_8821C(v)) 12024 12025 #define BIT_SHIFT_AIFS_8821C 0 12026 #define BIT_MASK_AIFS_8821C 0xff 12027 #define BIT_AIFS_8821C(x) (((x) & BIT_MASK_AIFS_8821C) << BIT_SHIFT_AIFS_8821C) 12028 #define BITS_AIFS_8821C (BIT_MASK_AIFS_8821C << BIT_SHIFT_AIFS_8821C) 12029 #define BIT_CLEAR_AIFS_8821C(x) ((x) & (~BITS_AIFS_8821C)) 12030 #define BIT_GET_AIFS_8821C(x) \ 12031 (((x) >> BIT_SHIFT_AIFS_8821C) & BIT_MASK_AIFS_8821C) 12032 #define BIT_SET_AIFS_8821C(x, v) (BIT_CLEAR_AIFS_8821C(x) | BIT_AIFS_8821C(v)) 12033 12034 /* 2 REG_EDCA_BK_PARAM_8821C */ 12035 12036 /* 2 REG_NOT_VALID_8821C */ 12037 12038 #define BIT_SHIFT_TXOPLIMIT_8821C 16 12039 #define BIT_MASK_TXOPLIMIT_8821C 0x7ff 12040 #define BIT_TXOPLIMIT_8821C(x) \ 12041 (((x) & BIT_MASK_TXOPLIMIT_8821C) << BIT_SHIFT_TXOPLIMIT_8821C) 12042 #define BITS_TXOPLIMIT_8821C \ 12043 (BIT_MASK_TXOPLIMIT_8821C << BIT_SHIFT_TXOPLIMIT_8821C) 12044 #define BIT_CLEAR_TXOPLIMIT_8821C(x) ((x) & (~BITS_TXOPLIMIT_8821C)) 12045 #define BIT_GET_TXOPLIMIT_8821C(x) \ 12046 (((x) >> BIT_SHIFT_TXOPLIMIT_8821C) & BIT_MASK_TXOPLIMIT_8821C) 12047 #define BIT_SET_TXOPLIMIT_8821C(x, v) \ 12048 (BIT_CLEAR_TXOPLIMIT_8821C(x) | BIT_TXOPLIMIT_8821C(v)) 12049 12050 #define BIT_SHIFT_CW_8821C 8 12051 #define BIT_MASK_CW_8821C 0xff 12052 #define BIT_CW_8821C(x) (((x) & BIT_MASK_CW_8821C) << BIT_SHIFT_CW_8821C) 12053 #define BITS_CW_8821C (BIT_MASK_CW_8821C << BIT_SHIFT_CW_8821C) 12054 #define BIT_CLEAR_CW_8821C(x) ((x) & (~BITS_CW_8821C)) 12055 #define BIT_GET_CW_8821C(x) (((x) >> BIT_SHIFT_CW_8821C) & BIT_MASK_CW_8821C) 12056 #define BIT_SET_CW_8821C(x, v) (BIT_CLEAR_CW_8821C(x) | BIT_CW_8821C(v)) 12057 12058 #define BIT_SHIFT_AIFS_8821C 0 12059 #define BIT_MASK_AIFS_8821C 0xff 12060 #define BIT_AIFS_8821C(x) (((x) & BIT_MASK_AIFS_8821C) << BIT_SHIFT_AIFS_8821C) 12061 #define BITS_AIFS_8821C (BIT_MASK_AIFS_8821C << BIT_SHIFT_AIFS_8821C) 12062 #define BIT_CLEAR_AIFS_8821C(x) ((x) & (~BITS_AIFS_8821C)) 12063 #define BIT_GET_AIFS_8821C(x) \ 12064 (((x) >> BIT_SHIFT_AIFS_8821C) & BIT_MASK_AIFS_8821C) 12065 #define BIT_SET_AIFS_8821C(x, v) (BIT_CLEAR_AIFS_8821C(x) | BIT_AIFS_8821C(v)) 12066 12067 /* 2 REG_BCNTCFG_8821C */ 12068 12069 #define BIT_SHIFT_BCNCW_MAX_8821C 12 12070 #define BIT_MASK_BCNCW_MAX_8821C 0xf 12071 #define BIT_BCNCW_MAX_8821C(x) \ 12072 (((x) & BIT_MASK_BCNCW_MAX_8821C) << BIT_SHIFT_BCNCW_MAX_8821C) 12073 #define BITS_BCNCW_MAX_8821C \ 12074 (BIT_MASK_BCNCW_MAX_8821C << BIT_SHIFT_BCNCW_MAX_8821C) 12075 #define BIT_CLEAR_BCNCW_MAX_8821C(x) ((x) & (~BITS_BCNCW_MAX_8821C)) 12076 #define BIT_GET_BCNCW_MAX_8821C(x) \ 12077 (((x) >> BIT_SHIFT_BCNCW_MAX_8821C) & BIT_MASK_BCNCW_MAX_8821C) 12078 #define BIT_SET_BCNCW_MAX_8821C(x, v) \ 12079 (BIT_CLEAR_BCNCW_MAX_8821C(x) | BIT_BCNCW_MAX_8821C(v)) 12080 12081 #define BIT_SHIFT_BCNCW_MIN_8821C 8 12082 #define BIT_MASK_BCNCW_MIN_8821C 0xf 12083 #define BIT_BCNCW_MIN_8821C(x) \ 12084 (((x) & BIT_MASK_BCNCW_MIN_8821C) << BIT_SHIFT_BCNCW_MIN_8821C) 12085 #define BITS_BCNCW_MIN_8821C \ 12086 (BIT_MASK_BCNCW_MIN_8821C << BIT_SHIFT_BCNCW_MIN_8821C) 12087 #define BIT_CLEAR_BCNCW_MIN_8821C(x) ((x) & (~BITS_BCNCW_MIN_8821C)) 12088 #define BIT_GET_BCNCW_MIN_8821C(x) \ 12089 (((x) >> BIT_SHIFT_BCNCW_MIN_8821C) & BIT_MASK_BCNCW_MIN_8821C) 12090 #define BIT_SET_BCNCW_MIN_8821C(x, v) \ 12091 (BIT_CLEAR_BCNCW_MIN_8821C(x) | BIT_BCNCW_MIN_8821C(v)) 12092 12093 #define BIT_SHIFT_BCNIFS_8821C 0 12094 #define BIT_MASK_BCNIFS_8821C 0xff 12095 #define BIT_BCNIFS_8821C(x) \ 12096 (((x) & BIT_MASK_BCNIFS_8821C) << BIT_SHIFT_BCNIFS_8821C) 12097 #define BITS_BCNIFS_8821C (BIT_MASK_BCNIFS_8821C << BIT_SHIFT_BCNIFS_8821C) 12098 #define BIT_CLEAR_BCNIFS_8821C(x) ((x) & (~BITS_BCNIFS_8821C)) 12099 #define BIT_GET_BCNIFS_8821C(x) \ 12100 (((x) >> BIT_SHIFT_BCNIFS_8821C) & BIT_MASK_BCNIFS_8821C) 12101 #define BIT_SET_BCNIFS_8821C(x, v) \ 12102 (BIT_CLEAR_BCNIFS_8821C(x) | BIT_BCNIFS_8821C(v)) 12103 12104 /* 2 REG_NOT_VALID_8821C */ 12105 12106 /* 2 REG_PIFS_8821C */ 12107 12108 #define BIT_SHIFT_PIFS_8821C 0 12109 #define BIT_MASK_PIFS_8821C 0xff 12110 #define BIT_PIFS_8821C(x) (((x) & BIT_MASK_PIFS_8821C) << BIT_SHIFT_PIFS_8821C) 12111 #define BITS_PIFS_8821C (BIT_MASK_PIFS_8821C << BIT_SHIFT_PIFS_8821C) 12112 #define BIT_CLEAR_PIFS_8821C(x) ((x) & (~BITS_PIFS_8821C)) 12113 #define BIT_GET_PIFS_8821C(x) \ 12114 (((x) >> BIT_SHIFT_PIFS_8821C) & BIT_MASK_PIFS_8821C) 12115 #define BIT_SET_PIFS_8821C(x, v) (BIT_CLEAR_PIFS_8821C(x) | BIT_PIFS_8821C(v)) 12116 12117 /* 2 REG_RDG_PIFS_8821C */ 12118 12119 #define BIT_SHIFT_RDG_PIFS_8821C 0 12120 #define BIT_MASK_RDG_PIFS_8821C 0xff 12121 #define BIT_RDG_PIFS_8821C(x) \ 12122 (((x) & BIT_MASK_RDG_PIFS_8821C) << BIT_SHIFT_RDG_PIFS_8821C) 12123 #define BITS_RDG_PIFS_8821C \ 12124 (BIT_MASK_RDG_PIFS_8821C << BIT_SHIFT_RDG_PIFS_8821C) 12125 #define BIT_CLEAR_RDG_PIFS_8821C(x) ((x) & (~BITS_RDG_PIFS_8821C)) 12126 #define BIT_GET_RDG_PIFS_8821C(x) \ 12127 (((x) >> BIT_SHIFT_RDG_PIFS_8821C) & BIT_MASK_RDG_PIFS_8821C) 12128 #define BIT_SET_RDG_PIFS_8821C(x, v) \ 12129 (BIT_CLEAR_RDG_PIFS_8821C(x) | BIT_RDG_PIFS_8821C(v)) 12130 12131 /* 2 REG_SIFS_8821C */ 12132 12133 #define BIT_SHIFT_SIFS_OFDM_TRX_8821C 24 12134 #define BIT_MASK_SIFS_OFDM_TRX_8821C 0xff 12135 #define BIT_SIFS_OFDM_TRX_8821C(x) \ 12136 (((x) & BIT_MASK_SIFS_OFDM_TRX_8821C) << BIT_SHIFT_SIFS_OFDM_TRX_8821C) 12137 #define BITS_SIFS_OFDM_TRX_8821C \ 12138 (BIT_MASK_SIFS_OFDM_TRX_8821C << BIT_SHIFT_SIFS_OFDM_TRX_8821C) 12139 #define BIT_CLEAR_SIFS_OFDM_TRX_8821C(x) ((x) & (~BITS_SIFS_OFDM_TRX_8821C)) 12140 #define BIT_GET_SIFS_OFDM_TRX_8821C(x) \ 12141 (((x) >> BIT_SHIFT_SIFS_OFDM_TRX_8821C) & BIT_MASK_SIFS_OFDM_TRX_8821C) 12142 #define BIT_SET_SIFS_OFDM_TRX_8821C(x, v) \ 12143 (BIT_CLEAR_SIFS_OFDM_TRX_8821C(x) | BIT_SIFS_OFDM_TRX_8821C(v)) 12144 12145 #define BIT_SHIFT_SIFS_CCK_TRX_8821C 16 12146 #define BIT_MASK_SIFS_CCK_TRX_8821C 0xff 12147 #define BIT_SIFS_CCK_TRX_8821C(x) \ 12148 (((x) & BIT_MASK_SIFS_CCK_TRX_8821C) << BIT_SHIFT_SIFS_CCK_TRX_8821C) 12149 #define BITS_SIFS_CCK_TRX_8821C \ 12150 (BIT_MASK_SIFS_CCK_TRX_8821C << BIT_SHIFT_SIFS_CCK_TRX_8821C) 12151 #define BIT_CLEAR_SIFS_CCK_TRX_8821C(x) ((x) & (~BITS_SIFS_CCK_TRX_8821C)) 12152 #define BIT_GET_SIFS_CCK_TRX_8821C(x) \ 12153 (((x) >> BIT_SHIFT_SIFS_CCK_TRX_8821C) & BIT_MASK_SIFS_CCK_TRX_8821C) 12154 #define BIT_SET_SIFS_CCK_TRX_8821C(x, v) \ 12155 (BIT_CLEAR_SIFS_CCK_TRX_8821C(x) | BIT_SIFS_CCK_TRX_8821C(v)) 12156 12157 #define BIT_SHIFT_SIFS_OFDM_CTX_8821C 8 12158 #define BIT_MASK_SIFS_OFDM_CTX_8821C 0xff 12159 #define BIT_SIFS_OFDM_CTX_8821C(x) \ 12160 (((x) & BIT_MASK_SIFS_OFDM_CTX_8821C) << BIT_SHIFT_SIFS_OFDM_CTX_8821C) 12161 #define BITS_SIFS_OFDM_CTX_8821C \ 12162 (BIT_MASK_SIFS_OFDM_CTX_8821C << BIT_SHIFT_SIFS_OFDM_CTX_8821C) 12163 #define BIT_CLEAR_SIFS_OFDM_CTX_8821C(x) ((x) & (~BITS_SIFS_OFDM_CTX_8821C)) 12164 #define BIT_GET_SIFS_OFDM_CTX_8821C(x) \ 12165 (((x) >> BIT_SHIFT_SIFS_OFDM_CTX_8821C) & BIT_MASK_SIFS_OFDM_CTX_8821C) 12166 #define BIT_SET_SIFS_OFDM_CTX_8821C(x, v) \ 12167 (BIT_CLEAR_SIFS_OFDM_CTX_8821C(x) | BIT_SIFS_OFDM_CTX_8821C(v)) 12168 12169 #define BIT_SHIFT_SIFS_CCK_CTX_8821C 0 12170 #define BIT_MASK_SIFS_CCK_CTX_8821C 0xff 12171 #define BIT_SIFS_CCK_CTX_8821C(x) \ 12172 (((x) & BIT_MASK_SIFS_CCK_CTX_8821C) << BIT_SHIFT_SIFS_CCK_CTX_8821C) 12173 #define BITS_SIFS_CCK_CTX_8821C \ 12174 (BIT_MASK_SIFS_CCK_CTX_8821C << BIT_SHIFT_SIFS_CCK_CTX_8821C) 12175 #define BIT_CLEAR_SIFS_CCK_CTX_8821C(x) ((x) & (~BITS_SIFS_CCK_CTX_8821C)) 12176 #define BIT_GET_SIFS_CCK_CTX_8821C(x) \ 12177 (((x) >> BIT_SHIFT_SIFS_CCK_CTX_8821C) & BIT_MASK_SIFS_CCK_CTX_8821C) 12178 #define BIT_SET_SIFS_CCK_CTX_8821C(x, v) \ 12179 (BIT_CLEAR_SIFS_CCK_CTX_8821C(x) | BIT_SIFS_CCK_CTX_8821C(v)) 12180 12181 /* 2 REG_TSFTR_SYN_OFFSET_8821C */ 12182 12183 #define BIT_SHIFT_TSFTR_SNC_OFFSET_8821C 0 12184 #define BIT_MASK_TSFTR_SNC_OFFSET_8821C 0xffff 12185 #define BIT_TSFTR_SNC_OFFSET_8821C(x) \ 12186 (((x) & BIT_MASK_TSFTR_SNC_OFFSET_8821C) \ 12187 << BIT_SHIFT_TSFTR_SNC_OFFSET_8821C) 12188 #define BITS_TSFTR_SNC_OFFSET_8821C \ 12189 (BIT_MASK_TSFTR_SNC_OFFSET_8821C << BIT_SHIFT_TSFTR_SNC_OFFSET_8821C) 12190 #define BIT_CLEAR_TSFTR_SNC_OFFSET_8821C(x) \ 12191 ((x) & (~BITS_TSFTR_SNC_OFFSET_8821C)) 12192 #define BIT_GET_TSFTR_SNC_OFFSET_8821C(x) \ 12193 (((x) >> BIT_SHIFT_TSFTR_SNC_OFFSET_8821C) & \ 12194 BIT_MASK_TSFTR_SNC_OFFSET_8821C) 12195 #define BIT_SET_TSFTR_SNC_OFFSET_8821C(x, v) \ 12196 (BIT_CLEAR_TSFTR_SNC_OFFSET_8821C(x) | BIT_TSFTR_SNC_OFFSET_8821C(v)) 12197 12198 /* 2 REG_AGGR_BREAK_TIME_8821C */ 12199 12200 #define BIT_SHIFT_AGGR_BK_TIME_8821C 0 12201 #define BIT_MASK_AGGR_BK_TIME_8821C 0xff 12202 #define BIT_AGGR_BK_TIME_8821C(x) \ 12203 (((x) & BIT_MASK_AGGR_BK_TIME_8821C) << BIT_SHIFT_AGGR_BK_TIME_8821C) 12204 #define BITS_AGGR_BK_TIME_8821C \ 12205 (BIT_MASK_AGGR_BK_TIME_8821C << BIT_SHIFT_AGGR_BK_TIME_8821C) 12206 #define BIT_CLEAR_AGGR_BK_TIME_8821C(x) ((x) & (~BITS_AGGR_BK_TIME_8821C)) 12207 #define BIT_GET_AGGR_BK_TIME_8821C(x) \ 12208 (((x) >> BIT_SHIFT_AGGR_BK_TIME_8821C) & BIT_MASK_AGGR_BK_TIME_8821C) 12209 #define BIT_SET_AGGR_BK_TIME_8821C(x, v) \ 12210 (BIT_CLEAR_AGGR_BK_TIME_8821C(x) | BIT_AGGR_BK_TIME_8821C(v)) 12211 12212 /* 2 REG_SLOT_8821C */ 12213 12214 #define BIT_SHIFT_SLOT_8821C 0 12215 #define BIT_MASK_SLOT_8821C 0xff 12216 #define BIT_SLOT_8821C(x) (((x) & BIT_MASK_SLOT_8821C) << BIT_SHIFT_SLOT_8821C) 12217 #define BITS_SLOT_8821C (BIT_MASK_SLOT_8821C << BIT_SHIFT_SLOT_8821C) 12218 #define BIT_CLEAR_SLOT_8821C(x) ((x) & (~BITS_SLOT_8821C)) 12219 #define BIT_GET_SLOT_8821C(x) \ 12220 (((x) >> BIT_SHIFT_SLOT_8821C) & BIT_MASK_SLOT_8821C) 12221 #define BIT_SET_SLOT_8821C(x, v) (BIT_CLEAR_SLOT_8821C(x) | BIT_SLOT_8821C(v)) 12222 12223 /* 2 REG_NOA_ON_ERLY_TIME_8821C */ 12224 12225 #define BIT_SHIFT__NOA_ON_ERLY_TIME_8821C 0 12226 #define BIT_MASK__NOA_ON_ERLY_TIME_8821C 0xff 12227 #define BIT__NOA_ON_ERLY_TIME_8821C(x) \ 12228 (((x) & BIT_MASK__NOA_ON_ERLY_TIME_8821C) \ 12229 << BIT_SHIFT__NOA_ON_ERLY_TIME_8821C) 12230 #define BITS__NOA_ON_ERLY_TIME_8821C \ 12231 (BIT_MASK__NOA_ON_ERLY_TIME_8821C << BIT_SHIFT__NOA_ON_ERLY_TIME_8821C) 12232 #define BIT_CLEAR__NOA_ON_ERLY_TIME_8821C(x) \ 12233 ((x) & (~BITS__NOA_ON_ERLY_TIME_8821C)) 12234 #define BIT_GET__NOA_ON_ERLY_TIME_8821C(x) \ 12235 (((x) >> BIT_SHIFT__NOA_ON_ERLY_TIME_8821C) & \ 12236 BIT_MASK__NOA_ON_ERLY_TIME_8821C) 12237 #define BIT_SET__NOA_ON_ERLY_TIME_8821C(x, v) \ 12238 (BIT_CLEAR__NOA_ON_ERLY_TIME_8821C(x) | BIT__NOA_ON_ERLY_TIME_8821C(v)) 12239 12240 /* 2 REG_NOA_OFF_ERLY_TIME_8821C */ 12241 12242 #define BIT_SHIFT__NOA_OFF_ERLY_TIME_8821C 0 12243 #define BIT_MASK__NOA_OFF_ERLY_TIME_8821C 0xff 12244 #define BIT__NOA_OFF_ERLY_TIME_8821C(x) \ 12245 (((x) & BIT_MASK__NOA_OFF_ERLY_TIME_8821C) \ 12246 << BIT_SHIFT__NOA_OFF_ERLY_TIME_8821C) 12247 #define BITS__NOA_OFF_ERLY_TIME_8821C \ 12248 (BIT_MASK__NOA_OFF_ERLY_TIME_8821C \ 12249 << BIT_SHIFT__NOA_OFF_ERLY_TIME_8821C) 12250 #define BIT_CLEAR__NOA_OFF_ERLY_TIME_8821C(x) \ 12251 ((x) & (~BITS__NOA_OFF_ERLY_TIME_8821C)) 12252 #define BIT_GET__NOA_OFF_ERLY_TIME_8821C(x) \ 12253 (((x) >> BIT_SHIFT__NOA_OFF_ERLY_TIME_8821C) & \ 12254 BIT_MASK__NOA_OFF_ERLY_TIME_8821C) 12255 #define BIT_SET__NOA_OFF_ERLY_TIME_8821C(x, v) \ 12256 (BIT_CLEAR__NOA_OFF_ERLY_TIME_8821C(x) | \ 12257 BIT__NOA_OFF_ERLY_TIME_8821C(v)) 12258 12259 /* 2 REG_NOT_VALID_8821C */ 12260 12261 /* 2 REG_NOT_VALID_8821C */ 12262 12263 /* 2 REG_TX_PTCL_CTRL_8821C */ 12264 #define BIT_DIS_EDCCA_8821C BIT(15) 12265 #define BIT_DIS_CCA_8821C BIT(14) 12266 #define BIT_LSIG_TXOP_TXCMD_NAV_8821C BIT(13) 12267 #define BIT_SIFS_BK_EN_8821C BIT(12) 12268 12269 #define BIT_SHIFT_TXQ_NAV_MSK_8821C 8 12270 #define BIT_MASK_TXQ_NAV_MSK_8821C 0xf 12271 #define BIT_TXQ_NAV_MSK_8821C(x) \ 12272 (((x) & BIT_MASK_TXQ_NAV_MSK_8821C) << BIT_SHIFT_TXQ_NAV_MSK_8821C) 12273 #define BITS_TXQ_NAV_MSK_8821C \ 12274 (BIT_MASK_TXQ_NAV_MSK_8821C << BIT_SHIFT_TXQ_NAV_MSK_8821C) 12275 #define BIT_CLEAR_TXQ_NAV_MSK_8821C(x) ((x) & (~BITS_TXQ_NAV_MSK_8821C)) 12276 #define BIT_GET_TXQ_NAV_MSK_8821C(x) \ 12277 (((x) >> BIT_SHIFT_TXQ_NAV_MSK_8821C) & BIT_MASK_TXQ_NAV_MSK_8821C) 12278 #define BIT_SET_TXQ_NAV_MSK_8821C(x, v) \ 12279 (BIT_CLEAR_TXQ_NAV_MSK_8821C(x) | BIT_TXQ_NAV_MSK_8821C(v)) 12280 12281 #define BIT_DIS_CW_8821C BIT(7) 12282 #define BIT_NAV_END_TXOP_8821C BIT(6) 12283 #define BIT_RDG_END_TXOP_8821C BIT(5) 12284 #define BIT_AC_INBCN_HOLD_8821C BIT(4) 12285 #define BIT_MGTQ_TXOP_EN_8821C BIT(3) 12286 #define BIT_MGTQ_RTSMF_EN_8821C BIT(2) 12287 #define BIT_HIQ_RTSMF_EN_8821C BIT(1) 12288 #define BIT_BCN_RTSMF_EN_8821C BIT(0) 12289 12290 /* 2 REG_TXPAUSE_8821C */ 12291 #define BIT_STOP_BCN_HI_MGT_8821C BIT(7) 12292 #define BIT_MAC_STOPBCNQ_8821C BIT(6) 12293 #define BIT_MAC_STOPHIQ_8821C BIT(5) 12294 #define BIT_MAC_STOPMGQ_8821C BIT(4) 12295 #define BIT_MAC_STOPBK_8821C BIT(3) 12296 #define BIT_MAC_STOPBE_8821C BIT(2) 12297 #define BIT_MAC_STOPVI_8821C BIT(1) 12298 #define BIT_MAC_STOPVO_8821C BIT(0) 12299 12300 /* 2 REG_DIS_TXREQ_CLR_8821C */ 12301 #define BIT_DIS_BT_CCA_8821C BIT(7) 12302 #define BIT_DIS_TXREQ_CLR_HI_8821C BIT(5) 12303 #define BIT_DIS_TXREQ_CLR_MGQ_8821C BIT(4) 12304 #define BIT_DIS_TXREQ_CLR_VO_8821C BIT(3) 12305 #define BIT_DIS_TXREQ_CLR_VI_8821C BIT(2) 12306 #define BIT_DIS_TXREQ_CLR_BE_8821C BIT(1) 12307 #define BIT_DIS_TXREQ_CLR_BK_8821C BIT(0) 12308 12309 /* 2 REG_RD_CTRL_8821C */ 12310 #define BIT_EN_CLR_TXREQ_INCCA_8821C BIT(15) 12311 #define BIT_DIS_TX_OVER_BCNQ_8821C BIT(14) 12312 #define BIT_EN_BCNERR_INCCCA_8821C BIT(13) 12313 #define BIT_EDCCA_MSK_CNTDOWN_EN_8821C BIT(11) 12314 #define BIT_DIS_TXOP_CFE_8821C BIT(10) 12315 #define BIT_DIS_LSIG_CFE_8821C BIT(9) 12316 #define BIT_DIS_STBC_CFE_8821C BIT(8) 12317 #define BIT_BKQ_RD_INIT_EN_8821C BIT(7) 12318 #define BIT_BEQ_RD_INIT_EN_8821C BIT(6) 12319 #define BIT_VIQ_RD_INIT_EN_8821C BIT(5) 12320 #define BIT_VOQ_RD_INIT_EN_8821C BIT(4) 12321 #define BIT_BKQ_RD_RESP_EN_8821C BIT(3) 12322 #define BIT_BEQ_RD_RESP_EN_8821C BIT(2) 12323 #define BIT_VIQ_RD_RESP_EN_8821C BIT(1) 12324 #define BIT_VOQ_RD_RESP_EN_8821C BIT(0) 12325 12326 /* 2 REG_MBSSID_CTRL_8821C */ 12327 #define BIT_MBID_BCNQ7_EN_8821C BIT(7) 12328 #define BIT_MBID_BCNQ6_EN_8821C BIT(6) 12329 #define BIT_MBID_BCNQ5_EN_8821C BIT(5) 12330 #define BIT_MBID_BCNQ4_EN_8821C BIT(4) 12331 #define BIT_MBID_BCNQ3_EN_8821C BIT(3) 12332 #define BIT_MBID_BCNQ2_EN_8821C BIT(2) 12333 #define BIT_MBID_BCNQ1_EN_8821C BIT(1) 12334 #define BIT_MBID_BCNQ0_EN_8821C BIT(0) 12335 12336 /* 2 REG_P2PPS_CTRL_8821C */ 12337 #define BIT_P2P_CTW_ALLSTASLEEP_8821C BIT(7) 12338 #define BIT_P2P_OFF_DISTX_EN_8821C BIT(6) 12339 #define BIT_PWR_MGT_EN_8821C BIT(5) 12340 #define BIT_P2P_NOA1_EN_8821C BIT(2) 12341 #define BIT_P2P_NOA0_EN_8821C BIT(1) 12342 12343 /* 2 REG_PKT_LIFETIME_CTRL_8821C */ 12344 #define BIT_EN_P2P_CTWND1_8821C BIT(23) 12345 #define BIT_EN_BKF_CLR_TXREQ_8821C BIT(22) 12346 #define BIT_EN_TSFBIT32_RST_P2P_8821C BIT(21) 12347 #define BIT_EN_BCN_TX_BTCCA_8821C BIT(20) 12348 #define BIT_DIS_PKT_TX_ATIM_8821C BIT(19) 12349 #define BIT_DIS_BCN_DIS_CTN_8821C BIT(18) 12350 #define BIT_EN_NAVEND_RST_TXOP_8821C BIT(17) 12351 #define BIT_EN_FILTER_CCA_8821C BIT(16) 12352 12353 #define BIT_SHIFT_CCA_FILTER_THRS_8821C 8 12354 #define BIT_MASK_CCA_FILTER_THRS_8821C 0xff 12355 #define BIT_CCA_FILTER_THRS_8821C(x) \ 12356 (((x) & BIT_MASK_CCA_FILTER_THRS_8821C) \ 12357 << BIT_SHIFT_CCA_FILTER_THRS_8821C) 12358 #define BITS_CCA_FILTER_THRS_8821C \ 12359 (BIT_MASK_CCA_FILTER_THRS_8821C << BIT_SHIFT_CCA_FILTER_THRS_8821C) 12360 #define BIT_CLEAR_CCA_FILTER_THRS_8821C(x) ((x) & (~BITS_CCA_FILTER_THRS_8821C)) 12361 #define BIT_GET_CCA_FILTER_THRS_8821C(x) \ 12362 (((x) >> BIT_SHIFT_CCA_FILTER_THRS_8821C) & \ 12363 BIT_MASK_CCA_FILTER_THRS_8821C) 12364 #define BIT_SET_CCA_FILTER_THRS_8821C(x, v) \ 12365 (BIT_CLEAR_CCA_FILTER_THRS_8821C(x) | BIT_CCA_FILTER_THRS_8821C(v)) 12366 12367 #define BIT_SHIFT_EDCCA_THRS_8821C 0 12368 #define BIT_MASK_EDCCA_THRS_8821C 0xff 12369 #define BIT_EDCCA_THRS_8821C(x) \ 12370 (((x) & BIT_MASK_EDCCA_THRS_8821C) << BIT_SHIFT_EDCCA_THRS_8821C) 12371 #define BITS_EDCCA_THRS_8821C \ 12372 (BIT_MASK_EDCCA_THRS_8821C << BIT_SHIFT_EDCCA_THRS_8821C) 12373 #define BIT_CLEAR_EDCCA_THRS_8821C(x) ((x) & (~BITS_EDCCA_THRS_8821C)) 12374 #define BIT_GET_EDCCA_THRS_8821C(x) \ 12375 (((x) >> BIT_SHIFT_EDCCA_THRS_8821C) & BIT_MASK_EDCCA_THRS_8821C) 12376 #define BIT_SET_EDCCA_THRS_8821C(x, v) \ 12377 (BIT_CLEAR_EDCCA_THRS_8821C(x) | BIT_EDCCA_THRS_8821C(v)) 12378 12379 /* 2 REG_P2PPS_SPEC_STATE_8821C */ 12380 #define BIT_SPEC_POWER_STATE_8821C BIT(7) 12381 #define BIT_SPEC_CTWINDOW_ON_8821C BIT(6) 12382 #define BIT_SPEC_BEACON_AREA_ON_8821C BIT(5) 12383 #define BIT_SPEC_CTWIN_EARLY_DISTX_8821C BIT(4) 12384 #define BIT_SPEC_NOA1_OFF_PERIOD_8821C BIT(3) 12385 #define BIT_SPEC_FORCE_DOZE1_8821C BIT(2) 12386 #define BIT_SPEC_NOA0_OFF_PERIOD_8821C BIT(1) 12387 #define BIT_SPEC_FORCE_DOZE0_8821C BIT(0) 12388 12389 /* 2 REG_NOT_VALID_8821C */ 12390 12391 /* 2 REG_BAR_TX_CTRL_8821C */ 12392 12393 /* 2 REG_P2PON_DIS_TXTIME_8821C */ 12394 12395 #define BIT_SHIFT_P2PON_DIS_TXTIME_8821C 0 12396 #define BIT_MASK_P2PON_DIS_TXTIME_8821C 0xff 12397 #define BIT_P2PON_DIS_TXTIME_8821C(x) \ 12398 (((x) & BIT_MASK_P2PON_DIS_TXTIME_8821C) \ 12399 << BIT_SHIFT_P2PON_DIS_TXTIME_8821C) 12400 #define BITS_P2PON_DIS_TXTIME_8821C \ 12401 (BIT_MASK_P2PON_DIS_TXTIME_8821C << BIT_SHIFT_P2PON_DIS_TXTIME_8821C) 12402 #define BIT_CLEAR_P2PON_DIS_TXTIME_8821C(x) \ 12403 ((x) & (~BITS_P2PON_DIS_TXTIME_8821C)) 12404 #define BIT_GET_P2PON_DIS_TXTIME_8821C(x) \ 12405 (((x) >> BIT_SHIFT_P2PON_DIS_TXTIME_8821C) & \ 12406 BIT_MASK_P2PON_DIS_TXTIME_8821C) 12407 #define BIT_SET_P2PON_DIS_TXTIME_8821C(x, v) \ 12408 (BIT_CLEAR_P2PON_DIS_TXTIME_8821C(x) | BIT_P2PON_DIS_TXTIME_8821C(v)) 12409 12410 /* 2 REG_NOT_VALID_8821C */ 12411 12412 /* 2 REG_NOT_VALID_8821C */ 12413 12414 /* 2 REG_NOT_VALID_8821C */ 12415 12416 /* 2 REG_NOT_VALID_8821C */ 12417 12418 /* 2 REG_NOT_VALID_8821C */ 12419 12420 /* 2 REG_TBTT_PROHIBIT_8821C */ 12421 12422 #define BIT_SHIFT_TBTT_HOLD_TIME_AP_8821C 8 12423 #define BIT_MASK_TBTT_HOLD_TIME_AP_8821C 0xfff 12424 #define BIT_TBTT_HOLD_TIME_AP_8821C(x) \ 12425 (((x) & BIT_MASK_TBTT_HOLD_TIME_AP_8821C) \ 12426 << BIT_SHIFT_TBTT_HOLD_TIME_AP_8821C) 12427 #define BITS_TBTT_HOLD_TIME_AP_8821C \ 12428 (BIT_MASK_TBTT_HOLD_TIME_AP_8821C << BIT_SHIFT_TBTT_HOLD_TIME_AP_8821C) 12429 #define BIT_CLEAR_TBTT_HOLD_TIME_AP_8821C(x) \ 12430 ((x) & (~BITS_TBTT_HOLD_TIME_AP_8821C)) 12431 #define BIT_GET_TBTT_HOLD_TIME_AP_8821C(x) \ 12432 (((x) >> BIT_SHIFT_TBTT_HOLD_TIME_AP_8821C) & \ 12433 BIT_MASK_TBTT_HOLD_TIME_AP_8821C) 12434 #define BIT_SET_TBTT_HOLD_TIME_AP_8821C(x, v) \ 12435 (BIT_CLEAR_TBTT_HOLD_TIME_AP_8821C(x) | BIT_TBTT_HOLD_TIME_AP_8821C(v)) 12436 12437 #define BIT_SHIFT_TBTT_PROHIBIT_SETUP_8821C 0 12438 #define BIT_MASK_TBTT_PROHIBIT_SETUP_8821C 0xf 12439 #define BIT_TBTT_PROHIBIT_SETUP_8821C(x) \ 12440 (((x) & BIT_MASK_TBTT_PROHIBIT_SETUP_8821C) \ 12441 << BIT_SHIFT_TBTT_PROHIBIT_SETUP_8821C) 12442 #define BITS_TBTT_PROHIBIT_SETUP_8821C \ 12443 (BIT_MASK_TBTT_PROHIBIT_SETUP_8821C \ 12444 << BIT_SHIFT_TBTT_PROHIBIT_SETUP_8821C) 12445 #define BIT_CLEAR_TBTT_PROHIBIT_SETUP_8821C(x) \ 12446 ((x) & (~BITS_TBTT_PROHIBIT_SETUP_8821C)) 12447 #define BIT_GET_TBTT_PROHIBIT_SETUP_8821C(x) \ 12448 (((x) >> BIT_SHIFT_TBTT_PROHIBIT_SETUP_8821C) & \ 12449 BIT_MASK_TBTT_PROHIBIT_SETUP_8821C) 12450 #define BIT_SET_TBTT_PROHIBIT_SETUP_8821C(x, v) \ 12451 (BIT_CLEAR_TBTT_PROHIBIT_SETUP_8821C(x) | \ 12452 BIT_TBTT_PROHIBIT_SETUP_8821C(v)) 12453 12454 /* 2 REG_P2PPS_STATE_8821C */ 12455 #define BIT_POWER_STATE_8821C BIT(7) 12456 #define BIT_CTWINDOW_ON_8821C BIT(6) 12457 #define BIT_BEACON_AREA_ON_8821C BIT(5) 12458 #define BIT_CTWIN_EARLY_DISTX_8821C BIT(4) 12459 #define BIT_NOA1_OFF_PERIOD_8821C BIT(3) 12460 #define BIT_FORCE_DOZE1_8821C BIT(2) 12461 #define BIT_NOA0_OFF_PERIOD_8821C BIT(1) 12462 #define BIT_FORCE_DOZE0_8821C BIT(0) 12463 12464 /* 2 REG_RD_NAV_NXT_8821C */ 12465 12466 #define BIT_SHIFT_RD_NAV_PROT_NXT_8821C 0 12467 #define BIT_MASK_RD_NAV_PROT_NXT_8821C 0xffff 12468 #define BIT_RD_NAV_PROT_NXT_8821C(x) \ 12469 (((x) & BIT_MASK_RD_NAV_PROT_NXT_8821C) \ 12470 << BIT_SHIFT_RD_NAV_PROT_NXT_8821C) 12471 #define BITS_RD_NAV_PROT_NXT_8821C \ 12472 (BIT_MASK_RD_NAV_PROT_NXT_8821C << BIT_SHIFT_RD_NAV_PROT_NXT_8821C) 12473 #define BIT_CLEAR_RD_NAV_PROT_NXT_8821C(x) ((x) & (~BITS_RD_NAV_PROT_NXT_8821C)) 12474 #define BIT_GET_RD_NAV_PROT_NXT_8821C(x) \ 12475 (((x) >> BIT_SHIFT_RD_NAV_PROT_NXT_8821C) & \ 12476 BIT_MASK_RD_NAV_PROT_NXT_8821C) 12477 #define BIT_SET_RD_NAV_PROT_NXT_8821C(x, v) \ 12478 (BIT_CLEAR_RD_NAV_PROT_NXT_8821C(x) | BIT_RD_NAV_PROT_NXT_8821C(v)) 12479 12480 /* 2 REG_NAV_PROT_LEN_8821C */ 12481 12482 #define BIT_SHIFT_NAV_PROT_LEN_8821C 0 12483 #define BIT_MASK_NAV_PROT_LEN_8821C 0xffff 12484 #define BIT_NAV_PROT_LEN_8821C(x) \ 12485 (((x) & BIT_MASK_NAV_PROT_LEN_8821C) << BIT_SHIFT_NAV_PROT_LEN_8821C) 12486 #define BITS_NAV_PROT_LEN_8821C \ 12487 (BIT_MASK_NAV_PROT_LEN_8821C << BIT_SHIFT_NAV_PROT_LEN_8821C) 12488 #define BIT_CLEAR_NAV_PROT_LEN_8821C(x) ((x) & (~BITS_NAV_PROT_LEN_8821C)) 12489 #define BIT_GET_NAV_PROT_LEN_8821C(x) \ 12490 (((x) >> BIT_SHIFT_NAV_PROT_LEN_8821C) & BIT_MASK_NAV_PROT_LEN_8821C) 12491 #define BIT_SET_NAV_PROT_LEN_8821C(x, v) \ 12492 (BIT_CLEAR_NAV_PROT_LEN_8821C(x) | BIT_NAV_PROT_LEN_8821C(v)) 12493 12494 /* 2 REG_NOT_VALID_8821C */ 12495 12496 /* 2 REG_NOT_VALID_8821C */ 12497 12498 /* 2 REG_BCN_CTRL_8821C */ 12499 #define BIT_DIS_RX_BSSID_FIT_8821C BIT(6) 12500 #define BIT_P0_EN_TXBCN_RPT_8821C BIT(5) 12501 #define BIT_DIS_TSF_UDT_8821C BIT(4) 12502 #define BIT_EN_BCN_FUNCTION_8821C BIT(3) 12503 #define BIT_P0_EN_RXBCN_RPT_8821C BIT(2) 12504 #define BIT_EN_P2P_CTWINDOW_8821C BIT(1) 12505 #define BIT_EN_P2P_BCNQ_AREA_8821C BIT(0) 12506 12507 /* 2 REG_BCN_CTRL_CLINT0_8821C */ 12508 #define BIT_CLI0_DIS_RX_BSSID_FIT_8821C BIT(6) 12509 #define BIT_CLI0_DIS_TSF_UDT_8821C BIT(4) 12510 #define BIT_CLI0_EN_BCN_FUNCTION_8821C BIT(3) 12511 #define BIT_CLI0_EN_RXBCN_RPT_8821C BIT(2) 12512 #define BIT_CLI0_ENP2P_CTWINDOW_8821C BIT(1) 12513 #define BIT_CLI0_ENP2P_BCNQ_AREA_8821C BIT(0) 12514 12515 /* 2 REG_MBID_NUM_8821C */ 12516 #define BIT_EN_PRE_DL_BEACON_8821C BIT(3) 12517 12518 #define BIT_SHIFT_MBID_BCN_NUM_8821C 0 12519 #define BIT_MASK_MBID_BCN_NUM_8821C 0x7 12520 #define BIT_MBID_BCN_NUM_8821C(x) \ 12521 (((x) & BIT_MASK_MBID_BCN_NUM_8821C) << BIT_SHIFT_MBID_BCN_NUM_8821C) 12522 #define BITS_MBID_BCN_NUM_8821C \ 12523 (BIT_MASK_MBID_BCN_NUM_8821C << BIT_SHIFT_MBID_BCN_NUM_8821C) 12524 #define BIT_CLEAR_MBID_BCN_NUM_8821C(x) ((x) & (~BITS_MBID_BCN_NUM_8821C)) 12525 #define BIT_GET_MBID_BCN_NUM_8821C(x) \ 12526 (((x) >> BIT_SHIFT_MBID_BCN_NUM_8821C) & BIT_MASK_MBID_BCN_NUM_8821C) 12527 #define BIT_SET_MBID_BCN_NUM_8821C(x, v) \ 12528 (BIT_CLEAR_MBID_BCN_NUM_8821C(x) | BIT_MBID_BCN_NUM_8821C(v)) 12529 12530 /* 2 REG_DUAL_TSF_RST_8821C */ 12531 #define BIT_FREECNT_RST_8821C BIT(5) 12532 #define BIT_TSFTR_CLI3_RST_8821C BIT(4) 12533 #define BIT_TSFTR_CLI2_RST_8821C BIT(3) 12534 #define BIT_TSFTR_CLI1_RST_8821C BIT(2) 12535 #define BIT_TSFTR_CLI0_RST_8821C BIT(1) 12536 #define BIT_TSFTR_RST_8821C BIT(0) 12537 12538 /* 2 REG_MBSSID_BCN_SPACE_8821C */ 12539 12540 #define BIT_SHIFT_BCN_TIMER_SEL_FWRD_8821C 28 12541 #define BIT_MASK_BCN_TIMER_SEL_FWRD_8821C 0x7 12542 #define BIT_BCN_TIMER_SEL_FWRD_8821C(x) \ 12543 (((x) & BIT_MASK_BCN_TIMER_SEL_FWRD_8821C) \ 12544 << BIT_SHIFT_BCN_TIMER_SEL_FWRD_8821C) 12545 #define BITS_BCN_TIMER_SEL_FWRD_8821C \ 12546 (BIT_MASK_BCN_TIMER_SEL_FWRD_8821C \ 12547 << BIT_SHIFT_BCN_TIMER_SEL_FWRD_8821C) 12548 #define BIT_CLEAR_BCN_TIMER_SEL_FWRD_8821C(x) \ 12549 ((x) & (~BITS_BCN_TIMER_SEL_FWRD_8821C)) 12550 #define BIT_GET_BCN_TIMER_SEL_FWRD_8821C(x) \ 12551 (((x) >> BIT_SHIFT_BCN_TIMER_SEL_FWRD_8821C) & \ 12552 BIT_MASK_BCN_TIMER_SEL_FWRD_8821C) 12553 #define BIT_SET_BCN_TIMER_SEL_FWRD_8821C(x, v) \ 12554 (BIT_CLEAR_BCN_TIMER_SEL_FWRD_8821C(x) | \ 12555 BIT_BCN_TIMER_SEL_FWRD_8821C(v)) 12556 12557 #define BIT_SHIFT_BCN_SPACE_CLINT0_8821C 16 12558 #define BIT_MASK_BCN_SPACE_CLINT0_8821C 0xfff 12559 #define BIT_BCN_SPACE_CLINT0_8821C(x) \ 12560 (((x) & BIT_MASK_BCN_SPACE_CLINT0_8821C) \ 12561 << BIT_SHIFT_BCN_SPACE_CLINT0_8821C) 12562 #define BITS_BCN_SPACE_CLINT0_8821C \ 12563 (BIT_MASK_BCN_SPACE_CLINT0_8821C << BIT_SHIFT_BCN_SPACE_CLINT0_8821C) 12564 #define BIT_CLEAR_BCN_SPACE_CLINT0_8821C(x) \ 12565 ((x) & (~BITS_BCN_SPACE_CLINT0_8821C)) 12566 #define BIT_GET_BCN_SPACE_CLINT0_8821C(x) \ 12567 (((x) >> BIT_SHIFT_BCN_SPACE_CLINT0_8821C) & \ 12568 BIT_MASK_BCN_SPACE_CLINT0_8821C) 12569 #define BIT_SET_BCN_SPACE_CLINT0_8821C(x, v) \ 12570 (BIT_CLEAR_BCN_SPACE_CLINT0_8821C(x) | BIT_BCN_SPACE_CLINT0_8821C(v)) 12571 12572 #define BIT_SHIFT_BCN_SPACE0_8821C 0 12573 #define BIT_MASK_BCN_SPACE0_8821C 0xffff 12574 #define BIT_BCN_SPACE0_8821C(x) \ 12575 (((x) & BIT_MASK_BCN_SPACE0_8821C) << BIT_SHIFT_BCN_SPACE0_8821C) 12576 #define BITS_BCN_SPACE0_8821C \ 12577 (BIT_MASK_BCN_SPACE0_8821C << BIT_SHIFT_BCN_SPACE0_8821C) 12578 #define BIT_CLEAR_BCN_SPACE0_8821C(x) ((x) & (~BITS_BCN_SPACE0_8821C)) 12579 #define BIT_GET_BCN_SPACE0_8821C(x) \ 12580 (((x) >> BIT_SHIFT_BCN_SPACE0_8821C) & BIT_MASK_BCN_SPACE0_8821C) 12581 #define BIT_SET_BCN_SPACE0_8821C(x, v) \ 12582 (BIT_CLEAR_BCN_SPACE0_8821C(x) | BIT_BCN_SPACE0_8821C(v)) 12583 12584 /* 2 REG_DRVERLYINT_8821C */ 12585 12586 #define BIT_SHIFT_DRVERLYITV_8821C 0 12587 #define BIT_MASK_DRVERLYITV_8821C 0xff 12588 #define BIT_DRVERLYITV_8821C(x) \ 12589 (((x) & BIT_MASK_DRVERLYITV_8821C) << BIT_SHIFT_DRVERLYITV_8821C) 12590 #define BITS_DRVERLYITV_8821C \ 12591 (BIT_MASK_DRVERLYITV_8821C << BIT_SHIFT_DRVERLYITV_8821C) 12592 #define BIT_CLEAR_DRVERLYITV_8821C(x) ((x) & (~BITS_DRVERLYITV_8821C)) 12593 #define BIT_GET_DRVERLYITV_8821C(x) \ 12594 (((x) >> BIT_SHIFT_DRVERLYITV_8821C) & BIT_MASK_DRVERLYITV_8821C) 12595 #define BIT_SET_DRVERLYITV_8821C(x, v) \ 12596 (BIT_CLEAR_DRVERLYITV_8821C(x) | BIT_DRVERLYITV_8821C(v)) 12597 12598 /* 2 REG_BCNDMATIM_8821C */ 12599 12600 #define BIT_SHIFT_BCNDMATIM_8821C 0 12601 #define BIT_MASK_BCNDMATIM_8821C 0xff 12602 #define BIT_BCNDMATIM_8821C(x) \ 12603 (((x) & BIT_MASK_BCNDMATIM_8821C) << BIT_SHIFT_BCNDMATIM_8821C) 12604 #define BITS_BCNDMATIM_8821C \ 12605 (BIT_MASK_BCNDMATIM_8821C << BIT_SHIFT_BCNDMATIM_8821C) 12606 #define BIT_CLEAR_BCNDMATIM_8821C(x) ((x) & (~BITS_BCNDMATIM_8821C)) 12607 #define BIT_GET_BCNDMATIM_8821C(x) \ 12608 (((x) >> BIT_SHIFT_BCNDMATIM_8821C) & BIT_MASK_BCNDMATIM_8821C) 12609 #define BIT_SET_BCNDMATIM_8821C(x, v) \ 12610 (BIT_CLEAR_BCNDMATIM_8821C(x) | BIT_BCNDMATIM_8821C(v)) 12611 12612 /* 2 REG_ATIMWND_8821C */ 12613 12614 #define BIT_SHIFT_ATIMWND0_8821C 0 12615 #define BIT_MASK_ATIMWND0_8821C 0xffff 12616 #define BIT_ATIMWND0_8821C(x) \ 12617 (((x) & BIT_MASK_ATIMWND0_8821C) << BIT_SHIFT_ATIMWND0_8821C) 12618 #define BITS_ATIMWND0_8821C \ 12619 (BIT_MASK_ATIMWND0_8821C << BIT_SHIFT_ATIMWND0_8821C) 12620 #define BIT_CLEAR_ATIMWND0_8821C(x) ((x) & (~BITS_ATIMWND0_8821C)) 12621 #define BIT_GET_ATIMWND0_8821C(x) \ 12622 (((x) >> BIT_SHIFT_ATIMWND0_8821C) & BIT_MASK_ATIMWND0_8821C) 12623 #define BIT_SET_ATIMWND0_8821C(x, v) \ 12624 (BIT_CLEAR_ATIMWND0_8821C(x) | BIT_ATIMWND0_8821C(v)) 12625 12626 /* 2 REG_USTIME_TSF_8821C */ 12627 12628 #define BIT_SHIFT_USTIME_TSF_V1_8821C 0 12629 #define BIT_MASK_USTIME_TSF_V1_8821C 0xff 12630 #define BIT_USTIME_TSF_V1_8821C(x) \ 12631 (((x) & BIT_MASK_USTIME_TSF_V1_8821C) << BIT_SHIFT_USTIME_TSF_V1_8821C) 12632 #define BITS_USTIME_TSF_V1_8821C \ 12633 (BIT_MASK_USTIME_TSF_V1_8821C << BIT_SHIFT_USTIME_TSF_V1_8821C) 12634 #define BIT_CLEAR_USTIME_TSF_V1_8821C(x) ((x) & (~BITS_USTIME_TSF_V1_8821C)) 12635 #define BIT_GET_USTIME_TSF_V1_8821C(x) \ 12636 (((x) >> BIT_SHIFT_USTIME_TSF_V1_8821C) & BIT_MASK_USTIME_TSF_V1_8821C) 12637 #define BIT_SET_USTIME_TSF_V1_8821C(x, v) \ 12638 (BIT_CLEAR_USTIME_TSF_V1_8821C(x) | BIT_USTIME_TSF_V1_8821C(v)) 12639 12640 /* 2 REG_BCN_MAX_ERR_8821C */ 12641 12642 #define BIT_SHIFT_BCN_MAX_ERR_8821C 0 12643 #define BIT_MASK_BCN_MAX_ERR_8821C 0xff 12644 #define BIT_BCN_MAX_ERR_8821C(x) \ 12645 (((x) & BIT_MASK_BCN_MAX_ERR_8821C) << BIT_SHIFT_BCN_MAX_ERR_8821C) 12646 #define BITS_BCN_MAX_ERR_8821C \ 12647 (BIT_MASK_BCN_MAX_ERR_8821C << BIT_SHIFT_BCN_MAX_ERR_8821C) 12648 #define BIT_CLEAR_BCN_MAX_ERR_8821C(x) ((x) & (~BITS_BCN_MAX_ERR_8821C)) 12649 #define BIT_GET_BCN_MAX_ERR_8821C(x) \ 12650 (((x) >> BIT_SHIFT_BCN_MAX_ERR_8821C) & BIT_MASK_BCN_MAX_ERR_8821C) 12651 #define BIT_SET_BCN_MAX_ERR_8821C(x, v) \ 12652 (BIT_CLEAR_BCN_MAX_ERR_8821C(x) | BIT_BCN_MAX_ERR_8821C(v)) 12653 12654 /* 2 REG_RXTSF_OFFSET_CCK_8821C */ 12655 12656 #define BIT_SHIFT_CCK_RXTSF_OFFSET_8821C 0 12657 #define BIT_MASK_CCK_RXTSF_OFFSET_8821C 0xff 12658 #define BIT_CCK_RXTSF_OFFSET_8821C(x) \ 12659 (((x) & BIT_MASK_CCK_RXTSF_OFFSET_8821C) \ 12660 << BIT_SHIFT_CCK_RXTSF_OFFSET_8821C) 12661 #define BITS_CCK_RXTSF_OFFSET_8821C \ 12662 (BIT_MASK_CCK_RXTSF_OFFSET_8821C << BIT_SHIFT_CCK_RXTSF_OFFSET_8821C) 12663 #define BIT_CLEAR_CCK_RXTSF_OFFSET_8821C(x) \ 12664 ((x) & (~BITS_CCK_RXTSF_OFFSET_8821C)) 12665 #define BIT_GET_CCK_RXTSF_OFFSET_8821C(x) \ 12666 (((x) >> BIT_SHIFT_CCK_RXTSF_OFFSET_8821C) & \ 12667 BIT_MASK_CCK_RXTSF_OFFSET_8821C) 12668 #define BIT_SET_CCK_RXTSF_OFFSET_8821C(x, v) \ 12669 (BIT_CLEAR_CCK_RXTSF_OFFSET_8821C(x) | BIT_CCK_RXTSF_OFFSET_8821C(v)) 12670 12671 /* 2 REG_RXTSF_OFFSET_OFDM_8821C */ 12672 12673 #define BIT_SHIFT_OFDM_RXTSF_OFFSET_8821C 0 12674 #define BIT_MASK_OFDM_RXTSF_OFFSET_8821C 0xff 12675 #define BIT_OFDM_RXTSF_OFFSET_8821C(x) \ 12676 (((x) & BIT_MASK_OFDM_RXTSF_OFFSET_8821C) \ 12677 << BIT_SHIFT_OFDM_RXTSF_OFFSET_8821C) 12678 #define BITS_OFDM_RXTSF_OFFSET_8821C \ 12679 (BIT_MASK_OFDM_RXTSF_OFFSET_8821C << BIT_SHIFT_OFDM_RXTSF_OFFSET_8821C) 12680 #define BIT_CLEAR_OFDM_RXTSF_OFFSET_8821C(x) \ 12681 ((x) & (~BITS_OFDM_RXTSF_OFFSET_8821C)) 12682 #define BIT_GET_OFDM_RXTSF_OFFSET_8821C(x) \ 12683 (((x) >> BIT_SHIFT_OFDM_RXTSF_OFFSET_8821C) & \ 12684 BIT_MASK_OFDM_RXTSF_OFFSET_8821C) 12685 #define BIT_SET_OFDM_RXTSF_OFFSET_8821C(x, v) \ 12686 (BIT_CLEAR_OFDM_RXTSF_OFFSET_8821C(x) | BIT_OFDM_RXTSF_OFFSET_8821C(v)) 12687 12688 /* 2 REG_TSFTR_8821C */ 12689 12690 #define BIT_SHIFT_TSF_TIMER_V1_8821C 0 12691 #define BIT_MASK_TSF_TIMER_V1_8821C 0xffffffffL 12692 #define BIT_TSF_TIMER_V1_8821C(x) \ 12693 (((x) & BIT_MASK_TSF_TIMER_V1_8821C) << BIT_SHIFT_TSF_TIMER_V1_8821C) 12694 #define BITS_TSF_TIMER_V1_8821C \ 12695 (BIT_MASK_TSF_TIMER_V1_8821C << BIT_SHIFT_TSF_TIMER_V1_8821C) 12696 #define BIT_CLEAR_TSF_TIMER_V1_8821C(x) ((x) & (~BITS_TSF_TIMER_V1_8821C)) 12697 #define BIT_GET_TSF_TIMER_V1_8821C(x) \ 12698 (((x) >> BIT_SHIFT_TSF_TIMER_V1_8821C) & BIT_MASK_TSF_TIMER_V1_8821C) 12699 #define BIT_SET_TSF_TIMER_V1_8821C(x, v) \ 12700 (BIT_CLEAR_TSF_TIMER_V1_8821C(x) | BIT_TSF_TIMER_V1_8821C(v)) 12701 12702 /* 2 REG_TSFTR_1_8821C */ 12703 12704 #define BIT_SHIFT_TSF_TIMER_V2_8821C 0 12705 #define BIT_MASK_TSF_TIMER_V2_8821C 0xffffffffL 12706 #define BIT_TSF_TIMER_V2_8821C(x) \ 12707 (((x) & BIT_MASK_TSF_TIMER_V2_8821C) << BIT_SHIFT_TSF_TIMER_V2_8821C) 12708 #define BITS_TSF_TIMER_V2_8821C \ 12709 (BIT_MASK_TSF_TIMER_V2_8821C << BIT_SHIFT_TSF_TIMER_V2_8821C) 12710 #define BIT_CLEAR_TSF_TIMER_V2_8821C(x) ((x) & (~BITS_TSF_TIMER_V2_8821C)) 12711 #define BIT_GET_TSF_TIMER_V2_8821C(x) \ 12712 (((x) >> BIT_SHIFT_TSF_TIMER_V2_8821C) & BIT_MASK_TSF_TIMER_V2_8821C) 12713 #define BIT_SET_TSF_TIMER_V2_8821C(x, v) \ 12714 (BIT_CLEAR_TSF_TIMER_V2_8821C(x) | BIT_TSF_TIMER_V2_8821C(v)) 12715 12716 /* 2 REG_FREERUN_CNT_8821C */ 12717 12718 #define BIT_SHIFT_FREERUN_CNT_V1_8821C 0 12719 #define BIT_MASK_FREERUN_CNT_V1_8821C 0xffffffffL 12720 #define BIT_FREERUN_CNT_V1_8821C(x) \ 12721 (((x) & BIT_MASK_FREERUN_CNT_V1_8821C) \ 12722 << BIT_SHIFT_FREERUN_CNT_V1_8821C) 12723 #define BITS_FREERUN_CNT_V1_8821C \ 12724 (BIT_MASK_FREERUN_CNT_V1_8821C << BIT_SHIFT_FREERUN_CNT_V1_8821C) 12725 #define BIT_CLEAR_FREERUN_CNT_V1_8821C(x) ((x) & (~BITS_FREERUN_CNT_V1_8821C)) 12726 #define BIT_GET_FREERUN_CNT_V1_8821C(x) \ 12727 (((x) >> BIT_SHIFT_FREERUN_CNT_V1_8821C) & \ 12728 BIT_MASK_FREERUN_CNT_V1_8821C) 12729 #define BIT_SET_FREERUN_CNT_V1_8821C(x, v) \ 12730 (BIT_CLEAR_FREERUN_CNT_V1_8821C(x) | BIT_FREERUN_CNT_V1_8821C(v)) 12731 12732 /* 2 REG_FREERUN_CNT_1_8821C */ 12733 12734 #define BIT_SHIFT_FREERUN_CNT_V2_8821C 0 12735 #define BIT_MASK_FREERUN_CNT_V2_8821C 0xffffffffL 12736 #define BIT_FREERUN_CNT_V2_8821C(x) \ 12737 (((x) & BIT_MASK_FREERUN_CNT_V2_8821C) \ 12738 << BIT_SHIFT_FREERUN_CNT_V2_8821C) 12739 #define BITS_FREERUN_CNT_V2_8821C \ 12740 (BIT_MASK_FREERUN_CNT_V2_8821C << BIT_SHIFT_FREERUN_CNT_V2_8821C) 12741 #define BIT_CLEAR_FREERUN_CNT_V2_8821C(x) ((x) & (~BITS_FREERUN_CNT_V2_8821C)) 12742 #define BIT_GET_FREERUN_CNT_V2_8821C(x) \ 12743 (((x) >> BIT_SHIFT_FREERUN_CNT_V2_8821C) & \ 12744 BIT_MASK_FREERUN_CNT_V2_8821C) 12745 #define BIT_SET_FREERUN_CNT_V2_8821C(x, v) \ 12746 (BIT_CLEAR_FREERUN_CNT_V2_8821C(x) | BIT_FREERUN_CNT_V2_8821C(v)) 12747 12748 /* 2 REG_ATIMWND1_V1_8821C */ 12749 12750 #define BIT_SHIFT_ATIMWND1_V1_8821C 0 12751 #define BIT_MASK_ATIMWND1_V1_8821C 0xff 12752 #define BIT_ATIMWND1_V1_8821C(x) \ 12753 (((x) & BIT_MASK_ATIMWND1_V1_8821C) << BIT_SHIFT_ATIMWND1_V1_8821C) 12754 #define BITS_ATIMWND1_V1_8821C \ 12755 (BIT_MASK_ATIMWND1_V1_8821C << BIT_SHIFT_ATIMWND1_V1_8821C) 12756 #define BIT_CLEAR_ATIMWND1_V1_8821C(x) ((x) & (~BITS_ATIMWND1_V1_8821C)) 12757 #define BIT_GET_ATIMWND1_V1_8821C(x) \ 12758 (((x) >> BIT_SHIFT_ATIMWND1_V1_8821C) & BIT_MASK_ATIMWND1_V1_8821C) 12759 #define BIT_SET_ATIMWND1_V1_8821C(x, v) \ 12760 (BIT_CLEAR_ATIMWND1_V1_8821C(x) | BIT_ATIMWND1_V1_8821C(v)) 12761 12762 /* 2 REG_TBTT_PROHIBIT_INFRA_8821C */ 12763 12764 #define BIT_SHIFT_TBTT_PROHIBIT_INFRA_8821C 0 12765 #define BIT_MASK_TBTT_PROHIBIT_INFRA_8821C 0xff 12766 #define BIT_TBTT_PROHIBIT_INFRA_8821C(x) \ 12767 (((x) & BIT_MASK_TBTT_PROHIBIT_INFRA_8821C) \ 12768 << BIT_SHIFT_TBTT_PROHIBIT_INFRA_8821C) 12769 #define BITS_TBTT_PROHIBIT_INFRA_8821C \ 12770 (BIT_MASK_TBTT_PROHIBIT_INFRA_8821C \ 12771 << BIT_SHIFT_TBTT_PROHIBIT_INFRA_8821C) 12772 #define BIT_CLEAR_TBTT_PROHIBIT_INFRA_8821C(x) \ 12773 ((x) & (~BITS_TBTT_PROHIBIT_INFRA_8821C)) 12774 #define BIT_GET_TBTT_PROHIBIT_INFRA_8821C(x) \ 12775 (((x) >> BIT_SHIFT_TBTT_PROHIBIT_INFRA_8821C) & \ 12776 BIT_MASK_TBTT_PROHIBIT_INFRA_8821C) 12777 #define BIT_SET_TBTT_PROHIBIT_INFRA_8821C(x, v) \ 12778 (BIT_CLEAR_TBTT_PROHIBIT_INFRA_8821C(x) | \ 12779 BIT_TBTT_PROHIBIT_INFRA_8821C(v)) 12780 12781 /* 2 REG_CTWND_8821C */ 12782 12783 #define BIT_SHIFT_CTWND_8821C 0 12784 #define BIT_MASK_CTWND_8821C 0xff 12785 #define BIT_CTWND_8821C(x) \ 12786 (((x) & BIT_MASK_CTWND_8821C) << BIT_SHIFT_CTWND_8821C) 12787 #define BITS_CTWND_8821C (BIT_MASK_CTWND_8821C << BIT_SHIFT_CTWND_8821C) 12788 #define BIT_CLEAR_CTWND_8821C(x) ((x) & (~BITS_CTWND_8821C)) 12789 #define BIT_GET_CTWND_8821C(x) \ 12790 (((x) >> BIT_SHIFT_CTWND_8821C) & BIT_MASK_CTWND_8821C) 12791 #define BIT_SET_CTWND_8821C(x, v) \ 12792 (BIT_CLEAR_CTWND_8821C(x) | BIT_CTWND_8821C(v)) 12793 12794 /* 2 REG_BCNIVLCUNT_8821C */ 12795 12796 #define BIT_SHIFT_BCNIVLCUNT_8821C 0 12797 #define BIT_MASK_BCNIVLCUNT_8821C 0x7f 12798 #define BIT_BCNIVLCUNT_8821C(x) \ 12799 (((x) & BIT_MASK_BCNIVLCUNT_8821C) << BIT_SHIFT_BCNIVLCUNT_8821C) 12800 #define BITS_BCNIVLCUNT_8821C \ 12801 (BIT_MASK_BCNIVLCUNT_8821C << BIT_SHIFT_BCNIVLCUNT_8821C) 12802 #define BIT_CLEAR_BCNIVLCUNT_8821C(x) ((x) & (~BITS_BCNIVLCUNT_8821C)) 12803 #define BIT_GET_BCNIVLCUNT_8821C(x) \ 12804 (((x) >> BIT_SHIFT_BCNIVLCUNT_8821C) & BIT_MASK_BCNIVLCUNT_8821C) 12805 #define BIT_SET_BCNIVLCUNT_8821C(x, v) \ 12806 (BIT_CLEAR_BCNIVLCUNT_8821C(x) | BIT_BCNIVLCUNT_8821C(v)) 12807 12808 /* 2 REG_BCNDROPCTRL_8821C */ 12809 #define BIT_BEACON_DROP_EN_8821C BIT(7) 12810 12811 #define BIT_SHIFT_BEACON_DROP_IVL_8821C 0 12812 #define BIT_MASK_BEACON_DROP_IVL_8821C 0x7f 12813 #define BIT_BEACON_DROP_IVL_8821C(x) \ 12814 (((x) & BIT_MASK_BEACON_DROP_IVL_8821C) \ 12815 << BIT_SHIFT_BEACON_DROP_IVL_8821C) 12816 #define BITS_BEACON_DROP_IVL_8821C \ 12817 (BIT_MASK_BEACON_DROP_IVL_8821C << BIT_SHIFT_BEACON_DROP_IVL_8821C) 12818 #define BIT_CLEAR_BEACON_DROP_IVL_8821C(x) ((x) & (~BITS_BEACON_DROP_IVL_8821C)) 12819 #define BIT_GET_BEACON_DROP_IVL_8821C(x) \ 12820 (((x) >> BIT_SHIFT_BEACON_DROP_IVL_8821C) & \ 12821 BIT_MASK_BEACON_DROP_IVL_8821C) 12822 #define BIT_SET_BEACON_DROP_IVL_8821C(x, v) \ 12823 (BIT_CLEAR_BEACON_DROP_IVL_8821C(x) | BIT_BEACON_DROP_IVL_8821C(v)) 12824 12825 /* 2 REG_HGQ_TIMEOUT_PERIOD_8821C */ 12826 12827 #define BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8821C 0 12828 #define BIT_MASK_HGQ_TIMEOUT_PERIOD_8821C 0xff 12829 #define BIT_HGQ_TIMEOUT_PERIOD_8821C(x) \ 12830 (((x) & BIT_MASK_HGQ_TIMEOUT_PERIOD_8821C) \ 12831 << BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8821C) 12832 #define BITS_HGQ_TIMEOUT_PERIOD_8821C \ 12833 (BIT_MASK_HGQ_TIMEOUT_PERIOD_8821C \ 12834 << BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8821C) 12835 #define BIT_CLEAR_HGQ_TIMEOUT_PERIOD_8821C(x) \ 12836 ((x) & (~BITS_HGQ_TIMEOUT_PERIOD_8821C)) 12837 #define BIT_GET_HGQ_TIMEOUT_PERIOD_8821C(x) \ 12838 (((x) >> BIT_SHIFT_HGQ_TIMEOUT_PERIOD_8821C) & \ 12839 BIT_MASK_HGQ_TIMEOUT_PERIOD_8821C) 12840 #define BIT_SET_HGQ_TIMEOUT_PERIOD_8821C(x, v) \ 12841 (BIT_CLEAR_HGQ_TIMEOUT_PERIOD_8821C(x) | \ 12842 BIT_HGQ_TIMEOUT_PERIOD_8821C(v)) 12843 12844 /* 2 REG_TXCMD_TIMEOUT_PERIOD_8821C */ 12845 12846 #define BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8821C 0 12847 #define BIT_MASK_TXCMD_TIMEOUT_PERIOD_8821C 0xff 12848 #define BIT_TXCMD_TIMEOUT_PERIOD_8821C(x) \ 12849 (((x) & BIT_MASK_TXCMD_TIMEOUT_PERIOD_8821C) \ 12850 << BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8821C) 12851 #define BITS_TXCMD_TIMEOUT_PERIOD_8821C \ 12852 (BIT_MASK_TXCMD_TIMEOUT_PERIOD_8821C \ 12853 << BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8821C) 12854 #define BIT_CLEAR_TXCMD_TIMEOUT_PERIOD_8821C(x) \ 12855 ((x) & (~BITS_TXCMD_TIMEOUT_PERIOD_8821C)) 12856 #define BIT_GET_TXCMD_TIMEOUT_PERIOD_8821C(x) \ 12857 (((x) >> BIT_SHIFT_TXCMD_TIMEOUT_PERIOD_8821C) & \ 12858 BIT_MASK_TXCMD_TIMEOUT_PERIOD_8821C) 12859 #define BIT_SET_TXCMD_TIMEOUT_PERIOD_8821C(x, v) \ 12860 (BIT_CLEAR_TXCMD_TIMEOUT_PERIOD_8821C(x) | \ 12861 BIT_TXCMD_TIMEOUT_PERIOD_8821C(v)) 12862 12863 /* 2 REG_MISC_CTRL_8821C */ 12864 #define BIT_AUTO_SYNC_BY_TBTT_8821C BIT(6) 12865 #define BIT_DIS_TRX_CAL_BCN_8821C BIT(5) 12866 #define BIT_DIS_TX_CAL_TBTT_8821C BIT(4) 12867 #define BIT_EN_FREECNT_8821C BIT(3) 12868 #define BIT_BCN_AGGRESSION_8821C BIT(2) 12869 12870 #define BIT_SHIFT_DIS_SECONDARY_CCA_8821C 0 12871 #define BIT_MASK_DIS_SECONDARY_CCA_8821C 0x3 12872 #define BIT_DIS_SECONDARY_CCA_8821C(x) \ 12873 (((x) & BIT_MASK_DIS_SECONDARY_CCA_8821C) \ 12874 << BIT_SHIFT_DIS_SECONDARY_CCA_8821C) 12875 #define BITS_DIS_SECONDARY_CCA_8821C \ 12876 (BIT_MASK_DIS_SECONDARY_CCA_8821C << BIT_SHIFT_DIS_SECONDARY_CCA_8821C) 12877 #define BIT_CLEAR_DIS_SECONDARY_CCA_8821C(x) \ 12878 ((x) & (~BITS_DIS_SECONDARY_CCA_8821C)) 12879 #define BIT_GET_DIS_SECONDARY_CCA_8821C(x) \ 12880 (((x) >> BIT_SHIFT_DIS_SECONDARY_CCA_8821C) & \ 12881 BIT_MASK_DIS_SECONDARY_CCA_8821C) 12882 #define BIT_SET_DIS_SECONDARY_CCA_8821C(x, v) \ 12883 (BIT_CLEAR_DIS_SECONDARY_CCA_8821C(x) | BIT_DIS_SECONDARY_CCA_8821C(v)) 12884 12885 /* 2 REG_BCN_CTRL_CLINT1_8821C */ 12886 #define BIT_CLI1_DIS_RX_BSSID_FIT_8821C BIT(6) 12887 #define BIT_CLI1_DIS_TSF_UDT_8821C BIT(4) 12888 #define BIT_CLI1_EN_BCN_FUNCTION_8821C BIT(3) 12889 #define BIT_CLI1_EN_RXBCN_RPT_8821C BIT(2) 12890 #define BIT_CLI1_ENP2P_CTWINDOW_8821C BIT(1) 12891 #define BIT_CLI1_ENP2P_BCNQ_AREA_8821C BIT(0) 12892 12893 /* 2 REG_BCN_CTRL_CLINT2_8821C */ 12894 #define BIT_CLI2_DIS_RX_BSSID_FIT_8821C BIT(6) 12895 #define BIT_CLI2_DIS_TSF_UDT_8821C BIT(4) 12896 #define BIT_CLI2_EN_BCN_FUNCTION_8821C BIT(3) 12897 #define BIT_CLI2_EN_RXBCN_RPT_8821C BIT(2) 12898 #define BIT_CLI2_ENP2P_CTWINDOW_8821C BIT(1) 12899 #define BIT_CLI2_ENP2P_BCNQ_AREA_8821C BIT(0) 12900 12901 /* 2 REG_BCN_CTRL_CLINT3_8821C */ 12902 #define BIT_CLI3_DIS_RX_BSSID_FIT_8821C BIT(6) 12903 #define BIT_CLI3_DIS_TSF_UDT_8821C BIT(4) 12904 #define BIT_CLI3_EN_BCN_FUNCTION_8821C BIT(3) 12905 #define BIT_CLI3_EN_RXBCN_RPT_8821C BIT(2) 12906 #define BIT_CLI3_ENP2P_CTWINDOW_8821C BIT(1) 12907 #define BIT_CLI3_ENP2P_BCNQ_AREA_8821C BIT(0) 12908 12909 /* 2 REG_EXTEND_CTRL_8821C */ 12910 #define BIT_EN_TSFBIT32_RST_P2P2_8821C BIT(5) 12911 #define BIT_EN_TSFBIT32_RST_P2P1_8821C BIT(4) 12912 12913 #define BIT_SHIFT_PORT_SEL_8821C 0 12914 #define BIT_MASK_PORT_SEL_8821C 0x7 12915 #define BIT_PORT_SEL_8821C(x) \ 12916 (((x) & BIT_MASK_PORT_SEL_8821C) << BIT_SHIFT_PORT_SEL_8821C) 12917 #define BITS_PORT_SEL_8821C \ 12918 (BIT_MASK_PORT_SEL_8821C << BIT_SHIFT_PORT_SEL_8821C) 12919 #define BIT_CLEAR_PORT_SEL_8821C(x) ((x) & (~BITS_PORT_SEL_8821C)) 12920 #define BIT_GET_PORT_SEL_8821C(x) \ 12921 (((x) >> BIT_SHIFT_PORT_SEL_8821C) & BIT_MASK_PORT_SEL_8821C) 12922 #define BIT_SET_PORT_SEL_8821C(x, v) \ 12923 (BIT_CLEAR_PORT_SEL_8821C(x) | BIT_PORT_SEL_8821C(v)) 12924 12925 /* 2 REG_P2PPS1_SPEC_STATE_8821C */ 12926 #define BIT_P2P1_SPEC_POWER_STATE_8821C BIT(7) 12927 #define BIT_P2P1_SPEC_CTWINDOW_ON_8821C BIT(6) 12928 #define BIT_P2P1_SPEC_BCN_AREA_ON_8821C BIT(5) 12929 #define BIT_P2P1_SPEC_CTWIN_EARLY_DISTX_8821C BIT(4) 12930 #define BIT_P2P1_SPEC_NOA1_OFF_PERIOD_8821C BIT(3) 12931 #define BIT_P2P1_SPEC_FORCE_DOZE1_8821C BIT(2) 12932 #define BIT_P2P1_SPEC_NOA0_OFF_PERIOD_8821C BIT(1) 12933 #define BIT_P2P1_SPEC_FORCE_DOZE0_8821C BIT(0) 12934 12935 /* 2 REG_P2PPS1_STATE_8821C */ 12936 #define BIT_P2P1_POWER_STATE_8821C BIT(7) 12937 #define BIT_P2P1_CTWINDOW_ON_8821C BIT(6) 12938 #define BIT_P2P1_BEACON_AREA_ON_8821C BIT(5) 12939 #define BIT_P2P1_CTWIN_EARLY_DISTX_8821C BIT(4) 12940 #define BIT_P2P1_NOA1_OFF_PERIOD_8821C BIT(3) 12941 #define BIT_P2P1_FORCE_DOZE1_8821C BIT(2) 12942 #define BIT_P2P1_NOA0_OFF_PERIOD_8821C BIT(1) 12943 #define BIT_P2P1_FORCE_DOZE0_8821C BIT(0) 12944 12945 /* 2 REG_P2PPS2_SPEC_STATE_8821C */ 12946 #define BIT_P2P2_SPEC_POWER_STATE_8821C BIT(7) 12947 #define BIT_P2P2_SPEC_CTWINDOW_ON_8821C BIT(6) 12948 #define BIT_P2P2_SPEC_BCN_AREA_ON_8821C BIT(5) 12949 #define BIT_P2P2_SPEC_CTWIN_EARLY_DISTX_8821C BIT(4) 12950 #define BIT_P2P2_SPEC_NOA1_OFF_PERIOD_8821C BIT(3) 12951 #define BIT_P2P2_SPEC_FORCE_DOZE1_8821C BIT(2) 12952 #define BIT_P2P2_SPEC_NOA0_OFF_PERIOD_8821C BIT(1) 12953 #define BIT_P2P2_SPEC_FORCE_DOZE0_8821C BIT(0) 12954 12955 /* 2 REG_P2PPS2_STATE_8821C */ 12956 #define BIT_P2P2_POWER_STATE_8821C BIT(7) 12957 #define BIT_P2P2_CTWINDOW_ON_8821C BIT(6) 12958 #define BIT_P2P2_BEACON_AREA_ON_8821C BIT(5) 12959 #define BIT_P2P2_CTWIN_EARLY_DISTX_8821C BIT(4) 12960 #define BIT_P2P2_NOA1_OFF_PERIOD_8821C BIT(3) 12961 #define BIT_P2P2_FORCE_DOZE1_8821C BIT(2) 12962 #define BIT_P2P2_NOA0_OFF_PERIOD_8821C BIT(1) 12963 #define BIT_P2P2_FORCE_DOZE0_8821C BIT(0) 12964 12965 /* 2 REG_PS_TIMER0_8821C */ 12966 12967 #define BIT_SHIFT_PSTIMER0_INT_8821C 5 12968 #define BIT_MASK_PSTIMER0_INT_8821C 0x7ffffff 12969 #define BIT_PSTIMER0_INT_8821C(x) \ 12970 (((x) & BIT_MASK_PSTIMER0_INT_8821C) << BIT_SHIFT_PSTIMER0_INT_8821C) 12971 #define BITS_PSTIMER0_INT_8821C \ 12972 (BIT_MASK_PSTIMER0_INT_8821C << BIT_SHIFT_PSTIMER0_INT_8821C) 12973 #define BIT_CLEAR_PSTIMER0_INT_8821C(x) ((x) & (~BITS_PSTIMER0_INT_8821C)) 12974 #define BIT_GET_PSTIMER0_INT_8821C(x) \ 12975 (((x) >> BIT_SHIFT_PSTIMER0_INT_8821C) & BIT_MASK_PSTIMER0_INT_8821C) 12976 #define BIT_SET_PSTIMER0_INT_8821C(x, v) \ 12977 (BIT_CLEAR_PSTIMER0_INT_8821C(x) | BIT_PSTIMER0_INT_8821C(v)) 12978 12979 /* 2 REG_PS_TIMER1_8821C */ 12980 12981 #define BIT_SHIFT_PSTIMER1_INT_8821C 5 12982 #define BIT_MASK_PSTIMER1_INT_8821C 0x7ffffff 12983 #define BIT_PSTIMER1_INT_8821C(x) \ 12984 (((x) & BIT_MASK_PSTIMER1_INT_8821C) << BIT_SHIFT_PSTIMER1_INT_8821C) 12985 #define BITS_PSTIMER1_INT_8821C \ 12986 (BIT_MASK_PSTIMER1_INT_8821C << BIT_SHIFT_PSTIMER1_INT_8821C) 12987 #define BIT_CLEAR_PSTIMER1_INT_8821C(x) ((x) & (~BITS_PSTIMER1_INT_8821C)) 12988 #define BIT_GET_PSTIMER1_INT_8821C(x) \ 12989 (((x) >> BIT_SHIFT_PSTIMER1_INT_8821C) & BIT_MASK_PSTIMER1_INT_8821C) 12990 #define BIT_SET_PSTIMER1_INT_8821C(x, v) \ 12991 (BIT_CLEAR_PSTIMER1_INT_8821C(x) | BIT_PSTIMER1_INT_8821C(v)) 12992 12993 /* 2 REG_PS_TIMER2_8821C */ 12994 12995 #define BIT_SHIFT_PSTIMER2_INT_8821C 5 12996 #define BIT_MASK_PSTIMER2_INT_8821C 0x7ffffff 12997 #define BIT_PSTIMER2_INT_8821C(x) \ 12998 (((x) & BIT_MASK_PSTIMER2_INT_8821C) << BIT_SHIFT_PSTIMER2_INT_8821C) 12999 #define BITS_PSTIMER2_INT_8821C \ 13000 (BIT_MASK_PSTIMER2_INT_8821C << BIT_SHIFT_PSTIMER2_INT_8821C) 13001 #define BIT_CLEAR_PSTIMER2_INT_8821C(x) ((x) & (~BITS_PSTIMER2_INT_8821C)) 13002 #define BIT_GET_PSTIMER2_INT_8821C(x) \ 13003 (((x) >> BIT_SHIFT_PSTIMER2_INT_8821C) & BIT_MASK_PSTIMER2_INT_8821C) 13004 #define BIT_SET_PSTIMER2_INT_8821C(x, v) \ 13005 (BIT_CLEAR_PSTIMER2_INT_8821C(x) | BIT_PSTIMER2_INT_8821C(v)) 13006 13007 /* 2 REG_TBTT_CTN_AREA_8821C */ 13008 13009 #define BIT_SHIFT_TBTT_CTN_AREA_8821C 0 13010 #define BIT_MASK_TBTT_CTN_AREA_8821C 0xff 13011 #define BIT_TBTT_CTN_AREA_8821C(x) \ 13012 (((x) & BIT_MASK_TBTT_CTN_AREA_8821C) << BIT_SHIFT_TBTT_CTN_AREA_8821C) 13013 #define BITS_TBTT_CTN_AREA_8821C \ 13014 (BIT_MASK_TBTT_CTN_AREA_8821C << BIT_SHIFT_TBTT_CTN_AREA_8821C) 13015 #define BIT_CLEAR_TBTT_CTN_AREA_8821C(x) ((x) & (~BITS_TBTT_CTN_AREA_8821C)) 13016 #define BIT_GET_TBTT_CTN_AREA_8821C(x) \ 13017 (((x) >> BIT_SHIFT_TBTT_CTN_AREA_8821C) & BIT_MASK_TBTT_CTN_AREA_8821C) 13018 #define BIT_SET_TBTT_CTN_AREA_8821C(x, v) \ 13019 (BIT_CLEAR_TBTT_CTN_AREA_8821C(x) | BIT_TBTT_CTN_AREA_8821C(v)) 13020 13021 /* 2 REG_NOT_VALID_8821C */ 13022 13023 /* 2 REG_FORCE_BCN_IFS_8821C */ 13024 13025 #define BIT_SHIFT_FORCE_BCN_IFS_8821C 0 13026 #define BIT_MASK_FORCE_BCN_IFS_8821C 0xff 13027 #define BIT_FORCE_BCN_IFS_8821C(x) \ 13028 (((x) & BIT_MASK_FORCE_BCN_IFS_8821C) << BIT_SHIFT_FORCE_BCN_IFS_8821C) 13029 #define BITS_FORCE_BCN_IFS_8821C \ 13030 (BIT_MASK_FORCE_BCN_IFS_8821C << BIT_SHIFT_FORCE_BCN_IFS_8821C) 13031 #define BIT_CLEAR_FORCE_BCN_IFS_8821C(x) ((x) & (~BITS_FORCE_BCN_IFS_8821C)) 13032 #define BIT_GET_FORCE_BCN_IFS_8821C(x) \ 13033 (((x) >> BIT_SHIFT_FORCE_BCN_IFS_8821C) & BIT_MASK_FORCE_BCN_IFS_8821C) 13034 #define BIT_SET_FORCE_BCN_IFS_8821C(x, v) \ 13035 (BIT_CLEAR_FORCE_BCN_IFS_8821C(x) | BIT_FORCE_BCN_IFS_8821C(v)) 13036 13037 /* 2 REG_NOT_VALID_8821C */ 13038 13039 /* 2 REG_TXOP_MIN_8821C */ 13040 13041 #define BIT_SHIFT_TXOP_MIN_8821C 0 13042 #define BIT_MASK_TXOP_MIN_8821C 0x3fff 13043 #define BIT_TXOP_MIN_8821C(x) \ 13044 (((x) & BIT_MASK_TXOP_MIN_8821C) << BIT_SHIFT_TXOP_MIN_8821C) 13045 #define BITS_TXOP_MIN_8821C \ 13046 (BIT_MASK_TXOP_MIN_8821C << BIT_SHIFT_TXOP_MIN_8821C) 13047 #define BIT_CLEAR_TXOP_MIN_8821C(x) ((x) & (~BITS_TXOP_MIN_8821C)) 13048 #define BIT_GET_TXOP_MIN_8821C(x) \ 13049 (((x) >> BIT_SHIFT_TXOP_MIN_8821C) & BIT_MASK_TXOP_MIN_8821C) 13050 #define BIT_SET_TXOP_MIN_8821C(x, v) \ 13051 (BIT_CLEAR_TXOP_MIN_8821C(x) | BIT_TXOP_MIN_8821C(v)) 13052 13053 /* 2 REG_PRE_BKF_TIME_8821C */ 13054 13055 #define BIT_SHIFT_PRE_BKF_TIME_8821C 0 13056 #define BIT_MASK_PRE_BKF_TIME_8821C 0xff 13057 #define BIT_PRE_BKF_TIME_8821C(x) \ 13058 (((x) & BIT_MASK_PRE_BKF_TIME_8821C) << BIT_SHIFT_PRE_BKF_TIME_8821C) 13059 #define BITS_PRE_BKF_TIME_8821C \ 13060 (BIT_MASK_PRE_BKF_TIME_8821C << BIT_SHIFT_PRE_BKF_TIME_8821C) 13061 #define BIT_CLEAR_PRE_BKF_TIME_8821C(x) ((x) & (~BITS_PRE_BKF_TIME_8821C)) 13062 #define BIT_GET_PRE_BKF_TIME_8821C(x) \ 13063 (((x) >> BIT_SHIFT_PRE_BKF_TIME_8821C) & BIT_MASK_PRE_BKF_TIME_8821C) 13064 #define BIT_SET_PRE_BKF_TIME_8821C(x, v) \ 13065 (BIT_CLEAR_PRE_BKF_TIME_8821C(x) | BIT_PRE_BKF_TIME_8821C(v)) 13066 13067 /* 2 REG_CROSS_TXOP_CTRL_8821C */ 13068 #define BIT_TXFAIL_BREACK_TXOP_EN_8821C BIT(3) 13069 #define BIT_DTIM_BYPASS_8821C BIT(2) 13070 #define BIT_RTS_NAV_TXOP_8821C BIT(1) 13071 #define BIT_NOT_CROSS_TXOP_8821C BIT(0) 13072 13073 /* 2 REG_NOT_VALID_8821C */ 13074 13075 /* 2 REG_NOT_VALID_8821C */ 13076 13077 /* 2 REG_NOT_VALID_8821C */ 13078 13079 /* 2 REG_ATIMWND2_8821C */ 13080 13081 #define BIT_SHIFT_ATIMWND2_8821C 0 13082 #define BIT_MASK_ATIMWND2_8821C 0xff 13083 #define BIT_ATIMWND2_8821C(x) \ 13084 (((x) & BIT_MASK_ATIMWND2_8821C) << BIT_SHIFT_ATIMWND2_8821C) 13085 #define BITS_ATIMWND2_8821C \ 13086 (BIT_MASK_ATIMWND2_8821C << BIT_SHIFT_ATIMWND2_8821C) 13087 #define BIT_CLEAR_ATIMWND2_8821C(x) ((x) & (~BITS_ATIMWND2_8821C)) 13088 #define BIT_GET_ATIMWND2_8821C(x) \ 13089 (((x) >> BIT_SHIFT_ATIMWND2_8821C) & BIT_MASK_ATIMWND2_8821C) 13090 #define BIT_SET_ATIMWND2_8821C(x, v) \ 13091 (BIT_CLEAR_ATIMWND2_8821C(x) | BIT_ATIMWND2_8821C(v)) 13092 13093 /* 2 REG_ATIMWND3_8821C */ 13094 13095 #define BIT_SHIFT_ATIMWND3_8821C 0 13096 #define BIT_MASK_ATIMWND3_8821C 0xff 13097 #define BIT_ATIMWND3_8821C(x) \ 13098 (((x) & BIT_MASK_ATIMWND3_8821C) << BIT_SHIFT_ATIMWND3_8821C) 13099 #define BITS_ATIMWND3_8821C \ 13100 (BIT_MASK_ATIMWND3_8821C << BIT_SHIFT_ATIMWND3_8821C) 13101 #define BIT_CLEAR_ATIMWND3_8821C(x) ((x) & (~BITS_ATIMWND3_8821C)) 13102 #define BIT_GET_ATIMWND3_8821C(x) \ 13103 (((x) >> BIT_SHIFT_ATIMWND3_8821C) & BIT_MASK_ATIMWND3_8821C) 13104 #define BIT_SET_ATIMWND3_8821C(x, v) \ 13105 (BIT_CLEAR_ATIMWND3_8821C(x) | BIT_ATIMWND3_8821C(v)) 13106 13107 /* 2 REG_ATIMWND4_8821C */ 13108 13109 #define BIT_SHIFT_ATIMWND4_8821C 0 13110 #define BIT_MASK_ATIMWND4_8821C 0xff 13111 #define BIT_ATIMWND4_8821C(x) \ 13112 (((x) & BIT_MASK_ATIMWND4_8821C) << BIT_SHIFT_ATIMWND4_8821C) 13113 #define BITS_ATIMWND4_8821C \ 13114 (BIT_MASK_ATIMWND4_8821C << BIT_SHIFT_ATIMWND4_8821C) 13115 #define BIT_CLEAR_ATIMWND4_8821C(x) ((x) & (~BITS_ATIMWND4_8821C)) 13116 #define BIT_GET_ATIMWND4_8821C(x) \ 13117 (((x) >> BIT_SHIFT_ATIMWND4_8821C) & BIT_MASK_ATIMWND4_8821C) 13118 #define BIT_SET_ATIMWND4_8821C(x, v) \ 13119 (BIT_CLEAR_ATIMWND4_8821C(x) | BIT_ATIMWND4_8821C(v)) 13120 13121 /* 2 REG_ATIMWND5_8821C */ 13122 13123 #define BIT_SHIFT_ATIMWND5_8821C 0 13124 #define BIT_MASK_ATIMWND5_8821C 0xff 13125 #define BIT_ATIMWND5_8821C(x) \ 13126 (((x) & BIT_MASK_ATIMWND5_8821C) << BIT_SHIFT_ATIMWND5_8821C) 13127 #define BITS_ATIMWND5_8821C \ 13128 (BIT_MASK_ATIMWND5_8821C << BIT_SHIFT_ATIMWND5_8821C) 13129 #define BIT_CLEAR_ATIMWND5_8821C(x) ((x) & (~BITS_ATIMWND5_8821C)) 13130 #define BIT_GET_ATIMWND5_8821C(x) \ 13131 (((x) >> BIT_SHIFT_ATIMWND5_8821C) & BIT_MASK_ATIMWND5_8821C) 13132 #define BIT_SET_ATIMWND5_8821C(x, v) \ 13133 (BIT_CLEAR_ATIMWND5_8821C(x) | BIT_ATIMWND5_8821C(v)) 13134 13135 /* 2 REG_ATIMWND6_8821C */ 13136 13137 #define BIT_SHIFT_ATIMWND6_8821C 0 13138 #define BIT_MASK_ATIMWND6_8821C 0xff 13139 #define BIT_ATIMWND6_8821C(x) \ 13140 (((x) & BIT_MASK_ATIMWND6_8821C) << BIT_SHIFT_ATIMWND6_8821C) 13141 #define BITS_ATIMWND6_8821C \ 13142 (BIT_MASK_ATIMWND6_8821C << BIT_SHIFT_ATIMWND6_8821C) 13143 #define BIT_CLEAR_ATIMWND6_8821C(x) ((x) & (~BITS_ATIMWND6_8821C)) 13144 #define BIT_GET_ATIMWND6_8821C(x) \ 13145 (((x) >> BIT_SHIFT_ATIMWND6_8821C) & BIT_MASK_ATIMWND6_8821C) 13146 #define BIT_SET_ATIMWND6_8821C(x, v) \ 13147 (BIT_CLEAR_ATIMWND6_8821C(x) | BIT_ATIMWND6_8821C(v)) 13148 13149 /* 2 REG_ATIMWND7_8821C */ 13150 13151 #define BIT_SHIFT_ATIMWND7_8821C 0 13152 #define BIT_MASK_ATIMWND7_8821C 0xff 13153 #define BIT_ATIMWND7_8821C(x) \ 13154 (((x) & BIT_MASK_ATIMWND7_8821C) << BIT_SHIFT_ATIMWND7_8821C) 13155 #define BITS_ATIMWND7_8821C \ 13156 (BIT_MASK_ATIMWND7_8821C << BIT_SHIFT_ATIMWND7_8821C) 13157 #define BIT_CLEAR_ATIMWND7_8821C(x) ((x) & (~BITS_ATIMWND7_8821C)) 13158 #define BIT_GET_ATIMWND7_8821C(x) \ 13159 (((x) >> BIT_SHIFT_ATIMWND7_8821C) & BIT_MASK_ATIMWND7_8821C) 13160 #define BIT_SET_ATIMWND7_8821C(x, v) \ 13161 (BIT_CLEAR_ATIMWND7_8821C(x) | BIT_ATIMWND7_8821C(v)) 13162 13163 /* 2 REG_ATIMUGT_8821C */ 13164 13165 #define BIT_SHIFT_ATIM_URGENT_8821C 0 13166 #define BIT_MASK_ATIM_URGENT_8821C 0xff 13167 #define BIT_ATIM_URGENT_8821C(x) \ 13168 (((x) & BIT_MASK_ATIM_URGENT_8821C) << BIT_SHIFT_ATIM_URGENT_8821C) 13169 #define BITS_ATIM_URGENT_8821C \ 13170 (BIT_MASK_ATIM_URGENT_8821C << BIT_SHIFT_ATIM_URGENT_8821C) 13171 #define BIT_CLEAR_ATIM_URGENT_8821C(x) ((x) & (~BITS_ATIM_URGENT_8821C)) 13172 #define BIT_GET_ATIM_URGENT_8821C(x) \ 13173 (((x) >> BIT_SHIFT_ATIM_URGENT_8821C) & BIT_MASK_ATIM_URGENT_8821C) 13174 #define BIT_SET_ATIM_URGENT_8821C(x, v) \ 13175 (BIT_CLEAR_ATIM_URGENT_8821C(x) | BIT_ATIM_URGENT_8821C(v)) 13176 13177 /* 2 REG_HIQ_NO_LMT_EN_8821C */ 13178 #define BIT_HIQ_NO_LMT_EN_VAP7_8821C BIT(7) 13179 #define BIT_HIQ_NO_LMT_EN_VAP6_8821C BIT(6) 13180 #define BIT_HIQ_NO_LMT_EN_VAP5_8821C BIT(5) 13181 #define BIT_HIQ_NO_LMT_EN_VAP4_8821C BIT(4) 13182 #define BIT_HIQ_NO_LMT_EN_VAP3_8821C BIT(3) 13183 #define BIT_HIQ_NO_LMT_EN_VAP2_8821C BIT(2) 13184 #define BIT_HIQ_NO_LMT_EN_VAP1_8821C BIT(1) 13185 #define BIT_HIQ_NO_LMT_EN_ROOT_8821C BIT(0) 13186 13187 /* 2 REG_DTIM_COUNTER_ROOT_8821C */ 13188 13189 #define BIT_SHIFT_DTIM_COUNT_ROOT_8821C 0 13190 #define BIT_MASK_DTIM_COUNT_ROOT_8821C 0xff 13191 #define BIT_DTIM_COUNT_ROOT_8821C(x) \ 13192 (((x) & BIT_MASK_DTIM_COUNT_ROOT_8821C) \ 13193 << BIT_SHIFT_DTIM_COUNT_ROOT_8821C) 13194 #define BITS_DTIM_COUNT_ROOT_8821C \ 13195 (BIT_MASK_DTIM_COUNT_ROOT_8821C << BIT_SHIFT_DTIM_COUNT_ROOT_8821C) 13196 #define BIT_CLEAR_DTIM_COUNT_ROOT_8821C(x) ((x) & (~BITS_DTIM_COUNT_ROOT_8821C)) 13197 #define BIT_GET_DTIM_COUNT_ROOT_8821C(x) \ 13198 (((x) >> BIT_SHIFT_DTIM_COUNT_ROOT_8821C) & \ 13199 BIT_MASK_DTIM_COUNT_ROOT_8821C) 13200 #define BIT_SET_DTIM_COUNT_ROOT_8821C(x, v) \ 13201 (BIT_CLEAR_DTIM_COUNT_ROOT_8821C(x) | BIT_DTIM_COUNT_ROOT_8821C(v)) 13202 13203 /* 2 REG_DTIM_COUNTER_VAP1_8821C */ 13204 13205 #define BIT_SHIFT_DTIM_COUNT_VAP1_8821C 0 13206 #define BIT_MASK_DTIM_COUNT_VAP1_8821C 0xff 13207 #define BIT_DTIM_COUNT_VAP1_8821C(x) \ 13208 (((x) & BIT_MASK_DTIM_COUNT_VAP1_8821C) \ 13209 << BIT_SHIFT_DTIM_COUNT_VAP1_8821C) 13210 #define BITS_DTIM_COUNT_VAP1_8821C \ 13211 (BIT_MASK_DTIM_COUNT_VAP1_8821C << BIT_SHIFT_DTIM_COUNT_VAP1_8821C) 13212 #define BIT_CLEAR_DTIM_COUNT_VAP1_8821C(x) ((x) & (~BITS_DTIM_COUNT_VAP1_8821C)) 13213 #define BIT_GET_DTIM_COUNT_VAP1_8821C(x) \ 13214 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP1_8821C) & \ 13215 BIT_MASK_DTIM_COUNT_VAP1_8821C) 13216 #define BIT_SET_DTIM_COUNT_VAP1_8821C(x, v) \ 13217 (BIT_CLEAR_DTIM_COUNT_VAP1_8821C(x) | BIT_DTIM_COUNT_VAP1_8821C(v)) 13218 13219 /* 2 REG_DTIM_COUNTER_VAP2_8821C */ 13220 13221 #define BIT_SHIFT_DTIM_COUNT_VAP2_8821C 0 13222 #define BIT_MASK_DTIM_COUNT_VAP2_8821C 0xff 13223 #define BIT_DTIM_COUNT_VAP2_8821C(x) \ 13224 (((x) & BIT_MASK_DTIM_COUNT_VAP2_8821C) \ 13225 << BIT_SHIFT_DTIM_COUNT_VAP2_8821C) 13226 #define BITS_DTIM_COUNT_VAP2_8821C \ 13227 (BIT_MASK_DTIM_COUNT_VAP2_8821C << BIT_SHIFT_DTIM_COUNT_VAP2_8821C) 13228 #define BIT_CLEAR_DTIM_COUNT_VAP2_8821C(x) ((x) & (~BITS_DTIM_COUNT_VAP2_8821C)) 13229 #define BIT_GET_DTIM_COUNT_VAP2_8821C(x) \ 13230 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP2_8821C) & \ 13231 BIT_MASK_DTIM_COUNT_VAP2_8821C) 13232 #define BIT_SET_DTIM_COUNT_VAP2_8821C(x, v) \ 13233 (BIT_CLEAR_DTIM_COUNT_VAP2_8821C(x) | BIT_DTIM_COUNT_VAP2_8821C(v)) 13234 13235 /* 2 REG_DTIM_COUNTER_VAP3_8821C */ 13236 13237 #define BIT_SHIFT_DTIM_COUNT_VAP3_8821C 0 13238 #define BIT_MASK_DTIM_COUNT_VAP3_8821C 0xff 13239 #define BIT_DTIM_COUNT_VAP3_8821C(x) \ 13240 (((x) & BIT_MASK_DTIM_COUNT_VAP3_8821C) \ 13241 << BIT_SHIFT_DTIM_COUNT_VAP3_8821C) 13242 #define BITS_DTIM_COUNT_VAP3_8821C \ 13243 (BIT_MASK_DTIM_COUNT_VAP3_8821C << BIT_SHIFT_DTIM_COUNT_VAP3_8821C) 13244 #define BIT_CLEAR_DTIM_COUNT_VAP3_8821C(x) ((x) & (~BITS_DTIM_COUNT_VAP3_8821C)) 13245 #define BIT_GET_DTIM_COUNT_VAP3_8821C(x) \ 13246 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP3_8821C) & \ 13247 BIT_MASK_DTIM_COUNT_VAP3_8821C) 13248 #define BIT_SET_DTIM_COUNT_VAP3_8821C(x, v) \ 13249 (BIT_CLEAR_DTIM_COUNT_VAP3_8821C(x) | BIT_DTIM_COUNT_VAP3_8821C(v)) 13250 13251 /* 2 REG_DTIM_COUNTER_VAP4_8821C */ 13252 13253 #define BIT_SHIFT_DTIM_COUNT_VAP4_8821C 0 13254 #define BIT_MASK_DTIM_COUNT_VAP4_8821C 0xff 13255 #define BIT_DTIM_COUNT_VAP4_8821C(x) \ 13256 (((x) & BIT_MASK_DTIM_COUNT_VAP4_8821C) \ 13257 << BIT_SHIFT_DTIM_COUNT_VAP4_8821C) 13258 #define BITS_DTIM_COUNT_VAP4_8821C \ 13259 (BIT_MASK_DTIM_COUNT_VAP4_8821C << BIT_SHIFT_DTIM_COUNT_VAP4_8821C) 13260 #define BIT_CLEAR_DTIM_COUNT_VAP4_8821C(x) ((x) & (~BITS_DTIM_COUNT_VAP4_8821C)) 13261 #define BIT_GET_DTIM_COUNT_VAP4_8821C(x) \ 13262 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP4_8821C) & \ 13263 BIT_MASK_DTIM_COUNT_VAP4_8821C) 13264 #define BIT_SET_DTIM_COUNT_VAP4_8821C(x, v) \ 13265 (BIT_CLEAR_DTIM_COUNT_VAP4_8821C(x) | BIT_DTIM_COUNT_VAP4_8821C(v)) 13266 13267 /* 2 REG_DTIM_COUNTER_VAP5_8821C */ 13268 13269 #define BIT_SHIFT_DTIM_COUNT_VAP5_8821C 0 13270 #define BIT_MASK_DTIM_COUNT_VAP5_8821C 0xff 13271 #define BIT_DTIM_COUNT_VAP5_8821C(x) \ 13272 (((x) & BIT_MASK_DTIM_COUNT_VAP5_8821C) \ 13273 << BIT_SHIFT_DTIM_COUNT_VAP5_8821C) 13274 #define BITS_DTIM_COUNT_VAP5_8821C \ 13275 (BIT_MASK_DTIM_COUNT_VAP5_8821C << BIT_SHIFT_DTIM_COUNT_VAP5_8821C) 13276 #define BIT_CLEAR_DTIM_COUNT_VAP5_8821C(x) ((x) & (~BITS_DTIM_COUNT_VAP5_8821C)) 13277 #define BIT_GET_DTIM_COUNT_VAP5_8821C(x) \ 13278 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP5_8821C) & \ 13279 BIT_MASK_DTIM_COUNT_VAP5_8821C) 13280 #define BIT_SET_DTIM_COUNT_VAP5_8821C(x, v) \ 13281 (BIT_CLEAR_DTIM_COUNT_VAP5_8821C(x) | BIT_DTIM_COUNT_VAP5_8821C(v)) 13282 13283 /* 2 REG_DTIM_COUNTER_VAP6_8821C */ 13284 13285 #define BIT_SHIFT_DTIM_COUNT_VAP6_8821C 0 13286 #define BIT_MASK_DTIM_COUNT_VAP6_8821C 0xff 13287 #define BIT_DTIM_COUNT_VAP6_8821C(x) \ 13288 (((x) & BIT_MASK_DTIM_COUNT_VAP6_8821C) \ 13289 << BIT_SHIFT_DTIM_COUNT_VAP6_8821C) 13290 #define BITS_DTIM_COUNT_VAP6_8821C \ 13291 (BIT_MASK_DTIM_COUNT_VAP6_8821C << BIT_SHIFT_DTIM_COUNT_VAP6_8821C) 13292 #define BIT_CLEAR_DTIM_COUNT_VAP6_8821C(x) ((x) & (~BITS_DTIM_COUNT_VAP6_8821C)) 13293 #define BIT_GET_DTIM_COUNT_VAP6_8821C(x) \ 13294 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP6_8821C) & \ 13295 BIT_MASK_DTIM_COUNT_VAP6_8821C) 13296 #define BIT_SET_DTIM_COUNT_VAP6_8821C(x, v) \ 13297 (BIT_CLEAR_DTIM_COUNT_VAP6_8821C(x) | BIT_DTIM_COUNT_VAP6_8821C(v)) 13298 13299 /* 2 REG_DTIM_COUNTER_VAP7_8821C */ 13300 13301 #define BIT_SHIFT_DTIM_COUNT_VAP7_8821C 0 13302 #define BIT_MASK_DTIM_COUNT_VAP7_8821C 0xff 13303 #define BIT_DTIM_COUNT_VAP7_8821C(x) \ 13304 (((x) & BIT_MASK_DTIM_COUNT_VAP7_8821C) \ 13305 << BIT_SHIFT_DTIM_COUNT_VAP7_8821C) 13306 #define BITS_DTIM_COUNT_VAP7_8821C \ 13307 (BIT_MASK_DTIM_COUNT_VAP7_8821C << BIT_SHIFT_DTIM_COUNT_VAP7_8821C) 13308 #define BIT_CLEAR_DTIM_COUNT_VAP7_8821C(x) ((x) & (~BITS_DTIM_COUNT_VAP7_8821C)) 13309 #define BIT_GET_DTIM_COUNT_VAP7_8821C(x) \ 13310 (((x) >> BIT_SHIFT_DTIM_COUNT_VAP7_8821C) & \ 13311 BIT_MASK_DTIM_COUNT_VAP7_8821C) 13312 #define BIT_SET_DTIM_COUNT_VAP7_8821C(x, v) \ 13313 (BIT_CLEAR_DTIM_COUNT_VAP7_8821C(x) | BIT_DTIM_COUNT_VAP7_8821C(v)) 13314 13315 /* 2 REG_DIS_ATIM_8821C */ 13316 #define BIT_DIS_ATIM_VAP7_8821C BIT(7) 13317 #define BIT_DIS_ATIM_VAP6_8821C BIT(6) 13318 #define BIT_DIS_ATIM_VAP5_8821C BIT(5) 13319 #define BIT_DIS_ATIM_VAP4_8821C BIT(4) 13320 #define BIT_DIS_ATIM_VAP3_8821C BIT(3) 13321 #define BIT_DIS_ATIM_VAP2_8821C BIT(2) 13322 #define BIT_DIS_ATIM_VAP1_8821C BIT(1) 13323 #define BIT_DIS_ATIM_ROOT_8821C BIT(0) 13324 13325 /* 2 REG_EARLY_128US_8821C */ 13326 13327 #define BIT_SHIFT_TSFT_SEL_TIMER1_8821C 3 13328 #define BIT_MASK_TSFT_SEL_TIMER1_8821C 0x7 13329 #define BIT_TSFT_SEL_TIMER1_8821C(x) \ 13330 (((x) & BIT_MASK_TSFT_SEL_TIMER1_8821C) \ 13331 << BIT_SHIFT_TSFT_SEL_TIMER1_8821C) 13332 #define BITS_TSFT_SEL_TIMER1_8821C \ 13333 (BIT_MASK_TSFT_SEL_TIMER1_8821C << BIT_SHIFT_TSFT_SEL_TIMER1_8821C) 13334 #define BIT_CLEAR_TSFT_SEL_TIMER1_8821C(x) ((x) & (~BITS_TSFT_SEL_TIMER1_8821C)) 13335 #define BIT_GET_TSFT_SEL_TIMER1_8821C(x) \ 13336 (((x) >> BIT_SHIFT_TSFT_SEL_TIMER1_8821C) & \ 13337 BIT_MASK_TSFT_SEL_TIMER1_8821C) 13338 #define BIT_SET_TSFT_SEL_TIMER1_8821C(x, v) \ 13339 (BIT_CLEAR_TSFT_SEL_TIMER1_8821C(x) | BIT_TSFT_SEL_TIMER1_8821C(v)) 13340 13341 #define BIT_SHIFT_EARLY_128US_8821C 0 13342 #define BIT_MASK_EARLY_128US_8821C 0x7 13343 #define BIT_EARLY_128US_8821C(x) \ 13344 (((x) & BIT_MASK_EARLY_128US_8821C) << BIT_SHIFT_EARLY_128US_8821C) 13345 #define BITS_EARLY_128US_8821C \ 13346 (BIT_MASK_EARLY_128US_8821C << BIT_SHIFT_EARLY_128US_8821C) 13347 #define BIT_CLEAR_EARLY_128US_8821C(x) ((x) & (~BITS_EARLY_128US_8821C)) 13348 #define BIT_GET_EARLY_128US_8821C(x) \ 13349 (((x) >> BIT_SHIFT_EARLY_128US_8821C) & BIT_MASK_EARLY_128US_8821C) 13350 #define BIT_SET_EARLY_128US_8821C(x, v) \ 13351 (BIT_CLEAR_EARLY_128US_8821C(x) | BIT_EARLY_128US_8821C(v)) 13352 13353 /* 2 REG_P2PPS1_CTRL_8821C */ 13354 #define BIT_P2P1_CTW_ALLSTASLEEP_8821C BIT(7) 13355 #define BIT_P2P1_OFF_DISTX_EN_8821C BIT(6) 13356 #define BIT_P2P1_PWR_MGT_EN_8821C BIT(5) 13357 #define BIT_P2P1_NOA1_EN_8821C BIT(2) 13358 #define BIT_P2P1_NOA0_EN_8821C BIT(1) 13359 13360 /* 2 REG_P2PPS2_CTRL_8821C */ 13361 #define BIT_P2P2_CTW_ALLSTASLEEP_8821C BIT(7) 13362 #define BIT_P2P2_OFF_DISTX_EN_8821C BIT(6) 13363 #define BIT_P2P2_PWR_MGT_EN_8821C BIT(5) 13364 #define BIT_P2P2_NOA1_EN_8821C BIT(2) 13365 #define BIT_P2P2_NOA0_EN_8821C BIT(1) 13366 13367 /* 2 REG_TIMER0_SRC_SEL_8821C */ 13368 13369 #define BIT_SHIFT_SYNC_CLI_SEL_8821C 4 13370 #define BIT_MASK_SYNC_CLI_SEL_8821C 0x7 13371 #define BIT_SYNC_CLI_SEL_8821C(x) \ 13372 (((x) & BIT_MASK_SYNC_CLI_SEL_8821C) << BIT_SHIFT_SYNC_CLI_SEL_8821C) 13373 #define BITS_SYNC_CLI_SEL_8821C \ 13374 (BIT_MASK_SYNC_CLI_SEL_8821C << BIT_SHIFT_SYNC_CLI_SEL_8821C) 13375 #define BIT_CLEAR_SYNC_CLI_SEL_8821C(x) ((x) & (~BITS_SYNC_CLI_SEL_8821C)) 13376 #define BIT_GET_SYNC_CLI_SEL_8821C(x) \ 13377 (((x) >> BIT_SHIFT_SYNC_CLI_SEL_8821C) & BIT_MASK_SYNC_CLI_SEL_8821C) 13378 #define BIT_SET_SYNC_CLI_SEL_8821C(x, v) \ 13379 (BIT_CLEAR_SYNC_CLI_SEL_8821C(x) | BIT_SYNC_CLI_SEL_8821C(v)) 13380 13381 #define BIT_SHIFT_TSFT_SEL_TIMER0_8821C 0 13382 #define BIT_MASK_TSFT_SEL_TIMER0_8821C 0x7 13383 #define BIT_TSFT_SEL_TIMER0_8821C(x) \ 13384 (((x) & BIT_MASK_TSFT_SEL_TIMER0_8821C) \ 13385 << BIT_SHIFT_TSFT_SEL_TIMER0_8821C) 13386 #define BITS_TSFT_SEL_TIMER0_8821C \ 13387 (BIT_MASK_TSFT_SEL_TIMER0_8821C << BIT_SHIFT_TSFT_SEL_TIMER0_8821C) 13388 #define BIT_CLEAR_TSFT_SEL_TIMER0_8821C(x) ((x) & (~BITS_TSFT_SEL_TIMER0_8821C)) 13389 #define BIT_GET_TSFT_SEL_TIMER0_8821C(x) \ 13390 (((x) >> BIT_SHIFT_TSFT_SEL_TIMER0_8821C) & \ 13391 BIT_MASK_TSFT_SEL_TIMER0_8821C) 13392 #define BIT_SET_TSFT_SEL_TIMER0_8821C(x, v) \ 13393 (BIT_CLEAR_TSFT_SEL_TIMER0_8821C(x) | BIT_TSFT_SEL_TIMER0_8821C(v)) 13394 13395 /* 2 REG_NOA_UNIT_SEL_8821C */ 13396 13397 #define BIT_SHIFT_NOA_UNIT2_SEL_8821C 8 13398 #define BIT_MASK_NOA_UNIT2_SEL_8821C 0x7 13399 #define BIT_NOA_UNIT2_SEL_8821C(x) \ 13400 (((x) & BIT_MASK_NOA_UNIT2_SEL_8821C) << BIT_SHIFT_NOA_UNIT2_SEL_8821C) 13401 #define BITS_NOA_UNIT2_SEL_8821C \ 13402 (BIT_MASK_NOA_UNIT2_SEL_8821C << BIT_SHIFT_NOA_UNIT2_SEL_8821C) 13403 #define BIT_CLEAR_NOA_UNIT2_SEL_8821C(x) ((x) & (~BITS_NOA_UNIT2_SEL_8821C)) 13404 #define BIT_GET_NOA_UNIT2_SEL_8821C(x) \ 13405 (((x) >> BIT_SHIFT_NOA_UNIT2_SEL_8821C) & BIT_MASK_NOA_UNIT2_SEL_8821C) 13406 #define BIT_SET_NOA_UNIT2_SEL_8821C(x, v) \ 13407 (BIT_CLEAR_NOA_UNIT2_SEL_8821C(x) | BIT_NOA_UNIT2_SEL_8821C(v)) 13408 13409 #define BIT_SHIFT_NOA_UNIT1_SEL_8821C 4 13410 #define BIT_MASK_NOA_UNIT1_SEL_8821C 0x7 13411 #define BIT_NOA_UNIT1_SEL_8821C(x) \ 13412 (((x) & BIT_MASK_NOA_UNIT1_SEL_8821C) << BIT_SHIFT_NOA_UNIT1_SEL_8821C) 13413 #define BITS_NOA_UNIT1_SEL_8821C \ 13414 (BIT_MASK_NOA_UNIT1_SEL_8821C << BIT_SHIFT_NOA_UNIT1_SEL_8821C) 13415 #define BIT_CLEAR_NOA_UNIT1_SEL_8821C(x) ((x) & (~BITS_NOA_UNIT1_SEL_8821C)) 13416 #define BIT_GET_NOA_UNIT1_SEL_8821C(x) \ 13417 (((x) >> BIT_SHIFT_NOA_UNIT1_SEL_8821C) & BIT_MASK_NOA_UNIT1_SEL_8821C) 13418 #define BIT_SET_NOA_UNIT1_SEL_8821C(x, v) \ 13419 (BIT_CLEAR_NOA_UNIT1_SEL_8821C(x) | BIT_NOA_UNIT1_SEL_8821C(v)) 13420 13421 #define BIT_SHIFT_NOA_UNIT0_SEL_8821C 0 13422 #define BIT_MASK_NOA_UNIT0_SEL_8821C 0x7 13423 #define BIT_NOA_UNIT0_SEL_8821C(x) \ 13424 (((x) & BIT_MASK_NOA_UNIT0_SEL_8821C) << BIT_SHIFT_NOA_UNIT0_SEL_8821C) 13425 #define BITS_NOA_UNIT0_SEL_8821C \ 13426 (BIT_MASK_NOA_UNIT0_SEL_8821C << BIT_SHIFT_NOA_UNIT0_SEL_8821C) 13427 #define BIT_CLEAR_NOA_UNIT0_SEL_8821C(x) ((x) & (~BITS_NOA_UNIT0_SEL_8821C)) 13428 #define BIT_GET_NOA_UNIT0_SEL_8821C(x) \ 13429 (((x) >> BIT_SHIFT_NOA_UNIT0_SEL_8821C) & BIT_MASK_NOA_UNIT0_SEL_8821C) 13430 #define BIT_SET_NOA_UNIT0_SEL_8821C(x, v) \ 13431 (BIT_CLEAR_NOA_UNIT0_SEL_8821C(x) | BIT_NOA_UNIT0_SEL_8821C(v)) 13432 13433 /* 2 REG_P2POFF_DIS_TXTIME_8821C */ 13434 13435 #define BIT_SHIFT_P2POFF_DIS_TXTIME_8821C 0 13436 #define BIT_MASK_P2POFF_DIS_TXTIME_8821C 0xff 13437 #define BIT_P2POFF_DIS_TXTIME_8821C(x) \ 13438 (((x) & BIT_MASK_P2POFF_DIS_TXTIME_8821C) \ 13439 << BIT_SHIFT_P2POFF_DIS_TXTIME_8821C) 13440 #define BITS_P2POFF_DIS_TXTIME_8821C \ 13441 (BIT_MASK_P2POFF_DIS_TXTIME_8821C << BIT_SHIFT_P2POFF_DIS_TXTIME_8821C) 13442 #define BIT_CLEAR_P2POFF_DIS_TXTIME_8821C(x) \ 13443 ((x) & (~BITS_P2POFF_DIS_TXTIME_8821C)) 13444 #define BIT_GET_P2POFF_DIS_TXTIME_8821C(x) \ 13445 (((x) >> BIT_SHIFT_P2POFF_DIS_TXTIME_8821C) & \ 13446 BIT_MASK_P2POFF_DIS_TXTIME_8821C) 13447 #define BIT_SET_P2POFF_DIS_TXTIME_8821C(x, v) \ 13448 (BIT_CLEAR_P2POFF_DIS_TXTIME_8821C(x) | BIT_P2POFF_DIS_TXTIME_8821C(v)) 13449 13450 /* 2 REG_MBSSID_BCN_SPACE2_8821C */ 13451 13452 #define BIT_SHIFT_BCN_SPACE_CLINT2_8821C 16 13453 #define BIT_MASK_BCN_SPACE_CLINT2_8821C 0xfff 13454 #define BIT_BCN_SPACE_CLINT2_8821C(x) \ 13455 (((x) & BIT_MASK_BCN_SPACE_CLINT2_8821C) \ 13456 << BIT_SHIFT_BCN_SPACE_CLINT2_8821C) 13457 #define BITS_BCN_SPACE_CLINT2_8821C \ 13458 (BIT_MASK_BCN_SPACE_CLINT2_8821C << BIT_SHIFT_BCN_SPACE_CLINT2_8821C) 13459 #define BIT_CLEAR_BCN_SPACE_CLINT2_8821C(x) \ 13460 ((x) & (~BITS_BCN_SPACE_CLINT2_8821C)) 13461 #define BIT_GET_BCN_SPACE_CLINT2_8821C(x) \ 13462 (((x) >> BIT_SHIFT_BCN_SPACE_CLINT2_8821C) & \ 13463 BIT_MASK_BCN_SPACE_CLINT2_8821C) 13464 #define BIT_SET_BCN_SPACE_CLINT2_8821C(x, v) \ 13465 (BIT_CLEAR_BCN_SPACE_CLINT2_8821C(x) | BIT_BCN_SPACE_CLINT2_8821C(v)) 13466 13467 #define BIT_SHIFT_BCN_SPACE_CLINT1_8821C 0 13468 #define BIT_MASK_BCN_SPACE_CLINT1_8821C 0xfff 13469 #define BIT_BCN_SPACE_CLINT1_8821C(x) \ 13470 (((x) & BIT_MASK_BCN_SPACE_CLINT1_8821C) \ 13471 << BIT_SHIFT_BCN_SPACE_CLINT1_8821C) 13472 #define BITS_BCN_SPACE_CLINT1_8821C \ 13473 (BIT_MASK_BCN_SPACE_CLINT1_8821C << BIT_SHIFT_BCN_SPACE_CLINT1_8821C) 13474 #define BIT_CLEAR_BCN_SPACE_CLINT1_8821C(x) \ 13475 ((x) & (~BITS_BCN_SPACE_CLINT1_8821C)) 13476 #define BIT_GET_BCN_SPACE_CLINT1_8821C(x) \ 13477 (((x) >> BIT_SHIFT_BCN_SPACE_CLINT1_8821C) & \ 13478 BIT_MASK_BCN_SPACE_CLINT1_8821C) 13479 #define BIT_SET_BCN_SPACE_CLINT1_8821C(x, v) \ 13480 (BIT_CLEAR_BCN_SPACE_CLINT1_8821C(x) | BIT_BCN_SPACE_CLINT1_8821C(v)) 13481 13482 /* 2 REG_MBSSID_BCN_SPACE3_8821C */ 13483 13484 #define BIT_SHIFT_SUB_BCN_SPACE_8821C 16 13485 #define BIT_MASK_SUB_BCN_SPACE_8821C 0xff 13486 #define BIT_SUB_BCN_SPACE_8821C(x) \ 13487 (((x) & BIT_MASK_SUB_BCN_SPACE_8821C) << BIT_SHIFT_SUB_BCN_SPACE_8821C) 13488 #define BITS_SUB_BCN_SPACE_8821C \ 13489 (BIT_MASK_SUB_BCN_SPACE_8821C << BIT_SHIFT_SUB_BCN_SPACE_8821C) 13490 #define BIT_CLEAR_SUB_BCN_SPACE_8821C(x) ((x) & (~BITS_SUB_BCN_SPACE_8821C)) 13491 #define BIT_GET_SUB_BCN_SPACE_8821C(x) \ 13492 (((x) >> BIT_SHIFT_SUB_BCN_SPACE_8821C) & BIT_MASK_SUB_BCN_SPACE_8821C) 13493 #define BIT_SET_SUB_BCN_SPACE_8821C(x, v) \ 13494 (BIT_CLEAR_SUB_BCN_SPACE_8821C(x) | BIT_SUB_BCN_SPACE_8821C(v)) 13495 13496 #define BIT_SHIFT_BCN_SPACE_CLINT3_8821C 0 13497 #define BIT_MASK_BCN_SPACE_CLINT3_8821C 0xfff 13498 #define BIT_BCN_SPACE_CLINT3_8821C(x) \ 13499 (((x) & BIT_MASK_BCN_SPACE_CLINT3_8821C) \ 13500 << BIT_SHIFT_BCN_SPACE_CLINT3_8821C) 13501 #define BITS_BCN_SPACE_CLINT3_8821C \ 13502 (BIT_MASK_BCN_SPACE_CLINT3_8821C << BIT_SHIFT_BCN_SPACE_CLINT3_8821C) 13503 #define BIT_CLEAR_BCN_SPACE_CLINT3_8821C(x) \ 13504 ((x) & (~BITS_BCN_SPACE_CLINT3_8821C)) 13505 #define BIT_GET_BCN_SPACE_CLINT3_8821C(x) \ 13506 (((x) >> BIT_SHIFT_BCN_SPACE_CLINT3_8821C) & \ 13507 BIT_MASK_BCN_SPACE_CLINT3_8821C) 13508 #define BIT_SET_BCN_SPACE_CLINT3_8821C(x, v) \ 13509 (BIT_CLEAR_BCN_SPACE_CLINT3_8821C(x) | BIT_BCN_SPACE_CLINT3_8821C(v)) 13510 13511 /* 2 REG_ACMHWCTRL_8821C */ 13512 #define BIT_BEQ_ACM_STATUS_8821C BIT(7) 13513 #define BIT_VIQ_ACM_STATUS_8821C BIT(6) 13514 #define BIT_VOQ_ACM_STATUS_8821C BIT(5) 13515 #define BIT_BEQ_ACM_EN_8821C BIT(3) 13516 #define BIT_VIQ_ACM_EN_8821C BIT(2) 13517 #define BIT_VOQ_ACM_EN_8821C BIT(1) 13518 #define BIT_ACMHWEN_8821C BIT(0) 13519 13520 /* 2 REG_ACMRSTCTRL_8821C */ 13521 #define BIT_BE_ACM_RESET_USED_TIME_8821C BIT(2) 13522 #define BIT_VI_ACM_RESET_USED_TIME_8821C BIT(1) 13523 #define BIT_VO_ACM_RESET_USED_TIME_8821C BIT(0) 13524 13525 /* 2 REG_ACMAVG_8821C */ 13526 13527 #define BIT_SHIFT_AVGPERIOD_8821C 0 13528 #define BIT_MASK_AVGPERIOD_8821C 0xffff 13529 #define BIT_AVGPERIOD_8821C(x) \ 13530 (((x) & BIT_MASK_AVGPERIOD_8821C) << BIT_SHIFT_AVGPERIOD_8821C) 13531 #define BITS_AVGPERIOD_8821C \ 13532 (BIT_MASK_AVGPERIOD_8821C << BIT_SHIFT_AVGPERIOD_8821C) 13533 #define BIT_CLEAR_AVGPERIOD_8821C(x) ((x) & (~BITS_AVGPERIOD_8821C)) 13534 #define BIT_GET_AVGPERIOD_8821C(x) \ 13535 (((x) >> BIT_SHIFT_AVGPERIOD_8821C) & BIT_MASK_AVGPERIOD_8821C) 13536 #define BIT_SET_AVGPERIOD_8821C(x, v) \ 13537 (BIT_CLEAR_AVGPERIOD_8821C(x) | BIT_AVGPERIOD_8821C(v)) 13538 13539 /* 2 REG_VO_ADMTIME_8821C */ 13540 13541 #define BIT_SHIFT_VO_ADMITTED_TIME_8821C 0 13542 #define BIT_MASK_VO_ADMITTED_TIME_8821C 0xffff 13543 #define BIT_VO_ADMITTED_TIME_8821C(x) \ 13544 (((x) & BIT_MASK_VO_ADMITTED_TIME_8821C) \ 13545 << BIT_SHIFT_VO_ADMITTED_TIME_8821C) 13546 #define BITS_VO_ADMITTED_TIME_8821C \ 13547 (BIT_MASK_VO_ADMITTED_TIME_8821C << BIT_SHIFT_VO_ADMITTED_TIME_8821C) 13548 #define BIT_CLEAR_VO_ADMITTED_TIME_8821C(x) \ 13549 ((x) & (~BITS_VO_ADMITTED_TIME_8821C)) 13550 #define BIT_GET_VO_ADMITTED_TIME_8821C(x) \ 13551 (((x) >> BIT_SHIFT_VO_ADMITTED_TIME_8821C) & \ 13552 BIT_MASK_VO_ADMITTED_TIME_8821C) 13553 #define BIT_SET_VO_ADMITTED_TIME_8821C(x, v) \ 13554 (BIT_CLEAR_VO_ADMITTED_TIME_8821C(x) | BIT_VO_ADMITTED_TIME_8821C(v)) 13555 13556 /* 2 REG_VI_ADMTIME_8821C */ 13557 13558 #define BIT_SHIFT_VI_ADMITTED_TIME_8821C 0 13559 #define BIT_MASK_VI_ADMITTED_TIME_8821C 0xffff 13560 #define BIT_VI_ADMITTED_TIME_8821C(x) \ 13561 (((x) & BIT_MASK_VI_ADMITTED_TIME_8821C) \ 13562 << BIT_SHIFT_VI_ADMITTED_TIME_8821C) 13563 #define BITS_VI_ADMITTED_TIME_8821C \ 13564 (BIT_MASK_VI_ADMITTED_TIME_8821C << BIT_SHIFT_VI_ADMITTED_TIME_8821C) 13565 #define BIT_CLEAR_VI_ADMITTED_TIME_8821C(x) \ 13566 ((x) & (~BITS_VI_ADMITTED_TIME_8821C)) 13567 #define BIT_GET_VI_ADMITTED_TIME_8821C(x) \ 13568 (((x) >> BIT_SHIFT_VI_ADMITTED_TIME_8821C) & \ 13569 BIT_MASK_VI_ADMITTED_TIME_8821C) 13570 #define BIT_SET_VI_ADMITTED_TIME_8821C(x, v) \ 13571 (BIT_CLEAR_VI_ADMITTED_TIME_8821C(x) | BIT_VI_ADMITTED_TIME_8821C(v)) 13572 13573 /* 2 REG_BE_ADMTIME_8821C */ 13574 13575 #define BIT_SHIFT_BE_ADMITTED_TIME_8821C 0 13576 #define BIT_MASK_BE_ADMITTED_TIME_8821C 0xffff 13577 #define BIT_BE_ADMITTED_TIME_8821C(x) \ 13578 (((x) & BIT_MASK_BE_ADMITTED_TIME_8821C) \ 13579 << BIT_SHIFT_BE_ADMITTED_TIME_8821C) 13580 #define BITS_BE_ADMITTED_TIME_8821C \ 13581 (BIT_MASK_BE_ADMITTED_TIME_8821C << BIT_SHIFT_BE_ADMITTED_TIME_8821C) 13582 #define BIT_CLEAR_BE_ADMITTED_TIME_8821C(x) \ 13583 ((x) & (~BITS_BE_ADMITTED_TIME_8821C)) 13584 #define BIT_GET_BE_ADMITTED_TIME_8821C(x) \ 13585 (((x) >> BIT_SHIFT_BE_ADMITTED_TIME_8821C) & \ 13586 BIT_MASK_BE_ADMITTED_TIME_8821C) 13587 #define BIT_SET_BE_ADMITTED_TIME_8821C(x, v) \ 13588 (BIT_CLEAR_BE_ADMITTED_TIME_8821C(x) | BIT_BE_ADMITTED_TIME_8821C(v)) 13589 13590 /* 2 REG_NOT_VALID_8821C */ 13591 13592 /* 2 REG_NOT_VALID_8821C */ 13593 13594 /* 2 REG_EDCA_RANDOM_GEN_8821C */ 13595 13596 #define BIT_SHIFT_RANDOM_GEN_8821C 0 13597 #define BIT_MASK_RANDOM_GEN_8821C 0xffffff 13598 #define BIT_RANDOM_GEN_8821C(x) \ 13599 (((x) & BIT_MASK_RANDOM_GEN_8821C) << BIT_SHIFT_RANDOM_GEN_8821C) 13600 #define BITS_RANDOM_GEN_8821C \ 13601 (BIT_MASK_RANDOM_GEN_8821C << BIT_SHIFT_RANDOM_GEN_8821C) 13602 #define BIT_CLEAR_RANDOM_GEN_8821C(x) ((x) & (~BITS_RANDOM_GEN_8821C)) 13603 #define BIT_GET_RANDOM_GEN_8821C(x) \ 13604 (((x) >> BIT_SHIFT_RANDOM_GEN_8821C) & BIT_MASK_RANDOM_GEN_8821C) 13605 #define BIT_SET_RANDOM_GEN_8821C(x, v) \ 13606 (BIT_CLEAR_RANDOM_GEN_8821C(x) | BIT_RANDOM_GEN_8821C(v)) 13607 13608 /* 2 REG_TXCMD_NOA_SEL_8821C */ 13609 13610 #define BIT_SHIFT_NOA_SEL_V2_8821C 4 13611 #define BIT_MASK_NOA_SEL_V2_8821C 0x7 13612 #define BIT_NOA_SEL_V2_8821C(x) \ 13613 (((x) & BIT_MASK_NOA_SEL_V2_8821C) << BIT_SHIFT_NOA_SEL_V2_8821C) 13614 #define BITS_NOA_SEL_V2_8821C \ 13615 (BIT_MASK_NOA_SEL_V2_8821C << BIT_SHIFT_NOA_SEL_V2_8821C) 13616 #define BIT_CLEAR_NOA_SEL_V2_8821C(x) ((x) & (~BITS_NOA_SEL_V2_8821C)) 13617 #define BIT_GET_NOA_SEL_V2_8821C(x) \ 13618 (((x) >> BIT_SHIFT_NOA_SEL_V2_8821C) & BIT_MASK_NOA_SEL_V2_8821C) 13619 #define BIT_SET_NOA_SEL_V2_8821C(x, v) \ 13620 (BIT_CLEAR_NOA_SEL_V2_8821C(x) | BIT_NOA_SEL_V2_8821C(v)) 13621 13622 #define BIT_SHIFT_TXCMD_SEG_SEL_8821C 0 13623 #define BIT_MASK_TXCMD_SEG_SEL_8821C 0xf 13624 #define BIT_TXCMD_SEG_SEL_8821C(x) \ 13625 (((x) & BIT_MASK_TXCMD_SEG_SEL_8821C) << BIT_SHIFT_TXCMD_SEG_SEL_8821C) 13626 #define BITS_TXCMD_SEG_SEL_8821C \ 13627 (BIT_MASK_TXCMD_SEG_SEL_8821C << BIT_SHIFT_TXCMD_SEG_SEL_8821C) 13628 #define BIT_CLEAR_TXCMD_SEG_SEL_8821C(x) ((x) & (~BITS_TXCMD_SEG_SEL_8821C)) 13629 #define BIT_GET_TXCMD_SEG_SEL_8821C(x) \ 13630 (((x) >> BIT_SHIFT_TXCMD_SEG_SEL_8821C) & BIT_MASK_TXCMD_SEG_SEL_8821C) 13631 #define BIT_SET_TXCMD_SEG_SEL_8821C(x, v) \ 13632 (BIT_CLEAR_TXCMD_SEG_SEL_8821C(x) | BIT_TXCMD_SEG_SEL_8821C(v)) 13633 13634 /* 2 REG_NOT_VALID_8821C */ 13635 13636 /* 2 REG_NOT_VALID_8821C */ 13637 13638 /* 2 REG_NOT_VALID_8821C */ 13639 13640 /* 2 REG_NOT_VALID_8821C */ 13641 13642 /* 2 REG_NOA_PARAM_8821C */ 13643 13644 #define BIT_SHIFT_NOA_DURATION_V1_8821C 0 13645 #define BIT_MASK_NOA_DURATION_V1_8821C 0xffffffffL 13646 #define BIT_NOA_DURATION_V1_8821C(x) \ 13647 (((x) & BIT_MASK_NOA_DURATION_V1_8821C) \ 13648 << BIT_SHIFT_NOA_DURATION_V1_8821C) 13649 #define BITS_NOA_DURATION_V1_8821C \ 13650 (BIT_MASK_NOA_DURATION_V1_8821C << BIT_SHIFT_NOA_DURATION_V1_8821C) 13651 #define BIT_CLEAR_NOA_DURATION_V1_8821C(x) ((x) & (~BITS_NOA_DURATION_V1_8821C)) 13652 #define BIT_GET_NOA_DURATION_V1_8821C(x) \ 13653 (((x) >> BIT_SHIFT_NOA_DURATION_V1_8821C) & \ 13654 BIT_MASK_NOA_DURATION_V1_8821C) 13655 #define BIT_SET_NOA_DURATION_V1_8821C(x, v) \ 13656 (BIT_CLEAR_NOA_DURATION_V1_8821C(x) | BIT_NOA_DURATION_V1_8821C(v)) 13657 13658 /* 2 REG_NOA_PARAM_1_8821C */ 13659 13660 #define BIT_SHIFT_NOA_INTERVAL_V1_8821C 0 13661 #define BIT_MASK_NOA_INTERVAL_V1_8821C 0xffffffffL 13662 #define BIT_NOA_INTERVAL_V1_8821C(x) \ 13663 (((x) & BIT_MASK_NOA_INTERVAL_V1_8821C) \ 13664 << BIT_SHIFT_NOA_INTERVAL_V1_8821C) 13665 #define BITS_NOA_INTERVAL_V1_8821C \ 13666 (BIT_MASK_NOA_INTERVAL_V1_8821C << BIT_SHIFT_NOA_INTERVAL_V1_8821C) 13667 #define BIT_CLEAR_NOA_INTERVAL_V1_8821C(x) ((x) & (~BITS_NOA_INTERVAL_V1_8821C)) 13668 #define BIT_GET_NOA_INTERVAL_V1_8821C(x) \ 13669 (((x) >> BIT_SHIFT_NOA_INTERVAL_V1_8821C) & \ 13670 BIT_MASK_NOA_INTERVAL_V1_8821C) 13671 #define BIT_SET_NOA_INTERVAL_V1_8821C(x, v) \ 13672 (BIT_CLEAR_NOA_INTERVAL_V1_8821C(x) | BIT_NOA_INTERVAL_V1_8821C(v)) 13673 13674 /* 2 REG_NOA_PARAM_2_8821C */ 13675 13676 #define BIT_SHIFT_NOA_START_TIME_V1_8821C 0 13677 #define BIT_MASK_NOA_START_TIME_V1_8821C 0xffffffffL 13678 #define BIT_NOA_START_TIME_V1_8821C(x) \ 13679 (((x) & BIT_MASK_NOA_START_TIME_V1_8821C) \ 13680 << BIT_SHIFT_NOA_START_TIME_V1_8821C) 13681 #define BITS_NOA_START_TIME_V1_8821C \ 13682 (BIT_MASK_NOA_START_TIME_V1_8821C << BIT_SHIFT_NOA_START_TIME_V1_8821C) 13683 #define BIT_CLEAR_NOA_START_TIME_V1_8821C(x) \ 13684 ((x) & (~BITS_NOA_START_TIME_V1_8821C)) 13685 #define BIT_GET_NOA_START_TIME_V1_8821C(x) \ 13686 (((x) >> BIT_SHIFT_NOA_START_TIME_V1_8821C) & \ 13687 BIT_MASK_NOA_START_TIME_V1_8821C) 13688 #define BIT_SET_NOA_START_TIME_V1_8821C(x, v) \ 13689 (BIT_CLEAR_NOA_START_TIME_V1_8821C(x) | BIT_NOA_START_TIME_V1_8821C(v)) 13690 13691 /* 2 REG_NOA_PARAM_3_8821C */ 13692 13693 #define BIT_SHIFT_NOA_COUNT_V1_8821C 0 13694 #define BIT_MASK_NOA_COUNT_V1_8821C 0xffffffffL 13695 #define BIT_NOA_COUNT_V1_8821C(x) \ 13696 (((x) & BIT_MASK_NOA_COUNT_V1_8821C) << BIT_SHIFT_NOA_COUNT_V1_8821C) 13697 #define BITS_NOA_COUNT_V1_8821C \ 13698 (BIT_MASK_NOA_COUNT_V1_8821C << BIT_SHIFT_NOA_COUNT_V1_8821C) 13699 #define BIT_CLEAR_NOA_COUNT_V1_8821C(x) ((x) & (~BITS_NOA_COUNT_V1_8821C)) 13700 #define BIT_GET_NOA_COUNT_V1_8821C(x) \ 13701 (((x) >> BIT_SHIFT_NOA_COUNT_V1_8821C) & BIT_MASK_NOA_COUNT_V1_8821C) 13702 #define BIT_SET_NOA_COUNT_V1_8821C(x, v) \ 13703 (BIT_CLEAR_NOA_COUNT_V1_8821C(x) | BIT_NOA_COUNT_V1_8821C(v)) 13704 13705 /* 2 REG_P2P_RST_8821C */ 13706 #define BIT_P2P2_PWR_RST1_8821C BIT(5) 13707 #define BIT_P2P2_PWR_RST0_8821C BIT(4) 13708 #define BIT_P2P1_PWR_RST1_8821C BIT(3) 13709 #define BIT_P2P1_PWR_RST0_8821C BIT(2) 13710 #define BIT_P2P_PWR_RST1_V1_8821C BIT(1) 13711 #define BIT_P2P_PWR_RST0_V1_8821C BIT(0) 13712 13713 /* 2 REG_SCHEDULER_RST_8821C */ 13714 #define BIT_SYNC_CLI_ONCE_RIGHT_NOW_8821C BIT(2) 13715 #define BIT_SYNC_CLI_ONCE_BY_TBTT_8821C BIT(1) 13716 #define BIT_SCHEDULER_RST_V1_8821C BIT(0) 13717 13718 /* 2 REG_NOT_VALID_8821C */ 13719 13720 /* 2 REG_NOT_VALID_8821C */ 13721 13722 /* 2 REG_NOT_VALID_8821C */ 13723 13724 /* 2 REG_SCH_TXCMD_8821C */ 13725 13726 #define BIT_SHIFT_SCH_TXCMD_8821C 0 13727 #define BIT_MASK_SCH_TXCMD_8821C 0xffffffffL 13728 #define BIT_SCH_TXCMD_8821C(x) \ 13729 (((x) & BIT_MASK_SCH_TXCMD_8821C) << BIT_SHIFT_SCH_TXCMD_8821C) 13730 #define BITS_SCH_TXCMD_8821C \ 13731 (BIT_MASK_SCH_TXCMD_8821C << BIT_SHIFT_SCH_TXCMD_8821C) 13732 #define BIT_CLEAR_SCH_TXCMD_8821C(x) ((x) & (~BITS_SCH_TXCMD_8821C)) 13733 #define BIT_GET_SCH_TXCMD_8821C(x) \ 13734 (((x) >> BIT_SHIFT_SCH_TXCMD_8821C) & BIT_MASK_SCH_TXCMD_8821C) 13735 #define BIT_SET_SCH_TXCMD_8821C(x, v) \ 13736 (BIT_CLEAR_SCH_TXCMD_8821C(x) | BIT_SCH_TXCMD_8821C(v)) 13737 13738 /* 2 REG_PAGE5_DUMMY_8821C */ 13739 #define BIT_ECO_TXOP_BREAK_FORCE_CFEND_8821C BIT(0) 13740 13741 /* 2 REG_CPUMGQ_TX_TIMER_8821C */ 13742 13743 #define BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8821C 0 13744 #define BIT_MASK_CPUMGQ_TX_TIMER_V1_8821C 0xffffffffL 13745 #define BIT_CPUMGQ_TX_TIMER_V1_8821C(x) \ 13746 (((x) & BIT_MASK_CPUMGQ_TX_TIMER_V1_8821C) \ 13747 << BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8821C) 13748 #define BITS_CPUMGQ_TX_TIMER_V1_8821C \ 13749 (BIT_MASK_CPUMGQ_TX_TIMER_V1_8821C \ 13750 << BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8821C) 13751 #define BIT_CLEAR_CPUMGQ_TX_TIMER_V1_8821C(x) \ 13752 ((x) & (~BITS_CPUMGQ_TX_TIMER_V1_8821C)) 13753 #define BIT_GET_CPUMGQ_TX_TIMER_V1_8821C(x) \ 13754 (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_V1_8821C) & \ 13755 BIT_MASK_CPUMGQ_TX_TIMER_V1_8821C) 13756 #define BIT_SET_CPUMGQ_TX_TIMER_V1_8821C(x, v) \ 13757 (BIT_CLEAR_CPUMGQ_TX_TIMER_V1_8821C(x) | \ 13758 BIT_CPUMGQ_TX_TIMER_V1_8821C(v)) 13759 13760 /* 2 REG_PS_TIMER_A_8821C */ 13761 13762 #define BIT_SHIFT_PS_TIMER_A_V1_8821C 0 13763 #define BIT_MASK_PS_TIMER_A_V1_8821C 0xffffffffL 13764 #define BIT_PS_TIMER_A_V1_8821C(x) \ 13765 (((x) & BIT_MASK_PS_TIMER_A_V1_8821C) << BIT_SHIFT_PS_TIMER_A_V1_8821C) 13766 #define BITS_PS_TIMER_A_V1_8821C \ 13767 (BIT_MASK_PS_TIMER_A_V1_8821C << BIT_SHIFT_PS_TIMER_A_V1_8821C) 13768 #define BIT_CLEAR_PS_TIMER_A_V1_8821C(x) ((x) & (~BITS_PS_TIMER_A_V1_8821C)) 13769 #define BIT_GET_PS_TIMER_A_V1_8821C(x) \ 13770 (((x) >> BIT_SHIFT_PS_TIMER_A_V1_8821C) & BIT_MASK_PS_TIMER_A_V1_8821C) 13771 #define BIT_SET_PS_TIMER_A_V1_8821C(x, v) \ 13772 (BIT_CLEAR_PS_TIMER_A_V1_8821C(x) | BIT_PS_TIMER_A_V1_8821C(v)) 13773 13774 /* 2 REG_PS_TIMER_B_8821C */ 13775 13776 #define BIT_SHIFT_PS_TIMER_B_V1_8821C 0 13777 #define BIT_MASK_PS_TIMER_B_V1_8821C 0xffffffffL 13778 #define BIT_PS_TIMER_B_V1_8821C(x) \ 13779 (((x) & BIT_MASK_PS_TIMER_B_V1_8821C) << BIT_SHIFT_PS_TIMER_B_V1_8821C) 13780 #define BITS_PS_TIMER_B_V1_8821C \ 13781 (BIT_MASK_PS_TIMER_B_V1_8821C << BIT_SHIFT_PS_TIMER_B_V1_8821C) 13782 #define BIT_CLEAR_PS_TIMER_B_V1_8821C(x) ((x) & (~BITS_PS_TIMER_B_V1_8821C)) 13783 #define BIT_GET_PS_TIMER_B_V1_8821C(x) \ 13784 (((x) >> BIT_SHIFT_PS_TIMER_B_V1_8821C) & BIT_MASK_PS_TIMER_B_V1_8821C) 13785 #define BIT_SET_PS_TIMER_B_V1_8821C(x, v) \ 13786 (BIT_CLEAR_PS_TIMER_B_V1_8821C(x) | BIT_PS_TIMER_B_V1_8821C(v)) 13787 13788 /* 2 REG_PS_TIMER_C_8821C */ 13789 13790 #define BIT_SHIFT_PS_TIMER_C_V1_8821C 0 13791 #define BIT_MASK_PS_TIMER_C_V1_8821C 0xffffffffL 13792 #define BIT_PS_TIMER_C_V1_8821C(x) \ 13793 (((x) & BIT_MASK_PS_TIMER_C_V1_8821C) << BIT_SHIFT_PS_TIMER_C_V1_8821C) 13794 #define BITS_PS_TIMER_C_V1_8821C \ 13795 (BIT_MASK_PS_TIMER_C_V1_8821C << BIT_SHIFT_PS_TIMER_C_V1_8821C) 13796 #define BIT_CLEAR_PS_TIMER_C_V1_8821C(x) ((x) & (~BITS_PS_TIMER_C_V1_8821C)) 13797 #define BIT_GET_PS_TIMER_C_V1_8821C(x) \ 13798 (((x) >> BIT_SHIFT_PS_TIMER_C_V1_8821C) & BIT_MASK_PS_TIMER_C_V1_8821C) 13799 #define BIT_SET_PS_TIMER_C_V1_8821C(x, v) \ 13800 (BIT_CLEAR_PS_TIMER_C_V1_8821C(x) | BIT_PS_TIMER_C_V1_8821C(v)) 13801 13802 /* 2 REG_PS_TIMER_ABC_CPUMGQ_TIMER_CRTL_8821C */ 13803 #define BIT_CPUMGQ_TIMER_EN_8821C BIT(31) 13804 #define BIT_CPUMGQ_TX_EN_8821C BIT(28) 13805 13806 #define BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8821C 24 13807 #define BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8821C 0x7 13808 #define BIT_CPUMGQ_TIMER_TSF_SEL_8821C(x) \ 13809 (((x) & BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8821C) \ 13810 << BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8821C) 13811 #define BITS_CPUMGQ_TIMER_TSF_SEL_8821C \ 13812 (BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8821C \ 13813 << BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8821C) 13814 #define BIT_CLEAR_CPUMGQ_TIMER_TSF_SEL_8821C(x) \ 13815 ((x) & (~BITS_CPUMGQ_TIMER_TSF_SEL_8821C)) 13816 #define BIT_GET_CPUMGQ_TIMER_TSF_SEL_8821C(x) \ 13817 (((x) >> BIT_SHIFT_CPUMGQ_TIMER_TSF_SEL_8821C) & \ 13818 BIT_MASK_CPUMGQ_TIMER_TSF_SEL_8821C) 13819 #define BIT_SET_CPUMGQ_TIMER_TSF_SEL_8821C(x, v) \ 13820 (BIT_CLEAR_CPUMGQ_TIMER_TSF_SEL_8821C(x) | \ 13821 BIT_CPUMGQ_TIMER_TSF_SEL_8821C(v)) 13822 13823 #define BIT_PS_TIMER_C_EN_8821C BIT(23) 13824 13825 #define BIT_SHIFT_PS_TIMER_C_TSF_SEL_8821C 16 13826 #define BIT_MASK_PS_TIMER_C_TSF_SEL_8821C 0x7 13827 #define BIT_PS_TIMER_C_TSF_SEL_8821C(x) \ 13828 (((x) & BIT_MASK_PS_TIMER_C_TSF_SEL_8821C) \ 13829 << BIT_SHIFT_PS_TIMER_C_TSF_SEL_8821C) 13830 #define BITS_PS_TIMER_C_TSF_SEL_8821C \ 13831 (BIT_MASK_PS_TIMER_C_TSF_SEL_8821C \ 13832 << BIT_SHIFT_PS_TIMER_C_TSF_SEL_8821C) 13833 #define BIT_CLEAR_PS_TIMER_C_TSF_SEL_8821C(x) \ 13834 ((x) & (~BITS_PS_TIMER_C_TSF_SEL_8821C)) 13835 #define BIT_GET_PS_TIMER_C_TSF_SEL_8821C(x) \ 13836 (((x) >> BIT_SHIFT_PS_TIMER_C_TSF_SEL_8821C) & \ 13837 BIT_MASK_PS_TIMER_C_TSF_SEL_8821C) 13838 #define BIT_SET_PS_TIMER_C_TSF_SEL_8821C(x, v) \ 13839 (BIT_CLEAR_PS_TIMER_C_TSF_SEL_8821C(x) | \ 13840 BIT_PS_TIMER_C_TSF_SEL_8821C(v)) 13841 13842 #define BIT_PS_TIMER_B_EN_8821C BIT(15) 13843 13844 #define BIT_SHIFT_PS_TIMER_B_TSF_SEL_8821C 8 13845 #define BIT_MASK_PS_TIMER_B_TSF_SEL_8821C 0x7 13846 #define BIT_PS_TIMER_B_TSF_SEL_8821C(x) \ 13847 (((x) & BIT_MASK_PS_TIMER_B_TSF_SEL_8821C) \ 13848 << BIT_SHIFT_PS_TIMER_B_TSF_SEL_8821C) 13849 #define BITS_PS_TIMER_B_TSF_SEL_8821C \ 13850 (BIT_MASK_PS_TIMER_B_TSF_SEL_8821C \ 13851 << BIT_SHIFT_PS_TIMER_B_TSF_SEL_8821C) 13852 #define BIT_CLEAR_PS_TIMER_B_TSF_SEL_8821C(x) \ 13853 ((x) & (~BITS_PS_TIMER_B_TSF_SEL_8821C)) 13854 #define BIT_GET_PS_TIMER_B_TSF_SEL_8821C(x) \ 13855 (((x) >> BIT_SHIFT_PS_TIMER_B_TSF_SEL_8821C) & \ 13856 BIT_MASK_PS_TIMER_B_TSF_SEL_8821C) 13857 #define BIT_SET_PS_TIMER_B_TSF_SEL_8821C(x, v) \ 13858 (BIT_CLEAR_PS_TIMER_B_TSF_SEL_8821C(x) | \ 13859 BIT_PS_TIMER_B_TSF_SEL_8821C(v)) 13860 13861 #define BIT_PS_TIMER_A_EN_8821C BIT(7) 13862 13863 #define BIT_SHIFT_PS_TIMER_A_TSF_SEL_8821C 0 13864 #define BIT_MASK_PS_TIMER_A_TSF_SEL_8821C 0x7 13865 #define BIT_PS_TIMER_A_TSF_SEL_8821C(x) \ 13866 (((x) & BIT_MASK_PS_TIMER_A_TSF_SEL_8821C) \ 13867 << BIT_SHIFT_PS_TIMER_A_TSF_SEL_8821C) 13868 #define BITS_PS_TIMER_A_TSF_SEL_8821C \ 13869 (BIT_MASK_PS_TIMER_A_TSF_SEL_8821C \ 13870 << BIT_SHIFT_PS_TIMER_A_TSF_SEL_8821C) 13871 #define BIT_CLEAR_PS_TIMER_A_TSF_SEL_8821C(x) \ 13872 ((x) & (~BITS_PS_TIMER_A_TSF_SEL_8821C)) 13873 #define BIT_GET_PS_TIMER_A_TSF_SEL_8821C(x) \ 13874 (((x) >> BIT_SHIFT_PS_TIMER_A_TSF_SEL_8821C) & \ 13875 BIT_MASK_PS_TIMER_A_TSF_SEL_8821C) 13876 #define BIT_SET_PS_TIMER_A_TSF_SEL_8821C(x, v) \ 13877 (BIT_CLEAR_PS_TIMER_A_TSF_SEL_8821C(x) | \ 13878 BIT_PS_TIMER_A_TSF_SEL_8821C(v)) 13879 13880 /* 2 REG_CPUMGQ_TX_TIMER_EARLY_8821C */ 13881 13882 #define BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8821C 0 13883 #define BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8821C 0xff 13884 #define BIT_CPUMGQ_TX_TIMER_EARLY_8821C(x) \ 13885 (((x) & BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8821C) \ 13886 << BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8821C) 13887 #define BITS_CPUMGQ_TX_TIMER_EARLY_8821C \ 13888 (BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8821C \ 13889 << BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8821C) 13890 #define BIT_CLEAR_CPUMGQ_TX_TIMER_EARLY_8821C(x) \ 13891 ((x) & (~BITS_CPUMGQ_TX_TIMER_EARLY_8821C)) 13892 #define BIT_GET_CPUMGQ_TX_TIMER_EARLY_8821C(x) \ 13893 (((x) >> BIT_SHIFT_CPUMGQ_TX_TIMER_EARLY_8821C) & \ 13894 BIT_MASK_CPUMGQ_TX_TIMER_EARLY_8821C) 13895 #define BIT_SET_CPUMGQ_TX_TIMER_EARLY_8821C(x, v) \ 13896 (BIT_CLEAR_CPUMGQ_TX_TIMER_EARLY_8821C(x) | \ 13897 BIT_CPUMGQ_TX_TIMER_EARLY_8821C(v)) 13898 13899 /* 2 REG_PS_TIMER_A_EARLY_8821C */ 13900 13901 #define BIT_SHIFT_PS_TIMER_A_EARLY_8821C 0 13902 #define BIT_MASK_PS_TIMER_A_EARLY_8821C 0xff 13903 #define BIT_PS_TIMER_A_EARLY_8821C(x) \ 13904 (((x) & BIT_MASK_PS_TIMER_A_EARLY_8821C) \ 13905 << BIT_SHIFT_PS_TIMER_A_EARLY_8821C) 13906 #define BITS_PS_TIMER_A_EARLY_8821C \ 13907 (BIT_MASK_PS_TIMER_A_EARLY_8821C << BIT_SHIFT_PS_TIMER_A_EARLY_8821C) 13908 #define BIT_CLEAR_PS_TIMER_A_EARLY_8821C(x) \ 13909 ((x) & (~BITS_PS_TIMER_A_EARLY_8821C)) 13910 #define BIT_GET_PS_TIMER_A_EARLY_8821C(x) \ 13911 (((x) >> BIT_SHIFT_PS_TIMER_A_EARLY_8821C) & \ 13912 BIT_MASK_PS_TIMER_A_EARLY_8821C) 13913 #define BIT_SET_PS_TIMER_A_EARLY_8821C(x, v) \ 13914 (BIT_CLEAR_PS_TIMER_A_EARLY_8821C(x) | BIT_PS_TIMER_A_EARLY_8821C(v)) 13915 13916 /* 2 REG_PS_TIMER_B_EARLY_8821C */ 13917 13918 #define BIT_SHIFT_PS_TIMER_B_EARLY_8821C 0 13919 #define BIT_MASK_PS_TIMER_B_EARLY_8821C 0xff 13920 #define BIT_PS_TIMER_B_EARLY_8821C(x) \ 13921 (((x) & BIT_MASK_PS_TIMER_B_EARLY_8821C) \ 13922 << BIT_SHIFT_PS_TIMER_B_EARLY_8821C) 13923 #define BITS_PS_TIMER_B_EARLY_8821C \ 13924 (BIT_MASK_PS_TIMER_B_EARLY_8821C << BIT_SHIFT_PS_TIMER_B_EARLY_8821C) 13925 #define BIT_CLEAR_PS_TIMER_B_EARLY_8821C(x) \ 13926 ((x) & (~BITS_PS_TIMER_B_EARLY_8821C)) 13927 #define BIT_GET_PS_TIMER_B_EARLY_8821C(x) \ 13928 (((x) >> BIT_SHIFT_PS_TIMER_B_EARLY_8821C) & \ 13929 BIT_MASK_PS_TIMER_B_EARLY_8821C) 13930 #define BIT_SET_PS_TIMER_B_EARLY_8821C(x, v) \ 13931 (BIT_CLEAR_PS_TIMER_B_EARLY_8821C(x) | BIT_PS_TIMER_B_EARLY_8821C(v)) 13932 13933 /* 2 REG_PS_TIMER_C_EARLY_8821C */ 13934 13935 #define BIT_SHIFT_PS_TIMER_C_EARLY_8821C 0 13936 #define BIT_MASK_PS_TIMER_C_EARLY_8821C 0xff 13937 #define BIT_PS_TIMER_C_EARLY_8821C(x) \ 13938 (((x) & BIT_MASK_PS_TIMER_C_EARLY_8821C) \ 13939 << BIT_SHIFT_PS_TIMER_C_EARLY_8821C) 13940 #define BITS_PS_TIMER_C_EARLY_8821C \ 13941 (BIT_MASK_PS_TIMER_C_EARLY_8821C << BIT_SHIFT_PS_TIMER_C_EARLY_8821C) 13942 #define BIT_CLEAR_PS_TIMER_C_EARLY_8821C(x) \ 13943 ((x) & (~BITS_PS_TIMER_C_EARLY_8821C)) 13944 #define BIT_GET_PS_TIMER_C_EARLY_8821C(x) \ 13945 (((x) >> BIT_SHIFT_PS_TIMER_C_EARLY_8821C) & \ 13946 BIT_MASK_PS_TIMER_C_EARLY_8821C) 13947 #define BIT_SET_PS_TIMER_C_EARLY_8821C(x, v) \ 13948 (BIT_CLEAR_PS_TIMER_C_EARLY_8821C(x) | BIT_PS_TIMER_C_EARLY_8821C(v)) 13949 13950 /* 2 REG_CPUMGQ_PARAMETER_8821C */ 13951 13952 /* 2 REG_NOT_VALID_8821C */ 13953 #define BIT_MAC_STOP_CPUMGQ_8821C BIT(16) 13954 13955 #define BIT_SHIFT_CW_8821C 8 13956 #define BIT_MASK_CW_8821C 0xff 13957 #define BIT_CW_8821C(x) (((x) & BIT_MASK_CW_8821C) << BIT_SHIFT_CW_8821C) 13958 #define BITS_CW_8821C (BIT_MASK_CW_8821C << BIT_SHIFT_CW_8821C) 13959 #define BIT_CLEAR_CW_8821C(x) ((x) & (~BITS_CW_8821C)) 13960 #define BIT_GET_CW_8821C(x) (((x) >> BIT_SHIFT_CW_8821C) & BIT_MASK_CW_8821C) 13961 #define BIT_SET_CW_8821C(x, v) (BIT_CLEAR_CW_8821C(x) | BIT_CW_8821C(v)) 13962 13963 #define BIT_SHIFT_AIFS_8821C 0 13964 #define BIT_MASK_AIFS_8821C 0xff 13965 #define BIT_AIFS_8821C(x) (((x) & BIT_MASK_AIFS_8821C) << BIT_SHIFT_AIFS_8821C) 13966 #define BITS_AIFS_8821C (BIT_MASK_AIFS_8821C << BIT_SHIFT_AIFS_8821C) 13967 #define BIT_CLEAR_AIFS_8821C(x) ((x) & (~BITS_AIFS_8821C)) 13968 #define BIT_GET_AIFS_8821C(x) \ 13969 (((x) >> BIT_SHIFT_AIFS_8821C) & BIT_MASK_AIFS_8821C) 13970 #define BIT_SET_AIFS_8821C(x, v) (BIT_CLEAR_AIFS_8821C(x) | BIT_AIFS_8821C(v)) 13971 13972 /* 2 REG_NOT_VALID_8821C */ 13973 13974 /* 2 REG_NOT_VALID_8821C */ 13975 13976 /* 2 REG_NOT_VALID_8821C */ 13977 13978 /* 2 REG_NOT_VALID_8821C */ 13979 13980 /* 2 REG_NOT_VALID_8821C */ 13981 13982 /* 2 REG_NOT_VALID_8821C */ 13983 13984 /* 2 REG_NOT_VALID_8821C */ 13985 13986 /* 2 REG_NOT_VALID_8821C */ 13987 13988 /* 2 REG_NOT_VALID_8821C */ 13989 13990 /* 2 REG_NOT_VALID_8821C */ 13991 13992 /* 2 REG_NOT_VALID_8821C */ 13993 13994 /* 2 REG_NOT_VALID_8821C */ 13995 13996 /* 2 REG_RSVD_8821C */ 13997 13998 /* 2 REG_RSVD_8821C */ 13999 14000 /* 2 REG_RSVD_8821C */ 14001 14002 /* 2 REG_RSVD_8821C */ 14003 14004 /* 2 REG_RSVD_8821C */ 14005 14006 /* 2 REG_RSVD_8821C */ 14007 14008 /* 2 REG_RSVD_8821C */ 14009 14010 /* 2 REG_RSVD_8821C */ 14011 14012 /* 2 REG_RSVD_8821C */ 14013 14014 /* 2 REG_RSVD_8821C */ 14015 14016 /* 2 REG_RSVD_8821C */ 14017 14018 /* 2 REG_RSVD_8821C */ 14019 14020 /* 2 REG_RSVD_8821C */ 14021 14022 /* 2 REG_RSVD_8821C */ 14023 14024 /* 2 REG_RSVD_8821C */ 14025 14026 /* 2 REG_RSVD_8821C */ 14027 14028 /* 2 REG_RSVD_8821C */ 14029 14030 /* 2 REG_RSVD_8821C */ 14031 14032 /* 2 REG_RSVD_8821C */ 14033 14034 /* 2 REG_RSVD_8821C */ 14035 14036 /* 2 REG_RSVD_8821C */ 14037 14038 /* 2 REG_RSVD_8821C */ 14039 14040 /* 2 REG_RSVD_8821C */ 14041 14042 /* 2 REG_RSVD_8821C */ 14043 14044 /* 2 REG_RSVD_8821C */ 14045 14046 /* 2 REG_RSVD_8821C */ 14047 14048 /* 2 REG_RSVD_8821C */ 14049 14050 /* 2 REG_RSVD_8821C */ 14051 14052 /* 2 REG_RSVD_8821C */ 14053 14054 /* 2 REG_RSVD_8821C */ 14055 14056 /* 2 REG_RSVD_8821C */ 14057 14058 /* 2 REG_RSVD_8821C */ 14059 14060 /* 2 REG_RSVD_8821C */ 14061 14062 /* 2 REG_RSVD_8821C */ 14063 14064 /* 2 REG_RSVD_8821C */ 14065 14066 /* 2 REG_RSVD_8821C */ 14067 14068 /* 2 REG_RSVD_8821C */ 14069 14070 /* 2 REG_RSVD_8821C */ 14071 14072 /* 2 REG_RSVD_8821C */ 14073 14074 /* 2 REG_RSVD_8821C */ 14075 14076 /* 2 REG_RSVD_8821C */ 14077 14078 /* 2 REG_RSVD_8821C */ 14079 14080 /* 2 REG_RSVD_8821C */ 14081 14082 /* 2 REG_RSVD_8821C */ 14083 14084 /* 2 REG_RSVD_8821C */ 14085 14086 /* 2 REG_NOT_VALID_8821C */ 14087 14088 /* 2 REG_WMAC_CR_8821C (WMAC CR AND APSD CONTROL REGISTER) */ 14089 #define BIT_IC_MACPHY_M_8821C BIT(0) 14090 14091 /* 2 REG_WMAC_FWPKT_CR_8821C */ 14092 #define BIT_FWEN_8821C BIT(7) 14093 #define BIT_PHYSTS_PKT_CTRL_8821C BIT(6) 14094 #define BIT_FWFULL_TO_RXFF_EN_8821C BIT(5) 14095 #define BIT_APPHDR_MIDSRCH_FAIL_8821C BIT(4) 14096 #define BIT_FWPARSING_EN_8821C BIT(3) 14097 14098 #define BIT_SHIFT_APPEND_MHDR_LEN_8821C 0 14099 #define BIT_MASK_APPEND_MHDR_LEN_8821C 0x7 14100 #define BIT_APPEND_MHDR_LEN_8821C(x) \ 14101 (((x) & BIT_MASK_APPEND_MHDR_LEN_8821C) \ 14102 << BIT_SHIFT_APPEND_MHDR_LEN_8821C) 14103 #define BITS_APPEND_MHDR_LEN_8821C \ 14104 (BIT_MASK_APPEND_MHDR_LEN_8821C << BIT_SHIFT_APPEND_MHDR_LEN_8821C) 14105 #define BIT_CLEAR_APPEND_MHDR_LEN_8821C(x) ((x) & (~BITS_APPEND_MHDR_LEN_8821C)) 14106 #define BIT_GET_APPEND_MHDR_LEN_8821C(x) \ 14107 (((x) >> BIT_SHIFT_APPEND_MHDR_LEN_8821C) & \ 14108 BIT_MASK_APPEND_MHDR_LEN_8821C) 14109 #define BIT_SET_APPEND_MHDR_LEN_8821C(x, v) \ 14110 (BIT_CLEAR_APPEND_MHDR_LEN_8821C(x) | BIT_APPEND_MHDR_LEN_8821C(v)) 14111 14112 /* 2 REG_FW_STS_FILTER_8821C */ 14113 #define BIT_DATA_FW_STS_FILTER_8821C BIT(2) 14114 #define BIT_CTRL_FW_STS_FILTER_8821C BIT(1) 14115 #define BIT_MGNT_FW_STS_FILTER_8821C BIT(0) 14116 14117 /* 2 REG_RSVD_8821C */ 14118 14119 /* 2 REG_TCR_8821C (TRANSMISSION CONFIGURATION REGISTER) */ 14120 #define BIT_WMAC_EN_RTS_ADDR_8821C BIT(31) 14121 #define BIT_WMAC_DISABLE_CCK_8821C BIT(30) 14122 #define BIT_WMAC_RAW_LEN_8821C BIT(29) 14123 #define BIT_WMAC_NOTX_IN_RXNDP_8821C BIT(28) 14124 #define BIT_WMAC_EN_EOF_8821C BIT(27) 14125 #define BIT_WMAC_BF_SEL_8821C BIT(26) 14126 #define BIT_WMAC_ANTMODE_SEL_8821C BIT(25) 14127 #define BIT_WMAC_TCRPWRMGT_HWCTL_8821C BIT(24) 14128 #define BIT_WMAC_SMOOTH_VAL_8821C BIT(23) 14129 #define BIT_FETCH_MPDU_AFTER_WSEC_RDY_8821C BIT(20) 14130 #define BIT_WMAC_TCR_EN_20MST_8821C BIT(19) 14131 #define BIT_WMAC_DIS_SIGTA_8821C BIT(18) 14132 #define BIT_WMAC_DIS_A2B0_8821C BIT(17) 14133 #define BIT_WMAC_MSK_SIGBCRC_8821C BIT(16) 14134 #define BIT_WMAC_TCR_ERRSTEN_3_8821C BIT(15) 14135 #define BIT_WMAC_TCR_ERRSTEN_2_8821C BIT(14) 14136 #define BIT_WMAC_TCR_ERRSTEN_1_8821C BIT(13) 14137 #define BIT_WMAC_TCR_ERRSTEN_0_8821C BIT(12) 14138 #define BIT_WMAC_TCR_TXSK_PERPKT_8821C BIT(11) 14139 #define BIT_ICV_8821C BIT(10) 14140 #define BIT_CFEND_FORMAT_8821C BIT(9) 14141 #define BIT_CRC_8821C BIT(8) 14142 #define BIT_PWRBIT_OW_EN_8821C BIT(7) 14143 #define BIT_PWR_ST_8821C BIT(6) 14144 #define BIT_WMAC_TCR_UPD_TIMIE_8821C BIT(5) 14145 #define BIT_WMAC_TCR_UPD_HGQMD_8821C BIT(4) 14146 #define BIT_VHTSIGA1_TXPS_8821C BIT(3) 14147 #define BIT_PAD_SEL_8821C BIT(2) 14148 #define BIT_DIS_GCLK_8821C BIT(1) 14149 14150 /* 2 REG_RCR_8821C (RECEIVE CONFIGURATION REGISTER) */ 14151 #define BIT_APP_FCS_8821C BIT(31) 14152 #define BIT_APP_MIC_8821C BIT(30) 14153 #define BIT_APP_ICV_8821C BIT(29) 14154 #define BIT_APP_PHYSTS_8821C BIT(28) 14155 #define BIT_APP_BASSN_8821C BIT(27) 14156 #define BIT_VHT_DACK_8821C BIT(26) 14157 #define BIT_TCPOFLD_EN_8821C BIT(25) 14158 #define BIT_ENMBID_8821C BIT(24) 14159 #define BIT_LSIGEN_8821C BIT(23) 14160 #define BIT_MFBEN_8821C BIT(22) 14161 #define BIT_DISCHKPPDLLEN_8821C BIT(21) 14162 #define BIT_PKTCTL_DLEN_8821C BIT(20) 14163 #define BIT_TIM_PARSER_EN_8821C BIT(18) 14164 #define BIT_BC_MD_EN_8821C BIT(17) 14165 #define BIT_UC_MD_EN_8821C BIT(16) 14166 #define BIT_RXSK_PERPKT_8821C BIT(15) 14167 #define BIT_HTC_LOC_CTRL_8821C BIT(14) 14168 #define BIT_RPFM_CAM_ENABLE_8821C BIT(12) 14169 #define BIT_TA_BCN_8821C BIT(11) 14170 #define BIT_DISDECMYPKT_8821C BIT(10) 14171 #define BIT_AICV_8821C BIT(9) 14172 #define BIT_ACRC32_8821C BIT(8) 14173 #define BIT_CBSSID_BCN_8821C BIT(7) 14174 #define BIT_CBSSID_DATA_8821C BIT(6) 14175 #define BIT_APWRMGT_8821C BIT(5) 14176 #define BIT_ADD3_8821C BIT(4) 14177 #define BIT_AB_8821C BIT(3) 14178 #define BIT_AM_8821C BIT(2) 14179 #define BIT_APM_8821C BIT(1) 14180 #define BIT_AAP_8821C BIT(0) 14181 14182 /* 2 REG_RX_PKT_LIMIT_8821C (RX PACKET LENGTH LIMIT REGISTER) */ 14183 14184 #define BIT_SHIFT_RXPKTLMT_8821C 0 14185 #define BIT_MASK_RXPKTLMT_8821C 0x3f 14186 #define BIT_RXPKTLMT_8821C(x) \ 14187 (((x) & BIT_MASK_RXPKTLMT_8821C) << BIT_SHIFT_RXPKTLMT_8821C) 14188 #define BITS_RXPKTLMT_8821C \ 14189 (BIT_MASK_RXPKTLMT_8821C << BIT_SHIFT_RXPKTLMT_8821C) 14190 #define BIT_CLEAR_RXPKTLMT_8821C(x) ((x) & (~BITS_RXPKTLMT_8821C)) 14191 #define BIT_GET_RXPKTLMT_8821C(x) \ 14192 (((x) >> BIT_SHIFT_RXPKTLMT_8821C) & BIT_MASK_RXPKTLMT_8821C) 14193 #define BIT_SET_RXPKTLMT_8821C(x, v) \ 14194 (BIT_CLEAR_RXPKTLMT_8821C(x) | BIT_RXPKTLMT_8821C(v)) 14195 14196 /* 2 REG_RX_DLK_TIME_8821C (RX DEADLOCK TIME REGISTER) */ 14197 14198 #define BIT_SHIFT_RX_DLK_TIME_8821C 0 14199 #define BIT_MASK_RX_DLK_TIME_8821C 0xff 14200 #define BIT_RX_DLK_TIME_8821C(x) \ 14201 (((x) & BIT_MASK_RX_DLK_TIME_8821C) << BIT_SHIFT_RX_DLK_TIME_8821C) 14202 #define BITS_RX_DLK_TIME_8821C \ 14203 (BIT_MASK_RX_DLK_TIME_8821C << BIT_SHIFT_RX_DLK_TIME_8821C) 14204 #define BIT_CLEAR_RX_DLK_TIME_8821C(x) ((x) & (~BITS_RX_DLK_TIME_8821C)) 14205 #define BIT_GET_RX_DLK_TIME_8821C(x) \ 14206 (((x) >> BIT_SHIFT_RX_DLK_TIME_8821C) & BIT_MASK_RX_DLK_TIME_8821C) 14207 #define BIT_SET_RX_DLK_TIME_8821C(x, v) \ 14208 (BIT_CLEAR_RX_DLK_TIME_8821C(x) | BIT_RX_DLK_TIME_8821C(v)) 14209 14210 /* 2 REG_RSVD_8821C */ 14211 14212 /* 2 REG_RX_DRVINFO_SZ_8821C (RX DRIVER INFO SIZE REGISTER) */ 14213 #define BIT_PHYSTS_PER_PKT_MODE_8821C BIT(7) 14214 14215 #define BIT_SHIFT_DRVINFO_SZ_V1_8821C 0 14216 #define BIT_MASK_DRVINFO_SZ_V1_8821C 0xf 14217 #define BIT_DRVINFO_SZ_V1_8821C(x) \ 14218 (((x) & BIT_MASK_DRVINFO_SZ_V1_8821C) << BIT_SHIFT_DRVINFO_SZ_V1_8821C) 14219 #define BITS_DRVINFO_SZ_V1_8821C \ 14220 (BIT_MASK_DRVINFO_SZ_V1_8821C << BIT_SHIFT_DRVINFO_SZ_V1_8821C) 14221 #define BIT_CLEAR_DRVINFO_SZ_V1_8821C(x) ((x) & (~BITS_DRVINFO_SZ_V1_8821C)) 14222 #define BIT_GET_DRVINFO_SZ_V1_8821C(x) \ 14223 (((x) >> BIT_SHIFT_DRVINFO_SZ_V1_8821C) & BIT_MASK_DRVINFO_SZ_V1_8821C) 14224 #define BIT_SET_DRVINFO_SZ_V1_8821C(x, v) \ 14225 (BIT_CLEAR_DRVINFO_SZ_V1_8821C(x) | BIT_DRVINFO_SZ_V1_8821C(v)) 14226 14227 /* 2 REG_MACID_8821C (MAC ID REGISTER) */ 14228 14229 #define BIT_SHIFT_MACID_V1_8821C 0 14230 #define BIT_MASK_MACID_V1_8821C 0xffffffffL 14231 #define BIT_MACID_V1_8821C(x) \ 14232 (((x) & BIT_MASK_MACID_V1_8821C) << BIT_SHIFT_MACID_V1_8821C) 14233 #define BITS_MACID_V1_8821C \ 14234 (BIT_MASK_MACID_V1_8821C << BIT_SHIFT_MACID_V1_8821C) 14235 #define BIT_CLEAR_MACID_V1_8821C(x) ((x) & (~BITS_MACID_V1_8821C)) 14236 #define BIT_GET_MACID_V1_8821C(x) \ 14237 (((x) >> BIT_SHIFT_MACID_V1_8821C) & BIT_MASK_MACID_V1_8821C) 14238 #define BIT_SET_MACID_V1_8821C(x, v) \ 14239 (BIT_CLEAR_MACID_V1_8821C(x) | BIT_MACID_V1_8821C(v)) 14240 14241 /* 2 REG_MACID_H_8821C (MAC ID REGISTER) */ 14242 14243 #define BIT_SHIFT_MACID_H_V1_8821C 0 14244 #define BIT_MASK_MACID_H_V1_8821C 0xffff 14245 #define BIT_MACID_H_V1_8821C(x) \ 14246 (((x) & BIT_MASK_MACID_H_V1_8821C) << BIT_SHIFT_MACID_H_V1_8821C) 14247 #define BITS_MACID_H_V1_8821C \ 14248 (BIT_MASK_MACID_H_V1_8821C << BIT_SHIFT_MACID_H_V1_8821C) 14249 #define BIT_CLEAR_MACID_H_V1_8821C(x) ((x) & (~BITS_MACID_H_V1_8821C)) 14250 #define BIT_GET_MACID_H_V1_8821C(x) \ 14251 (((x) >> BIT_SHIFT_MACID_H_V1_8821C) & BIT_MASK_MACID_H_V1_8821C) 14252 #define BIT_SET_MACID_H_V1_8821C(x, v) \ 14253 (BIT_CLEAR_MACID_H_V1_8821C(x) | BIT_MACID_H_V1_8821C(v)) 14254 14255 /* 2 REG_BSSID_8821C (BSSID REGISTER) */ 14256 14257 #define BIT_SHIFT_BSSID_V1_8821C 0 14258 #define BIT_MASK_BSSID_V1_8821C 0xffffffffL 14259 #define BIT_BSSID_V1_8821C(x) \ 14260 (((x) & BIT_MASK_BSSID_V1_8821C) << BIT_SHIFT_BSSID_V1_8821C) 14261 #define BITS_BSSID_V1_8821C \ 14262 (BIT_MASK_BSSID_V1_8821C << BIT_SHIFT_BSSID_V1_8821C) 14263 #define BIT_CLEAR_BSSID_V1_8821C(x) ((x) & (~BITS_BSSID_V1_8821C)) 14264 #define BIT_GET_BSSID_V1_8821C(x) \ 14265 (((x) >> BIT_SHIFT_BSSID_V1_8821C) & BIT_MASK_BSSID_V1_8821C) 14266 #define BIT_SET_BSSID_V1_8821C(x, v) \ 14267 (BIT_CLEAR_BSSID_V1_8821C(x) | BIT_BSSID_V1_8821C(v)) 14268 14269 /* 2 REG_BSSID_H_8821C (BSSID REGISTER) */ 14270 14271 /* 2 REG_NOT_VALID_8821C */ 14272 14273 #define BIT_SHIFT_BSSID_H_V1_8821C 0 14274 #define BIT_MASK_BSSID_H_V1_8821C 0xffff 14275 #define BIT_BSSID_H_V1_8821C(x) \ 14276 (((x) & BIT_MASK_BSSID_H_V1_8821C) << BIT_SHIFT_BSSID_H_V1_8821C) 14277 #define BITS_BSSID_H_V1_8821C \ 14278 (BIT_MASK_BSSID_H_V1_8821C << BIT_SHIFT_BSSID_H_V1_8821C) 14279 #define BIT_CLEAR_BSSID_H_V1_8821C(x) ((x) & (~BITS_BSSID_H_V1_8821C)) 14280 #define BIT_GET_BSSID_H_V1_8821C(x) \ 14281 (((x) >> BIT_SHIFT_BSSID_H_V1_8821C) & BIT_MASK_BSSID_H_V1_8821C) 14282 #define BIT_SET_BSSID_H_V1_8821C(x, v) \ 14283 (BIT_CLEAR_BSSID_H_V1_8821C(x) | BIT_BSSID_H_V1_8821C(v)) 14284 14285 /* 2 REG_MAR_8821C (MULTICAST ADDRESS REGISTER) */ 14286 14287 #define BIT_SHIFT_MAR_V1_8821C 0 14288 #define BIT_MASK_MAR_V1_8821C 0xffffffffL 14289 #define BIT_MAR_V1_8821C(x) \ 14290 (((x) & BIT_MASK_MAR_V1_8821C) << BIT_SHIFT_MAR_V1_8821C) 14291 #define BITS_MAR_V1_8821C (BIT_MASK_MAR_V1_8821C << BIT_SHIFT_MAR_V1_8821C) 14292 #define BIT_CLEAR_MAR_V1_8821C(x) ((x) & (~BITS_MAR_V1_8821C)) 14293 #define BIT_GET_MAR_V1_8821C(x) \ 14294 (((x) >> BIT_SHIFT_MAR_V1_8821C) & BIT_MASK_MAR_V1_8821C) 14295 #define BIT_SET_MAR_V1_8821C(x, v) \ 14296 (BIT_CLEAR_MAR_V1_8821C(x) | BIT_MAR_V1_8821C(v)) 14297 14298 /* 2 REG_MAR_H_8821C (MULTICAST ADDRESS REGISTER) */ 14299 14300 #define BIT_SHIFT_MAR_H_V1_8821C 0 14301 #define BIT_MASK_MAR_H_V1_8821C 0xffffffffL 14302 #define BIT_MAR_H_V1_8821C(x) \ 14303 (((x) & BIT_MASK_MAR_H_V1_8821C) << BIT_SHIFT_MAR_H_V1_8821C) 14304 #define BITS_MAR_H_V1_8821C \ 14305 (BIT_MASK_MAR_H_V1_8821C << BIT_SHIFT_MAR_H_V1_8821C) 14306 #define BIT_CLEAR_MAR_H_V1_8821C(x) ((x) & (~BITS_MAR_H_V1_8821C)) 14307 #define BIT_GET_MAR_H_V1_8821C(x) \ 14308 (((x) >> BIT_SHIFT_MAR_H_V1_8821C) & BIT_MASK_MAR_H_V1_8821C) 14309 #define BIT_SET_MAR_H_V1_8821C(x, v) \ 14310 (BIT_CLEAR_MAR_H_V1_8821C(x) | BIT_MAR_H_V1_8821C(v)) 14311 14312 /* 2 REG_MBIDCAMCFG_1_8821C (MBSSID CAM CONFIGURATION REGISTER) */ 14313 14314 #define BIT_SHIFT_MBIDCAM_RWDATA_L_8821C 0 14315 #define BIT_MASK_MBIDCAM_RWDATA_L_8821C 0xffffffffL 14316 #define BIT_MBIDCAM_RWDATA_L_8821C(x) \ 14317 (((x) & BIT_MASK_MBIDCAM_RWDATA_L_8821C) \ 14318 << BIT_SHIFT_MBIDCAM_RWDATA_L_8821C) 14319 #define BITS_MBIDCAM_RWDATA_L_8821C \ 14320 (BIT_MASK_MBIDCAM_RWDATA_L_8821C << BIT_SHIFT_MBIDCAM_RWDATA_L_8821C) 14321 #define BIT_CLEAR_MBIDCAM_RWDATA_L_8821C(x) \ 14322 ((x) & (~BITS_MBIDCAM_RWDATA_L_8821C)) 14323 #define BIT_GET_MBIDCAM_RWDATA_L_8821C(x) \ 14324 (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_L_8821C) & \ 14325 BIT_MASK_MBIDCAM_RWDATA_L_8821C) 14326 #define BIT_SET_MBIDCAM_RWDATA_L_8821C(x, v) \ 14327 (BIT_CLEAR_MBIDCAM_RWDATA_L_8821C(x) | BIT_MBIDCAM_RWDATA_L_8821C(v)) 14328 14329 /* 2 REG_MBIDCAMCFG_2_8821C (MBSSID CAM CONFIGURATION REGISTER) */ 14330 #define BIT_MBIDCAM_POLL_8821C BIT(31) 14331 #define BIT_MBIDCAM_WT_EN_8821C BIT(30) 14332 14333 #define BIT_SHIFT_MBIDCAM_ADDR_8821C 24 14334 #define BIT_MASK_MBIDCAM_ADDR_8821C 0x1f 14335 #define BIT_MBIDCAM_ADDR_8821C(x) \ 14336 (((x) & BIT_MASK_MBIDCAM_ADDR_8821C) << BIT_SHIFT_MBIDCAM_ADDR_8821C) 14337 #define BITS_MBIDCAM_ADDR_8821C \ 14338 (BIT_MASK_MBIDCAM_ADDR_8821C << BIT_SHIFT_MBIDCAM_ADDR_8821C) 14339 #define BIT_CLEAR_MBIDCAM_ADDR_8821C(x) ((x) & (~BITS_MBIDCAM_ADDR_8821C)) 14340 #define BIT_GET_MBIDCAM_ADDR_8821C(x) \ 14341 (((x) >> BIT_SHIFT_MBIDCAM_ADDR_8821C) & BIT_MASK_MBIDCAM_ADDR_8821C) 14342 #define BIT_SET_MBIDCAM_ADDR_8821C(x, v) \ 14343 (BIT_CLEAR_MBIDCAM_ADDR_8821C(x) | BIT_MBIDCAM_ADDR_8821C(v)) 14344 14345 #define BIT_MBIDCAM_VALID_8821C BIT(23) 14346 #define BIT_LSIC_TXOP_EN_8821C BIT(17) 14347 #define BIT_CTS_EN_8821C BIT(16) 14348 14349 #define BIT_SHIFT_MBIDCAM_RWDATA_H_8821C 0 14350 #define BIT_MASK_MBIDCAM_RWDATA_H_8821C 0xffff 14351 #define BIT_MBIDCAM_RWDATA_H_8821C(x) \ 14352 (((x) & BIT_MASK_MBIDCAM_RWDATA_H_8821C) \ 14353 << BIT_SHIFT_MBIDCAM_RWDATA_H_8821C) 14354 #define BITS_MBIDCAM_RWDATA_H_8821C \ 14355 (BIT_MASK_MBIDCAM_RWDATA_H_8821C << BIT_SHIFT_MBIDCAM_RWDATA_H_8821C) 14356 #define BIT_CLEAR_MBIDCAM_RWDATA_H_8821C(x) \ 14357 ((x) & (~BITS_MBIDCAM_RWDATA_H_8821C)) 14358 #define BIT_GET_MBIDCAM_RWDATA_H_8821C(x) \ 14359 (((x) >> BIT_SHIFT_MBIDCAM_RWDATA_H_8821C) & \ 14360 BIT_MASK_MBIDCAM_RWDATA_H_8821C) 14361 #define BIT_SET_MBIDCAM_RWDATA_H_8821C(x, v) \ 14362 (BIT_CLEAR_MBIDCAM_RWDATA_H_8821C(x) | BIT_MBIDCAM_RWDATA_H_8821C(v)) 14363 14364 /* 2 REG_WMAC_TCR_TSFT_OFS_8821C */ 14365 14366 #define BIT_SHIFT_WMAC_TCR_TSFT_OFS_8821C 0 14367 #define BIT_MASK_WMAC_TCR_TSFT_OFS_8821C 0xffff 14368 #define BIT_WMAC_TCR_TSFT_OFS_8821C(x) \ 14369 (((x) & BIT_MASK_WMAC_TCR_TSFT_OFS_8821C) \ 14370 << BIT_SHIFT_WMAC_TCR_TSFT_OFS_8821C) 14371 #define BITS_WMAC_TCR_TSFT_OFS_8821C \ 14372 (BIT_MASK_WMAC_TCR_TSFT_OFS_8821C << BIT_SHIFT_WMAC_TCR_TSFT_OFS_8821C) 14373 #define BIT_CLEAR_WMAC_TCR_TSFT_OFS_8821C(x) \ 14374 ((x) & (~BITS_WMAC_TCR_TSFT_OFS_8821C)) 14375 #define BIT_GET_WMAC_TCR_TSFT_OFS_8821C(x) \ 14376 (((x) >> BIT_SHIFT_WMAC_TCR_TSFT_OFS_8821C) & \ 14377 BIT_MASK_WMAC_TCR_TSFT_OFS_8821C) 14378 #define BIT_SET_WMAC_TCR_TSFT_OFS_8821C(x, v) \ 14379 (BIT_CLEAR_WMAC_TCR_TSFT_OFS_8821C(x) | BIT_WMAC_TCR_TSFT_OFS_8821C(v)) 14380 14381 /* 2 REG_UDF_THSD_8821C */ 14382 14383 #define BIT_SHIFT_UDF_THSD_8821C 0 14384 #define BIT_MASK_UDF_THSD_8821C 0xff 14385 #define BIT_UDF_THSD_8821C(x) \ 14386 (((x) & BIT_MASK_UDF_THSD_8821C) << BIT_SHIFT_UDF_THSD_8821C) 14387 #define BITS_UDF_THSD_8821C \ 14388 (BIT_MASK_UDF_THSD_8821C << BIT_SHIFT_UDF_THSD_8821C) 14389 #define BIT_CLEAR_UDF_THSD_8821C(x) ((x) & (~BITS_UDF_THSD_8821C)) 14390 #define BIT_GET_UDF_THSD_8821C(x) \ 14391 (((x) >> BIT_SHIFT_UDF_THSD_8821C) & BIT_MASK_UDF_THSD_8821C) 14392 #define BIT_SET_UDF_THSD_8821C(x, v) \ 14393 (BIT_CLEAR_UDF_THSD_8821C(x) | BIT_UDF_THSD_8821C(v)) 14394 14395 /* 2 REG_ZLD_NUM_8821C */ 14396 14397 #define BIT_SHIFT_ZLD_NUM_8821C 0 14398 #define BIT_MASK_ZLD_NUM_8821C 0xff 14399 #define BIT_ZLD_NUM_8821C(x) \ 14400 (((x) & BIT_MASK_ZLD_NUM_8821C) << BIT_SHIFT_ZLD_NUM_8821C) 14401 #define BITS_ZLD_NUM_8821C (BIT_MASK_ZLD_NUM_8821C << BIT_SHIFT_ZLD_NUM_8821C) 14402 #define BIT_CLEAR_ZLD_NUM_8821C(x) ((x) & (~BITS_ZLD_NUM_8821C)) 14403 #define BIT_GET_ZLD_NUM_8821C(x) \ 14404 (((x) >> BIT_SHIFT_ZLD_NUM_8821C) & BIT_MASK_ZLD_NUM_8821C) 14405 #define BIT_SET_ZLD_NUM_8821C(x, v) \ 14406 (BIT_CLEAR_ZLD_NUM_8821C(x) | BIT_ZLD_NUM_8821C(v)) 14407 14408 /* 2 REG_STMP_THSD_8821C */ 14409 14410 #define BIT_SHIFT_STMP_THSD_8821C 0 14411 #define BIT_MASK_STMP_THSD_8821C 0xff 14412 #define BIT_STMP_THSD_8821C(x) \ 14413 (((x) & BIT_MASK_STMP_THSD_8821C) << BIT_SHIFT_STMP_THSD_8821C) 14414 #define BITS_STMP_THSD_8821C \ 14415 (BIT_MASK_STMP_THSD_8821C << BIT_SHIFT_STMP_THSD_8821C) 14416 #define BIT_CLEAR_STMP_THSD_8821C(x) ((x) & (~BITS_STMP_THSD_8821C)) 14417 #define BIT_GET_STMP_THSD_8821C(x) \ 14418 (((x) >> BIT_SHIFT_STMP_THSD_8821C) & BIT_MASK_STMP_THSD_8821C) 14419 #define BIT_SET_STMP_THSD_8821C(x, v) \ 14420 (BIT_CLEAR_STMP_THSD_8821C(x) | BIT_STMP_THSD_8821C(v)) 14421 14422 /* 2 REG_WMAC_TXTIMEOUT_8821C */ 14423 14424 #define BIT_SHIFT_WMAC_TXTIMEOUT_8821C 0 14425 #define BIT_MASK_WMAC_TXTIMEOUT_8821C 0xff 14426 #define BIT_WMAC_TXTIMEOUT_8821C(x) \ 14427 (((x) & BIT_MASK_WMAC_TXTIMEOUT_8821C) \ 14428 << BIT_SHIFT_WMAC_TXTIMEOUT_8821C) 14429 #define BITS_WMAC_TXTIMEOUT_8821C \ 14430 (BIT_MASK_WMAC_TXTIMEOUT_8821C << BIT_SHIFT_WMAC_TXTIMEOUT_8821C) 14431 #define BIT_CLEAR_WMAC_TXTIMEOUT_8821C(x) ((x) & (~BITS_WMAC_TXTIMEOUT_8821C)) 14432 #define BIT_GET_WMAC_TXTIMEOUT_8821C(x) \ 14433 (((x) >> BIT_SHIFT_WMAC_TXTIMEOUT_8821C) & \ 14434 BIT_MASK_WMAC_TXTIMEOUT_8821C) 14435 #define BIT_SET_WMAC_TXTIMEOUT_8821C(x, v) \ 14436 (BIT_CLEAR_WMAC_TXTIMEOUT_8821C(x) | BIT_WMAC_TXTIMEOUT_8821C(v)) 14437 14438 /* 2 REG_MCU_TEST_2_V1_8821C */ 14439 14440 #define BIT_SHIFT_MCU_RSVD_2_V1_8821C 0 14441 #define BIT_MASK_MCU_RSVD_2_V1_8821C 0xffff 14442 #define BIT_MCU_RSVD_2_V1_8821C(x) \ 14443 (((x) & BIT_MASK_MCU_RSVD_2_V1_8821C) << BIT_SHIFT_MCU_RSVD_2_V1_8821C) 14444 #define BITS_MCU_RSVD_2_V1_8821C \ 14445 (BIT_MASK_MCU_RSVD_2_V1_8821C << BIT_SHIFT_MCU_RSVD_2_V1_8821C) 14446 #define BIT_CLEAR_MCU_RSVD_2_V1_8821C(x) ((x) & (~BITS_MCU_RSVD_2_V1_8821C)) 14447 #define BIT_GET_MCU_RSVD_2_V1_8821C(x) \ 14448 (((x) >> BIT_SHIFT_MCU_RSVD_2_V1_8821C) & BIT_MASK_MCU_RSVD_2_V1_8821C) 14449 #define BIT_SET_MCU_RSVD_2_V1_8821C(x, v) \ 14450 (BIT_CLEAR_MCU_RSVD_2_V1_8821C(x) | BIT_MCU_RSVD_2_V1_8821C(v)) 14451 14452 /* 2 REG_USTIME_EDCA_8821C (US TIME TUNING FOR EDCA REGISTER) */ 14453 14454 #define BIT_SHIFT_USTIME_EDCA_8821C 0 14455 #define BIT_MASK_USTIME_EDCA_8821C 0xff 14456 #define BIT_USTIME_EDCA_8821C(x) \ 14457 (((x) & BIT_MASK_USTIME_EDCA_8821C) << BIT_SHIFT_USTIME_EDCA_8821C) 14458 #define BITS_USTIME_EDCA_8821C \ 14459 (BIT_MASK_USTIME_EDCA_8821C << BIT_SHIFT_USTIME_EDCA_8821C) 14460 #define BIT_CLEAR_USTIME_EDCA_8821C(x) ((x) & (~BITS_USTIME_EDCA_8821C)) 14461 #define BIT_GET_USTIME_EDCA_8821C(x) \ 14462 (((x) >> BIT_SHIFT_USTIME_EDCA_8821C) & BIT_MASK_USTIME_EDCA_8821C) 14463 #define BIT_SET_USTIME_EDCA_8821C(x, v) \ 14464 (BIT_CLEAR_USTIME_EDCA_8821C(x) | BIT_USTIME_EDCA_8821C(v)) 14465 14466 /* 2 REG_ACKTO_CCK_8821C (ACK TIMEOUT REGISTER FOR CCK RATE) */ 14467 14468 #define BIT_SHIFT_ACKTO_CCK_8821C 0 14469 #define BIT_MASK_ACKTO_CCK_8821C 0xff 14470 #define BIT_ACKTO_CCK_8821C(x) \ 14471 (((x) & BIT_MASK_ACKTO_CCK_8821C) << BIT_SHIFT_ACKTO_CCK_8821C) 14472 #define BITS_ACKTO_CCK_8821C \ 14473 (BIT_MASK_ACKTO_CCK_8821C << BIT_SHIFT_ACKTO_CCK_8821C) 14474 #define BIT_CLEAR_ACKTO_CCK_8821C(x) ((x) & (~BITS_ACKTO_CCK_8821C)) 14475 #define BIT_GET_ACKTO_CCK_8821C(x) \ 14476 (((x) >> BIT_SHIFT_ACKTO_CCK_8821C) & BIT_MASK_ACKTO_CCK_8821C) 14477 #define BIT_SET_ACKTO_CCK_8821C(x, v) \ 14478 (BIT_CLEAR_ACKTO_CCK_8821C(x) | BIT_ACKTO_CCK_8821C(v)) 14479 14480 /* 2 REG_MAC_SPEC_SIFS_8821C (SPECIFICATION SIFS REGISTER) */ 14481 14482 #define BIT_SHIFT_SPEC_SIFS_OFDM_8821C 8 14483 #define BIT_MASK_SPEC_SIFS_OFDM_8821C 0xff 14484 #define BIT_SPEC_SIFS_OFDM_8821C(x) \ 14485 (((x) & BIT_MASK_SPEC_SIFS_OFDM_8821C) \ 14486 << BIT_SHIFT_SPEC_SIFS_OFDM_8821C) 14487 #define BITS_SPEC_SIFS_OFDM_8821C \ 14488 (BIT_MASK_SPEC_SIFS_OFDM_8821C << BIT_SHIFT_SPEC_SIFS_OFDM_8821C) 14489 #define BIT_CLEAR_SPEC_SIFS_OFDM_8821C(x) ((x) & (~BITS_SPEC_SIFS_OFDM_8821C)) 14490 #define BIT_GET_SPEC_SIFS_OFDM_8821C(x) \ 14491 (((x) >> BIT_SHIFT_SPEC_SIFS_OFDM_8821C) & \ 14492 BIT_MASK_SPEC_SIFS_OFDM_8821C) 14493 #define BIT_SET_SPEC_SIFS_OFDM_8821C(x, v) \ 14494 (BIT_CLEAR_SPEC_SIFS_OFDM_8821C(x) | BIT_SPEC_SIFS_OFDM_8821C(v)) 14495 14496 #define BIT_SHIFT_SPEC_SIFS_CCK_8821C 0 14497 #define BIT_MASK_SPEC_SIFS_CCK_8821C 0xff 14498 #define BIT_SPEC_SIFS_CCK_8821C(x) \ 14499 (((x) & BIT_MASK_SPEC_SIFS_CCK_8821C) << BIT_SHIFT_SPEC_SIFS_CCK_8821C) 14500 #define BITS_SPEC_SIFS_CCK_8821C \ 14501 (BIT_MASK_SPEC_SIFS_CCK_8821C << BIT_SHIFT_SPEC_SIFS_CCK_8821C) 14502 #define BIT_CLEAR_SPEC_SIFS_CCK_8821C(x) ((x) & (~BITS_SPEC_SIFS_CCK_8821C)) 14503 #define BIT_GET_SPEC_SIFS_CCK_8821C(x) \ 14504 (((x) >> BIT_SHIFT_SPEC_SIFS_CCK_8821C) & BIT_MASK_SPEC_SIFS_CCK_8821C) 14505 #define BIT_SET_SPEC_SIFS_CCK_8821C(x, v) \ 14506 (BIT_CLEAR_SPEC_SIFS_CCK_8821C(x) | BIT_SPEC_SIFS_CCK_8821C(v)) 14507 14508 /* 2 REG_RESP_SIFS_CCK_8821C (RESPONSE SIFS FOR CCK REGISTER) */ 14509 14510 #define BIT_SHIFT_SIFS_R2T_CCK_8821C 8 14511 #define BIT_MASK_SIFS_R2T_CCK_8821C 0xff 14512 #define BIT_SIFS_R2T_CCK_8821C(x) \ 14513 (((x) & BIT_MASK_SIFS_R2T_CCK_8821C) << BIT_SHIFT_SIFS_R2T_CCK_8821C) 14514 #define BITS_SIFS_R2T_CCK_8821C \ 14515 (BIT_MASK_SIFS_R2T_CCK_8821C << BIT_SHIFT_SIFS_R2T_CCK_8821C) 14516 #define BIT_CLEAR_SIFS_R2T_CCK_8821C(x) ((x) & (~BITS_SIFS_R2T_CCK_8821C)) 14517 #define BIT_GET_SIFS_R2T_CCK_8821C(x) \ 14518 (((x) >> BIT_SHIFT_SIFS_R2T_CCK_8821C) & BIT_MASK_SIFS_R2T_CCK_8821C) 14519 #define BIT_SET_SIFS_R2T_CCK_8821C(x, v) \ 14520 (BIT_CLEAR_SIFS_R2T_CCK_8821C(x) | BIT_SIFS_R2T_CCK_8821C(v)) 14521 14522 #define BIT_SHIFT_SIFS_T2T_CCK_8821C 0 14523 #define BIT_MASK_SIFS_T2T_CCK_8821C 0xff 14524 #define BIT_SIFS_T2T_CCK_8821C(x) \ 14525 (((x) & BIT_MASK_SIFS_T2T_CCK_8821C) << BIT_SHIFT_SIFS_T2T_CCK_8821C) 14526 #define BITS_SIFS_T2T_CCK_8821C \ 14527 (BIT_MASK_SIFS_T2T_CCK_8821C << BIT_SHIFT_SIFS_T2T_CCK_8821C) 14528 #define BIT_CLEAR_SIFS_T2T_CCK_8821C(x) ((x) & (~BITS_SIFS_T2T_CCK_8821C)) 14529 #define BIT_GET_SIFS_T2T_CCK_8821C(x) \ 14530 (((x) >> BIT_SHIFT_SIFS_T2T_CCK_8821C) & BIT_MASK_SIFS_T2T_CCK_8821C) 14531 #define BIT_SET_SIFS_T2T_CCK_8821C(x, v) \ 14532 (BIT_CLEAR_SIFS_T2T_CCK_8821C(x) | BIT_SIFS_T2T_CCK_8821C(v)) 14533 14534 /* 2 REG_RESP_SIFS_OFDM_8821C (RESPONSE SIFS FOR OFDM REGISTER) */ 14535 14536 #define BIT_SHIFT_SIFS_R2T_OFDM_8821C 8 14537 #define BIT_MASK_SIFS_R2T_OFDM_8821C 0xff 14538 #define BIT_SIFS_R2T_OFDM_8821C(x) \ 14539 (((x) & BIT_MASK_SIFS_R2T_OFDM_8821C) << BIT_SHIFT_SIFS_R2T_OFDM_8821C) 14540 #define BITS_SIFS_R2T_OFDM_8821C \ 14541 (BIT_MASK_SIFS_R2T_OFDM_8821C << BIT_SHIFT_SIFS_R2T_OFDM_8821C) 14542 #define BIT_CLEAR_SIFS_R2T_OFDM_8821C(x) ((x) & (~BITS_SIFS_R2T_OFDM_8821C)) 14543 #define BIT_GET_SIFS_R2T_OFDM_8821C(x) \ 14544 (((x) >> BIT_SHIFT_SIFS_R2T_OFDM_8821C) & BIT_MASK_SIFS_R2T_OFDM_8821C) 14545 #define BIT_SET_SIFS_R2T_OFDM_8821C(x, v) \ 14546 (BIT_CLEAR_SIFS_R2T_OFDM_8821C(x) | BIT_SIFS_R2T_OFDM_8821C(v)) 14547 14548 #define BIT_SHIFT_SIFS_T2T_OFDM_8821C 0 14549 #define BIT_MASK_SIFS_T2T_OFDM_8821C 0xff 14550 #define BIT_SIFS_T2T_OFDM_8821C(x) \ 14551 (((x) & BIT_MASK_SIFS_T2T_OFDM_8821C) << BIT_SHIFT_SIFS_T2T_OFDM_8821C) 14552 #define BITS_SIFS_T2T_OFDM_8821C \ 14553 (BIT_MASK_SIFS_T2T_OFDM_8821C << BIT_SHIFT_SIFS_T2T_OFDM_8821C) 14554 #define BIT_CLEAR_SIFS_T2T_OFDM_8821C(x) ((x) & (~BITS_SIFS_T2T_OFDM_8821C)) 14555 #define BIT_GET_SIFS_T2T_OFDM_8821C(x) \ 14556 (((x) >> BIT_SHIFT_SIFS_T2T_OFDM_8821C) & BIT_MASK_SIFS_T2T_OFDM_8821C) 14557 #define BIT_SET_SIFS_T2T_OFDM_8821C(x, v) \ 14558 (BIT_CLEAR_SIFS_T2T_OFDM_8821C(x) | BIT_SIFS_T2T_OFDM_8821C(v)) 14559 14560 /* 2 REG_ACKTO_8821C (ACK TIMEOUT REGISTER) */ 14561 14562 #define BIT_SHIFT_ACKTO_8821C 0 14563 #define BIT_MASK_ACKTO_8821C 0xff 14564 #define BIT_ACKTO_8821C(x) \ 14565 (((x) & BIT_MASK_ACKTO_8821C) << BIT_SHIFT_ACKTO_8821C) 14566 #define BITS_ACKTO_8821C (BIT_MASK_ACKTO_8821C << BIT_SHIFT_ACKTO_8821C) 14567 #define BIT_CLEAR_ACKTO_8821C(x) ((x) & (~BITS_ACKTO_8821C)) 14568 #define BIT_GET_ACKTO_8821C(x) \ 14569 (((x) >> BIT_SHIFT_ACKTO_8821C) & BIT_MASK_ACKTO_8821C) 14570 #define BIT_SET_ACKTO_8821C(x, v) \ 14571 (BIT_CLEAR_ACKTO_8821C(x) | BIT_ACKTO_8821C(v)) 14572 14573 /* 2 REG_CTS2TO_8821C (CTS2 TIMEOUT REGISTER) */ 14574 14575 #define BIT_SHIFT_CTS2TO_8821C 0 14576 #define BIT_MASK_CTS2TO_8821C 0xff 14577 #define BIT_CTS2TO_8821C(x) \ 14578 (((x) & BIT_MASK_CTS2TO_8821C) << BIT_SHIFT_CTS2TO_8821C) 14579 #define BITS_CTS2TO_8821C (BIT_MASK_CTS2TO_8821C << BIT_SHIFT_CTS2TO_8821C) 14580 #define BIT_CLEAR_CTS2TO_8821C(x) ((x) & (~BITS_CTS2TO_8821C)) 14581 #define BIT_GET_CTS2TO_8821C(x) \ 14582 (((x) >> BIT_SHIFT_CTS2TO_8821C) & BIT_MASK_CTS2TO_8821C) 14583 #define BIT_SET_CTS2TO_8821C(x, v) \ 14584 (BIT_CLEAR_CTS2TO_8821C(x) | BIT_CTS2TO_8821C(v)) 14585 14586 /* 2 REG_EIFS_8821C (EIFS REGISTER) */ 14587 14588 #define BIT_SHIFT_EIFS_8821C 0 14589 #define BIT_MASK_EIFS_8821C 0xffff 14590 #define BIT_EIFS_8821C(x) (((x) & BIT_MASK_EIFS_8821C) << BIT_SHIFT_EIFS_8821C) 14591 #define BITS_EIFS_8821C (BIT_MASK_EIFS_8821C << BIT_SHIFT_EIFS_8821C) 14592 #define BIT_CLEAR_EIFS_8821C(x) ((x) & (~BITS_EIFS_8821C)) 14593 #define BIT_GET_EIFS_8821C(x) \ 14594 (((x) >> BIT_SHIFT_EIFS_8821C) & BIT_MASK_EIFS_8821C) 14595 #define BIT_SET_EIFS_8821C(x, v) (BIT_CLEAR_EIFS_8821C(x) | BIT_EIFS_8821C(v)) 14596 14597 /* 2 REG_RPFM_MAP0_8821C */ 14598 #define BIT_MGT_RPFM15EN_8821C BIT(15) 14599 #define BIT_MGT_RPFM14EN_8821C BIT(14) 14600 #define BIT_MGT_RPFM13EN_8821C BIT(13) 14601 #define BIT_MGT_RPFM12EN_8821C BIT(12) 14602 #define BIT_MGT_RPFM11EN_8821C BIT(11) 14603 #define BIT_MGT_RPFM10EN_8821C BIT(10) 14604 #define BIT_MGT_RPFM9EN_8821C BIT(9) 14605 #define BIT_MGT_RPFM8EN_8821C BIT(8) 14606 #define BIT_MGT_RPFM7EN_8821C BIT(7) 14607 #define BIT_MGT_RPFM6EN_8821C BIT(6) 14608 #define BIT_MGT_RPFM5EN_8821C BIT(5) 14609 #define BIT_MGT_RPFM4EN_8821C BIT(4) 14610 #define BIT_MGT_RPFM3EN_8821C BIT(3) 14611 #define BIT_MGT_RPFM2EN_8821C BIT(2) 14612 #define BIT_MGT_RPFM1EN_8821C BIT(1) 14613 #define BIT_MGT_RPFM0EN_8821C BIT(0) 14614 14615 /* 2 REG_RPFM_MAP1_V1_8821C */ 14616 #define BIT_DATA_RPFM15EN_8821C BIT(15) 14617 #define BIT_DATA_RPFM14EN_8821C BIT(14) 14618 #define BIT_DATA_RPFM13EN_8821C BIT(13) 14619 #define BIT_DATA_RPFM12EN_8821C BIT(12) 14620 #define BIT_DATA_RPFM11EN_8821C BIT(11) 14621 #define BIT_DATA_RPFM10EN_8821C BIT(10) 14622 #define BIT_DATA_RPFM9EN_8821C BIT(9) 14623 #define BIT_DATA_RPFM8EN_8821C BIT(8) 14624 #define BIT_DATA_RPFM7EN_8821C BIT(7) 14625 #define BIT_DATA_RPFM6EN_8821C BIT(6) 14626 #define BIT_DATA_RPFM5EN_8821C BIT(5) 14627 #define BIT_DATA_RPFM4EN_8821C BIT(4) 14628 #define BIT_DATA_RPFM3EN_8821C BIT(3) 14629 #define BIT_DATA_RPFM2EN_8821C BIT(2) 14630 #define BIT_DATA_RPFM1EN_8821C BIT(1) 14631 #define BIT_DATA_RPFM0EN_8821C BIT(0) 14632 14633 /* 2 REG_RPFM_CAM_CMD_8821C (RX PAYLOAD FRAME MASK CAM COMMAND REGISTER) */ 14634 #define BIT_RPFM_CAM_POLLING_8821C BIT(31) 14635 #define BIT_RPFM_CAM_CLR_8821C BIT(30) 14636 #define BIT_RPFM_CAM_WE_8821C BIT(16) 14637 14638 #define BIT_SHIFT_RPFM_CAM_ADDR_8821C 0 14639 #define BIT_MASK_RPFM_CAM_ADDR_8821C 0x7f 14640 #define BIT_RPFM_CAM_ADDR_8821C(x) \ 14641 (((x) & BIT_MASK_RPFM_CAM_ADDR_8821C) << BIT_SHIFT_RPFM_CAM_ADDR_8821C) 14642 #define BITS_RPFM_CAM_ADDR_8821C \ 14643 (BIT_MASK_RPFM_CAM_ADDR_8821C << BIT_SHIFT_RPFM_CAM_ADDR_8821C) 14644 #define BIT_CLEAR_RPFM_CAM_ADDR_8821C(x) ((x) & (~BITS_RPFM_CAM_ADDR_8821C)) 14645 #define BIT_GET_RPFM_CAM_ADDR_8821C(x) \ 14646 (((x) >> BIT_SHIFT_RPFM_CAM_ADDR_8821C) & BIT_MASK_RPFM_CAM_ADDR_8821C) 14647 #define BIT_SET_RPFM_CAM_ADDR_8821C(x, v) \ 14648 (BIT_CLEAR_RPFM_CAM_ADDR_8821C(x) | BIT_RPFM_CAM_ADDR_8821C(v)) 14649 14650 /* 2 REG_RPFM_CAM_RWD_8821C (ACK TIMEOUT REGISTER) */ 14651 14652 #define BIT_SHIFT_RPFM_CAM_RWD_8821C 0 14653 #define BIT_MASK_RPFM_CAM_RWD_8821C 0xffffffffL 14654 #define BIT_RPFM_CAM_RWD_8821C(x) \ 14655 (((x) & BIT_MASK_RPFM_CAM_RWD_8821C) << BIT_SHIFT_RPFM_CAM_RWD_8821C) 14656 #define BITS_RPFM_CAM_RWD_8821C \ 14657 (BIT_MASK_RPFM_CAM_RWD_8821C << BIT_SHIFT_RPFM_CAM_RWD_8821C) 14658 #define BIT_CLEAR_RPFM_CAM_RWD_8821C(x) ((x) & (~BITS_RPFM_CAM_RWD_8821C)) 14659 #define BIT_GET_RPFM_CAM_RWD_8821C(x) \ 14660 (((x) >> BIT_SHIFT_RPFM_CAM_RWD_8821C) & BIT_MASK_RPFM_CAM_RWD_8821C) 14661 #define BIT_SET_RPFM_CAM_RWD_8821C(x, v) \ 14662 (BIT_CLEAR_RPFM_CAM_RWD_8821C(x) | BIT_RPFM_CAM_RWD_8821C(v)) 14663 14664 /* 2 REG_NAV_CTRL_8821C (NAV CONTROL REGISTER) */ 14665 14666 #define BIT_SHIFT_NAV_UPPER_8821C 16 14667 #define BIT_MASK_NAV_UPPER_8821C 0xff 14668 #define BIT_NAV_UPPER_8821C(x) \ 14669 (((x) & BIT_MASK_NAV_UPPER_8821C) << BIT_SHIFT_NAV_UPPER_8821C) 14670 #define BITS_NAV_UPPER_8821C \ 14671 (BIT_MASK_NAV_UPPER_8821C << BIT_SHIFT_NAV_UPPER_8821C) 14672 #define BIT_CLEAR_NAV_UPPER_8821C(x) ((x) & (~BITS_NAV_UPPER_8821C)) 14673 #define BIT_GET_NAV_UPPER_8821C(x) \ 14674 (((x) >> BIT_SHIFT_NAV_UPPER_8821C) & BIT_MASK_NAV_UPPER_8821C) 14675 #define BIT_SET_NAV_UPPER_8821C(x, v) \ 14676 (BIT_CLEAR_NAV_UPPER_8821C(x) | BIT_NAV_UPPER_8821C(v)) 14677 14678 #define BIT_SHIFT_RXMYRTS_NAV_8821C 8 14679 #define BIT_MASK_RXMYRTS_NAV_8821C 0xf 14680 #define BIT_RXMYRTS_NAV_8821C(x) \ 14681 (((x) & BIT_MASK_RXMYRTS_NAV_8821C) << BIT_SHIFT_RXMYRTS_NAV_8821C) 14682 #define BITS_RXMYRTS_NAV_8821C \ 14683 (BIT_MASK_RXMYRTS_NAV_8821C << BIT_SHIFT_RXMYRTS_NAV_8821C) 14684 #define BIT_CLEAR_RXMYRTS_NAV_8821C(x) ((x) & (~BITS_RXMYRTS_NAV_8821C)) 14685 #define BIT_GET_RXMYRTS_NAV_8821C(x) \ 14686 (((x) >> BIT_SHIFT_RXMYRTS_NAV_8821C) & BIT_MASK_RXMYRTS_NAV_8821C) 14687 #define BIT_SET_RXMYRTS_NAV_8821C(x, v) \ 14688 (BIT_CLEAR_RXMYRTS_NAV_8821C(x) | BIT_RXMYRTS_NAV_8821C(v)) 14689 14690 #define BIT_SHIFT_RTSRST_8821C 0 14691 #define BIT_MASK_RTSRST_8821C 0xff 14692 #define BIT_RTSRST_8821C(x) \ 14693 (((x) & BIT_MASK_RTSRST_8821C) << BIT_SHIFT_RTSRST_8821C) 14694 #define BITS_RTSRST_8821C (BIT_MASK_RTSRST_8821C << BIT_SHIFT_RTSRST_8821C) 14695 #define BIT_CLEAR_RTSRST_8821C(x) ((x) & (~BITS_RTSRST_8821C)) 14696 #define BIT_GET_RTSRST_8821C(x) \ 14697 (((x) >> BIT_SHIFT_RTSRST_8821C) & BIT_MASK_RTSRST_8821C) 14698 #define BIT_SET_RTSRST_8821C(x, v) \ 14699 (BIT_CLEAR_RTSRST_8821C(x) | BIT_RTSRST_8821C(v)) 14700 14701 /* 2 REG_BACAMCMD_8821C (BLOCK ACK CAM COMMAND REGISTER) */ 14702 #define BIT_BACAM_POLL_8821C BIT(31) 14703 #define BIT_BACAM_RST_8821C BIT(17) 14704 #define BIT_BACAM_RW_8821C BIT(16) 14705 14706 #define BIT_SHIFT_TXSBM_8821C 14 14707 #define BIT_MASK_TXSBM_8821C 0x3 14708 #define BIT_TXSBM_8821C(x) \ 14709 (((x) & BIT_MASK_TXSBM_8821C) << BIT_SHIFT_TXSBM_8821C) 14710 #define BITS_TXSBM_8821C (BIT_MASK_TXSBM_8821C << BIT_SHIFT_TXSBM_8821C) 14711 #define BIT_CLEAR_TXSBM_8821C(x) ((x) & (~BITS_TXSBM_8821C)) 14712 #define BIT_GET_TXSBM_8821C(x) \ 14713 (((x) >> BIT_SHIFT_TXSBM_8821C) & BIT_MASK_TXSBM_8821C) 14714 #define BIT_SET_TXSBM_8821C(x, v) \ 14715 (BIT_CLEAR_TXSBM_8821C(x) | BIT_TXSBM_8821C(v)) 14716 14717 #define BIT_SHIFT_BACAM_ADDR_8821C 0 14718 #define BIT_MASK_BACAM_ADDR_8821C 0x3f 14719 #define BIT_BACAM_ADDR_8821C(x) \ 14720 (((x) & BIT_MASK_BACAM_ADDR_8821C) << BIT_SHIFT_BACAM_ADDR_8821C) 14721 #define BITS_BACAM_ADDR_8821C \ 14722 (BIT_MASK_BACAM_ADDR_8821C << BIT_SHIFT_BACAM_ADDR_8821C) 14723 #define BIT_CLEAR_BACAM_ADDR_8821C(x) ((x) & (~BITS_BACAM_ADDR_8821C)) 14724 #define BIT_GET_BACAM_ADDR_8821C(x) \ 14725 (((x) >> BIT_SHIFT_BACAM_ADDR_8821C) & BIT_MASK_BACAM_ADDR_8821C) 14726 #define BIT_SET_BACAM_ADDR_8821C(x, v) \ 14727 (BIT_CLEAR_BACAM_ADDR_8821C(x) | BIT_BACAM_ADDR_8821C(v)) 14728 14729 /* 2 REG_BACAMCONTENT_8821C (BLOCK ACK CAM CONTENT REGISTER) */ 14730 14731 #define BIT_SHIFT_BA_CONTENT_L_8821C 0 14732 #define BIT_MASK_BA_CONTENT_L_8821C 0xffffffffL 14733 #define BIT_BA_CONTENT_L_8821C(x) \ 14734 (((x) & BIT_MASK_BA_CONTENT_L_8821C) << BIT_SHIFT_BA_CONTENT_L_8821C) 14735 #define BITS_BA_CONTENT_L_8821C \ 14736 (BIT_MASK_BA_CONTENT_L_8821C << BIT_SHIFT_BA_CONTENT_L_8821C) 14737 #define BIT_CLEAR_BA_CONTENT_L_8821C(x) ((x) & (~BITS_BA_CONTENT_L_8821C)) 14738 #define BIT_GET_BA_CONTENT_L_8821C(x) \ 14739 (((x) >> BIT_SHIFT_BA_CONTENT_L_8821C) & BIT_MASK_BA_CONTENT_L_8821C) 14740 #define BIT_SET_BA_CONTENT_L_8821C(x, v) \ 14741 (BIT_CLEAR_BA_CONTENT_L_8821C(x) | BIT_BA_CONTENT_L_8821C(v)) 14742 14743 /* 2 REG_BACAMCONTENT_H_8821C (BLOCK ACK CAM CONTENT REGISTER) */ 14744 14745 #define BIT_SHIFT_BA_CONTENT_H_8821C 0 14746 #define BIT_MASK_BA_CONTENT_H_8821C 0xffffffffL 14747 #define BIT_BA_CONTENT_H_8821C(x) \ 14748 (((x) & BIT_MASK_BA_CONTENT_H_8821C) << BIT_SHIFT_BA_CONTENT_H_8821C) 14749 #define BITS_BA_CONTENT_H_8821C \ 14750 (BIT_MASK_BA_CONTENT_H_8821C << BIT_SHIFT_BA_CONTENT_H_8821C) 14751 #define BIT_CLEAR_BA_CONTENT_H_8821C(x) ((x) & (~BITS_BA_CONTENT_H_8821C)) 14752 #define BIT_GET_BA_CONTENT_H_8821C(x) \ 14753 (((x) >> BIT_SHIFT_BA_CONTENT_H_8821C) & BIT_MASK_BA_CONTENT_H_8821C) 14754 #define BIT_SET_BA_CONTENT_H_8821C(x, v) \ 14755 (BIT_CLEAR_BA_CONTENT_H_8821C(x) | BIT_BA_CONTENT_H_8821C(v)) 14756 14757 /* 2 REG_LBDLY_8821C (LOOPBACK DELAY REGISTER) */ 14758 14759 #define BIT_SHIFT_LBDLY_8821C 0 14760 #define BIT_MASK_LBDLY_8821C 0x1f 14761 #define BIT_LBDLY_8821C(x) \ 14762 (((x) & BIT_MASK_LBDLY_8821C) << BIT_SHIFT_LBDLY_8821C) 14763 #define BITS_LBDLY_8821C (BIT_MASK_LBDLY_8821C << BIT_SHIFT_LBDLY_8821C) 14764 #define BIT_CLEAR_LBDLY_8821C(x) ((x) & (~BITS_LBDLY_8821C)) 14765 #define BIT_GET_LBDLY_8821C(x) \ 14766 (((x) >> BIT_SHIFT_LBDLY_8821C) & BIT_MASK_LBDLY_8821C) 14767 #define BIT_SET_LBDLY_8821C(x, v) \ 14768 (BIT_CLEAR_LBDLY_8821C(x) | BIT_LBDLY_8821C(v)) 14769 14770 /* 2 REG_WMAC_BACAM_RPMEN_8821C */ 14771 14772 #define BIT_SHIFT_BITMAP_SSNBK_COUNTER_8821C 2 14773 #define BIT_MASK_BITMAP_SSNBK_COUNTER_8821C 0x3f 14774 #define BIT_BITMAP_SSNBK_COUNTER_8821C(x) \ 14775 (((x) & BIT_MASK_BITMAP_SSNBK_COUNTER_8821C) \ 14776 << BIT_SHIFT_BITMAP_SSNBK_COUNTER_8821C) 14777 #define BITS_BITMAP_SSNBK_COUNTER_8821C \ 14778 (BIT_MASK_BITMAP_SSNBK_COUNTER_8821C \ 14779 << BIT_SHIFT_BITMAP_SSNBK_COUNTER_8821C) 14780 #define BIT_CLEAR_BITMAP_SSNBK_COUNTER_8821C(x) \ 14781 ((x) & (~BITS_BITMAP_SSNBK_COUNTER_8821C)) 14782 #define BIT_GET_BITMAP_SSNBK_COUNTER_8821C(x) \ 14783 (((x) >> BIT_SHIFT_BITMAP_SSNBK_COUNTER_8821C) & \ 14784 BIT_MASK_BITMAP_SSNBK_COUNTER_8821C) 14785 #define BIT_SET_BITMAP_SSNBK_COUNTER_8821C(x, v) \ 14786 (BIT_CLEAR_BITMAP_SSNBK_COUNTER_8821C(x) | \ 14787 BIT_BITMAP_SSNBK_COUNTER_8821C(v)) 14788 14789 #define BIT_BITMAP_EN_8821C BIT(1) 14790 #define BIT_WMAC_BACAM_RPMEN_8821C BIT(0) 14791 14792 /* 2 REG_TX_RX_8821C STATUS */ 14793 14794 #define BIT_SHIFT_RXPKT_TYPE_8821C 2 14795 #define BIT_MASK_RXPKT_TYPE_8821C 0x3f 14796 #define BIT_RXPKT_TYPE_8821C(x) \ 14797 (((x) & BIT_MASK_RXPKT_TYPE_8821C) << BIT_SHIFT_RXPKT_TYPE_8821C) 14798 #define BITS_RXPKT_TYPE_8821C \ 14799 (BIT_MASK_RXPKT_TYPE_8821C << BIT_SHIFT_RXPKT_TYPE_8821C) 14800 #define BIT_CLEAR_RXPKT_TYPE_8821C(x) ((x) & (~BITS_RXPKT_TYPE_8821C)) 14801 #define BIT_GET_RXPKT_TYPE_8821C(x) \ 14802 (((x) >> BIT_SHIFT_RXPKT_TYPE_8821C) & BIT_MASK_RXPKT_TYPE_8821C) 14803 #define BIT_SET_RXPKT_TYPE_8821C(x, v) \ 14804 (BIT_CLEAR_RXPKT_TYPE_8821C(x) | BIT_RXPKT_TYPE_8821C(v)) 14805 14806 #define BIT_TXACT_IND_8821C BIT(1) 14807 #define BIT_RXACT_IND_8821C BIT(0) 14808 14809 /* 2 REG_WMAC_BITMAP_CTL_8821C */ 14810 #define BIT_BITMAP_VO_8821C BIT(7) 14811 #define BIT_BITMAP_VI_8821C BIT(6) 14812 #define BIT_BITMAP_BE_8821C BIT(5) 14813 #define BIT_BITMAP_BK_8821C BIT(4) 14814 14815 #define BIT_SHIFT_BITMAP_CONDITION_8821C 2 14816 #define BIT_MASK_BITMAP_CONDITION_8821C 0x3 14817 #define BIT_BITMAP_CONDITION_8821C(x) \ 14818 (((x) & BIT_MASK_BITMAP_CONDITION_8821C) \ 14819 << BIT_SHIFT_BITMAP_CONDITION_8821C) 14820 #define BITS_BITMAP_CONDITION_8821C \ 14821 (BIT_MASK_BITMAP_CONDITION_8821C << BIT_SHIFT_BITMAP_CONDITION_8821C) 14822 #define BIT_CLEAR_BITMAP_CONDITION_8821C(x) \ 14823 ((x) & (~BITS_BITMAP_CONDITION_8821C)) 14824 #define BIT_GET_BITMAP_CONDITION_8821C(x) \ 14825 (((x) >> BIT_SHIFT_BITMAP_CONDITION_8821C) & \ 14826 BIT_MASK_BITMAP_CONDITION_8821C) 14827 #define BIT_SET_BITMAP_CONDITION_8821C(x, v) \ 14828 (BIT_CLEAR_BITMAP_CONDITION_8821C(x) | BIT_BITMAP_CONDITION_8821C(v)) 14829 14830 #define BIT_BITMAP_SSNBK_COUNTER_CLR_8821C BIT(1) 14831 #define BIT_BITMAP_FORCE_8821C BIT(0) 14832 14833 /* 2 REG_RXERR_RPT_8821C (RX ERROR REPORT REGISTER) */ 14834 14835 #define BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8821C 28 14836 #define BIT_MASK_RXERR_RPT_SEL_V1_3_0_8821C 0xf 14837 #define BIT_RXERR_RPT_SEL_V1_3_0_8821C(x) \ 14838 (((x) & BIT_MASK_RXERR_RPT_SEL_V1_3_0_8821C) \ 14839 << BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8821C) 14840 #define BITS_RXERR_RPT_SEL_V1_3_0_8821C \ 14841 (BIT_MASK_RXERR_RPT_SEL_V1_3_0_8821C \ 14842 << BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8821C) 14843 #define BIT_CLEAR_RXERR_RPT_SEL_V1_3_0_8821C(x) \ 14844 ((x) & (~BITS_RXERR_RPT_SEL_V1_3_0_8821C)) 14845 #define BIT_GET_RXERR_RPT_SEL_V1_3_0_8821C(x) \ 14846 (((x) >> BIT_SHIFT_RXERR_RPT_SEL_V1_3_0_8821C) & \ 14847 BIT_MASK_RXERR_RPT_SEL_V1_3_0_8821C) 14848 #define BIT_SET_RXERR_RPT_SEL_V1_3_0_8821C(x, v) \ 14849 (BIT_CLEAR_RXERR_RPT_SEL_V1_3_0_8821C(x) | \ 14850 BIT_RXERR_RPT_SEL_V1_3_0_8821C(v)) 14851 14852 #define BIT_RXERR_RPT_RST_8821C BIT(27) 14853 #define BIT_RXERR_RPT_SEL_V1_4_8821C BIT(26) 14854 #define BIT_W1S_8821C BIT(23) 14855 #define BIT_UD_SELECT_BSSID_8821C BIT(22) 14856 14857 #define BIT_SHIFT_UD_SUB_TYPE_8821C 18 14858 #define BIT_MASK_UD_SUB_TYPE_8821C 0xf 14859 #define BIT_UD_SUB_TYPE_8821C(x) \ 14860 (((x) & BIT_MASK_UD_SUB_TYPE_8821C) << BIT_SHIFT_UD_SUB_TYPE_8821C) 14861 #define BITS_UD_SUB_TYPE_8821C \ 14862 (BIT_MASK_UD_SUB_TYPE_8821C << BIT_SHIFT_UD_SUB_TYPE_8821C) 14863 #define BIT_CLEAR_UD_SUB_TYPE_8821C(x) ((x) & (~BITS_UD_SUB_TYPE_8821C)) 14864 #define BIT_GET_UD_SUB_TYPE_8821C(x) \ 14865 (((x) >> BIT_SHIFT_UD_SUB_TYPE_8821C) & BIT_MASK_UD_SUB_TYPE_8821C) 14866 #define BIT_SET_UD_SUB_TYPE_8821C(x, v) \ 14867 (BIT_CLEAR_UD_SUB_TYPE_8821C(x) | BIT_UD_SUB_TYPE_8821C(v)) 14868 14869 #define BIT_SHIFT_UD_TYPE_8821C 16 14870 #define BIT_MASK_UD_TYPE_8821C 0x3 14871 #define BIT_UD_TYPE_8821C(x) \ 14872 (((x) & BIT_MASK_UD_TYPE_8821C) << BIT_SHIFT_UD_TYPE_8821C) 14873 #define BITS_UD_TYPE_8821C (BIT_MASK_UD_TYPE_8821C << BIT_SHIFT_UD_TYPE_8821C) 14874 #define BIT_CLEAR_UD_TYPE_8821C(x) ((x) & (~BITS_UD_TYPE_8821C)) 14875 #define BIT_GET_UD_TYPE_8821C(x) \ 14876 (((x) >> BIT_SHIFT_UD_TYPE_8821C) & BIT_MASK_UD_TYPE_8821C) 14877 #define BIT_SET_UD_TYPE_8821C(x, v) \ 14878 (BIT_CLEAR_UD_TYPE_8821C(x) | BIT_UD_TYPE_8821C(v)) 14879 14880 #define BIT_SHIFT_RPT_COUNTER_8821C 0 14881 #define BIT_MASK_RPT_COUNTER_8821C 0xffff 14882 #define BIT_RPT_COUNTER_8821C(x) \ 14883 (((x) & BIT_MASK_RPT_COUNTER_8821C) << BIT_SHIFT_RPT_COUNTER_8821C) 14884 #define BITS_RPT_COUNTER_8821C \ 14885 (BIT_MASK_RPT_COUNTER_8821C << BIT_SHIFT_RPT_COUNTER_8821C) 14886 #define BIT_CLEAR_RPT_COUNTER_8821C(x) ((x) & (~BITS_RPT_COUNTER_8821C)) 14887 #define BIT_GET_RPT_COUNTER_8821C(x) \ 14888 (((x) >> BIT_SHIFT_RPT_COUNTER_8821C) & BIT_MASK_RPT_COUNTER_8821C) 14889 #define BIT_SET_RPT_COUNTER_8821C(x, v) \ 14890 (BIT_CLEAR_RPT_COUNTER_8821C(x) | BIT_RPT_COUNTER_8821C(v)) 14891 14892 /* 2 REG_WMAC_TRXPTCL_CTL_8821C (WMAC TX/RX PROTOCOL CONTROL REGISTER) */ 14893 #define BIT_EN_TXCTS_INTXOP_8821C BIT(32) 14894 #define BIT_BLK_EDCA_BBSLP_8821C BIT(31) 14895 #define BIT_BLK_EDCA_BBSBY_8821C BIT(30) 14896 #define BIT_ACKTO_BLOCK_SCH_EN_8821C BIT(27) 14897 #define BIT_EIFS_BLOCK_SCH_EN_8821C BIT(26) 14898 #define BIT_PLCPCHK_RST_EIFS_8821C BIT(25) 14899 #define BIT_CCA_RST_EIFS_8821C BIT(24) 14900 #define BIT_DIS_UPD_MYRXPKTNAV_8821C BIT(23) 14901 #define BIT_EARLY_TXBA_8821C BIT(22) 14902 14903 #define BIT_SHIFT_RESP_CHNBUSY_8821C 20 14904 #define BIT_MASK_RESP_CHNBUSY_8821C 0x3 14905 #define BIT_RESP_CHNBUSY_8821C(x) \ 14906 (((x) & BIT_MASK_RESP_CHNBUSY_8821C) << BIT_SHIFT_RESP_CHNBUSY_8821C) 14907 #define BITS_RESP_CHNBUSY_8821C \ 14908 (BIT_MASK_RESP_CHNBUSY_8821C << BIT_SHIFT_RESP_CHNBUSY_8821C) 14909 #define BIT_CLEAR_RESP_CHNBUSY_8821C(x) ((x) & (~BITS_RESP_CHNBUSY_8821C)) 14910 #define BIT_GET_RESP_CHNBUSY_8821C(x) \ 14911 (((x) >> BIT_SHIFT_RESP_CHNBUSY_8821C) & BIT_MASK_RESP_CHNBUSY_8821C) 14912 #define BIT_SET_RESP_CHNBUSY_8821C(x, v) \ 14913 (BIT_CLEAR_RESP_CHNBUSY_8821C(x) | BIT_RESP_CHNBUSY_8821C(v)) 14914 14915 #define BIT_RESP_DCTS_EN_8821C BIT(19) 14916 #define BIT_RESP_DCFE_EN_8821C BIT(18) 14917 #define BIT_RESP_SPLCPEN_8821C BIT(17) 14918 #define BIT_RESP_SGIEN_8821C BIT(16) 14919 #define BIT_RESP_LDPC_EN_8821C BIT(15) 14920 #define BIT_DIS_RESP_ACKINCCA_8821C BIT(14) 14921 #define BIT_DIS_RESP_CTSINCCA_8821C BIT(13) 14922 14923 #define BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8821C 10 14924 #define BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8821C 0x7 14925 #define BIT_R_WMAC_SECOND_CCA_TIMER_8821C(x) \ 14926 (((x) & BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8821C) \ 14927 << BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8821C) 14928 #define BITS_R_WMAC_SECOND_CCA_TIMER_8821C \ 14929 (BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8821C \ 14930 << BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8821C) 14931 #define BIT_CLEAR_R_WMAC_SECOND_CCA_TIMER_8821C(x) \ 14932 ((x) & (~BITS_R_WMAC_SECOND_CCA_TIMER_8821C)) 14933 #define BIT_GET_R_WMAC_SECOND_CCA_TIMER_8821C(x) \ 14934 (((x) >> BIT_SHIFT_R_WMAC_SECOND_CCA_TIMER_8821C) & \ 14935 BIT_MASK_R_WMAC_SECOND_CCA_TIMER_8821C) 14936 #define BIT_SET_R_WMAC_SECOND_CCA_TIMER_8821C(x, v) \ 14937 (BIT_CLEAR_R_WMAC_SECOND_CCA_TIMER_8821C(x) | \ 14938 BIT_R_WMAC_SECOND_CCA_TIMER_8821C(v)) 14939 14940 #define BIT_SHIFT_RFMOD_8821C 7 14941 #define BIT_MASK_RFMOD_8821C 0x3 14942 #define BIT_RFMOD_8821C(x) \ 14943 (((x) & BIT_MASK_RFMOD_8821C) << BIT_SHIFT_RFMOD_8821C) 14944 #define BITS_RFMOD_8821C (BIT_MASK_RFMOD_8821C << BIT_SHIFT_RFMOD_8821C) 14945 #define BIT_CLEAR_RFMOD_8821C(x) ((x) & (~BITS_RFMOD_8821C)) 14946 #define BIT_GET_RFMOD_8821C(x) \ 14947 (((x) >> BIT_SHIFT_RFMOD_8821C) & BIT_MASK_RFMOD_8821C) 14948 #define BIT_SET_RFMOD_8821C(x, v) \ 14949 (BIT_CLEAR_RFMOD_8821C(x) | BIT_RFMOD_8821C(v)) 14950 14951 #define BIT_SHIFT_RESP_CTS_DYNBW_SEL_8821C 5 14952 #define BIT_MASK_RESP_CTS_DYNBW_SEL_8821C 0x3 14953 #define BIT_RESP_CTS_DYNBW_SEL_8821C(x) \ 14954 (((x) & BIT_MASK_RESP_CTS_DYNBW_SEL_8821C) \ 14955 << BIT_SHIFT_RESP_CTS_DYNBW_SEL_8821C) 14956 #define BITS_RESP_CTS_DYNBW_SEL_8821C \ 14957 (BIT_MASK_RESP_CTS_DYNBW_SEL_8821C \ 14958 << BIT_SHIFT_RESP_CTS_DYNBW_SEL_8821C) 14959 #define BIT_CLEAR_RESP_CTS_DYNBW_SEL_8821C(x) \ 14960 ((x) & (~BITS_RESP_CTS_DYNBW_SEL_8821C)) 14961 #define BIT_GET_RESP_CTS_DYNBW_SEL_8821C(x) \ 14962 (((x) >> BIT_SHIFT_RESP_CTS_DYNBW_SEL_8821C) & \ 14963 BIT_MASK_RESP_CTS_DYNBW_SEL_8821C) 14964 #define BIT_SET_RESP_CTS_DYNBW_SEL_8821C(x, v) \ 14965 (BIT_CLEAR_RESP_CTS_DYNBW_SEL_8821C(x) | \ 14966 BIT_RESP_CTS_DYNBW_SEL_8821C(v)) 14967 14968 #define BIT_DLY_TX_WAIT_RXANTSEL_8821C BIT(4) 14969 #define BIT_TXRESP_BY_RXANTSEL_8821C BIT(3) 14970 14971 #define BIT_SHIFT_ORIG_DCTS_CHK_8821C 0 14972 #define BIT_MASK_ORIG_DCTS_CHK_8821C 0x3 14973 #define BIT_ORIG_DCTS_CHK_8821C(x) \ 14974 (((x) & BIT_MASK_ORIG_DCTS_CHK_8821C) << BIT_SHIFT_ORIG_DCTS_CHK_8821C) 14975 #define BITS_ORIG_DCTS_CHK_8821C \ 14976 (BIT_MASK_ORIG_DCTS_CHK_8821C << BIT_SHIFT_ORIG_DCTS_CHK_8821C) 14977 #define BIT_CLEAR_ORIG_DCTS_CHK_8821C(x) ((x) & (~BITS_ORIG_DCTS_CHK_8821C)) 14978 #define BIT_GET_ORIG_DCTS_CHK_8821C(x) \ 14979 (((x) >> BIT_SHIFT_ORIG_DCTS_CHK_8821C) & BIT_MASK_ORIG_DCTS_CHK_8821C) 14980 #define BIT_SET_ORIG_DCTS_CHK_8821C(x, v) \ 14981 (BIT_CLEAR_ORIG_DCTS_CHK_8821C(x) | BIT_ORIG_DCTS_CHK_8821C(v)) 14982 14983 /* 2 REG_WMAC_TRXPTCL_CTL_H_8821C */ 14984 14985 #define BIT_SHIFT_ACKBA_TYPSEL_8821C 28 14986 #define BIT_MASK_ACKBA_TYPSEL_8821C 0xf 14987 #define BIT_ACKBA_TYPSEL_8821C(x) \ 14988 (((x) & BIT_MASK_ACKBA_TYPSEL_8821C) << BIT_SHIFT_ACKBA_TYPSEL_8821C) 14989 #define BITS_ACKBA_TYPSEL_8821C \ 14990 (BIT_MASK_ACKBA_TYPSEL_8821C << BIT_SHIFT_ACKBA_TYPSEL_8821C) 14991 #define BIT_CLEAR_ACKBA_TYPSEL_8821C(x) ((x) & (~BITS_ACKBA_TYPSEL_8821C)) 14992 #define BIT_GET_ACKBA_TYPSEL_8821C(x) \ 14993 (((x) >> BIT_SHIFT_ACKBA_TYPSEL_8821C) & BIT_MASK_ACKBA_TYPSEL_8821C) 14994 #define BIT_SET_ACKBA_TYPSEL_8821C(x, v) \ 14995 (BIT_CLEAR_ACKBA_TYPSEL_8821C(x) | BIT_ACKBA_TYPSEL_8821C(v)) 14996 14997 #define BIT_SHIFT_ACKBA_ACKPCHK_8821C 24 14998 #define BIT_MASK_ACKBA_ACKPCHK_8821C 0xf 14999 #define BIT_ACKBA_ACKPCHK_8821C(x) \ 15000 (((x) & BIT_MASK_ACKBA_ACKPCHK_8821C) << BIT_SHIFT_ACKBA_ACKPCHK_8821C) 15001 #define BITS_ACKBA_ACKPCHK_8821C \ 15002 (BIT_MASK_ACKBA_ACKPCHK_8821C << BIT_SHIFT_ACKBA_ACKPCHK_8821C) 15003 #define BIT_CLEAR_ACKBA_ACKPCHK_8821C(x) ((x) & (~BITS_ACKBA_ACKPCHK_8821C)) 15004 #define BIT_GET_ACKBA_ACKPCHK_8821C(x) \ 15005 (((x) >> BIT_SHIFT_ACKBA_ACKPCHK_8821C) & BIT_MASK_ACKBA_ACKPCHK_8821C) 15006 #define BIT_SET_ACKBA_ACKPCHK_8821C(x, v) \ 15007 (BIT_CLEAR_ACKBA_ACKPCHK_8821C(x) | BIT_ACKBA_ACKPCHK_8821C(v)) 15008 15009 #define BIT_SHIFT_ACKBAR_TYPESEL_8821C 16 15010 #define BIT_MASK_ACKBAR_TYPESEL_8821C 0xff 15011 #define BIT_ACKBAR_TYPESEL_8821C(x) \ 15012 (((x) & BIT_MASK_ACKBAR_TYPESEL_8821C) \ 15013 << BIT_SHIFT_ACKBAR_TYPESEL_8821C) 15014 #define BITS_ACKBAR_TYPESEL_8821C \ 15015 (BIT_MASK_ACKBAR_TYPESEL_8821C << BIT_SHIFT_ACKBAR_TYPESEL_8821C) 15016 #define BIT_CLEAR_ACKBAR_TYPESEL_8821C(x) ((x) & (~BITS_ACKBAR_TYPESEL_8821C)) 15017 #define BIT_GET_ACKBAR_TYPESEL_8821C(x) \ 15018 (((x) >> BIT_SHIFT_ACKBAR_TYPESEL_8821C) & \ 15019 BIT_MASK_ACKBAR_TYPESEL_8821C) 15020 #define BIT_SET_ACKBAR_TYPESEL_8821C(x, v) \ 15021 (BIT_CLEAR_ACKBAR_TYPESEL_8821C(x) | BIT_ACKBAR_TYPESEL_8821C(v)) 15022 15023 #define BIT_SHIFT_ACKBAR_ACKPCHK_8821C 12 15024 #define BIT_MASK_ACKBAR_ACKPCHK_8821C 0xf 15025 #define BIT_ACKBAR_ACKPCHK_8821C(x) \ 15026 (((x) & BIT_MASK_ACKBAR_ACKPCHK_8821C) \ 15027 << BIT_SHIFT_ACKBAR_ACKPCHK_8821C) 15028 #define BITS_ACKBAR_ACKPCHK_8821C \ 15029 (BIT_MASK_ACKBAR_ACKPCHK_8821C << BIT_SHIFT_ACKBAR_ACKPCHK_8821C) 15030 #define BIT_CLEAR_ACKBAR_ACKPCHK_8821C(x) ((x) & (~BITS_ACKBAR_ACKPCHK_8821C)) 15031 #define BIT_GET_ACKBAR_ACKPCHK_8821C(x) \ 15032 (((x) >> BIT_SHIFT_ACKBAR_ACKPCHK_8821C) & \ 15033 BIT_MASK_ACKBAR_ACKPCHK_8821C) 15034 #define BIT_SET_ACKBAR_ACKPCHK_8821C(x, v) \ 15035 (BIT_CLEAR_ACKBAR_ACKPCHK_8821C(x) | BIT_ACKBAR_ACKPCHK_8821C(v)) 15036 15037 #define BIT_RXBA_IGNOREA2_V1_8821C BIT(10) 15038 #define BIT_EN_SAVE_ALL_TXOPADDR_V1_8821C BIT(9) 15039 #define BIT_EN_TXCTS_TO_TXOPOWNER_INRXNAV_V1_8821C BIT(8) 15040 #define BIT_DIS_TXBA_AMPDUFCSERR_V1_8821C BIT(7) 15041 #define BIT_DIS_TXBA_RXBARINFULL_V1_8821C BIT(6) 15042 #define BIT_DIS_TXCFE_INFULL_V1_8821C BIT(5) 15043 #define BIT_DIS_TXCTS_INFULL_V1_8821C BIT(4) 15044 #define BIT_EN_TXACKBA_IN_TX_RDG_V1_8821C BIT(3) 15045 #define BIT_EN_TXACKBA_IN_TXOP_V1_8821C BIT(2) 15046 #define BIT_EN_TXCTS_IN_RXNAV_V1_8821C BIT(1) 15047 #define BIT_EN_TXCTS_INTXOP_V1_8821C BIT(0) 15048 15049 /* 2 REG_CAMCMD_8821C (CAM COMMAND REGISTER) */ 15050 #define BIT_SECCAM_POLLING_8821C BIT(31) 15051 #define BIT_SECCAM_CLR_8821C BIT(30) 15052 #define BIT_MFBCAM_CLR_8821C BIT(29) 15053 #define BIT_SECCAM_WE_8821C BIT(16) 15054 15055 #define BIT_SHIFT_SECCAM_ADDR_V2_8821C 0 15056 #define BIT_MASK_SECCAM_ADDR_V2_8821C 0x3ff 15057 #define BIT_SECCAM_ADDR_V2_8821C(x) \ 15058 (((x) & BIT_MASK_SECCAM_ADDR_V2_8821C) \ 15059 << BIT_SHIFT_SECCAM_ADDR_V2_8821C) 15060 #define BITS_SECCAM_ADDR_V2_8821C \ 15061 (BIT_MASK_SECCAM_ADDR_V2_8821C << BIT_SHIFT_SECCAM_ADDR_V2_8821C) 15062 #define BIT_CLEAR_SECCAM_ADDR_V2_8821C(x) ((x) & (~BITS_SECCAM_ADDR_V2_8821C)) 15063 #define BIT_GET_SECCAM_ADDR_V2_8821C(x) \ 15064 (((x) >> BIT_SHIFT_SECCAM_ADDR_V2_8821C) & \ 15065 BIT_MASK_SECCAM_ADDR_V2_8821C) 15066 #define BIT_SET_SECCAM_ADDR_V2_8821C(x, v) \ 15067 (BIT_CLEAR_SECCAM_ADDR_V2_8821C(x) | BIT_SECCAM_ADDR_V2_8821C(v)) 15068 15069 /* 2 REG_CAMWRITE_8821C (CAM WRITE REGISTER) */ 15070 15071 #define BIT_SHIFT_CAMW_DATA_8821C 0 15072 #define BIT_MASK_CAMW_DATA_8821C 0xffffffffL 15073 #define BIT_CAMW_DATA_8821C(x) \ 15074 (((x) & BIT_MASK_CAMW_DATA_8821C) << BIT_SHIFT_CAMW_DATA_8821C) 15075 #define BITS_CAMW_DATA_8821C \ 15076 (BIT_MASK_CAMW_DATA_8821C << BIT_SHIFT_CAMW_DATA_8821C) 15077 #define BIT_CLEAR_CAMW_DATA_8821C(x) ((x) & (~BITS_CAMW_DATA_8821C)) 15078 #define BIT_GET_CAMW_DATA_8821C(x) \ 15079 (((x) >> BIT_SHIFT_CAMW_DATA_8821C) & BIT_MASK_CAMW_DATA_8821C) 15080 #define BIT_SET_CAMW_DATA_8821C(x, v) \ 15081 (BIT_CLEAR_CAMW_DATA_8821C(x) | BIT_CAMW_DATA_8821C(v)) 15082 15083 /* 2 REG_CAMREAD_8821C (CAM READ REGISTER) */ 15084 15085 #define BIT_SHIFT_CAMR_DATA_8821C 0 15086 #define BIT_MASK_CAMR_DATA_8821C 0xffffffffL 15087 #define BIT_CAMR_DATA_8821C(x) \ 15088 (((x) & BIT_MASK_CAMR_DATA_8821C) << BIT_SHIFT_CAMR_DATA_8821C) 15089 #define BITS_CAMR_DATA_8821C \ 15090 (BIT_MASK_CAMR_DATA_8821C << BIT_SHIFT_CAMR_DATA_8821C) 15091 #define BIT_CLEAR_CAMR_DATA_8821C(x) ((x) & (~BITS_CAMR_DATA_8821C)) 15092 #define BIT_GET_CAMR_DATA_8821C(x) \ 15093 (((x) >> BIT_SHIFT_CAMR_DATA_8821C) & BIT_MASK_CAMR_DATA_8821C) 15094 #define BIT_SET_CAMR_DATA_8821C(x, v) \ 15095 (BIT_CLEAR_CAMR_DATA_8821C(x) | BIT_CAMR_DATA_8821C(v)) 15096 15097 /* 2 REG_CAMDBG_8821C (CAM DEBUG REGISTER) */ 15098 #define BIT_SECCAM_INFO_8821C BIT(31) 15099 #define BIT_SEC_KEYFOUND_8821C BIT(15) 15100 15101 #define BIT_SHIFT_CAMDBG_SEC_TYPE_8821C 12 15102 #define BIT_MASK_CAMDBG_SEC_TYPE_8821C 0x7 15103 #define BIT_CAMDBG_SEC_TYPE_8821C(x) \ 15104 (((x) & BIT_MASK_CAMDBG_SEC_TYPE_8821C) \ 15105 << BIT_SHIFT_CAMDBG_SEC_TYPE_8821C) 15106 #define BITS_CAMDBG_SEC_TYPE_8821C \ 15107 (BIT_MASK_CAMDBG_SEC_TYPE_8821C << BIT_SHIFT_CAMDBG_SEC_TYPE_8821C) 15108 #define BIT_CLEAR_CAMDBG_SEC_TYPE_8821C(x) ((x) & (~BITS_CAMDBG_SEC_TYPE_8821C)) 15109 #define BIT_GET_CAMDBG_SEC_TYPE_8821C(x) \ 15110 (((x) >> BIT_SHIFT_CAMDBG_SEC_TYPE_8821C) & \ 15111 BIT_MASK_CAMDBG_SEC_TYPE_8821C) 15112 #define BIT_SET_CAMDBG_SEC_TYPE_8821C(x, v) \ 15113 (BIT_CLEAR_CAMDBG_SEC_TYPE_8821C(x) | BIT_CAMDBG_SEC_TYPE_8821C(v)) 15114 15115 #define BIT_CAMDBG_EXT_SECTYPE_8821C BIT(11) 15116 15117 #define BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8821C 5 15118 #define BIT_MASK_CAMDBG_MIC_KEY_IDX_8821C 0x1f 15119 #define BIT_CAMDBG_MIC_KEY_IDX_8821C(x) \ 15120 (((x) & BIT_MASK_CAMDBG_MIC_KEY_IDX_8821C) \ 15121 << BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8821C) 15122 #define BITS_CAMDBG_MIC_KEY_IDX_8821C \ 15123 (BIT_MASK_CAMDBG_MIC_KEY_IDX_8821C \ 15124 << BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8821C) 15125 #define BIT_CLEAR_CAMDBG_MIC_KEY_IDX_8821C(x) \ 15126 ((x) & (~BITS_CAMDBG_MIC_KEY_IDX_8821C)) 15127 #define BIT_GET_CAMDBG_MIC_KEY_IDX_8821C(x) \ 15128 (((x) >> BIT_SHIFT_CAMDBG_MIC_KEY_IDX_8821C) & \ 15129 BIT_MASK_CAMDBG_MIC_KEY_IDX_8821C) 15130 #define BIT_SET_CAMDBG_MIC_KEY_IDX_8821C(x, v) \ 15131 (BIT_CLEAR_CAMDBG_MIC_KEY_IDX_8821C(x) | \ 15132 BIT_CAMDBG_MIC_KEY_IDX_8821C(v)) 15133 15134 #define BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8821C 0 15135 #define BIT_MASK_CAMDBG_SEC_KEY_IDX_8821C 0x1f 15136 #define BIT_CAMDBG_SEC_KEY_IDX_8821C(x) \ 15137 (((x) & BIT_MASK_CAMDBG_SEC_KEY_IDX_8821C) \ 15138 << BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8821C) 15139 #define BITS_CAMDBG_SEC_KEY_IDX_8821C \ 15140 (BIT_MASK_CAMDBG_SEC_KEY_IDX_8821C \ 15141 << BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8821C) 15142 #define BIT_CLEAR_CAMDBG_SEC_KEY_IDX_8821C(x) \ 15143 ((x) & (~BITS_CAMDBG_SEC_KEY_IDX_8821C)) 15144 #define BIT_GET_CAMDBG_SEC_KEY_IDX_8821C(x) \ 15145 (((x) >> BIT_SHIFT_CAMDBG_SEC_KEY_IDX_8821C) & \ 15146 BIT_MASK_CAMDBG_SEC_KEY_IDX_8821C) 15147 #define BIT_SET_CAMDBG_SEC_KEY_IDX_8821C(x, v) \ 15148 (BIT_CLEAR_CAMDBG_SEC_KEY_IDX_8821C(x) | \ 15149 BIT_CAMDBG_SEC_KEY_IDX_8821C(v)) 15150 15151 /* 2 REG_SECCFG_8821C (SECURITY CONFIGURATION REGISTER) */ 15152 #define BIT_DIS_GCLK_WAPI_8821C BIT(15) 15153 #define BIT_DIS_GCLK_AES_8821C BIT(14) 15154 #define BIT_DIS_GCLK_TKIP_8821C BIT(13) 15155 #define BIT_AES_SEL_QC_1_8821C BIT(12) 15156 #define BIT_AES_SEL_QC_0_8821C BIT(11) 15157 #define BIT_CHK_BMC_8821C BIT(9) 15158 #define BIT_CHK_KEYID_8821C BIT(8) 15159 #define BIT_RXBCUSEDK_8821C BIT(7) 15160 #define BIT_TXBCUSEDK_8821C BIT(6) 15161 #define BIT_NOSKMC_8821C BIT(5) 15162 #define BIT_SKBYA2_8821C BIT(4) 15163 #define BIT_RXDEC_8821C BIT(3) 15164 #define BIT_TXENC_8821C BIT(2) 15165 #define BIT_RXUHUSEDK_8821C BIT(1) 15166 #define BIT_TXUHUSEDK_8821C BIT(0) 15167 15168 /* 2 REG_RXFILTER_CATEGORY_1_8821C */ 15169 15170 #define BIT_SHIFT_RXFILTER_CATEGORY_1_8821C 0 15171 #define BIT_MASK_RXFILTER_CATEGORY_1_8821C 0xff 15172 #define BIT_RXFILTER_CATEGORY_1_8821C(x) \ 15173 (((x) & BIT_MASK_RXFILTER_CATEGORY_1_8821C) \ 15174 << BIT_SHIFT_RXFILTER_CATEGORY_1_8821C) 15175 #define BITS_RXFILTER_CATEGORY_1_8821C \ 15176 (BIT_MASK_RXFILTER_CATEGORY_1_8821C \ 15177 << BIT_SHIFT_RXFILTER_CATEGORY_1_8821C) 15178 #define BIT_CLEAR_RXFILTER_CATEGORY_1_8821C(x) \ 15179 ((x) & (~BITS_RXFILTER_CATEGORY_1_8821C)) 15180 #define BIT_GET_RXFILTER_CATEGORY_1_8821C(x) \ 15181 (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_1_8821C) & \ 15182 BIT_MASK_RXFILTER_CATEGORY_1_8821C) 15183 #define BIT_SET_RXFILTER_CATEGORY_1_8821C(x, v) \ 15184 (BIT_CLEAR_RXFILTER_CATEGORY_1_8821C(x) | \ 15185 BIT_RXFILTER_CATEGORY_1_8821C(v)) 15186 15187 /* 2 REG_RXFILTER_ACTION_1_8821C */ 15188 15189 #define BIT_SHIFT_RXFILTER_ACTION_1_8821C 0 15190 #define BIT_MASK_RXFILTER_ACTION_1_8821C 0xff 15191 #define BIT_RXFILTER_ACTION_1_8821C(x) \ 15192 (((x) & BIT_MASK_RXFILTER_ACTION_1_8821C) \ 15193 << BIT_SHIFT_RXFILTER_ACTION_1_8821C) 15194 #define BITS_RXFILTER_ACTION_1_8821C \ 15195 (BIT_MASK_RXFILTER_ACTION_1_8821C << BIT_SHIFT_RXFILTER_ACTION_1_8821C) 15196 #define BIT_CLEAR_RXFILTER_ACTION_1_8821C(x) \ 15197 ((x) & (~BITS_RXFILTER_ACTION_1_8821C)) 15198 #define BIT_GET_RXFILTER_ACTION_1_8821C(x) \ 15199 (((x) >> BIT_SHIFT_RXFILTER_ACTION_1_8821C) & \ 15200 BIT_MASK_RXFILTER_ACTION_1_8821C) 15201 #define BIT_SET_RXFILTER_ACTION_1_8821C(x, v) \ 15202 (BIT_CLEAR_RXFILTER_ACTION_1_8821C(x) | BIT_RXFILTER_ACTION_1_8821C(v)) 15203 15204 /* 2 REG_RXFILTER_CATEGORY_2_8821C */ 15205 15206 #define BIT_SHIFT_RXFILTER_CATEGORY_2_8821C 0 15207 #define BIT_MASK_RXFILTER_CATEGORY_2_8821C 0xff 15208 #define BIT_RXFILTER_CATEGORY_2_8821C(x) \ 15209 (((x) & BIT_MASK_RXFILTER_CATEGORY_2_8821C) \ 15210 << BIT_SHIFT_RXFILTER_CATEGORY_2_8821C) 15211 #define BITS_RXFILTER_CATEGORY_2_8821C \ 15212 (BIT_MASK_RXFILTER_CATEGORY_2_8821C \ 15213 << BIT_SHIFT_RXFILTER_CATEGORY_2_8821C) 15214 #define BIT_CLEAR_RXFILTER_CATEGORY_2_8821C(x) \ 15215 ((x) & (~BITS_RXFILTER_CATEGORY_2_8821C)) 15216 #define BIT_GET_RXFILTER_CATEGORY_2_8821C(x) \ 15217 (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_2_8821C) & \ 15218 BIT_MASK_RXFILTER_CATEGORY_2_8821C) 15219 #define BIT_SET_RXFILTER_CATEGORY_2_8821C(x, v) \ 15220 (BIT_CLEAR_RXFILTER_CATEGORY_2_8821C(x) | \ 15221 BIT_RXFILTER_CATEGORY_2_8821C(v)) 15222 15223 /* 2 REG_RXFILTER_ACTION_2_8821C */ 15224 15225 #define BIT_SHIFT_RXFILTER_ACTION_2_8821C 0 15226 #define BIT_MASK_RXFILTER_ACTION_2_8821C 0xff 15227 #define BIT_RXFILTER_ACTION_2_8821C(x) \ 15228 (((x) & BIT_MASK_RXFILTER_ACTION_2_8821C) \ 15229 << BIT_SHIFT_RXFILTER_ACTION_2_8821C) 15230 #define BITS_RXFILTER_ACTION_2_8821C \ 15231 (BIT_MASK_RXFILTER_ACTION_2_8821C << BIT_SHIFT_RXFILTER_ACTION_2_8821C) 15232 #define BIT_CLEAR_RXFILTER_ACTION_2_8821C(x) \ 15233 ((x) & (~BITS_RXFILTER_ACTION_2_8821C)) 15234 #define BIT_GET_RXFILTER_ACTION_2_8821C(x) \ 15235 (((x) >> BIT_SHIFT_RXFILTER_ACTION_2_8821C) & \ 15236 BIT_MASK_RXFILTER_ACTION_2_8821C) 15237 #define BIT_SET_RXFILTER_ACTION_2_8821C(x, v) \ 15238 (BIT_CLEAR_RXFILTER_ACTION_2_8821C(x) | BIT_RXFILTER_ACTION_2_8821C(v)) 15239 15240 /* 2 REG_RXFILTER_CATEGORY_3_8821C */ 15241 15242 #define BIT_SHIFT_RXFILTER_CATEGORY_3_8821C 0 15243 #define BIT_MASK_RXFILTER_CATEGORY_3_8821C 0xff 15244 #define BIT_RXFILTER_CATEGORY_3_8821C(x) \ 15245 (((x) & BIT_MASK_RXFILTER_CATEGORY_3_8821C) \ 15246 << BIT_SHIFT_RXFILTER_CATEGORY_3_8821C) 15247 #define BITS_RXFILTER_CATEGORY_3_8821C \ 15248 (BIT_MASK_RXFILTER_CATEGORY_3_8821C \ 15249 << BIT_SHIFT_RXFILTER_CATEGORY_3_8821C) 15250 #define BIT_CLEAR_RXFILTER_CATEGORY_3_8821C(x) \ 15251 ((x) & (~BITS_RXFILTER_CATEGORY_3_8821C)) 15252 #define BIT_GET_RXFILTER_CATEGORY_3_8821C(x) \ 15253 (((x) >> BIT_SHIFT_RXFILTER_CATEGORY_3_8821C) & \ 15254 BIT_MASK_RXFILTER_CATEGORY_3_8821C) 15255 #define BIT_SET_RXFILTER_CATEGORY_3_8821C(x, v) \ 15256 (BIT_CLEAR_RXFILTER_CATEGORY_3_8821C(x) | \ 15257 BIT_RXFILTER_CATEGORY_3_8821C(v)) 15258 15259 /* 2 REG_RXFILTER_ACTION_3_8821C */ 15260 15261 #define BIT_SHIFT_RXFILTER_ACTION_3_8821C 0 15262 #define BIT_MASK_RXFILTER_ACTION_3_8821C 0xff 15263 #define BIT_RXFILTER_ACTION_3_8821C(x) \ 15264 (((x) & BIT_MASK_RXFILTER_ACTION_3_8821C) \ 15265 << BIT_SHIFT_RXFILTER_ACTION_3_8821C) 15266 #define BITS_RXFILTER_ACTION_3_8821C \ 15267 (BIT_MASK_RXFILTER_ACTION_3_8821C << BIT_SHIFT_RXFILTER_ACTION_3_8821C) 15268 #define BIT_CLEAR_RXFILTER_ACTION_3_8821C(x) \ 15269 ((x) & (~BITS_RXFILTER_ACTION_3_8821C)) 15270 #define BIT_GET_RXFILTER_ACTION_3_8821C(x) \ 15271 (((x) >> BIT_SHIFT_RXFILTER_ACTION_3_8821C) & \ 15272 BIT_MASK_RXFILTER_ACTION_3_8821C) 15273 #define BIT_SET_RXFILTER_ACTION_3_8821C(x, v) \ 15274 (BIT_CLEAR_RXFILTER_ACTION_3_8821C(x) | BIT_RXFILTER_ACTION_3_8821C(v)) 15275 15276 /* 2 REG_RXFLTMAP3_8821C (RX FILTER MAP GROUP 3) */ 15277 #define BIT_MGTFLT15EN_FW_8821C BIT(15) 15278 #define BIT_MGTFLT14EN_FW_8821C BIT(14) 15279 #define BIT_MGTFLT13EN_FW_8821C BIT(13) 15280 #define BIT_MGTFLT12EN_FW_8821C BIT(12) 15281 #define BIT_MGTFLT11EN_FW_8821C BIT(11) 15282 #define BIT_MGTFLT10EN_FW_8821C BIT(10) 15283 #define BIT_MGTFLT9EN_FW_8821C BIT(9) 15284 #define BIT_MGTFLT8EN_FW_8821C BIT(8) 15285 #define BIT_MGTFLT7EN_FW_8821C BIT(7) 15286 #define BIT_MGTFLT6EN_FW_8821C BIT(6) 15287 #define BIT_MGTFLT5EN_FW_8821C BIT(5) 15288 #define BIT_MGTFLT4EN_FW_8821C BIT(4) 15289 #define BIT_MGTFLT3EN_FW_8821C BIT(3) 15290 #define BIT_MGTFLT2EN_FW_8821C BIT(2) 15291 #define BIT_MGTFLT1EN_FW_8821C BIT(1) 15292 #define BIT_MGTFLT0EN_FW_8821C BIT(0) 15293 15294 /* 2 REG_RXFLTMAP4_8821C (RX FILTER MAP GROUP 4) */ 15295 #define BIT_CTRLFLT15EN_FW_8821C BIT(15) 15296 #define BIT_CTRLFLT14EN_FW_8821C BIT(14) 15297 #define BIT_CTRLFLT13EN_FW_8821C BIT(13) 15298 #define BIT_CTRLFLT12EN_FW_8821C BIT(12) 15299 #define BIT_CTRLFLT11EN_FW_8821C BIT(11) 15300 #define BIT_CTRLFLT10EN_FW_8821C BIT(10) 15301 #define BIT_CTRLFLT9EN_FW_8821C BIT(9) 15302 #define BIT_CTRLFLT8EN_FW_8821C BIT(8) 15303 #define BIT_CTRLFLT7EN_FW_8821C BIT(7) 15304 #define BIT_CTRLFLT6EN_FW_8821C BIT(6) 15305 #define BIT_CTRLFLT5EN_FW_8821C BIT(5) 15306 #define BIT_CTRLFLT4EN_FW_8821C BIT(4) 15307 #define BIT_CTRLFLT3EN_FW_8821C BIT(3) 15308 #define BIT_CTRLFLT2EN_FW_8821C BIT(2) 15309 #define BIT_CTRLFLT1EN_FW_8821C BIT(1) 15310 #define BIT_CTRLFLT0EN_FW_8821C BIT(0) 15311 15312 /* 2 REG_RXFLTMAP5_8821C (RX FILTER MAP GROUP 5) */ 15313 #define BIT_DATAFLT15EN_FW_8821C BIT(15) 15314 #define BIT_DATAFLT14EN_FW_8821C BIT(14) 15315 #define BIT_DATAFLT13EN_FW_8821C BIT(13) 15316 #define BIT_DATAFLT12EN_FW_8821C BIT(12) 15317 #define BIT_DATAFLT11EN_FW_8821C BIT(11) 15318 #define BIT_DATAFLT10EN_FW_8821C BIT(10) 15319 #define BIT_DATAFLT9EN_FW_8821C BIT(9) 15320 #define BIT_DATAFLT8EN_FW_8821C BIT(8) 15321 #define BIT_DATAFLT7EN_FW_8821C BIT(7) 15322 #define BIT_DATAFLT6EN_FW_8821C BIT(6) 15323 #define BIT_DATAFLT5EN_FW_8821C BIT(5) 15324 #define BIT_DATAFLT4EN_FW_8821C BIT(4) 15325 #define BIT_DATAFLT3EN_FW_8821C BIT(3) 15326 #define BIT_DATAFLT2EN_FW_8821C BIT(2) 15327 #define BIT_DATAFLT1EN_FW_8821C BIT(1) 15328 #define BIT_DATAFLT0EN_FW_8821C BIT(0) 15329 15330 /* 2 REG_RXFLTMAP6_8821C (RX FILTER MAP GROUP 6) */ 15331 #define BIT_ACTIONFLT15EN_FW_8821C BIT(15) 15332 #define BIT_ACTIONFLT14EN_FW_8821C BIT(14) 15333 #define BIT_ACTIONFLT13EN_FW_8821C BIT(13) 15334 #define BIT_ACTIONFLT12EN_FW_8821C BIT(12) 15335 #define BIT_ACTIONFLT11EN_FW_8821C BIT(11) 15336 #define BIT_ACTIONFLT10EN_FW_8821C BIT(10) 15337 #define BIT_ACTIONFLT9EN_FW_8821C BIT(9) 15338 #define BIT_ACTIONFLT8EN_FW_8821C BIT(8) 15339 #define BIT_ACTIONFLT7EN_FW_8821C BIT(7) 15340 #define BIT_ACTIONFLT6EN_FW_8821C BIT(6) 15341 #define BIT_ACTIONFLT5EN_FW_8821C BIT(5) 15342 #define BIT_ACTIONFLT4EN_FW_8821C BIT(4) 15343 #define BIT_ACTIONFLT3EN_FW_8821C BIT(3) 15344 #define BIT_ACTIONFLT2EN_FW_8821C BIT(2) 15345 #define BIT_ACTIONFLT1EN_FW_8821C BIT(1) 15346 #define BIT_ACTIONFLT0EN_FW_8821C BIT(0) 15347 15348 /* 2 REG_WOW_CTRL_8821C (WAKE ON WLAN CONTROL REGISTER) */ 15349 15350 #define BIT_SHIFT_PSF_BSSIDSEL_B2B1_8821C 6 15351 #define BIT_MASK_PSF_BSSIDSEL_B2B1_8821C 0x3 15352 #define BIT_PSF_BSSIDSEL_B2B1_8821C(x) \ 15353 (((x) & BIT_MASK_PSF_BSSIDSEL_B2B1_8821C) \ 15354 << BIT_SHIFT_PSF_BSSIDSEL_B2B1_8821C) 15355 #define BITS_PSF_BSSIDSEL_B2B1_8821C \ 15356 (BIT_MASK_PSF_BSSIDSEL_B2B1_8821C << BIT_SHIFT_PSF_BSSIDSEL_B2B1_8821C) 15357 #define BIT_CLEAR_PSF_BSSIDSEL_B2B1_8821C(x) \ 15358 ((x) & (~BITS_PSF_BSSIDSEL_B2B1_8821C)) 15359 #define BIT_GET_PSF_BSSIDSEL_B2B1_8821C(x) \ 15360 (((x) >> BIT_SHIFT_PSF_BSSIDSEL_B2B1_8821C) & \ 15361 BIT_MASK_PSF_BSSIDSEL_B2B1_8821C) 15362 #define BIT_SET_PSF_BSSIDSEL_B2B1_8821C(x, v) \ 15363 (BIT_CLEAR_PSF_BSSIDSEL_B2B1_8821C(x) | BIT_PSF_BSSIDSEL_B2B1_8821C(v)) 15364 15365 #define BIT_WOWHCI_8821C BIT(5) 15366 #define BIT_PSF_BSSIDSEL_B0_8821C BIT(4) 15367 #define BIT_UWF_8821C BIT(3) 15368 #define BIT_MAGIC_8821C BIT(2) 15369 #define BIT_WOWEN_8821C BIT(1) 15370 #define BIT_FORCE_WAKEUP_8821C BIT(0) 15371 15372 /* 2 REG_NAN_RX_TSF_FILTER_8821C(NAN_RX_TSF_ADDRESS_FILTER) */ 15373 #define BIT_CHK_TSF_TA_8821C BIT(2) 15374 #define BIT_CHK_TSF_CBSSID_8821C BIT(1) 15375 #define BIT_CHK_TSF_EN_8821C BIT(0) 15376 15377 /* 2 REG_PS_RX_INFO_8821C (POWER SAVE RX INFORMATION REGISTER) */ 15378 15379 #define BIT_SHIFT_PORTSEL__PS_RX_INFO_8821C 5 15380 #define BIT_MASK_PORTSEL__PS_RX_INFO_8821C 0x7 15381 #define BIT_PORTSEL__PS_RX_INFO_8821C(x) \ 15382 (((x) & BIT_MASK_PORTSEL__PS_RX_INFO_8821C) \ 15383 << BIT_SHIFT_PORTSEL__PS_RX_INFO_8821C) 15384 #define BITS_PORTSEL__PS_RX_INFO_8821C \ 15385 (BIT_MASK_PORTSEL__PS_RX_INFO_8821C \ 15386 << BIT_SHIFT_PORTSEL__PS_RX_INFO_8821C) 15387 #define BIT_CLEAR_PORTSEL__PS_RX_INFO_8821C(x) \ 15388 ((x) & (~BITS_PORTSEL__PS_RX_INFO_8821C)) 15389 #define BIT_GET_PORTSEL__PS_RX_INFO_8821C(x) \ 15390 (((x) >> BIT_SHIFT_PORTSEL__PS_RX_INFO_8821C) & \ 15391 BIT_MASK_PORTSEL__PS_RX_INFO_8821C) 15392 #define BIT_SET_PORTSEL__PS_RX_INFO_8821C(x, v) \ 15393 (BIT_CLEAR_PORTSEL__PS_RX_INFO_8821C(x) | \ 15394 BIT_PORTSEL__PS_RX_INFO_8821C(v)) 15395 15396 #define BIT_RXCTRLIN0_8821C BIT(4) 15397 #define BIT_RXMGTIN0_8821C BIT(3) 15398 #define BIT_RXDATAIN2_8821C BIT(2) 15399 #define BIT_RXDATAIN1_8821C BIT(1) 15400 #define BIT_RXDATAIN0_8821C BIT(0) 15401 15402 /* 2 REG_WMMPS_UAPSD_TID_8821C (WMM POWER SAVE UAPSD TID REGISTER) */ 15403 #define BIT_WMMPS_UAPSD_TID7_8821C BIT(7) 15404 #define BIT_WMMPS_UAPSD_TID6_8821C BIT(6) 15405 #define BIT_WMMPS_UAPSD_TID5_8821C BIT(5) 15406 #define BIT_WMMPS_UAPSD_TID4_8821C BIT(4) 15407 #define BIT_WMMPS_UAPSD_TID3_8821C BIT(3) 15408 #define BIT_WMMPS_UAPSD_TID2_8821C BIT(2) 15409 #define BIT_WMMPS_UAPSD_TID1_8821C BIT(1) 15410 #define BIT_WMMPS_UAPSD_TID0_8821C BIT(0) 15411 15412 /* 2 REG_LPNAV_CTRL_8821C (LOW POWER NAV CONTROL REGISTER) */ 15413 #define BIT_LPNAV_EN_8821C BIT(31) 15414 15415 #define BIT_SHIFT_LPNAV_EARLY_8821C 16 15416 #define BIT_MASK_LPNAV_EARLY_8821C 0x7fff 15417 #define BIT_LPNAV_EARLY_8821C(x) \ 15418 (((x) & BIT_MASK_LPNAV_EARLY_8821C) << BIT_SHIFT_LPNAV_EARLY_8821C) 15419 #define BITS_LPNAV_EARLY_8821C \ 15420 (BIT_MASK_LPNAV_EARLY_8821C << BIT_SHIFT_LPNAV_EARLY_8821C) 15421 #define BIT_CLEAR_LPNAV_EARLY_8821C(x) ((x) & (~BITS_LPNAV_EARLY_8821C)) 15422 #define BIT_GET_LPNAV_EARLY_8821C(x) \ 15423 (((x) >> BIT_SHIFT_LPNAV_EARLY_8821C) & BIT_MASK_LPNAV_EARLY_8821C) 15424 #define BIT_SET_LPNAV_EARLY_8821C(x, v) \ 15425 (BIT_CLEAR_LPNAV_EARLY_8821C(x) | BIT_LPNAV_EARLY_8821C(v)) 15426 15427 #define BIT_SHIFT_LPNAV_TH_8821C 0 15428 #define BIT_MASK_LPNAV_TH_8821C 0xffff 15429 #define BIT_LPNAV_TH_8821C(x) \ 15430 (((x) & BIT_MASK_LPNAV_TH_8821C) << BIT_SHIFT_LPNAV_TH_8821C) 15431 #define BITS_LPNAV_TH_8821C \ 15432 (BIT_MASK_LPNAV_TH_8821C << BIT_SHIFT_LPNAV_TH_8821C) 15433 #define BIT_CLEAR_LPNAV_TH_8821C(x) ((x) & (~BITS_LPNAV_TH_8821C)) 15434 #define BIT_GET_LPNAV_TH_8821C(x) \ 15435 (((x) >> BIT_SHIFT_LPNAV_TH_8821C) & BIT_MASK_LPNAV_TH_8821C) 15436 #define BIT_SET_LPNAV_TH_8821C(x, v) \ 15437 (BIT_CLEAR_LPNAV_TH_8821C(x) | BIT_LPNAV_TH_8821C(v)) 15438 15439 /* 2 REG_WKFMCAM_CMD_8821C (WAKEUP FRAME CAM COMMAND REGISTER) */ 15440 #define BIT_WKFCAM_POLLING_V1_8821C BIT(31) 15441 #define BIT_WKFCAM_CLR_V1_8821C BIT(30) 15442 #define BIT_WKFCAM_WE_8821C BIT(16) 15443 15444 #define BIT_SHIFT_WKFCAM_ADDR_V2_8821C 8 15445 #define BIT_MASK_WKFCAM_ADDR_V2_8821C 0xff 15446 #define BIT_WKFCAM_ADDR_V2_8821C(x) \ 15447 (((x) & BIT_MASK_WKFCAM_ADDR_V2_8821C) \ 15448 << BIT_SHIFT_WKFCAM_ADDR_V2_8821C) 15449 #define BITS_WKFCAM_ADDR_V2_8821C \ 15450 (BIT_MASK_WKFCAM_ADDR_V2_8821C << BIT_SHIFT_WKFCAM_ADDR_V2_8821C) 15451 #define BIT_CLEAR_WKFCAM_ADDR_V2_8821C(x) ((x) & (~BITS_WKFCAM_ADDR_V2_8821C)) 15452 #define BIT_GET_WKFCAM_ADDR_V2_8821C(x) \ 15453 (((x) >> BIT_SHIFT_WKFCAM_ADDR_V2_8821C) & \ 15454 BIT_MASK_WKFCAM_ADDR_V2_8821C) 15455 #define BIT_SET_WKFCAM_ADDR_V2_8821C(x, v) \ 15456 (BIT_CLEAR_WKFCAM_ADDR_V2_8821C(x) | BIT_WKFCAM_ADDR_V2_8821C(v)) 15457 15458 #define BIT_SHIFT_WKFCAM_CAM_NUM_V1_8821C 0 15459 #define BIT_MASK_WKFCAM_CAM_NUM_V1_8821C 0xff 15460 #define BIT_WKFCAM_CAM_NUM_V1_8821C(x) \ 15461 (((x) & BIT_MASK_WKFCAM_CAM_NUM_V1_8821C) \ 15462 << BIT_SHIFT_WKFCAM_CAM_NUM_V1_8821C) 15463 #define BITS_WKFCAM_CAM_NUM_V1_8821C \ 15464 (BIT_MASK_WKFCAM_CAM_NUM_V1_8821C << BIT_SHIFT_WKFCAM_CAM_NUM_V1_8821C) 15465 #define BIT_CLEAR_WKFCAM_CAM_NUM_V1_8821C(x) \ 15466 ((x) & (~BITS_WKFCAM_CAM_NUM_V1_8821C)) 15467 #define BIT_GET_WKFCAM_CAM_NUM_V1_8821C(x) \ 15468 (((x) >> BIT_SHIFT_WKFCAM_CAM_NUM_V1_8821C) & \ 15469 BIT_MASK_WKFCAM_CAM_NUM_V1_8821C) 15470 #define BIT_SET_WKFCAM_CAM_NUM_V1_8821C(x, v) \ 15471 (BIT_CLEAR_WKFCAM_CAM_NUM_V1_8821C(x) | BIT_WKFCAM_CAM_NUM_V1_8821C(v)) 15472 15473 /* 2 REG_WKFMCAM_RWD_8821C (WAKEUP FRAME READ/WRITE DATA) */ 15474 15475 #define BIT_SHIFT_WKFMCAM_RWD_8821C 0 15476 #define BIT_MASK_WKFMCAM_RWD_8821C 0xffffffffL 15477 #define BIT_WKFMCAM_RWD_8821C(x) \ 15478 (((x) & BIT_MASK_WKFMCAM_RWD_8821C) << BIT_SHIFT_WKFMCAM_RWD_8821C) 15479 #define BITS_WKFMCAM_RWD_8821C \ 15480 (BIT_MASK_WKFMCAM_RWD_8821C << BIT_SHIFT_WKFMCAM_RWD_8821C) 15481 #define BIT_CLEAR_WKFMCAM_RWD_8821C(x) ((x) & (~BITS_WKFMCAM_RWD_8821C)) 15482 #define BIT_GET_WKFMCAM_RWD_8821C(x) \ 15483 (((x) >> BIT_SHIFT_WKFMCAM_RWD_8821C) & BIT_MASK_WKFMCAM_RWD_8821C) 15484 #define BIT_SET_WKFMCAM_RWD_8821C(x, v) \ 15485 (BIT_CLEAR_WKFMCAM_RWD_8821C(x) | BIT_WKFMCAM_RWD_8821C(v)) 15486 15487 /* 2 REG_RXFLTMAP0_8821C (RX FILTER MAP GROUP 0) */ 15488 #define BIT_MGTFLT15EN_8821C BIT(15) 15489 #define BIT_MGTFLT14EN_8821C BIT(14) 15490 #define BIT_MGTFLT13EN_8821C BIT(13) 15491 #define BIT_MGTFLT12EN_8821C BIT(12) 15492 #define BIT_MGTFLT11EN_8821C BIT(11) 15493 #define BIT_MGTFLT10EN_8821C BIT(10) 15494 #define BIT_MGTFLT9EN_8821C BIT(9) 15495 #define BIT_MGTFLT8EN_8821C BIT(8) 15496 #define BIT_MGTFLT7EN_8821C BIT(7) 15497 #define BIT_MGTFLT6EN_8821C BIT(6) 15498 #define BIT_MGTFLT5EN_8821C BIT(5) 15499 #define BIT_MGTFLT4EN_8821C BIT(4) 15500 #define BIT_MGTFLT3EN_8821C BIT(3) 15501 #define BIT_MGTFLT2EN_8821C BIT(2) 15502 #define BIT_MGTFLT1EN_8821C BIT(1) 15503 #define BIT_MGTFLT0EN_8821C BIT(0) 15504 15505 /* 2 REG_RXFLTMAP1_8821C (RX FILTER MAP GROUP 1) */ 15506 #define BIT_CTRLFLT15EN_8821C BIT(15) 15507 #define BIT_CTRLFLT14EN_8821C BIT(14) 15508 #define BIT_CTRLFLT13EN_8821C BIT(13) 15509 #define BIT_CTRLFLT12EN_8821C BIT(12) 15510 #define BIT_CTRLFLT11EN_8821C BIT(11) 15511 #define BIT_CTRLFLT10EN_8821C BIT(10) 15512 #define BIT_CTRLFLT9EN_8821C BIT(9) 15513 #define BIT_CTRLFLT8EN_8821C BIT(8) 15514 #define BIT_CTRLFLT7EN_8821C BIT(7) 15515 #define BIT_CTRLFLT6EN_8821C BIT(6) 15516 #define BIT_CTRLFLT5EN_8821C BIT(5) 15517 #define BIT_CTRLFLT4EN_8821C BIT(4) 15518 #define BIT_CTRLFLT3EN_8821C BIT(3) 15519 #define BIT_CTRLFLT2EN_8821C BIT(2) 15520 #define BIT_CTRLFLT1EN_8821C BIT(1) 15521 #define BIT_CTRLFLT0EN_8821C BIT(0) 15522 15523 /* 2 REG_RXFLTMAP2_8821C (RX FILTER MAP GROUP 2) */ 15524 #define BIT_DATAFLT15EN_8821C BIT(15) 15525 #define BIT_DATAFLT14EN_8821C BIT(14) 15526 #define BIT_DATAFLT13EN_8821C BIT(13) 15527 #define BIT_DATAFLT12EN_8821C BIT(12) 15528 #define BIT_DATAFLT11EN_8821C BIT(11) 15529 #define BIT_DATAFLT10EN_8821C BIT(10) 15530 #define BIT_DATAFLT9EN_8821C BIT(9) 15531 #define BIT_DATAFLT8EN_8821C BIT(8) 15532 #define BIT_DATAFLT7EN_8821C BIT(7) 15533 #define BIT_DATAFLT6EN_8821C BIT(6) 15534 #define BIT_DATAFLT5EN_8821C BIT(5) 15535 #define BIT_DATAFLT4EN_8821C BIT(4) 15536 #define BIT_DATAFLT3EN_8821C BIT(3) 15537 #define BIT_DATAFLT2EN_8821C BIT(2) 15538 #define BIT_DATAFLT1EN_8821C BIT(1) 15539 #define BIT_DATAFLT0EN_8821C BIT(0) 15540 15541 /* 2 REG_RSVD_8821C */ 15542 15543 /* 2 REG_BCN_PSR_RPT_8821C (BEACON PARSER REPORT REGISTER) */ 15544 15545 #define BIT_SHIFT_DTIM_CNT_8821C 24 15546 #define BIT_MASK_DTIM_CNT_8821C 0xff 15547 #define BIT_DTIM_CNT_8821C(x) \ 15548 (((x) & BIT_MASK_DTIM_CNT_8821C) << BIT_SHIFT_DTIM_CNT_8821C) 15549 #define BITS_DTIM_CNT_8821C \ 15550 (BIT_MASK_DTIM_CNT_8821C << BIT_SHIFT_DTIM_CNT_8821C) 15551 #define BIT_CLEAR_DTIM_CNT_8821C(x) ((x) & (~BITS_DTIM_CNT_8821C)) 15552 #define BIT_GET_DTIM_CNT_8821C(x) \ 15553 (((x) >> BIT_SHIFT_DTIM_CNT_8821C) & BIT_MASK_DTIM_CNT_8821C) 15554 #define BIT_SET_DTIM_CNT_8821C(x, v) \ 15555 (BIT_CLEAR_DTIM_CNT_8821C(x) | BIT_DTIM_CNT_8821C(v)) 15556 15557 #define BIT_SHIFT_DTIM_PERIOD_8821C 16 15558 #define BIT_MASK_DTIM_PERIOD_8821C 0xff 15559 #define BIT_DTIM_PERIOD_8821C(x) \ 15560 (((x) & BIT_MASK_DTIM_PERIOD_8821C) << BIT_SHIFT_DTIM_PERIOD_8821C) 15561 #define BITS_DTIM_PERIOD_8821C \ 15562 (BIT_MASK_DTIM_PERIOD_8821C << BIT_SHIFT_DTIM_PERIOD_8821C) 15563 #define BIT_CLEAR_DTIM_PERIOD_8821C(x) ((x) & (~BITS_DTIM_PERIOD_8821C)) 15564 #define BIT_GET_DTIM_PERIOD_8821C(x) \ 15565 (((x) >> BIT_SHIFT_DTIM_PERIOD_8821C) & BIT_MASK_DTIM_PERIOD_8821C) 15566 #define BIT_SET_DTIM_PERIOD_8821C(x, v) \ 15567 (BIT_CLEAR_DTIM_PERIOD_8821C(x) | BIT_DTIM_PERIOD_8821C(v)) 15568 15569 #define BIT_DTIM_8821C BIT(15) 15570 #define BIT_TIM_8821C BIT(14) 15571 #define BIT_RPT_VALID_8821C BIT(13) 15572 15573 #define BIT_SHIFT_PS_AID_0_8821C 0 15574 #define BIT_MASK_PS_AID_0_8821C 0x7ff 15575 #define BIT_PS_AID_0_8821C(x) \ 15576 (((x) & BIT_MASK_PS_AID_0_8821C) << BIT_SHIFT_PS_AID_0_8821C) 15577 #define BITS_PS_AID_0_8821C \ 15578 (BIT_MASK_PS_AID_0_8821C << BIT_SHIFT_PS_AID_0_8821C) 15579 #define BIT_CLEAR_PS_AID_0_8821C(x) ((x) & (~BITS_PS_AID_0_8821C)) 15580 #define BIT_GET_PS_AID_0_8821C(x) \ 15581 (((x) >> BIT_SHIFT_PS_AID_0_8821C) & BIT_MASK_PS_AID_0_8821C) 15582 #define BIT_SET_PS_AID_0_8821C(x, v) \ 15583 (BIT_CLEAR_PS_AID_0_8821C(x) | BIT_PS_AID_0_8821C(v)) 15584 15585 /* 2 REG_FLC_RPC_8821C (FW LPS CONDITION -- RX PKT COUNTER) */ 15586 15587 #define BIT_SHIFT_FLC_RPC_8821C 0 15588 #define BIT_MASK_FLC_RPC_8821C 0xff 15589 #define BIT_FLC_RPC_8821C(x) \ 15590 (((x) & BIT_MASK_FLC_RPC_8821C) << BIT_SHIFT_FLC_RPC_8821C) 15591 #define BITS_FLC_RPC_8821C (BIT_MASK_FLC_RPC_8821C << BIT_SHIFT_FLC_RPC_8821C) 15592 #define BIT_CLEAR_FLC_RPC_8821C(x) ((x) & (~BITS_FLC_RPC_8821C)) 15593 #define BIT_GET_FLC_RPC_8821C(x) \ 15594 (((x) >> BIT_SHIFT_FLC_RPC_8821C) & BIT_MASK_FLC_RPC_8821C) 15595 #define BIT_SET_FLC_RPC_8821C(x, v) \ 15596 (BIT_CLEAR_FLC_RPC_8821C(x) | BIT_FLC_RPC_8821C(v)) 15597 15598 /* 2 REG_FLC_RPCT_8821C (FLC_RPC THRESHOLD) */ 15599 15600 #define BIT_SHIFT_FLC_RPCT_8821C 0 15601 #define BIT_MASK_FLC_RPCT_8821C 0xff 15602 #define BIT_FLC_RPCT_8821C(x) \ 15603 (((x) & BIT_MASK_FLC_RPCT_8821C) << BIT_SHIFT_FLC_RPCT_8821C) 15604 #define BITS_FLC_RPCT_8821C \ 15605 (BIT_MASK_FLC_RPCT_8821C << BIT_SHIFT_FLC_RPCT_8821C) 15606 #define BIT_CLEAR_FLC_RPCT_8821C(x) ((x) & (~BITS_FLC_RPCT_8821C)) 15607 #define BIT_GET_FLC_RPCT_8821C(x) \ 15608 (((x) >> BIT_SHIFT_FLC_RPCT_8821C) & BIT_MASK_FLC_RPCT_8821C) 15609 #define BIT_SET_FLC_RPCT_8821C(x, v) \ 15610 (BIT_CLEAR_FLC_RPCT_8821C(x) | BIT_FLC_RPCT_8821C(v)) 15611 15612 /* 2 REG_FLC_PTS_8821C (PKT TYPE SELECTION OF FLC_RPC T) */ 15613 #define BIT_CMF_8821C BIT(2) 15614 #define BIT_CCF_8821C BIT(1) 15615 #define BIT_CDF_8821C BIT(0) 15616 15617 /* 2 REG_FLC_TRPC_8821C (TIMER OF FLC_RPC) */ 15618 #define BIT_FLC_RPCT_V1_8821C BIT(7) 15619 #define BIT_MODE_8821C BIT(6) 15620 15621 #define BIT_SHIFT_TRPCD_8821C 0 15622 #define BIT_MASK_TRPCD_8821C 0x3f 15623 #define BIT_TRPCD_8821C(x) \ 15624 (((x) & BIT_MASK_TRPCD_8821C) << BIT_SHIFT_TRPCD_8821C) 15625 #define BITS_TRPCD_8821C (BIT_MASK_TRPCD_8821C << BIT_SHIFT_TRPCD_8821C) 15626 #define BIT_CLEAR_TRPCD_8821C(x) ((x) & (~BITS_TRPCD_8821C)) 15627 #define BIT_GET_TRPCD_8821C(x) \ 15628 (((x) >> BIT_SHIFT_TRPCD_8821C) & BIT_MASK_TRPCD_8821C) 15629 #define BIT_SET_TRPCD_8821C(x, v) \ 15630 (BIT_CLEAR_TRPCD_8821C(x) | BIT_TRPCD_8821C(v)) 15631 15632 /* 2 REG_RXPKTMON_CTRL_8821C */ 15633 15634 #define BIT_SHIFT_RXBKQPKT_SEQ_8821C 20 15635 #define BIT_MASK_RXBKQPKT_SEQ_8821C 0xf 15636 #define BIT_RXBKQPKT_SEQ_8821C(x) \ 15637 (((x) & BIT_MASK_RXBKQPKT_SEQ_8821C) << BIT_SHIFT_RXBKQPKT_SEQ_8821C) 15638 #define BITS_RXBKQPKT_SEQ_8821C \ 15639 (BIT_MASK_RXBKQPKT_SEQ_8821C << BIT_SHIFT_RXBKQPKT_SEQ_8821C) 15640 #define BIT_CLEAR_RXBKQPKT_SEQ_8821C(x) ((x) & (~BITS_RXBKQPKT_SEQ_8821C)) 15641 #define BIT_GET_RXBKQPKT_SEQ_8821C(x) \ 15642 (((x) >> BIT_SHIFT_RXBKQPKT_SEQ_8821C) & BIT_MASK_RXBKQPKT_SEQ_8821C) 15643 #define BIT_SET_RXBKQPKT_SEQ_8821C(x, v) \ 15644 (BIT_CLEAR_RXBKQPKT_SEQ_8821C(x) | BIT_RXBKQPKT_SEQ_8821C(v)) 15645 15646 #define BIT_SHIFT_RXBEQPKT_SEQ_8821C 16 15647 #define BIT_MASK_RXBEQPKT_SEQ_8821C 0xf 15648 #define BIT_RXBEQPKT_SEQ_8821C(x) \ 15649 (((x) & BIT_MASK_RXBEQPKT_SEQ_8821C) << BIT_SHIFT_RXBEQPKT_SEQ_8821C) 15650 #define BITS_RXBEQPKT_SEQ_8821C \ 15651 (BIT_MASK_RXBEQPKT_SEQ_8821C << BIT_SHIFT_RXBEQPKT_SEQ_8821C) 15652 #define BIT_CLEAR_RXBEQPKT_SEQ_8821C(x) ((x) & (~BITS_RXBEQPKT_SEQ_8821C)) 15653 #define BIT_GET_RXBEQPKT_SEQ_8821C(x) \ 15654 (((x) >> BIT_SHIFT_RXBEQPKT_SEQ_8821C) & BIT_MASK_RXBEQPKT_SEQ_8821C) 15655 #define BIT_SET_RXBEQPKT_SEQ_8821C(x, v) \ 15656 (BIT_CLEAR_RXBEQPKT_SEQ_8821C(x) | BIT_RXBEQPKT_SEQ_8821C(v)) 15657 15658 #define BIT_SHIFT_RXVIQPKT_SEQ_8821C 12 15659 #define BIT_MASK_RXVIQPKT_SEQ_8821C 0xf 15660 #define BIT_RXVIQPKT_SEQ_8821C(x) \ 15661 (((x) & BIT_MASK_RXVIQPKT_SEQ_8821C) << BIT_SHIFT_RXVIQPKT_SEQ_8821C) 15662 #define BITS_RXVIQPKT_SEQ_8821C \ 15663 (BIT_MASK_RXVIQPKT_SEQ_8821C << BIT_SHIFT_RXVIQPKT_SEQ_8821C) 15664 #define BIT_CLEAR_RXVIQPKT_SEQ_8821C(x) ((x) & (~BITS_RXVIQPKT_SEQ_8821C)) 15665 #define BIT_GET_RXVIQPKT_SEQ_8821C(x) \ 15666 (((x) >> BIT_SHIFT_RXVIQPKT_SEQ_8821C) & BIT_MASK_RXVIQPKT_SEQ_8821C) 15667 #define BIT_SET_RXVIQPKT_SEQ_8821C(x, v) \ 15668 (BIT_CLEAR_RXVIQPKT_SEQ_8821C(x) | BIT_RXVIQPKT_SEQ_8821C(v)) 15669 15670 #define BIT_SHIFT_RXVOQPKT_SEQ_8821C 8 15671 #define BIT_MASK_RXVOQPKT_SEQ_8821C 0xf 15672 #define BIT_RXVOQPKT_SEQ_8821C(x) \ 15673 (((x) & BIT_MASK_RXVOQPKT_SEQ_8821C) << BIT_SHIFT_RXVOQPKT_SEQ_8821C) 15674 #define BITS_RXVOQPKT_SEQ_8821C \ 15675 (BIT_MASK_RXVOQPKT_SEQ_8821C << BIT_SHIFT_RXVOQPKT_SEQ_8821C) 15676 #define BIT_CLEAR_RXVOQPKT_SEQ_8821C(x) ((x) & (~BITS_RXVOQPKT_SEQ_8821C)) 15677 #define BIT_GET_RXVOQPKT_SEQ_8821C(x) \ 15678 (((x) >> BIT_SHIFT_RXVOQPKT_SEQ_8821C) & BIT_MASK_RXVOQPKT_SEQ_8821C) 15679 #define BIT_SET_RXVOQPKT_SEQ_8821C(x, v) \ 15680 (BIT_CLEAR_RXVOQPKT_SEQ_8821C(x) | BIT_RXVOQPKT_SEQ_8821C(v)) 15681 15682 #define BIT_RXBKQPKT_ERR_8821C BIT(7) 15683 #define BIT_RXBEQPKT_ERR_8821C BIT(6) 15684 #define BIT_RXVIQPKT_ERR_8821C BIT(5) 15685 #define BIT_RXVOQPKT_ERR_8821C BIT(4) 15686 #define BIT_RXDMA_MON_EN_8821C BIT(2) 15687 #define BIT_RXPKT_MON_RST_8821C BIT(1) 15688 #define BIT_RXPKT_MON_EN_8821C BIT(0) 15689 15690 /* 2 REG_STATE_MON_8821C */ 15691 15692 #define BIT_SHIFT_STATE_SEL_8821C 24 15693 #define BIT_MASK_STATE_SEL_8821C 0x1f 15694 #define BIT_STATE_SEL_8821C(x) \ 15695 (((x) & BIT_MASK_STATE_SEL_8821C) << BIT_SHIFT_STATE_SEL_8821C) 15696 #define BITS_STATE_SEL_8821C \ 15697 (BIT_MASK_STATE_SEL_8821C << BIT_SHIFT_STATE_SEL_8821C) 15698 #define BIT_CLEAR_STATE_SEL_8821C(x) ((x) & (~BITS_STATE_SEL_8821C)) 15699 #define BIT_GET_STATE_SEL_8821C(x) \ 15700 (((x) >> BIT_SHIFT_STATE_SEL_8821C) & BIT_MASK_STATE_SEL_8821C) 15701 #define BIT_SET_STATE_SEL_8821C(x, v) \ 15702 (BIT_CLEAR_STATE_SEL_8821C(x) | BIT_STATE_SEL_8821C(v)) 15703 15704 #define BIT_SHIFT_STATE_INFO_8821C 8 15705 #define BIT_MASK_STATE_INFO_8821C 0xff 15706 #define BIT_STATE_INFO_8821C(x) \ 15707 (((x) & BIT_MASK_STATE_INFO_8821C) << BIT_SHIFT_STATE_INFO_8821C) 15708 #define BITS_STATE_INFO_8821C \ 15709 (BIT_MASK_STATE_INFO_8821C << BIT_SHIFT_STATE_INFO_8821C) 15710 #define BIT_CLEAR_STATE_INFO_8821C(x) ((x) & (~BITS_STATE_INFO_8821C)) 15711 #define BIT_GET_STATE_INFO_8821C(x) \ 15712 (((x) >> BIT_SHIFT_STATE_INFO_8821C) & BIT_MASK_STATE_INFO_8821C) 15713 #define BIT_SET_STATE_INFO_8821C(x, v) \ 15714 (BIT_CLEAR_STATE_INFO_8821C(x) | BIT_STATE_INFO_8821C(v)) 15715 15716 #define BIT_UPD_NXT_STATE_8821C BIT(7) 15717 15718 #define BIT_SHIFT_CUR_STATE_8821C 0 15719 #define BIT_MASK_CUR_STATE_8821C 0x7f 15720 #define BIT_CUR_STATE_8821C(x) \ 15721 (((x) & BIT_MASK_CUR_STATE_8821C) << BIT_SHIFT_CUR_STATE_8821C) 15722 #define BITS_CUR_STATE_8821C \ 15723 (BIT_MASK_CUR_STATE_8821C << BIT_SHIFT_CUR_STATE_8821C) 15724 #define BIT_CLEAR_CUR_STATE_8821C(x) ((x) & (~BITS_CUR_STATE_8821C)) 15725 #define BIT_GET_CUR_STATE_8821C(x) \ 15726 (((x) >> BIT_SHIFT_CUR_STATE_8821C) & BIT_MASK_CUR_STATE_8821C) 15727 #define BIT_SET_CUR_STATE_8821C(x, v) \ 15728 (BIT_CLEAR_CUR_STATE_8821C(x) | BIT_CUR_STATE_8821C(v)) 15729 15730 /* 2 REG_ERROR_MON_8821C */ 15731 #define BIT_MACRX_ERR_1_8821C BIT(17) 15732 #define BIT_MACRX_ERR_0_8821C BIT(16) 15733 #define BIT_MACTX_ERR_3_8821C BIT(3) 15734 #define BIT_MACTX_ERR_2_8821C BIT(2) 15735 #define BIT_MACTX_ERR_1_8821C BIT(1) 15736 #define BIT_MACTX_ERR_0_8821C BIT(0) 15737 15738 /* 2 REG_SEARCH_MACID_8821C */ 15739 #define BIT_EN_TXRPTBUF_CLK_8821C BIT(31) 15740 15741 #define BIT_SHIFT_INFO_INDEX_OFFSET_8821C 16 15742 #define BIT_MASK_INFO_INDEX_OFFSET_8821C 0x1fff 15743 #define BIT_INFO_INDEX_OFFSET_8821C(x) \ 15744 (((x) & BIT_MASK_INFO_INDEX_OFFSET_8821C) \ 15745 << BIT_SHIFT_INFO_INDEX_OFFSET_8821C) 15746 #define BITS_INFO_INDEX_OFFSET_8821C \ 15747 (BIT_MASK_INFO_INDEX_OFFSET_8821C << BIT_SHIFT_INFO_INDEX_OFFSET_8821C) 15748 #define BIT_CLEAR_INFO_INDEX_OFFSET_8821C(x) \ 15749 ((x) & (~BITS_INFO_INDEX_OFFSET_8821C)) 15750 #define BIT_GET_INFO_INDEX_OFFSET_8821C(x) \ 15751 (((x) >> BIT_SHIFT_INFO_INDEX_OFFSET_8821C) & \ 15752 BIT_MASK_INFO_INDEX_OFFSET_8821C) 15753 #define BIT_SET_INFO_INDEX_OFFSET_8821C(x, v) \ 15754 (BIT_CLEAR_INFO_INDEX_OFFSET_8821C(x) | BIT_INFO_INDEX_OFFSET_8821C(v)) 15755 15756 #define BIT_WMAC_SRCH_FIFOFULL_8821C BIT(15) 15757 #define BIT_DIS_INFOSRCH_8821C BIT(14) 15758 #define BIT_DISABLE_B0_8821C BIT(13) 15759 15760 #define BIT_SHIFT_INFO_ADDR_OFFSET_8821C 0 15761 #define BIT_MASK_INFO_ADDR_OFFSET_8821C 0x1fff 15762 #define BIT_INFO_ADDR_OFFSET_8821C(x) \ 15763 (((x) & BIT_MASK_INFO_ADDR_OFFSET_8821C) \ 15764 << BIT_SHIFT_INFO_ADDR_OFFSET_8821C) 15765 #define BITS_INFO_ADDR_OFFSET_8821C \ 15766 (BIT_MASK_INFO_ADDR_OFFSET_8821C << BIT_SHIFT_INFO_ADDR_OFFSET_8821C) 15767 #define BIT_CLEAR_INFO_ADDR_OFFSET_8821C(x) \ 15768 ((x) & (~BITS_INFO_ADDR_OFFSET_8821C)) 15769 #define BIT_GET_INFO_ADDR_OFFSET_8821C(x) \ 15770 (((x) >> BIT_SHIFT_INFO_ADDR_OFFSET_8821C) & \ 15771 BIT_MASK_INFO_ADDR_OFFSET_8821C) 15772 #define BIT_SET_INFO_ADDR_OFFSET_8821C(x, v) \ 15773 (BIT_CLEAR_INFO_ADDR_OFFSET_8821C(x) | BIT_INFO_ADDR_OFFSET_8821C(v)) 15774 15775 /* 2 REG_BT_COEX_TABLE_8821C (BT-COEXISTENCE CONTROL REGISTER) */ 15776 15777 #define BIT_SHIFT_COEX_TABLE_1_8821C 0 15778 #define BIT_MASK_COEX_TABLE_1_8821C 0xffffffffL 15779 #define BIT_COEX_TABLE_1_8821C(x) \ 15780 (((x) & BIT_MASK_COEX_TABLE_1_8821C) << BIT_SHIFT_COEX_TABLE_1_8821C) 15781 #define BITS_COEX_TABLE_1_8821C \ 15782 (BIT_MASK_COEX_TABLE_1_8821C << BIT_SHIFT_COEX_TABLE_1_8821C) 15783 #define BIT_CLEAR_COEX_TABLE_1_8821C(x) ((x) & (~BITS_COEX_TABLE_1_8821C)) 15784 #define BIT_GET_COEX_TABLE_1_8821C(x) \ 15785 (((x) >> BIT_SHIFT_COEX_TABLE_1_8821C) & BIT_MASK_COEX_TABLE_1_8821C) 15786 #define BIT_SET_COEX_TABLE_1_8821C(x, v) \ 15787 (BIT_CLEAR_COEX_TABLE_1_8821C(x) | BIT_COEX_TABLE_1_8821C(v)) 15788 15789 /* 2 REG_BT_COEX_TABLE2_8821C (BT-COEXISTENCE CONTROL REGISTER) */ 15790 15791 #define BIT_SHIFT_COEX_TABLE_2_8821C 0 15792 #define BIT_MASK_COEX_TABLE_2_8821C 0xffffffffL 15793 #define BIT_COEX_TABLE_2_8821C(x) \ 15794 (((x) & BIT_MASK_COEX_TABLE_2_8821C) << BIT_SHIFT_COEX_TABLE_2_8821C) 15795 #define BITS_COEX_TABLE_2_8821C \ 15796 (BIT_MASK_COEX_TABLE_2_8821C << BIT_SHIFT_COEX_TABLE_2_8821C) 15797 #define BIT_CLEAR_COEX_TABLE_2_8821C(x) ((x) & (~BITS_COEX_TABLE_2_8821C)) 15798 #define BIT_GET_COEX_TABLE_2_8821C(x) \ 15799 (((x) >> BIT_SHIFT_COEX_TABLE_2_8821C) & BIT_MASK_COEX_TABLE_2_8821C) 15800 #define BIT_SET_COEX_TABLE_2_8821C(x, v) \ 15801 (BIT_CLEAR_COEX_TABLE_2_8821C(x) | BIT_COEX_TABLE_2_8821C(v)) 15802 15803 /* 2 REG_BT_COEX_BREAK_TABLE_8821C (BT-COEXISTENCE CONTROL REGISTER) */ 15804 15805 #define BIT_SHIFT_BREAK_TABLE_2_8821C 16 15806 #define BIT_MASK_BREAK_TABLE_2_8821C 0xffff 15807 #define BIT_BREAK_TABLE_2_8821C(x) \ 15808 (((x) & BIT_MASK_BREAK_TABLE_2_8821C) << BIT_SHIFT_BREAK_TABLE_2_8821C) 15809 #define BITS_BREAK_TABLE_2_8821C \ 15810 (BIT_MASK_BREAK_TABLE_2_8821C << BIT_SHIFT_BREAK_TABLE_2_8821C) 15811 #define BIT_CLEAR_BREAK_TABLE_2_8821C(x) ((x) & (~BITS_BREAK_TABLE_2_8821C)) 15812 #define BIT_GET_BREAK_TABLE_2_8821C(x) \ 15813 (((x) >> BIT_SHIFT_BREAK_TABLE_2_8821C) & BIT_MASK_BREAK_TABLE_2_8821C) 15814 #define BIT_SET_BREAK_TABLE_2_8821C(x, v) \ 15815 (BIT_CLEAR_BREAK_TABLE_2_8821C(x) | BIT_BREAK_TABLE_2_8821C(v)) 15816 15817 #define BIT_SHIFT_BREAK_TABLE_1_8821C 0 15818 #define BIT_MASK_BREAK_TABLE_1_8821C 0xffff 15819 #define BIT_BREAK_TABLE_1_8821C(x) \ 15820 (((x) & BIT_MASK_BREAK_TABLE_1_8821C) << BIT_SHIFT_BREAK_TABLE_1_8821C) 15821 #define BITS_BREAK_TABLE_1_8821C \ 15822 (BIT_MASK_BREAK_TABLE_1_8821C << BIT_SHIFT_BREAK_TABLE_1_8821C) 15823 #define BIT_CLEAR_BREAK_TABLE_1_8821C(x) ((x) & (~BITS_BREAK_TABLE_1_8821C)) 15824 #define BIT_GET_BREAK_TABLE_1_8821C(x) \ 15825 (((x) >> BIT_SHIFT_BREAK_TABLE_1_8821C) & BIT_MASK_BREAK_TABLE_1_8821C) 15826 #define BIT_SET_BREAK_TABLE_1_8821C(x, v) \ 15827 (BIT_CLEAR_BREAK_TABLE_1_8821C(x) | BIT_BREAK_TABLE_1_8821C(v)) 15828 15829 /* 2 REG_BT_COEX_TABLE_H_8821C (BT-COEXISTENCE CONTROL REGISTER) */ 15830 #define BIT_PRI_MASK_RX_RESP_V1_8821C BIT(30) 15831 #define BIT_PRI_MASK_RXOFDM_V1_8821C BIT(29) 15832 #define BIT_PRI_MASK_RXCCK_V1_8821C BIT(28) 15833 15834 #define BIT_SHIFT_PRI_MASK_TXAC_8821C 21 15835 #define BIT_MASK_PRI_MASK_TXAC_8821C 0x7f 15836 #define BIT_PRI_MASK_TXAC_8821C(x) \ 15837 (((x) & BIT_MASK_PRI_MASK_TXAC_8821C) << BIT_SHIFT_PRI_MASK_TXAC_8821C) 15838 #define BITS_PRI_MASK_TXAC_8821C \ 15839 (BIT_MASK_PRI_MASK_TXAC_8821C << BIT_SHIFT_PRI_MASK_TXAC_8821C) 15840 #define BIT_CLEAR_PRI_MASK_TXAC_8821C(x) ((x) & (~BITS_PRI_MASK_TXAC_8821C)) 15841 #define BIT_GET_PRI_MASK_TXAC_8821C(x) \ 15842 (((x) >> BIT_SHIFT_PRI_MASK_TXAC_8821C) & BIT_MASK_PRI_MASK_TXAC_8821C) 15843 #define BIT_SET_PRI_MASK_TXAC_8821C(x, v) \ 15844 (BIT_CLEAR_PRI_MASK_TXAC_8821C(x) | BIT_PRI_MASK_TXAC_8821C(v)) 15845 15846 #define BIT_SHIFT_PRI_MASK_NAV_8821C 13 15847 #define BIT_MASK_PRI_MASK_NAV_8821C 0xff 15848 #define BIT_PRI_MASK_NAV_8821C(x) \ 15849 (((x) & BIT_MASK_PRI_MASK_NAV_8821C) << BIT_SHIFT_PRI_MASK_NAV_8821C) 15850 #define BITS_PRI_MASK_NAV_8821C \ 15851 (BIT_MASK_PRI_MASK_NAV_8821C << BIT_SHIFT_PRI_MASK_NAV_8821C) 15852 #define BIT_CLEAR_PRI_MASK_NAV_8821C(x) ((x) & (~BITS_PRI_MASK_NAV_8821C)) 15853 #define BIT_GET_PRI_MASK_NAV_8821C(x) \ 15854 (((x) >> BIT_SHIFT_PRI_MASK_NAV_8821C) & BIT_MASK_PRI_MASK_NAV_8821C) 15855 #define BIT_SET_PRI_MASK_NAV_8821C(x, v) \ 15856 (BIT_CLEAR_PRI_MASK_NAV_8821C(x) | BIT_PRI_MASK_NAV_8821C(v)) 15857 15858 #define BIT_PRI_MASK_CCK_V1_8821C BIT(12) 15859 #define BIT_PRI_MASK_OFDM_V1_8821C BIT(11) 15860 #define BIT_PRI_MASK_RTY_V1_8821C BIT(10) 15861 15862 #define BIT_SHIFT_PRI_MASK_NUM_8821C 6 15863 #define BIT_MASK_PRI_MASK_NUM_8821C 0xf 15864 #define BIT_PRI_MASK_NUM_8821C(x) \ 15865 (((x) & BIT_MASK_PRI_MASK_NUM_8821C) << BIT_SHIFT_PRI_MASK_NUM_8821C) 15866 #define BITS_PRI_MASK_NUM_8821C \ 15867 (BIT_MASK_PRI_MASK_NUM_8821C << BIT_SHIFT_PRI_MASK_NUM_8821C) 15868 #define BIT_CLEAR_PRI_MASK_NUM_8821C(x) ((x) & (~BITS_PRI_MASK_NUM_8821C)) 15869 #define BIT_GET_PRI_MASK_NUM_8821C(x) \ 15870 (((x) >> BIT_SHIFT_PRI_MASK_NUM_8821C) & BIT_MASK_PRI_MASK_NUM_8821C) 15871 #define BIT_SET_PRI_MASK_NUM_8821C(x, v) \ 15872 (BIT_CLEAR_PRI_MASK_NUM_8821C(x) | BIT_PRI_MASK_NUM_8821C(v)) 15873 15874 #define BIT_SHIFT_PRI_MASK_TYPE_8821C 2 15875 #define BIT_MASK_PRI_MASK_TYPE_8821C 0xf 15876 #define BIT_PRI_MASK_TYPE_8821C(x) \ 15877 (((x) & BIT_MASK_PRI_MASK_TYPE_8821C) << BIT_SHIFT_PRI_MASK_TYPE_8821C) 15878 #define BITS_PRI_MASK_TYPE_8821C \ 15879 (BIT_MASK_PRI_MASK_TYPE_8821C << BIT_SHIFT_PRI_MASK_TYPE_8821C) 15880 #define BIT_CLEAR_PRI_MASK_TYPE_8821C(x) ((x) & (~BITS_PRI_MASK_TYPE_8821C)) 15881 #define BIT_GET_PRI_MASK_TYPE_8821C(x) \ 15882 (((x) >> BIT_SHIFT_PRI_MASK_TYPE_8821C) & BIT_MASK_PRI_MASK_TYPE_8821C) 15883 #define BIT_SET_PRI_MASK_TYPE_8821C(x, v) \ 15884 (BIT_CLEAR_PRI_MASK_TYPE_8821C(x) | BIT_PRI_MASK_TYPE_8821C(v)) 15885 15886 #define BIT_OOB_V1_8821C BIT(1) 15887 #define BIT_ANT_SEL_V1_8821C BIT(0) 15888 15889 /* 2 REG_RXCMD_0_8821C */ 15890 #define BIT_RXCMD_EN_8821C BIT(31) 15891 15892 #define BIT_SHIFT_RXCMD_INFO_8821C 0 15893 #define BIT_MASK_RXCMD_INFO_8821C 0x7fffffffL 15894 #define BIT_RXCMD_INFO_8821C(x) \ 15895 (((x) & BIT_MASK_RXCMD_INFO_8821C) << BIT_SHIFT_RXCMD_INFO_8821C) 15896 #define BITS_RXCMD_INFO_8821C \ 15897 (BIT_MASK_RXCMD_INFO_8821C << BIT_SHIFT_RXCMD_INFO_8821C) 15898 #define BIT_CLEAR_RXCMD_INFO_8821C(x) ((x) & (~BITS_RXCMD_INFO_8821C)) 15899 #define BIT_GET_RXCMD_INFO_8821C(x) \ 15900 (((x) >> BIT_SHIFT_RXCMD_INFO_8821C) & BIT_MASK_RXCMD_INFO_8821C) 15901 #define BIT_SET_RXCMD_INFO_8821C(x, v) \ 15902 (BIT_CLEAR_RXCMD_INFO_8821C(x) | BIT_RXCMD_INFO_8821C(v)) 15903 15904 /* 2 REG_RXCMD_1_8821C */ 15905 15906 #define BIT_SHIFT_CSI_RADDR_LATCH_8821C 24 15907 #define BIT_MASK_CSI_RADDR_LATCH_8821C 0xff 15908 #define BIT_CSI_RADDR_LATCH_8821C(x) \ 15909 (((x) & BIT_MASK_CSI_RADDR_LATCH_8821C) \ 15910 << BIT_SHIFT_CSI_RADDR_LATCH_8821C) 15911 #define BITS_CSI_RADDR_LATCH_8821C \ 15912 (BIT_MASK_CSI_RADDR_LATCH_8821C << BIT_SHIFT_CSI_RADDR_LATCH_8821C) 15913 #define BIT_CLEAR_CSI_RADDR_LATCH_8821C(x) ((x) & (~BITS_CSI_RADDR_LATCH_8821C)) 15914 #define BIT_GET_CSI_RADDR_LATCH_8821C(x) \ 15915 (((x) >> BIT_SHIFT_CSI_RADDR_LATCH_8821C) & \ 15916 BIT_MASK_CSI_RADDR_LATCH_8821C) 15917 #define BIT_SET_CSI_RADDR_LATCH_8821C(x, v) \ 15918 (BIT_CLEAR_CSI_RADDR_LATCH_8821C(x) | BIT_CSI_RADDR_LATCH_8821C(v)) 15919 15920 #define BIT_SHIFT_CSI_WADDR_LATCH_8821C 16 15921 #define BIT_MASK_CSI_WADDR_LATCH_8821C 0xff 15922 #define BIT_CSI_WADDR_LATCH_8821C(x) \ 15923 (((x) & BIT_MASK_CSI_WADDR_LATCH_8821C) \ 15924 << BIT_SHIFT_CSI_WADDR_LATCH_8821C) 15925 #define BITS_CSI_WADDR_LATCH_8821C \ 15926 (BIT_MASK_CSI_WADDR_LATCH_8821C << BIT_SHIFT_CSI_WADDR_LATCH_8821C) 15927 #define BIT_CLEAR_CSI_WADDR_LATCH_8821C(x) ((x) & (~BITS_CSI_WADDR_LATCH_8821C)) 15928 #define BIT_GET_CSI_WADDR_LATCH_8821C(x) \ 15929 (((x) >> BIT_SHIFT_CSI_WADDR_LATCH_8821C) & \ 15930 BIT_MASK_CSI_WADDR_LATCH_8821C) 15931 #define BIT_SET_CSI_WADDR_LATCH_8821C(x, v) \ 15932 (BIT_CLEAR_CSI_WADDR_LATCH_8821C(x) | BIT_CSI_WADDR_LATCH_8821C(v)) 15933 15934 #define BIT_SHIFT_RXCMD_PRD_8821C 0 15935 #define BIT_MASK_RXCMD_PRD_8821C 0xffff 15936 #define BIT_RXCMD_PRD_8821C(x) \ 15937 (((x) & BIT_MASK_RXCMD_PRD_8821C) << BIT_SHIFT_RXCMD_PRD_8821C) 15938 #define BITS_RXCMD_PRD_8821C \ 15939 (BIT_MASK_RXCMD_PRD_8821C << BIT_SHIFT_RXCMD_PRD_8821C) 15940 #define BIT_CLEAR_RXCMD_PRD_8821C(x) ((x) & (~BITS_RXCMD_PRD_8821C)) 15941 #define BIT_GET_RXCMD_PRD_8821C(x) \ 15942 (((x) >> BIT_SHIFT_RXCMD_PRD_8821C) & BIT_MASK_RXCMD_PRD_8821C) 15943 #define BIT_SET_RXCMD_PRD_8821C(x, v) \ 15944 (BIT_CLEAR_RXCMD_PRD_8821C(x) | BIT_RXCMD_PRD_8821C(v)) 15945 15946 /* 2 REG_WMAC_RESP_TXINFO_8821C (RESPONSE TXINFO REGISTER) */ 15947 15948 #define BIT_SHIFT_WMAC_RESP_MFB_8821C 25 15949 #define BIT_MASK_WMAC_RESP_MFB_8821C 0x7f 15950 #define BIT_WMAC_RESP_MFB_8821C(x) \ 15951 (((x) & BIT_MASK_WMAC_RESP_MFB_8821C) << BIT_SHIFT_WMAC_RESP_MFB_8821C) 15952 #define BITS_WMAC_RESP_MFB_8821C \ 15953 (BIT_MASK_WMAC_RESP_MFB_8821C << BIT_SHIFT_WMAC_RESP_MFB_8821C) 15954 #define BIT_CLEAR_WMAC_RESP_MFB_8821C(x) ((x) & (~BITS_WMAC_RESP_MFB_8821C)) 15955 #define BIT_GET_WMAC_RESP_MFB_8821C(x) \ 15956 (((x) >> BIT_SHIFT_WMAC_RESP_MFB_8821C) & BIT_MASK_WMAC_RESP_MFB_8821C) 15957 #define BIT_SET_WMAC_RESP_MFB_8821C(x, v) \ 15958 (BIT_CLEAR_WMAC_RESP_MFB_8821C(x) | BIT_WMAC_RESP_MFB_8821C(v)) 15959 15960 #define BIT_SHIFT_WMAC_ANTINF_SEL_8821C 23 15961 #define BIT_MASK_WMAC_ANTINF_SEL_8821C 0x3 15962 #define BIT_WMAC_ANTINF_SEL_8821C(x) \ 15963 (((x) & BIT_MASK_WMAC_ANTINF_SEL_8821C) \ 15964 << BIT_SHIFT_WMAC_ANTINF_SEL_8821C) 15965 #define BITS_WMAC_ANTINF_SEL_8821C \ 15966 (BIT_MASK_WMAC_ANTINF_SEL_8821C << BIT_SHIFT_WMAC_ANTINF_SEL_8821C) 15967 #define BIT_CLEAR_WMAC_ANTINF_SEL_8821C(x) ((x) & (~BITS_WMAC_ANTINF_SEL_8821C)) 15968 #define BIT_GET_WMAC_ANTINF_SEL_8821C(x) \ 15969 (((x) >> BIT_SHIFT_WMAC_ANTINF_SEL_8821C) & \ 15970 BIT_MASK_WMAC_ANTINF_SEL_8821C) 15971 #define BIT_SET_WMAC_ANTINF_SEL_8821C(x, v) \ 15972 (BIT_CLEAR_WMAC_ANTINF_SEL_8821C(x) | BIT_WMAC_ANTINF_SEL_8821C(v)) 15973 15974 #define BIT_SHIFT_WMAC_ANTSEL_SEL_8821C 21 15975 #define BIT_MASK_WMAC_ANTSEL_SEL_8821C 0x3 15976 #define BIT_WMAC_ANTSEL_SEL_8821C(x) \ 15977 (((x) & BIT_MASK_WMAC_ANTSEL_SEL_8821C) \ 15978 << BIT_SHIFT_WMAC_ANTSEL_SEL_8821C) 15979 #define BITS_WMAC_ANTSEL_SEL_8821C \ 15980 (BIT_MASK_WMAC_ANTSEL_SEL_8821C << BIT_SHIFT_WMAC_ANTSEL_SEL_8821C) 15981 #define BIT_CLEAR_WMAC_ANTSEL_SEL_8821C(x) ((x) & (~BITS_WMAC_ANTSEL_SEL_8821C)) 15982 #define BIT_GET_WMAC_ANTSEL_SEL_8821C(x) \ 15983 (((x) >> BIT_SHIFT_WMAC_ANTSEL_SEL_8821C) & \ 15984 BIT_MASK_WMAC_ANTSEL_SEL_8821C) 15985 #define BIT_SET_WMAC_ANTSEL_SEL_8821C(x, v) \ 15986 (BIT_CLEAR_WMAC_ANTSEL_SEL_8821C(x) | BIT_WMAC_ANTSEL_SEL_8821C(v)) 15987 15988 #define BIT_SHIFT_R_WMAC_RESP_TXPOWER_8821C 18 15989 #define BIT_MASK_R_WMAC_RESP_TXPOWER_8821C 0x7 15990 #define BIT_R_WMAC_RESP_TXPOWER_8821C(x) \ 15991 (((x) & BIT_MASK_R_WMAC_RESP_TXPOWER_8821C) \ 15992 << BIT_SHIFT_R_WMAC_RESP_TXPOWER_8821C) 15993 #define BITS_R_WMAC_RESP_TXPOWER_8821C \ 15994 (BIT_MASK_R_WMAC_RESP_TXPOWER_8821C \ 15995 << BIT_SHIFT_R_WMAC_RESP_TXPOWER_8821C) 15996 #define BIT_CLEAR_R_WMAC_RESP_TXPOWER_8821C(x) \ 15997 ((x) & (~BITS_R_WMAC_RESP_TXPOWER_8821C)) 15998 #define BIT_GET_R_WMAC_RESP_TXPOWER_8821C(x) \ 15999 (((x) >> BIT_SHIFT_R_WMAC_RESP_TXPOWER_8821C) & \ 16000 BIT_MASK_R_WMAC_RESP_TXPOWER_8821C) 16001 #define BIT_SET_R_WMAC_RESP_TXPOWER_8821C(x, v) \ 16002 (BIT_CLEAR_R_WMAC_RESP_TXPOWER_8821C(x) | \ 16003 BIT_R_WMAC_RESP_TXPOWER_8821C(v)) 16004 16005 #define BIT_SHIFT_WMAC_RESP_TXANT_8821C 0 16006 #define BIT_MASK_WMAC_RESP_TXANT_8821C 0x3ffff 16007 #define BIT_WMAC_RESP_TXANT_8821C(x) \ 16008 (((x) & BIT_MASK_WMAC_RESP_TXANT_8821C) \ 16009 << BIT_SHIFT_WMAC_RESP_TXANT_8821C) 16010 #define BITS_WMAC_RESP_TXANT_8821C \ 16011 (BIT_MASK_WMAC_RESP_TXANT_8821C << BIT_SHIFT_WMAC_RESP_TXANT_8821C) 16012 #define BIT_CLEAR_WMAC_RESP_TXANT_8821C(x) ((x) & (~BITS_WMAC_RESP_TXANT_8821C)) 16013 #define BIT_GET_WMAC_RESP_TXANT_8821C(x) \ 16014 (((x) >> BIT_SHIFT_WMAC_RESP_TXANT_8821C) & \ 16015 BIT_MASK_WMAC_RESP_TXANT_8821C) 16016 #define BIT_SET_WMAC_RESP_TXANT_8821C(x, v) \ 16017 (BIT_CLEAR_WMAC_RESP_TXANT_8821C(x) | BIT_WMAC_RESP_TXANT_8821C(v)) 16018 16019 /* 2 REG_BBPSF_CTRL_8821C */ 16020 #define BIT_CTL_IDLE_CLR_CSI_RPT_8821C BIT(31) 16021 #define BIT_WMAC_USE_NDPARATE_8821C BIT(30) 16022 16023 #define BIT_SHIFT_WMAC_CSI_RATE_8821C 24 16024 #define BIT_MASK_WMAC_CSI_RATE_8821C 0x3f 16025 #define BIT_WMAC_CSI_RATE_8821C(x) \ 16026 (((x) & BIT_MASK_WMAC_CSI_RATE_8821C) << BIT_SHIFT_WMAC_CSI_RATE_8821C) 16027 #define BITS_WMAC_CSI_RATE_8821C \ 16028 (BIT_MASK_WMAC_CSI_RATE_8821C << BIT_SHIFT_WMAC_CSI_RATE_8821C) 16029 #define BIT_CLEAR_WMAC_CSI_RATE_8821C(x) ((x) & (~BITS_WMAC_CSI_RATE_8821C)) 16030 #define BIT_GET_WMAC_CSI_RATE_8821C(x) \ 16031 (((x) >> BIT_SHIFT_WMAC_CSI_RATE_8821C) & BIT_MASK_WMAC_CSI_RATE_8821C) 16032 #define BIT_SET_WMAC_CSI_RATE_8821C(x, v) \ 16033 (BIT_CLEAR_WMAC_CSI_RATE_8821C(x) | BIT_WMAC_CSI_RATE_8821C(v)) 16034 16035 #define BIT_SHIFT_WMAC_RESP_TXRATE_8821C 16 16036 #define BIT_MASK_WMAC_RESP_TXRATE_8821C 0xff 16037 #define BIT_WMAC_RESP_TXRATE_8821C(x) \ 16038 (((x) & BIT_MASK_WMAC_RESP_TXRATE_8821C) \ 16039 << BIT_SHIFT_WMAC_RESP_TXRATE_8821C) 16040 #define BITS_WMAC_RESP_TXRATE_8821C \ 16041 (BIT_MASK_WMAC_RESP_TXRATE_8821C << BIT_SHIFT_WMAC_RESP_TXRATE_8821C) 16042 #define BIT_CLEAR_WMAC_RESP_TXRATE_8821C(x) \ 16043 ((x) & (~BITS_WMAC_RESP_TXRATE_8821C)) 16044 #define BIT_GET_WMAC_RESP_TXRATE_8821C(x) \ 16045 (((x) >> BIT_SHIFT_WMAC_RESP_TXRATE_8821C) & \ 16046 BIT_MASK_WMAC_RESP_TXRATE_8821C) 16047 #define BIT_SET_WMAC_RESP_TXRATE_8821C(x, v) \ 16048 (BIT_CLEAR_WMAC_RESP_TXRATE_8821C(x) | BIT_WMAC_RESP_TXRATE_8821C(v)) 16049 16050 #define BIT_CSI_FORCE_RATE_EN_8821C BIT(15) 16051 16052 #define BIT_SHIFT_CSI_RSC_8821C 13 16053 #define BIT_MASK_CSI_RSC_8821C 0x3 16054 #define BIT_CSI_RSC_8821C(x) \ 16055 (((x) & BIT_MASK_CSI_RSC_8821C) << BIT_SHIFT_CSI_RSC_8821C) 16056 #define BITS_CSI_RSC_8821C (BIT_MASK_CSI_RSC_8821C << BIT_SHIFT_CSI_RSC_8821C) 16057 #define BIT_CLEAR_CSI_RSC_8821C(x) ((x) & (~BITS_CSI_RSC_8821C)) 16058 #define BIT_GET_CSI_RSC_8821C(x) \ 16059 (((x) >> BIT_SHIFT_CSI_RSC_8821C) & BIT_MASK_CSI_RSC_8821C) 16060 #define BIT_SET_CSI_RSC_8821C(x, v) \ 16061 (BIT_CLEAR_CSI_RSC_8821C(x) | BIT_CSI_RSC_8821C(v)) 16062 16063 #define BIT_CSI_GID_SEL_8821C BIT(12) 16064 #define BIT_RDCSIMD_FLAG_TRIG_SEL_8821C BIT(11) 16065 #define BIT_NDPVLD_POS_RST_FFPTR_DIS_V1_8821C BIT(10) 16066 #define BIT_NDPVLD_PROTECT_RDRDY_DIS_8821C BIT(9) 16067 #define BIT_RDCSI_EMPTY_APPZERO_8821C BIT(8) 16068 #define BIT_BBPSF_MPDUCHKEN_8821C BIT(5) 16069 #define BIT_BBPSF_MHCHKEN_8821C BIT(4) 16070 #define BIT_BBPSF_ERRCHKEN_8821C BIT(3) 16071 16072 #define BIT_SHIFT_BBPSF_ERRTHR_8821C 0 16073 #define BIT_MASK_BBPSF_ERRTHR_8821C 0x7 16074 #define BIT_BBPSF_ERRTHR_8821C(x) \ 16075 (((x) & BIT_MASK_BBPSF_ERRTHR_8821C) << BIT_SHIFT_BBPSF_ERRTHR_8821C) 16076 #define BITS_BBPSF_ERRTHR_8821C \ 16077 (BIT_MASK_BBPSF_ERRTHR_8821C << BIT_SHIFT_BBPSF_ERRTHR_8821C) 16078 #define BIT_CLEAR_BBPSF_ERRTHR_8821C(x) ((x) & (~BITS_BBPSF_ERRTHR_8821C)) 16079 #define BIT_GET_BBPSF_ERRTHR_8821C(x) \ 16080 (((x) >> BIT_SHIFT_BBPSF_ERRTHR_8821C) & BIT_MASK_BBPSF_ERRTHR_8821C) 16081 #define BIT_SET_BBPSF_ERRTHR_8821C(x, v) \ 16082 (BIT_CLEAR_BBPSF_ERRTHR_8821C(x) | BIT_BBPSF_ERRTHR_8821C(v)) 16083 16084 /* 2 REG_P2P_RX_BCN_NOA_8821C (P2P RX BEACON NOA REGISTER) */ 16085 #define BIT_NOA_PARSER_EN_8821C BIT(15) 16086 #define BIT_BSSID_SEL_8821C BIT(14) 16087 16088 #define BIT_SHIFT_P2P_OUI_TYPE_8821C 0 16089 #define BIT_MASK_P2P_OUI_TYPE_8821C 0xff 16090 #define BIT_P2P_OUI_TYPE_8821C(x) \ 16091 (((x) & BIT_MASK_P2P_OUI_TYPE_8821C) << BIT_SHIFT_P2P_OUI_TYPE_8821C) 16092 #define BITS_P2P_OUI_TYPE_8821C \ 16093 (BIT_MASK_P2P_OUI_TYPE_8821C << BIT_SHIFT_P2P_OUI_TYPE_8821C) 16094 #define BIT_CLEAR_P2P_OUI_TYPE_8821C(x) ((x) & (~BITS_P2P_OUI_TYPE_8821C)) 16095 #define BIT_GET_P2P_OUI_TYPE_8821C(x) \ 16096 (((x) >> BIT_SHIFT_P2P_OUI_TYPE_8821C) & BIT_MASK_P2P_OUI_TYPE_8821C) 16097 #define BIT_SET_P2P_OUI_TYPE_8821C(x, v) \ 16098 (BIT_CLEAR_P2P_OUI_TYPE_8821C(x) | BIT_P2P_OUI_TYPE_8821C(v)) 16099 16100 /* 2 REG_RSVD_8821C */ 16101 16102 /* 2 REG_ASSOCIATED_BFMER0_INFO_8821C (ASSOCIATED BEAMFORMER0 INFO REGISTER) */ 16103 16104 #define BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_V1_8821C 0 16105 #define BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_V1_8821C 0xffffffffL 16106 #define BIT_R_WMAC_SOUNDING_RXADD_R0_V1_8821C(x) \ 16107 (((x) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_V1_8821C) \ 16108 << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_V1_8821C) 16109 #define BITS_R_WMAC_SOUNDING_RXADD_R0_V1_8821C \ 16110 (BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_V1_8821C \ 16111 << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_V1_8821C) 16112 #define BIT_CLEAR_R_WMAC_SOUNDING_RXADD_R0_V1_8821C(x) \ 16113 ((x) & (~BITS_R_WMAC_SOUNDING_RXADD_R0_V1_8821C)) 16114 #define BIT_GET_R_WMAC_SOUNDING_RXADD_R0_V1_8821C(x) \ 16115 (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_V1_8821C) & \ 16116 BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_V1_8821C) 16117 #define BIT_SET_R_WMAC_SOUNDING_RXADD_R0_V1_8821C(x, v) \ 16118 (BIT_CLEAR_R_WMAC_SOUNDING_RXADD_R0_V1_8821C(x) | \ 16119 BIT_R_WMAC_SOUNDING_RXADD_R0_V1_8821C(v)) 16120 16121 /* 2 REG_ASSOCIATED_BFMER0_INFO_H_8821C */ 16122 16123 #define BIT_SHIFT_R_WMAC_TXCSI_AID0_8821C 16 16124 #define BIT_MASK_R_WMAC_TXCSI_AID0_8821C 0x1ff 16125 #define BIT_R_WMAC_TXCSI_AID0_8821C(x) \ 16126 (((x) & BIT_MASK_R_WMAC_TXCSI_AID0_8821C) \ 16127 << BIT_SHIFT_R_WMAC_TXCSI_AID0_8821C) 16128 #define BITS_R_WMAC_TXCSI_AID0_8821C \ 16129 (BIT_MASK_R_WMAC_TXCSI_AID0_8821C << BIT_SHIFT_R_WMAC_TXCSI_AID0_8821C) 16130 #define BIT_CLEAR_R_WMAC_TXCSI_AID0_8821C(x) \ 16131 ((x) & (~BITS_R_WMAC_TXCSI_AID0_8821C)) 16132 #define BIT_GET_R_WMAC_TXCSI_AID0_8821C(x) \ 16133 (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID0_8821C) & \ 16134 BIT_MASK_R_WMAC_TXCSI_AID0_8821C) 16135 #define BIT_SET_R_WMAC_TXCSI_AID0_8821C(x, v) \ 16136 (BIT_CLEAR_R_WMAC_TXCSI_AID0_8821C(x) | BIT_R_WMAC_TXCSI_AID0_8821C(v)) 16137 16138 #define BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_H_V1_8821C 0 16139 #define BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_H_V1_8821C 0xffff 16140 #define BIT_R_WMAC_SOUNDING_RXADD_R0_H_V1_8821C(x) \ 16141 (((x) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_H_V1_8821C) \ 16142 << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_H_V1_8821C) 16143 #define BITS_R_WMAC_SOUNDING_RXADD_R0_H_V1_8821C \ 16144 (BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_H_V1_8821C \ 16145 << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_H_V1_8821C) 16146 #define BIT_CLEAR_R_WMAC_SOUNDING_RXADD_R0_H_V1_8821C(x) \ 16147 ((x) & (~BITS_R_WMAC_SOUNDING_RXADD_R0_H_V1_8821C)) 16148 #define BIT_GET_R_WMAC_SOUNDING_RXADD_R0_H_V1_8821C(x) \ 16149 (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R0_H_V1_8821C) & \ 16150 BIT_MASK_R_WMAC_SOUNDING_RXADD_R0_H_V1_8821C) 16151 #define BIT_SET_R_WMAC_SOUNDING_RXADD_R0_H_V1_8821C(x, v) \ 16152 (BIT_CLEAR_R_WMAC_SOUNDING_RXADD_R0_H_V1_8821C(x) | \ 16153 BIT_R_WMAC_SOUNDING_RXADD_R0_H_V1_8821C(v)) 16154 16155 /* 2 REG_ASSOCIATED_BFMER1_INFO_8821C (ASSOCIATED BEAMFORMER1 INFO REGISTER) */ 16156 16157 #define BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_V1_8821C 0 16158 #define BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_V1_8821C 0xffffffffL 16159 #define BIT_R_WMAC_SOUNDING_RXADD_R1_V1_8821C(x) \ 16160 (((x) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_V1_8821C) \ 16161 << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_V1_8821C) 16162 #define BITS_R_WMAC_SOUNDING_RXADD_R1_V1_8821C \ 16163 (BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_V1_8821C \ 16164 << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_V1_8821C) 16165 #define BIT_CLEAR_R_WMAC_SOUNDING_RXADD_R1_V1_8821C(x) \ 16166 ((x) & (~BITS_R_WMAC_SOUNDING_RXADD_R1_V1_8821C)) 16167 #define BIT_GET_R_WMAC_SOUNDING_RXADD_R1_V1_8821C(x) \ 16168 (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_V1_8821C) & \ 16169 BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_V1_8821C) 16170 #define BIT_SET_R_WMAC_SOUNDING_RXADD_R1_V1_8821C(x, v) \ 16171 (BIT_CLEAR_R_WMAC_SOUNDING_RXADD_R1_V1_8821C(x) | \ 16172 BIT_R_WMAC_SOUNDING_RXADD_R1_V1_8821C(v)) 16173 16174 /* 2 REG_ASSOCIATED_BFMER1_INFO_H_8821C */ 16175 16176 #define BIT_SHIFT_R_WMAC_TXCSI_AID1_8821C 16 16177 #define BIT_MASK_R_WMAC_TXCSI_AID1_8821C 0x1ff 16178 #define BIT_R_WMAC_TXCSI_AID1_8821C(x) \ 16179 (((x) & BIT_MASK_R_WMAC_TXCSI_AID1_8821C) \ 16180 << BIT_SHIFT_R_WMAC_TXCSI_AID1_8821C) 16181 #define BITS_R_WMAC_TXCSI_AID1_8821C \ 16182 (BIT_MASK_R_WMAC_TXCSI_AID1_8821C << BIT_SHIFT_R_WMAC_TXCSI_AID1_8821C) 16183 #define BIT_CLEAR_R_WMAC_TXCSI_AID1_8821C(x) \ 16184 ((x) & (~BITS_R_WMAC_TXCSI_AID1_8821C)) 16185 #define BIT_GET_R_WMAC_TXCSI_AID1_8821C(x) \ 16186 (((x) >> BIT_SHIFT_R_WMAC_TXCSI_AID1_8821C) & \ 16187 BIT_MASK_R_WMAC_TXCSI_AID1_8821C) 16188 #define BIT_SET_R_WMAC_TXCSI_AID1_8821C(x, v) \ 16189 (BIT_CLEAR_R_WMAC_TXCSI_AID1_8821C(x) | BIT_R_WMAC_TXCSI_AID1_8821C(v)) 16190 16191 #define BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_H_V1_8821C 0 16192 #define BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_H_V1_8821C 0xffff 16193 #define BIT_R_WMAC_SOUNDING_RXADD_R1_H_V1_8821C(x) \ 16194 (((x) & BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_H_V1_8821C) \ 16195 << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_H_V1_8821C) 16196 #define BITS_R_WMAC_SOUNDING_RXADD_R1_H_V1_8821C \ 16197 (BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_H_V1_8821C \ 16198 << BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_H_V1_8821C) 16199 #define BIT_CLEAR_R_WMAC_SOUNDING_RXADD_R1_H_V1_8821C(x) \ 16200 ((x) & (~BITS_R_WMAC_SOUNDING_RXADD_R1_H_V1_8821C)) 16201 #define BIT_GET_R_WMAC_SOUNDING_RXADD_R1_H_V1_8821C(x) \ 16202 (((x) >> BIT_SHIFT_R_WMAC_SOUNDING_RXADD_R1_H_V1_8821C) & \ 16203 BIT_MASK_R_WMAC_SOUNDING_RXADD_R1_H_V1_8821C) 16204 #define BIT_SET_R_WMAC_SOUNDING_RXADD_R1_H_V1_8821C(x, v) \ 16205 (BIT_CLEAR_R_WMAC_SOUNDING_RXADD_R1_H_V1_8821C(x) | \ 16206 BIT_R_WMAC_SOUNDING_RXADD_R1_H_V1_8821C(v)) 16207 16208 /* 2 REG_TX_CSI_RPT_PARAM_BW20_8821C (TX CSI REPORT PARAMETER REGISTER) */ 16209 16210 #define BIT_SHIFT_R_WMAC_BFINFO_20M_1_8821C 16 16211 #define BIT_MASK_R_WMAC_BFINFO_20M_1_8821C 0xfff 16212 #define BIT_R_WMAC_BFINFO_20M_1_8821C(x) \ 16213 (((x) & BIT_MASK_R_WMAC_BFINFO_20M_1_8821C) \ 16214 << BIT_SHIFT_R_WMAC_BFINFO_20M_1_8821C) 16215 #define BITS_R_WMAC_BFINFO_20M_1_8821C \ 16216 (BIT_MASK_R_WMAC_BFINFO_20M_1_8821C \ 16217 << BIT_SHIFT_R_WMAC_BFINFO_20M_1_8821C) 16218 #define BIT_CLEAR_R_WMAC_BFINFO_20M_1_8821C(x) \ 16219 ((x) & (~BITS_R_WMAC_BFINFO_20M_1_8821C)) 16220 #define BIT_GET_R_WMAC_BFINFO_20M_1_8821C(x) \ 16221 (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_1_8821C) & \ 16222 BIT_MASK_R_WMAC_BFINFO_20M_1_8821C) 16223 #define BIT_SET_R_WMAC_BFINFO_20M_1_8821C(x, v) \ 16224 (BIT_CLEAR_R_WMAC_BFINFO_20M_1_8821C(x) | \ 16225 BIT_R_WMAC_BFINFO_20M_1_8821C(v)) 16226 16227 #define BIT_SHIFT_R_WMAC_BFINFO_20M_0_8821C 0 16228 #define BIT_MASK_R_WMAC_BFINFO_20M_0_8821C 0xfff 16229 #define BIT_R_WMAC_BFINFO_20M_0_8821C(x) \ 16230 (((x) & BIT_MASK_R_WMAC_BFINFO_20M_0_8821C) \ 16231 << BIT_SHIFT_R_WMAC_BFINFO_20M_0_8821C) 16232 #define BITS_R_WMAC_BFINFO_20M_0_8821C \ 16233 (BIT_MASK_R_WMAC_BFINFO_20M_0_8821C \ 16234 << BIT_SHIFT_R_WMAC_BFINFO_20M_0_8821C) 16235 #define BIT_CLEAR_R_WMAC_BFINFO_20M_0_8821C(x) \ 16236 ((x) & (~BITS_R_WMAC_BFINFO_20M_0_8821C)) 16237 #define BIT_GET_R_WMAC_BFINFO_20M_0_8821C(x) \ 16238 (((x) >> BIT_SHIFT_R_WMAC_BFINFO_20M_0_8821C) & \ 16239 BIT_MASK_R_WMAC_BFINFO_20M_0_8821C) 16240 #define BIT_SET_R_WMAC_BFINFO_20M_0_8821C(x, v) \ 16241 (BIT_CLEAR_R_WMAC_BFINFO_20M_0_8821C(x) | \ 16242 BIT_R_WMAC_BFINFO_20M_0_8821C(v)) 16243 16244 /* 2 REG_TX_CSI_RPT_PARAM_BW40_8821C (TX CSI REPORT PARAMETER_BW40 REGISTER) */ 16245 16246 #define BIT_SHIFT_WMAC_RESP_ANTCD_8821C 0 16247 #define BIT_MASK_WMAC_RESP_ANTCD_8821C 0xf 16248 #define BIT_WMAC_RESP_ANTCD_8821C(x) \ 16249 (((x) & BIT_MASK_WMAC_RESP_ANTCD_8821C) \ 16250 << BIT_SHIFT_WMAC_RESP_ANTCD_8821C) 16251 #define BITS_WMAC_RESP_ANTCD_8821C \ 16252 (BIT_MASK_WMAC_RESP_ANTCD_8821C << BIT_SHIFT_WMAC_RESP_ANTCD_8821C) 16253 #define BIT_CLEAR_WMAC_RESP_ANTCD_8821C(x) ((x) & (~BITS_WMAC_RESP_ANTCD_8821C)) 16254 #define BIT_GET_WMAC_RESP_ANTCD_8821C(x) \ 16255 (((x) >> BIT_SHIFT_WMAC_RESP_ANTCD_8821C) & \ 16256 BIT_MASK_WMAC_RESP_ANTCD_8821C) 16257 #define BIT_SET_WMAC_RESP_ANTCD_8821C(x, v) \ 16258 (BIT_CLEAR_WMAC_RESP_ANTCD_8821C(x) | BIT_WMAC_RESP_ANTCD_8821C(v)) 16259 16260 /* 2 REG_RSVD_8821C */ 16261 16262 /* 2 REG_BCN_PSR_RPT2_8821C (BEACON PARSER REPORT REGISTER2) */ 16263 16264 #define BIT_SHIFT_DTIM_CNT2_8821C 24 16265 #define BIT_MASK_DTIM_CNT2_8821C 0xff 16266 #define BIT_DTIM_CNT2_8821C(x) \ 16267 (((x) & BIT_MASK_DTIM_CNT2_8821C) << BIT_SHIFT_DTIM_CNT2_8821C) 16268 #define BITS_DTIM_CNT2_8821C \ 16269 (BIT_MASK_DTIM_CNT2_8821C << BIT_SHIFT_DTIM_CNT2_8821C) 16270 #define BIT_CLEAR_DTIM_CNT2_8821C(x) ((x) & (~BITS_DTIM_CNT2_8821C)) 16271 #define BIT_GET_DTIM_CNT2_8821C(x) \ 16272 (((x) >> BIT_SHIFT_DTIM_CNT2_8821C) & BIT_MASK_DTIM_CNT2_8821C) 16273 #define BIT_SET_DTIM_CNT2_8821C(x, v) \ 16274 (BIT_CLEAR_DTIM_CNT2_8821C(x) | BIT_DTIM_CNT2_8821C(v)) 16275 16276 #define BIT_SHIFT_DTIM_PERIOD2_8821C 16 16277 #define BIT_MASK_DTIM_PERIOD2_8821C 0xff 16278 #define BIT_DTIM_PERIOD2_8821C(x) \ 16279 (((x) & BIT_MASK_DTIM_PERIOD2_8821C) << BIT_SHIFT_DTIM_PERIOD2_8821C) 16280 #define BITS_DTIM_PERIOD2_8821C \ 16281 (BIT_MASK_DTIM_PERIOD2_8821C << BIT_SHIFT_DTIM_PERIOD2_8821C) 16282 #define BIT_CLEAR_DTIM_PERIOD2_8821C(x) ((x) & (~BITS_DTIM_PERIOD2_8821C)) 16283 #define BIT_GET_DTIM_PERIOD2_8821C(x) \ 16284 (((x) >> BIT_SHIFT_DTIM_PERIOD2_8821C) & BIT_MASK_DTIM_PERIOD2_8821C) 16285 #define BIT_SET_DTIM_PERIOD2_8821C(x, v) \ 16286 (BIT_CLEAR_DTIM_PERIOD2_8821C(x) | BIT_DTIM_PERIOD2_8821C(v)) 16287 16288 #define BIT_DTIM2_8821C BIT(15) 16289 #define BIT_TIM2_8821C BIT(14) 16290 16291 #define BIT_SHIFT_PS_AID_2_8821C 0 16292 #define BIT_MASK_PS_AID_2_8821C 0x7ff 16293 #define BIT_PS_AID_2_8821C(x) \ 16294 (((x) & BIT_MASK_PS_AID_2_8821C) << BIT_SHIFT_PS_AID_2_8821C) 16295 #define BITS_PS_AID_2_8821C \ 16296 (BIT_MASK_PS_AID_2_8821C << BIT_SHIFT_PS_AID_2_8821C) 16297 #define BIT_CLEAR_PS_AID_2_8821C(x) ((x) & (~BITS_PS_AID_2_8821C)) 16298 #define BIT_GET_PS_AID_2_8821C(x) \ 16299 (((x) >> BIT_SHIFT_PS_AID_2_8821C) & BIT_MASK_PS_AID_2_8821C) 16300 #define BIT_SET_PS_AID_2_8821C(x, v) \ 16301 (BIT_CLEAR_PS_AID_2_8821C(x) | BIT_PS_AID_2_8821C(v)) 16302 16303 /* 2 REG_BCN_PSR_RPT3_8821C (BEACON PARSER REPORT REGISTER3) */ 16304 16305 #define BIT_SHIFT_DTIM_CNT3_8821C 24 16306 #define BIT_MASK_DTIM_CNT3_8821C 0xff 16307 #define BIT_DTIM_CNT3_8821C(x) \ 16308 (((x) & BIT_MASK_DTIM_CNT3_8821C) << BIT_SHIFT_DTIM_CNT3_8821C) 16309 #define BITS_DTIM_CNT3_8821C \ 16310 (BIT_MASK_DTIM_CNT3_8821C << BIT_SHIFT_DTIM_CNT3_8821C) 16311 #define BIT_CLEAR_DTIM_CNT3_8821C(x) ((x) & (~BITS_DTIM_CNT3_8821C)) 16312 #define BIT_GET_DTIM_CNT3_8821C(x) \ 16313 (((x) >> BIT_SHIFT_DTIM_CNT3_8821C) & BIT_MASK_DTIM_CNT3_8821C) 16314 #define BIT_SET_DTIM_CNT3_8821C(x, v) \ 16315 (BIT_CLEAR_DTIM_CNT3_8821C(x) | BIT_DTIM_CNT3_8821C(v)) 16316 16317 #define BIT_SHIFT_DTIM_PERIOD3_8821C 16 16318 #define BIT_MASK_DTIM_PERIOD3_8821C 0xff 16319 #define BIT_DTIM_PERIOD3_8821C(x) \ 16320 (((x) & BIT_MASK_DTIM_PERIOD3_8821C) << BIT_SHIFT_DTIM_PERIOD3_8821C) 16321 #define BITS_DTIM_PERIOD3_8821C \ 16322 (BIT_MASK_DTIM_PERIOD3_8821C << BIT_SHIFT_DTIM_PERIOD3_8821C) 16323 #define BIT_CLEAR_DTIM_PERIOD3_8821C(x) ((x) & (~BITS_DTIM_PERIOD3_8821C)) 16324 #define BIT_GET_DTIM_PERIOD3_8821C(x) \ 16325 (((x) >> BIT_SHIFT_DTIM_PERIOD3_8821C) & BIT_MASK_DTIM_PERIOD3_8821C) 16326 #define BIT_SET_DTIM_PERIOD3_8821C(x, v) \ 16327 (BIT_CLEAR_DTIM_PERIOD3_8821C(x) | BIT_DTIM_PERIOD3_8821C(v)) 16328 16329 #define BIT_DTIM3_8821C BIT(15) 16330 #define BIT_TIM3_8821C BIT(14) 16331 16332 #define BIT_SHIFT_PS_AID_3_8821C 0 16333 #define BIT_MASK_PS_AID_3_8821C 0x7ff 16334 #define BIT_PS_AID_3_8821C(x) \ 16335 (((x) & BIT_MASK_PS_AID_3_8821C) << BIT_SHIFT_PS_AID_3_8821C) 16336 #define BITS_PS_AID_3_8821C \ 16337 (BIT_MASK_PS_AID_3_8821C << BIT_SHIFT_PS_AID_3_8821C) 16338 #define BIT_CLEAR_PS_AID_3_8821C(x) ((x) & (~BITS_PS_AID_3_8821C)) 16339 #define BIT_GET_PS_AID_3_8821C(x) \ 16340 (((x) >> BIT_SHIFT_PS_AID_3_8821C) & BIT_MASK_PS_AID_3_8821C) 16341 #define BIT_SET_PS_AID_3_8821C(x, v) \ 16342 (BIT_CLEAR_PS_AID_3_8821C(x) | BIT_PS_AID_3_8821C(v)) 16343 16344 /* 2 REG_BCN_PSR_RPT4_8821C (BEACON PARSER REPORT REGISTER4) */ 16345 16346 #define BIT_SHIFT_DTIM_CNT4_8821C 24 16347 #define BIT_MASK_DTIM_CNT4_8821C 0xff 16348 #define BIT_DTIM_CNT4_8821C(x) \ 16349 (((x) & BIT_MASK_DTIM_CNT4_8821C) << BIT_SHIFT_DTIM_CNT4_8821C) 16350 #define BITS_DTIM_CNT4_8821C \ 16351 (BIT_MASK_DTIM_CNT4_8821C << BIT_SHIFT_DTIM_CNT4_8821C) 16352 #define BIT_CLEAR_DTIM_CNT4_8821C(x) ((x) & (~BITS_DTIM_CNT4_8821C)) 16353 #define BIT_GET_DTIM_CNT4_8821C(x) \ 16354 (((x) >> BIT_SHIFT_DTIM_CNT4_8821C) & BIT_MASK_DTIM_CNT4_8821C) 16355 #define BIT_SET_DTIM_CNT4_8821C(x, v) \ 16356 (BIT_CLEAR_DTIM_CNT4_8821C(x) | BIT_DTIM_CNT4_8821C(v)) 16357 16358 #define BIT_SHIFT_DTIM_PERIOD4_8821C 16 16359 #define BIT_MASK_DTIM_PERIOD4_8821C 0xff 16360 #define BIT_DTIM_PERIOD4_8821C(x) \ 16361 (((x) & BIT_MASK_DTIM_PERIOD4_8821C) << BIT_SHIFT_DTIM_PERIOD4_8821C) 16362 #define BITS_DTIM_PERIOD4_8821C \ 16363 (BIT_MASK_DTIM_PERIOD4_8821C << BIT_SHIFT_DTIM_PERIOD4_8821C) 16364 #define BIT_CLEAR_DTIM_PERIOD4_8821C(x) ((x) & (~BITS_DTIM_PERIOD4_8821C)) 16365 #define BIT_GET_DTIM_PERIOD4_8821C(x) \ 16366 (((x) >> BIT_SHIFT_DTIM_PERIOD4_8821C) & BIT_MASK_DTIM_PERIOD4_8821C) 16367 #define BIT_SET_DTIM_PERIOD4_8821C(x, v) \ 16368 (BIT_CLEAR_DTIM_PERIOD4_8821C(x) | BIT_DTIM_PERIOD4_8821C(v)) 16369 16370 #define BIT_DTIM4_8821C BIT(15) 16371 #define BIT_TIM4_8821C BIT(14) 16372 16373 #define BIT_SHIFT_PS_AID_4_8821C 0 16374 #define BIT_MASK_PS_AID_4_8821C 0x7ff 16375 #define BIT_PS_AID_4_8821C(x) \ 16376 (((x) & BIT_MASK_PS_AID_4_8821C) << BIT_SHIFT_PS_AID_4_8821C) 16377 #define BITS_PS_AID_4_8821C \ 16378 (BIT_MASK_PS_AID_4_8821C << BIT_SHIFT_PS_AID_4_8821C) 16379 #define BIT_CLEAR_PS_AID_4_8821C(x) ((x) & (~BITS_PS_AID_4_8821C)) 16380 #define BIT_GET_PS_AID_4_8821C(x) \ 16381 (((x) >> BIT_SHIFT_PS_AID_4_8821C) & BIT_MASK_PS_AID_4_8821C) 16382 #define BIT_SET_PS_AID_4_8821C(x, v) \ 16383 (BIT_CLEAR_PS_AID_4_8821C(x) | BIT_PS_AID_4_8821C(v)) 16384 16385 /* 2 REG_A1_ADDR_MASK_8821C (A1 ADDR MASK REGISTER) */ 16386 16387 #define BIT_SHIFT_A1_ADDR_MASK_8821C 0 16388 #define BIT_MASK_A1_ADDR_MASK_8821C 0xffffffffL 16389 #define BIT_A1_ADDR_MASK_8821C(x) \ 16390 (((x) & BIT_MASK_A1_ADDR_MASK_8821C) << BIT_SHIFT_A1_ADDR_MASK_8821C) 16391 #define BITS_A1_ADDR_MASK_8821C \ 16392 (BIT_MASK_A1_ADDR_MASK_8821C << BIT_SHIFT_A1_ADDR_MASK_8821C) 16393 #define BIT_CLEAR_A1_ADDR_MASK_8821C(x) ((x) & (~BITS_A1_ADDR_MASK_8821C)) 16394 #define BIT_GET_A1_ADDR_MASK_8821C(x) \ 16395 (((x) >> BIT_SHIFT_A1_ADDR_MASK_8821C) & BIT_MASK_A1_ADDR_MASK_8821C) 16396 #define BIT_SET_A1_ADDR_MASK_8821C(x, v) \ 16397 (BIT_CLEAR_A1_ADDR_MASK_8821C(x) | BIT_A1_ADDR_MASK_8821C(v)) 16398 16399 /* 2 REG_RSVD_8821C */ 16400 16401 /* 2 REG_RSVD_8821C */ 16402 16403 /* 2 REG_RSVD_8821C */ 16404 16405 /* 2 REG_RSVD_8821C */ 16406 16407 /* 2 REG_MACID2_8821C (MAC ID2 REGISTER) */ 16408 16409 #define BIT_SHIFT_MACID2_V1_8821C 0 16410 #define BIT_MASK_MACID2_V1_8821C 0xffffffffL 16411 #define BIT_MACID2_V1_8821C(x) \ 16412 (((x) & BIT_MASK_MACID2_V1_8821C) << BIT_SHIFT_MACID2_V1_8821C) 16413 #define BITS_MACID2_V1_8821C \ 16414 (BIT_MASK_MACID2_V1_8821C << BIT_SHIFT_MACID2_V1_8821C) 16415 #define BIT_CLEAR_MACID2_V1_8821C(x) ((x) & (~BITS_MACID2_V1_8821C)) 16416 #define BIT_GET_MACID2_V1_8821C(x) \ 16417 (((x) >> BIT_SHIFT_MACID2_V1_8821C) & BIT_MASK_MACID2_V1_8821C) 16418 #define BIT_SET_MACID2_V1_8821C(x, v) \ 16419 (BIT_CLEAR_MACID2_V1_8821C(x) | BIT_MACID2_V1_8821C(v)) 16420 16421 /* 2 REG_MACID2_H_8821C (MAC ID2 REGISTER) */ 16422 16423 #define BIT_SHIFT_MACID2_H_V1_8821C 0 16424 #define BIT_MASK_MACID2_H_V1_8821C 0xffff 16425 #define BIT_MACID2_H_V1_8821C(x) \ 16426 (((x) & BIT_MASK_MACID2_H_V1_8821C) << BIT_SHIFT_MACID2_H_V1_8821C) 16427 #define BITS_MACID2_H_V1_8821C \ 16428 (BIT_MASK_MACID2_H_V1_8821C << BIT_SHIFT_MACID2_H_V1_8821C) 16429 #define BIT_CLEAR_MACID2_H_V1_8821C(x) ((x) & (~BITS_MACID2_H_V1_8821C)) 16430 #define BIT_GET_MACID2_H_V1_8821C(x) \ 16431 (((x) >> BIT_SHIFT_MACID2_H_V1_8821C) & BIT_MASK_MACID2_H_V1_8821C) 16432 #define BIT_SET_MACID2_H_V1_8821C(x, v) \ 16433 (BIT_CLEAR_MACID2_H_V1_8821C(x) | BIT_MACID2_H_V1_8821C(v)) 16434 16435 /* 2 REG_BSSID2_8821C (BSSID2 REGISTER) */ 16436 16437 #define BIT_SHIFT_BSSID2_V1_8821C 0 16438 #define BIT_MASK_BSSID2_V1_8821C 0xffffffffL 16439 #define BIT_BSSID2_V1_8821C(x) \ 16440 (((x) & BIT_MASK_BSSID2_V1_8821C) << BIT_SHIFT_BSSID2_V1_8821C) 16441 #define BITS_BSSID2_V1_8821C \ 16442 (BIT_MASK_BSSID2_V1_8821C << BIT_SHIFT_BSSID2_V1_8821C) 16443 #define BIT_CLEAR_BSSID2_V1_8821C(x) ((x) & (~BITS_BSSID2_V1_8821C)) 16444 #define BIT_GET_BSSID2_V1_8821C(x) \ 16445 (((x) >> BIT_SHIFT_BSSID2_V1_8821C) & BIT_MASK_BSSID2_V1_8821C) 16446 #define BIT_SET_BSSID2_V1_8821C(x, v) \ 16447 (BIT_CLEAR_BSSID2_V1_8821C(x) | BIT_BSSID2_V1_8821C(v)) 16448 16449 /* 2 REG_BSSID2_H_8821C (BSSID2 REGISTER) */ 16450 16451 #define BIT_SHIFT_BSSID2_H_V1_8821C 0 16452 #define BIT_MASK_BSSID2_H_V1_8821C 0xffff 16453 #define BIT_BSSID2_H_V1_8821C(x) \ 16454 (((x) & BIT_MASK_BSSID2_H_V1_8821C) << BIT_SHIFT_BSSID2_H_V1_8821C) 16455 #define BITS_BSSID2_H_V1_8821C \ 16456 (BIT_MASK_BSSID2_H_V1_8821C << BIT_SHIFT_BSSID2_H_V1_8821C) 16457 #define BIT_CLEAR_BSSID2_H_V1_8821C(x) ((x) & (~BITS_BSSID2_H_V1_8821C)) 16458 #define BIT_GET_BSSID2_H_V1_8821C(x) \ 16459 (((x) >> BIT_SHIFT_BSSID2_H_V1_8821C) & BIT_MASK_BSSID2_H_V1_8821C) 16460 #define BIT_SET_BSSID2_H_V1_8821C(x, v) \ 16461 (BIT_CLEAR_BSSID2_H_V1_8821C(x) | BIT_BSSID2_H_V1_8821C(v)) 16462 16463 /* 2 REG_MACID3_8821C (MAC ID3 REGISTER) */ 16464 16465 #define BIT_SHIFT_MACID3_V1_8821C 0 16466 #define BIT_MASK_MACID3_V1_8821C 0xffffffffL 16467 #define BIT_MACID3_V1_8821C(x) \ 16468 (((x) & BIT_MASK_MACID3_V1_8821C) << BIT_SHIFT_MACID3_V1_8821C) 16469 #define BITS_MACID3_V1_8821C \ 16470 (BIT_MASK_MACID3_V1_8821C << BIT_SHIFT_MACID3_V1_8821C) 16471 #define BIT_CLEAR_MACID3_V1_8821C(x) ((x) & (~BITS_MACID3_V1_8821C)) 16472 #define BIT_GET_MACID3_V1_8821C(x) \ 16473 (((x) >> BIT_SHIFT_MACID3_V1_8821C) & BIT_MASK_MACID3_V1_8821C) 16474 #define BIT_SET_MACID3_V1_8821C(x, v) \ 16475 (BIT_CLEAR_MACID3_V1_8821C(x) | BIT_MACID3_V1_8821C(v)) 16476 16477 /* 2 REG_MACID3_H_8821C (MAC ID3 REGISTER) */ 16478 16479 #define BIT_SHIFT_MACID3_H_V1_8821C 0 16480 #define BIT_MASK_MACID3_H_V1_8821C 0xffff 16481 #define BIT_MACID3_H_V1_8821C(x) \ 16482 (((x) & BIT_MASK_MACID3_H_V1_8821C) << BIT_SHIFT_MACID3_H_V1_8821C) 16483 #define BITS_MACID3_H_V1_8821C \ 16484 (BIT_MASK_MACID3_H_V1_8821C << BIT_SHIFT_MACID3_H_V1_8821C) 16485 #define BIT_CLEAR_MACID3_H_V1_8821C(x) ((x) & (~BITS_MACID3_H_V1_8821C)) 16486 #define BIT_GET_MACID3_H_V1_8821C(x) \ 16487 (((x) >> BIT_SHIFT_MACID3_H_V1_8821C) & BIT_MASK_MACID3_H_V1_8821C) 16488 #define BIT_SET_MACID3_H_V1_8821C(x, v) \ 16489 (BIT_CLEAR_MACID3_H_V1_8821C(x) | BIT_MACID3_H_V1_8821C(v)) 16490 16491 /* 2 REG_BSSID3_8821C (BSSID3 REGISTER) */ 16492 16493 #define BIT_SHIFT_BSSID3_V1_8821C 0 16494 #define BIT_MASK_BSSID3_V1_8821C 0xffffffffL 16495 #define BIT_BSSID3_V1_8821C(x) \ 16496 (((x) & BIT_MASK_BSSID3_V1_8821C) << BIT_SHIFT_BSSID3_V1_8821C) 16497 #define BITS_BSSID3_V1_8821C \ 16498 (BIT_MASK_BSSID3_V1_8821C << BIT_SHIFT_BSSID3_V1_8821C) 16499 #define BIT_CLEAR_BSSID3_V1_8821C(x) ((x) & (~BITS_BSSID3_V1_8821C)) 16500 #define BIT_GET_BSSID3_V1_8821C(x) \ 16501 (((x) >> BIT_SHIFT_BSSID3_V1_8821C) & BIT_MASK_BSSID3_V1_8821C) 16502 #define BIT_SET_BSSID3_V1_8821C(x, v) \ 16503 (BIT_CLEAR_BSSID3_V1_8821C(x) | BIT_BSSID3_V1_8821C(v)) 16504 16505 /* 2 REG_BSSID3_H_8821C (BSSID3 REGISTER) */ 16506 16507 #define BIT_SHIFT_BSSID3_H_V1_8821C 0 16508 #define BIT_MASK_BSSID3_H_V1_8821C 0xffff 16509 #define BIT_BSSID3_H_V1_8821C(x) \ 16510 (((x) & BIT_MASK_BSSID3_H_V1_8821C) << BIT_SHIFT_BSSID3_H_V1_8821C) 16511 #define BITS_BSSID3_H_V1_8821C \ 16512 (BIT_MASK_BSSID3_H_V1_8821C << BIT_SHIFT_BSSID3_H_V1_8821C) 16513 #define BIT_CLEAR_BSSID3_H_V1_8821C(x) ((x) & (~BITS_BSSID3_H_V1_8821C)) 16514 #define BIT_GET_BSSID3_H_V1_8821C(x) \ 16515 (((x) >> BIT_SHIFT_BSSID3_H_V1_8821C) & BIT_MASK_BSSID3_H_V1_8821C) 16516 #define BIT_SET_BSSID3_H_V1_8821C(x, v) \ 16517 (BIT_CLEAR_BSSID3_H_V1_8821C(x) | BIT_BSSID3_H_V1_8821C(v)) 16518 16519 /* 2 REG_MACID4_8821C (MAC ID4 REGISTER) */ 16520 16521 #define BIT_SHIFT_MACID4_V1_8821C 0 16522 #define BIT_MASK_MACID4_V1_8821C 0xffffffffL 16523 #define BIT_MACID4_V1_8821C(x) \ 16524 (((x) & BIT_MASK_MACID4_V1_8821C) << BIT_SHIFT_MACID4_V1_8821C) 16525 #define BITS_MACID4_V1_8821C \ 16526 (BIT_MASK_MACID4_V1_8821C << BIT_SHIFT_MACID4_V1_8821C) 16527 #define BIT_CLEAR_MACID4_V1_8821C(x) ((x) & (~BITS_MACID4_V1_8821C)) 16528 #define BIT_GET_MACID4_V1_8821C(x) \ 16529 (((x) >> BIT_SHIFT_MACID4_V1_8821C) & BIT_MASK_MACID4_V1_8821C) 16530 #define BIT_SET_MACID4_V1_8821C(x, v) \ 16531 (BIT_CLEAR_MACID4_V1_8821C(x) | BIT_MACID4_V1_8821C(v)) 16532 16533 /* 2 REG_MACID4_H_8821C (MAC ID4 REGISTER) */ 16534 16535 #define BIT_SHIFT_MACID4_H_V1_8821C 0 16536 #define BIT_MASK_MACID4_H_V1_8821C 0xffff 16537 #define BIT_MACID4_H_V1_8821C(x) \ 16538 (((x) & BIT_MASK_MACID4_H_V1_8821C) << BIT_SHIFT_MACID4_H_V1_8821C) 16539 #define BITS_MACID4_H_V1_8821C \ 16540 (BIT_MASK_MACID4_H_V1_8821C << BIT_SHIFT_MACID4_H_V1_8821C) 16541 #define BIT_CLEAR_MACID4_H_V1_8821C(x) ((x) & (~BITS_MACID4_H_V1_8821C)) 16542 #define BIT_GET_MACID4_H_V1_8821C(x) \ 16543 (((x) >> BIT_SHIFT_MACID4_H_V1_8821C) & BIT_MASK_MACID4_H_V1_8821C) 16544 #define BIT_SET_MACID4_H_V1_8821C(x, v) \ 16545 (BIT_CLEAR_MACID4_H_V1_8821C(x) | BIT_MACID4_H_V1_8821C(v)) 16546 16547 /* 2 REG_BSSID4_8821C (BSSID4 REGISTER) */ 16548 16549 #define BIT_SHIFT_BSSID4_V1_8821C 0 16550 #define BIT_MASK_BSSID4_V1_8821C 0xffffffffL 16551 #define BIT_BSSID4_V1_8821C(x) \ 16552 (((x) & BIT_MASK_BSSID4_V1_8821C) << BIT_SHIFT_BSSID4_V1_8821C) 16553 #define BITS_BSSID4_V1_8821C \ 16554 (BIT_MASK_BSSID4_V1_8821C << BIT_SHIFT_BSSID4_V1_8821C) 16555 #define BIT_CLEAR_BSSID4_V1_8821C(x) ((x) & (~BITS_BSSID4_V1_8821C)) 16556 #define BIT_GET_BSSID4_V1_8821C(x) \ 16557 (((x) >> BIT_SHIFT_BSSID4_V1_8821C) & BIT_MASK_BSSID4_V1_8821C) 16558 #define BIT_SET_BSSID4_V1_8821C(x, v) \ 16559 (BIT_CLEAR_BSSID4_V1_8821C(x) | BIT_BSSID4_V1_8821C(v)) 16560 16561 /* 2 REG_BSSID4_H_8821C (BSSID4 REGISTER) */ 16562 16563 #define BIT_SHIFT_BSSID4_H_V1_8821C 0 16564 #define BIT_MASK_BSSID4_H_V1_8821C 0xffff 16565 #define BIT_BSSID4_H_V1_8821C(x) \ 16566 (((x) & BIT_MASK_BSSID4_H_V1_8821C) << BIT_SHIFT_BSSID4_H_V1_8821C) 16567 #define BITS_BSSID4_H_V1_8821C \ 16568 (BIT_MASK_BSSID4_H_V1_8821C << BIT_SHIFT_BSSID4_H_V1_8821C) 16569 #define BIT_CLEAR_BSSID4_H_V1_8821C(x) ((x) & (~BITS_BSSID4_H_V1_8821C)) 16570 #define BIT_GET_BSSID4_H_V1_8821C(x) \ 16571 (((x) >> BIT_SHIFT_BSSID4_H_V1_8821C) & BIT_MASK_BSSID4_H_V1_8821C) 16572 #define BIT_SET_BSSID4_H_V1_8821C(x, v) \ 16573 (BIT_CLEAR_BSSID4_H_V1_8821C(x) | BIT_BSSID4_H_V1_8821C(v)) 16574 16575 /* 2 REG_NOA_REPORT_8821C */ 16576 16577 /* 2 REG_NOA_REPORT_1_8821C */ 16578 16579 /* 2 REG_NOA_REPORT_2_8821C */ 16580 16581 /* 2 REG_NOA_REPORT_3_8821C */ 16582 16583 /* 2 REG_PWRBIT_SETTING_8821C */ 16584 #define BIT_CLI3_PWRBIT_OW_EN_8821C BIT(7) 16585 #define BIT_CLI3_PWR_ST_8821C BIT(6) 16586 #define BIT_CLI2_PWRBIT_OW_EN_8821C BIT(5) 16587 #define BIT_CLI2_PWR_ST_8821C BIT(4) 16588 #define BIT_CLI1_PWRBIT_OW_EN_8821C BIT(3) 16589 #define BIT_CLI1_PWR_ST_8821C BIT(2) 16590 #define BIT_CLI0_PWRBIT_OW_EN_8821C BIT(1) 16591 #define BIT_CLI0_PWR_ST_8821C BIT(0) 16592 16593 /* 2 REG_RSVD_8821C */ 16594 16595 /* 2 REG_RSVD_8821C */ 16596 16597 /* 2 REG_RSVD_8821C */ 16598 16599 /* 2 REG_RSVD_8821C */ 16600 16601 /* 2 REG_RSVD_8821C */ 16602 16603 /* 2 REG_RSVD_8821C */ 16604 16605 /* 2 REG_MU_BF_OPTION_8821C */ 16606 #define BIT_WMAC_RESP_NONSTA1_DIS_8821C BIT(7) 16607 #define BIT_WMAC_TXMU_ACKPOLICY_EN_8821C BIT(6) 16608 16609 #define BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8821C 4 16610 #define BIT_MASK_WMAC_TXMU_ACKPOLICY_8821C 0x3 16611 #define BIT_WMAC_TXMU_ACKPOLICY_8821C(x) \ 16612 (((x) & BIT_MASK_WMAC_TXMU_ACKPOLICY_8821C) \ 16613 << BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8821C) 16614 #define BITS_WMAC_TXMU_ACKPOLICY_8821C \ 16615 (BIT_MASK_WMAC_TXMU_ACKPOLICY_8821C \ 16616 << BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8821C) 16617 #define BIT_CLEAR_WMAC_TXMU_ACKPOLICY_8821C(x) \ 16618 ((x) & (~BITS_WMAC_TXMU_ACKPOLICY_8821C)) 16619 #define BIT_GET_WMAC_TXMU_ACKPOLICY_8821C(x) \ 16620 (((x) >> BIT_SHIFT_WMAC_TXMU_ACKPOLICY_8821C) & \ 16621 BIT_MASK_WMAC_TXMU_ACKPOLICY_8821C) 16622 #define BIT_SET_WMAC_TXMU_ACKPOLICY_8821C(x, v) \ 16623 (BIT_CLEAR_WMAC_TXMU_ACKPOLICY_8821C(x) | \ 16624 BIT_WMAC_TXMU_ACKPOLICY_8821C(v)) 16625 16626 #define BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8821C 1 16627 #define BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8821C 0x7 16628 #define BIT_WMAC_MU_BFEE_PORT_SEL_8821C(x) \ 16629 (((x) & BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8821C) \ 16630 << BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8821C) 16631 #define BITS_WMAC_MU_BFEE_PORT_SEL_8821C \ 16632 (BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8821C \ 16633 << BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8821C) 16634 #define BIT_CLEAR_WMAC_MU_BFEE_PORT_SEL_8821C(x) \ 16635 ((x) & (~BITS_WMAC_MU_BFEE_PORT_SEL_8821C)) 16636 #define BIT_GET_WMAC_MU_BFEE_PORT_SEL_8821C(x) \ 16637 (((x) >> BIT_SHIFT_WMAC_MU_BFEE_PORT_SEL_8821C) & \ 16638 BIT_MASK_WMAC_MU_BFEE_PORT_SEL_8821C) 16639 #define BIT_SET_WMAC_MU_BFEE_PORT_SEL_8821C(x, v) \ 16640 (BIT_CLEAR_WMAC_MU_BFEE_PORT_SEL_8821C(x) | \ 16641 BIT_WMAC_MU_BFEE_PORT_SEL_8821C(v)) 16642 16643 #define BIT_WMAC_MU_BFEE_DIS_8821C BIT(0) 16644 16645 /* 2 REG_WMAC_PAUSE_BB_CLR_TH_8821C */ 16646 16647 #define BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8821C 0 16648 #define BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8821C 0xff 16649 #define BIT_WMAC_PAUSE_BB_CLR_TH_8821C(x) \ 16650 (((x) & BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8821C) \ 16651 << BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8821C) 16652 #define BITS_WMAC_PAUSE_BB_CLR_TH_8821C \ 16653 (BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8821C \ 16654 << BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8821C) 16655 #define BIT_CLEAR_WMAC_PAUSE_BB_CLR_TH_8821C(x) \ 16656 ((x) & (~BITS_WMAC_PAUSE_BB_CLR_TH_8821C)) 16657 #define BIT_GET_WMAC_PAUSE_BB_CLR_TH_8821C(x) \ 16658 (((x) >> BIT_SHIFT_WMAC_PAUSE_BB_CLR_TH_8821C) & \ 16659 BIT_MASK_WMAC_PAUSE_BB_CLR_TH_8821C) 16660 #define BIT_SET_WMAC_PAUSE_BB_CLR_TH_8821C(x, v) \ 16661 (BIT_CLEAR_WMAC_PAUSE_BB_CLR_TH_8821C(x) | \ 16662 BIT_WMAC_PAUSE_BB_CLR_TH_8821C(v)) 16663 16664 /* 2 REG_WMAC_MU_ARB_8821C */ 16665 #define BIT_WMAC_ARB_HW_ADAPT_EN_8821C BIT(7) 16666 #define BIT_WMAC_ARB_SW_EN_8821C BIT(6) 16667 16668 #define BIT_SHIFT_WMAC_ARB_SW_STATE_8821C 0 16669 #define BIT_MASK_WMAC_ARB_SW_STATE_8821C 0x3f 16670 #define BIT_WMAC_ARB_SW_STATE_8821C(x) \ 16671 (((x) & BIT_MASK_WMAC_ARB_SW_STATE_8821C) \ 16672 << BIT_SHIFT_WMAC_ARB_SW_STATE_8821C) 16673 #define BITS_WMAC_ARB_SW_STATE_8821C \ 16674 (BIT_MASK_WMAC_ARB_SW_STATE_8821C << BIT_SHIFT_WMAC_ARB_SW_STATE_8821C) 16675 #define BIT_CLEAR_WMAC_ARB_SW_STATE_8821C(x) \ 16676 ((x) & (~BITS_WMAC_ARB_SW_STATE_8821C)) 16677 #define BIT_GET_WMAC_ARB_SW_STATE_8821C(x) \ 16678 (((x) >> BIT_SHIFT_WMAC_ARB_SW_STATE_8821C) & \ 16679 BIT_MASK_WMAC_ARB_SW_STATE_8821C) 16680 #define BIT_SET_WMAC_ARB_SW_STATE_8821C(x, v) \ 16681 (BIT_CLEAR_WMAC_ARB_SW_STATE_8821C(x) | BIT_WMAC_ARB_SW_STATE_8821C(v)) 16682 16683 /* 2 REG_WMAC_MU_OPTION_8821C */ 16684 16685 #define BIT_SHIFT_WMAC_MU_DBGSEL_8821C 5 16686 #define BIT_MASK_WMAC_MU_DBGSEL_8821C 0x3 16687 #define BIT_WMAC_MU_DBGSEL_8821C(x) \ 16688 (((x) & BIT_MASK_WMAC_MU_DBGSEL_8821C) \ 16689 << BIT_SHIFT_WMAC_MU_DBGSEL_8821C) 16690 #define BITS_WMAC_MU_DBGSEL_8821C \ 16691 (BIT_MASK_WMAC_MU_DBGSEL_8821C << BIT_SHIFT_WMAC_MU_DBGSEL_8821C) 16692 #define BIT_CLEAR_WMAC_MU_DBGSEL_8821C(x) ((x) & (~BITS_WMAC_MU_DBGSEL_8821C)) 16693 #define BIT_GET_WMAC_MU_DBGSEL_8821C(x) \ 16694 (((x) >> BIT_SHIFT_WMAC_MU_DBGSEL_8821C) & \ 16695 BIT_MASK_WMAC_MU_DBGSEL_8821C) 16696 #define BIT_SET_WMAC_MU_DBGSEL_8821C(x, v) \ 16697 (BIT_CLEAR_WMAC_MU_DBGSEL_8821C(x) | BIT_WMAC_MU_DBGSEL_8821C(v)) 16698 16699 #define BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8821C 0 16700 #define BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8821C 0x1f 16701 #define BIT_WMAC_MU_CPRD_TIMEOUT_8821C(x) \ 16702 (((x) & BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8821C) \ 16703 << BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8821C) 16704 #define BITS_WMAC_MU_CPRD_TIMEOUT_8821C \ 16705 (BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8821C \ 16706 << BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8821C) 16707 #define BIT_CLEAR_WMAC_MU_CPRD_TIMEOUT_8821C(x) \ 16708 ((x) & (~BITS_WMAC_MU_CPRD_TIMEOUT_8821C)) 16709 #define BIT_GET_WMAC_MU_CPRD_TIMEOUT_8821C(x) \ 16710 (((x) >> BIT_SHIFT_WMAC_MU_CPRD_TIMEOUT_8821C) & \ 16711 BIT_MASK_WMAC_MU_CPRD_TIMEOUT_8821C) 16712 #define BIT_SET_WMAC_MU_CPRD_TIMEOUT_8821C(x, v) \ 16713 (BIT_CLEAR_WMAC_MU_CPRD_TIMEOUT_8821C(x) | \ 16714 BIT_WMAC_MU_CPRD_TIMEOUT_8821C(v)) 16715 16716 /* 2 REG_WMAC_MU_BF_CTL_8821C */ 16717 #define BIT_WMAC_INVLD_BFPRT_CHK_8821C BIT(15) 16718 #define BIT_WMAC_RETXBFRPTSEQ_UPD_8821C BIT(14) 16719 16720 #define BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8821C 12 16721 #define BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8821C 0x3 16722 #define BIT_WMAC_MU_BFRPTSEG_SEL_8821C(x) \ 16723 (((x) & BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8821C) \ 16724 << BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8821C) 16725 #define BITS_WMAC_MU_BFRPTSEG_SEL_8821C \ 16726 (BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8821C \ 16727 << BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8821C) 16728 #define BIT_CLEAR_WMAC_MU_BFRPTSEG_SEL_8821C(x) \ 16729 ((x) & (~BITS_WMAC_MU_BFRPTSEG_SEL_8821C)) 16730 #define BIT_GET_WMAC_MU_BFRPTSEG_SEL_8821C(x) \ 16731 (((x) >> BIT_SHIFT_WMAC_MU_BFRPTSEG_SEL_8821C) & \ 16732 BIT_MASK_WMAC_MU_BFRPTSEG_SEL_8821C) 16733 #define BIT_SET_WMAC_MU_BFRPTSEG_SEL_8821C(x, v) \ 16734 (BIT_CLEAR_WMAC_MU_BFRPTSEG_SEL_8821C(x) | \ 16735 BIT_WMAC_MU_BFRPTSEG_SEL_8821C(v)) 16736 16737 #define BIT_SHIFT_WMAC_MU_BF_MYAID_8821C 0 16738 #define BIT_MASK_WMAC_MU_BF_MYAID_8821C 0xfff 16739 #define BIT_WMAC_MU_BF_MYAID_8821C(x) \ 16740 (((x) & BIT_MASK_WMAC_MU_BF_MYAID_8821C) \ 16741 << BIT_SHIFT_WMAC_MU_BF_MYAID_8821C) 16742 #define BITS_WMAC_MU_BF_MYAID_8821C \ 16743 (BIT_MASK_WMAC_MU_BF_MYAID_8821C << BIT_SHIFT_WMAC_MU_BF_MYAID_8821C) 16744 #define BIT_CLEAR_WMAC_MU_BF_MYAID_8821C(x) \ 16745 ((x) & (~BITS_WMAC_MU_BF_MYAID_8821C)) 16746 #define BIT_GET_WMAC_MU_BF_MYAID_8821C(x) \ 16747 (((x) >> BIT_SHIFT_WMAC_MU_BF_MYAID_8821C) & \ 16748 BIT_MASK_WMAC_MU_BF_MYAID_8821C) 16749 #define BIT_SET_WMAC_MU_BF_MYAID_8821C(x, v) \ 16750 (BIT_CLEAR_WMAC_MU_BF_MYAID_8821C(x) | BIT_WMAC_MU_BF_MYAID_8821C(v)) 16751 16752 /* 2 REG_WMAC_MU_BFRPT_PARA_8821C */ 16753 16754 #define BIT_SHIFT_BFRPT_PARA_USERID_SEL_8821C 12 16755 #define BIT_MASK_BFRPT_PARA_USERID_SEL_8821C 0x7 16756 #define BIT_BFRPT_PARA_USERID_SEL_8821C(x) \ 16757 (((x) & BIT_MASK_BFRPT_PARA_USERID_SEL_8821C) \ 16758 << BIT_SHIFT_BFRPT_PARA_USERID_SEL_8821C) 16759 #define BITS_BFRPT_PARA_USERID_SEL_8821C \ 16760 (BIT_MASK_BFRPT_PARA_USERID_SEL_8821C \ 16761 << BIT_SHIFT_BFRPT_PARA_USERID_SEL_8821C) 16762 #define BIT_CLEAR_BFRPT_PARA_USERID_SEL_8821C(x) \ 16763 ((x) & (~BITS_BFRPT_PARA_USERID_SEL_8821C)) 16764 #define BIT_GET_BFRPT_PARA_USERID_SEL_8821C(x) \ 16765 (((x) >> BIT_SHIFT_BFRPT_PARA_USERID_SEL_8821C) & \ 16766 BIT_MASK_BFRPT_PARA_USERID_SEL_8821C) 16767 #define BIT_SET_BFRPT_PARA_USERID_SEL_8821C(x, v) \ 16768 (BIT_CLEAR_BFRPT_PARA_USERID_SEL_8821C(x) | \ 16769 BIT_BFRPT_PARA_USERID_SEL_8821C(v)) 16770 16771 #define BIT_SHIFT_BFRPT_PARA_8821C 0 16772 #define BIT_MASK_BFRPT_PARA_8821C 0xfff 16773 #define BIT_BFRPT_PARA_8821C(x) \ 16774 (((x) & BIT_MASK_BFRPT_PARA_8821C) << BIT_SHIFT_BFRPT_PARA_8821C) 16775 #define BITS_BFRPT_PARA_8821C \ 16776 (BIT_MASK_BFRPT_PARA_8821C << BIT_SHIFT_BFRPT_PARA_8821C) 16777 #define BIT_CLEAR_BFRPT_PARA_8821C(x) ((x) & (~BITS_BFRPT_PARA_8821C)) 16778 #define BIT_GET_BFRPT_PARA_8821C(x) \ 16779 (((x) >> BIT_SHIFT_BFRPT_PARA_8821C) & BIT_MASK_BFRPT_PARA_8821C) 16780 #define BIT_SET_BFRPT_PARA_8821C(x, v) \ 16781 (BIT_CLEAR_BFRPT_PARA_8821C(x) | BIT_BFRPT_PARA_8821C(v)) 16782 16783 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE2_8821C */ 16784 #define BIT_STATUS_BFEE2_8821C BIT(10) 16785 #define BIT_WMAC_MU_BFEE2_EN_8821C BIT(9) 16786 16787 #define BIT_SHIFT_WMAC_MU_BFEE2_AID_8821C 0 16788 #define BIT_MASK_WMAC_MU_BFEE2_AID_8821C 0x1ff 16789 #define BIT_WMAC_MU_BFEE2_AID_8821C(x) \ 16790 (((x) & BIT_MASK_WMAC_MU_BFEE2_AID_8821C) \ 16791 << BIT_SHIFT_WMAC_MU_BFEE2_AID_8821C) 16792 #define BITS_WMAC_MU_BFEE2_AID_8821C \ 16793 (BIT_MASK_WMAC_MU_BFEE2_AID_8821C << BIT_SHIFT_WMAC_MU_BFEE2_AID_8821C) 16794 #define BIT_CLEAR_WMAC_MU_BFEE2_AID_8821C(x) \ 16795 ((x) & (~BITS_WMAC_MU_BFEE2_AID_8821C)) 16796 #define BIT_GET_WMAC_MU_BFEE2_AID_8821C(x) \ 16797 (((x) >> BIT_SHIFT_WMAC_MU_BFEE2_AID_8821C) & \ 16798 BIT_MASK_WMAC_MU_BFEE2_AID_8821C) 16799 #define BIT_SET_WMAC_MU_BFEE2_AID_8821C(x, v) \ 16800 (BIT_CLEAR_WMAC_MU_BFEE2_AID_8821C(x) | BIT_WMAC_MU_BFEE2_AID_8821C(v)) 16801 16802 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE3_8821C */ 16803 #define BIT_STATUS_BFEE3_8821C BIT(10) 16804 #define BIT_WMAC_MU_BFEE3_EN_8821C BIT(9) 16805 16806 #define BIT_SHIFT_WMAC_MU_BFEE3_AID_8821C 0 16807 #define BIT_MASK_WMAC_MU_BFEE3_AID_8821C 0x1ff 16808 #define BIT_WMAC_MU_BFEE3_AID_8821C(x) \ 16809 (((x) & BIT_MASK_WMAC_MU_BFEE3_AID_8821C) \ 16810 << BIT_SHIFT_WMAC_MU_BFEE3_AID_8821C) 16811 #define BITS_WMAC_MU_BFEE3_AID_8821C \ 16812 (BIT_MASK_WMAC_MU_BFEE3_AID_8821C << BIT_SHIFT_WMAC_MU_BFEE3_AID_8821C) 16813 #define BIT_CLEAR_WMAC_MU_BFEE3_AID_8821C(x) \ 16814 ((x) & (~BITS_WMAC_MU_BFEE3_AID_8821C)) 16815 #define BIT_GET_WMAC_MU_BFEE3_AID_8821C(x) \ 16816 (((x) >> BIT_SHIFT_WMAC_MU_BFEE3_AID_8821C) & \ 16817 BIT_MASK_WMAC_MU_BFEE3_AID_8821C) 16818 #define BIT_SET_WMAC_MU_BFEE3_AID_8821C(x, v) \ 16819 (BIT_CLEAR_WMAC_MU_BFEE3_AID_8821C(x) | BIT_WMAC_MU_BFEE3_AID_8821C(v)) 16820 16821 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE4_8821C */ 16822 #define BIT_STATUS_BFEE4_8821C BIT(10) 16823 #define BIT_WMAC_MU_BFEE4_EN_8821C BIT(9) 16824 16825 #define BIT_SHIFT_WMAC_MU_BFEE4_AID_8821C 0 16826 #define BIT_MASK_WMAC_MU_BFEE4_AID_8821C 0x1ff 16827 #define BIT_WMAC_MU_BFEE4_AID_8821C(x) \ 16828 (((x) & BIT_MASK_WMAC_MU_BFEE4_AID_8821C) \ 16829 << BIT_SHIFT_WMAC_MU_BFEE4_AID_8821C) 16830 #define BITS_WMAC_MU_BFEE4_AID_8821C \ 16831 (BIT_MASK_WMAC_MU_BFEE4_AID_8821C << BIT_SHIFT_WMAC_MU_BFEE4_AID_8821C) 16832 #define BIT_CLEAR_WMAC_MU_BFEE4_AID_8821C(x) \ 16833 ((x) & (~BITS_WMAC_MU_BFEE4_AID_8821C)) 16834 #define BIT_GET_WMAC_MU_BFEE4_AID_8821C(x) \ 16835 (((x) >> BIT_SHIFT_WMAC_MU_BFEE4_AID_8821C) & \ 16836 BIT_MASK_WMAC_MU_BFEE4_AID_8821C) 16837 #define BIT_SET_WMAC_MU_BFEE4_AID_8821C(x, v) \ 16838 (BIT_CLEAR_WMAC_MU_BFEE4_AID_8821C(x) | BIT_WMAC_MU_BFEE4_AID_8821C(v)) 16839 16840 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE5_8821C */ 16841 #define BIT_BIT_STATUS_BFEE5_8821C BIT(10) 16842 #define BIT_WMAC_MU_BFEE5_EN_8821C BIT(9) 16843 16844 #define BIT_SHIFT_WMAC_MU_BFEE5_AID_8821C 0 16845 #define BIT_MASK_WMAC_MU_BFEE5_AID_8821C 0x1ff 16846 #define BIT_WMAC_MU_BFEE5_AID_8821C(x) \ 16847 (((x) & BIT_MASK_WMAC_MU_BFEE5_AID_8821C) \ 16848 << BIT_SHIFT_WMAC_MU_BFEE5_AID_8821C) 16849 #define BITS_WMAC_MU_BFEE5_AID_8821C \ 16850 (BIT_MASK_WMAC_MU_BFEE5_AID_8821C << BIT_SHIFT_WMAC_MU_BFEE5_AID_8821C) 16851 #define BIT_CLEAR_WMAC_MU_BFEE5_AID_8821C(x) \ 16852 ((x) & (~BITS_WMAC_MU_BFEE5_AID_8821C)) 16853 #define BIT_GET_WMAC_MU_BFEE5_AID_8821C(x) \ 16854 (((x) >> BIT_SHIFT_WMAC_MU_BFEE5_AID_8821C) & \ 16855 BIT_MASK_WMAC_MU_BFEE5_AID_8821C) 16856 #define BIT_SET_WMAC_MU_BFEE5_AID_8821C(x, v) \ 16857 (BIT_CLEAR_WMAC_MU_BFEE5_AID_8821C(x) | BIT_WMAC_MU_BFEE5_AID_8821C(v)) 16858 16859 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE6_8821C */ 16860 #define BIT_STATUS_BFEE6_8821C BIT(10) 16861 #define BIT_WMAC_MU_BFEE6_EN_8821C BIT(9) 16862 16863 #define BIT_SHIFT_WMAC_MU_BFEE6_AID_8821C 0 16864 #define BIT_MASK_WMAC_MU_BFEE6_AID_8821C 0x1ff 16865 #define BIT_WMAC_MU_BFEE6_AID_8821C(x) \ 16866 (((x) & BIT_MASK_WMAC_MU_BFEE6_AID_8821C) \ 16867 << BIT_SHIFT_WMAC_MU_BFEE6_AID_8821C) 16868 #define BITS_WMAC_MU_BFEE6_AID_8821C \ 16869 (BIT_MASK_WMAC_MU_BFEE6_AID_8821C << BIT_SHIFT_WMAC_MU_BFEE6_AID_8821C) 16870 #define BIT_CLEAR_WMAC_MU_BFEE6_AID_8821C(x) \ 16871 ((x) & (~BITS_WMAC_MU_BFEE6_AID_8821C)) 16872 #define BIT_GET_WMAC_MU_BFEE6_AID_8821C(x) \ 16873 (((x) >> BIT_SHIFT_WMAC_MU_BFEE6_AID_8821C) & \ 16874 BIT_MASK_WMAC_MU_BFEE6_AID_8821C) 16875 #define BIT_SET_WMAC_MU_BFEE6_AID_8821C(x, v) \ 16876 (BIT_CLEAR_WMAC_MU_BFEE6_AID_8821C(x) | BIT_WMAC_MU_BFEE6_AID_8821C(v)) 16877 16878 /* 2 REG_WMAC_ASSOCIATED_MU_BFMEE7_8821C */ 16879 #define BIT_STATUS_BFEE7_8821C BIT(10) 16880 #define BIT_WMAC_MU_BFEE7_EN_8821C BIT(9) 16881 16882 #define BIT_SHIFT_WMAC_MU_BFEE7_AID_8821C 0 16883 #define BIT_MASK_WMAC_MU_BFEE7_AID_8821C 0x1ff 16884 #define BIT_WMAC_MU_BFEE7_AID_8821C(x) \ 16885 (((x) & BIT_MASK_WMAC_MU_BFEE7_AID_8821C) \ 16886 << BIT_SHIFT_WMAC_MU_BFEE7_AID_8821C) 16887 #define BITS_WMAC_MU_BFEE7_AID_8821C \ 16888 (BIT_MASK_WMAC_MU_BFEE7_AID_8821C << BIT_SHIFT_WMAC_MU_BFEE7_AID_8821C) 16889 #define BIT_CLEAR_WMAC_MU_BFEE7_AID_8821C(x) \ 16890 ((x) & (~BITS_WMAC_MU_BFEE7_AID_8821C)) 16891 #define BIT_GET_WMAC_MU_BFEE7_AID_8821C(x) \ 16892 (((x) >> BIT_SHIFT_WMAC_MU_BFEE7_AID_8821C) & \ 16893 BIT_MASK_WMAC_MU_BFEE7_AID_8821C) 16894 #define BIT_SET_WMAC_MU_BFEE7_AID_8821C(x, v) \ 16895 (BIT_CLEAR_WMAC_MU_BFEE7_AID_8821C(x) | BIT_WMAC_MU_BFEE7_AID_8821C(v)) 16896 16897 /* 2 REG_WMAC_BB_STOP_RX_COUNTER_8821C */ 16898 #define BIT_RST_ALL_COUNTER_8821C BIT(31) 16899 16900 #define BIT_SHIFT_ABORT_RX_VBON_COUNTER_8821C 16 16901 #define BIT_MASK_ABORT_RX_VBON_COUNTER_8821C 0xff 16902 #define BIT_ABORT_RX_VBON_COUNTER_8821C(x) \ 16903 (((x) & BIT_MASK_ABORT_RX_VBON_COUNTER_8821C) \ 16904 << BIT_SHIFT_ABORT_RX_VBON_COUNTER_8821C) 16905 #define BITS_ABORT_RX_VBON_COUNTER_8821C \ 16906 (BIT_MASK_ABORT_RX_VBON_COUNTER_8821C \ 16907 << BIT_SHIFT_ABORT_RX_VBON_COUNTER_8821C) 16908 #define BIT_CLEAR_ABORT_RX_VBON_COUNTER_8821C(x) \ 16909 ((x) & (~BITS_ABORT_RX_VBON_COUNTER_8821C)) 16910 #define BIT_GET_ABORT_RX_VBON_COUNTER_8821C(x) \ 16911 (((x) >> BIT_SHIFT_ABORT_RX_VBON_COUNTER_8821C) & \ 16912 BIT_MASK_ABORT_RX_VBON_COUNTER_8821C) 16913 #define BIT_SET_ABORT_RX_VBON_COUNTER_8821C(x, v) \ 16914 (BIT_CLEAR_ABORT_RX_VBON_COUNTER_8821C(x) | \ 16915 BIT_ABORT_RX_VBON_COUNTER_8821C(v)) 16916 16917 #define BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8821C 8 16918 #define BIT_MASK_ABORT_RX_RDRDY_COUNTER_8821C 0xff 16919 #define BIT_ABORT_RX_RDRDY_COUNTER_8821C(x) \ 16920 (((x) & BIT_MASK_ABORT_RX_RDRDY_COUNTER_8821C) \ 16921 << BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8821C) 16922 #define BITS_ABORT_RX_RDRDY_COUNTER_8821C \ 16923 (BIT_MASK_ABORT_RX_RDRDY_COUNTER_8821C \ 16924 << BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8821C) 16925 #define BIT_CLEAR_ABORT_RX_RDRDY_COUNTER_8821C(x) \ 16926 ((x) & (~BITS_ABORT_RX_RDRDY_COUNTER_8821C)) 16927 #define BIT_GET_ABORT_RX_RDRDY_COUNTER_8821C(x) \ 16928 (((x) >> BIT_SHIFT_ABORT_RX_RDRDY_COUNTER_8821C) & \ 16929 BIT_MASK_ABORT_RX_RDRDY_COUNTER_8821C) 16930 #define BIT_SET_ABORT_RX_RDRDY_COUNTER_8821C(x, v) \ 16931 (BIT_CLEAR_ABORT_RX_RDRDY_COUNTER_8821C(x) | \ 16932 BIT_ABORT_RX_RDRDY_COUNTER_8821C(v)) 16933 16934 #define BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8821C 0 16935 #define BIT_MASK_VBON_EARLY_FALLING_COUNTER_8821C 0xff 16936 #define BIT_VBON_EARLY_FALLING_COUNTER_8821C(x) \ 16937 (((x) & BIT_MASK_VBON_EARLY_FALLING_COUNTER_8821C) \ 16938 << BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8821C) 16939 #define BITS_VBON_EARLY_FALLING_COUNTER_8821C \ 16940 (BIT_MASK_VBON_EARLY_FALLING_COUNTER_8821C \ 16941 << BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8821C) 16942 #define BIT_CLEAR_VBON_EARLY_FALLING_COUNTER_8821C(x) \ 16943 ((x) & (~BITS_VBON_EARLY_FALLING_COUNTER_8821C)) 16944 #define BIT_GET_VBON_EARLY_FALLING_COUNTER_8821C(x) \ 16945 (((x) >> BIT_SHIFT_VBON_EARLY_FALLING_COUNTER_8821C) & \ 16946 BIT_MASK_VBON_EARLY_FALLING_COUNTER_8821C) 16947 #define BIT_SET_VBON_EARLY_FALLING_COUNTER_8821C(x, v) \ 16948 (BIT_CLEAR_VBON_EARLY_FALLING_COUNTER_8821C(x) | \ 16949 BIT_VBON_EARLY_FALLING_COUNTER_8821C(v)) 16950 16951 /* 2 REG_WMAC_PLCP_MONITOR_8821C */ 16952 #define BIT_WMAC_PLCP_TRX_SEL_8821C BIT(31) 16953 16954 #define BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8821C 28 16955 #define BIT_MASK_WMAC_PLCP_RDSIG_SEL_8821C 0x7 16956 #define BIT_WMAC_PLCP_RDSIG_SEL_8821C(x) \ 16957 (((x) & BIT_MASK_WMAC_PLCP_RDSIG_SEL_8821C) \ 16958 << BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8821C) 16959 #define BITS_WMAC_PLCP_RDSIG_SEL_8821C \ 16960 (BIT_MASK_WMAC_PLCP_RDSIG_SEL_8821C \ 16961 << BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8821C) 16962 #define BIT_CLEAR_WMAC_PLCP_RDSIG_SEL_8821C(x) \ 16963 ((x) & (~BITS_WMAC_PLCP_RDSIG_SEL_8821C)) 16964 #define BIT_GET_WMAC_PLCP_RDSIG_SEL_8821C(x) \ 16965 (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_SEL_8821C) & \ 16966 BIT_MASK_WMAC_PLCP_RDSIG_SEL_8821C) 16967 #define BIT_SET_WMAC_PLCP_RDSIG_SEL_8821C(x, v) \ 16968 (BIT_CLEAR_WMAC_PLCP_RDSIG_SEL_8821C(x) | \ 16969 BIT_WMAC_PLCP_RDSIG_SEL_8821C(v)) 16970 16971 #define BIT_SHIFT_WMAC_RATE_IDX_8821C 24 16972 #define BIT_MASK_WMAC_RATE_IDX_8821C 0xf 16973 #define BIT_WMAC_RATE_IDX_8821C(x) \ 16974 (((x) & BIT_MASK_WMAC_RATE_IDX_8821C) << BIT_SHIFT_WMAC_RATE_IDX_8821C) 16975 #define BITS_WMAC_RATE_IDX_8821C \ 16976 (BIT_MASK_WMAC_RATE_IDX_8821C << BIT_SHIFT_WMAC_RATE_IDX_8821C) 16977 #define BIT_CLEAR_WMAC_RATE_IDX_8821C(x) ((x) & (~BITS_WMAC_RATE_IDX_8821C)) 16978 #define BIT_GET_WMAC_RATE_IDX_8821C(x) \ 16979 (((x) >> BIT_SHIFT_WMAC_RATE_IDX_8821C) & BIT_MASK_WMAC_RATE_IDX_8821C) 16980 #define BIT_SET_WMAC_RATE_IDX_8821C(x, v) \ 16981 (BIT_CLEAR_WMAC_RATE_IDX_8821C(x) | BIT_WMAC_RATE_IDX_8821C(v)) 16982 16983 #define BIT_SHIFT_WMAC_PLCP_RDSIG_8821C 0 16984 #define BIT_MASK_WMAC_PLCP_RDSIG_8821C 0xffffff 16985 #define BIT_WMAC_PLCP_RDSIG_8821C(x) \ 16986 (((x) & BIT_MASK_WMAC_PLCP_RDSIG_8821C) \ 16987 << BIT_SHIFT_WMAC_PLCP_RDSIG_8821C) 16988 #define BITS_WMAC_PLCP_RDSIG_8821C \ 16989 (BIT_MASK_WMAC_PLCP_RDSIG_8821C << BIT_SHIFT_WMAC_PLCP_RDSIG_8821C) 16990 #define BIT_CLEAR_WMAC_PLCP_RDSIG_8821C(x) ((x) & (~BITS_WMAC_PLCP_RDSIG_8821C)) 16991 #define BIT_GET_WMAC_PLCP_RDSIG_8821C(x) \ 16992 (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_8821C) & \ 16993 BIT_MASK_WMAC_PLCP_RDSIG_8821C) 16994 #define BIT_SET_WMAC_PLCP_RDSIG_8821C(x, v) \ 16995 (BIT_CLEAR_WMAC_PLCP_RDSIG_8821C(x) | BIT_WMAC_PLCP_RDSIG_8821C(v)) 16996 16997 /* 2 REG_WMAC_PLCP_MONITOR_MUTX_8821C */ 16998 #define BIT_WMAC_MUTX_IDX_8821C BIT(24) 16999 17000 #define BIT_SHIFT_WMAC_PLCP_RDSIG_8821C 0 17001 #define BIT_MASK_WMAC_PLCP_RDSIG_8821C 0xffffff 17002 #define BIT_WMAC_PLCP_RDSIG_8821C(x) \ 17003 (((x) & BIT_MASK_WMAC_PLCP_RDSIG_8821C) \ 17004 << BIT_SHIFT_WMAC_PLCP_RDSIG_8821C) 17005 #define BITS_WMAC_PLCP_RDSIG_8821C \ 17006 (BIT_MASK_WMAC_PLCP_RDSIG_8821C << BIT_SHIFT_WMAC_PLCP_RDSIG_8821C) 17007 #define BIT_CLEAR_WMAC_PLCP_RDSIG_8821C(x) ((x) & (~BITS_WMAC_PLCP_RDSIG_8821C)) 17008 #define BIT_GET_WMAC_PLCP_RDSIG_8821C(x) \ 17009 (((x) >> BIT_SHIFT_WMAC_PLCP_RDSIG_8821C) & \ 17010 BIT_MASK_WMAC_PLCP_RDSIG_8821C) 17011 #define BIT_SET_WMAC_PLCP_RDSIG_8821C(x, v) \ 17012 (BIT_CLEAR_WMAC_PLCP_RDSIG_8821C(x) | BIT_WMAC_PLCP_RDSIG_8821C(v)) 17013 17014 /* 2 REG_RSVD_8821C */ 17015 17016 /* 2 REG_TRANSMIT_ADDRSS_0_8821C (TA0 REGISTER) */ 17017 17018 #define BIT_SHIFT_TA0_V1_8821C 0 17019 #define BIT_MASK_TA0_V1_8821C 0xffffffffL 17020 #define BIT_TA0_V1_8821C(x) \ 17021 (((x) & BIT_MASK_TA0_V1_8821C) << BIT_SHIFT_TA0_V1_8821C) 17022 #define BITS_TA0_V1_8821C (BIT_MASK_TA0_V1_8821C << BIT_SHIFT_TA0_V1_8821C) 17023 #define BIT_CLEAR_TA0_V1_8821C(x) ((x) & (~BITS_TA0_V1_8821C)) 17024 #define BIT_GET_TA0_V1_8821C(x) \ 17025 (((x) >> BIT_SHIFT_TA0_V1_8821C) & BIT_MASK_TA0_V1_8821C) 17026 #define BIT_SET_TA0_V1_8821C(x, v) \ 17027 (BIT_CLEAR_TA0_V1_8821C(x) | BIT_TA0_V1_8821C(v)) 17028 17029 /* 2 REG_TRANSMIT_ADDRSS_0_H_8821C (TA0 REGISTER) */ 17030 17031 #define BIT_SHIFT_TA0_H_V1_8821C 0 17032 #define BIT_MASK_TA0_H_V1_8821C 0xffff 17033 #define BIT_TA0_H_V1_8821C(x) \ 17034 (((x) & BIT_MASK_TA0_H_V1_8821C) << BIT_SHIFT_TA0_H_V1_8821C) 17035 #define BITS_TA0_H_V1_8821C \ 17036 (BIT_MASK_TA0_H_V1_8821C << BIT_SHIFT_TA0_H_V1_8821C) 17037 #define BIT_CLEAR_TA0_H_V1_8821C(x) ((x) & (~BITS_TA0_H_V1_8821C)) 17038 #define BIT_GET_TA0_H_V1_8821C(x) \ 17039 (((x) >> BIT_SHIFT_TA0_H_V1_8821C) & BIT_MASK_TA0_H_V1_8821C) 17040 #define BIT_SET_TA0_H_V1_8821C(x, v) \ 17041 (BIT_CLEAR_TA0_H_V1_8821C(x) | BIT_TA0_H_V1_8821C(v)) 17042 17043 /* 2 REG_TRANSMIT_ADDRSS_1_8821C (TA1 REGISTER) */ 17044 17045 #define BIT_SHIFT_TA1_V1_8821C 0 17046 #define BIT_MASK_TA1_V1_8821C 0xffffffffL 17047 #define BIT_TA1_V1_8821C(x) \ 17048 (((x) & BIT_MASK_TA1_V1_8821C) << BIT_SHIFT_TA1_V1_8821C) 17049 #define BITS_TA1_V1_8821C (BIT_MASK_TA1_V1_8821C << BIT_SHIFT_TA1_V1_8821C) 17050 #define BIT_CLEAR_TA1_V1_8821C(x) ((x) & (~BITS_TA1_V1_8821C)) 17051 #define BIT_GET_TA1_V1_8821C(x) \ 17052 (((x) >> BIT_SHIFT_TA1_V1_8821C) & BIT_MASK_TA1_V1_8821C) 17053 #define BIT_SET_TA1_V1_8821C(x, v) \ 17054 (BIT_CLEAR_TA1_V1_8821C(x) | BIT_TA1_V1_8821C(v)) 17055 17056 /* 2 REG_TRANSMIT_ADDRSS_1_H_8821C (TA1 REGISTER) */ 17057 17058 #define BIT_SHIFT_TA1_H_V1_8821C 0 17059 #define BIT_MASK_TA1_H_V1_8821C 0xffff 17060 #define BIT_TA1_H_V1_8821C(x) \ 17061 (((x) & BIT_MASK_TA1_H_V1_8821C) << BIT_SHIFT_TA1_H_V1_8821C) 17062 #define BITS_TA1_H_V1_8821C \ 17063 (BIT_MASK_TA1_H_V1_8821C << BIT_SHIFT_TA1_H_V1_8821C) 17064 #define BIT_CLEAR_TA1_H_V1_8821C(x) ((x) & (~BITS_TA1_H_V1_8821C)) 17065 #define BIT_GET_TA1_H_V1_8821C(x) \ 17066 (((x) >> BIT_SHIFT_TA1_H_V1_8821C) & BIT_MASK_TA1_H_V1_8821C) 17067 #define BIT_SET_TA1_H_V1_8821C(x, v) \ 17068 (BIT_CLEAR_TA1_H_V1_8821C(x) | BIT_TA1_H_V1_8821C(v)) 17069 17070 /* 2 REG_TRANSMIT_ADDRSS_2_8821C (TA2 REGISTER) */ 17071 17072 #define BIT_SHIFT_TA2_V1_8821C 0 17073 #define BIT_MASK_TA2_V1_8821C 0xffffffffL 17074 #define BIT_TA2_V1_8821C(x) \ 17075 (((x) & BIT_MASK_TA2_V1_8821C) << BIT_SHIFT_TA2_V1_8821C) 17076 #define BITS_TA2_V1_8821C (BIT_MASK_TA2_V1_8821C << BIT_SHIFT_TA2_V1_8821C) 17077 #define BIT_CLEAR_TA2_V1_8821C(x) ((x) & (~BITS_TA2_V1_8821C)) 17078 #define BIT_GET_TA2_V1_8821C(x) \ 17079 (((x) >> BIT_SHIFT_TA2_V1_8821C) & BIT_MASK_TA2_V1_8821C) 17080 #define BIT_SET_TA2_V1_8821C(x, v) \ 17081 (BIT_CLEAR_TA2_V1_8821C(x) | BIT_TA2_V1_8821C(v)) 17082 17083 /* 2 REG_TRANSMIT_ADDRSS_2_H_8821C (TA2 REGISTER) */ 17084 17085 #define BIT_SHIFT_TA2_H_V1_8821C 0 17086 #define BIT_MASK_TA2_H_V1_8821C 0xffff 17087 #define BIT_TA2_H_V1_8821C(x) \ 17088 (((x) & BIT_MASK_TA2_H_V1_8821C) << BIT_SHIFT_TA2_H_V1_8821C) 17089 #define BITS_TA2_H_V1_8821C \ 17090 (BIT_MASK_TA2_H_V1_8821C << BIT_SHIFT_TA2_H_V1_8821C) 17091 #define BIT_CLEAR_TA2_H_V1_8821C(x) ((x) & (~BITS_TA2_H_V1_8821C)) 17092 #define BIT_GET_TA2_H_V1_8821C(x) \ 17093 (((x) >> BIT_SHIFT_TA2_H_V1_8821C) & BIT_MASK_TA2_H_V1_8821C) 17094 #define BIT_SET_TA2_H_V1_8821C(x, v) \ 17095 (BIT_CLEAR_TA2_H_V1_8821C(x) | BIT_TA2_H_V1_8821C(v)) 17096 17097 /* 2 REG_TRANSMIT_ADDRSS_3_8821C (TA3 REGISTER) */ 17098 17099 #define BIT_SHIFT_TA2_V1_8821C 0 17100 #define BIT_MASK_TA2_V1_8821C 0xffffffffL 17101 #define BIT_TA2_V1_8821C(x) \ 17102 (((x) & BIT_MASK_TA2_V1_8821C) << BIT_SHIFT_TA2_V1_8821C) 17103 #define BITS_TA2_V1_8821C (BIT_MASK_TA2_V1_8821C << BIT_SHIFT_TA2_V1_8821C) 17104 #define BIT_CLEAR_TA2_V1_8821C(x) ((x) & (~BITS_TA2_V1_8821C)) 17105 #define BIT_GET_TA2_V1_8821C(x) \ 17106 (((x) >> BIT_SHIFT_TA2_V1_8821C) & BIT_MASK_TA2_V1_8821C) 17107 #define BIT_SET_TA2_V1_8821C(x, v) \ 17108 (BIT_CLEAR_TA2_V1_8821C(x) | BIT_TA2_V1_8821C(v)) 17109 17110 /* 2 REG_TRANSMIT_ADDRSS_3_H_8821C (TA3 REGISTER) */ 17111 17112 #define BIT_SHIFT_TA3_H_V1_8821C 0 17113 #define BIT_MASK_TA3_H_V1_8821C 0xffff 17114 #define BIT_TA3_H_V1_8821C(x) \ 17115 (((x) & BIT_MASK_TA3_H_V1_8821C) << BIT_SHIFT_TA3_H_V1_8821C) 17116 #define BITS_TA3_H_V1_8821C \ 17117 (BIT_MASK_TA3_H_V1_8821C << BIT_SHIFT_TA3_H_V1_8821C) 17118 #define BIT_CLEAR_TA3_H_V1_8821C(x) ((x) & (~BITS_TA3_H_V1_8821C)) 17119 #define BIT_GET_TA3_H_V1_8821C(x) \ 17120 (((x) >> BIT_SHIFT_TA3_H_V1_8821C) & BIT_MASK_TA3_H_V1_8821C) 17121 #define BIT_SET_TA3_H_V1_8821C(x, v) \ 17122 (BIT_CLEAR_TA3_H_V1_8821C(x) | BIT_TA3_H_V1_8821C(v)) 17123 17124 /* 2 REG_TRANSMIT_ADDRSS_4_8821C (TA4 REGISTER) */ 17125 17126 #define BIT_SHIFT_TA4_V1_8821C 0 17127 #define BIT_MASK_TA4_V1_8821C 0xffffffffL 17128 #define BIT_TA4_V1_8821C(x) \ 17129 (((x) & BIT_MASK_TA4_V1_8821C) << BIT_SHIFT_TA4_V1_8821C) 17130 #define BITS_TA4_V1_8821C (BIT_MASK_TA4_V1_8821C << BIT_SHIFT_TA4_V1_8821C) 17131 #define BIT_CLEAR_TA4_V1_8821C(x) ((x) & (~BITS_TA4_V1_8821C)) 17132 #define BIT_GET_TA4_V1_8821C(x) \ 17133 (((x) >> BIT_SHIFT_TA4_V1_8821C) & BIT_MASK_TA4_V1_8821C) 17134 #define BIT_SET_TA4_V1_8821C(x, v) \ 17135 (BIT_CLEAR_TA4_V1_8821C(x) | BIT_TA4_V1_8821C(v)) 17136 17137 /* 2 REG_TRANSMIT_ADDRSS_4_H_8821C (TA4 REGISTER) */ 17138 17139 #define BIT_SHIFT_TA4_H_V1_8821C 0 17140 #define BIT_MASK_TA4_H_V1_8821C 0xffff 17141 #define BIT_TA4_H_V1_8821C(x) \ 17142 (((x) & BIT_MASK_TA4_H_V1_8821C) << BIT_SHIFT_TA4_H_V1_8821C) 17143 #define BITS_TA4_H_V1_8821C \ 17144 (BIT_MASK_TA4_H_V1_8821C << BIT_SHIFT_TA4_H_V1_8821C) 17145 #define BIT_CLEAR_TA4_H_V1_8821C(x) ((x) & (~BITS_TA4_H_V1_8821C)) 17146 #define BIT_GET_TA4_H_V1_8821C(x) \ 17147 (((x) >> BIT_SHIFT_TA4_H_V1_8821C) & BIT_MASK_TA4_H_V1_8821C) 17148 #define BIT_SET_TA4_H_V1_8821C(x, v) \ 17149 (BIT_CLEAR_TA4_H_V1_8821C(x) | BIT_TA4_H_V1_8821C(v)) 17150 17151 /* 2 REG_RSVD_8821C */ 17152 17153 /* 2 REG_RSVD_8821C */ 17154 17155 /* 2 REG_RSVD_8821C */ 17156 17157 /* 2 REG_RSVD_8821C */ 17158 17159 /* 2 REG_RSVD_8821C */ 17160 17161 /* 2 REG_RSVD_8821C */ 17162 17163 /* 2 REG_RSVD_8821C */ 17164 17165 /* 2 REG_RSVD_8821C */ 17166 17167 /* 2 REG_RSVD_8821C */ 17168 17169 /* 2 REG_RSVD_8821C */ 17170 17171 /* 2 REG_RSVD_8821C */ 17172 17173 /* 2 REG_RSVD_8821C */ 17174 17175 /* 2 REG_RSVD_8821C */ 17176 17177 /* 2 REG_RSVD_8821C */ 17178 17179 /* 2 REG_NOT_VALID_8821C */ 17180 17181 /* 2 REG_MACID1_8821C */ 17182 17183 #define BIT_SHIFT_MACID1_0_8821C 0 17184 #define BIT_MASK_MACID1_0_8821C 0xffffffffL 17185 #define BIT_MACID1_0_8821C(x) \ 17186 (((x) & BIT_MASK_MACID1_0_8821C) << BIT_SHIFT_MACID1_0_8821C) 17187 #define BITS_MACID1_0_8821C \ 17188 (BIT_MASK_MACID1_0_8821C << BIT_SHIFT_MACID1_0_8821C) 17189 #define BIT_CLEAR_MACID1_0_8821C(x) ((x) & (~BITS_MACID1_0_8821C)) 17190 #define BIT_GET_MACID1_0_8821C(x) \ 17191 (((x) >> BIT_SHIFT_MACID1_0_8821C) & BIT_MASK_MACID1_0_8821C) 17192 #define BIT_SET_MACID1_0_8821C(x, v) \ 17193 (BIT_CLEAR_MACID1_0_8821C(x) | BIT_MACID1_0_8821C(v)) 17194 17195 /* 2 REG_MACID1_1_8821C */ 17196 17197 #define BIT_SHIFT_MACID1_1_8821C 0 17198 #define BIT_MASK_MACID1_1_8821C 0xffff 17199 #define BIT_MACID1_1_8821C(x) \ 17200 (((x) & BIT_MASK_MACID1_1_8821C) << BIT_SHIFT_MACID1_1_8821C) 17201 #define BITS_MACID1_1_8821C \ 17202 (BIT_MASK_MACID1_1_8821C << BIT_SHIFT_MACID1_1_8821C) 17203 #define BIT_CLEAR_MACID1_1_8821C(x) ((x) & (~BITS_MACID1_1_8821C)) 17204 #define BIT_GET_MACID1_1_8821C(x) \ 17205 (((x) >> BIT_SHIFT_MACID1_1_8821C) & BIT_MASK_MACID1_1_8821C) 17206 #define BIT_SET_MACID1_1_8821C(x, v) \ 17207 (BIT_CLEAR_MACID1_1_8821C(x) | BIT_MACID1_1_8821C(v)) 17208 17209 /* 2 REG_BSSID1_8821C */ 17210 17211 #define BIT_SHIFT_BSSID1_0_8821C 0 17212 #define BIT_MASK_BSSID1_0_8821C 0xffffffffL 17213 #define BIT_BSSID1_0_8821C(x) \ 17214 (((x) & BIT_MASK_BSSID1_0_8821C) << BIT_SHIFT_BSSID1_0_8821C) 17215 #define BITS_BSSID1_0_8821C \ 17216 (BIT_MASK_BSSID1_0_8821C << BIT_SHIFT_BSSID1_0_8821C) 17217 #define BIT_CLEAR_BSSID1_0_8821C(x) ((x) & (~BITS_BSSID1_0_8821C)) 17218 #define BIT_GET_BSSID1_0_8821C(x) \ 17219 (((x) >> BIT_SHIFT_BSSID1_0_8821C) & BIT_MASK_BSSID1_0_8821C) 17220 #define BIT_SET_BSSID1_0_8821C(x, v) \ 17221 (BIT_CLEAR_BSSID1_0_8821C(x) | BIT_BSSID1_0_8821C(v)) 17222 17223 /* 2 REG_BSSID1_1_8821C */ 17224 17225 #define BIT_SHIFT_BSSID1_1_8821C 0 17226 #define BIT_MASK_BSSID1_1_8821C 0xffff 17227 #define BIT_BSSID1_1_8821C(x) \ 17228 (((x) & BIT_MASK_BSSID1_1_8821C) << BIT_SHIFT_BSSID1_1_8821C) 17229 #define BITS_BSSID1_1_8821C \ 17230 (BIT_MASK_BSSID1_1_8821C << BIT_SHIFT_BSSID1_1_8821C) 17231 #define BIT_CLEAR_BSSID1_1_8821C(x) ((x) & (~BITS_BSSID1_1_8821C)) 17232 #define BIT_GET_BSSID1_1_8821C(x) \ 17233 (((x) >> BIT_SHIFT_BSSID1_1_8821C) & BIT_MASK_BSSID1_1_8821C) 17234 #define BIT_SET_BSSID1_1_8821C(x, v) \ 17235 (BIT_CLEAR_BSSID1_1_8821C(x) | BIT_BSSID1_1_8821C(v)) 17236 17237 /* 2 REG_BCN_PSR_RPT1_8821C */ 17238 17239 #define BIT_SHIFT_DTIM_CNT1_8821C 24 17240 #define BIT_MASK_DTIM_CNT1_8821C 0xff 17241 #define BIT_DTIM_CNT1_8821C(x) \ 17242 (((x) & BIT_MASK_DTIM_CNT1_8821C) << BIT_SHIFT_DTIM_CNT1_8821C) 17243 #define BITS_DTIM_CNT1_8821C \ 17244 (BIT_MASK_DTIM_CNT1_8821C << BIT_SHIFT_DTIM_CNT1_8821C) 17245 #define BIT_CLEAR_DTIM_CNT1_8821C(x) ((x) & (~BITS_DTIM_CNT1_8821C)) 17246 #define BIT_GET_DTIM_CNT1_8821C(x) \ 17247 (((x) >> BIT_SHIFT_DTIM_CNT1_8821C) & BIT_MASK_DTIM_CNT1_8821C) 17248 #define BIT_SET_DTIM_CNT1_8821C(x, v) \ 17249 (BIT_CLEAR_DTIM_CNT1_8821C(x) | BIT_DTIM_CNT1_8821C(v)) 17250 17251 #define BIT_SHIFT_DTIM_PERIOD1_8821C 16 17252 #define BIT_MASK_DTIM_PERIOD1_8821C 0xff 17253 #define BIT_DTIM_PERIOD1_8821C(x) \ 17254 (((x) & BIT_MASK_DTIM_PERIOD1_8821C) << BIT_SHIFT_DTIM_PERIOD1_8821C) 17255 #define BITS_DTIM_PERIOD1_8821C \ 17256 (BIT_MASK_DTIM_PERIOD1_8821C << BIT_SHIFT_DTIM_PERIOD1_8821C) 17257 #define BIT_CLEAR_DTIM_PERIOD1_8821C(x) ((x) & (~BITS_DTIM_PERIOD1_8821C)) 17258 #define BIT_GET_DTIM_PERIOD1_8821C(x) \ 17259 (((x) >> BIT_SHIFT_DTIM_PERIOD1_8821C) & BIT_MASK_DTIM_PERIOD1_8821C) 17260 #define BIT_SET_DTIM_PERIOD1_8821C(x, v) \ 17261 (BIT_CLEAR_DTIM_PERIOD1_8821C(x) | BIT_DTIM_PERIOD1_8821C(v)) 17262 17263 #define BIT_DTIM1_8821C BIT(15) 17264 #define BIT_TIM1_8821C BIT(14) 17265 17266 #define BIT_SHIFT_PS_AID_1_8821C 0 17267 #define BIT_MASK_PS_AID_1_8821C 0x7ff 17268 #define BIT_PS_AID_1_8821C(x) \ 17269 (((x) & BIT_MASK_PS_AID_1_8821C) << BIT_SHIFT_PS_AID_1_8821C) 17270 #define BITS_PS_AID_1_8821C \ 17271 (BIT_MASK_PS_AID_1_8821C << BIT_SHIFT_PS_AID_1_8821C) 17272 #define BIT_CLEAR_PS_AID_1_8821C(x) ((x) & (~BITS_PS_AID_1_8821C)) 17273 #define BIT_GET_PS_AID_1_8821C(x) \ 17274 (((x) >> BIT_SHIFT_PS_AID_1_8821C) & BIT_MASK_PS_AID_1_8821C) 17275 #define BIT_SET_PS_AID_1_8821C(x, v) \ 17276 (BIT_CLEAR_PS_AID_1_8821C(x) | BIT_PS_AID_1_8821C(v)) 17277 17278 /* 2 REG_ASSOCIATED_BFMEE_SEL_8821C */ 17279 #define BIT_TXUSER_ID1_8821C BIT(25) 17280 17281 #define BIT_SHIFT_AID1_8821C 16 17282 #define BIT_MASK_AID1_8821C 0x1ff 17283 #define BIT_AID1_8821C(x) (((x) & BIT_MASK_AID1_8821C) << BIT_SHIFT_AID1_8821C) 17284 #define BITS_AID1_8821C (BIT_MASK_AID1_8821C << BIT_SHIFT_AID1_8821C) 17285 #define BIT_CLEAR_AID1_8821C(x) ((x) & (~BITS_AID1_8821C)) 17286 #define BIT_GET_AID1_8821C(x) \ 17287 (((x) >> BIT_SHIFT_AID1_8821C) & BIT_MASK_AID1_8821C) 17288 #define BIT_SET_AID1_8821C(x, v) (BIT_CLEAR_AID1_8821C(x) | BIT_AID1_8821C(v)) 17289 17290 #define BIT_TXUSER_ID0_8821C BIT(9) 17291 17292 #define BIT_SHIFT_AID0_8821C 0 17293 #define BIT_MASK_AID0_8821C 0x1ff 17294 #define BIT_AID0_8821C(x) (((x) & BIT_MASK_AID0_8821C) << BIT_SHIFT_AID0_8821C) 17295 #define BITS_AID0_8821C (BIT_MASK_AID0_8821C << BIT_SHIFT_AID0_8821C) 17296 #define BIT_CLEAR_AID0_8821C(x) ((x) & (~BITS_AID0_8821C)) 17297 #define BIT_GET_AID0_8821C(x) \ 17298 (((x) >> BIT_SHIFT_AID0_8821C) & BIT_MASK_AID0_8821C) 17299 #define BIT_SET_AID0_8821C(x, v) (BIT_CLEAR_AID0_8821C(x) | BIT_AID0_8821C(v)) 17300 17301 /* 2 REG_SND_PTCL_CTRL_8821C */ 17302 17303 #define BIT_SHIFT_NDP_RX_STANDBY_TIMER_8821C 24 17304 #define BIT_MASK_NDP_RX_STANDBY_TIMER_8821C 0xff 17305 #define BIT_NDP_RX_STANDBY_TIMER_8821C(x) \ 17306 (((x) & BIT_MASK_NDP_RX_STANDBY_TIMER_8821C) \ 17307 << BIT_SHIFT_NDP_RX_STANDBY_TIMER_8821C) 17308 #define BITS_NDP_RX_STANDBY_TIMER_8821C \ 17309 (BIT_MASK_NDP_RX_STANDBY_TIMER_8821C \ 17310 << BIT_SHIFT_NDP_RX_STANDBY_TIMER_8821C) 17311 #define BIT_CLEAR_NDP_RX_STANDBY_TIMER_8821C(x) \ 17312 ((x) & (~BITS_NDP_RX_STANDBY_TIMER_8821C)) 17313 #define BIT_GET_NDP_RX_STANDBY_TIMER_8821C(x) \ 17314 (((x) >> BIT_SHIFT_NDP_RX_STANDBY_TIMER_8821C) & \ 17315 BIT_MASK_NDP_RX_STANDBY_TIMER_8821C) 17316 #define BIT_SET_NDP_RX_STANDBY_TIMER_8821C(x, v) \ 17317 (BIT_CLEAR_NDP_RX_STANDBY_TIMER_8821C(x) | \ 17318 BIT_NDP_RX_STANDBY_TIMER_8821C(v)) 17319 17320 #define BIT_SHIFT_CSI_RPT_OFFSET_HT_8821C 16 17321 #define BIT_MASK_CSI_RPT_OFFSET_HT_8821C 0xff 17322 #define BIT_CSI_RPT_OFFSET_HT_8821C(x) \ 17323 (((x) & BIT_MASK_CSI_RPT_OFFSET_HT_8821C) \ 17324 << BIT_SHIFT_CSI_RPT_OFFSET_HT_8821C) 17325 #define BITS_CSI_RPT_OFFSET_HT_8821C \ 17326 (BIT_MASK_CSI_RPT_OFFSET_HT_8821C << BIT_SHIFT_CSI_RPT_OFFSET_HT_8821C) 17327 #define BIT_CLEAR_CSI_RPT_OFFSET_HT_8821C(x) \ 17328 ((x) & (~BITS_CSI_RPT_OFFSET_HT_8821C)) 17329 #define BIT_GET_CSI_RPT_OFFSET_HT_8821C(x) \ 17330 (((x) >> BIT_SHIFT_CSI_RPT_OFFSET_HT_8821C) & \ 17331 BIT_MASK_CSI_RPT_OFFSET_HT_8821C) 17332 #define BIT_SET_CSI_RPT_OFFSET_HT_8821C(x, v) \ 17333 (BIT_CLEAR_CSI_RPT_OFFSET_HT_8821C(x) | BIT_CSI_RPT_OFFSET_HT_8821C(v)) 17334 17335 #define BIT_SHIFT_R_WMAC_VHT_CATEGORY_8821C 8 17336 #define BIT_MASK_R_WMAC_VHT_CATEGORY_8821C 0xff 17337 #define BIT_R_WMAC_VHT_CATEGORY_8821C(x) \ 17338 (((x) & BIT_MASK_R_WMAC_VHT_CATEGORY_8821C) \ 17339 << BIT_SHIFT_R_WMAC_VHT_CATEGORY_8821C) 17340 #define BITS_R_WMAC_VHT_CATEGORY_8821C \ 17341 (BIT_MASK_R_WMAC_VHT_CATEGORY_8821C \ 17342 << BIT_SHIFT_R_WMAC_VHT_CATEGORY_8821C) 17343 #define BIT_CLEAR_R_WMAC_VHT_CATEGORY_8821C(x) \ 17344 ((x) & (~BITS_R_WMAC_VHT_CATEGORY_8821C)) 17345 #define BIT_GET_R_WMAC_VHT_CATEGORY_8821C(x) \ 17346 (((x) >> BIT_SHIFT_R_WMAC_VHT_CATEGORY_8821C) & \ 17347 BIT_MASK_R_WMAC_VHT_CATEGORY_8821C) 17348 #define BIT_SET_R_WMAC_VHT_CATEGORY_8821C(x, v) \ 17349 (BIT_CLEAR_R_WMAC_VHT_CATEGORY_8821C(x) | \ 17350 BIT_R_WMAC_VHT_CATEGORY_8821C(v)) 17351 17352 #define BIT_R_WMAC_USE_NSTS_8821C BIT(7) 17353 #define BIT_R_DISABLE_CHECK_VHTSIGB_CRC_8821C BIT(6) 17354 #define BIT_R_DISABLE_CHECK_VHTSIGA_CRC_8821C BIT(5) 17355 #define BIT_R_WMAC_BFPARAM_SEL_8821C BIT(4) 17356 #define BIT_R_WMAC_CSISEQ_SEL_8821C BIT(3) 17357 #define BIT_R_WMAC_CSI_WITHHTC_EN_8821C BIT(2) 17358 #define BIT_R_WMAC_HT_NDPA_EN_8821C BIT(1) 17359 #define BIT_R_WMAC_VHT_NDPA_EN_8821C BIT(0) 17360 17361 /* 2 REG_RX_CSI_RPT_INFO_8821C */ 17362 17363 /* 2 REG_NS_ARP_CTRL_8821C */ 17364 #define BIT_R_WMAC_NSARP_RSPEN_8821C BIT(15) 17365 #define BIT_R_WMAC_NSARP_RARP_8821C BIT(9) 17366 #define BIT_R_WMAC_NSARP_RIPV6_8821C BIT(8) 17367 17368 #define BIT_SHIFT_R_WMAC_NSARP_MODEN_8821C 6 17369 #define BIT_MASK_R_WMAC_NSARP_MODEN_8821C 0x3 17370 #define BIT_R_WMAC_NSARP_MODEN_8821C(x) \ 17371 (((x) & BIT_MASK_R_WMAC_NSARP_MODEN_8821C) \ 17372 << BIT_SHIFT_R_WMAC_NSARP_MODEN_8821C) 17373 #define BITS_R_WMAC_NSARP_MODEN_8821C \ 17374 (BIT_MASK_R_WMAC_NSARP_MODEN_8821C \ 17375 << BIT_SHIFT_R_WMAC_NSARP_MODEN_8821C) 17376 #define BIT_CLEAR_R_WMAC_NSARP_MODEN_8821C(x) \ 17377 ((x) & (~BITS_R_WMAC_NSARP_MODEN_8821C)) 17378 #define BIT_GET_R_WMAC_NSARP_MODEN_8821C(x) \ 17379 (((x) >> BIT_SHIFT_R_WMAC_NSARP_MODEN_8821C) & \ 17380 BIT_MASK_R_WMAC_NSARP_MODEN_8821C) 17381 #define BIT_SET_R_WMAC_NSARP_MODEN_8821C(x, v) \ 17382 (BIT_CLEAR_R_WMAC_NSARP_MODEN_8821C(x) | \ 17383 BIT_R_WMAC_NSARP_MODEN_8821C(v)) 17384 17385 #define BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8821C 4 17386 #define BIT_MASK_R_WMAC_NSARP_RSPFTP_8821C 0x3 17387 #define BIT_R_WMAC_NSARP_RSPFTP_8821C(x) \ 17388 (((x) & BIT_MASK_R_WMAC_NSARP_RSPFTP_8821C) \ 17389 << BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8821C) 17390 #define BITS_R_WMAC_NSARP_RSPFTP_8821C \ 17391 (BIT_MASK_R_WMAC_NSARP_RSPFTP_8821C \ 17392 << BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8821C) 17393 #define BIT_CLEAR_R_WMAC_NSARP_RSPFTP_8821C(x) \ 17394 ((x) & (~BITS_R_WMAC_NSARP_RSPFTP_8821C)) 17395 #define BIT_GET_R_WMAC_NSARP_RSPFTP_8821C(x) \ 17396 (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPFTP_8821C) & \ 17397 BIT_MASK_R_WMAC_NSARP_RSPFTP_8821C) 17398 #define BIT_SET_R_WMAC_NSARP_RSPFTP_8821C(x, v) \ 17399 (BIT_CLEAR_R_WMAC_NSARP_RSPFTP_8821C(x) | \ 17400 BIT_R_WMAC_NSARP_RSPFTP_8821C(v)) 17401 17402 #define BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8821C 0 17403 #define BIT_MASK_R_WMAC_NSARP_RSPSEC_8821C 0xf 17404 #define BIT_R_WMAC_NSARP_RSPSEC_8821C(x) \ 17405 (((x) & BIT_MASK_R_WMAC_NSARP_RSPSEC_8821C) \ 17406 << BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8821C) 17407 #define BITS_R_WMAC_NSARP_RSPSEC_8821C \ 17408 (BIT_MASK_R_WMAC_NSARP_RSPSEC_8821C \ 17409 << BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8821C) 17410 #define BIT_CLEAR_R_WMAC_NSARP_RSPSEC_8821C(x) \ 17411 ((x) & (~BITS_R_WMAC_NSARP_RSPSEC_8821C)) 17412 #define BIT_GET_R_WMAC_NSARP_RSPSEC_8821C(x) \ 17413 (((x) >> BIT_SHIFT_R_WMAC_NSARP_RSPSEC_8821C) & \ 17414 BIT_MASK_R_WMAC_NSARP_RSPSEC_8821C) 17415 #define BIT_SET_R_WMAC_NSARP_RSPSEC_8821C(x, v) \ 17416 (BIT_CLEAR_R_WMAC_NSARP_RSPSEC_8821C(x) | \ 17417 BIT_R_WMAC_NSARP_RSPSEC_8821C(v)) 17418 17419 /* 2 REG_NS_ARP_INFO_8821C */ 17420 #define BIT_REQ_IS_MCNS_8821C BIT(23) 17421 #define BIT_REQ_IS_UCNS_8821C BIT(22) 17422 #define BIT_REQ_IS_USNS_8821C BIT(21) 17423 #define BIT_REQ_IS_ARP_8821C BIT(20) 17424 #define BIT_EXPRSP_MH_WITHQC_8821C BIT(19) 17425 17426 #define BIT_SHIFT_EXPRSP_SECTYPE_8821C 16 17427 #define BIT_MASK_EXPRSP_SECTYPE_8821C 0x7 17428 #define BIT_EXPRSP_SECTYPE_8821C(x) \ 17429 (((x) & BIT_MASK_EXPRSP_SECTYPE_8821C) \ 17430 << BIT_SHIFT_EXPRSP_SECTYPE_8821C) 17431 #define BITS_EXPRSP_SECTYPE_8821C \ 17432 (BIT_MASK_EXPRSP_SECTYPE_8821C << BIT_SHIFT_EXPRSP_SECTYPE_8821C) 17433 #define BIT_CLEAR_EXPRSP_SECTYPE_8821C(x) ((x) & (~BITS_EXPRSP_SECTYPE_8821C)) 17434 #define BIT_GET_EXPRSP_SECTYPE_8821C(x) \ 17435 (((x) >> BIT_SHIFT_EXPRSP_SECTYPE_8821C) & \ 17436 BIT_MASK_EXPRSP_SECTYPE_8821C) 17437 #define BIT_SET_EXPRSP_SECTYPE_8821C(x, v) \ 17438 (BIT_CLEAR_EXPRSP_SECTYPE_8821C(x) | BIT_EXPRSP_SECTYPE_8821C(v)) 17439 17440 #define BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8821C 8 17441 #define BIT_MASK_EXPRSP_CHKSM_7_TO_0_8821C 0xff 17442 #define BIT_EXPRSP_CHKSM_7_TO_0_8821C(x) \ 17443 (((x) & BIT_MASK_EXPRSP_CHKSM_7_TO_0_8821C) \ 17444 << BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8821C) 17445 #define BITS_EXPRSP_CHKSM_7_TO_0_8821C \ 17446 (BIT_MASK_EXPRSP_CHKSM_7_TO_0_8821C \ 17447 << BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8821C) 17448 #define BIT_CLEAR_EXPRSP_CHKSM_7_TO_0_8821C(x) \ 17449 ((x) & (~BITS_EXPRSP_CHKSM_7_TO_0_8821C)) 17450 #define BIT_GET_EXPRSP_CHKSM_7_TO_0_8821C(x) \ 17451 (((x) >> BIT_SHIFT_EXPRSP_CHKSM_7_TO_0_8821C) & \ 17452 BIT_MASK_EXPRSP_CHKSM_7_TO_0_8821C) 17453 #define BIT_SET_EXPRSP_CHKSM_7_TO_0_8821C(x, v) \ 17454 (BIT_CLEAR_EXPRSP_CHKSM_7_TO_0_8821C(x) | \ 17455 BIT_EXPRSP_CHKSM_7_TO_0_8821C(v)) 17456 17457 #define BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8821C 0 17458 #define BIT_MASK_EXPRSP_CHKSM_15_TO_8_8821C 0xff 17459 #define BIT_EXPRSP_CHKSM_15_TO_8_8821C(x) \ 17460 (((x) & BIT_MASK_EXPRSP_CHKSM_15_TO_8_8821C) \ 17461 << BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8821C) 17462 #define BITS_EXPRSP_CHKSM_15_TO_8_8821C \ 17463 (BIT_MASK_EXPRSP_CHKSM_15_TO_8_8821C \ 17464 << BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8821C) 17465 #define BIT_CLEAR_EXPRSP_CHKSM_15_TO_8_8821C(x) \ 17466 ((x) & (~BITS_EXPRSP_CHKSM_15_TO_8_8821C)) 17467 #define BIT_GET_EXPRSP_CHKSM_15_TO_8_8821C(x) \ 17468 (((x) >> BIT_SHIFT_EXPRSP_CHKSM_15_TO_8_8821C) & \ 17469 BIT_MASK_EXPRSP_CHKSM_15_TO_8_8821C) 17470 #define BIT_SET_EXPRSP_CHKSM_15_TO_8_8821C(x, v) \ 17471 (BIT_CLEAR_EXPRSP_CHKSM_15_TO_8_8821C(x) | \ 17472 BIT_EXPRSP_CHKSM_15_TO_8_8821C(v)) 17473 17474 /* 2 REG_BEAMFORMING_INFO_NSARP_V1_8821C */ 17475 17476 #define BIT_SHIFT_WMAC_ARPIP_8821C 0 17477 #define BIT_MASK_WMAC_ARPIP_8821C 0xffffffffL 17478 #define BIT_WMAC_ARPIP_8821C(x) \ 17479 (((x) & BIT_MASK_WMAC_ARPIP_8821C) << BIT_SHIFT_WMAC_ARPIP_8821C) 17480 #define BITS_WMAC_ARPIP_8821C \ 17481 (BIT_MASK_WMAC_ARPIP_8821C << BIT_SHIFT_WMAC_ARPIP_8821C) 17482 #define BIT_CLEAR_WMAC_ARPIP_8821C(x) ((x) & (~BITS_WMAC_ARPIP_8821C)) 17483 #define BIT_GET_WMAC_ARPIP_8821C(x) \ 17484 (((x) >> BIT_SHIFT_WMAC_ARPIP_8821C) & BIT_MASK_WMAC_ARPIP_8821C) 17485 #define BIT_SET_WMAC_ARPIP_8821C(x, v) \ 17486 (BIT_CLEAR_WMAC_ARPIP_8821C(x) | BIT_WMAC_ARPIP_8821C(v)) 17487 17488 /* 2 REG_BEAMFORMING_INFO_NSARP_8821C */ 17489 17490 #define BIT_SHIFT_BEAMFORMING_INFO_8821C 0 17491 #define BIT_MASK_BEAMFORMING_INFO_8821C 0xffffffffL 17492 #define BIT_BEAMFORMING_INFO_8821C(x) \ 17493 (((x) & BIT_MASK_BEAMFORMING_INFO_8821C) \ 17494 << BIT_SHIFT_BEAMFORMING_INFO_8821C) 17495 #define BITS_BEAMFORMING_INFO_8821C \ 17496 (BIT_MASK_BEAMFORMING_INFO_8821C << BIT_SHIFT_BEAMFORMING_INFO_8821C) 17497 #define BIT_CLEAR_BEAMFORMING_INFO_8821C(x) \ 17498 ((x) & (~BITS_BEAMFORMING_INFO_8821C)) 17499 #define BIT_GET_BEAMFORMING_INFO_8821C(x) \ 17500 (((x) >> BIT_SHIFT_BEAMFORMING_INFO_8821C) & \ 17501 BIT_MASK_BEAMFORMING_INFO_8821C) 17502 #define BIT_SET_BEAMFORMING_INFO_8821C(x, v) \ 17503 (BIT_CLEAR_BEAMFORMING_INFO_8821C(x) | BIT_BEAMFORMING_INFO_8821C(v)) 17504 17505 /* 2 REG_IPV6_8821C */ 17506 17507 #define BIT_SHIFT_R_WMAC_IPV6_MYIPAD_0_8821C 0 17508 #define BIT_MASK_R_WMAC_IPV6_MYIPAD_0_8821C 0xffffffffL 17509 #define BIT_R_WMAC_IPV6_MYIPAD_0_8821C(x) \ 17510 (((x) & BIT_MASK_R_WMAC_IPV6_MYIPAD_0_8821C) \ 17511 << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_0_8821C) 17512 #define BITS_R_WMAC_IPV6_MYIPAD_0_8821C \ 17513 (BIT_MASK_R_WMAC_IPV6_MYIPAD_0_8821C \ 17514 << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_0_8821C) 17515 #define BIT_CLEAR_R_WMAC_IPV6_MYIPAD_0_8821C(x) \ 17516 ((x) & (~BITS_R_WMAC_IPV6_MYIPAD_0_8821C)) 17517 #define BIT_GET_R_WMAC_IPV6_MYIPAD_0_8821C(x) \ 17518 (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_0_8821C) & \ 17519 BIT_MASK_R_WMAC_IPV6_MYIPAD_0_8821C) 17520 #define BIT_SET_R_WMAC_IPV6_MYIPAD_0_8821C(x, v) \ 17521 (BIT_CLEAR_R_WMAC_IPV6_MYIPAD_0_8821C(x) | \ 17522 BIT_R_WMAC_IPV6_MYIPAD_0_8821C(v)) 17523 17524 /* 2 REG_IPV6_1_8821C */ 17525 17526 #define BIT_SHIFT_R_WMAC_IPV6_MYIPAD_1_8821C 0 17527 #define BIT_MASK_R_WMAC_IPV6_MYIPAD_1_8821C 0xffffffffL 17528 #define BIT_R_WMAC_IPV6_MYIPAD_1_8821C(x) \ 17529 (((x) & BIT_MASK_R_WMAC_IPV6_MYIPAD_1_8821C) \ 17530 << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_1_8821C) 17531 #define BITS_R_WMAC_IPV6_MYIPAD_1_8821C \ 17532 (BIT_MASK_R_WMAC_IPV6_MYIPAD_1_8821C \ 17533 << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_1_8821C) 17534 #define BIT_CLEAR_R_WMAC_IPV6_MYIPAD_1_8821C(x) \ 17535 ((x) & (~BITS_R_WMAC_IPV6_MYIPAD_1_8821C)) 17536 #define BIT_GET_R_WMAC_IPV6_MYIPAD_1_8821C(x) \ 17537 (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_1_8821C) & \ 17538 BIT_MASK_R_WMAC_IPV6_MYIPAD_1_8821C) 17539 #define BIT_SET_R_WMAC_IPV6_MYIPAD_1_8821C(x, v) \ 17540 (BIT_CLEAR_R_WMAC_IPV6_MYIPAD_1_8821C(x) | \ 17541 BIT_R_WMAC_IPV6_MYIPAD_1_8821C(v)) 17542 17543 /* 2 REG_IPV6_2_8821C */ 17544 17545 #define BIT_SHIFT_R_WMAC_IPV6_MYIPAD_2_8821C 0 17546 #define BIT_MASK_R_WMAC_IPV6_MYIPAD_2_8821C 0xffffffffL 17547 #define BIT_R_WMAC_IPV6_MYIPAD_2_8821C(x) \ 17548 (((x) & BIT_MASK_R_WMAC_IPV6_MYIPAD_2_8821C) \ 17549 << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_2_8821C) 17550 #define BITS_R_WMAC_IPV6_MYIPAD_2_8821C \ 17551 (BIT_MASK_R_WMAC_IPV6_MYIPAD_2_8821C \ 17552 << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_2_8821C) 17553 #define BIT_CLEAR_R_WMAC_IPV6_MYIPAD_2_8821C(x) \ 17554 ((x) & (~BITS_R_WMAC_IPV6_MYIPAD_2_8821C)) 17555 #define BIT_GET_R_WMAC_IPV6_MYIPAD_2_8821C(x) \ 17556 (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_2_8821C) & \ 17557 BIT_MASK_R_WMAC_IPV6_MYIPAD_2_8821C) 17558 #define BIT_SET_R_WMAC_IPV6_MYIPAD_2_8821C(x, v) \ 17559 (BIT_CLEAR_R_WMAC_IPV6_MYIPAD_2_8821C(x) | \ 17560 BIT_R_WMAC_IPV6_MYIPAD_2_8821C(v)) 17561 17562 /* 2 REG_IPV6_3_8821C */ 17563 17564 #define BIT_SHIFT_R_WMAC_IPV6_MYIPAD_3_8821C 0 17565 #define BIT_MASK_R_WMAC_IPV6_MYIPAD_3_8821C 0xffffffffL 17566 #define BIT_R_WMAC_IPV6_MYIPAD_3_8821C(x) \ 17567 (((x) & BIT_MASK_R_WMAC_IPV6_MYIPAD_3_8821C) \ 17568 << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_3_8821C) 17569 #define BITS_R_WMAC_IPV6_MYIPAD_3_8821C \ 17570 (BIT_MASK_R_WMAC_IPV6_MYIPAD_3_8821C \ 17571 << BIT_SHIFT_R_WMAC_IPV6_MYIPAD_3_8821C) 17572 #define BIT_CLEAR_R_WMAC_IPV6_MYIPAD_3_8821C(x) \ 17573 ((x) & (~BITS_R_WMAC_IPV6_MYIPAD_3_8821C)) 17574 #define BIT_GET_R_WMAC_IPV6_MYIPAD_3_8821C(x) \ 17575 (((x) >> BIT_SHIFT_R_WMAC_IPV6_MYIPAD_3_8821C) & \ 17576 BIT_MASK_R_WMAC_IPV6_MYIPAD_3_8821C) 17577 #define BIT_SET_R_WMAC_IPV6_MYIPAD_3_8821C(x, v) \ 17578 (BIT_CLEAR_R_WMAC_IPV6_MYIPAD_3_8821C(x) | \ 17579 BIT_R_WMAC_IPV6_MYIPAD_3_8821C(v)) 17580 17581 /* 2 REG_NOT_VALID_8821C */ 17582 17583 /* 2 REG_NOT_VALID_8821C */ 17584 17585 /* 2 REG_NOT_VALID_8821C */ 17586 17587 /* 2 REG_NOT_VALID_8821C */ 17588 17589 /* 2 REG_WMAC_RTX_CTX_SUBTYPE_CFG_8821C */ 17590 17591 #define BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8821C 4 17592 #define BIT_MASK_R_WMAC_CTX_SUBTYPE_8821C 0xf 17593 #define BIT_R_WMAC_CTX_SUBTYPE_8821C(x) \ 17594 (((x) & BIT_MASK_R_WMAC_CTX_SUBTYPE_8821C) \ 17595 << BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8821C) 17596 #define BITS_R_WMAC_CTX_SUBTYPE_8821C \ 17597 (BIT_MASK_R_WMAC_CTX_SUBTYPE_8821C \ 17598 << BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8821C) 17599 #define BIT_CLEAR_R_WMAC_CTX_SUBTYPE_8821C(x) \ 17600 ((x) & (~BITS_R_WMAC_CTX_SUBTYPE_8821C)) 17601 #define BIT_GET_R_WMAC_CTX_SUBTYPE_8821C(x) \ 17602 (((x) >> BIT_SHIFT_R_WMAC_CTX_SUBTYPE_8821C) & \ 17603 BIT_MASK_R_WMAC_CTX_SUBTYPE_8821C) 17604 #define BIT_SET_R_WMAC_CTX_SUBTYPE_8821C(x, v) \ 17605 (BIT_CLEAR_R_WMAC_CTX_SUBTYPE_8821C(x) | \ 17606 BIT_R_WMAC_CTX_SUBTYPE_8821C(v)) 17607 17608 #define BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8821C 0 17609 #define BIT_MASK_R_WMAC_RTX_SUBTYPE_8821C 0xf 17610 #define BIT_R_WMAC_RTX_SUBTYPE_8821C(x) \ 17611 (((x) & BIT_MASK_R_WMAC_RTX_SUBTYPE_8821C) \ 17612 << BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8821C) 17613 #define BITS_R_WMAC_RTX_SUBTYPE_8821C \ 17614 (BIT_MASK_R_WMAC_RTX_SUBTYPE_8821C \ 17615 << BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8821C) 17616 #define BIT_CLEAR_R_WMAC_RTX_SUBTYPE_8821C(x) \ 17617 ((x) & (~BITS_R_WMAC_RTX_SUBTYPE_8821C)) 17618 #define BIT_GET_R_WMAC_RTX_SUBTYPE_8821C(x) \ 17619 (((x) >> BIT_SHIFT_R_WMAC_RTX_SUBTYPE_8821C) & \ 17620 BIT_MASK_R_WMAC_RTX_SUBTYPE_8821C) 17621 #define BIT_SET_R_WMAC_RTX_SUBTYPE_8821C(x, v) \ 17622 (BIT_CLEAR_R_WMAC_RTX_SUBTYPE_8821C(x) | \ 17623 BIT_R_WMAC_RTX_SUBTYPE_8821C(v)) 17624 17625 /* 2 REG_NOT_VALID_8821C */ 17626 17627 /* 2 REG_NOT_VALID_8821C */ 17628 17629 /* 2 REG_NOT_VALID_8821C */ 17630 17631 /* 2 REG_WMAC_SWAES_CFG_8821C */ 17632 17633 /* 2 REG_BT_COEX_V2_8821C */ 17634 #define BIT_GNT_BT_POLARITY_8821C BIT(12) 17635 #define BIT_GNT_BT_BYPASS_PRIORITY_8821C BIT(8) 17636 17637 #define BIT_SHIFT_TIMER_8821C 0 17638 #define BIT_MASK_TIMER_8821C 0xff 17639 #define BIT_TIMER_8821C(x) \ 17640 (((x) & BIT_MASK_TIMER_8821C) << BIT_SHIFT_TIMER_8821C) 17641 #define BITS_TIMER_8821C (BIT_MASK_TIMER_8821C << BIT_SHIFT_TIMER_8821C) 17642 #define BIT_CLEAR_TIMER_8821C(x) ((x) & (~BITS_TIMER_8821C)) 17643 #define BIT_GET_TIMER_8821C(x) \ 17644 (((x) >> BIT_SHIFT_TIMER_8821C) & BIT_MASK_TIMER_8821C) 17645 #define BIT_SET_TIMER_8821C(x, v) \ 17646 (BIT_CLEAR_TIMER_8821C(x) | BIT_TIMER_8821C(v)) 17647 17648 /* 2 REG_BT_COEX_8821C */ 17649 #define BIT_R_GNT_BT_RFC_SW_8821C BIT(12) 17650 #define BIT_R_GNT_BT_RFC_SW_EN_8821C BIT(11) 17651 #define BIT_R_GNT_BT_BB_SW_8821C BIT(10) 17652 #define BIT_R_GNT_BT_BB_SW_EN_8821C BIT(9) 17653 #define BIT_R_BT_CNT_THREN_8821C BIT(8) 17654 17655 #define BIT_SHIFT_R_BT_CNT_THR_8821C 0 17656 #define BIT_MASK_R_BT_CNT_THR_8821C 0xff 17657 #define BIT_R_BT_CNT_THR_8821C(x) \ 17658 (((x) & BIT_MASK_R_BT_CNT_THR_8821C) << BIT_SHIFT_R_BT_CNT_THR_8821C) 17659 #define BITS_R_BT_CNT_THR_8821C \ 17660 (BIT_MASK_R_BT_CNT_THR_8821C << BIT_SHIFT_R_BT_CNT_THR_8821C) 17661 #define BIT_CLEAR_R_BT_CNT_THR_8821C(x) ((x) & (~BITS_R_BT_CNT_THR_8821C)) 17662 #define BIT_GET_R_BT_CNT_THR_8821C(x) \ 17663 (((x) >> BIT_SHIFT_R_BT_CNT_THR_8821C) & BIT_MASK_R_BT_CNT_THR_8821C) 17664 #define BIT_SET_R_BT_CNT_THR_8821C(x, v) \ 17665 (BIT_CLEAR_R_BT_CNT_THR_8821C(x) | BIT_R_BT_CNT_THR_8821C(v)) 17666 17667 /* 2 REG_WLAN_ACT_MASK_CTRL_8821C */ 17668 17669 #define BIT_SHIFT_RXMYRTS_NAV_V1_8821C 8 17670 #define BIT_MASK_RXMYRTS_NAV_V1_8821C 0xff 17671 #define BIT_RXMYRTS_NAV_V1_8821C(x) \ 17672 (((x) & BIT_MASK_RXMYRTS_NAV_V1_8821C) \ 17673 << BIT_SHIFT_RXMYRTS_NAV_V1_8821C) 17674 #define BITS_RXMYRTS_NAV_V1_8821C \ 17675 (BIT_MASK_RXMYRTS_NAV_V1_8821C << BIT_SHIFT_RXMYRTS_NAV_V1_8821C) 17676 #define BIT_CLEAR_RXMYRTS_NAV_V1_8821C(x) ((x) & (~BITS_RXMYRTS_NAV_V1_8821C)) 17677 #define BIT_GET_RXMYRTS_NAV_V1_8821C(x) \ 17678 (((x) >> BIT_SHIFT_RXMYRTS_NAV_V1_8821C) & \ 17679 BIT_MASK_RXMYRTS_NAV_V1_8821C) 17680 #define BIT_SET_RXMYRTS_NAV_V1_8821C(x, v) \ 17681 (BIT_CLEAR_RXMYRTS_NAV_V1_8821C(x) | BIT_RXMYRTS_NAV_V1_8821C(v)) 17682 17683 #define BIT_SHIFT_RTSRST_V1_8821C 0 17684 #define BIT_MASK_RTSRST_V1_8821C 0xff 17685 #define BIT_RTSRST_V1_8821C(x) \ 17686 (((x) & BIT_MASK_RTSRST_V1_8821C) << BIT_SHIFT_RTSRST_V1_8821C) 17687 #define BITS_RTSRST_V1_8821C \ 17688 (BIT_MASK_RTSRST_V1_8821C << BIT_SHIFT_RTSRST_V1_8821C) 17689 #define BIT_CLEAR_RTSRST_V1_8821C(x) ((x) & (~BITS_RTSRST_V1_8821C)) 17690 #define BIT_GET_RTSRST_V1_8821C(x) \ 17691 (((x) >> BIT_SHIFT_RTSRST_V1_8821C) & BIT_MASK_RTSRST_V1_8821C) 17692 #define BIT_SET_RTSRST_V1_8821C(x, v) \ 17693 (BIT_CLEAR_RTSRST_V1_8821C(x) | BIT_RTSRST_V1_8821C(v)) 17694 17695 /* 2 REG_WLAN_ACT_MASK_CTRL_1_8821C */ 17696 #define BIT_WLRX_TER_BY_CTL_1_8821C BIT(11) 17697 #define BIT_WLRX_TER_BY_AD_1_8821C BIT(10) 17698 #define BIT_ANT_DIVERSITY_SEL_1_8821C BIT(9) 17699 #define BIT_ANTSEL_FOR_BT_CTRL_EN_1_8821C BIT(8) 17700 #define BIT_WLACT_LOW_GNTWL_EN_1_8821C BIT(2) 17701 #define BIT_WLACT_HIGH_GNTBT_EN_1_8821C BIT(1) 17702 #define BIT_NAV_UPPER_1_V1_8821C BIT(0) 17703 17704 /* 2 REG_BT_COEX_ENHANCED_INTR_CTRL_8821C */ 17705 17706 #define BIT_SHIFT_BT_STAT_DELAY_8821C 12 17707 #define BIT_MASK_BT_STAT_DELAY_8821C 0xf 17708 #define BIT_BT_STAT_DELAY_8821C(x) \ 17709 (((x) & BIT_MASK_BT_STAT_DELAY_8821C) << BIT_SHIFT_BT_STAT_DELAY_8821C) 17710 #define BITS_BT_STAT_DELAY_8821C \ 17711 (BIT_MASK_BT_STAT_DELAY_8821C << BIT_SHIFT_BT_STAT_DELAY_8821C) 17712 #define BIT_CLEAR_BT_STAT_DELAY_8821C(x) ((x) & (~BITS_BT_STAT_DELAY_8821C)) 17713 #define BIT_GET_BT_STAT_DELAY_8821C(x) \ 17714 (((x) >> BIT_SHIFT_BT_STAT_DELAY_8821C) & BIT_MASK_BT_STAT_DELAY_8821C) 17715 #define BIT_SET_BT_STAT_DELAY_8821C(x, v) \ 17716 (BIT_CLEAR_BT_STAT_DELAY_8821C(x) | BIT_BT_STAT_DELAY_8821C(v)) 17717 17718 #define BIT_SHIFT_BT_TRX_INIT_DETECT_8821C 8 17719 #define BIT_MASK_BT_TRX_INIT_DETECT_8821C 0xf 17720 #define BIT_BT_TRX_INIT_DETECT_8821C(x) \ 17721 (((x) & BIT_MASK_BT_TRX_INIT_DETECT_8821C) \ 17722 << BIT_SHIFT_BT_TRX_INIT_DETECT_8821C) 17723 #define BITS_BT_TRX_INIT_DETECT_8821C \ 17724 (BIT_MASK_BT_TRX_INIT_DETECT_8821C \ 17725 << BIT_SHIFT_BT_TRX_INIT_DETECT_8821C) 17726 #define BIT_CLEAR_BT_TRX_INIT_DETECT_8821C(x) \ 17727 ((x) & (~BITS_BT_TRX_INIT_DETECT_8821C)) 17728 #define BIT_GET_BT_TRX_INIT_DETECT_8821C(x) \ 17729 (((x) >> BIT_SHIFT_BT_TRX_INIT_DETECT_8821C) & \ 17730 BIT_MASK_BT_TRX_INIT_DETECT_8821C) 17731 #define BIT_SET_BT_TRX_INIT_DETECT_8821C(x, v) \ 17732 (BIT_CLEAR_BT_TRX_INIT_DETECT_8821C(x) | \ 17733 BIT_BT_TRX_INIT_DETECT_8821C(v)) 17734 17735 #define BIT_SHIFT_BT_PRI_DETECT_TO_8821C 4 17736 #define BIT_MASK_BT_PRI_DETECT_TO_8821C 0xf 17737 #define BIT_BT_PRI_DETECT_TO_8821C(x) \ 17738 (((x) & BIT_MASK_BT_PRI_DETECT_TO_8821C) \ 17739 << BIT_SHIFT_BT_PRI_DETECT_TO_8821C) 17740 #define BITS_BT_PRI_DETECT_TO_8821C \ 17741 (BIT_MASK_BT_PRI_DETECT_TO_8821C << BIT_SHIFT_BT_PRI_DETECT_TO_8821C) 17742 #define BIT_CLEAR_BT_PRI_DETECT_TO_8821C(x) \ 17743 ((x) & (~BITS_BT_PRI_DETECT_TO_8821C)) 17744 #define BIT_GET_BT_PRI_DETECT_TO_8821C(x) \ 17745 (((x) >> BIT_SHIFT_BT_PRI_DETECT_TO_8821C) & \ 17746 BIT_MASK_BT_PRI_DETECT_TO_8821C) 17747 #define BIT_SET_BT_PRI_DETECT_TO_8821C(x, v) \ 17748 (BIT_CLEAR_BT_PRI_DETECT_TO_8821C(x) | BIT_BT_PRI_DETECT_TO_8821C(v)) 17749 17750 #define BIT_R_GRANTALL_WLMASK_8821C BIT(3) 17751 #define BIT_STATIS_BT_EN_8821C BIT(2) 17752 #define BIT_WL_ACT_MASK_ENABLE_8821C BIT(1) 17753 #define BIT_ENHANCED_BT_8821C BIT(0) 17754 17755 /* 2 REG_BT_ACT_STATISTICS_8821C */ 17756 17757 #define BIT_SHIFT_STATIS_BT_HI_RX_8821C 16 17758 #define BIT_MASK_STATIS_BT_HI_RX_8821C 0xffff 17759 #define BIT_STATIS_BT_HI_RX_8821C(x) \ 17760 (((x) & BIT_MASK_STATIS_BT_HI_RX_8821C) \ 17761 << BIT_SHIFT_STATIS_BT_HI_RX_8821C) 17762 #define BITS_STATIS_BT_HI_RX_8821C \ 17763 (BIT_MASK_STATIS_BT_HI_RX_8821C << BIT_SHIFT_STATIS_BT_HI_RX_8821C) 17764 #define BIT_CLEAR_STATIS_BT_HI_RX_8821C(x) ((x) & (~BITS_STATIS_BT_HI_RX_8821C)) 17765 #define BIT_GET_STATIS_BT_HI_RX_8821C(x) \ 17766 (((x) >> BIT_SHIFT_STATIS_BT_HI_RX_8821C) & \ 17767 BIT_MASK_STATIS_BT_HI_RX_8821C) 17768 #define BIT_SET_STATIS_BT_HI_RX_8821C(x, v) \ 17769 (BIT_CLEAR_STATIS_BT_HI_RX_8821C(x) | BIT_STATIS_BT_HI_RX_8821C(v)) 17770 17771 #define BIT_SHIFT_STATIS_BT_HI_TX_8821C 0 17772 #define BIT_MASK_STATIS_BT_HI_TX_8821C 0xffff 17773 #define BIT_STATIS_BT_HI_TX_8821C(x) \ 17774 (((x) & BIT_MASK_STATIS_BT_HI_TX_8821C) \ 17775 << BIT_SHIFT_STATIS_BT_HI_TX_8821C) 17776 #define BITS_STATIS_BT_HI_TX_8821C \ 17777 (BIT_MASK_STATIS_BT_HI_TX_8821C << BIT_SHIFT_STATIS_BT_HI_TX_8821C) 17778 #define BIT_CLEAR_STATIS_BT_HI_TX_8821C(x) ((x) & (~BITS_STATIS_BT_HI_TX_8821C)) 17779 #define BIT_GET_STATIS_BT_HI_TX_8821C(x) \ 17780 (((x) >> BIT_SHIFT_STATIS_BT_HI_TX_8821C) & \ 17781 BIT_MASK_STATIS_BT_HI_TX_8821C) 17782 #define BIT_SET_STATIS_BT_HI_TX_8821C(x, v) \ 17783 (BIT_CLEAR_STATIS_BT_HI_TX_8821C(x) | BIT_STATIS_BT_HI_TX_8821C(v)) 17784 17785 /* 2 REG_BT_ACT_STATISTICS_1_8821C */ 17786 17787 #define BIT_SHIFT_STATIS_BT_LO_RX_1_8821C 16 17788 #define BIT_MASK_STATIS_BT_LO_RX_1_8821C 0xffff 17789 #define BIT_STATIS_BT_LO_RX_1_8821C(x) \ 17790 (((x) & BIT_MASK_STATIS_BT_LO_RX_1_8821C) \ 17791 << BIT_SHIFT_STATIS_BT_LO_RX_1_8821C) 17792 #define BITS_STATIS_BT_LO_RX_1_8821C \ 17793 (BIT_MASK_STATIS_BT_LO_RX_1_8821C << BIT_SHIFT_STATIS_BT_LO_RX_1_8821C) 17794 #define BIT_CLEAR_STATIS_BT_LO_RX_1_8821C(x) \ 17795 ((x) & (~BITS_STATIS_BT_LO_RX_1_8821C)) 17796 #define BIT_GET_STATIS_BT_LO_RX_1_8821C(x) \ 17797 (((x) >> BIT_SHIFT_STATIS_BT_LO_RX_1_8821C) & \ 17798 BIT_MASK_STATIS_BT_LO_RX_1_8821C) 17799 #define BIT_SET_STATIS_BT_LO_RX_1_8821C(x, v) \ 17800 (BIT_CLEAR_STATIS_BT_LO_RX_1_8821C(x) | BIT_STATIS_BT_LO_RX_1_8821C(v)) 17801 17802 #define BIT_SHIFT_STATIS_BT_LO_TX_1_8821C 0 17803 #define BIT_MASK_STATIS_BT_LO_TX_1_8821C 0xffff 17804 #define BIT_STATIS_BT_LO_TX_1_8821C(x) \ 17805 (((x) & BIT_MASK_STATIS_BT_LO_TX_1_8821C) \ 17806 << BIT_SHIFT_STATIS_BT_LO_TX_1_8821C) 17807 #define BITS_STATIS_BT_LO_TX_1_8821C \ 17808 (BIT_MASK_STATIS_BT_LO_TX_1_8821C << BIT_SHIFT_STATIS_BT_LO_TX_1_8821C) 17809 #define BIT_CLEAR_STATIS_BT_LO_TX_1_8821C(x) \ 17810 ((x) & (~BITS_STATIS_BT_LO_TX_1_8821C)) 17811 #define BIT_GET_STATIS_BT_LO_TX_1_8821C(x) \ 17812 (((x) >> BIT_SHIFT_STATIS_BT_LO_TX_1_8821C) & \ 17813 BIT_MASK_STATIS_BT_LO_TX_1_8821C) 17814 #define BIT_SET_STATIS_BT_LO_TX_1_8821C(x, v) \ 17815 (BIT_CLEAR_STATIS_BT_LO_TX_1_8821C(x) | BIT_STATIS_BT_LO_TX_1_8821C(v)) 17816 17817 /* 2 REG_BT_STATISTICS_CONTROL_REGISTER_8821C */ 17818 17819 #define BIT_SHIFT_R_BT_CMD_RPT_8821C 16 17820 #define BIT_MASK_R_BT_CMD_RPT_8821C 0xffff 17821 #define BIT_R_BT_CMD_RPT_8821C(x) \ 17822 (((x) & BIT_MASK_R_BT_CMD_RPT_8821C) << BIT_SHIFT_R_BT_CMD_RPT_8821C) 17823 #define BITS_R_BT_CMD_RPT_8821C \ 17824 (BIT_MASK_R_BT_CMD_RPT_8821C << BIT_SHIFT_R_BT_CMD_RPT_8821C) 17825 #define BIT_CLEAR_R_BT_CMD_RPT_8821C(x) ((x) & (~BITS_R_BT_CMD_RPT_8821C)) 17826 #define BIT_GET_R_BT_CMD_RPT_8821C(x) \ 17827 (((x) >> BIT_SHIFT_R_BT_CMD_RPT_8821C) & BIT_MASK_R_BT_CMD_RPT_8821C) 17828 #define BIT_SET_R_BT_CMD_RPT_8821C(x, v) \ 17829 (BIT_CLEAR_R_BT_CMD_RPT_8821C(x) | BIT_R_BT_CMD_RPT_8821C(v)) 17830 17831 #define BIT_SHIFT_R_RPT_FROM_BT_8821C 8 17832 #define BIT_MASK_R_RPT_FROM_BT_8821C 0xff 17833 #define BIT_R_RPT_FROM_BT_8821C(x) \ 17834 (((x) & BIT_MASK_R_RPT_FROM_BT_8821C) << BIT_SHIFT_R_RPT_FROM_BT_8821C) 17835 #define BITS_R_RPT_FROM_BT_8821C \ 17836 (BIT_MASK_R_RPT_FROM_BT_8821C << BIT_SHIFT_R_RPT_FROM_BT_8821C) 17837 #define BIT_CLEAR_R_RPT_FROM_BT_8821C(x) ((x) & (~BITS_R_RPT_FROM_BT_8821C)) 17838 #define BIT_GET_R_RPT_FROM_BT_8821C(x) \ 17839 (((x) >> BIT_SHIFT_R_RPT_FROM_BT_8821C) & BIT_MASK_R_RPT_FROM_BT_8821C) 17840 #define BIT_SET_R_RPT_FROM_BT_8821C(x, v) \ 17841 (BIT_CLEAR_R_RPT_FROM_BT_8821C(x) | BIT_R_RPT_FROM_BT_8821C(v)) 17842 17843 #define BIT_SHIFT_BT_HID_ISR_SET_8821C 6 17844 #define BIT_MASK_BT_HID_ISR_SET_8821C 0x3 17845 #define BIT_BT_HID_ISR_SET_8821C(x) \ 17846 (((x) & BIT_MASK_BT_HID_ISR_SET_8821C) \ 17847 << BIT_SHIFT_BT_HID_ISR_SET_8821C) 17848 #define BITS_BT_HID_ISR_SET_8821C \ 17849 (BIT_MASK_BT_HID_ISR_SET_8821C << BIT_SHIFT_BT_HID_ISR_SET_8821C) 17850 #define BIT_CLEAR_BT_HID_ISR_SET_8821C(x) ((x) & (~BITS_BT_HID_ISR_SET_8821C)) 17851 #define BIT_GET_BT_HID_ISR_SET_8821C(x) \ 17852 (((x) >> BIT_SHIFT_BT_HID_ISR_SET_8821C) & \ 17853 BIT_MASK_BT_HID_ISR_SET_8821C) 17854 #define BIT_SET_BT_HID_ISR_SET_8821C(x, v) \ 17855 (BIT_CLEAR_BT_HID_ISR_SET_8821C(x) | BIT_BT_HID_ISR_SET_8821C(v)) 17856 17857 #define BIT_TDMA_BT_START_NOTIFY_8821C BIT(5) 17858 #define BIT_ENABLE_TDMA_FW_MODE_8821C BIT(4) 17859 #define BIT_ENABLE_PTA_TDMA_MODE_8821C BIT(3) 17860 #define BIT_ENABLE_COEXIST_TAB_IN_TDMA_8821C BIT(2) 17861 #define BIT_GPIO2_GPIO3_EXANGE_OR_NO_BT_CCA_8821C BIT(1) 17862 #define BIT_RTK_BT_ENABLE_8821C BIT(0) 17863 17864 /* 2 REG_BT_STATUS_REPORT_REGISTER_8821C */ 17865 17866 #define BIT_SHIFT_BT_PROFILE_8821C 24 17867 #define BIT_MASK_BT_PROFILE_8821C 0xff 17868 #define BIT_BT_PROFILE_8821C(x) \ 17869 (((x) & BIT_MASK_BT_PROFILE_8821C) << BIT_SHIFT_BT_PROFILE_8821C) 17870 #define BITS_BT_PROFILE_8821C \ 17871 (BIT_MASK_BT_PROFILE_8821C << BIT_SHIFT_BT_PROFILE_8821C) 17872 #define BIT_CLEAR_BT_PROFILE_8821C(x) ((x) & (~BITS_BT_PROFILE_8821C)) 17873 #define BIT_GET_BT_PROFILE_8821C(x) \ 17874 (((x) >> BIT_SHIFT_BT_PROFILE_8821C) & BIT_MASK_BT_PROFILE_8821C) 17875 #define BIT_SET_BT_PROFILE_8821C(x, v) \ 17876 (BIT_CLEAR_BT_PROFILE_8821C(x) | BIT_BT_PROFILE_8821C(v)) 17877 17878 #define BIT_SHIFT_BT_POWER_8821C 16 17879 #define BIT_MASK_BT_POWER_8821C 0xff 17880 #define BIT_BT_POWER_8821C(x) \ 17881 (((x) & BIT_MASK_BT_POWER_8821C) << BIT_SHIFT_BT_POWER_8821C) 17882 #define BITS_BT_POWER_8821C \ 17883 (BIT_MASK_BT_POWER_8821C << BIT_SHIFT_BT_POWER_8821C) 17884 #define BIT_CLEAR_BT_POWER_8821C(x) ((x) & (~BITS_BT_POWER_8821C)) 17885 #define BIT_GET_BT_POWER_8821C(x) \ 17886 (((x) >> BIT_SHIFT_BT_POWER_8821C) & BIT_MASK_BT_POWER_8821C) 17887 #define BIT_SET_BT_POWER_8821C(x, v) \ 17888 (BIT_CLEAR_BT_POWER_8821C(x) | BIT_BT_POWER_8821C(v)) 17889 17890 #define BIT_SHIFT_BT_PREDECT_STATUS_8821C 8 17891 #define BIT_MASK_BT_PREDECT_STATUS_8821C 0xff 17892 #define BIT_BT_PREDECT_STATUS_8821C(x) \ 17893 (((x) & BIT_MASK_BT_PREDECT_STATUS_8821C) \ 17894 << BIT_SHIFT_BT_PREDECT_STATUS_8821C) 17895 #define BITS_BT_PREDECT_STATUS_8821C \ 17896 (BIT_MASK_BT_PREDECT_STATUS_8821C << BIT_SHIFT_BT_PREDECT_STATUS_8821C) 17897 #define BIT_CLEAR_BT_PREDECT_STATUS_8821C(x) \ 17898 ((x) & (~BITS_BT_PREDECT_STATUS_8821C)) 17899 #define BIT_GET_BT_PREDECT_STATUS_8821C(x) \ 17900 (((x) >> BIT_SHIFT_BT_PREDECT_STATUS_8821C) & \ 17901 BIT_MASK_BT_PREDECT_STATUS_8821C) 17902 #define BIT_SET_BT_PREDECT_STATUS_8821C(x, v) \ 17903 (BIT_CLEAR_BT_PREDECT_STATUS_8821C(x) | BIT_BT_PREDECT_STATUS_8821C(v)) 17904 17905 #define BIT_SHIFT_BT_CMD_INFO_8821C 0 17906 #define BIT_MASK_BT_CMD_INFO_8821C 0xff 17907 #define BIT_BT_CMD_INFO_8821C(x) \ 17908 (((x) & BIT_MASK_BT_CMD_INFO_8821C) << BIT_SHIFT_BT_CMD_INFO_8821C) 17909 #define BITS_BT_CMD_INFO_8821C \ 17910 (BIT_MASK_BT_CMD_INFO_8821C << BIT_SHIFT_BT_CMD_INFO_8821C) 17911 #define BIT_CLEAR_BT_CMD_INFO_8821C(x) ((x) & (~BITS_BT_CMD_INFO_8821C)) 17912 #define BIT_GET_BT_CMD_INFO_8821C(x) \ 17913 (((x) >> BIT_SHIFT_BT_CMD_INFO_8821C) & BIT_MASK_BT_CMD_INFO_8821C) 17914 #define BIT_SET_BT_CMD_INFO_8821C(x, v) \ 17915 (BIT_CLEAR_BT_CMD_INFO_8821C(x) | BIT_BT_CMD_INFO_8821C(v)) 17916 17917 /* 2 REG_BT_INTERRUPT_CONTROL_REGISTER_8821C */ 17918 #define BIT_EN_MAC_NULL_PKT_NOTIFY_8821C BIT(31) 17919 #define BIT_EN_WLAN_RPT_AND_BT_QUERY_8821C BIT(30) 17920 #define BIT_EN_BT_STSTUS_RPT_8821C BIT(29) 17921 #define BIT_EN_BT_POWER_8821C BIT(28) 17922 #define BIT_EN_BT_CHANNEL_8821C BIT(27) 17923 #define BIT_EN_BT_SLOT_CHANGE_8821C BIT(26) 17924 #define BIT_EN_BT_PROFILE_OR_HID_8821C BIT(25) 17925 #define BIT_WLAN_RPT_NOTIFY_8821C BIT(24) 17926 17927 #define BIT_SHIFT_WLAN_RPT_DATA_8821C 16 17928 #define BIT_MASK_WLAN_RPT_DATA_8821C 0xff 17929 #define BIT_WLAN_RPT_DATA_8821C(x) \ 17930 (((x) & BIT_MASK_WLAN_RPT_DATA_8821C) << BIT_SHIFT_WLAN_RPT_DATA_8821C) 17931 #define BITS_WLAN_RPT_DATA_8821C \ 17932 (BIT_MASK_WLAN_RPT_DATA_8821C << BIT_SHIFT_WLAN_RPT_DATA_8821C) 17933 #define BIT_CLEAR_WLAN_RPT_DATA_8821C(x) ((x) & (~BITS_WLAN_RPT_DATA_8821C)) 17934 #define BIT_GET_WLAN_RPT_DATA_8821C(x) \ 17935 (((x) >> BIT_SHIFT_WLAN_RPT_DATA_8821C) & BIT_MASK_WLAN_RPT_DATA_8821C) 17936 #define BIT_SET_WLAN_RPT_DATA_8821C(x, v) \ 17937 (BIT_CLEAR_WLAN_RPT_DATA_8821C(x) | BIT_WLAN_RPT_DATA_8821C(v)) 17938 17939 #define BIT_SHIFT_CMD_ID_8821C 8 17940 #define BIT_MASK_CMD_ID_8821C 0xff 17941 #define BIT_CMD_ID_8821C(x) \ 17942 (((x) & BIT_MASK_CMD_ID_8821C) << BIT_SHIFT_CMD_ID_8821C) 17943 #define BITS_CMD_ID_8821C (BIT_MASK_CMD_ID_8821C << BIT_SHIFT_CMD_ID_8821C) 17944 #define BIT_CLEAR_CMD_ID_8821C(x) ((x) & (~BITS_CMD_ID_8821C)) 17945 #define BIT_GET_CMD_ID_8821C(x) \ 17946 (((x) >> BIT_SHIFT_CMD_ID_8821C) & BIT_MASK_CMD_ID_8821C) 17947 #define BIT_SET_CMD_ID_8821C(x, v) \ 17948 (BIT_CLEAR_CMD_ID_8821C(x) | BIT_CMD_ID_8821C(v)) 17949 17950 #define BIT_SHIFT_BT_DATA_8821C 0 17951 #define BIT_MASK_BT_DATA_8821C 0xff 17952 #define BIT_BT_DATA_8821C(x) \ 17953 (((x) & BIT_MASK_BT_DATA_8821C) << BIT_SHIFT_BT_DATA_8821C) 17954 #define BITS_BT_DATA_8821C (BIT_MASK_BT_DATA_8821C << BIT_SHIFT_BT_DATA_8821C) 17955 #define BIT_CLEAR_BT_DATA_8821C(x) ((x) & (~BITS_BT_DATA_8821C)) 17956 #define BIT_GET_BT_DATA_8821C(x) \ 17957 (((x) >> BIT_SHIFT_BT_DATA_8821C) & BIT_MASK_BT_DATA_8821C) 17958 #define BIT_SET_BT_DATA_8821C(x, v) \ 17959 (BIT_CLEAR_BT_DATA_8821C(x) | BIT_BT_DATA_8821C(v)) 17960 17961 /* 2 REG_WLAN_REPORT_TIME_OUT_CONTROL_REGISTER_8821C */ 17962 17963 #define BIT_SHIFT_WLAN_RPT_TO_8821C 0 17964 #define BIT_MASK_WLAN_RPT_TO_8821C 0xff 17965 #define BIT_WLAN_RPT_TO_8821C(x) \ 17966 (((x) & BIT_MASK_WLAN_RPT_TO_8821C) << BIT_SHIFT_WLAN_RPT_TO_8821C) 17967 #define BITS_WLAN_RPT_TO_8821C \ 17968 (BIT_MASK_WLAN_RPT_TO_8821C << BIT_SHIFT_WLAN_RPT_TO_8821C) 17969 #define BIT_CLEAR_WLAN_RPT_TO_8821C(x) ((x) & (~BITS_WLAN_RPT_TO_8821C)) 17970 #define BIT_GET_WLAN_RPT_TO_8821C(x) \ 17971 (((x) >> BIT_SHIFT_WLAN_RPT_TO_8821C) & BIT_MASK_WLAN_RPT_TO_8821C) 17972 #define BIT_SET_WLAN_RPT_TO_8821C(x, v) \ 17973 (BIT_CLEAR_WLAN_RPT_TO_8821C(x) | BIT_WLAN_RPT_TO_8821C(v)) 17974 17975 /* 2 REG_BT_ISOLATION_TABLE_REGISTER_REGISTER_8821C */ 17976 17977 #define BIT_SHIFT_ISOLATION_CHK_0_8821C 1 17978 #define BIT_MASK_ISOLATION_CHK_0_8821C 0x7fffff 17979 #define BIT_ISOLATION_CHK_0_8821C(x) \ 17980 (((x) & BIT_MASK_ISOLATION_CHK_0_8821C) \ 17981 << BIT_SHIFT_ISOLATION_CHK_0_8821C) 17982 #define BITS_ISOLATION_CHK_0_8821C \ 17983 (BIT_MASK_ISOLATION_CHK_0_8821C << BIT_SHIFT_ISOLATION_CHK_0_8821C) 17984 #define BIT_CLEAR_ISOLATION_CHK_0_8821C(x) ((x) & (~BITS_ISOLATION_CHK_0_8821C)) 17985 #define BIT_GET_ISOLATION_CHK_0_8821C(x) \ 17986 (((x) >> BIT_SHIFT_ISOLATION_CHK_0_8821C) & \ 17987 BIT_MASK_ISOLATION_CHK_0_8821C) 17988 #define BIT_SET_ISOLATION_CHK_0_8821C(x, v) \ 17989 (BIT_CLEAR_ISOLATION_CHK_0_8821C(x) | BIT_ISOLATION_CHK_0_8821C(v)) 17990 17991 #define BIT_ISOLATION_EN_8821C BIT(0) 17992 17993 /* 2 REG_BT_ISOLATION_TABLE_REGISTER_REGISTER_1_8821C */ 17994 17995 #define BIT_SHIFT_ISOLATION_CHK_1_8821C 0 17996 #define BIT_MASK_ISOLATION_CHK_1_8821C 0xffffffffL 17997 #define BIT_ISOLATION_CHK_1_8821C(x) \ 17998 (((x) & BIT_MASK_ISOLATION_CHK_1_8821C) \ 17999 << BIT_SHIFT_ISOLATION_CHK_1_8821C) 18000 #define BITS_ISOLATION_CHK_1_8821C \ 18001 (BIT_MASK_ISOLATION_CHK_1_8821C << BIT_SHIFT_ISOLATION_CHK_1_8821C) 18002 #define BIT_CLEAR_ISOLATION_CHK_1_8821C(x) ((x) & (~BITS_ISOLATION_CHK_1_8821C)) 18003 #define BIT_GET_ISOLATION_CHK_1_8821C(x) \ 18004 (((x) >> BIT_SHIFT_ISOLATION_CHK_1_8821C) & \ 18005 BIT_MASK_ISOLATION_CHK_1_8821C) 18006 #define BIT_SET_ISOLATION_CHK_1_8821C(x, v) \ 18007 (BIT_CLEAR_ISOLATION_CHK_1_8821C(x) | BIT_ISOLATION_CHK_1_8821C(v)) 18008 18009 /* 2 REG_BT_ISOLATION_TABLE_REGISTER_REGISTER_2_8821C */ 18010 18011 #define BIT_SHIFT_ISOLATION_CHK_2_8821C 0 18012 #define BIT_MASK_ISOLATION_CHK_2_8821C 0xffffff 18013 #define BIT_ISOLATION_CHK_2_8821C(x) \ 18014 (((x) & BIT_MASK_ISOLATION_CHK_2_8821C) \ 18015 << BIT_SHIFT_ISOLATION_CHK_2_8821C) 18016 #define BITS_ISOLATION_CHK_2_8821C \ 18017 (BIT_MASK_ISOLATION_CHK_2_8821C << BIT_SHIFT_ISOLATION_CHK_2_8821C) 18018 #define BIT_CLEAR_ISOLATION_CHK_2_8821C(x) ((x) & (~BITS_ISOLATION_CHK_2_8821C)) 18019 #define BIT_GET_ISOLATION_CHK_2_8821C(x) \ 18020 (((x) >> BIT_SHIFT_ISOLATION_CHK_2_8821C) & \ 18021 BIT_MASK_ISOLATION_CHK_2_8821C) 18022 #define BIT_SET_ISOLATION_CHK_2_8821C(x, v) \ 18023 (BIT_CLEAR_ISOLATION_CHK_2_8821C(x) | BIT_ISOLATION_CHK_2_8821C(v)) 18024 18025 /* 2 REG_BT_INTERRUPT_STATUS_REGISTER_8821C */ 18026 #define BIT_BT_HID_ISR_8821C BIT(7) 18027 #define BIT_BT_QUERY_ISR_8821C BIT(6) 18028 #define BIT_MAC_NULL_PKT_NOTIFY_ISR_8821C BIT(5) 18029 #define BIT_WLAN_RPT_ISR_8821C BIT(4) 18030 #define BIT_BT_POWER_ISR_8821C BIT(3) 18031 #define BIT_BT_CHANNEL_ISR_8821C BIT(2) 18032 #define BIT_BT_SLOT_CHANGE_ISR_8821C BIT(1) 18033 #define BIT_BT_PROFILE_ISR_8821C BIT(0) 18034 18035 /* 2 REG_BT_TDMA_TIME_REGISTER_8821C */ 18036 18037 #define BIT_SHIFT_BT_TIME_8821C 6 18038 #define BIT_MASK_BT_TIME_8821C 0x3ffffff 18039 #define BIT_BT_TIME_8821C(x) \ 18040 (((x) & BIT_MASK_BT_TIME_8821C) << BIT_SHIFT_BT_TIME_8821C) 18041 #define BITS_BT_TIME_8821C (BIT_MASK_BT_TIME_8821C << BIT_SHIFT_BT_TIME_8821C) 18042 #define BIT_CLEAR_BT_TIME_8821C(x) ((x) & (~BITS_BT_TIME_8821C)) 18043 #define BIT_GET_BT_TIME_8821C(x) \ 18044 (((x) >> BIT_SHIFT_BT_TIME_8821C) & BIT_MASK_BT_TIME_8821C) 18045 #define BIT_SET_BT_TIME_8821C(x, v) \ 18046 (BIT_CLEAR_BT_TIME_8821C(x) | BIT_BT_TIME_8821C(v)) 18047 18048 #define BIT_SHIFT_BT_RPT_SAMPLE_RATE_8821C 0 18049 #define BIT_MASK_BT_RPT_SAMPLE_RATE_8821C 0x3f 18050 #define BIT_BT_RPT_SAMPLE_RATE_8821C(x) \ 18051 (((x) & BIT_MASK_BT_RPT_SAMPLE_RATE_8821C) \ 18052 << BIT_SHIFT_BT_RPT_SAMPLE_RATE_8821C) 18053 #define BITS_BT_RPT_SAMPLE_RATE_8821C \ 18054 (BIT_MASK_BT_RPT_SAMPLE_RATE_8821C \ 18055 << BIT_SHIFT_BT_RPT_SAMPLE_RATE_8821C) 18056 #define BIT_CLEAR_BT_RPT_SAMPLE_RATE_8821C(x) \ 18057 ((x) & (~BITS_BT_RPT_SAMPLE_RATE_8821C)) 18058 #define BIT_GET_BT_RPT_SAMPLE_RATE_8821C(x) \ 18059 (((x) >> BIT_SHIFT_BT_RPT_SAMPLE_RATE_8821C) & \ 18060 BIT_MASK_BT_RPT_SAMPLE_RATE_8821C) 18061 #define BIT_SET_BT_RPT_SAMPLE_RATE_8821C(x, v) \ 18062 (BIT_CLEAR_BT_RPT_SAMPLE_RATE_8821C(x) | \ 18063 BIT_BT_RPT_SAMPLE_RATE_8821C(v)) 18064 18065 /* 2 REG_BT_ACT_REGISTER_8821C */ 18066 18067 #define BIT_SHIFT_BT_EISR_EN_8821C 16 18068 #define BIT_MASK_BT_EISR_EN_8821C 0xff 18069 #define BIT_BT_EISR_EN_8821C(x) \ 18070 (((x) & BIT_MASK_BT_EISR_EN_8821C) << BIT_SHIFT_BT_EISR_EN_8821C) 18071 #define BITS_BT_EISR_EN_8821C \ 18072 (BIT_MASK_BT_EISR_EN_8821C << BIT_SHIFT_BT_EISR_EN_8821C) 18073 #define BIT_CLEAR_BT_EISR_EN_8821C(x) ((x) & (~BITS_BT_EISR_EN_8821C)) 18074 #define BIT_GET_BT_EISR_EN_8821C(x) \ 18075 (((x) >> BIT_SHIFT_BT_EISR_EN_8821C) & BIT_MASK_BT_EISR_EN_8821C) 18076 #define BIT_SET_BT_EISR_EN_8821C(x, v) \ 18077 (BIT_CLEAR_BT_EISR_EN_8821C(x) | BIT_BT_EISR_EN_8821C(v)) 18078 18079 #define BIT_BT_ACT_FALLING_ISR_8821C BIT(10) 18080 #define BIT_BT_ACT_RISING_ISR_8821C BIT(9) 18081 #define BIT_TDMA_TO_ISR_8821C BIT(8) 18082 18083 #define BIT_SHIFT_BT_CH_8821C 0 18084 #define BIT_MASK_BT_CH_8821C 0xff 18085 #define BIT_BT_CH_8821C(x) \ 18086 (((x) & BIT_MASK_BT_CH_8821C) << BIT_SHIFT_BT_CH_8821C) 18087 #define BITS_BT_CH_8821C (BIT_MASK_BT_CH_8821C << BIT_SHIFT_BT_CH_8821C) 18088 #define BIT_CLEAR_BT_CH_8821C(x) ((x) & (~BITS_BT_CH_8821C)) 18089 #define BIT_GET_BT_CH_8821C(x) \ 18090 (((x) >> BIT_SHIFT_BT_CH_8821C) & BIT_MASK_BT_CH_8821C) 18091 #define BIT_SET_BT_CH_8821C(x, v) \ 18092 (BIT_CLEAR_BT_CH_8821C(x) | BIT_BT_CH_8821C(v)) 18093 18094 /* 2 REG_OBFF_CTRL_BASIC_8821C */ 18095 #define BIT_OBFF_EN_V1_8821C BIT(31) 18096 18097 #define BIT_SHIFT_OBFF_STATE_V1_8821C 28 18098 #define BIT_MASK_OBFF_STATE_V1_8821C 0x3 18099 #define BIT_OBFF_STATE_V1_8821C(x) \ 18100 (((x) & BIT_MASK_OBFF_STATE_V1_8821C) << BIT_SHIFT_OBFF_STATE_V1_8821C) 18101 #define BITS_OBFF_STATE_V1_8821C \ 18102 (BIT_MASK_OBFF_STATE_V1_8821C << BIT_SHIFT_OBFF_STATE_V1_8821C) 18103 #define BIT_CLEAR_OBFF_STATE_V1_8821C(x) ((x) & (~BITS_OBFF_STATE_V1_8821C)) 18104 #define BIT_GET_OBFF_STATE_V1_8821C(x) \ 18105 (((x) >> BIT_SHIFT_OBFF_STATE_V1_8821C) & BIT_MASK_OBFF_STATE_V1_8821C) 18106 #define BIT_SET_OBFF_STATE_V1_8821C(x, v) \ 18107 (BIT_CLEAR_OBFF_STATE_V1_8821C(x) | BIT_OBFF_STATE_V1_8821C(v)) 18108 18109 #define BIT_OBFF_ACT_RXDMA_EN_8821C BIT(27) 18110 #define BIT_OBFF_BLOCK_INT_EN_8821C BIT(26) 18111 #define BIT_OBFF_AUTOACT_EN_8821C BIT(25) 18112 #define BIT_OBFF_AUTOIDLE_EN_8821C BIT(24) 18113 18114 #define BIT_SHIFT_WAKE_MAX_PLS_8821C 20 18115 #define BIT_MASK_WAKE_MAX_PLS_8821C 0x7 18116 #define BIT_WAKE_MAX_PLS_8821C(x) \ 18117 (((x) & BIT_MASK_WAKE_MAX_PLS_8821C) << BIT_SHIFT_WAKE_MAX_PLS_8821C) 18118 #define BITS_WAKE_MAX_PLS_8821C \ 18119 (BIT_MASK_WAKE_MAX_PLS_8821C << BIT_SHIFT_WAKE_MAX_PLS_8821C) 18120 #define BIT_CLEAR_WAKE_MAX_PLS_8821C(x) ((x) & (~BITS_WAKE_MAX_PLS_8821C)) 18121 #define BIT_GET_WAKE_MAX_PLS_8821C(x) \ 18122 (((x) >> BIT_SHIFT_WAKE_MAX_PLS_8821C) & BIT_MASK_WAKE_MAX_PLS_8821C) 18123 #define BIT_SET_WAKE_MAX_PLS_8821C(x, v) \ 18124 (BIT_CLEAR_WAKE_MAX_PLS_8821C(x) | BIT_WAKE_MAX_PLS_8821C(v)) 18125 18126 #define BIT_SHIFT_WAKE_MIN_PLS_8821C 16 18127 #define BIT_MASK_WAKE_MIN_PLS_8821C 0x7 18128 #define BIT_WAKE_MIN_PLS_8821C(x) \ 18129 (((x) & BIT_MASK_WAKE_MIN_PLS_8821C) << BIT_SHIFT_WAKE_MIN_PLS_8821C) 18130 #define BITS_WAKE_MIN_PLS_8821C \ 18131 (BIT_MASK_WAKE_MIN_PLS_8821C << BIT_SHIFT_WAKE_MIN_PLS_8821C) 18132 #define BIT_CLEAR_WAKE_MIN_PLS_8821C(x) ((x) & (~BITS_WAKE_MIN_PLS_8821C)) 18133 #define BIT_GET_WAKE_MIN_PLS_8821C(x) \ 18134 (((x) >> BIT_SHIFT_WAKE_MIN_PLS_8821C) & BIT_MASK_WAKE_MIN_PLS_8821C) 18135 #define BIT_SET_WAKE_MIN_PLS_8821C(x, v) \ 18136 (BIT_CLEAR_WAKE_MIN_PLS_8821C(x) | BIT_WAKE_MIN_PLS_8821C(v)) 18137 18138 #define BIT_SHIFT_WAKE_MAX_F2F_8821C 12 18139 #define BIT_MASK_WAKE_MAX_F2F_8821C 0x7 18140 #define BIT_WAKE_MAX_F2F_8821C(x) \ 18141 (((x) & BIT_MASK_WAKE_MAX_F2F_8821C) << BIT_SHIFT_WAKE_MAX_F2F_8821C) 18142 #define BITS_WAKE_MAX_F2F_8821C \ 18143 (BIT_MASK_WAKE_MAX_F2F_8821C << BIT_SHIFT_WAKE_MAX_F2F_8821C) 18144 #define BIT_CLEAR_WAKE_MAX_F2F_8821C(x) ((x) & (~BITS_WAKE_MAX_F2F_8821C)) 18145 #define BIT_GET_WAKE_MAX_F2F_8821C(x) \ 18146 (((x) >> BIT_SHIFT_WAKE_MAX_F2F_8821C) & BIT_MASK_WAKE_MAX_F2F_8821C) 18147 #define BIT_SET_WAKE_MAX_F2F_8821C(x, v) \ 18148 (BIT_CLEAR_WAKE_MAX_F2F_8821C(x) | BIT_WAKE_MAX_F2F_8821C(v)) 18149 18150 #define BIT_SHIFT_WAKE_MIN_F2F_8821C 8 18151 #define BIT_MASK_WAKE_MIN_F2F_8821C 0x7 18152 #define BIT_WAKE_MIN_F2F_8821C(x) \ 18153 (((x) & BIT_MASK_WAKE_MIN_F2F_8821C) << BIT_SHIFT_WAKE_MIN_F2F_8821C) 18154 #define BITS_WAKE_MIN_F2F_8821C \ 18155 (BIT_MASK_WAKE_MIN_F2F_8821C << BIT_SHIFT_WAKE_MIN_F2F_8821C) 18156 #define BIT_CLEAR_WAKE_MIN_F2F_8821C(x) ((x) & (~BITS_WAKE_MIN_F2F_8821C)) 18157 #define BIT_GET_WAKE_MIN_F2F_8821C(x) \ 18158 (((x) >> BIT_SHIFT_WAKE_MIN_F2F_8821C) & BIT_MASK_WAKE_MIN_F2F_8821C) 18159 #define BIT_SET_WAKE_MIN_F2F_8821C(x, v) \ 18160 (BIT_CLEAR_WAKE_MIN_F2F_8821C(x) | BIT_WAKE_MIN_F2F_8821C(v)) 18161 18162 #define BIT_APP_CPU_ACT_V1_8821C BIT(3) 18163 #define BIT_APP_OBFF_V1_8821C BIT(2) 18164 #define BIT_APP_IDLE_V1_8821C BIT(1) 18165 #define BIT_APP_INIT_V1_8821C BIT(0) 18166 18167 /* 2 REG_OBFF_CTRL2_TIMER_8821C */ 18168 18169 #define BIT_SHIFT_RX_HIGH_TIMER_IDX_8821C 24 18170 #define BIT_MASK_RX_HIGH_TIMER_IDX_8821C 0x7 18171 #define BIT_RX_HIGH_TIMER_IDX_8821C(x) \ 18172 (((x) & BIT_MASK_RX_HIGH_TIMER_IDX_8821C) \ 18173 << BIT_SHIFT_RX_HIGH_TIMER_IDX_8821C) 18174 #define BITS_RX_HIGH_TIMER_IDX_8821C \ 18175 (BIT_MASK_RX_HIGH_TIMER_IDX_8821C << BIT_SHIFT_RX_HIGH_TIMER_IDX_8821C) 18176 #define BIT_CLEAR_RX_HIGH_TIMER_IDX_8821C(x) \ 18177 ((x) & (~BITS_RX_HIGH_TIMER_IDX_8821C)) 18178 #define BIT_GET_RX_HIGH_TIMER_IDX_8821C(x) \ 18179 (((x) >> BIT_SHIFT_RX_HIGH_TIMER_IDX_8821C) & \ 18180 BIT_MASK_RX_HIGH_TIMER_IDX_8821C) 18181 #define BIT_SET_RX_HIGH_TIMER_IDX_8821C(x, v) \ 18182 (BIT_CLEAR_RX_HIGH_TIMER_IDX_8821C(x) | BIT_RX_HIGH_TIMER_IDX_8821C(v)) 18183 18184 #define BIT_SHIFT_RX_MED_TIMER_IDX_8821C 16 18185 #define BIT_MASK_RX_MED_TIMER_IDX_8821C 0x7 18186 #define BIT_RX_MED_TIMER_IDX_8821C(x) \ 18187 (((x) & BIT_MASK_RX_MED_TIMER_IDX_8821C) \ 18188 << BIT_SHIFT_RX_MED_TIMER_IDX_8821C) 18189 #define BITS_RX_MED_TIMER_IDX_8821C \ 18190 (BIT_MASK_RX_MED_TIMER_IDX_8821C << BIT_SHIFT_RX_MED_TIMER_IDX_8821C) 18191 #define BIT_CLEAR_RX_MED_TIMER_IDX_8821C(x) \ 18192 ((x) & (~BITS_RX_MED_TIMER_IDX_8821C)) 18193 #define BIT_GET_RX_MED_TIMER_IDX_8821C(x) \ 18194 (((x) >> BIT_SHIFT_RX_MED_TIMER_IDX_8821C) & \ 18195 BIT_MASK_RX_MED_TIMER_IDX_8821C) 18196 #define BIT_SET_RX_MED_TIMER_IDX_8821C(x, v) \ 18197 (BIT_CLEAR_RX_MED_TIMER_IDX_8821C(x) | BIT_RX_MED_TIMER_IDX_8821C(v)) 18198 18199 #define BIT_SHIFT_RX_LOW_TIMER_IDX_8821C 8 18200 #define BIT_MASK_RX_LOW_TIMER_IDX_8821C 0x7 18201 #define BIT_RX_LOW_TIMER_IDX_8821C(x) \ 18202 (((x) & BIT_MASK_RX_LOW_TIMER_IDX_8821C) \ 18203 << BIT_SHIFT_RX_LOW_TIMER_IDX_8821C) 18204 #define BITS_RX_LOW_TIMER_IDX_8821C \ 18205 (BIT_MASK_RX_LOW_TIMER_IDX_8821C << BIT_SHIFT_RX_LOW_TIMER_IDX_8821C) 18206 #define BIT_CLEAR_RX_LOW_TIMER_IDX_8821C(x) \ 18207 ((x) & (~BITS_RX_LOW_TIMER_IDX_8821C)) 18208 #define BIT_GET_RX_LOW_TIMER_IDX_8821C(x) \ 18209 (((x) >> BIT_SHIFT_RX_LOW_TIMER_IDX_8821C) & \ 18210 BIT_MASK_RX_LOW_TIMER_IDX_8821C) 18211 #define BIT_SET_RX_LOW_TIMER_IDX_8821C(x, v) \ 18212 (BIT_CLEAR_RX_LOW_TIMER_IDX_8821C(x) | BIT_RX_LOW_TIMER_IDX_8821C(v)) 18213 18214 #define BIT_SHIFT_OBFF_INT_TIMER_IDX_8821C 0 18215 #define BIT_MASK_OBFF_INT_TIMER_IDX_8821C 0x7 18216 #define BIT_OBFF_INT_TIMER_IDX_8821C(x) \ 18217 (((x) & BIT_MASK_OBFF_INT_TIMER_IDX_8821C) \ 18218 << BIT_SHIFT_OBFF_INT_TIMER_IDX_8821C) 18219 #define BITS_OBFF_INT_TIMER_IDX_8821C \ 18220 (BIT_MASK_OBFF_INT_TIMER_IDX_8821C \ 18221 << BIT_SHIFT_OBFF_INT_TIMER_IDX_8821C) 18222 #define BIT_CLEAR_OBFF_INT_TIMER_IDX_8821C(x) \ 18223 ((x) & (~BITS_OBFF_INT_TIMER_IDX_8821C)) 18224 #define BIT_GET_OBFF_INT_TIMER_IDX_8821C(x) \ 18225 (((x) >> BIT_SHIFT_OBFF_INT_TIMER_IDX_8821C) & \ 18226 BIT_MASK_OBFF_INT_TIMER_IDX_8821C) 18227 #define BIT_SET_OBFF_INT_TIMER_IDX_8821C(x, v) \ 18228 (BIT_CLEAR_OBFF_INT_TIMER_IDX_8821C(x) | \ 18229 BIT_OBFF_INT_TIMER_IDX_8821C(v)) 18230 18231 /* 2 REG_LTR_CTRL_BASIC_8821C */ 18232 #define BIT_LTR_EN_V1_8821C BIT(31) 18233 #define BIT_LTR_HW_EN_V1_8821C BIT(30) 18234 #define BIT_LRT_ACT_CTS_EN_8821C BIT(29) 18235 #define BIT_LTR_ACT_RXPKT_EN_8821C BIT(28) 18236 #define BIT_LTR_ACT_RXDMA_EN_8821C BIT(27) 18237 #define BIT_LTR_IDLE_NO_SNOOP_8821C BIT(26) 18238 #define BIT_SPDUP_MGTPKT_8821C BIT(25) 18239 #define BIT_RX_AGG_EN_8821C BIT(24) 18240 #define BIT_APP_LTR_ACT_8821C BIT(23) 18241 #define BIT_APP_LTR_IDLE_8821C BIT(22) 18242 18243 #define BIT_SHIFT_HIGH_RATE_TRIG_SEL_8821C 20 18244 #define BIT_MASK_HIGH_RATE_TRIG_SEL_8821C 0x3 18245 #define BIT_HIGH_RATE_TRIG_SEL_8821C(x) \ 18246 (((x) & BIT_MASK_HIGH_RATE_TRIG_SEL_8821C) \ 18247 << BIT_SHIFT_HIGH_RATE_TRIG_SEL_8821C) 18248 #define BITS_HIGH_RATE_TRIG_SEL_8821C \ 18249 (BIT_MASK_HIGH_RATE_TRIG_SEL_8821C \ 18250 << BIT_SHIFT_HIGH_RATE_TRIG_SEL_8821C) 18251 #define BIT_CLEAR_HIGH_RATE_TRIG_SEL_8821C(x) \ 18252 ((x) & (~BITS_HIGH_RATE_TRIG_SEL_8821C)) 18253 #define BIT_GET_HIGH_RATE_TRIG_SEL_8821C(x) \ 18254 (((x) >> BIT_SHIFT_HIGH_RATE_TRIG_SEL_8821C) & \ 18255 BIT_MASK_HIGH_RATE_TRIG_SEL_8821C) 18256 #define BIT_SET_HIGH_RATE_TRIG_SEL_8821C(x, v) \ 18257 (BIT_CLEAR_HIGH_RATE_TRIG_SEL_8821C(x) | \ 18258 BIT_HIGH_RATE_TRIG_SEL_8821C(v)) 18259 18260 #define BIT_SHIFT_MED_RATE_TRIG_SEL_8821C 18 18261 #define BIT_MASK_MED_RATE_TRIG_SEL_8821C 0x3 18262 #define BIT_MED_RATE_TRIG_SEL_8821C(x) \ 18263 (((x) & BIT_MASK_MED_RATE_TRIG_SEL_8821C) \ 18264 << BIT_SHIFT_MED_RATE_TRIG_SEL_8821C) 18265 #define BITS_MED_RATE_TRIG_SEL_8821C \ 18266 (BIT_MASK_MED_RATE_TRIG_SEL_8821C << BIT_SHIFT_MED_RATE_TRIG_SEL_8821C) 18267 #define BIT_CLEAR_MED_RATE_TRIG_SEL_8821C(x) \ 18268 ((x) & (~BITS_MED_RATE_TRIG_SEL_8821C)) 18269 #define BIT_GET_MED_RATE_TRIG_SEL_8821C(x) \ 18270 (((x) >> BIT_SHIFT_MED_RATE_TRIG_SEL_8821C) & \ 18271 BIT_MASK_MED_RATE_TRIG_SEL_8821C) 18272 #define BIT_SET_MED_RATE_TRIG_SEL_8821C(x, v) \ 18273 (BIT_CLEAR_MED_RATE_TRIG_SEL_8821C(x) | BIT_MED_RATE_TRIG_SEL_8821C(v)) 18274 18275 #define BIT_SHIFT_LOW_RATE_TRIG_SEL_8821C 16 18276 #define BIT_MASK_LOW_RATE_TRIG_SEL_8821C 0x3 18277 #define BIT_LOW_RATE_TRIG_SEL_8821C(x) \ 18278 (((x) & BIT_MASK_LOW_RATE_TRIG_SEL_8821C) \ 18279 << BIT_SHIFT_LOW_RATE_TRIG_SEL_8821C) 18280 #define BITS_LOW_RATE_TRIG_SEL_8821C \ 18281 (BIT_MASK_LOW_RATE_TRIG_SEL_8821C << BIT_SHIFT_LOW_RATE_TRIG_SEL_8821C) 18282 #define BIT_CLEAR_LOW_RATE_TRIG_SEL_8821C(x) \ 18283 ((x) & (~BITS_LOW_RATE_TRIG_SEL_8821C)) 18284 #define BIT_GET_LOW_RATE_TRIG_SEL_8821C(x) \ 18285 (((x) >> BIT_SHIFT_LOW_RATE_TRIG_SEL_8821C) & \ 18286 BIT_MASK_LOW_RATE_TRIG_SEL_8821C) 18287 #define BIT_SET_LOW_RATE_TRIG_SEL_8821C(x, v) \ 18288 (BIT_CLEAR_LOW_RATE_TRIG_SEL_8821C(x) | BIT_LOW_RATE_TRIG_SEL_8821C(v)) 18289 18290 #define BIT_SHIFT_HIGH_RATE_BD_IDX_8821C 8 18291 #define BIT_MASK_HIGH_RATE_BD_IDX_8821C 0x7f 18292 #define BIT_HIGH_RATE_BD_IDX_8821C(x) \ 18293 (((x) & BIT_MASK_HIGH_RATE_BD_IDX_8821C) \ 18294 << BIT_SHIFT_HIGH_RATE_BD_IDX_8821C) 18295 #define BITS_HIGH_RATE_BD_IDX_8821C \ 18296 (BIT_MASK_HIGH_RATE_BD_IDX_8821C << BIT_SHIFT_HIGH_RATE_BD_IDX_8821C) 18297 #define BIT_CLEAR_HIGH_RATE_BD_IDX_8821C(x) \ 18298 ((x) & (~BITS_HIGH_RATE_BD_IDX_8821C)) 18299 #define BIT_GET_HIGH_RATE_BD_IDX_8821C(x) \ 18300 (((x) >> BIT_SHIFT_HIGH_RATE_BD_IDX_8821C) & \ 18301 BIT_MASK_HIGH_RATE_BD_IDX_8821C) 18302 #define BIT_SET_HIGH_RATE_BD_IDX_8821C(x, v) \ 18303 (BIT_CLEAR_HIGH_RATE_BD_IDX_8821C(x) | BIT_HIGH_RATE_BD_IDX_8821C(v)) 18304 18305 #define BIT_SHIFT_LOW_RATE_BD_IDX_8821C 0 18306 #define BIT_MASK_LOW_RATE_BD_IDX_8821C 0x7f 18307 #define BIT_LOW_RATE_BD_IDX_8821C(x) \ 18308 (((x) & BIT_MASK_LOW_RATE_BD_IDX_8821C) \ 18309 << BIT_SHIFT_LOW_RATE_BD_IDX_8821C) 18310 #define BITS_LOW_RATE_BD_IDX_8821C \ 18311 (BIT_MASK_LOW_RATE_BD_IDX_8821C << BIT_SHIFT_LOW_RATE_BD_IDX_8821C) 18312 #define BIT_CLEAR_LOW_RATE_BD_IDX_8821C(x) ((x) & (~BITS_LOW_RATE_BD_IDX_8821C)) 18313 #define BIT_GET_LOW_RATE_BD_IDX_8821C(x) \ 18314 (((x) >> BIT_SHIFT_LOW_RATE_BD_IDX_8821C) & \ 18315 BIT_MASK_LOW_RATE_BD_IDX_8821C) 18316 #define BIT_SET_LOW_RATE_BD_IDX_8821C(x, v) \ 18317 (BIT_CLEAR_LOW_RATE_BD_IDX_8821C(x) | BIT_LOW_RATE_BD_IDX_8821C(v)) 18318 18319 /* 2 REG_LTR_CTRL2_TIMER_THRESHOLD_8821C */ 18320 18321 #define BIT_SHIFT_RX_EMPTY_TIMER_IDX_8821C 24 18322 #define BIT_MASK_RX_EMPTY_TIMER_IDX_8821C 0x7 18323 #define BIT_RX_EMPTY_TIMER_IDX_8821C(x) \ 18324 (((x) & BIT_MASK_RX_EMPTY_TIMER_IDX_8821C) \ 18325 << BIT_SHIFT_RX_EMPTY_TIMER_IDX_8821C) 18326 #define BITS_RX_EMPTY_TIMER_IDX_8821C \ 18327 (BIT_MASK_RX_EMPTY_TIMER_IDX_8821C \ 18328 << BIT_SHIFT_RX_EMPTY_TIMER_IDX_8821C) 18329 #define BIT_CLEAR_RX_EMPTY_TIMER_IDX_8821C(x) \ 18330 ((x) & (~BITS_RX_EMPTY_TIMER_IDX_8821C)) 18331 #define BIT_GET_RX_EMPTY_TIMER_IDX_8821C(x) \ 18332 (((x) >> BIT_SHIFT_RX_EMPTY_TIMER_IDX_8821C) & \ 18333 BIT_MASK_RX_EMPTY_TIMER_IDX_8821C) 18334 #define BIT_SET_RX_EMPTY_TIMER_IDX_8821C(x, v) \ 18335 (BIT_CLEAR_RX_EMPTY_TIMER_IDX_8821C(x) | \ 18336 BIT_RX_EMPTY_TIMER_IDX_8821C(v)) 18337 18338 #define BIT_SHIFT_RX_AFULL_TH_IDX_8821C 20 18339 #define BIT_MASK_RX_AFULL_TH_IDX_8821C 0x7 18340 #define BIT_RX_AFULL_TH_IDX_8821C(x) \ 18341 (((x) & BIT_MASK_RX_AFULL_TH_IDX_8821C) \ 18342 << BIT_SHIFT_RX_AFULL_TH_IDX_8821C) 18343 #define BITS_RX_AFULL_TH_IDX_8821C \ 18344 (BIT_MASK_RX_AFULL_TH_IDX_8821C << BIT_SHIFT_RX_AFULL_TH_IDX_8821C) 18345 #define BIT_CLEAR_RX_AFULL_TH_IDX_8821C(x) ((x) & (~BITS_RX_AFULL_TH_IDX_8821C)) 18346 #define BIT_GET_RX_AFULL_TH_IDX_8821C(x) \ 18347 (((x) >> BIT_SHIFT_RX_AFULL_TH_IDX_8821C) & \ 18348 BIT_MASK_RX_AFULL_TH_IDX_8821C) 18349 #define BIT_SET_RX_AFULL_TH_IDX_8821C(x, v) \ 18350 (BIT_CLEAR_RX_AFULL_TH_IDX_8821C(x) | BIT_RX_AFULL_TH_IDX_8821C(v)) 18351 18352 #define BIT_SHIFT_RX_HIGH_TH_IDX_8821C 16 18353 #define BIT_MASK_RX_HIGH_TH_IDX_8821C 0x7 18354 #define BIT_RX_HIGH_TH_IDX_8821C(x) \ 18355 (((x) & BIT_MASK_RX_HIGH_TH_IDX_8821C) \ 18356 << BIT_SHIFT_RX_HIGH_TH_IDX_8821C) 18357 #define BITS_RX_HIGH_TH_IDX_8821C \ 18358 (BIT_MASK_RX_HIGH_TH_IDX_8821C << BIT_SHIFT_RX_HIGH_TH_IDX_8821C) 18359 #define BIT_CLEAR_RX_HIGH_TH_IDX_8821C(x) ((x) & (~BITS_RX_HIGH_TH_IDX_8821C)) 18360 #define BIT_GET_RX_HIGH_TH_IDX_8821C(x) \ 18361 (((x) >> BIT_SHIFT_RX_HIGH_TH_IDX_8821C) & \ 18362 BIT_MASK_RX_HIGH_TH_IDX_8821C) 18363 #define BIT_SET_RX_HIGH_TH_IDX_8821C(x, v) \ 18364 (BIT_CLEAR_RX_HIGH_TH_IDX_8821C(x) | BIT_RX_HIGH_TH_IDX_8821C(v)) 18365 18366 #define BIT_SHIFT_RX_MED_TH_IDX_8821C 12 18367 #define BIT_MASK_RX_MED_TH_IDX_8821C 0x7 18368 #define BIT_RX_MED_TH_IDX_8821C(x) \ 18369 (((x) & BIT_MASK_RX_MED_TH_IDX_8821C) << BIT_SHIFT_RX_MED_TH_IDX_8821C) 18370 #define BITS_RX_MED_TH_IDX_8821C \ 18371 (BIT_MASK_RX_MED_TH_IDX_8821C << BIT_SHIFT_RX_MED_TH_IDX_8821C) 18372 #define BIT_CLEAR_RX_MED_TH_IDX_8821C(x) ((x) & (~BITS_RX_MED_TH_IDX_8821C)) 18373 #define BIT_GET_RX_MED_TH_IDX_8821C(x) \ 18374 (((x) >> BIT_SHIFT_RX_MED_TH_IDX_8821C) & BIT_MASK_RX_MED_TH_IDX_8821C) 18375 #define BIT_SET_RX_MED_TH_IDX_8821C(x, v) \ 18376 (BIT_CLEAR_RX_MED_TH_IDX_8821C(x) | BIT_RX_MED_TH_IDX_8821C(v)) 18377 18378 #define BIT_SHIFT_RX_LOW_TH_IDX_8821C 8 18379 #define BIT_MASK_RX_LOW_TH_IDX_8821C 0x7 18380 #define BIT_RX_LOW_TH_IDX_8821C(x) \ 18381 (((x) & BIT_MASK_RX_LOW_TH_IDX_8821C) << BIT_SHIFT_RX_LOW_TH_IDX_8821C) 18382 #define BITS_RX_LOW_TH_IDX_8821C \ 18383 (BIT_MASK_RX_LOW_TH_IDX_8821C << BIT_SHIFT_RX_LOW_TH_IDX_8821C) 18384 #define BIT_CLEAR_RX_LOW_TH_IDX_8821C(x) ((x) & (~BITS_RX_LOW_TH_IDX_8821C)) 18385 #define BIT_GET_RX_LOW_TH_IDX_8821C(x) \ 18386 (((x) >> BIT_SHIFT_RX_LOW_TH_IDX_8821C) & BIT_MASK_RX_LOW_TH_IDX_8821C) 18387 #define BIT_SET_RX_LOW_TH_IDX_8821C(x, v) \ 18388 (BIT_CLEAR_RX_LOW_TH_IDX_8821C(x) | BIT_RX_LOW_TH_IDX_8821C(v)) 18389 18390 #define BIT_SHIFT_LTR_SPACE_IDX_8821C 4 18391 #define BIT_MASK_LTR_SPACE_IDX_8821C 0x3 18392 #define BIT_LTR_SPACE_IDX_8821C(x) \ 18393 (((x) & BIT_MASK_LTR_SPACE_IDX_8821C) << BIT_SHIFT_LTR_SPACE_IDX_8821C) 18394 #define BITS_LTR_SPACE_IDX_8821C \ 18395 (BIT_MASK_LTR_SPACE_IDX_8821C << BIT_SHIFT_LTR_SPACE_IDX_8821C) 18396 #define BIT_CLEAR_LTR_SPACE_IDX_8821C(x) ((x) & (~BITS_LTR_SPACE_IDX_8821C)) 18397 #define BIT_GET_LTR_SPACE_IDX_8821C(x) \ 18398 (((x) >> BIT_SHIFT_LTR_SPACE_IDX_8821C) & BIT_MASK_LTR_SPACE_IDX_8821C) 18399 #define BIT_SET_LTR_SPACE_IDX_8821C(x, v) \ 18400 (BIT_CLEAR_LTR_SPACE_IDX_8821C(x) | BIT_LTR_SPACE_IDX_8821C(v)) 18401 18402 #define BIT_SHIFT_LTR_IDLE_TIMER_IDX_8821C 0 18403 #define BIT_MASK_LTR_IDLE_TIMER_IDX_8821C 0x7 18404 #define BIT_LTR_IDLE_TIMER_IDX_8821C(x) \ 18405 (((x) & BIT_MASK_LTR_IDLE_TIMER_IDX_8821C) \ 18406 << BIT_SHIFT_LTR_IDLE_TIMER_IDX_8821C) 18407 #define BITS_LTR_IDLE_TIMER_IDX_8821C \ 18408 (BIT_MASK_LTR_IDLE_TIMER_IDX_8821C \ 18409 << BIT_SHIFT_LTR_IDLE_TIMER_IDX_8821C) 18410 #define BIT_CLEAR_LTR_IDLE_TIMER_IDX_8821C(x) \ 18411 ((x) & (~BITS_LTR_IDLE_TIMER_IDX_8821C)) 18412 #define BIT_GET_LTR_IDLE_TIMER_IDX_8821C(x) \ 18413 (((x) >> BIT_SHIFT_LTR_IDLE_TIMER_IDX_8821C) & \ 18414 BIT_MASK_LTR_IDLE_TIMER_IDX_8821C) 18415 #define BIT_SET_LTR_IDLE_TIMER_IDX_8821C(x, v) \ 18416 (BIT_CLEAR_LTR_IDLE_TIMER_IDX_8821C(x) | \ 18417 BIT_LTR_IDLE_TIMER_IDX_8821C(v)) 18418 18419 /* 2 REG_LTR_IDLE_LATENCY_V1_8821C */ 18420 18421 #define BIT_SHIFT_LTR_IDLE_L_8821C 0 18422 #define BIT_MASK_LTR_IDLE_L_8821C 0xffffffffL 18423 #define BIT_LTR_IDLE_L_8821C(x) \ 18424 (((x) & BIT_MASK_LTR_IDLE_L_8821C) << BIT_SHIFT_LTR_IDLE_L_8821C) 18425 #define BITS_LTR_IDLE_L_8821C \ 18426 (BIT_MASK_LTR_IDLE_L_8821C << BIT_SHIFT_LTR_IDLE_L_8821C) 18427 #define BIT_CLEAR_LTR_IDLE_L_8821C(x) ((x) & (~BITS_LTR_IDLE_L_8821C)) 18428 #define BIT_GET_LTR_IDLE_L_8821C(x) \ 18429 (((x) >> BIT_SHIFT_LTR_IDLE_L_8821C) & BIT_MASK_LTR_IDLE_L_8821C) 18430 #define BIT_SET_LTR_IDLE_L_8821C(x, v) \ 18431 (BIT_CLEAR_LTR_IDLE_L_8821C(x) | BIT_LTR_IDLE_L_8821C(v)) 18432 18433 /* 2 REG_LTR_ACTIVE_LATENCY_V1_8821C */ 18434 18435 #define BIT_SHIFT_LTR_ACT_L_8821C 0 18436 #define BIT_MASK_LTR_ACT_L_8821C 0xffffffffL 18437 #define BIT_LTR_ACT_L_8821C(x) \ 18438 (((x) & BIT_MASK_LTR_ACT_L_8821C) << BIT_SHIFT_LTR_ACT_L_8821C) 18439 #define BITS_LTR_ACT_L_8821C \ 18440 (BIT_MASK_LTR_ACT_L_8821C << BIT_SHIFT_LTR_ACT_L_8821C) 18441 #define BIT_CLEAR_LTR_ACT_L_8821C(x) ((x) & (~BITS_LTR_ACT_L_8821C)) 18442 #define BIT_GET_LTR_ACT_L_8821C(x) \ 18443 (((x) >> BIT_SHIFT_LTR_ACT_L_8821C) & BIT_MASK_LTR_ACT_L_8821C) 18444 #define BIT_SET_LTR_ACT_L_8821C(x, v) \ 18445 (BIT_CLEAR_LTR_ACT_L_8821C(x) | BIT_LTR_ACT_L_8821C(v)) 18446 18447 /* 2 REG_ANTENNA_TRAINING_CONTROL_REGISTER_8821C */ 18448 18449 #define BIT_SHIFT_TRAIN_STA_ADDR_0_8821C 0 18450 #define BIT_MASK_TRAIN_STA_ADDR_0_8821C 0xffffffffL 18451 #define BIT_TRAIN_STA_ADDR_0_8821C(x) \ 18452 (((x) & BIT_MASK_TRAIN_STA_ADDR_0_8821C) \ 18453 << BIT_SHIFT_TRAIN_STA_ADDR_0_8821C) 18454 #define BITS_TRAIN_STA_ADDR_0_8821C \ 18455 (BIT_MASK_TRAIN_STA_ADDR_0_8821C << BIT_SHIFT_TRAIN_STA_ADDR_0_8821C) 18456 #define BIT_CLEAR_TRAIN_STA_ADDR_0_8821C(x) \ 18457 ((x) & (~BITS_TRAIN_STA_ADDR_0_8821C)) 18458 #define BIT_GET_TRAIN_STA_ADDR_0_8821C(x) \ 18459 (((x) >> BIT_SHIFT_TRAIN_STA_ADDR_0_8821C) & \ 18460 BIT_MASK_TRAIN_STA_ADDR_0_8821C) 18461 #define BIT_SET_TRAIN_STA_ADDR_0_8821C(x, v) \ 18462 (BIT_CLEAR_TRAIN_STA_ADDR_0_8821C(x) | BIT_TRAIN_STA_ADDR_0_8821C(v)) 18463 18464 /* 2 REG_ANTENNA_TRAINING_CONTROL_REGISTER_1_8821C */ 18465 #define BIT_APPEND_MACID_IN_RESP_EN_1_8821C BIT(18) 18466 #define BIT_ADDR2_MATCH_EN_1_8821C BIT(17) 18467 #define BIT_ANTTRN_EN_1_8821C BIT(16) 18468 18469 #define BIT_SHIFT_TRAIN_STA_ADDR_1_8821C 0 18470 #define BIT_MASK_TRAIN_STA_ADDR_1_8821C 0xffff 18471 #define BIT_TRAIN_STA_ADDR_1_8821C(x) \ 18472 (((x) & BIT_MASK_TRAIN_STA_ADDR_1_8821C) \ 18473 << BIT_SHIFT_TRAIN_STA_ADDR_1_8821C) 18474 #define BITS_TRAIN_STA_ADDR_1_8821C \ 18475 (BIT_MASK_TRAIN_STA_ADDR_1_8821C << BIT_SHIFT_TRAIN_STA_ADDR_1_8821C) 18476 #define BIT_CLEAR_TRAIN_STA_ADDR_1_8821C(x) \ 18477 ((x) & (~BITS_TRAIN_STA_ADDR_1_8821C)) 18478 #define BIT_GET_TRAIN_STA_ADDR_1_8821C(x) \ 18479 (((x) >> BIT_SHIFT_TRAIN_STA_ADDR_1_8821C) & \ 18480 BIT_MASK_TRAIN_STA_ADDR_1_8821C) 18481 #define BIT_SET_TRAIN_STA_ADDR_1_8821C(x, v) \ 18482 (BIT_CLEAR_TRAIN_STA_ADDR_1_8821C(x) | BIT_TRAIN_STA_ADDR_1_8821C(v)) 18483 18484 /* 2 REG_WMAC_PKTCNT_RWD_8821C */ 18485 18486 #define BIT_SHIFT_PKTCNT_BSSIDMAP_8821C 4 18487 #define BIT_MASK_PKTCNT_BSSIDMAP_8821C 0xf 18488 #define BIT_PKTCNT_BSSIDMAP_8821C(x) \ 18489 (((x) & BIT_MASK_PKTCNT_BSSIDMAP_8821C) \ 18490 << BIT_SHIFT_PKTCNT_BSSIDMAP_8821C) 18491 #define BITS_PKTCNT_BSSIDMAP_8821C \ 18492 (BIT_MASK_PKTCNT_BSSIDMAP_8821C << BIT_SHIFT_PKTCNT_BSSIDMAP_8821C) 18493 #define BIT_CLEAR_PKTCNT_BSSIDMAP_8821C(x) ((x) & (~BITS_PKTCNT_BSSIDMAP_8821C)) 18494 #define BIT_GET_PKTCNT_BSSIDMAP_8821C(x) \ 18495 (((x) >> BIT_SHIFT_PKTCNT_BSSIDMAP_8821C) & \ 18496 BIT_MASK_PKTCNT_BSSIDMAP_8821C) 18497 #define BIT_SET_PKTCNT_BSSIDMAP_8821C(x, v) \ 18498 (BIT_CLEAR_PKTCNT_BSSIDMAP_8821C(x) | BIT_PKTCNT_BSSIDMAP_8821C(v)) 18499 18500 #define BIT_PKTCNT_CNTRST_8821C BIT(1) 18501 #define BIT_PKTCNT_CNTEN_8821C BIT(0) 18502 18503 /* 2 REG_WMAC_PKTCNT_CTRL_8821C */ 18504 #define BIT_WMAC_PKTCNT_TRST_8821C BIT(9) 18505 #define BIT_WMAC_PKTCNT_FEN_8821C BIT(8) 18506 18507 #define BIT_SHIFT_WMAC_PKTCNT_CFGAD_8821C 0 18508 #define BIT_MASK_WMAC_PKTCNT_CFGAD_8821C 0xff 18509 #define BIT_WMAC_PKTCNT_CFGAD_8821C(x) \ 18510 (((x) & BIT_MASK_WMAC_PKTCNT_CFGAD_8821C) \ 18511 << BIT_SHIFT_WMAC_PKTCNT_CFGAD_8821C) 18512 #define BITS_WMAC_PKTCNT_CFGAD_8821C \ 18513 (BIT_MASK_WMAC_PKTCNT_CFGAD_8821C << BIT_SHIFT_WMAC_PKTCNT_CFGAD_8821C) 18514 #define BIT_CLEAR_WMAC_PKTCNT_CFGAD_8821C(x) \ 18515 ((x) & (~BITS_WMAC_PKTCNT_CFGAD_8821C)) 18516 #define BIT_GET_WMAC_PKTCNT_CFGAD_8821C(x) \ 18517 (((x) >> BIT_SHIFT_WMAC_PKTCNT_CFGAD_8821C) & \ 18518 BIT_MASK_WMAC_PKTCNT_CFGAD_8821C) 18519 #define BIT_SET_WMAC_PKTCNT_CFGAD_8821C(x, v) \ 18520 (BIT_CLEAR_WMAC_PKTCNT_CFGAD_8821C(x) | BIT_WMAC_PKTCNT_CFGAD_8821C(v)) 18521 18522 /* 2 REG_IQ_DUMP_8821C */ 18523 18524 #define BIT_SHIFT_DUMP_OK_ADDR_8821C 16 18525 #define BIT_MASK_DUMP_OK_ADDR_8821C 0xffff 18526 #define BIT_DUMP_OK_ADDR_8821C(x) \ 18527 (((x) & BIT_MASK_DUMP_OK_ADDR_8821C) << BIT_SHIFT_DUMP_OK_ADDR_8821C) 18528 #define BITS_DUMP_OK_ADDR_8821C \ 18529 (BIT_MASK_DUMP_OK_ADDR_8821C << BIT_SHIFT_DUMP_OK_ADDR_8821C) 18530 #define BIT_CLEAR_DUMP_OK_ADDR_8821C(x) ((x) & (~BITS_DUMP_OK_ADDR_8821C)) 18531 #define BIT_GET_DUMP_OK_ADDR_8821C(x) \ 18532 (((x) >> BIT_SHIFT_DUMP_OK_ADDR_8821C) & BIT_MASK_DUMP_OK_ADDR_8821C) 18533 #define BIT_SET_DUMP_OK_ADDR_8821C(x, v) \ 18534 (BIT_CLEAR_DUMP_OK_ADDR_8821C(x) | BIT_DUMP_OK_ADDR_8821C(v)) 18535 18536 #define BIT_SHIFT_R_TRIG_TIME_SEL_8821C 8 18537 #define BIT_MASK_R_TRIG_TIME_SEL_8821C 0x7f 18538 #define BIT_R_TRIG_TIME_SEL_8821C(x) \ 18539 (((x) & BIT_MASK_R_TRIG_TIME_SEL_8821C) \ 18540 << BIT_SHIFT_R_TRIG_TIME_SEL_8821C) 18541 #define BITS_R_TRIG_TIME_SEL_8821C \ 18542 (BIT_MASK_R_TRIG_TIME_SEL_8821C << BIT_SHIFT_R_TRIG_TIME_SEL_8821C) 18543 #define BIT_CLEAR_R_TRIG_TIME_SEL_8821C(x) ((x) & (~BITS_R_TRIG_TIME_SEL_8821C)) 18544 #define BIT_GET_R_TRIG_TIME_SEL_8821C(x) \ 18545 (((x) >> BIT_SHIFT_R_TRIG_TIME_SEL_8821C) & \ 18546 BIT_MASK_R_TRIG_TIME_SEL_8821C) 18547 #define BIT_SET_R_TRIG_TIME_SEL_8821C(x, v) \ 18548 (BIT_CLEAR_R_TRIG_TIME_SEL_8821C(x) | BIT_R_TRIG_TIME_SEL_8821C(v)) 18549 18550 #define BIT_SHIFT_R_MAC_TRIG_SEL_8821C 6 18551 #define BIT_MASK_R_MAC_TRIG_SEL_8821C 0x3 18552 #define BIT_R_MAC_TRIG_SEL_8821C(x) \ 18553 (((x) & BIT_MASK_R_MAC_TRIG_SEL_8821C) \ 18554 << BIT_SHIFT_R_MAC_TRIG_SEL_8821C) 18555 #define BITS_R_MAC_TRIG_SEL_8821C \ 18556 (BIT_MASK_R_MAC_TRIG_SEL_8821C << BIT_SHIFT_R_MAC_TRIG_SEL_8821C) 18557 #define BIT_CLEAR_R_MAC_TRIG_SEL_8821C(x) ((x) & (~BITS_R_MAC_TRIG_SEL_8821C)) 18558 #define BIT_GET_R_MAC_TRIG_SEL_8821C(x) \ 18559 (((x) >> BIT_SHIFT_R_MAC_TRIG_SEL_8821C) & \ 18560 BIT_MASK_R_MAC_TRIG_SEL_8821C) 18561 #define BIT_SET_R_MAC_TRIG_SEL_8821C(x, v) \ 18562 (BIT_CLEAR_R_MAC_TRIG_SEL_8821C(x) | BIT_R_MAC_TRIG_SEL_8821C(v)) 18563 18564 #define BIT_MAC_TRIG_REG_8821C BIT(5) 18565 18566 #define BIT_SHIFT_R_LEVEL_PULSE_SEL_8821C 3 18567 #define BIT_MASK_R_LEVEL_PULSE_SEL_8821C 0x3 18568 #define BIT_R_LEVEL_PULSE_SEL_8821C(x) \ 18569 (((x) & BIT_MASK_R_LEVEL_PULSE_SEL_8821C) \ 18570 << BIT_SHIFT_R_LEVEL_PULSE_SEL_8821C) 18571 #define BITS_R_LEVEL_PULSE_SEL_8821C \ 18572 (BIT_MASK_R_LEVEL_PULSE_SEL_8821C << BIT_SHIFT_R_LEVEL_PULSE_SEL_8821C) 18573 #define BIT_CLEAR_R_LEVEL_PULSE_SEL_8821C(x) \ 18574 ((x) & (~BITS_R_LEVEL_PULSE_SEL_8821C)) 18575 #define BIT_GET_R_LEVEL_PULSE_SEL_8821C(x) \ 18576 (((x) >> BIT_SHIFT_R_LEVEL_PULSE_SEL_8821C) & \ 18577 BIT_MASK_R_LEVEL_PULSE_SEL_8821C) 18578 #define BIT_SET_R_LEVEL_PULSE_SEL_8821C(x, v) \ 18579 (BIT_CLEAR_R_LEVEL_PULSE_SEL_8821C(x) | BIT_R_LEVEL_PULSE_SEL_8821C(v)) 18580 18581 #define BIT_EN_LA_MAC_8821C BIT(2) 18582 #define BIT_R_EN_IQDUMP_8821C BIT(1) 18583 #define BIT_R_IQDATA_DUMP_8821C BIT(0) 18584 18585 /* 2 REG_IQ_DUMP_1_8821C */ 18586 18587 #define BIT_SHIFT_R_WMAC_MASK_LA_MAC_1_8821C 0 18588 #define BIT_MASK_R_WMAC_MASK_LA_MAC_1_8821C 0xffffffffL 18589 #define BIT_R_WMAC_MASK_LA_MAC_1_8821C(x) \ 18590 (((x) & BIT_MASK_R_WMAC_MASK_LA_MAC_1_8821C) \ 18591 << BIT_SHIFT_R_WMAC_MASK_LA_MAC_1_8821C) 18592 #define BITS_R_WMAC_MASK_LA_MAC_1_8821C \ 18593 (BIT_MASK_R_WMAC_MASK_LA_MAC_1_8821C \ 18594 << BIT_SHIFT_R_WMAC_MASK_LA_MAC_1_8821C) 18595 #define BIT_CLEAR_R_WMAC_MASK_LA_MAC_1_8821C(x) \ 18596 ((x) & (~BITS_R_WMAC_MASK_LA_MAC_1_8821C)) 18597 #define BIT_GET_R_WMAC_MASK_LA_MAC_1_8821C(x) \ 18598 (((x) >> BIT_SHIFT_R_WMAC_MASK_LA_MAC_1_8821C) & \ 18599 BIT_MASK_R_WMAC_MASK_LA_MAC_1_8821C) 18600 #define BIT_SET_R_WMAC_MASK_LA_MAC_1_8821C(x, v) \ 18601 (BIT_CLEAR_R_WMAC_MASK_LA_MAC_1_8821C(x) | \ 18602 BIT_R_WMAC_MASK_LA_MAC_1_8821C(v)) 18603 18604 /* 2 REG_IQ_DUMP_2_8821C */ 18605 18606 #define BIT_SHIFT_R_WMAC_MATCH_REF_MAC_2_8821C 0 18607 #define BIT_MASK_R_WMAC_MATCH_REF_MAC_2_8821C 0xffffffffL 18608 #define BIT_R_WMAC_MATCH_REF_MAC_2_8821C(x) \ 18609 (((x) & BIT_MASK_R_WMAC_MATCH_REF_MAC_2_8821C) \ 18610 << BIT_SHIFT_R_WMAC_MATCH_REF_MAC_2_8821C) 18611 #define BITS_R_WMAC_MATCH_REF_MAC_2_8821C \ 18612 (BIT_MASK_R_WMAC_MATCH_REF_MAC_2_8821C \ 18613 << BIT_SHIFT_R_WMAC_MATCH_REF_MAC_2_8821C) 18614 #define BIT_CLEAR_R_WMAC_MATCH_REF_MAC_2_8821C(x) \ 18615 ((x) & (~BITS_R_WMAC_MATCH_REF_MAC_2_8821C)) 18616 #define BIT_GET_R_WMAC_MATCH_REF_MAC_2_8821C(x) \ 18617 (((x) >> BIT_SHIFT_R_WMAC_MATCH_REF_MAC_2_8821C) & \ 18618 BIT_MASK_R_WMAC_MATCH_REF_MAC_2_8821C) 18619 #define BIT_SET_R_WMAC_MATCH_REF_MAC_2_8821C(x, v) \ 18620 (BIT_CLEAR_R_WMAC_MATCH_REF_MAC_2_8821C(x) | \ 18621 BIT_R_WMAC_MATCH_REF_MAC_2_8821C(v)) 18622 18623 /* 2 REG_WMAC_FTM_CTL_8821C */ 18624 #define BIT_RXFTM_TXACK_SC_8821C BIT(6) 18625 #define BIT_RXFTM_TXACK_BW_8821C BIT(5) 18626 #define BIT_RXFTM_EN_8821C BIT(3) 18627 #define BIT_RXFTMREQ_BYDRV_8821C BIT(2) 18628 #define BIT_RXFTMREQ_EN_8821C BIT(1) 18629 #define BIT_FTM_EN_8821C BIT(0) 18630 18631 /* 2 REG_WMAC_IQ_MDPK_FUNC_8821C */ 18632 18633 /* 2 REG_WMAC_OPTION_FUNCTION_8821C */ 18634 18635 #define BIT_SHIFT_R_OFDM_LEN_8821C 26 18636 #define BIT_MASK_R_OFDM_LEN_8821C 0x3f 18637 #define BIT_R_OFDM_LEN_8821C(x) \ 18638 (((x) & BIT_MASK_R_OFDM_LEN_8821C) << BIT_SHIFT_R_OFDM_LEN_8821C) 18639 #define BITS_R_OFDM_LEN_8821C \ 18640 (BIT_MASK_R_OFDM_LEN_8821C << BIT_SHIFT_R_OFDM_LEN_8821C) 18641 #define BIT_CLEAR_R_OFDM_LEN_8821C(x) ((x) & (~BITS_R_OFDM_LEN_8821C)) 18642 #define BIT_GET_R_OFDM_LEN_8821C(x) \ 18643 (((x) >> BIT_SHIFT_R_OFDM_LEN_8821C) & BIT_MASK_R_OFDM_LEN_8821C) 18644 #define BIT_SET_R_OFDM_LEN_8821C(x, v) \ 18645 (BIT_CLEAR_R_OFDM_LEN_8821C(x) | BIT_R_OFDM_LEN_8821C(v)) 18646 18647 #define BIT_SHIFT_R_CCK_LEN_8821C 0 18648 #define BIT_MASK_R_CCK_LEN_8821C 0xffff 18649 #define BIT_R_CCK_LEN_8821C(x) \ 18650 (((x) & BIT_MASK_R_CCK_LEN_8821C) << BIT_SHIFT_R_CCK_LEN_8821C) 18651 #define BITS_R_CCK_LEN_8821C \ 18652 (BIT_MASK_R_CCK_LEN_8821C << BIT_SHIFT_R_CCK_LEN_8821C) 18653 #define BIT_CLEAR_R_CCK_LEN_8821C(x) ((x) & (~BITS_R_CCK_LEN_8821C)) 18654 #define BIT_GET_R_CCK_LEN_8821C(x) \ 18655 (((x) >> BIT_SHIFT_R_CCK_LEN_8821C) & BIT_MASK_R_CCK_LEN_8821C) 18656 #define BIT_SET_R_CCK_LEN_8821C(x, v) \ 18657 (BIT_CLEAR_R_CCK_LEN_8821C(x) | BIT_R_CCK_LEN_8821C(v)) 18658 18659 /* 2 REG_WMAC_OPTION_FUNCTION_1_8821C */ 18660 18661 #define BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_1_8821C 24 18662 #define BIT_MASK_R_WMAC_RXFIFO_FULL_TH_1_8821C 0xff 18663 #define BIT_R_WMAC_RXFIFO_FULL_TH_1_8821C(x) \ 18664 (((x) & BIT_MASK_R_WMAC_RXFIFO_FULL_TH_1_8821C) \ 18665 << BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_1_8821C) 18666 #define BITS_R_WMAC_RXFIFO_FULL_TH_1_8821C \ 18667 (BIT_MASK_R_WMAC_RXFIFO_FULL_TH_1_8821C \ 18668 << BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_1_8821C) 18669 #define BIT_CLEAR_R_WMAC_RXFIFO_FULL_TH_1_8821C(x) \ 18670 ((x) & (~BITS_R_WMAC_RXFIFO_FULL_TH_1_8821C)) 18671 #define BIT_GET_R_WMAC_RXFIFO_FULL_TH_1_8821C(x) \ 18672 (((x) >> BIT_SHIFT_R_WMAC_RXFIFO_FULL_TH_1_8821C) & \ 18673 BIT_MASK_R_WMAC_RXFIFO_FULL_TH_1_8821C) 18674 #define BIT_SET_R_WMAC_RXFIFO_FULL_TH_1_8821C(x, v) \ 18675 (BIT_CLEAR_R_WMAC_RXFIFO_FULL_TH_1_8821C(x) | \ 18676 BIT_R_WMAC_RXFIFO_FULL_TH_1_8821C(v)) 18677 18678 #define BIT_R_WMAC_RX_SYNCFIFO_SYNC_1_8821C BIT(23) 18679 #define BIT_R_WMAC_RXRST_DLY_1_8821C BIT(22) 18680 #define BIT_R_WMAC_SRCH_TXRPT_REF_DROP_1_8821C BIT(21) 18681 #define BIT_R_WMAC_SRCH_TXRPT_UA1_1_8821C BIT(20) 18682 #define BIT_R_WMAC_SRCH_TXRPT_TYPE_1_8821C BIT(19) 18683 #define BIT_R_WMAC_NDP_RST_1_8821C BIT(18) 18684 #define BIT_R_WMAC_POWINT_EN_1_8821C BIT(17) 18685 #define BIT_R_WMAC_SRCH_TXRPT_PERPKT_1_8821C BIT(16) 18686 #define BIT_R_WMAC_SRCH_TXRPT_MID_1_8821C BIT(15) 18687 #define BIT_R_WMAC_PFIN_TOEN_1_8821C BIT(14) 18688 #define BIT_R_WMAC_FIL_SECERR_1_8821C BIT(13) 18689 #define BIT_R_WMAC_FIL_CTLPKTLEN_1_8821C BIT(12) 18690 #define BIT_R_WMAC_FIL_FCTYPE_1_8821C BIT(11) 18691 #define BIT_R_WMAC_FIL_FCPROVER_1_8821C BIT(10) 18692 #define BIT_R_WMAC_PHYSTS_SNIF_1_8821C BIT(9) 18693 #define BIT_R_WMAC_PHYSTS_PLCP_1_8821C BIT(8) 18694 #define BIT_R_MAC_TCR_VBONF_RD_1_8821C BIT(7) 18695 #define BIT_R_WMAC_TCR_MPAR_NDP_1_8821C BIT(6) 18696 #define BIT_R_WMAC_NDP_FILTER_1_8821C BIT(5) 18697 #define BIT_R_WMAC_RXLEN_SEL_1_8821C BIT(4) 18698 #define BIT_R_WMAC_RXLEN_SEL1_1_8821C BIT(3) 18699 #define BIT_R_OFDM_FILTER_1_8821C BIT(2) 18700 #define BIT_R_WMAC_CHK_OFDM_LEN_1_8821C BIT(1) 18701 #define BIT_R_WMAC_CHK_CCK_LEN_1_8821C BIT(0) 18702 18703 /* 2 REG_WMAC_OPTION_FUNCTION_2_8821C */ 18704 18705 #define BIT_SHIFT_R_WMAC_RX_FIL_LEN_2_8821C 0 18706 #define BIT_MASK_R_WMAC_RX_FIL_LEN_2_8821C 0xffff 18707 #define BIT_R_WMAC_RX_FIL_LEN_2_8821C(x) \ 18708 (((x) & BIT_MASK_R_WMAC_RX_FIL_LEN_2_8821C) \ 18709 << BIT_SHIFT_R_WMAC_RX_FIL_LEN_2_8821C) 18710 #define BITS_R_WMAC_RX_FIL_LEN_2_8821C \ 18711 (BIT_MASK_R_WMAC_RX_FIL_LEN_2_8821C \ 18712 << BIT_SHIFT_R_WMAC_RX_FIL_LEN_2_8821C) 18713 #define BIT_CLEAR_R_WMAC_RX_FIL_LEN_2_8821C(x) \ 18714 ((x) & (~BITS_R_WMAC_RX_FIL_LEN_2_8821C)) 18715 #define BIT_GET_R_WMAC_RX_FIL_LEN_2_8821C(x) \ 18716 (((x) >> BIT_SHIFT_R_WMAC_RX_FIL_LEN_2_8821C) & \ 18717 BIT_MASK_R_WMAC_RX_FIL_LEN_2_8821C) 18718 #define BIT_SET_R_WMAC_RX_FIL_LEN_2_8821C(x, v) \ 18719 (BIT_CLEAR_R_WMAC_RX_FIL_LEN_2_8821C(x) | \ 18720 BIT_R_WMAC_RX_FIL_LEN_2_8821C(v)) 18721 18722 /* 2 REG_RX_FILTER_FUNCTION_8821C */ 18723 #define BIT_R_WMAC_MHRDDY_LATCH_8821C BIT(14) 18724 #define BIT_R_WMAC_MHRDDY_CLR_8821C BIT(13) 18725 #define BIT_R_RXPKTCTL_FSM_BASED_MPDURDY1_8821C BIT(12) 18726 #define BIT_WMAC_DIS_VHT_PLCP_CHK_MU_8821C BIT(11) 18727 #define BIT_R_CHK_DELIMIT_LEN_8821C BIT(10) 18728 #define BIT_R_REAPTER_ADDR_MATCH_8821C BIT(9) 18729 #define BIT_R_RXPKTCTL_FSM_BASED_MPDURDY_8821C BIT(8) 18730 #define BIT_R_LATCH_MACHRDY_8821C BIT(7) 18731 #define BIT_R_WMAC_RXFIL_REND_8821C BIT(6) 18732 #define BIT_R_WMAC_MPDURDY_CLR_8821C BIT(5) 18733 #define BIT_R_WMAC_CLRRXSEC_8821C BIT(4) 18734 #define BIT_R_WMAC_RXFIL_RDEL_8821C BIT(3) 18735 #define BIT_R_WMAC_RXFIL_FCSE_8821C BIT(2) 18736 #define BIT_R_WMAC_RXFIL_MESH_DEL_8821C BIT(1) 18737 #define BIT_R_WMAC_RXFIL_MASKM_8821C BIT(0) 18738 18739 /* 2 REG_NOT_VALID_8821C */ 18740 18741 /* 2 REG_NDP_SIG_8821C */ 18742 18743 #define BIT_SHIFT_R_WMAC_TXNDP_SIGB_8821C 0 18744 #define BIT_MASK_R_WMAC_TXNDP_SIGB_8821C 0x1fffff 18745 #define BIT_R_WMAC_TXNDP_SIGB_8821C(x) \ 18746 (((x) & BIT_MASK_R_WMAC_TXNDP_SIGB_8821C) \ 18747 << BIT_SHIFT_R_WMAC_TXNDP_SIGB_8821C) 18748 #define BITS_R_WMAC_TXNDP_SIGB_8821C \ 18749 (BIT_MASK_R_WMAC_TXNDP_SIGB_8821C << BIT_SHIFT_R_WMAC_TXNDP_SIGB_8821C) 18750 #define BIT_CLEAR_R_WMAC_TXNDP_SIGB_8821C(x) \ 18751 ((x) & (~BITS_R_WMAC_TXNDP_SIGB_8821C)) 18752 #define BIT_GET_R_WMAC_TXNDP_SIGB_8821C(x) \ 18753 (((x) >> BIT_SHIFT_R_WMAC_TXNDP_SIGB_8821C) & \ 18754 BIT_MASK_R_WMAC_TXNDP_SIGB_8821C) 18755 #define BIT_SET_R_WMAC_TXNDP_SIGB_8821C(x, v) \ 18756 (BIT_CLEAR_R_WMAC_TXNDP_SIGB_8821C(x) | BIT_R_WMAC_TXNDP_SIGB_8821C(v)) 18757 18758 /* 2 REG_TXCMD_INFO_FOR_RSP_PKT_8821C */ 18759 18760 #define BIT_SHIFT_R_MAC_DBG_SHIFT_8821C 8 18761 #define BIT_MASK_R_MAC_DBG_SHIFT_8821C 0x7 18762 #define BIT_R_MAC_DBG_SHIFT_8821C(x) \ 18763 (((x) & BIT_MASK_R_MAC_DBG_SHIFT_8821C) \ 18764 << BIT_SHIFT_R_MAC_DBG_SHIFT_8821C) 18765 #define BITS_R_MAC_DBG_SHIFT_8821C \ 18766 (BIT_MASK_R_MAC_DBG_SHIFT_8821C << BIT_SHIFT_R_MAC_DBG_SHIFT_8821C) 18767 #define BIT_CLEAR_R_MAC_DBG_SHIFT_8821C(x) ((x) & (~BITS_R_MAC_DBG_SHIFT_8821C)) 18768 #define BIT_GET_R_MAC_DBG_SHIFT_8821C(x) \ 18769 (((x) >> BIT_SHIFT_R_MAC_DBG_SHIFT_8821C) & \ 18770 BIT_MASK_R_MAC_DBG_SHIFT_8821C) 18771 #define BIT_SET_R_MAC_DBG_SHIFT_8821C(x, v) \ 18772 (BIT_CLEAR_R_MAC_DBG_SHIFT_8821C(x) | BIT_R_MAC_DBG_SHIFT_8821C(v)) 18773 18774 #define BIT_SHIFT_R_MAC_DBG_SEL_8821C 0 18775 #define BIT_MASK_R_MAC_DBG_SEL_8821C 0x3 18776 #define BIT_R_MAC_DBG_SEL_8821C(x) \ 18777 (((x) & BIT_MASK_R_MAC_DBG_SEL_8821C) << BIT_SHIFT_R_MAC_DBG_SEL_8821C) 18778 #define BITS_R_MAC_DBG_SEL_8821C \ 18779 (BIT_MASK_R_MAC_DBG_SEL_8821C << BIT_SHIFT_R_MAC_DBG_SEL_8821C) 18780 #define BIT_CLEAR_R_MAC_DBG_SEL_8821C(x) ((x) & (~BITS_R_MAC_DBG_SEL_8821C)) 18781 #define BIT_GET_R_MAC_DBG_SEL_8821C(x) \ 18782 (((x) >> BIT_SHIFT_R_MAC_DBG_SEL_8821C) & BIT_MASK_R_MAC_DBG_SEL_8821C) 18783 #define BIT_SET_R_MAC_DBG_SEL_8821C(x, v) \ 18784 (BIT_CLEAR_R_MAC_DBG_SEL_8821C(x) | BIT_R_MAC_DBG_SEL_8821C(v)) 18785 18786 /* 2 REG_TXCMD_INFO_FOR_RSP_PKT_1_8821C */ 18787 18788 #define BIT_SHIFT_R_MAC_DEBUG_1_8821C 0 18789 #define BIT_MASK_R_MAC_DEBUG_1_8821C 0xffffffffL 18790 #define BIT_R_MAC_DEBUG_1_8821C(x) \ 18791 (((x) & BIT_MASK_R_MAC_DEBUG_1_8821C) << BIT_SHIFT_R_MAC_DEBUG_1_8821C) 18792 #define BITS_R_MAC_DEBUG_1_8821C \ 18793 (BIT_MASK_R_MAC_DEBUG_1_8821C << BIT_SHIFT_R_MAC_DEBUG_1_8821C) 18794 #define BIT_CLEAR_R_MAC_DEBUG_1_8821C(x) ((x) & (~BITS_R_MAC_DEBUG_1_8821C)) 18795 #define BIT_GET_R_MAC_DEBUG_1_8821C(x) \ 18796 (((x) >> BIT_SHIFT_R_MAC_DEBUG_1_8821C) & BIT_MASK_R_MAC_DEBUG_1_8821C) 18797 #define BIT_SET_R_MAC_DEBUG_1_8821C(x, v) \ 18798 (BIT_CLEAR_R_MAC_DEBUG_1_8821C(x) | BIT_R_MAC_DEBUG_1_8821C(v)) 18799 18800 /* 2 REG_WSEC_OPTION_8821C */ 18801 #define BIT_RXDEC_BM_MGNT_8821C BIT(22) 18802 #define BIT_TXENC_BM_MGNT_8821C BIT(21) 18803 #define BIT_RXDEC_UNI_MGNT_8821C BIT(20) 18804 #define BIT_TXENC_UNI_MGNT_8821C BIT(19) 18805 18806 /* 2 REG_RTS_ADDRESS_0_8821C */ 18807 18808 /* 2 REG_RTS_ADDRESS_0_1_8821C */ 18809 18810 /* 2 REG_RTS_ADDRESS_1_8821C */ 18811 18812 /* 2 REG_RTS_ADDRESS_1_1_8821C */ 18813 18814 /* 2 REG_WL2LTECOEX_INDIRECT_ACCESS_CTRL_V1_8821C */ 18815 #define BIT_LTECOEX_ACCESS_START_V1_8821C BIT(31) 18816 #define BIT_LTECOEX_WRITE_MODE_V1_8821C BIT(30) 18817 #define BIT_LTECOEX_READY_BIT_V1_8821C BIT(29) 18818 18819 #define BIT_SHIFT_WRITE_BYTE_EN_V1_8821C 16 18820 #define BIT_MASK_WRITE_BYTE_EN_V1_8821C 0xf 18821 #define BIT_WRITE_BYTE_EN_V1_8821C(x) \ 18822 (((x) & BIT_MASK_WRITE_BYTE_EN_V1_8821C) \ 18823 << BIT_SHIFT_WRITE_BYTE_EN_V1_8821C) 18824 #define BITS_WRITE_BYTE_EN_V1_8821C \ 18825 (BIT_MASK_WRITE_BYTE_EN_V1_8821C << BIT_SHIFT_WRITE_BYTE_EN_V1_8821C) 18826 #define BIT_CLEAR_WRITE_BYTE_EN_V1_8821C(x) \ 18827 ((x) & (~BITS_WRITE_BYTE_EN_V1_8821C)) 18828 #define BIT_GET_WRITE_BYTE_EN_V1_8821C(x) \ 18829 (((x) >> BIT_SHIFT_WRITE_BYTE_EN_V1_8821C) & \ 18830 BIT_MASK_WRITE_BYTE_EN_V1_8821C) 18831 #define BIT_SET_WRITE_BYTE_EN_V1_8821C(x, v) \ 18832 (BIT_CLEAR_WRITE_BYTE_EN_V1_8821C(x) | BIT_WRITE_BYTE_EN_V1_8821C(v)) 18833 18834 #define BIT_SHIFT_LTECOEX_REG_ADDR_V1_8821C 0 18835 #define BIT_MASK_LTECOEX_REG_ADDR_V1_8821C 0xffff 18836 #define BIT_LTECOEX_REG_ADDR_V1_8821C(x) \ 18837 (((x) & BIT_MASK_LTECOEX_REG_ADDR_V1_8821C) \ 18838 << BIT_SHIFT_LTECOEX_REG_ADDR_V1_8821C) 18839 #define BITS_LTECOEX_REG_ADDR_V1_8821C \ 18840 (BIT_MASK_LTECOEX_REG_ADDR_V1_8821C \ 18841 << BIT_SHIFT_LTECOEX_REG_ADDR_V1_8821C) 18842 #define BIT_CLEAR_LTECOEX_REG_ADDR_V1_8821C(x) \ 18843 ((x) & (~BITS_LTECOEX_REG_ADDR_V1_8821C)) 18844 #define BIT_GET_LTECOEX_REG_ADDR_V1_8821C(x) \ 18845 (((x) >> BIT_SHIFT_LTECOEX_REG_ADDR_V1_8821C) & \ 18846 BIT_MASK_LTECOEX_REG_ADDR_V1_8821C) 18847 #define BIT_SET_LTECOEX_REG_ADDR_V1_8821C(x, v) \ 18848 (BIT_CLEAR_LTECOEX_REG_ADDR_V1_8821C(x) | \ 18849 BIT_LTECOEX_REG_ADDR_V1_8821C(v)) 18850 18851 /* 2 REG_WL2LTECOEX_INDIRECT_ACCESS_WRITE_DATA_V1_8821C */ 18852 18853 #define BIT_SHIFT_LTECOEX_W_DATA_V1_8821C 0 18854 #define BIT_MASK_LTECOEX_W_DATA_V1_8821C 0xffffffffL 18855 #define BIT_LTECOEX_W_DATA_V1_8821C(x) \ 18856 (((x) & BIT_MASK_LTECOEX_W_DATA_V1_8821C) \ 18857 << BIT_SHIFT_LTECOEX_W_DATA_V1_8821C) 18858 #define BITS_LTECOEX_W_DATA_V1_8821C \ 18859 (BIT_MASK_LTECOEX_W_DATA_V1_8821C << BIT_SHIFT_LTECOEX_W_DATA_V1_8821C) 18860 #define BIT_CLEAR_LTECOEX_W_DATA_V1_8821C(x) \ 18861 ((x) & (~BITS_LTECOEX_W_DATA_V1_8821C)) 18862 #define BIT_GET_LTECOEX_W_DATA_V1_8821C(x) \ 18863 (((x) >> BIT_SHIFT_LTECOEX_W_DATA_V1_8821C) & \ 18864 BIT_MASK_LTECOEX_W_DATA_V1_8821C) 18865 #define BIT_SET_LTECOEX_W_DATA_V1_8821C(x, v) \ 18866 (BIT_CLEAR_LTECOEX_W_DATA_V1_8821C(x) | BIT_LTECOEX_W_DATA_V1_8821C(v)) 18867 18868 /* 2 REG_WL2LTECOEX_INDIRECT_ACCESS_READ_DATA_V1_8821C */ 18869 18870 #define BIT_SHIFT_LTECOEX_R_DATA_V1_8821C 0 18871 #define BIT_MASK_LTECOEX_R_DATA_V1_8821C 0xffffffffL 18872 #define BIT_LTECOEX_R_DATA_V1_8821C(x) \ 18873 (((x) & BIT_MASK_LTECOEX_R_DATA_V1_8821C) \ 18874 << BIT_SHIFT_LTECOEX_R_DATA_V1_8821C) 18875 #define BITS_LTECOEX_R_DATA_V1_8821C \ 18876 (BIT_MASK_LTECOEX_R_DATA_V1_8821C << BIT_SHIFT_LTECOEX_R_DATA_V1_8821C) 18877 #define BIT_CLEAR_LTECOEX_R_DATA_V1_8821C(x) \ 18878 ((x) & (~BITS_LTECOEX_R_DATA_V1_8821C)) 18879 #define BIT_GET_LTECOEX_R_DATA_V1_8821C(x) \ 18880 (((x) >> BIT_SHIFT_LTECOEX_R_DATA_V1_8821C) & \ 18881 BIT_MASK_LTECOEX_R_DATA_V1_8821C) 18882 #define BIT_SET_LTECOEX_R_DATA_V1_8821C(x, v) \ 18883 (BIT_CLEAR_LTECOEX_R_DATA_V1_8821C(x) | BIT_LTECOEX_R_DATA_V1_8821C(v)) 18884 18885 /* 2 REG_NOT_VALID_8821C */ 18886 18887 /* 2 REG_NOT_VALID_8821C */ 18888 18889 /* 2 REG_NOT_VALID_8821C */ 18890 18891 /* 2 REG_NOT_VALID_8821C */ 18892 18893 /* 2 REG_NOT_VALID_8821C */ 18894 18895 /* 2 REG_NOT_VALID_8821C */ 18896 18897 /* 2 REG_NOT_VALID_8821C */ 18898 18899 /* 2 REG_NOT_VALID_8821C */ 18900 18901 /* 2 REG_NOT_VALID_8821C */ 18902 18903 /* 2 REG_NOT_VALID_8821C */ 18904 18905 /* 2 REG_NOT_VALID_8821C */ 18906 18907 /* 2 REG_NOT_VALID_8821C */ 18908 18909 /* 2 REG_NOT_VALID_8821C */ 18910 18911 /* 2 REG_NOT_VALID_8821C */ 18912 18913 /* 2 REG_NOT_VALID_8821C */ 18914 18915 /* 2 REG_NOT_VALID_8821C */ 18916 18917 /* 2 REG_NOT_VALID_8821C */ 18918 18919 /* 2 REG_NOT_VALID_8821C */ 18920 18921 /* 2 REG_NOT_VALID_8821C */ 18922 18923 /* 2 REG_NOT_VALID_8821C */ 18924 18925 /* 2 REG_NOT_VALID_8821C */ 18926 18927 /* 2 REG_NOT_VALID_8821C */ 18928 18929 /* 2 REG_NOT_VALID_8821C */ 18930 18931 /* 2 REG_NOT_VALID_8821C */ 18932 18933 /* 2 REG_NOT_VALID_8821C */ 18934 18935 /* 2 REG_NOT_VALID_8821C */ 18936 18937 /* 2 REG_NOT_VALID_8821C */ 18938 18939 /* 2 REG_NOT_VALID_8821C */ 18940 18941 /* 2 REG_NOT_VALID_8821C */ 18942 18943 /* 2 REG_NOT_VALID_8821C */ 18944 18945 /* 2 REG_NOT_VALID_8821C */ 18946 18947 /* 2 REG_NOT_VALID_8821C */ 18948 18949 /* 2 REG_NOT_VALID_8821C */ 18950 18951 /* 2 REG_NOT_VALID_8821C */ 18952 18953 /* 2 REG_NOT_VALID_8821C */ 18954 18955 /* 2 REG_NOT_VALID_8821C */ 18956 18957 /* 2 REG_NOT_VALID_8821C */ 18958 18959 /* 2 REG_NOT_VALID_8821C */ 18960 18961 /* 2 REG_NOT_VALID_8821C */ 18962 18963 /* 2 REG_NOT_VALID_8821C */ 18964 18965 /* 2 REG_NOT_VALID_8821C */ 18966 18967 /* 2 REG_NOT_VALID_8821C */ 18968 18969 /* 2 REG_NOT_VALID_8821C */ 18970 18971 /* 2 REG_NOT_VALID_8821C */ 18972 18973 /* 2 REG_NOT_VALID_8821C */ 18974 18975 /* 2 REG_NOT_VALID_8821C */ 18976 18977 /* 2 REG_NOT_VALID_8821C */ 18978 18979 /* 2 REG_NOT_VALID_8821C */ 18980 18981 /* 2 REG_NOT_VALID_8821C */ 18982 18983 /* 2 REG_NOT_VALID_8821C */ 18984 18985 /* 2 REG_NOT_VALID_8821C */ 18986 18987 /* 2 REG_NOT_VALID_8821C */ 18988 18989 /* 2 REG_NOT_VALID_8821C */ 18990 18991 /* 2 REG_NOT_VALID_8821C */ 18992 18993 /* 2 REG_NOT_VALID_8821C */ 18994 18995 /* 2 REG_NOT_VALID_8821C */ 18996 18997 /* 2 REG_NOT_VALID_8821C */ 18998 18999 /* 2 REG_NOT_VALID_8821C */ 19000 19001 /* 2 REG_NOT_VALID_8821C */ 19002 19003 /* 2 REG_NOT_VALID_8821C */ 19004 19005 /* 2 REG_NOT_VALID_8821C */ 19006 19007 /* 2 REG_SDIO_TX_CTRL_8821C */ 19008 19009 #define BIT_SHIFT_SDIO_INT_TIMEOUT_8821C 16 19010 #define BIT_MASK_SDIO_INT_TIMEOUT_8821C 0xffff 19011 #define BIT_SDIO_INT_TIMEOUT_8821C(x) \ 19012 (((x) & BIT_MASK_SDIO_INT_TIMEOUT_8821C) \ 19013 << BIT_SHIFT_SDIO_INT_TIMEOUT_8821C) 19014 #define BITS_SDIO_INT_TIMEOUT_8821C \ 19015 (BIT_MASK_SDIO_INT_TIMEOUT_8821C << BIT_SHIFT_SDIO_INT_TIMEOUT_8821C) 19016 #define BIT_CLEAR_SDIO_INT_TIMEOUT_8821C(x) \ 19017 ((x) & (~BITS_SDIO_INT_TIMEOUT_8821C)) 19018 #define BIT_GET_SDIO_INT_TIMEOUT_8821C(x) \ 19019 (((x) >> BIT_SHIFT_SDIO_INT_TIMEOUT_8821C) & \ 19020 BIT_MASK_SDIO_INT_TIMEOUT_8821C) 19021 #define BIT_SET_SDIO_INT_TIMEOUT_8821C(x, v) \ 19022 (BIT_CLEAR_SDIO_INT_TIMEOUT_8821C(x) | BIT_SDIO_INT_TIMEOUT_8821C(v)) 19023 19024 #define BIT_IO_ERR_STATUS_8821C BIT(15) 19025 #define BIT_REPLY_ERRCRC_IN_DATA_8821C BIT(9) 19026 #define BIT_EN_CMD53_OVERLAP_8821C BIT(8) 19027 #define BIT_REPLY_ERR_IN_R5_8821C BIT(7) 19028 #define BIT_R18A_EN_8821C BIT(6) 19029 #define BIT_SDIO_CMD_FORCE_VLD_8821C BIT(5) 19030 #define BIT_INIT_CMD_EN_8821C BIT(4) 19031 #define BIT_EN_RXDMA_MASK_INT_8821C BIT(2) 19032 #define BIT_EN_MASK_TIMER_8821C BIT(1) 19033 #define BIT_CMD_ERR_STOP_INT_EN_8821C BIT(0) 19034 19035 /* 2 REG_SDIO_HIMR_8821C */ 19036 #define BIT_SDIO_CRCERR_MSK_8821C BIT(31) 19037 #define BIT_SDIO_HSISR3_IND_MSK_8821C BIT(30) 19038 #define BIT_SDIO_HSISR2_IND_MSK_8821C BIT(29) 19039 #define BIT_SDIO_HEISR_IND_MSK_8821C BIT(28) 19040 #define BIT_SDIO_CTWEND_MSK_8821C BIT(27) 19041 #define BIT_SDIO_ATIMEND_E_MSK_8821C BIT(26) 19042 #define BIT_SDIIO_ATIMEND_MSK_8821C BIT(25) 19043 #define BIT_SDIO_OCPINT_MSK_8821C BIT(24) 19044 #define BIT_SDIO_PSTIMEOUT_MSK_8821C BIT(23) 19045 #define BIT_SDIO_GTINT4_MSK_8821C BIT(22) 19046 #define BIT_SDIO_GTINT3_MSK_8821C BIT(21) 19047 #define BIT_SDIO_HSISR_IND_MSK_8821C BIT(20) 19048 #define BIT_SDIO_CPWM2_MSK_8821C BIT(19) 19049 #define BIT_SDIO_CPWM1_MSK_8821C BIT(18) 19050 #define BIT_SDIO_C2HCMD_INT_MSK_8821C BIT(17) 19051 #define BIT_SDIO_BCNERLY_INT_MSK_8821C BIT(16) 19052 #define BIT_SDIO_TXBCNERR_MSK_8821C BIT(7) 19053 #define BIT_SDIO_TXBCNOK_MSK_8821C BIT(6) 19054 #define BIT_SDIO_RXFOVW_MSK_8821C BIT(5) 19055 #define BIT_SDIO_TXFOVW_MSK_8821C BIT(4) 19056 #define BIT_SDIO_RXERR_MSK_8821C BIT(3) 19057 #define BIT_SDIO_TXERR_MSK_8821C BIT(2) 19058 #define BIT_SDIO_AVAL_MSK_8821C BIT(1) 19059 #define BIT_RX_REQUEST_MSK_8821C BIT(0) 19060 19061 /* 2 REG_SDIO_HISR_8821C */ 19062 #define BIT_SDIO_CRCERR_8821C BIT(31) 19063 #define BIT_SDIO_HSISR3_IND_8821C BIT(30) 19064 #define BIT_SDIO_HSISR2_IND_8821C BIT(29) 19065 #define BIT_SDIO_HEISR_IND_8821C BIT(28) 19066 #define BIT_SDIO_CTWEND_8821C BIT(27) 19067 #define BIT_SDIO_ATIMEND_E_8821C BIT(26) 19068 #define BIT_SDIO_ATIMEND_8821C BIT(25) 19069 #define BIT_SDIO_OCPINT_8821C BIT(24) 19070 #define BIT_SDIO_PSTIMEOUT_8821C BIT(23) 19071 #define BIT_SDIO_GTINT4_8821C BIT(22) 19072 #define BIT_SDIO_GTINT3_8821C BIT(21) 19073 #define BIT_SDIO_HSISR_IND_8821C BIT(20) 19074 #define BIT_SDIO_CPWM2_8821C BIT(19) 19075 #define BIT_SDIO_CPWM1_8821C BIT(18) 19076 #define BIT_SDIO_C2HCMD_INT_8821C BIT(17) 19077 #define BIT_SDIO_BCNERLY_INT_8821C BIT(16) 19078 #define BIT_SDIO_TXBCNERR_8821C BIT(7) 19079 #define BIT_SDIO_TXBCNOK_8821C BIT(6) 19080 #define BIT_SDIO_RXFOVW_8821C BIT(5) 19081 #define BIT_SDIO_TXFOVW_8821C BIT(4) 19082 #define BIT_SDIO_RXERR_8821C BIT(3) 19083 #define BIT_SDIO_TXERR_8821C BIT(2) 19084 #define BIT_SDIO_AVAL_8821C BIT(1) 19085 #define BIT_RX_REQUEST_8821C BIT(0) 19086 19087 /* 2 REG_SDIO_RX_REQ_LEN_8821C */ 19088 19089 #define BIT_SHIFT_RX_REQ_LEN_V1_8821C 0 19090 #define BIT_MASK_RX_REQ_LEN_V1_8821C 0x3ffff 19091 #define BIT_RX_REQ_LEN_V1_8821C(x) \ 19092 (((x) & BIT_MASK_RX_REQ_LEN_V1_8821C) << BIT_SHIFT_RX_REQ_LEN_V1_8821C) 19093 #define BITS_RX_REQ_LEN_V1_8821C \ 19094 (BIT_MASK_RX_REQ_LEN_V1_8821C << BIT_SHIFT_RX_REQ_LEN_V1_8821C) 19095 #define BIT_CLEAR_RX_REQ_LEN_V1_8821C(x) ((x) & (~BITS_RX_REQ_LEN_V1_8821C)) 19096 #define BIT_GET_RX_REQ_LEN_V1_8821C(x) \ 19097 (((x) >> BIT_SHIFT_RX_REQ_LEN_V1_8821C) & BIT_MASK_RX_REQ_LEN_V1_8821C) 19098 #define BIT_SET_RX_REQ_LEN_V1_8821C(x, v) \ 19099 (BIT_CLEAR_RX_REQ_LEN_V1_8821C(x) | BIT_RX_REQ_LEN_V1_8821C(v)) 19100 19101 /* 2 REG_SDIO_FREE_TXPG_SEQ_V1_8821C */ 19102 19103 #define BIT_SHIFT_FREE_TXPG_SEQ_8821C 0 19104 #define BIT_MASK_FREE_TXPG_SEQ_8821C 0xff 19105 #define BIT_FREE_TXPG_SEQ_8821C(x) \ 19106 (((x) & BIT_MASK_FREE_TXPG_SEQ_8821C) << BIT_SHIFT_FREE_TXPG_SEQ_8821C) 19107 #define BITS_FREE_TXPG_SEQ_8821C \ 19108 (BIT_MASK_FREE_TXPG_SEQ_8821C << BIT_SHIFT_FREE_TXPG_SEQ_8821C) 19109 #define BIT_CLEAR_FREE_TXPG_SEQ_8821C(x) ((x) & (~BITS_FREE_TXPG_SEQ_8821C)) 19110 #define BIT_GET_FREE_TXPG_SEQ_8821C(x) \ 19111 (((x) >> BIT_SHIFT_FREE_TXPG_SEQ_8821C) & BIT_MASK_FREE_TXPG_SEQ_8821C) 19112 #define BIT_SET_FREE_TXPG_SEQ_8821C(x, v) \ 19113 (BIT_CLEAR_FREE_TXPG_SEQ_8821C(x) | BIT_FREE_TXPG_SEQ_8821C(v)) 19114 19115 /* 2 REG_SDIO_FREE_TXPG_8821C */ 19116 19117 #define BIT_SHIFT_MID_FREEPG_V1_8821C 16 19118 #define BIT_MASK_MID_FREEPG_V1_8821C 0xfff 19119 #define BIT_MID_FREEPG_V1_8821C(x) \ 19120 (((x) & BIT_MASK_MID_FREEPG_V1_8821C) << BIT_SHIFT_MID_FREEPG_V1_8821C) 19121 #define BITS_MID_FREEPG_V1_8821C \ 19122 (BIT_MASK_MID_FREEPG_V1_8821C << BIT_SHIFT_MID_FREEPG_V1_8821C) 19123 #define BIT_CLEAR_MID_FREEPG_V1_8821C(x) ((x) & (~BITS_MID_FREEPG_V1_8821C)) 19124 #define BIT_GET_MID_FREEPG_V1_8821C(x) \ 19125 (((x) >> BIT_SHIFT_MID_FREEPG_V1_8821C) & BIT_MASK_MID_FREEPG_V1_8821C) 19126 #define BIT_SET_MID_FREEPG_V1_8821C(x, v) \ 19127 (BIT_CLEAR_MID_FREEPG_V1_8821C(x) | BIT_MID_FREEPG_V1_8821C(v)) 19128 19129 #define BIT_SHIFT_HIQ_FREEPG_V1_8821C 0 19130 #define BIT_MASK_HIQ_FREEPG_V1_8821C 0xfff 19131 #define BIT_HIQ_FREEPG_V1_8821C(x) \ 19132 (((x) & BIT_MASK_HIQ_FREEPG_V1_8821C) << BIT_SHIFT_HIQ_FREEPG_V1_8821C) 19133 #define BITS_HIQ_FREEPG_V1_8821C \ 19134 (BIT_MASK_HIQ_FREEPG_V1_8821C << BIT_SHIFT_HIQ_FREEPG_V1_8821C) 19135 #define BIT_CLEAR_HIQ_FREEPG_V1_8821C(x) ((x) & (~BITS_HIQ_FREEPG_V1_8821C)) 19136 #define BIT_GET_HIQ_FREEPG_V1_8821C(x) \ 19137 (((x) >> BIT_SHIFT_HIQ_FREEPG_V1_8821C) & BIT_MASK_HIQ_FREEPG_V1_8821C) 19138 #define BIT_SET_HIQ_FREEPG_V1_8821C(x, v) \ 19139 (BIT_CLEAR_HIQ_FREEPG_V1_8821C(x) | BIT_HIQ_FREEPG_V1_8821C(v)) 19140 19141 /* 2 REG_SDIO_FREE_TXPG2_8821C */ 19142 19143 #define BIT_SHIFT_PUB_FREEPG_V1_8821C 16 19144 #define BIT_MASK_PUB_FREEPG_V1_8821C 0xfff 19145 #define BIT_PUB_FREEPG_V1_8821C(x) \ 19146 (((x) & BIT_MASK_PUB_FREEPG_V1_8821C) << BIT_SHIFT_PUB_FREEPG_V1_8821C) 19147 #define BITS_PUB_FREEPG_V1_8821C \ 19148 (BIT_MASK_PUB_FREEPG_V1_8821C << BIT_SHIFT_PUB_FREEPG_V1_8821C) 19149 #define BIT_CLEAR_PUB_FREEPG_V1_8821C(x) ((x) & (~BITS_PUB_FREEPG_V1_8821C)) 19150 #define BIT_GET_PUB_FREEPG_V1_8821C(x) \ 19151 (((x) >> BIT_SHIFT_PUB_FREEPG_V1_8821C) & BIT_MASK_PUB_FREEPG_V1_8821C) 19152 #define BIT_SET_PUB_FREEPG_V1_8821C(x, v) \ 19153 (BIT_CLEAR_PUB_FREEPG_V1_8821C(x) | BIT_PUB_FREEPG_V1_8821C(v)) 19154 19155 #define BIT_SHIFT_LOW_FREEPG_V1_8821C 0 19156 #define BIT_MASK_LOW_FREEPG_V1_8821C 0xfff 19157 #define BIT_LOW_FREEPG_V1_8821C(x) \ 19158 (((x) & BIT_MASK_LOW_FREEPG_V1_8821C) << BIT_SHIFT_LOW_FREEPG_V1_8821C) 19159 #define BITS_LOW_FREEPG_V1_8821C \ 19160 (BIT_MASK_LOW_FREEPG_V1_8821C << BIT_SHIFT_LOW_FREEPG_V1_8821C) 19161 #define BIT_CLEAR_LOW_FREEPG_V1_8821C(x) ((x) & (~BITS_LOW_FREEPG_V1_8821C)) 19162 #define BIT_GET_LOW_FREEPG_V1_8821C(x) \ 19163 (((x) >> BIT_SHIFT_LOW_FREEPG_V1_8821C) & BIT_MASK_LOW_FREEPG_V1_8821C) 19164 #define BIT_SET_LOW_FREEPG_V1_8821C(x, v) \ 19165 (BIT_CLEAR_LOW_FREEPG_V1_8821C(x) | BIT_LOW_FREEPG_V1_8821C(v)) 19166 19167 /* 2 REG_SDIO_OQT_FREE_TXPG_V1_8821C */ 19168 19169 #define BIT_SHIFT_NOAC_OQT_FREEPG_V1_8821C 24 19170 #define BIT_MASK_NOAC_OQT_FREEPG_V1_8821C 0xff 19171 #define BIT_NOAC_OQT_FREEPG_V1_8821C(x) \ 19172 (((x) & BIT_MASK_NOAC_OQT_FREEPG_V1_8821C) \ 19173 << BIT_SHIFT_NOAC_OQT_FREEPG_V1_8821C) 19174 #define BITS_NOAC_OQT_FREEPG_V1_8821C \ 19175 (BIT_MASK_NOAC_OQT_FREEPG_V1_8821C \ 19176 << BIT_SHIFT_NOAC_OQT_FREEPG_V1_8821C) 19177 #define BIT_CLEAR_NOAC_OQT_FREEPG_V1_8821C(x) \ 19178 ((x) & (~BITS_NOAC_OQT_FREEPG_V1_8821C)) 19179 #define BIT_GET_NOAC_OQT_FREEPG_V1_8821C(x) \ 19180 (((x) >> BIT_SHIFT_NOAC_OQT_FREEPG_V1_8821C) & \ 19181 BIT_MASK_NOAC_OQT_FREEPG_V1_8821C) 19182 #define BIT_SET_NOAC_OQT_FREEPG_V1_8821C(x, v) \ 19183 (BIT_CLEAR_NOAC_OQT_FREEPG_V1_8821C(x) | \ 19184 BIT_NOAC_OQT_FREEPG_V1_8821C(v)) 19185 19186 #define BIT_SHIFT_AC_OQT_FREEPG_V1_8821C 16 19187 #define BIT_MASK_AC_OQT_FREEPG_V1_8821C 0xff 19188 #define BIT_AC_OQT_FREEPG_V1_8821C(x) \ 19189 (((x) & BIT_MASK_AC_OQT_FREEPG_V1_8821C) \ 19190 << BIT_SHIFT_AC_OQT_FREEPG_V1_8821C) 19191 #define BITS_AC_OQT_FREEPG_V1_8821C \ 19192 (BIT_MASK_AC_OQT_FREEPG_V1_8821C << BIT_SHIFT_AC_OQT_FREEPG_V1_8821C) 19193 #define BIT_CLEAR_AC_OQT_FREEPG_V1_8821C(x) \ 19194 ((x) & (~BITS_AC_OQT_FREEPG_V1_8821C)) 19195 #define BIT_GET_AC_OQT_FREEPG_V1_8821C(x) \ 19196 (((x) >> BIT_SHIFT_AC_OQT_FREEPG_V1_8821C) & \ 19197 BIT_MASK_AC_OQT_FREEPG_V1_8821C) 19198 #define BIT_SET_AC_OQT_FREEPG_V1_8821C(x, v) \ 19199 (BIT_CLEAR_AC_OQT_FREEPG_V1_8821C(x) | BIT_AC_OQT_FREEPG_V1_8821C(v)) 19200 19201 #define BIT_SHIFT_EXQ_FREEPG_V1_8821C 0 19202 #define BIT_MASK_EXQ_FREEPG_V1_8821C 0xfff 19203 #define BIT_EXQ_FREEPG_V1_8821C(x) \ 19204 (((x) & BIT_MASK_EXQ_FREEPG_V1_8821C) << BIT_SHIFT_EXQ_FREEPG_V1_8821C) 19205 #define BITS_EXQ_FREEPG_V1_8821C \ 19206 (BIT_MASK_EXQ_FREEPG_V1_8821C << BIT_SHIFT_EXQ_FREEPG_V1_8821C) 19207 #define BIT_CLEAR_EXQ_FREEPG_V1_8821C(x) ((x) & (~BITS_EXQ_FREEPG_V1_8821C)) 19208 #define BIT_GET_EXQ_FREEPG_V1_8821C(x) \ 19209 (((x) >> BIT_SHIFT_EXQ_FREEPG_V1_8821C) & BIT_MASK_EXQ_FREEPG_V1_8821C) 19210 #define BIT_SET_EXQ_FREEPG_V1_8821C(x, v) \ 19211 (BIT_CLEAR_EXQ_FREEPG_V1_8821C(x) | BIT_EXQ_FREEPG_V1_8821C(v)) 19212 19213 /* 2 REG_SDIO_HTSFR_INFO_8821C */ 19214 19215 #define BIT_SHIFT_HTSFR1_8821C 16 19216 #define BIT_MASK_HTSFR1_8821C 0xffff 19217 #define BIT_HTSFR1_8821C(x) \ 19218 (((x) & BIT_MASK_HTSFR1_8821C) << BIT_SHIFT_HTSFR1_8821C) 19219 #define BITS_HTSFR1_8821C (BIT_MASK_HTSFR1_8821C << BIT_SHIFT_HTSFR1_8821C) 19220 #define BIT_CLEAR_HTSFR1_8821C(x) ((x) & (~BITS_HTSFR1_8821C)) 19221 #define BIT_GET_HTSFR1_8821C(x) \ 19222 (((x) >> BIT_SHIFT_HTSFR1_8821C) & BIT_MASK_HTSFR1_8821C) 19223 #define BIT_SET_HTSFR1_8821C(x, v) \ 19224 (BIT_CLEAR_HTSFR1_8821C(x) | BIT_HTSFR1_8821C(v)) 19225 19226 #define BIT_SHIFT_HTSFR0_8821C 0 19227 #define BIT_MASK_HTSFR0_8821C 0xffff 19228 #define BIT_HTSFR0_8821C(x) \ 19229 (((x) & BIT_MASK_HTSFR0_8821C) << BIT_SHIFT_HTSFR0_8821C) 19230 #define BITS_HTSFR0_8821C (BIT_MASK_HTSFR0_8821C << BIT_SHIFT_HTSFR0_8821C) 19231 #define BIT_CLEAR_HTSFR0_8821C(x) ((x) & (~BITS_HTSFR0_8821C)) 19232 #define BIT_GET_HTSFR0_8821C(x) \ 19233 (((x) >> BIT_SHIFT_HTSFR0_8821C) & BIT_MASK_HTSFR0_8821C) 19234 #define BIT_SET_HTSFR0_8821C(x, v) \ 19235 (BIT_CLEAR_HTSFR0_8821C(x) | BIT_HTSFR0_8821C(v)) 19236 19237 /* 2 REG_SDIO_HCPWM1_V2_8821C */ 19238 #define BIT_TOGGLE_8821C BIT(7) 19239 #define BIT_CUR_PS_8821C BIT(0) 19240 19241 /* 2 REG_SDIO_HCPWM2_V2_8821C */ 19242 19243 /* 2 REG_SDIO_INDIRECT_REG_CFG_8821C */ 19244 #define BIT_INDIRECT_REG_RDY_8821C BIT(20) 19245 #define BIT_INDIRECT_REG_R_8821C BIT(19) 19246 #define BIT_INDIRECT_REG_W_8821C BIT(18) 19247 19248 #define BIT_SHIFT_INDIRECT_REG_SIZE_8821C 16 19249 #define BIT_MASK_INDIRECT_REG_SIZE_8821C 0x3 19250 #define BIT_INDIRECT_REG_SIZE_8821C(x) \ 19251 (((x) & BIT_MASK_INDIRECT_REG_SIZE_8821C) \ 19252 << BIT_SHIFT_INDIRECT_REG_SIZE_8821C) 19253 #define BITS_INDIRECT_REG_SIZE_8821C \ 19254 (BIT_MASK_INDIRECT_REG_SIZE_8821C << BIT_SHIFT_INDIRECT_REG_SIZE_8821C) 19255 #define BIT_CLEAR_INDIRECT_REG_SIZE_8821C(x) \ 19256 ((x) & (~BITS_INDIRECT_REG_SIZE_8821C)) 19257 #define BIT_GET_INDIRECT_REG_SIZE_8821C(x) \ 19258 (((x) >> BIT_SHIFT_INDIRECT_REG_SIZE_8821C) & \ 19259 BIT_MASK_INDIRECT_REG_SIZE_8821C) 19260 #define BIT_SET_INDIRECT_REG_SIZE_8821C(x, v) \ 19261 (BIT_CLEAR_INDIRECT_REG_SIZE_8821C(x) | BIT_INDIRECT_REG_SIZE_8821C(v)) 19262 19263 #define BIT_SHIFT_INDIRECT_REG_ADDR_8821C 0 19264 #define BIT_MASK_INDIRECT_REG_ADDR_8821C 0xffff 19265 #define BIT_INDIRECT_REG_ADDR_8821C(x) \ 19266 (((x) & BIT_MASK_INDIRECT_REG_ADDR_8821C) \ 19267 << BIT_SHIFT_INDIRECT_REG_ADDR_8821C) 19268 #define BITS_INDIRECT_REG_ADDR_8821C \ 19269 (BIT_MASK_INDIRECT_REG_ADDR_8821C << BIT_SHIFT_INDIRECT_REG_ADDR_8821C) 19270 #define BIT_CLEAR_INDIRECT_REG_ADDR_8821C(x) \ 19271 ((x) & (~BITS_INDIRECT_REG_ADDR_8821C)) 19272 #define BIT_GET_INDIRECT_REG_ADDR_8821C(x) \ 19273 (((x) >> BIT_SHIFT_INDIRECT_REG_ADDR_8821C) & \ 19274 BIT_MASK_INDIRECT_REG_ADDR_8821C) 19275 #define BIT_SET_INDIRECT_REG_ADDR_8821C(x, v) \ 19276 (BIT_CLEAR_INDIRECT_REG_ADDR_8821C(x) | BIT_INDIRECT_REG_ADDR_8821C(v)) 19277 19278 /* 2 REG_SDIO_INDIRECT_REG_DATA_8821C */ 19279 19280 #define BIT_SHIFT_INDIRECT_REG_DATA_8821C 0 19281 #define BIT_MASK_INDIRECT_REG_DATA_8821C 0xffffffffL 19282 #define BIT_INDIRECT_REG_DATA_8821C(x) \ 19283 (((x) & BIT_MASK_INDIRECT_REG_DATA_8821C) \ 19284 << BIT_SHIFT_INDIRECT_REG_DATA_8821C) 19285 #define BITS_INDIRECT_REG_DATA_8821C \ 19286 (BIT_MASK_INDIRECT_REG_DATA_8821C << BIT_SHIFT_INDIRECT_REG_DATA_8821C) 19287 #define BIT_CLEAR_INDIRECT_REG_DATA_8821C(x) \ 19288 ((x) & (~BITS_INDIRECT_REG_DATA_8821C)) 19289 #define BIT_GET_INDIRECT_REG_DATA_8821C(x) \ 19290 (((x) >> BIT_SHIFT_INDIRECT_REG_DATA_8821C) & \ 19291 BIT_MASK_INDIRECT_REG_DATA_8821C) 19292 #define BIT_SET_INDIRECT_REG_DATA_8821C(x, v) \ 19293 (BIT_CLEAR_INDIRECT_REG_DATA_8821C(x) | BIT_INDIRECT_REG_DATA_8821C(v)) 19294 19295 /* 2 REG_SDIO_H2C_8821C */ 19296 19297 #define BIT_SHIFT_SDIO_H2C_MSG_8821C 0 19298 #define BIT_MASK_SDIO_H2C_MSG_8821C 0xffffffffL 19299 #define BIT_SDIO_H2C_MSG_8821C(x) \ 19300 (((x) & BIT_MASK_SDIO_H2C_MSG_8821C) << BIT_SHIFT_SDIO_H2C_MSG_8821C) 19301 #define BITS_SDIO_H2C_MSG_8821C \ 19302 (BIT_MASK_SDIO_H2C_MSG_8821C << BIT_SHIFT_SDIO_H2C_MSG_8821C) 19303 #define BIT_CLEAR_SDIO_H2C_MSG_8821C(x) ((x) & (~BITS_SDIO_H2C_MSG_8821C)) 19304 #define BIT_GET_SDIO_H2C_MSG_8821C(x) \ 19305 (((x) >> BIT_SHIFT_SDIO_H2C_MSG_8821C) & BIT_MASK_SDIO_H2C_MSG_8821C) 19306 #define BIT_SET_SDIO_H2C_MSG_8821C(x, v) \ 19307 (BIT_CLEAR_SDIO_H2C_MSG_8821C(x) | BIT_SDIO_H2C_MSG_8821C(v)) 19308 19309 /* 2 REG_SDIO_C2H_8821C */ 19310 19311 #define BIT_SHIFT_SDIO_C2H_MSG_8821C 0 19312 #define BIT_MASK_SDIO_C2H_MSG_8821C 0xffffffffL 19313 #define BIT_SDIO_C2H_MSG_8821C(x) \ 19314 (((x) & BIT_MASK_SDIO_C2H_MSG_8821C) << BIT_SHIFT_SDIO_C2H_MSG_8821C) 19315 #define BITS_SDIO_C2H_MSG_8821C \ 19316 (BIT_MASK_SDIO_C2H_MSG_8821C << BIT_SHIFT_SDIO_C2H_MSG_8821C) 19317 #define BIT_CLEAR_SDIO_C2H_MSG_8821C(x) ((x) & (~BITS_SDIO_C2H_MSG_8821C)) 19318 #define BIT_GET_SDIO_C2H_MSG_8821C(x) \ 19319 (((x) >> BIT_SHIFT_SDIO_C2H_MSG_8821C) & BIT_MASK_SDIO_C2H_MSG_8821C) 19320 #define BIT_SET_SDIO_C2H_MSG_8821C(x, v) \ 19321 (BIT_CLEAR_SDIO_C2H_MSG_8821C(x) | BIT_SDIO_C2H_MSG_8821C(v)) 19322 19323 /* 2 REG_SDIO_HRPWM1_8821C */ 19324 #define BIT_TOGGLE_8821C BIT(7) 19325 #define BIT_ACK_8821C BIT(6) 19326 #define BIT_REQ_PS_8821C BIT(0) 19327 19328 /* 2 REG_SDIO_HRPWM2_8821C */ 19329 19330 /* 2 REG_SDIO_HPS_CLKR_8821C */ 19331 19332 /* 2 REG_SDIO_BUS_CTRL_8821C */ 19333 #define BIT_PAD_CLK_XHGE_EN_8821C BIT(3) 19334 #define BIT_INTER_CLK_EN_8821C BIT(2) 19335 #define BIT_EN_RPT_TXCRC_8821C BIT(1) 19336 #define BIT_DIS_RXDMA_STS_8821C BIT(0) 19337 19338 /* 2 REG_SDIO_HSUS_CTRL_8821C */ 19339 #define BIT_INTR_CTRL_8821C BIT(4) 19340 #define BIT_SDIO_VOLTAGE_8821C BIT(3) 19341 #define BIT_BYPASS_INIT_8821C BIT(2) 19342 #define BIT_HCI_RESUME_RDY_8821C BIT(1) 19343 #define BIT_HCI_SUS_REQ_8821C BIT(0) 19344 19345 /* 2 REG_SDIO_RESPONSE_TIMER_8821C */ 19346 19347 #define BIT_SHIFT_CMDIN_2RESP_TIMER_8821C 0 19348 #define BIT_MASK_CMDIN_2RESP_TIMER_8821C 0xffff 19349 #define BIT_CMDIN_2RESP_TIMER_8821C(x) \ 19350 (((x) & BIT_MASK_CMDIN_2RESP_TIMER_8821C) \ 19351 << BIT_SHIFT_CMDIN_2RESP_TIMER_8821C) 19352 #define BITS_CMDIN_2RESP_TIMER_8821C \ 19353 (BIT_MASK_CMDIN_2RESP_TIMER_8821C << BIT_SHIFT_CMDIN_2RESP_TIMER_8821C) 19354 #define BIT_CLEAR_CMDIN_2RESP_TIMER_8821C(x) \ 19355 ((x) & (~BITS_CMDIN_2RESP_TIMER_8821C)) 19356 #define BIT_GET_CMDIN_2RESP_TIMER_8821C(x) \ 19357 (((x) >> BIT_SHIFT_CMDIN_2RESP_TIMER_8821C) & \ 19358 BIT_MASK_CMDIN_2RESP_TIMER_8821C) 19359 #define BIT_SET_CMDIN_2RESP_TIMER_8821C(x, v) \ 19360 (BIT_CLEAR_CMDIN_2RESP_TIMER_8821C(x) | BIT_CMDIN_2RESP_TIMER_8821C(v)) 19361 19362 /* 2 REG_SDIO_CMD_CRC_8821C */ 19363 19364 #define BIT_SHIFT_SDIO_CMD_CRC_V1_8821C 0 19365 #define BIT_MASK_SDIO_CMD_CRC_V1_8821C 0xff 19366 #define BIT_SDIO_CMD_CRC_V1_8821C(x) \ 19367 (((x) & BIT_MASK_SDIO_CMD_CRC_V1_8821C) \ 19368 << BIT_SHIFT_SDIO_CMD_CRC_V1_8821C) 19369 #define BITS_SDIO_CMD_CRC_V1_8821C \ 19370 (BIT_MASK_SDIO_CMD_CRC_V1_8821C << BIT_SHIFT_SDIO_CMD_CRC_V1_8821C) 19371 #define BIT_CLEAR_SDIO_CMD_CRC_V1_8821C(x) ((x) & (~BITS_SDIO_CMD_CRC_V1_8821C)) 19372 #define BIT_GET_SDIO_CMD_CRC_V1_8821C(x) \ 19373 (((x) >> BIT_SHIFT_SDIO_CMD_CRC_V1_8821C) & \ 19374 BIT_MASK_SDIO_CMD_CRC_V1_8821C) 19375 #define BIT_SET_SDIO_CMD_CRC_V1_8821C(x, v) \ 19376 (BIT_CLEAR_SDIO_CMD_CRC_V1_8821C(x) | BIT_SDIO_CMD_CRC_V1_8821C(v)) 19377 19378 /* 2 REG_SDIO_HSISR_8821C */ 19379 #define BIT_DRV_WLAN_INT_CLR_8821C BIT(1) 19380 #define BIT_DRV_WLAN_INT_8821C BIT(0) 19381 19382 /* 2 REG_SDIO_ERR_RPT_8821C */ 19383 #define BIT_HR_FF_OVF_8821C BIT(6) 19384 #define BIT_HR_FF_UDN_8821C BIT(5) 19385 #define BIT_TXDMA_BUSY_ERR_8821C BIT(4) 19386 #define BIT_TXDMA_VLD_ERR_8821C BIT(3) 19387 #define BIT_QSEL_UNKNOWN_ERR_8821C BIT(2) 19388 #define BIT_QSEL_MIS_ERR_8821C BIT(1) 19389 #define BIT_SDIO_OVERRD_ERR_8821C BIT(0) 19390 19391 /* 2 REG_SDIO_CMD_ERRCNT_8821C */ 19392 19393 #define BIT_SHIFT_CMD_CRC_ERR_CNT_8821C 0 19394 #define BIT_MASK_CMD_CRC_ERR_CNT_8821C 0xff 19395 #define BIT_CMD_CRC_ERR_CNT_8821C(x) \ 19396 (((x) & BIT_MASK_CMD_CRC_ERR_CNT_8821C) \ 19397 << BIT_SHIFT_CMD_CRC_ERR_CNT_8821C) 19398 #define BITS_CMD_CRC_ERR_CNT_8821C \ 19399 (BIT_MASK_CMD_CRC_ERR_CNT_8821C << BIT_SHIFT_CMD_CRC_ERR_CNT_8821C) 19400 #define BIT_CLEAR_CMD_CRC_ERR_CNT_8821C(x) ((x) & (~BITS_CMD_CRC_ERR_CNT_8821C)) 19401 #define BIT_GET_CMD_CRC_ERR_CNT_8821C(x) \ 19402 (((x) >> BIT_SHIFT_CMD_CRC_ERR_CNT_8821C) & \ 19403 BIT_MASK_CMD_CRC_ERR_CNT_8821C) 19404 #define BIT_SET_CMD_CRC_ERR_CNT_8821C(x, v) \ 19405 (BIT_CLEAR_CMD_CRC_ERR_CNT_8821C(x) | BIT_CMD_CRC_ERR_CNT_8821C(v)) 19406 19407 /* 2 REG_SDIO_DATA_ERRCNT_8821C */ 19408 19409 #define BIT_SHIFT_DATA_CRC_ERR_CNT_8821C 0 19410 #define BIT_MASK_DATA_CRC_ERR_CNT_8821C 0xff 19411 #define BIT_DATA_CRC_ERR_CNT_8821C(x) \ 19412 (((x) & BIT_MASK_DATA_CRC_ERR_CNT_8821C) \ 19413 << BIT_SHIFT_DATA_CRC_ERR_CNT_8821C) 19414 #define BITS_DATA_CRC_ERR_CNT_8821C \ 19415 (BIT_MASK_DATA_CRC_ERR_CNT_8821C << BIT_SHIFT_DATA_CRC_ERR_CNT_8821C) 19416 #define BIT_CLEAR_DATA_CRC_ERR_CNT_8821C(x) \ 19417 ((x) & (~BITS_DATA_CRC_ERR_CNT_8821C)) 19418 #define BIT_GET_DATA_CRC_ERR_CNT_8821C(x) \ 19419 (((x) >> BIT_SHIFT_DATA_CRC_ERR_CNT_8821C) & \ 19420 BIT_MASK_DATA_CRC_ERR_CNT_8821C) 19421 #define BIT_SET_DATA_CRC_ERR_CNT_8821C(x, v) \ 19422 (BIT_CLEAR_DATA_CRC_ERR_CNT_8821C(x) | BIT_DATA_CRC_ERR_CNT_8821C(v)) 19423 19424 /* 2 REG_SDIO_CMD_ERR_CONTENT_8821C */ 19425 19426 #define BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8821C 0 19427 #define BIT_MASK_SDIO_CMD_ERR_CONTENT_8821C 0xffffffffffL 19428 #define BIT_SDIO_CMD_ERR_CONTENT_8821C(x) \ 19429 (((x) & BIT_MASK_SDIO_CMD_ERR_CONTENT_8821C) \ 19430 << BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8821C) 19431 #define BITS_SDIO_CMD_ERR_CONTENT_8821C \ 19432 (BIT_MASK_SDIO_CMD_ERR_CONTENT_8821C \ 19433 << BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8821C) 19434 #define BIT_CLEAR_SDIO_CMD_ERR_CONTENT_8821C(x) \ 19435 ((x) & (~BITS_SDIO_CMD_ERR_CONTENT_8821C)) 19436 #define BIT_GET_SDIO_CMD_ERR_CONTENT_8821C(x) \ 19437 (((x) >> BIT_SHIFT_SDIO_CMD_ERR_CONTENT_8821C) & \ 19438 BIT_MASK_SDIO_CMD_ERR_CONTENT_8821C) 19439 #define BIT_SET_SDIO_CMD_ERR_CONTENT_8821C(x, v) \ 19440 (BIT_CLEAR_SDIO_CMD_ERR_CONTENT_8821C(x) | \ 19441 BIT_SDIO_CMD_ERR_CONTENT_8821C(v)) 19442 19443 /* 2 REG_SDIO_CRC_ERR_IDX_8821C */ 19444 #define BIT_D3_CRC_ERR_8821C BIT(4) 19445 #define BIT_D2_CRC_ERR_8821C BIT(3) 19446 #define BIT_D1_CRC_ERR_8821C BIT(2) 19447 #define BIT_D0_CRC_ERR_8821C BIT(1) 19448 #define BIT_CMD_CRC_ERR_8821C BIT(0) 19449 19450 /* 2 REG_SDIO_DATA_CRC_8821C */ 19451 19452 #define BIT_SHIFT_SDIO_DATA_CRC_8821C 0 19453 #define BIT_MASK_SDIO_DATA_CRC_8821C 0xffff 19454 #define BIT_SDIO_DATA_CRC_8821C(x) \ 19455 (((x) & BIT_MASK_SDIO_DATA_CRC_8821C) << BIT_SHIFT_SDIO_DATA_CRC_8821C) 19456 #define BITS_SDIO_DATA_CRC_8821C \ 19457 (BIT_MASK_SDIO_DATA_CRC_8821C << BIT_SHIFT_SDIO_DATA_CRC_8821C) 19458 #define BIT_CLEAR_SDIO_DATA_CRC_8821C(x) ((x) & (~BITS_SDIO_DATA_CRC_8821C)) 19459 #define BIT_GET_SDIO_DATA_CRC_8821C(x) \ 19460 (((x) >> BIT_SHIFT_SDIO_DATA_CRC_8821C) & BIT_MASK_SDIO_DATA_CRC_8821C) 19461 #define BIT_SET_SDIO_DATA_CRC_8821C(x, v) \ 19462 (BIT_CLEAR_SDIO_DATA_CRC_8821C(x) | BIT_SDIO_DATA_CRC_8821C(v)) 19463 19464 /* 2 REG_SDIO_DATA_REPLY_TIME_8821C */ 19465 19466 #define BIT_SHIFT_SDIO_DATA_REPLY_TIME_8821C 0 19467 #define BIT_MASK_SDIO_DATA_REPLY_TIME_8821C 0x7 19468 #define BIT_SDIO_DATA_REPLY_TIME_8821C(x) \ 19469 (((x) & BIT_MASK_SDIO_DATA_REPLY_TIME_8821C) \ 19470 << BIT_SHIFT_SDIO_DATA_REPLY_TIME_8821C) 19471 #define BITS_SDIO_DATA_REPLY_TIME_8821C \ 19472 (BIT_MASK_SDIO_DATA_REPLY_TIME_8821C \ 19473 << BIT_SHIFT_SDIO_DATA_REPLY_TIME_8821C) 19474 #define BIT_CLEAR_SDIO_DATA_REPLY_TIME_8821C(x) \ 19475 ((x) & (~BITS_SDIO_DATA_REPLY_TIME_8821C)) 19476 #define BIT_GET_SDIO_DATA_REPLY_TIME_8821C(x) \ 19477 (((x) >> BIT_SHIFT_SDIO_DATA_REPLY_TIME_8821C) & \ 19478 BIT_MASK_SDIO_DATA_REPLY_TIME_8821C) 19479 #define BIT_SET_SDIO_DATA_REPLY_TIME_8821C(x, v) \ 19480 (BIT_CLEAR_SDIO_DATA_REPLY_TIME_8821C(x) | \ 19481 BIT_SDIO_DATA_REPLY_TIME_8821C(v)) 19482 19483 #endif 19484