1 /******************************************************************************
2 *
3 * Copyright(c) 2016 - 2017 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 *****************************************************************************/
15 #define _RTL8821C_OPS_C_
16
17 #include <drv_types.h> /* basic_types.h, rtw_io.h and etc. */
18 #include <rtw_xmit.h> /* struct xmit_priv */
19 #ifdef DBG_CONFIG_ERROR_DETECT
20 #include <rtw_sreset.h>
21 #endif /* DBG_CONFIG_ERROR_DETECT */
22 #include <hal_data.h> /* PHAL_DATA_TYPE, GET_HAL_DATA() */
23 #include <hal_com.h> /* dump_chip_info() and etc. */
24 #include "../hal_halmac.h" /* GET_RX_DESC_XXX_8821C() */
25 #include "rtl8821c.h"
26 #ifdef CONFIG_PCI_HCI
27 #include "rtl8821ce_hal.h"
28 #endif
29 #include "rtl8821c_dm.h"
30 #ifdef CONFIG_SDIO_HCI
31 #include "sdio/rtl8821cs.h"
32 #endif
33
read_chip_version(PADAPTER adapter)34 static void read_chip_version(PADAPTER adapter)
35 {
36 PHAL_DATA_TYPE hal;
37 u32 value32;
38
39
40 hal = GET_HAL_DATA(adapter);
41
42 value32 = rtw_read32(adapter, REG_SYS_CFG1_8821C);
43 hal->version_id.ICType = CHIP_8821C;
44 hal->version_id.ChipType = ((value32 & BIT_RTL_ID_8821C) ? TEST_CHIP : NORMAL_CHIP);
45 hal->version_id.CUTVersion = BIT_GET_CHIP_VER_8821C(value32);
46 hal->version_id.VendorType = BIT_GET_VENDOR_ID_8821C(value32);
47 hal->version_id.VendorType >>= 2;
48 switch (hal->version_id.VendorType) {
49 case 0:
50 hal->version_id.VendorType = CHIP_VENDOR_TSMC;
51 break;
52 case 1:
53 hal->version_id.VendorType = CHIP_VENDOR_SMIC;
54 break;
55 case 2:
56 hal->version_id.VendorType = CHIP_VENDOR_UMC;
57 break;
58 }
59 hal->version_id.RFType = ((value32 & BIT_RF_TYPE_ID_8821C) ? RF_TYPE_2T2R : RF_TYPE_1T1R);
60 hal->RegulatorMode = ((value32 & BIT_SPSLDO_SEL_8821C) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR);
61
62 value32 = rtw_read32(adapter, REG_SYS_STATUS1_8821C);
63 hal->version_id.ROMVer = BIT_GET_RF_RL_ID_8821C(value32);
64
65 /* For multi-function consideration. */
66 hal->MultiFunc = RT_MULTI_FUNC_NONE;
67 value32 = rtw_read32(adapter, REG_WL_BT_PWR_CTRL_8821C);
68 hal->MultiFunc |= ((value32 & BIT_WL_FUNC_EN_8821C) ? RT_MULTI_FUNC_WIFI : 0);
69 hal->MultiFunc |= ((value32 & BIT_BT_FUNC_EN_8821C) ? RT_MULTI_FUNC_BT : 0);
70 hal->PolarityCtl = ((value32 & BIT_WL_HWPDN_SL_8821C) ? RT_POLARITY_HIGH_ACT : RT_POLARITY_LOW_ACT);
71
72 dump_chip_info(hal->version_id);
73 }
74
75 /*
76 * Return:
77 * _TRUE valid ID
78 * _FALSE invalid ID
79 */
Hal_EfuseParseIDCode(PADAPTER adapter,u8 * map)80 static u8 Hal_EfuseParseIDCode(PADAPTER adapter, u8 *map)
81 {
82 u16 EEPROMId;
83
84
85 /* Check 0x8129 again for making sure autoload status!! */
86 EEPROMId = le16_to_cpu(*(u16 *)map);
87 RTW_INFO("EEPROM ID = 0x%04x\n", EEPROMId);
88 if (EEPROMId == RTL_EEPROM_ID)
89 return _TRUE;
90
91 RTW_INFO("<WARN> EEPROM ID is invalid!!\n");
92 return _FALSE;
93 }
94
Hal_EfuseParseEEPROMVer(PADAPTER adapter,u8 * map,u8 mapvalid)95 static void Hal_EfuseParseEEPROMVer(PADAPTER adapter, u8 *map, u8 mapvalid)
96 {
97 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
98
99
100 if (_TRUE == mapvalid)
101 hal->EEPROMVersion = map[EEPROM_VERSION_8821C];
102 else
103 hal->EEPROMVersion = 1;
104
105 RTW_INFO("EEPROM Version = %d\n", hal->EEPROMVersion);
106 }
107
Hal_EfuseParseTxPowerInfo(PADAPTER adapter,u8 * map,u8 mapvalid)108 static void Hal_EfuseParseTxPowerInfo(PADAPTER adapter, u8 *map, u8 mapvalid)
109 {
110 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
111
112 hal->txpwr_pg_mode = TXPWR_PG_WITH_PWR_IDX;
113
114 if ((_TRUE == mapvalid) && (map[EEPROM_RF_BOARD_OPTION_8821C] != 0xFF))
115 hal->EEPROMRegulatory = map[EEPROM_RF_BOARD_OPTION_8821C] & 0x7; /* bit0~2 */
116 else
117 hal->EEPROMRegulatory = EEPROM_DEFAULT_BOARD_OPTION & 0x7; /* bit0~2 */
118 RTW_INFO("EEPROM Regulatory=0x%02x\n", hal->EEPROMRegulatory);
119 }
120
Hal_EfuseParseBoardType(PADAPTER adapter,u8 * map,u8 mapvalid)121 static void Hal_EfuseParseBoardType(PADAPTER adapter, u8 *map, u8 mapvalid)
122 {
123 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
124
125
126 if ((_TRUE == mapvalid) && (map[EEPROM_RF_BOARD_OPTION_8821C] != 0xFF))
127 hal->InterfaceSel = (map[EEPROM_RF_BOARD_OPTION_8821C] & 0xE0) >> 5;
128 else
129 hal->InterfaceSel = (EEPROM_DEFAULT_BOARD_OPTION & 0xE0) >> 5;
130
131 RTW_INFO("EEPROM Board Type=0x%02x\n", hal->InterfaceSel);
132 }
133
Hal_EfuseParseBTCoexistInfo(PADAPTER adapter,u8 * map,u8 mapvalid)134 static void Hal_EfuseParseBTCoexistInfo(PADAPTER adapter, u8 *map, u8 mapvalid)
135 {
136 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
137 u8 setting;
138 u32 tmpu4;
139 u32 tmp_u32;
140
141 if ((mapvalid == _TRUE) && (map[EEPROM_RF_BOARD_OPTION_8821C] != 0xFF)) {
142
143 tmp_u32 = rtw_read32(adapter, REG_WL_BT_PWR_CTRL_8821C);
144 /* 0xc1[7:5] = 0x01 (Combo card) */
145 if ((((map[EEPROM_RF_BOARD_OPTION_8821C] & 0xe0) >> 5) == 0x01) && (tmp_u32 & BIT_BT_FUNC_EN_8821C))
146 hal->EEPROMBluetoothCoexist = _TRUE;
147 else
148 hal->EEPROMBluetoothCoexist = _FALSE;
149 } else
150 hal->EEPROMBluetoothCoexist = _FALSE;
151
152 hal->EEPROMBluetoothType = BT_RTL8821C;
153
154 setting = map[EEPROM_RF_BT_SETTING_8821C];
155 if ((_TRUE == mapvalid) && (setting != 0xFF)) {
156 /* Bit[0]: Total antenna number
157 * 0: 2-Antenna (WL BT not share Ant, concurrent mode)
158 * 1: 1-Antenna (WL BT share Ant, TDMA mode)
159 */
160 hal->EEPROMBluetoothAntNum = setting & BIT(0);
161 /*
162 * Bit[6]: One-Ant structure use Ant2(aux.) path or Ant1(main) path
163 * 0: Ant2(aux.)
164 * 1: Ant1(main), default
165 */
166 hal->ant_path = (setting & BIT(6)) ? RF_PATH_B : RF_PATH_A;
167 } else {
168 hal->EEPROMBluetoothAntNum = Ant_x1;
169 hal->ant_path = RF_PATH_A;
170 }
171
172 RTW_INFO("EEPROM %s BT-coex, ant_num=%d\n",
173 hal->EEPROMBluetoothCoexist == _TRUE ? "Enable" : "Disable",
174 hal->EEPROMBluetoothAntNum == Ant_x2 ? 2 : 1);
175 }
176
Hal_EfuseParseChnlPlan(PADAPTER adapter,u8 * map,u8 autoloadfail)177 static void Hal_EfuseParseChnlPlan(PADAPTER adapter, u8 *map, u8 autoloadfail)
178 {
179 hal_com_config_channel_plan(
180 adapter,
181 map ? &map[EEPROM_COUNTRY_CODE_8821C] : NULL,
182 map ? map[EEPROM_CHANNEL_PLAN_8821C] : 0xFF,
183 RTW_CHPLAN_6G_NULL,
184 autoloadfail
185 );
186 }
187
Hal_EfuseParseXtal(PADAPTER adapter,u8 * map,u8 mapvalid)188 static void Hal_EfuseParseXtal(PADAPTER adapter, u8 *map, u8 mapvalid)
189 {
190 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
191
192
193 if ((_TRUE == mapvalid) && map[EEPROM_XTAL_8821C] != 0xFF)
194 hal->crystal_cap = map[EEPROM_XTAL_8821C];
195 else
196 hal->crystal_cap = EEPROM_Default_CrystalCap;
197
198 RTW_INFO("EEPROM crystal_cap=0x%02x\n", hal->crystal_cap);
199 }
200
Hal_EfuseParseThermalMeter(PADAPTER adapter,u8 * map,u8 mapvalid)201 static void Hal_EfuseParseThermalMeter(PADAPTER adapter, u8 *map, u8 mapvalid)
202 {
203 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
204
205
206 /* ThermalMeter from EEPROM */
207 if ((_TRUE == mapvalid) && (map[EEPROM_THERMAL_METER_8821C] != 0xFF))
208 hal->eeprom_thermal_meter = map[EEPROM_THERMAL_METER_8821C];
209 else {
210 hal->eeprom_thermal_meter = EEPROM_Default_ThermalMeter;
211 hal->odmpriv.rf_calibrate_info.is_apk_thermal_meter_ignore = _TRUE;
212 }
213
214 RTW_INFO("EEPROM ThermalMeter=0x%02x\n", hal->eeprom_thermal_meter);
215 }
216
Hal_EfuseParseAntennaDiversity(PADAPTER adapter,u8 * map,u8 mapvalid)217 static void Hal_EfuseParseAntennaDiversity(PADAPTER adapter, u8 *map, u8 mapvalid)
218 {
219 #ifdef CONFIG_ANTENNA_DIVERSITY
220 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
221 struct registry_priv *registry_par = &adapter->registrypriv;
222
223
224 if (hal->EEPROMBluetoothCoexist == _TRUE && hal->EEPROMBluetoothAntNum == Ant_x1)
225 hal->AntDivCfg = 0;
226 else {
227 if (registry_par->antdiv_cfg == 2)/* 0:OFF , 1:ON, 2:By EFUSE */
228 hal->AntDivCfg = (map[EEPROM_RF_BOARD_OPTION_8821C] & BIT3) ? _TRUE : _FALSE;
229 else
230 hal->AntDivCfg = registry_par->antdiv_cfg;
231 }
232 /*hal->TRxAntDivType = S0S1_TRX_HW_ANTDIV;*/
233 hal->with_extenal_ant_switch = ((map[EEPROM_RF_BT_SETTING_8821C] & BIT7) >> 7);
234
235 RTW_INFO("%s:EEPROM AntDivCfg=%d, AntDivType=%d, external_ant_switch:%d\n",
236 __func__, hal->AntDivCfg, hal->TRxAntDivType, hal->with_extenal_ant_switch);
237 #endif /* CONFIG_ANTENNA_DIVERSITY */
238 }
239
Hal_EfuseTxBBSwing(PADAPTER adapter,u8 * map,u8 mapvalid)240 static void Hal_EfuseTxBBSwing(PADAPTER adapter, u8 *map, u8 mapvalid)
241 {
242 PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter);
243
244 if (_TRUE == mapvalid) {
245 hal_data->tx_bbswing_24G = map[EEPROM_TX_BBSWING_2G_8821C];
246 if (0xFF == hal_data->tx_bbswing_24G)
247 hal_data->tx_bbswing_24G = 0;
248 hal_data->tx_bbswing_5G = map[EEPROM_TX_BBSWING_5G_8821C];
249 if (0xFF == hal_data->tx_bbswing_5G)
250 hal_data->tx_bbswing_5G = 0;
251 } else {
252 hal_data->tx_bbswing_24G = 0;
253 hal_data->tx_bbswing_5G = 0;
254 }
255 RTW_INFO("EEPROM tx_bbswing_24G =0x%02x\n", hal_data->tx_bbswing_24G);
256 RTW_INFO("EEPROM tx_bbswing_5G =0x%02x\n", hal_data->tx_bbswing_5G);
257 }
258
Hal_EfuseParseCustomerID(PADAPTER adapter,u8 * map,u8 mapvalid)259 static void Hal_EfuseParseCustomerID(PADAPTER adapter, u8 *map, u8 mapvalid)
260 {
261 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
262
263
264 if (_TRUE == mapvalid)
265 hal->EEPROMCustomerID = map[EEPROM_CUSTOMER_ID_8821C];
266 else
267 hal->EEPROMCustomerID = 0;
268 RTW_INFO("EEPROM Customer ID=0x%02x\n", hal->EEPROMCustomerID);
269 }
270
Hal_DetectWoWMode(PADAPTER adapter)271 static void Hal_DetectWoWMode(PADAPTER adapter)
272 {
273 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
274 adapter_to_pwrctl(adapter)->bSupportRemoteWakeup = _TRUE;
275 #else /* !(CONFIG_WOWLAN || CONFIG_AP_WOWLAN) */
276 adapter_to_pwrctl(adapter)->bSupportRemoteWakeup = _FALSE;
277 #endif /* !(CONFIG_WOWLAN || CONFIG_AP_WOWLAN) */
278
279 RTW_INFO("EEPROM SupportRemoteWakeup=%d\n", adapter_to_pwrctl(adapter)->bSupportRemoteWakeup);
280 }
281
hal_ReadPAType(PADAPTER adapter,u8 * map,u8 mapvalid)282 static void hal_ReadPAType(PADAPTER adapter, u8 *map, u8 mapvalid)
283 {
284 PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter);
285
286 if (mapvalid) {
287 /* AUTO - Get INFO from eFuse*/
288 if (GetRegAmplifierType2G(adapter) == 0) {
289 switch (hal_data->rfe_type) {
290 default:
291 hal_data->PAType_2G = 0;
292 hal_data->LNAType_2G = 0;
293 hal_data->ExternalPA_2G = 0;
294 hal_data->ExternalLNA_2G = 0;
295 break;
296 }
297 } else {
298 hal_data->ExternalPA_2G = (GetRegAmplifierType2G(adapter) & ODM_BOARD_EXT_PA) ? 1 : 0;
299 hal_data->ExternalLNA_2G = (GetRegAmplifierType2G(adapter) & ODM_BOARD_EXT_LNA) ? 1 : 0;
300 }
301
302 /* AUTO */
303 if (GetRegAmplifierType5G(adapter) == 0) {
304 switch (hal_data->rfe_type) {
305 default:
306 hal_data->PAType_5G = 0;
307 hal_data->LNAType_5G = 0;
308 hal_data->external_pa_5g = 0;
309 hal_data->external_lna_5g = 0;
310 break;
311 }
312 } else {
313 hal_data->external_pa_5g = (GetRegAmplifierType5G(adapter) & ODM_BOARD_EXT_PA_5G) ? 1 : 0;
314 hal_data->external_lna_5g = (GetRegAmplifierType5G(adapter) & ODM_BOARD_EXT_LNA_5G) ? 1 : 0;
315 }
316 } else {
317 /*Get INFO from registry*/
318 hal_data->ExternalPA_2G = EEPROM_Default_PAType;
319 hal_data->external_pa_5g = 0xFF;
320 hal_data->ExternalLNA_2G = EEPROM_Default_LNAType;
321 hal_data->external_lna_5g = 0xFF;
322
323 if (GetRegAmplifierType2G(adapter) == 0) {
324 hal_data->ExternalPA_2G = 0;
325 hal_data->ExternalLNA_2G = 0;
326 } else {
327 hal_data->ExternalPA_2G = (GetRegAmplifierType2G(adapter) & ODM_BOARD_EXT_PA) ? 1 : 0;
328 hal_data->ExternalLNA_2G = (GetRegAmplifierType2G(adapter) & ODM_BOARD_EXT_LNA) ? 1 : 0;
329 }
330
331 if (GetRegAmplifierType5G(adapter) == 0) {
332 hal_data->external_pa_5g = 0;
333 hal_data->external_lna_5g = 0;
334 } else {
335 hal_data->external_pa_5g = (GetRegAmplifierType5G(adapter) & ODM_BOARD_EXT_PA_5G) ? 1 : 0;
336 hal_data->external_lna_5g = (GetRegAmplifierType5G(adapter) & ODM_BOARD_EXT_LNA_5G) ? 1 : 0;
337 }
338 }
339
340 RTW_INFO("EEPROM PAType_2G is 0x%x, ExternalPA_2G = %d\n", hal_data->PAType_2G, hal_data->ExternalPA_2G);
341 RTW_INFO("EEPROM PAType_5G is 0x%x, external_pa_5g = %d\n", hal_data->PAType_5G, hal_data->external_pa_5g);
342 RTW_INFO("EEPROM LNAType_2G is 0x%x, ExternalLNA_2G = %d\n", hal_data->LNAType_2G, hal_data->ExternalLNA_2G);
343 RTW_INFO("EEPROM LNAType_5G is 0x%x, external_lna_5g = %d\n", hal_data->LNAType_5G, hal_data->external_lna_5g);
344 }
345
Hal_ReadAmplifierType(PADAPTER adapter,u8 * map,u8 mapvalid)346 static void Hal_ReadAmplifierType(PADAPTER adapter, u8 *map, u8 mapvalid)
347 {
348 PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter);
349
350 if (hal_data->rfe_type < 8) { /*According to RF-EFUSE DOC : R15]*/
351 RTW_INFO("WIFI Module is iPA/iLNA\n");
352 return;
353 }
354
355 hal_ReadPAType(adapter, map, mapvalid);
356
357 /* [2.4G] extPA */
358 hal_data->TypeGPA = hal_data->PAType_2G;
359
360 /* [5G] extPA */
361 hal_data->TypeAPA = hal_data->PAType_5G;
362
363 /* [2.4G] extLNA */
364 hal_data->TypeGLNA = hal_data->LNAType_2G;
365
366 /* [5G] extLNA */
367 hal_data->TypeALNA = hal_data->LNAType_5G;
368
369 RTW_INFO("EEPROM TypeGPA = 0x%X\n", hal_data->TypeGPA);
370 RTW_INFO("EEPROM TypeAPA = 0x%X\n", hal_data->TypeAPA);
371 RTW_INFO("EEPROM TypeGLNA = 0x%X\n", hal_data->TypeGLNA);
372 RTW_INFO("EEPROM TypeALNA = 0x%X\n", hal_data->TypeALNA);
373 }
374
Hal_ReadRFEType(PADAPTER adapter,u8 * map,u8 mapvalid)375 static u8 Hal_ReadRFEType(PADAPTER adapter, u8 *map, u8 mapvalid)
376 {
377 /* [20160-06-22 -R15]
378 Type 0 - (2-Ant, DPDT), (2G_WLG, iPA, iLNA, iSW), (5G, iPA, iLNA, iSW)
379 Type 1 - (1-Ant, SPDT@Ant1), (2G_WLG, iPA, iLNA, iSW), (5G, iPA, iLNA, iSW)
380 Type 2 -(1-Ant, SPDT@Ant1) , (2G_BTG, iPA, iLNA, iSW), (5G, iPA, iLNA, iSW)
381 Type 3 - (1-Ant, DPDT@Ant2), (2G_WLG, iPA, iLNA, iSW), (5G, iPA, iLNA, iSW)
382 Type 4 - (1-Ant, DPDT@Ant2), (2G_BTG, iPA, iLNA, iSW), (5G, iPA, iLNA, iSW)
383 Type 5 - (2-Ant), (2G_WLG, iPA, iLNA, iSW), (5G, iPA, iLNA, iSW)
384 Type 6 - (2-Ant), (2G_WLG, iPA, iLNA, iSW), (5G, iPA, iLNA, iSW)
385 Type 7 - (1-Ant), (2G_BTG, iPA, iLNA, iSW), (5G, iPA, iLNA, iSW)
386 */
387
388 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
389
390 /* check registry valye */
391 if (GetRegRFEType(adapter) != CONFIG_RTW_RFE_TYPE) {
392 hal->rfe_type = GetRegRFEType(adapter);
393 goto exit;
394 }
395
396 if (mapvalid) {
397 /* check efuse map */
398 hal->rfe_type = map[EEPROM_RFE_OPTION_8821C];
399 if (0xFF != hal->rfe_type)
400 goto exit;
401 }
402
403 /* error handle */
404 hal->rfe_type = 0;
405 RTW_ERR("\n\nEmpty EFUSE with unknown REF type!!\n\n");
406 RTW_ERR("please program efuse or specify correct RFE type.\n");
407 RTW_ERR("cmd: insmod rtl8821cx.ko rtw_RFE_type=<rfe_type>\n\n");
408 return _FAIL;
409
410 exit:
411 RTW_INFO("EEPROM rfe_type=0x%x\n", hal->rfe_type);
412 return _SUCCESS;
413 }
414
415
Hal_EfuseParsePackageType(PADAPTER adapter,u8 * map,u8 mapvalid)416 static void Hal_EfuseParsePackageType(PADAPTER adapter, u8 *map, u8 mapvalid)
417 {
418 }
419
420 #ifdef CONFIG_USB_HCI
Hal_ReadUsbModeSwitch(PADAPTER adapter,u8 * map,u8 mapvalid)421 static void Hal_ReadUsbModeSwitch(PADAPTER adapter, u8 *map, u8 mapvalid)
422 {
423 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
424
425 if (_TRUE == mapvalid)
426 /* check efuse 0x06 bit7 */
427 hal->EEPROMUsbSwitch = (map[EEPROM_USB_MODE_8821CU] & BIT7) >> 7;
428 else
429 hal->EEPROMUsbSwitch = _FALSE;
430
431 RTW_INFO("EEPROM USB Switch=%d\n", hal->EEPROMUsbSwitch);
432 }
433
hal_read_usb_pid_vid(PADAPTER adapter,u8 * map,u8 mapvalid)434 static void hal_read_usb_pid_vid(PADAPTER adapter, u8 *map, u8 mapvalid)
435 {
436 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
437
438 if (mapvalid == _TRUE) {
439 /* VID, PID */
440 hal->EEPROMVID = ReadLE2Byte(&map[EEPROM_VID_8821CU]);
441 hal->EEPROMPID = ReadLE2Byte(&map[EEPROM_PID_8821CU]);
442 } else {
443 hal->EEPROMVID = EEPROM_Default_VID;
444 hal->EEPROMPID = EEPROM_Default_PID;
445 }
446
447 RTW_INFO("EEPROM VID = 0x%04X, PID = 0x%04X\n", hal->EEPROMVID, hal->EEPROMPID);
448 }
449
450 #endif /* CONFIG_USB_HCI */
451
452 /*
453 * Description:
454 * Collect all information from efuse or files.
455 * This function will do
456 * 1. Read registers to check hardware efuse available or not
457 * 2. Read Efuse/EEPROM
458 * 3. Read file if necessary
459 * 4. Parsing Efuse data
460 */
rtl8821c_read_efuse(PADAPTER adapter)461 u8 rtl8821c_read_efuse(PADAPTER adapter)
462 {
463 PHAL_DATA_TYPE hal;
464 u8 val8;
465 u8 *efuse_map = NULL;
466 u8 valid;
467 u8 ret = _FAIL;
468
469 hal = GET_HAL_DATA(adapter);
470 efuse_map = hal->efuse_eeprom_data;
471
472 /* 1. Read registers to check hardware eFuse available or not */
473 val8 = rtw_read8(adapter, REG_SYS_EEPROM_CTRL_8821C);
474 hal->bautoload_fail_flag = (val8 & BIT_AUTOLOAD_SUS_8821C) ? _FALSE : _TRUE;
475 /*
476 * In 8821C, bautoload_fail_flag is used to present eFuse map is valid
477 * or not, no matter the map comes from hardware or files.
478 */
479
480 /* 2. Read eFuse */
481 EFUSE_ShadowMapUpdate(adapter, EFUSE_WIFI, 0);
482
483 /* 3. Read Efuse file if necessary */
484 #ifdef CONFIG_EFUSE_CONFIG_FILE
485 if (check_phy_efuse_tx_power_info_valid(adapter) == _FALSE)
486 if (Hal_readPGDataFromConfigFile(adapter) != _SUCCESS)
487 RTW_INFO("%s: <WARN> invalid phy efuse and read from file fail, will use driver default!!\n", __FUNCTION__);
488 #endif /* CONFIG_EFUSE_CONFIG_FILE */
489
490 /* 4. Parse Efuse data */
491 valid = Hal_EfuseParseIDCode(adapter, efuse_map);
492 if (_TRUE == valid)
493 hal->bautoload_fail_flag = _FALSE;
494 else
495 hal->bautoload_fail_flag = _TRUE;
496
497 Hal_EfuseParseEEPROMVer(adapter, efuse_map, valid);
498 hal_config_macaddr(adapter, hal->bautoload_fail_flag);
499 Hal_EfuseParseTxPowerInfo(adapter, efuse_map, valid);
500 Hal_EfuseParseBoardType(adapter, efuse_map, valid);
501 Hal_EfuseParseBTCoexistInfo(adapter, efuse_map, valid);
502 Hal_EfuseParseChnlPlan(adapter, efuse_map, hal->bautoload_fail_flag);
503 Hal_EfuseParseXtal(adapter, efuse_map, valid);
504 Hal_EfuseParseThermalMeter(adapter, efuse_map, valid);
505 Hal_EfuseParseAntennaDiversity(adapter, efuse_map, valid);
506 Hal_EfuseParseCustomerID(adapter, efuse_map, valid);
507 Hal_DetectWoWMode(adapter);
508 if (Hal_ReadRFEType(adapter, efuse_map, valid) != _SUCCESS)
509 goto exit;
510 Hal_ReadAmplifierType(adapter, efuse_map, valid);
511 Hal_EfuseTxBBSwing(adapter, efuse_map, valid);
512
513 /* Data out of Efuse Map */
514 Hal_EfuseParsePackageType(adapter, efuse_map, valid);
515
516 #ifdef CONFIG_USB_HCI
517 Hal_ReadUsbModeSwitch(adapter, efuse_map, valid);
518 hal_read_usb_pid_vid(adapter, efuse_map, valid);
519 #endif /* CONFIG_USB_HCI */
520
521 /* set coex. ant info once efuse parsing is done */
522 rtw_btcoex_set_ant_info(adapter);
523
524 if (hal_read_mac_hidden_rpt(adapter) != _SUCCESS)
525 goto exit;
526 {
527 struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
528
529 if (hal_spec->hci_type <= 3 && hal_spec->hci_type >= 1) {
530 hal->EEPROMBluetoothCoexist = _FALSE;
531 RTW_INFO("EEPROM Disable BT-coex by hal_spec\n");
532 rtw_btcoex_wifionly_AntInfoSetting(adapter);
533 }
534 }
535
536 rtw_phydm_read_efuse(adapter);
537
538 ret = _SUCCESS;
539
540 exit:
541 return ret;
542 }
543
rtl8821c_run_thread(PADAPTER adapter)544 void rtl8821c_run_thread(PADAPTER adapter)
545 {
546 }
547
rtl8821c_cancel_thread(PADAPTER adapter)548 void rtl8821c_cancel_thread(PADAPTER adapter)
549 {
550 }
551
552 /*
553 * Description:
554 * Using 0x100 to check the power status of FW.
555 */
check_ips_status(PADAPTER adapter)556 static u8 check_ips_status(PADAPTER adapter)
557 {
558 u8 val8;
559
560
561 RTW_INFO(FUNC_ADPT_FMT ": Read 0x100=0x%02x 0x86=0x%02x\n",
562 FUNC_ADPT_ARG(adapter),
563 rtw_read8(adapter, 0x100), rtw_read8(adapter, 0x86));
564
565 val8 = rtw_read8(adapter, 0x100);
566 if (val8 == 0xEA)
567 return _TRUE;
568
569 return _FALSE;
570 }
571
572 #ifdef DBG_CONFIG_ERROR_DETECT
xmit_status_check(PADAPTER p)573 static void xmit_status_check(PADAPTER p)
574 {
575 PHAL_DATA_TYPE hal = GET_HAL_DATA(p);
576 struct sreset_priv *psrtpriv = &hal->srestpriv;
577 struct xmit_priv *pxmitpriv = &p->xmitpriv;
578 systime current_time = 0;
579 unsigned int diff_time = 0;
580 u32 txdma_status = 0;
581
582 txdma_status = rtw_read32(p, REG_TXDMA_STATUS_8821C);
583 if (txdma_status != 0x00) {
584 RTW_INFO("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status);
585 psrtpriv->tx_dma_status_cnt++;
586 psrtpriv->self_dect_case = 4;
587 rtw_hal_sreset_reset(p);
588 }
589 #ifdef DBG_PRE_TX_HANG
590 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI)
591 {
592 u8 hisr = rtw_read8(p, REG_HISR1_8821C + 3);
593 if (hisr & BIT_PRETXERR) {
594 RTW_ERR("PRE_TX_HANG\n");
595 rtw_write8(p, REG_HISR1_8821C + 3, BIT_PRETXERR);
596 }
597 }
598 #endif
599 #endif/*DBG_PRE_TX_HANG*/
600
601 #ifdef CONFIG_USB_HCI
602 current_time = rtw_get_current_time();
603
604 if (0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) {
605 diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time);
606
607 if (diff_time > 2000) {
608 if (psrtpriv->last_tx_complete_time == 0)
609 psrtpriv->last_tx_complete_time = current_time;
610 else {
611 diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time);
612 if (diff_time > 4000) {
613
614 RTW_INFO("%s tx hang %s\n", __FUNCTION__,
615 !adapter_to_rfctl(p)->adaptivity_en ? "" :
616 rtw_edcca_mode_str(rtw_get_edcca_mode(adapter_to_dvobj(p), hal->current_band_type)));
617
618 if (!adapter_to_rfctl(p)->adaptivity_en) {
619 psrtpriv->self_dect_tx_cnt++;
620 psrtpriv->self_dect_case = 1;
621 rtw_hal_sreset_reset(p);
622 }
623 }
624 }
625 }
626 }
627
628 #endif /* CONFIG_USB_HCI */
629
630 if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) {
631 psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
632 rtw_hal_sreset_reset(p);
633 return;
634 }
635 }
636
637 #ifdef CONFIG_USB_HCI
check_rx_count(PADAPTER p)638 static void check_rx_count(PADAPTER p)
639 {
640 PHAL_DATA_TYPE hal = GET_HAL_DATA(p);
641 struct sreset_priv *psrtpriv = &hal->srestpriv;
642 u16 cur_mac_rxff_ptr;
643
644 cur_mac_rxff_ptr = rtw_read16(p, REG_RXFF_PTR_V1_8821C);
645
646 #if 0
647 RTW_INFO("%s,psrtpriv->last_mac_rxff_ptr = %d , cur_mac_rxff_ptr = %d\n", __func__, psrtpriv->last_mac_rxff_ptr, cur_mac_rxff_ptr);
648 #endif
649
650 if (psrtpriv->last_mac_rxff_ptr == cur_mac_rxff_ptr) {
651 psrtpriv->rx_cnt++;
652 #if 0
653 RTW_INFO("%s,MAC case rx_cnt=%d\n", __func__, psrtpriv->rx_cnt);
654 #endif
655 goto exit;
656 }
657
658 psrtpriv->rx_cnt = 0;
659
660 exit:
661
662 psrtpriv->last_mac_rxff_ptr = cur_mac_rxff_ptr;
663
664 if (psrtpriv->rx_cnt > 3) {
665 psrtpriv->self_dect_case = 2;
666 psrtpriv->self_dect_rx_cnt++;
667 rtw_hal_sreset_reset(p);
668 }
669 }
670 #endif/*#ifdef CONFIG_USB_HCI*/
671
linked_status_check(PADAPTER p)672 static void linked_status_check(PADAPTER p)
673 {
674 PHAL_DATA_TYPE hal = GET_HAL_DATA(p);
675 struct sreset_priv *psrtpriv = &hal->srestpriv;
676 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(p);
677 u32 rx_dma_status = 0;
678
679 rx_dma_status = rtw_read32(p, REG_RXDMA_STATUS_8821C);
680 if (rx_dma_status != 0x00) {
681 RTW_INFO("%s REG_RXDMA_STATUS:0x%08x\n", __FUNCTION__, rx_dma_status);
682 psrtpriv->rx_dma_status_cnt++;
683 psrtpriv->self_dect_case = 5;
684 #ifdef CONFIG_USB_HCI
685 rtw_hal_sreset_reset(p);
686 #endif /* CONFIG_USB_HCI */
687 }
688
689 if (psrtpriv->self_dect_fw) {
690 psrtpriv->self_dect_case = 3;
691 #ifdef CONFIG_USB_HCI
692 rtw_hal_sreset_reset(p);
693 #endif /* CONFIG_USB_HCI */
694 }
695
696 #ifdef CONFIG_USB_HCI
697 check_rx_count(p);
698 #endif /* CONFIG_USB_HCI */
699
700 if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) {
701 psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
702 rtw_hal_sreset_reset(p);
703 return;
704 }
705 }
706 #endif /* DBG_CONFIG_ERROR_DETECT */
707
708 static const struct hw_port_reg port_cfg[] = {
709 /*port 0*/
710 {
711 .net_type = (REG_CR_8821C + 2),
712 .net_type_shift = 0,
713 .macaddr = REG_MACID,
714 .bssid = REG_BSSID,
715 .bcn_ctl = REG_BCN_CTRL,
716 .tsf_rst = REG_DUAL_TSF_RST,
717 .tsf_rst_bit = BIT_TSFTR_RST,
718 .bcn_space = REG_MBSSID_BCN_SPACE,
719 .bcn_space_shift = 0,
720 .bcn_space_mask = 0xffff,
721 .ps_aid = REG_BCN_PSR_RPT_8821C,
722 .ta = REG_TRANSMIT_ADDRSS_0_8821C,
723 },
724 /*port 1*/
725 {
726 .net_type = (REG_CR_8821C + 2),
727 .net_type_shift = 2,
728 .macaddr = REG_MACID1,
729 .bssid = REG_BSSID1,
730 .bcn_ctl = REG_BCN_CTRL_CLINT0,
731 .tsf_rst = REG_DUAL_TSF_RST,
732 .tsf_rst_bit = BIT_TSFTR_CLI0_RST,
733 .bcn_space = REG_MBSSID_BCN_SPACE,
734 .bcn_space_shift = 16,
735 .bcn_space_mask = 0xfff,
736 .ps_aid = REG_BCN_PSR_RPT1_8821C,
737 .ta = REG_TRANSMIT_ADDRSS_1_8821C,
738 },
739 /*port 2*/
740 {
741 .net_type = REG_CR_EXT_8821C,
742 .net_type_shift = 0,
743 .macaddr = REG_MACID2,
744 .bssid = REG_BSSID2,
745 .bcn_ctl = REG_BCN_CTRL_CLINT1,
746 .tsf_rst = REG_DUAL_TSF_RST,
747 .tsf_rst_bit = BIT_TSFTR_CLI1_RST,
748 .bcn_space = REG_MBSSID_BCN_SPACE2,
749 .bcn_space_shift = 0,
750 .bcn_space_mask = 0xfff,
751 .ps_aid = REG_BCN_PSR_RPT2_8821C,
752 .ta = REG_TRANSMIT_ADDRSS_2_8821C,
753 },
754 /*port 3*/
755 {
756 .net_type = REG_CR_EXT_8821C,
757 .net_type_shift = 2,
758 .macaddr = REG_MACID3,
759 .bssid = REG_BSSID3,
760 .bcn_ctl = REG_BCN_CTRL_CLINT2,
761 .tsf_rst = REG_DUAL_TSF_RST,
762 .tsf_rst_bit = BIT_TSFTR_CLI2_RST,
763 .bcn_space = REG_MBSSID_BCN_SPACE2,
764 .bcn_space_shift = 16,
765 .bcn_space_mask = 0xfff,
766 .ps_aid = REG_BCN_PSR_RPT3_8821C,
767 .ta = REG_TRANSMIT_ADDRSS_3_8821C,
768 },
769 /*port 4*/
770 {
771 .net_type = REG_CR_EXT_8821C,
772 .net_type_shift = 4,
773 .macaddr = REG_MACID4,
774 .bssid = REG_BSSID4,
775 .bcn_ctl = REG_BCN_CTRL_CLINT3,
776 .tsf_rst = REG_DUAL_TSF_RST,
777 .tsf_rst_bit = BIT_TSFTR_CLI3_RST,
778 .bcn_space = REG_MBSSID_BCN_SPACE3,
779 .bcn_space_shift = 0,
780 .bcn_space_mask = 0xfff,
781 .ps_aid = REG_BCN_PSR_RPT4_8821C,
782 .ta = REG_TRANSMIT_ADDRSS_4_8821C,
783 },
784 };
785
hw_bcn_ctrl_addr(_adapter * adapter,u8 hw_port)786 static u32 hw_bcn_ctrl_addr(_adapter *adapter, u8 hw_port)
787 {
788 struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
789 u32 addr = 0;
790
791 if (hw_port >= hal_spec->port_num) {
792 RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port);
793 rtw_warn_on(1);
794 goto exit;
795 }
796
797 addr = port_cfg[hw_port].bcn_ctl;
798
799 exit:
800 return addr;
801 }
802
hw_bcn_ctrl_set(_adapter * adapter,u8 hw_port,u8 bcn_ctl_val)803 static void hw_bcn_ctrl_set(_adapter *adapter, u8 hw_port, u8 bcn_ctl_val)
804 {
805 u32 bcn_ctl_addr = 0;
806
807 if (hw_port >= MAX_HW_PORT) {
808 RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port);
809 rtw_warn_on(1);
810 return;
811 }
812
813 bcn_ctl_addr = port_cfg[hw_port].bcn_ctl;
814 rtw_write8(adapter, bcn_ctl_addr, bcn_ctl_val);
815 }
816
hw_bcn_ctrl_add(_adapter * adapter,u8 hw_port,u8 bcn_ctl_val)817 static void hw_bcn_ctrl_add(_adapter *adapter, u8 hw_port, u8 bcn_ctl_val)
818 {
819 u32 bcn_ctl_addr = 0;
820 u8 val8 = 0;
821
822 if (hw_port >= MAX_HW_PORT) {
823 RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port);
824 rtw_warn_on(1);
825 return;
826 }
827
828 bcn_ctl_addr = port_cfg[hw_port].bcn_ctl;
829 val8 = rtw_read8(adapter, bcn_ctl_addr) | bcn_ctl_val;
830 rtw_write8(adapter, bcn_ctl_addr, val8);
831 }
832
hw_bcn_ctrl_clr(_adapter * adapter,u8 hw_port,u8 bcn_ctl_val)833 static void hw_bcn_ctrl_clr(_adapter *adapter, u8 hw_port, u8 bcn_ctl_val)
834 {
835 u32 bcn_ctl_addr = 0;
836 u8 val8 = 0;
837
838 if (hw_port >= MAX_HW_PORT) {
839 RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port);
840 rtw_warn_on(1);
841 return;
842 }
843
844 bcn_ctl_addr = port_cfg[hw_port].bcn_ctl;
845 val8 = rtw_read8(adapter, bcn_ctl_addr);
846 val8 &= ~bcn_ctl_val;
847 rtw_write8(adapter, bcn_ctl_addr, val8);
848 }
849
850
hw_bcn_func(_adapter * adapter,u8 enable)851 static void hw_bcn_func(_adapter *adapter, u8 enable)
852 {
853 if (enable)
854 hw_bcn_ctrl_add(adapter, get_hw_port(adapter), BIT_EN_BCN_FUNCTION);
855 else
856 hw_bcn_ctrl_clr(adapter, get_hw_port(adapter), BIT_EN_BCN_FUNCTION);
857 }
858
hw_port0_tsf_sync(_adapter * adapter)859 void hw_port0_tsf_sync(_adapter *adapter)
860 {
861 rtw_write8(adapter, REG_SCHEDULER_RST, rtw_read8(adapter, REG_SCHEDULER_RST) | BIT_SYNC_CLI_ONCE_BY_TBTT_8821C);
862 }
863
hw_tsf_reset(_adapter * adapter)864 void hw_tsf_reset(_adapter *adapter)
865 {
866 u8 hw_port = rtw_hal_get_port(adapter);
867 u32 tsf_rst_addr = 0;
868 u8 tsf_rst_bit = 0;
869
870 if (hw_port >= MAX_HW_PORT) {
871 RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port);
872 rtw_warn_on(1);
873 return;
874 }
875
876 tsf_rst_addr = port_cfg[hw_port].tsf_rst;
877 tsf_rst_bit = port_cfg[hw_port].tsf_rst_bit;
878 rtw_write8(adapter, tsf_rst_addr, tsf_rst_bit);
879 }
880
hw_var_set_monitor(PADAPTER adapter)881 static void hw_var_set_monitor(PADAPTER adapter)
882 {
883 #ifdef CONFIG_WIFI_MONITOR
884 u8 tmp_8bit;
885 u32 tmp_32bit;
886 struct net_device *ndev = adapter->pnetdev;
887 struct mon_reg_backup *mon = &GET_HAL_DATA(adapter)->mon_backup;
888
889 mon->known_rcr = 1;
890 rtw_hal_get_hwreg(adapter, HW_VAR_RCR, (u8 *)& mon->rcr);
891
892 /* Receive all type */
893 tmp_32bit = BIT_AAP_8821C | BIT_APP_PHYSTS_8821C;
894
895 if (ndev->type == ARPHRD_IEEE80211_RADIOTAP) {
896 /* Append FCS */
897 tmp_32bit |= BIT_APP_FCS_8821C;
898 }
899
900 rtw_hal_set_hwreg(adapter, HW_VAR_RCR, (u8 *)& tmp_32bit);
901
902 if (1)
903 rtw_halmac_config_rx_info(adapter_to_dvobj(adapter),
904 HALMAC_DRV_INFO_PHY_SNIFFER);
905 else
906 rtw_halmac_config_rx_info(adapter_to_dvobj(adapter),
907 HALMAC_DRV_INFO_PHY_PLCP);
908
909 tmp_8bit = rtw_read8(adapter, REG_RX_DRVINFO_SZ_8821C);
910 rtw_write8(adapter, REG_RX_DRVINFO_SZ_8821C, (tmp_8bit | 0x80));
911
912 /* Receive all data frames */
913 mon->known_rxfilter = 1;
914 mon->rxfilter0 = rtw_read16(adapter, REG_RXFLTMAP0_8821C);
915 mon->rxfilter1 = rtw_read16(adapter, REG_RXFLTMAP1_8821C);
916 mon->rxfilter2 = rtw_read16(adapter, REG_RXFLTMAP2_8821C);
917 rtw_write16(adapter, REG_RXFLTMAP0_8821C, 0xFFFF);
918 rtw_write16(adapter, REG_RXFLTMAP1_8821C, 0xFFFF);
919 rtw_write16(adapter, REG_RXFLTMAP2_8821C, 0xFFFF);
920 #endif /* CONFIG_WIFI_MONITOR */
921 }
922
hw_set_ta(_adapter * adapter,u8 hw_port,u8 * val)923 void hw_set_ta(_adapter *adapter, u8 hw_port, u8 *val)
924 {
925 u8 idx = 0;
926 u32 reg = port_cfg[hw_port].ta;
927
928 for (idx = 0 ; idx < ETH_ALEN; idx++)
929 rtw_write8(adapter, (reg + idx), val[idx]);
930
931 RTW_INFO("%s("ADPT_FMT") hw port -%d TA: "MAC_FMT"\n",
932 __func__, ADPT_ARG(adapter), hw_port, MAC_ARG(val));
933 }
hw_set_aid(_adapter * adapter,u8 hw_port,u8 aid)934 void hw_set_aid(_adapter *adapter, u8 hw_port, u8 aid)
935 {
936 rtw_write16(adapter, port_cfg[hw_port].ps_aid, (0xF800 | aid));
937 RTW_INFO("%s("ADPT_FMT") hw port -%d AID: %d\n",
938 __func__, ADPT_ARG(adapter), hw_port, aid);
939 }
940 #ifdef CONFIG_CLIENT_PORT_CFG
rtw_hw_client_port_cfg(_adapter * adapter)941 void rtw_hw_client_port_cfg(_adapter *adapter)
942 {
943 struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
944 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
945 u8 clt_port = get_clt_port(adapter);
946
947 if (clt_port == CLT_PORT_INVALID)
948 return;
949 RTW_INFO("%s ("ADPT_FMT")\n", __func__, ADPT_ARG(adapter));
950
951 /*Network type*/
952 rtw_halmac_set_network_type(adapter_to_dvobj(adapter), clt_port, _HW_STATE_STATION_);
953 /*A1*/
954 rtw_halmac_set_mac_address(adapter_to_dvobj(adapter), clt_port, adapter_mac_addr(adapter));
955 /*A2*/
956 hw_set_ta(adapter, clt_port, pmlmeinfo->network.MacAddress);
957 /*A3*/
958 rtw_halmac_set_bssid(adapter_to_dvobj(adapter), clt_port, pmlmeinfo->network.MacAddress);
959 /*Beacon space*/
960 rtw_halmac_set_bcn_interval(adapter_to_dvobj(adapter), clt_port, pmlmeinfo->bcn_interval);
961 /*AID*/
962 hw_set_aid(adapter, clt_port, pmlmeinfo->aid);
963 /*Beacon control*/
964 hw_bcn_ctrl_set(adapter, clt_port, (BIT_P0_EN_RXBCN_RPT | BIT_EN_BCN_FUNCTION));
965
966 RTW_INFO("%s ("ADPT_FMT") clt_port:%d\n", __func__, ADPT_ARG(adapter), clt_port);
967 }
968
969 /*#define DBG_TSF_MONITOR*/
rtw_hw_client_port_clr(_adapter * adapter)970 void rtw_hw_client_port_clr(_adapter *adapter)
971 {
972 u8 null_addr[ETH_ALEN] = {0};
973 u8 clt_port = get_clt_port(adapter);
974
975 if (clt_port == CLT_PORT_INVALID)
976 return;
977 RTW_INFO("%s ("ADPT_FMT") ==> \n", __func__, ADPT_ARG(adapter));
978 #ifdef DBG_TSF_MONITOR
979 /*Beacon control*/
980 hw_bcn_ctrl_clr(adapter, clt_port, BIT_EN_BCN_FUNCTION);
981 hw_tsf_reset(adapter);
982 #endif
983 /*Network type*/
984 rtw_halmac_set_network_type(adapter_to_dvobj(adapter), clt_port, _HW_STATE_NOLINK_);
985 /*A1*/
986 rtw_halmac_set_mac_address(adapter_to_dvobj(adapter), clt_port, null_addr);
987 /*A2*/
988 hw_set_ta(adapter, clt_port, null_addr);
989 /*A3*/
990 rtw_halmac_set_bssid(adapter_to_dvobj(adapter), clt_port, null_addr);
991 #ifdef DBG_TSF_MONITOR
992 if (0)
993 #endif
994 /*Beacon control*/
995 hw_bcn_ctrl_set(adapter, clt_port, (BIT_DIS_TSF_UDT | BIT_EN_BCN_FUNCTION));
996 /*AID*/
997 hw_set_aid(adapter, clt_port, 0);
998 RTW_INFO("%s("ADPT_FMT") clt_port:%d\n", __func__, ADPT_ARG(adapter), clt_port);
999 }
1000 #endif
1001
hw_var_set_opmode(PADAPTER Adapter,u8 * val)1002 static void hw_var_set_opmode(PADAPTER Adapter, u8 *val)
1003 {
1004 u8 mode = *((u8 *)val);
1005 static u8 isMonitor = _FALSE;
1006 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1007
1008 if (isMonitor == _TRUE) {
1009 #ifdef CONFIG_WIFI_MONITOR
1010 struct mon_reg_backup *backup = &GET_HAL_DATA(Adapter)->mon_backup;
1011
1012 if (backup->known_rcr) {
1013 backup->known_rcr = 0;
1014 rtw_hal_set_hwreg(Adapter, HW_VAR_RCR, (u8 *)&backup->rcr);
1015
1016 if (!!(backup->rcr &= BIT_APP_PHYSTS_8821C))
1017 rtw_halmac_config_rx_info(adapter_to_dvobj(Adapter),
1018 HALMAC_DRV_INFO_PHY_STATUS);
1019 else
1020 rtw_halmac_config_rx_info(adapter_to_dvobj(Adapter),
1021 HALMAC_DRV_INFO_NONE);
1022
1023 rtw_hal_rcr_set_chk_bssid(Adapter, MLME_ACTION_NONE);
1024 }
1025 if (backup->known_rxfilter) {
1026 backup->known_rxfilter = 0;
1027 rtw_write16(Adapter, REG_RXFLTMAP0_8821C, backup->rxfilter0);
1028 rtw_write16(Adapter, REG_RXFLTMAP1_8821C, backup->rxfilter1);
1029 rtw_write16(Adapter, REG_RXFLTMAP2_8821C, backup->rxfilter2);
1030 }
1031 #endif /* CONFIG_WIFI_MONITOR */
1032 isMonitor = _FALSE;
1033 }
1034
1035 if (mode == _HW_STATE_MONITOR_) {
1036 isMonitor = _TRUE;
1037
1038 /* set net_type */
1039 Set_MSR(Adapter, _HW_STATE_NOLINK_);
1040 hw_var_set_monitor(Adapter);
1041 return;
1042 }
1043
1044 rtw_hal_set_hwreg(Adapter, HW_VAR_MAC_ADDR, adapter_mac_addr(Adapter)); /* set mac addr to mac register */
1045 RTW_INFO(ADPT_FMT ": hw_port(%d) set mode=%d\n", ADPT_ARG(Adapter), get_hw_port(Adapter), mode);
1046
1047 #ifdef CONFIG_MI_WITH_MBSSID_CAM /*For Port0 - MBSS CAM*/
1048 if (Adapter->hw_port != HW_PORT0) {
1049 RTW_ERR(ADPT_FMT ": Configure MBSSID cam on HW_PORT%d\n", ADPT_ARG(Adapter), Adapter->hw_port);
1050 rtw_warn_on(1);
1051 } else
1052 hw_var_set_opmode_mbid(Adapter, mode);
1053 #else
1054
1055 rtw_iface_disable_tsf_update(Adapter);
1056
1057 /* set net_type */
1058 Set_MSR(Adapter, mode);
1059
1060 if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) {
1061 #ifdef CONFIG_INTERRUPT_BASED_TXBCN
1062 if (!rtw_mi_get_ap_num(Adapter) && !rtw_mi_get_mesh_num(Adapter)) {
1063 /*CONFIG_INTERRUPT_BASED_TXBCN*/
1064 #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT
1065 rtw_write8(Adapter, REG_DRVERLYINT, 0x05);/* restore early int time to 5ms */
1066 #if defined(CONFIG_SDIO_HCI)
1067 rtl8821cs_update_interrupt_mask(Adapter, 0, SDIO_HIMR_BCNERLY_INT_MSK);
1068 #endif
1069 #endif/* CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT */
1070
1071 #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
1072 #if defined(CONFIG_SDIO_HCI)
1073 rtl8821cs_update_interrupt_mask(Adapter, 0, (SDIO_HIMR_TXBCNOK_MSK | SDIO_HIMR_TXBCNERR_MSK));
1074 #endif
1075 #endif /* CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR */
1076 }
1077 #endif /* CONFIG_INTERRUPT_BASED_TXBCN */
1078
1079 if (!rtw_mi_get_ap_num(Adapter) && !rtw_mi_get_mesh_num(Adapter))
1080 StopTxBeacon(Adapter);
1081 hw_bcn_ctrl_set(Adapter, get_hw_port(Adapter), BIT_EN_BCN_FUNCTION_8821C | BIT_DIS_TSF_UDT_8821C);
1082
1083 } else if (mode == _HW_STATE_ADHOC_) {
1084 ResumeTxBeacon(Adapter);
1085 hw_bcn_ctrl_set(Adapter, get_hw_port(Adapter), BIT_EN_BCN_FUNCTION_8821C | BIT_DIS_TSF_UDT_8821C);
1086
1087 } else if (mode == _HW_STATE_AP_) {
1088
1089 if (Adapter->hw_port == HW_PORT0) {
1090 #ifdef CONFIG_INTERRUPT_BASED_TXBCN
1091 #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT
1092 #if defined(CONFIG_SDIO_HCI)
1093 rtl8821cs_update_interrupt_mask(Adapter, SDIO_HIMR_BCNERLY_INT_MSK, 0);
1094 #endif
1095 #endif/* CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT */
1096
1097 #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
1098 #if defined(CONFIG_SDIO_HCI)
1099 rtl8821cs_update_interrupt_mask(Adapter, (SDIO_HIMR_TXBCNOK_MSK | SDIO_HIMR_TXBCNERR_MSK), 0);
1100 #endif
1101 #endif/* CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR */
1102 #endif /* CONFIG_INTERRUPT_BASED_TXBCN */
1103
1104 /* enable to rx data frame */
1105 rtw_write16(Adapter, REG_RXFLTMAP2_8821C, 0xFFFF);
1106
1107 /* Beacon Control related register for first time */
1108 rtw_write8(Adapter, REG_BCNDMATIM_8821C, 0x02); /* 2ms */
1109
1110 rtw_write8(Adapter, REG_ATIMWND_8821C, 0x0c); /* ATIM:12ms */
1111
1112 /*rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET_8821C, 0x7fff);*//* +32767 (~32ms) */
1113 hw_tsf_reset(Adapter);
1114 /* don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) */
1115 #if defined(CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR)
1116 hw_bcn_ctrl_set(Adapter, get_hw_port(Adapter), BIT_EN_BCN_FUNCTION_8821C | BIT_DIS_TSF_UDT_8821C | BIT_P0_EN_TXBCN_RPT_8821C);
1117 #else
1118 hw_bcn_ctrl_set(Adapter, get_hw_port(Adapter), BIT_EN_BCN_FUNCTION_8821C | BIT_DIS_TSF_UDT_8821C);
1119 #endif
1120 } else {
1121 RTW_ERR(ADPT_FMT ": set AP mode on HW_PORT%d\n", ADPT_ARG(Adapter), Adapter->hw_port);
1122 rtw_warn_on(1);
1123 }
1124 }
1125 #endif
1126 }
1127
1128 #ifdef CONFIG_AP_PORT_SWAP
rtw_hal_port_reconfig(_adapter * adapter,u8 port)1129 void rtw_hal_port_reconfig(_adapter *adapter, u8 port)
1130 {
1131 struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
1132 u32 bssid_offset = 0;
1133 u8 bssid[6] = {0};
1134 u8 vnet_type = 0;
1135 u8 vbcn_ctrl = 0;
1136 u8 i;
1137
1138 if (port > (hal_spec->port_num - 1)) {
1139 RTW_INFO("[WARN] "ADPT_FMT"- hw_port : %d,will switch to invalid port-%d\n",
1140 ADPT_ARG(adapter), adapter->hw_port, port);
1141 rtw_warn_on(1);
1142 }
1143
1144 RTW_PRINT(ADPT_FMT" - hw_port : %d,will switch to port-%d\n",
1145 ADPT_ARG(adapter), adapter->hw_port, port);
1146
1147 /*backup*/
1148 vnet_type = (rtw_read8(adapter, port_cfg[adapter->hw_port].net_type) >> port_cfg[adapter->hw_port].net_type_shift) & 0x03;
1149 vbcn_ctrl = rtw_read8(adapter, port_cfg[adapter->hw_port].bcn_ctl);
1150 if (is_client_associated_to_ap(adapter)) {
1151 RTW_INFO("port0-iface is STA mode and linked\n");
1152 bssid_offset = port_cfg[adapter->hw_port].bssid;
1153 for (i = 0; i < 6; i++)
1154 bssid[i] = rtw_read8(adapter, bssid_offset + i);
1155 }
1156 /*reconfigure*/
1157 adapter->hw_port = port;
1158 rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, adapter_mac_addr(adapter));
1159 Set_MSR(adapter, vnet_type);
1160
1161 if (is_client_associated_to_ap(adapter)) {
1162 rtw_hal_set_hwreg(adapter, HW_VAR_BSSID, bssid);
1163 hw_tsf_reset(adapter);
1164 #ifdef CONFIG_FW_MULTI_PORT_SUPPORT
1165 rtw_set_default_port_id(adapter);
1166 #endif
1167 }
1168 #if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT)
1169 if (GET_HAL_DATA(adapter)->EEPROMBluetoothCoexist == _TRUE)
1170 rtw_hal_set_wifi_btc_port_id_cmd(adapter);
1171 #endif
1172
1173 rtw_write8(adapter, port_cfg[adapter->hw_port].bcn_ctl, vbcn_ctrl);
1174 }
rtl8821c_ap_port_switch(_adapter * adapter,u8 mode)1175 static void rtl8821c_ap_port_switch(_adapter *adapter, u8 mode)
1176 {
1177 u8 hw_port = get_hw_port(adapter);
1178 struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
1179 u8 ap_nums = 0;
1180 _adapter *if_port0 = NULL;
1181 int i;
1182
1183 RTW_INFO(ADPT_FMT ": hw_port(%d) will set mode to %d\n", ADPT_ARG(adapter), hw_port, mode);
1184 #if 0
1185 #ifdef CONFIG_P2P
1186 if (!rtw_p2p_chk_state(&adapter->wdinfo, P2P_STATE_NONE)) {
1187 RTW_INFO("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__,
1188 rtw_p2p_role(&adapter->wdinfo), rtw_p2p_state(&adapter->wdinfo), rtw_p2p_pre_state(&adapter->wdinfo));
1189 }
1190 #endif
1191 #endif
1192
1193 if (mode != _HW_STATE_AP_)
1194 return;
1195
1196 if ((mode == _HW_STATE_AP_) && (hw_port == HW_PORT0))
1197 return;
1198
1199 /*check and prepare switch port to port0 for AP mode's BCN function*/
1200 ap_nums = rtw_mi_get_ap_num(adapter);
1201 if (ap_nums > 0) {
1202 RTW_ERR("SortAP mode numbers:%d, must move setting to MBSSID CAM, not support yet\n", ap_nums);
1203 rtw_warn_on(1);
1204 return;
1205 }
1206
1207 /*Get iface of port-0*/
1208 for (i = 0; i < dvobj->iface_nums; i++) {
1209 if (get_hw_port(dvobj->padapters[i]) == HW_PORT0) {
1210 if_port0 = dvobj->padapters[i];
1211 break;
1212 }
1213 }
1214
1215 if (if_port0 == NULL) {
1216 RTW_ERR("%s if_port0 == NULL\n", __func__);
1217 rtw_warn_on(1);
1218 return;
1219 }
1220 rtw_hal_port_reconfig(if_port0, hw_port);
1221
1222 adapter->hw_port = HW_PORT0;
1223 RTW_INFO(ADPT_FMT ": Cfg SoftAP mode to hw_port(%d) done\n", ADPT_ARG(adapter), adapter->hw_port);
1224
1225 }
1226 #endif
hw_var_hw_port_cfg(_adapter * adapter,u8 enable)1227 static void hw_var_hw_port_cfg(_adapter *adapter, u8 enable)
1228 {
1229 if (enable)
1230 hw_bcn_ctrl_add(adapter, get_hw_port(adapter), (BIT_P0_EN_RXBCN_RPT | BIT_DIS_TSF_UDT | BIT_EN_BCN_FUNCTION));
1231 else
1232 hw_bcn_ctrl_clr(adapter, get_hw_port(adapter), BIT_EN_BCN_FUNCTION);
1233 }
hw_var_set_bcn_func(PADAPTER adapter,u8 enable)1234 static void hw_var_set_bcn_func(PADAPTER adapter, u8 enable)
1235 {
1236 u8 val8;
1237
1238 if (enable) {
1239 /* enable TX BCN report
1240 * Reg REG_FWHW_TXQ_CTRL_8821C[2] = 1
1241 * Reg REG_BCN_CTRL_8821C[3][5] = 1
1242 */
1243 val8 = rtw_read8(adapter, REG_FWHW_TXQ_CTRL_8821C);
1244 val8 |= BIT_EN_BCN_TRXRPT_V1_8821C;
1245 rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8821C, val8);
1246
1247 if (adapter->hw_port == HW_PORT0)
1248 hw_bcn_ctrl_add(adapter, get_hw_port(adapter), BIT_EN_BCN_FUNCTION_8821C | BIT_P0_EN_TXBCN_RPT_8821C);
1249 else
1250 hw_bcn_ctrl_add(adapter, get_hw_port(adapter), BIT_EN_BCN_FUNCTION_8821C);
1251 } else {
1252 if (adapter->hw_port == HW_PORT0) {
1253 val8 = BIT_EN_BCN_FUNCTION_8821C | BIT_P0_EN_TXBCN_RPT_8821C;
1254
1255 #ifdef CONFIG_BT_COEXIST
1256 /* Always enable port0 beacon function for PSTDMA */
1257 if (GET_HAL_DATA(adapter)->EEPROMBluetoothCoexist)
1258 val8 = BIT_P0_EN_TXBCN_RPT_8821C;
1259 #endif
1260 hw_bcn_ctrl_clr(adapter, get_hw_port(adapter), val8);
1261 } else
1262 hw_bcn_ctrl_clr(adapter, get_hw_port(adapter), BIT_EN_BCN_FUNCTION_8821C);
1263 }
1264 }
1265
hw_var_set_mlme_disconnect(PADAPTER adapter)1266 static void hw_var_set_mlme_disconnect(PADAPTER adapter)
1267 {
1268 u8 val8;
1269
1270 #ifdef DBG_IFACE_STATUS
1271 DBG_IFACE_STATUS_DUMP(adapter);
1272 #endif
1273
1274 #ifdef CONFIG_CONCURRENT_MODE
1275 if (rtw_mi_check_status(adapter, MI_LINKED) == _FALSE)
1276 #endif
1277 /* reject all data frames under not link state */
1278 rtw_write16(adapter, REG_RXFLTMAP2_8821C, 0);
1279
1280 /* reset TSF*/
1281 hw_tsf_reset(adapter);
1282
1283 /* disable update TSF*/
1284 rtw_iface_disable_tsf_update(adapter);
1285
1286 #ifdef CONFIG_CLIENT_PORT_CFG
1287 if (MLME_IS_STA(adapter))
1288 rtw_hw_client_port_clr(adapter);
1289 #endif
1290 }
1291
hw_var_set_mlme_sitesurvey(PADAPTER adapter,u8 enable)1292 static void hw_var_set_mlme_sitesurvey(PADAPTER adapter, u8 enable)
1293 {
1294 struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
1295 u16 value_rxfltmap2;
1296 u8 val8;
1297 PHAL_DATA_TYPE hal;
1298 struct mlme_priv *pmlmepriv;
1299 int i;
1300 _adapter *iface;
1301
1302
1303 #ifdef DBG_IFACE_STATUS
1304 DBG_IFACE_STATUS_DUMP(adapter);
1305 #endif
1306
1307 hal = GET_HAL_DATA(adapter);
1308 pmlmepriv = &adapter->mlmepriv;
1309
1310 #ifdef CONFIG_FIND_BEST_CHANNEL
1311 /* Receive all data frames */
1312 value_rxfltmap2 = 0xFFFF;
1313 #else
1314 /* not to receive data frame */
1315 value_rxfltmap2 = 0;
1316 #endif
1317
1318 if (enable) {
1319 /*
1320 * 1. configure REG_RXFLTMAP2
1321 * 2. disable TSF update & buddy TSF update to avoid updating wrong TSF due to clear RCR_CBSSID_BCN
1322 * 3. config RCR to receive different BSSID BCN or probe rsp
1323 */
1324
1325 rtw_write16(adapter, REG_RXFLTMAP2_8821C, value_rxfltmap2);
1326
1327 rtw_hal_rcr_set_chk_bssid(adapter, MLME_SCAN_ENTER);
1328
1329 if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter))
1330 StopTxBeacon(adapter);
1331 } else {
1332 /* sitesurvey done
1333 * 1. enable rx data frame
1334 * 2. config RCR not to receive different BSSID BCN or probe rsp
1335 * 3. can enable TSF update & buddy TSF right now due to HW support(IC before 8821C not support ex:8812A/8814A/8192E...)
1336 */
1337 if (rtw_mi_check_fwstate(adapter, WIFI_ASOC_STATE | WIFI_AP_STATE | WIFI_MESH_STATE))/* enable to rx data frame */
1338 rtw_write16(adapter, REG_RXFLTMAP2_8821C, 0xFFFF);
1339
1340 rtw_hal_rcr_set_chk_bssid(adapter, MLME_SCAN_DONE);
1341
1342 #ifdef CONFIG_AP_MODE
1343 if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter)) {
1344 ResumeTxBeacon(adapter);
1345 rtw_mi_tx_beacon_hdl(adapter);
1346 }
1347 #endif
1348 }
1349 }
hw_var_set_mlme_join(PADAPTER adapter,u8 type)1350 static void hw_var_set_mlme_join(PADAPTER adapter, u8 type)
1351 {
1352 u8 val8;
1353 u16 val16;
1354 u32 val32;
1355 u8 RetryLimit;
1356 PHAL_DATA_TYPE hal;
1357 struct mlme_priv *pmlmepriv;
1358
1359 RetryLimit = RL_VAL_STA;
1360 hal = GET_HAL_DATA(adapter);
1361 pmlmepriv = &adapter->mlmepriv;
1362
1363
1364 #ifdef CONFIG_CONCURRENT_MODE
1365 if (type == 0) {
1366 /* prepare to join */
1367 if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter))
1368 StopTxBeacon(adapter);
1369
1370 /* enable to rx data frame.Accept all data frame */
1371 rtw_write16(adapter, REG_RXFLTMAP2_8821C, 0xFFFF);
1372
1373 hw_bcn_func(adapter, _TRUE);
1374 if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
1375 RetryLimit = (hal->CustomerID == RT_CID_CCX) ? RL_VAL_AP : RL_VAL_STA;
1376 else /* Ad-hoc Mode */
1377 RetryLimit = RL_VAL_AP;
1378 #ifdef CONFIG_CLIENT_PORT_CFG
1379 rtw_hw_client_port_cfg(adapter);
1380 #endif
1381
1382 rtw_iface_enable_tsf_update(adapter);
1383
1384 } else if (type == 1) {
1385 /* joinbss_event call back when join res < 0 */
1386 if (rtw_mi_check_status(adapter, MI_LINKED) == _FALSE)
1387 rtw_write16(adapter, REG_RXFLTMAP2_8821C, 0x00);
1388
1389 rtw_iface_disable_tsf_update(adapter);
1390
1391 if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter)) {
1392 ResumeTxBeacon(adapter);
1393
1394 /* reset TSF 1/2 after resume_tx_beacon */
1395 val8 = BIT_TSFTR_RST_8821C | BIT_TSFTR_CLI0_RST_8821C;
1396 rtw_write8(adapter, REG_DUAL_TSF_RST_8821C, val8);
1397 }
1398 #ifdef CONFIG_CLIENT_PORT_CFG
1399 if (MLME_IS_STA(adapter))
1400 rtw_hw_client_port_clr(adapter);
1401 #endif
1402 } else if (type == 2) {
1403 /* sta add event callback */
1404 if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)) {
1405 rtw_write8(adapter, 0x542, 0x02);
1406 RetryLimit = RL_VAL_AP;
1407 }
1408
1409 if (rtw_mi_get_ap_num(adapter) || rtw_mi_get_mesh_num(adapter)) {
1410 ResumeTxBeacon(adapter);
1411
1412 /* reset TSF 1/2 after resume_tx_beacon */
1413 rtw_write8(adapter, REG_DUAL_TSF_RST_8821C, BIT_TSFTR_RST_8821C | BIT_TSFTR_CLI0_RST_8821C);
1414 }
1415 }
1416
1417 val16 = BIT_LRL_8821C(RetryLimit) | BIT_SRL_8821C(RetryLimit);
1418 rtw_write16(adapter, REG_RETRY_LIMIT_8821C, val16);
1419 #else /* !CONFIG_CONCURRENT_MODE */
1420 if (type == 0) {
1421 /* prepare to join */
1422
1423 /* enable to rx data frame.Accept all data frame */
1424 rtw_write16(adapter, REG_RXFLTMAP2_8821C, 0xFFFF);
1425
1426 if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
1427 RetryLimit = (hal->CustomerID == RT_CID_CCX) ? RL_VAL_AP : RL_VAL_STA;
1428 else /* Ad-hoc Mode */
1429 RetryLimit = RL_VAL_AP;
1430 hw_bcn_func(adapter, _TRUE);
1431
1432 rtw_iface_enable_tsf_update(adapter);
1433
1434 } else if (type == 1) {
1435 /* joinbss_event call back when join res < 0 */
1436 rtw_write16(adapter, REG_RXFLTMAP2_8821C, 0x00);
1437
1438 rtw_iface_disable_tsf_update(adapter);
1439
1440 } else if (type == 2) {
1441 /* sta add event callback */
1442 if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE))
1443 RetryLimit = RL_VAL_AP;
1444 }
1445
1446 val16 = BIT_LRL_8821C(RetryLimit) | BIT_SRL_8821C(RetryLimit);
1447 rtw_write16(adapter, REG_RETRY_LIMIT_8821C, val16);
1448 #endif /* !CONFIG_CONCURRENT_MODE */
1449 }
1450
hw_var_set_acm_ctrl(PADAPTER adapter,u8 ctrl)1451 static void hw_var_set_acm_ctrl(PADAPTER adapter, u8 ctrl)
1452 {
1453 u8 hwctrl = 0;
1454
1455 if (ctrl) {
1456 hwctrl |= BIT_ACMHWEN_8821C;
1457
1458 if (ctrl & BIT(1)) /* BE */
1459 hwctrl |= BIT_BEQ_ACM_EN_8821C;
1460 else
1461 hwctrl &= (~BIT_BEQ_ACM_EN_8821C);
1462
1463 if (ctrl & BIT(2)) /* VI */
1464 hwctrl |= BIT_VIQ_ACM_EN_8821C;
1465 else
1466 hwctrl &= (~BIT_VIQ_ACM_EN_8821C);
1467
1468 if (ctrl & BIT(3)) /* VO */
1469 hwctrl |= BIT_VOQ_ACM_EN_8821C;
1470 else
1471 hwctrl &= (~BIT_VOQ_ACM_EN_8821C);
1472 }
1473
1474 RTW_INFO("[HW_VAR_ACM_CTRL] Write 0x%02X\n", hwctrl);
1475 rtw_write8(adapter, REG_ACMHWCTRL_8821C, hwctrl);
1476 }
1477
hw_var_lps_rfon_chk(_adapter * adapter,u8 rfon_ctrl)1478 void hw_var_lps_rfon_chk(_adapter *adapter, u8 rfon_ctrl)
1479 {
1480 #ifdef CONFIG_LPS_ACK
1481 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
1482
1483 if (rfon_ctrl == rf_on) {
1484 if (rtw_sctx_wait(&pwrpriv->lps_ack_sctx, __func__)) {
1485 if (pwrpriv->lps_ack_status > 0)
1486 RTW_INFO(FUNC_ADPT_FMT" RF_ON function is not ready !!!\n", FUNC_ADPT_ARG(adapter));
1487 } else {
1488 RTW_WARN("LPS RFON sctx query timeout, operation abort!!\n");
1489 }
1490 pwrpriv->lps_ack_status = -1;
1491 }
1492 #endif
1493 }
1494
hw_var_set_sec_cfg(PADAPTER adapter,u8 cfg)1495 static void hw_var_set_sec_cfg(PADAPTER adapter, u8 cfg)
1496 {
1497 u16 reg_scr_ori;
1498 u16 reg_scr;
1499
1500 reg_scr = reg_scr_ori = rtw_read16(adapter, REG_SECCFG_8821C);
1501 reg_scr |= (BIT_CHK_KEYID_8821C | BIT_RXDEC_8821C | BIT_TXENC_8821C);
1502
1503 if (_rtw_camctl_chk_cap(adapter, SEC_CAP_CHK_BMC))
1504 reg_scr |= BIT_CHK_BMC_8821C;
1505
1506 if (_rtw_camctl_chk_flags(adapter, SEC_STATUS_STA_PK_GK_CONFLICT_DIS_BMC_SEARCH))
1507 reg_scr |= BIT_NOSKMC_8821C;
1508
1509 if (reg_scr != reg_scr_ori)
1510 rtw_write16(adapter, REG_SECCFG_8821C, reg_scr);
1511
1512 RTW_INFO("%s: [HW_VAR_SEC_CFG] 0x%x=0x%x\n", __FUNCTION__,
1513 REG_SECCFG_8821C, rtw_read32(adapter, REG_SECCFG_8821C));
1514 }
1515
hw_var_set_sec_dk_cfg(PADAPTER adapter,u8 enable)1516 static void hw_var_set_sec_dk_cfg(PADAPTER adapter, u8 enable)
1517 {
1518 struct security_priv *sec = &adapter->securitypriv;
1519 u8 reg_scr = rtw_read8(adapter, REG_SECCFG_8821C);
1520
1521 if (enable) {
1522 /* Enable default key related setting */
1523 reg_scr |= BIT_TXBCUSEDK_8821C;
1524 if (sec->dot11AuthAlgrthm != dot11AuthAlgrthm_8021X)
1525 reg_scr |= BIT_RXUHUSEDK_8821C | BIT_TXUHUSEDK_8821C;
1526 } else {
1527 /* Disable default key related setting */
1528 reg_scr &= ~(BIT_RXBCUSEDK_8821C | BIT_TXBCUSEDK_8821C | BIT_RXUHUSEDK_8821C | BIT_TXUHUSEDK_8821C);
1529 }
1530
1531 rtw_write8(adapter, REG_SECCFG_8821C, reg_scr);
1532
1533 RTW_INFO("%s: [HW_VAR_SEC_DK_CFG] 0x%x=0x%08x\n", __FUNCTION__,
1534 REG_SECCFG_8821C, rtw_read32(adapter, REG_SECCFG_8821C));
1535 }
1536
hw_var_set_bcn_valid(PADAPTER adapter)1537 static void hw_var_set_bcn_valid(PADAPTER adapter)
1538 {
1539 u8 val8 = 0;
1540
1541 /* only port 0 can TX BCN */
1542 val8 = rtw_read8(adapter, REG_FIFOPAGE_CTRL_2_8821C + 1);
1543 val8 = val8 | BIT(7);
1544 rtw_write8(adapter, REG_FIFOPAGE_CTRL_2_8821C + 1, val8);
1545 }
1546
hw_var_set_ack_preamble(PADAPTER adapter,u8 bShortPreamble)1547 static void hw_var_set_ack_preamble(PADAPTER adapter, u8 bShortPreamble)
1548 {
1549 u8 val8 = 0;
1550
1551
1552 val8 = rtw_read8(adapter, REG_WMAC_TRXPTCL_CTL_8821C + 2);
1553 val8 |= BIT(4) | BIT(5);
1554
1555 if (bShortPreamble)
1556 val8 |= BIT1;
1557 else
1558 val8 &= (~BIT1);
1559
1560 rtw_write8(adapter, REG_WMAC_TRXPTCL_CTL_8821C + 2, val8);
1561 }
1562
rtl8821c_dl_rsvd_page(PADAPTER adapter,u8 mstatus)1563 void rtl8821c_dl_rsvd_page(PADAPTER adapter, u8 mstatus)
1564 {
1565 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
1566 struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
1567 struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
1568 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
1569 BOOLEAN bcn_valid = _FALSE;
1570 u8 DLBcnCount = 0;
1571 u32 poll = 0;
1572 u8 val8, org_bcn, org_cr;
1573 u8 hw_port = rtw_hal_get_port(adapter);
1574
1575 RTW_INFO(FUNC_ADPT_FMT ":+ hw_port=%d mstatus(%x)\n",
1576 FUNC_ADPT_ARG(adapter), hw_port, mstatus);
1577
1578 if (mstatus == RT_MEDIA_CONNECT) {
1579 #if 0
1580 BOOLEAN bRecover = _FALSE;
1581 #endif
1582 u8 v8;
1583
1584 /* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 8821C -bit 10:0 */
1585 rtw_write16(adapter, port_cfg[hw_port].ps_aid, (0xF800 | pmlmeinfo->aid));
1586
1587 /* Enable SW TX beacon - Set REG_CR bit 8. DMA beacon by SW */
1588 v8 = rtw_read8(adapter, REG_CR_8821C + 1);
1589 org_cr = v8;
1590 v8 |= (BIT_ENSWBCN_8821C >> 8);
1591 rtw_write8(adapter, REG_CR_8821C + 1, v8);
1592
1593 /*
1594 * Disable Hw protection for a time which revserd for Hw sending beacon.
1595 * Fix download reserved page packet fail that access collision with the protection time.
1596 */
1597 val8 = rtw_read8(adapter, REG_BCN_CTRL_8821C);
1598 org_bcn = val8;
1599 val8 &= ~BIT_EN_BCN_FUNCTION_8821C;
1600 val8 |= BIT_DIS_TSF_UDT_8821C;
1601 rtw_write8(adapter, REG_BCN_CTRL_8821C, val8);
1602
1603 #if 0
1604 /* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */
1605 RegFwHwTxQCtrl = rtw_read8(adapter, REG_FWHW_TXQ_CTRL_8821C + 2);
1606
1607 if (RegFwHwTxQCtrl & BIT(6))
1608 bRecover = _TRUE;
1609
1610 /* To tell Hw the packet is not a real beacon frame. */
1611 RegFwHwTxQCtrl &= ~BIT(6);
1612 rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8821C + 2, RegFwHwTxQCtrl);
1613 #endif
1614
1615 /* Clear beacon valid check bit. */
1616 rtw_hal_set_hwreg(adapter, HW_VAR_BCN_VALID, NULL);
1617
1618 DLBcnCount = 0;
1619 poll = 0;
1620 do {
1621 /* download rsvd page. */
1622 rtw_hal_set_fw_rsvd_page(adapter, _FALSE);
1623 DLBcnCount++;
1624 do {
1625 rtw_yield_os();
1626
1627 /* check rsvd page download OK. */
1628 rtw_hal_get_hwreg(adapter, HW_VAR_BCN_VALID, (u8 *)(&bcn_valid));
1629 poll++;
1630 } while (!bcn_valid && (poll % 10) != 0 && !RTW_CANNOT_RUN(adapter));
1631
1632 } while (!bcn_valid && DLBcnCount <= 100 && !RTW_CANNOT_RUN(adapter));
1633
1634 if (RTW_CANNOT_RUN(adapter))
1635 ;
1636 else if (!bcn_valid)
1637 RTW_ERR(FUNC_ADPT_FMT ": DL RSVD page failed! DLBcnCount:%u, poll:%u\n",
1638 FUNC_ADPT_ARG(adapter), DLBcnCount, poll);
1639 else {
1640 struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
1641
1642 pwrctl->fw_psmode_iface_id = adapter->iface_id;
1643 rtw_hal_set_fw_rsvd_page(adapter, _TRUE);
1644 RTW_INFO(ADPT_FMT ": DL RSVD page success! DLBcnCount:%u, poll:%u\n",
1645 ADPT_ARG(adapter), DLBcnCount, poll);
1646 }
1647
1648 rtw_write8(adapter, REG_CR_8821C + 1, org_cr);
1649 rtw_write8(adapter, REG_BCN_CTRL_8821C, org_bcn);
1650 #if 0
1651 /*
1652 * To make sure that if there exists an adapter which would like to send beacon.
1653 * If exists, the origianl value of 0x422[6] will be 1, we should check this to
1654 * prevent from setting 0x422[6] to 0 after download reserved page, or it will cause
1655 * the beacon cannot be sent by HW.
1656 */
1657 if (bRecover) {
1658 RegFwHwTxQCtrl |= BIT(6);
1659 rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8821C + 2, RegFwHwTxQCtrl);
1660 }
1661 #endif
1662 #ifndef CONFIG_PCI_HCI
1663 /* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */
1664 v8 = rtw_read8(adapter, REG_CR_8821C + 1);
1665 v8 &= ~BIT(0); /* ~ENSWBCN */
1666 rtw_write8(adapter, REG_CR_8821C + 1, v8);
1667 #endif /* !CONFIG_PCI_HCI */
1668 }
1669
1670 }
1671
rtl8821c_set_h2c_fw_joinbssrpt(PADAPTER adapter,u8 mstatus)1672 static void rtl8821c_set_h2c_fw_joinbssrpt(PADAPTER adapter, u8 mstatus)
1673 {
1674 if (mstatus == RT_MEDIA_CONNECT)
1675 rtl8821c_dl_rsvd_page(adapter, RT_MEDIA_CONNECT);
1676 }
1677
1678 #ifdef CONFIG_WOWLAN
hw_var_vendor_wow_mode(_adapter * adapter,u8 en)1679 static void hw_var_vendor_wow_mode(_adapter *adapter, u8 en)
1680 {
1681 #ifdef CONFIG_CONCURRENT_MODE
1682 _adapter *iface = NULL;
1683 struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
1684 struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
1685 u8 igi = 0, mac_addr[ETH_ALEN];
1686
1687 RTW_INFO("%s: en(%d)--->\n", __func__, en);
1688 if (en) {
1689 rtw_hal_get_hwreg(adapter, HW_VAR_MAC_ADDR, mac_addr);
1690 /* RTW_INFO("suspend mac addr: "MAC_FMT"\n", MAC_ARG(mac_addr)); */
1691 rtw_halmac_set_bssid(dvobj, HW_PORT4, mac_addr);
1692 dvobj->rxfltmap2_bf_suspend = rtw_read16(adapter, REG_RXFLTMAP2);
1693 dvobj->bcn_ctrl_clint3_bf_suspend = rtw_read8(adapter, REG_BCN_CTRL_CLINT3);
1694 dvobj->rcr_bf_suspend = rtw_read32(adapter, REG_RCR);
1695 dvobj->cr_ext_bf_suspend = rtw_read32(adapter, REG_CR_EXT);
1696 /*RTW_INFO("RCR: 0x%02x, REG_CR_EXT: 0x%02x , REG_BCN_CTRL_CLINT3: 0x%02x, REG_RXFLTMAP2:0x%02x, REG_MACID_DROP0_8822B:0x%02x\n"
1697 , rtw_read32(adapter, REG_RCR), rtw_read8(adapter, REG_CR_EXT), rtw_read8(adapter, REG_BCN_CTRL_CLINT3)
1698 , rtw_read32(adapter, REG_RXFLTMAP2), rtw_read8(adapter, REG_MACID_DROP0_8822B)); */
1699 rtw_write32(adapter, REG_RCR, (rtw_read32(adapter, REG_RCR) & (~(RCR_AM))) | RCR_CBSSID_DATA | RCR_CBSSID_BCN);
1700 /* set PORT4 to ad hoc mode to filter not necessary Beacons */
1701 rtw_write8(adapter, REG_CR_EXT, (rtw_read8(adapter, REG_CR_EXT)& (~BIT5)) | BIT4);
1702 rtw_write8(adapter, REG_BCN_CTRL_CLINT3, rtw_read8(adapter, REG_BCN_CTRL_CLINT3) | BIT3);
1703 rtw_write16(adapter, REG_RXFLTMAP2, 0xffff);
1704 /* RTW_INFO("RCR: 0x%02x, REG_CR_EXT: 0x%02x , REG_BCN_CTRL_CLINT3: 0x%02x, REG_RXFLTMAP2:0x%02x, REG_MACID_DROP0_8822B:0x%02x\n"
1705 , rtw_read32(adapter, REG_RCR), rtw_read8(adapter, REG_CR_EXT), rtw_read8(adapter, REG_BCN_CTRL_CLINT3)
1706 , rtw_read32(adapter, REG_RXFLTMAP2), rtw_read8(adapter, REG_MACID_DROP0_8822B)); */
1707
1708 /* The WRC's RSSI is weak. Set the IGI to lower */
1709 odm_write_dig(adapter_to_phydm(adapter), 0x24);
1710 } else {
1711 /* restore the rcr, port ctrol setting */
1712 rtw_write32(adapter, REG_CR_EXT, dvobj->cr_ext_bf_suspend);
1713 rtw_write32(adapter, REG_RCR, dvobj->rcr_bf_suspend);
1714 rtw_write8(adapter, REG_BCN_CTRL_CLINT3, dvobj->bcn_ctrl_clint3_bf_suspend);
1715 rtw_write16(adapter, REG_RXFLTMAP2, dvobj->rxfltmap2_bf_suspend);
1716
1717 /* RTW_INFO("RCR: 0x%02x, REG_CR_EXT: 0x%02x , REG_BCN_CTRL_CLINT3: 0x%02x, REG_RXFLTMAP2:0x%02x, REG_MACID_DROP0_8822B:0x%02x\n"
1718 , rtw_read32(adapter, REG_RCR), rtw_read8(adapter, REG_CR_EXT), rtw_read8(adapter, REG_BCN_CTRL_CLINT3)
1719 , rtw_read32(adapter, REG_RXFLTMAP2), rtw_read8(adapter, REG_MACID_DROP0_8822B)); */
1720 }
1721 #endif /* CONFIG_CONCURRENT_MODE */
1722 }
1723 #endif /* CONFIG_WOWLAN */
1724
1725 /*
1726 * Parameters:
1727 * adapter
1728 * enable _TRUE: enable; _FALSE: disable
1729 */
rx_agg_switch(PADAPTER adapter,u8 enable)1730 static u8 rx_agg_switch(PADAPTER adapter, u8 enable)
1731 {
1732 /* if (rtl8821c_config_rx_agg(adapter, enable)) */
1733 return _SUCCESS;
1734
1735 return _FAIL;
1736 }
1737
rtl8821c_sethwreg(PADAPTER adapter,u8 variable,u8 * val)1738 u8 rtl8821c_sethwreg(PADAPTER adapter, u8 variable, u8 *val)
1739 {
1740 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
1741 u8 ret = _SUCCESS;
1742 u8 val8;
1743 u16 val16;
1744 u32 val32;
1745
1746
1747 switch (variable) {
1748 case HW_VAR_SET_OPMODE:
1749 hw_var_set_opmode(adapter, val);
1750 break;
1751 /*
1752 case HW_VAR_INIT_RTS_RATE:
1753 break;
1754 */
1755 case HW_VAR_BASIC_RATE:
1756 rtw_var_set_basic_rate(adapter, val);
1757 break;
1758
1759 case HW_VAR_TXPAUSE:
1760 rtw_write8(adapter, REG_TXPAUSE_8821C, *val);
1761 break;
1762
1763 case HW_VAR_BCN_FUNC:
1764 hw_var_set_bcn_func(adapter, *val);
1765 break;
1766
1767 case HW_VAR_PORT_CFG:
1768 hw_var_hw_port_cfg(adapter, *val);
1769 break;
1770
1771 case HW_VAR_MLME_DISCONNECT:
1772 hw_var_set_mlme_disconnect(adapter);
1773 break;
1774
1775 case HW_VAR_MLME_SITESURVEY:
1776 hw_var_set_mlme_sitesurvey(adapter, *val);
1777 #ifdef CONFIG_BT_COEXIST
1778 if (hal->EEPROMBluetoothCoexist)
1779 rtw_btcoex_ScanNotify(adapter, *val ? _TRUE : _FALSE);
1780 else
1781 #endif /* CONFIG_BT_COEXIST */
1782 rtw_btcoex_wifionly_scan_notify(adapter);
1783 break;
1784
1785 case HW_VAR_MLME_JOIN:
1786 hw_var_set_mlme_join(adapter, *val);
1787 break;
1788
1789 case HW_VAR_SLOT_TIME:
1790 rtw_write8(adapter, REG_SLOT_8821C, *val);
1791 break;
1792
1793 case HW_VAR_RESP_SIFS:
1794 /* RESP_SIFS for CCK */
1795 rtw_write8(adapter, REG_RESP_SIFS_CCK_8821C, 0x08);
1796 rtw_write8(adapter, REG_RESP_SIFS_CCK_8821C + 1, 0x08);
1797 /* RESP_SIFS for OFDM */
1798 rtw_write8(adapter, REG_RESP_SIFS_OFDM_8821C, 0x0a);
1799 rtw_write8(adapter, REG_RESP_SIFS_OFDM_8821C + 1, 0x0a);
1800 break;
1801
1802 case HW_VAR_ACK_PREAMBLE:
1803 hw_var_set_ack_preamble(adapter, *val);
1804 break;
1805
1806 case HW_VAR_SEC_CFG:
1807 hw_var_set_sec_cfg(adapter, *val);
1808 break;
1809
1810 case HW_VAR_SEC_DK_CFG:
1811 if (val)
1812 hw_var_set_sec_dk_cfg(adapter, _TRUE);
1813 else
1814 hw_var_set_sec_dk_cfg(adapter, _FALSE);
1815 break;
1816
1817 case HW_VAR_BCN_VALID:
1818 hw_var_set_bcn_valid(adapter);
1819 break;
1820
1821 case HW_VAR_CAM_INVALID_ALL:
1822 val32 = BIT_SECCAM_POLLING_8821C | BIT_SECCAM_CLR_8821C;
1823 rtw_write32(adapter, REG_CAMCMD_8821C, val32);
1824 break;
1825
1826 case HW_VAR_AC_PARAM_VO:
1827 rtw_write32(adapter, REG_EDCA_VO_PARAM_8821C, *(u32 *)val);
1828 break;
1829
1830 case HW_VAR_AC_PARAM_VI:
1831 rtw_write32(adapter, REG_EDCA_VI_PARAM_8821C, *(u32 *)val);
1832 break;
1833
1834 case HW_VAR_AC_PARAM_BE:
1835 hal->ac_param_be = *(u32 *)val;
1836 rtw_write32(adapter, REG_EDCA_BE_PARAM_8821C, *(u32 *)val);
1837 break;
1838
1839 case HW_VAR_AC_PARAM_BK:
1840 rtw_write32(adapter, REG_EDCA_BK_PARAM_8821C, *(u32 *)val);
1841 break;
1842
1843 case HW_VAR_ACM_CTRL:
1844 hw_var_set_acm_ctrl(adapter, *val);
1845 break;
1846 /*
1847 case HW_VAR_AMPDU_MIN_SPACE:
1848 break;
1849 */
1850 #ifdef CONFIG_80211N_HT
1851 case HW_VAR_AMPDU_FACTOR: {
1852 u32 AMPDULen = *val; /* enum AGGRE_SIZE */
1853
1854 AMPDULen = (0x2000 << AMPDULen) - 1;
1855 rtw_write32(adapter, REG_AMPDU_MAX_LENGTH_8821C, AMPDULen);
1856 }
1857 break;
1858 #endif /* CONFIG_80211N_HT */
1859 case HW_VAR_RXDMA_AGG_PG_TH:
1860 /*
1861 * TH=1 => invalidate RX DMA aggregation
1862 * TH=0 => validate RX DMA aggregation, use init value.
1863 */
1864 if (*val == 0)
1865 /* enable RXDMA aggregation */
1866 rx_agg_switch(adapter, _TRUE);
1867 else
1868 /* disable RXDMA aggregation */
1869 rx_agg_switch(adapter, _FALSE);
1870 break;
1871
1872 case HW_VAR_H2C_FW_PWRMODE:
1873 rtl8821c_set_FwPwrMode_cmd(adapter, *val);
1874 break;
1875
1876 case HW_VAR_H2C_FW_PWRMODE_RFON_CTRL:
1877 rtl8821c_set_FwPwrMode_rfon_ctrl_cmd(adapter, *val);
1878 break;
1879
1880 case HW_VAR_LPS_RFON_CHK :
1881 hw_var_lps_rfon_chk(adapter, *val);
1882 break;
1883 /*
1884 case HW_VAR_H2C_PS_TUNE_PARAM:
1885 break;
1886 */
1887 case HW_VAR_H2C_FW_JOINBSSRPT:
1888 rtl8821c_set_h2c_fw_joinbssrpt(adapter, *val);
1889 break;
1890 case HW_VAR_H2C_INACTIVE_IPS:
1891 #ifdef CONFIG_WOWLAN
1892 rtl8821c_set_fw_pwrmode_inips_cmd_wowlan(adapter, *val);
1893 #endif /* CONFIG_WOWLAN */
1894 #ifdef CONFIG_WOWLAN
1895 case HW_VAR_VENDOR_WOW_MODE:
1896 hw_var_vendor_wow_mode(adapter, *(u8 *)val);
1897 break;
1898 #endif /* CONFIG_WOWLAN */
1899 case HW_VAR_DL_RSVD_PAGE:
1900 #ifdef CONFIG_BT_COEXIST
1901 if (check_fwstate(&adapter->mlmepriv, WIFI_AP_STATE) == _TRUE)
1902 rtl8821c_download_BTCoex_AP_mode_rsvd_page(adapter);
1903 #endif
1904 break;
1905 #ifdef CONFIG_P2P
1906 case HW_VAR_H2C_FW_P2P_PS_OFFLOAD:
1907 #ifdef CONFIG_FW_MULTI_PORT_SUPPORT
1908 if (*val == P2P_PS_ENABLE)
1909 rtw_set_default_port_id(adapter);
1910 #endif
1911 rtw_set_p2p_ps_offload_cmd(adapter, *val);
1912 break;
1913 #endif
1914
1915 /*
1916 case HW_VAR_TRIGGER_GPIO_0:
1917 case HW_VAR_BT_SET_COEXIST:
1918 case HW_VAR_BT_ISSUE_DELBA:
1919 break;
1920 */
1921
1922 /*
1923 case HW_VAR_SWITCH_EPHY_WoWLAN:
1924 case HW_VAR_EFUSE_USAGE:
1925 case HW_VAR_EFUSE_BYTES:
1926 case HW_VAR_EFUSE_BT_USAGE:
1927 case HW_VAR_EFUSE_BT_BYTES:
1928 break;
1929 */
1930 case HW_VAR_FIFO_CLEARN_UP: {
1931 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
1932 u8 trycnt = 100;
1933 u32 reg_hw_ssn;
1934
1935 /* pause tx */
1936 rtw_write8(adapter, REG_TXPAUSE_8821C, 0xff);
1937
1938 /* keep hw sn */
1939 if (adapter->xmitpriv.hw_ssn_seq_no == 1)
1940 reg_hw_ssn = REG_HW_SEQ1_8821C;
1941 else if (adapter->xmitpriv.hw_ssn_seq_no == 2)
1942 reg_hw_ssn = REG_HW_SEQ2_8821C;
1943 else if (adapter->xmitpriv.hw_ssn_seq_no == 3)
1944 reg_hw_ssn = REG_HW_SEQ3_8821C;
1945 else
1946 reg_hw_ssn = REG_HW_SEQ0_8821C;
1947
1948 adapter->xmitpriv.nqos_ssn = rtw_read16(adapter, reg_hw_ssn);
1949
1950 if (pwrpriv->bkeepfwalive != _TRUE) {
1951 /* RX DMA stop */
1952 val32 = rtw_read32(adapter, REG_RXPKT_NUM_8821C);
1953 val32 |= BIT_RW_RELEASE_EN;
1954 rtw_write32(adapter, REG_RXPKT_NUM_8821C, val32);
1955 do {
1956 val32 = rtw_read32(adapter, REG_RXPKT_NUM_8821C);
1957 val32 &= BIT_RXDMA_IDLE_8821C;
1958 if (val32)
1959 break;
1960
1961 RTW_INFO("[HW_VAR_FIFO_CLEARN_UP] val=%x times:%d\n", val32, trycnt);
1962 rtw_yield_os();
1963 } while (--trycnt);
1964 if (trycnt == 0)
1965 RTW_INFO("[HW_VAR_FIFO_CLEARN_UP] Stop RX DMA failed!\n");
1966 #if 0
1967 /* RQPN Load 0 */
1968 rtw_write16(adapter, REG_RQPN_NPQ, 0);
1969 rtw_write32(adapter, REG_RQPN, 0x80000000);
1970 rtw_mdelay_os(2);
1971 #endif
1972 }
1973 }
1974 break;
1975
1976 case HW_VAR_RESTORE_HW_SEQ: {
1977 /* restore Sequence No. */
1978 u32 reg_hw_ssn;
1979
1980 if (adapter->xmitpriv.hw_ssn_seq_no == 1)
1981 reg_hw_ssn = REG_HW_SEQ1_8821C;
1982 else if (adapter->xmitpriv.hw_ssn_seq_no == 2)
1983 reg_hw_ssn = REG_HW_SEQ2_8821C;
1984 else if (adapter->xmitpriv.hw_ssn_seq_no == 3)
1985 reg_hw_ssn = REG_HW_SEQ3_8821C;
1986 else
1987 reg_hw_ssn = REG_HW_SEQ0_8821C;
1988
1989 rtw_write8(adapter, reg_hw_ssn, adapter->xmitpriv.nqos_ssn);
1990 }
1991 break;
1992
1993 case HW_VAR_CHECK_TXBUF: {
1994 u16 rtylmtorg;
1995 u8 RetryLimit = 0x01;
1996 systime start;
1997 u32 passtime;
1998 u32 timelmt = 2000; /* ms */
1999 u32 waittime = 10; /* ms */
2000 u32 high, low, normal, extra, publc;
2001 u16 rsvd, available;
2002 u8 empty;
2003
2004
2005 rtylmtorg = rtw_read16(adapter, REG_RETRY_LIMIT_8821C);
2006
2007 val16 = BIT_LRL_8821C(RetryLimit) | BIT_SRL_8821C(RetryLimit);
2008 rtw_write16(adapter, REG_RETRY_LIMIT_8821C, val16);
2009
2010 /* Check TX FIFO empty or not */
2011 empty = _FALSE;
2012 high = 0;
2013 low = 0;
2014 normal = 0;
2015 extra = 0;
2016 publc = 0;
2017 start = rtw_get_current_time();
2018 while ((rtw_get_passing_time_ms(start) < timelmt)
2019 && !RTW_CANNOT_RUN(adapter)) {
2020 high = rtw_read32(adapter, REG_FIFOPAGE_INFO_1_8821C);
2021 low = rtw_read32(adapter, REG_FIFOPAGE_INFO_2_8821C);
2022 normal = rtw_read32(adapter, REG_FIFOPAGE_INFO_3_8821C);
2023 extra = rtw_read32(adapter, REG_FIFOPAGE_INFO_4_8821C);
2024 publc = rtw_read32(adapter, REG_FIFOPAGE_INFO_5_8821C);
2025
2026 rsvd = BIT_GET_HPQ_V1_8821C(high);
2027 available = BIT_GET_HPQ_AVAL_PG_V1_8821C(high);
2028 if (rsvd != available) {
2029 rtw_msleep_os(waittime);
2030 continue;
2031 }
2032
2033 rsvd = BIT_GET_LPQ_V1_8821C(low);
2034 available = BIT_GET_LPQ_AVAL_PG_V1_8821C(low);
2035 if (rsvd != available) {
2036 rtw_msleep_os(waittime);
2037 continue;
2038 }
2039
2040 rsvd = BIT_GET_NPQ_V1_8821C(normal);
2041 available = BIT_GET_NPQ_AVAL_PG_V1_8821C(normal);
2042 if (rsvd != available) {
2043 rtw_msleep_os(waittime);
2044 continue;
2045 }
2046
2047 rsvd = BIT_GET_EXQ_V1_8821C(extra);
2048 available = BIT_GET_EXQ_AVAL_PG_V1_8821C(extra);
2049 if (rsvd != available) {
2050 rtw_msleep_os(waittime);
2051 continue;
2052 }
2053
2054 rsvd = BIT_GET_PUBQ_V1_8821C(publc);
2055 available = BIT_GET_PUBQ_AVAL_PG_V1_8821C(publc);
2056 if (rsvd != available) {
2057 rtw_msleep_os(waittime);
2058 continue;
2059 }
2060
2061 empty = _TRUE;
2062 break;
2063 }
2064
2065 passtime = rtw_get_passing_time_ms(start);
2066 if (_TRUE == empty)
2067 RTW_INFO("[HW_VAR_CHECK_TXBUF] Empty in %d ms\n", passtime);
2068 else if (RTW_CANNOT_RUN(adapter))
2069 RTW_INFO("[HW_VAR_CHECK_TXBUF] bDriverStopped or bSurpriseRemoved\n");
2070 else {
2071 RTW_INFO("[HW_VAR_CHECK_TXBUF] NOT empty in %d ms\n", passtime);
2072 RTW_INFO("[HW_VAR_CHECK_TXBUF] 0x230=0x%08x 0x234=0x%08x 0x238=0x%08x 0x23c=0x%08x 0x240=0x%08x\n",
2073 high, low, normal, extra, publc);
2074
2075 }
2076
2077 rtw_write16(adapter, REG_RETRY_LIMIT_8821C, rtylmtorg);
2078 }
2079 break;
2080 /*
2081 case HW_VAR_PCIE_STOP_TX_DMA:
2082 break;
2083 */
2084
2085 /*
2086 case HW_VAR_SYS_CLKR:
2087 break;
2088 */
2089 #ifdef CONFIG_GPIO_WAKEUP
2090 case HW_SET_GPIO_WL_CTRL: {
2091 struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
2092 u8 enable = *val;
2093 u8 value = 0;
2094 u8 addr = REG_PAD_CTRL1_8821C + 3;
2095
2096 if (pwrpriv->wowlan_gpio_index == 6) {
2097 value = rtw_read8(adapter, addr);
2098
2099 if (enable == _TRUE && (value & BIT(1)))
2100 /* set 0x64[25] = 0 to control GPIO 6 */
2101 rtw_write8(adapter, addr, value & (~BIT(1)));
2102 else if (enable == _FALSE)
2103 rtw_write8(adapter, addr, value | BIT(1));
2104
2105 RTW_INFO("[HW_SET_GPIO_WL_CTRL] 0x%02X=0x%02X\n",
2106 addr, rtw_read8(adapter, addr));
2107 }
2108 }
2109 break;
2110 #endif
2111 case HW_VAR_NAV_UPPER: {
2112 #define HAL_NAV_UPPER_UNIT 128 /* micro-second */
2113 u32 usNavUpper = *(u32 *)val;
2114
2115 if (usNavUpper > HAL_NAV_UPPER_UNIT * 0xFF) {
2116 RTW_INFO(FUNC_ADPT_FMT ": [HW_VAR_NAV_UPPER] value(0x%08X us) is larger than (%d * 0xFF)!!!\n",
2117 FUNC_ADPT_ARG(adapter), usNavUpper, HAL_NAV_UPPER_UNIT);
2118 break;
2119 }
2120
2121 usNavUpper = (usNavUpper + HAL_NAV_UPPER_UNIT - 1) / HAL_NAV_UPPER_UNIT;
2122 rtw_write8(adapter, REG_NAV_CTRL_8821C + 2, (u8)usNavUpper);
2123 }
2124 break;
2125
2126 /*
2127 case HW_VAR_RPT_TIMER_SETTING:
2128 case HW_VAR_TX_RPT_MAX_MACID:
2129 case HW_VAR_CHK_HI_QUEUE_EMPTY:
2130 break;
2131 */
2132
2133 /*
2134 case HW_VAR_AMPDU_MAX_TIME:
2135 case HW_VAR_USB_MODE:
2136 break;
2137 */
2138 #ifdef CONFIG_AP_PORT_SWAP
2139 case HW_VAR_PORT_SWITCH:
2140 {
2141 u8 mode = *((u8 *)val);
2142
2143 rtl8821c_ap_port_switch(adapter, mode);
2144 }
2145 break;
2146 #endif
2147
2148 /*
2149 case HW_VAR_SOUNDING_RATE:
2150 case HW_VAR_SOUNDING_STATUS:
2151 case HW_VAR_SOUNDING_FW_NDPA:
2152 case HW_VAR_SOUNDING_CLK:
2153 break;
2154 */
2155 #ifdef CONFIG_BEAMFORMING
2156 case HW_VAR_SOUNDING_ENTER:
2157 rtl8821c_phy_bf_enter(adapter, (struct sta_info*)val);
2158 break;
2159
2160 case HW_VAR_SOUNDING_LEAVE:
2161 rtl8821c_phy_bf_leave(adapter, val);
2162 break;
2163
2164 case HW_VAR_SOUNDING_SET_GID_TABLE:
2165 rtl8821c_phy_bf_set_gid_table(adapter, (struct beamformer_entry*)val);
2166 break;
2167 #endif
2168 case HW_VAR_FREECNT:
2169
2170 val8 = *((u8*)val);
2171
2172 if (val8 == 0) {
2173 /* disable free run counter set 0x577[3]=0 */
2174 rtw_write8(adapter, REG_MISC_CTRL,
2175 rtw_read8(adapter, REG_MISC_CTRL)&(~BIT_EN_FREECNT));
2176
2177 /* reset FREE_RUN_COUNTER set 0x553[5]=1 */
2178 val8 = rtw_read8(adapter, REG_DUAL_TSF_RST);
2179 val8 |= BIT_FREECNT_RST;
2180 rtw_write8(adapter, REG_DUAL_TSF_RST, val8);
2181
2182 } else if (val8 == 1){
2183
2184 /* enable free run counter */
2185
2186 /* disable first set 0x577[3]=0 */
2187 rtw_write8(adapter, REG_MISC_CTRL,
2188 rtw_read8(adapter, REG_MISC_CTRL)&(~BIT_EN_FREECNT));
2189
2190 /* reset FREE_RUN_COUNTER set 0x553[5]=1 */
2191 val8 = rtw_read8(adapter, REG_DUAL_TSF_RST);
2192 val8 |= BIT_FREECNT_RST;
2193 rtw_write8(adapter, REG_DUAL_TSF_RST, val8);
2194
2195 /* enable free run counter 0x577[3]=1 */
2196 rtw_write8(adapter, REG_MISC_CTRL,
2197 rtw_read8(adapter, REG_MISC_CTRL)|BIT_EN_FREECNT);
2198 }
2199 break;
2200
2201 default:
2202 ret = SetHwReg(adapter, variable, val);
2203 break;
2204 }
2205
2206 return ret;
2207 }
2208
2209 #ifdef CONFIG_PROC_DEBUG
2210 struct qinfo {
2211 u32 head:11;
2212 u32 tail:11;
2213 u32 empty:1;
2214 u32 ac:2;
2215 u32 macid:7;
2216 };
2217
2218 struct bcn_qinfo {
2219 u16 head:12;
2220 u16 rsvd:4;
2221 };
2222
dump_qinfo(void * sel,struct qinfo * info,u32 pkt_num,const char * tag)2223 static void dump_qinfo(void *sel, struct qinfo *info, u32 pkt_num, const char *tag)
2224 {
2225 RTW_PRINT_SEL(sel, "%shead:0x%02x, tail:0x%02x, pkt_num:%u, macid:%u, ac:%u\n",
2226 tag ? tag : "", info->head, info->tail, pkt_num, info->macid, info->ac);
2227 }
2228
dump_bcn_qinfo(void * sel,struct bcn_qinfo * info,u32 pkt_num,const char * tag)2229 static void dump_bcn_qinfo(void *sel, struct bcn_qinfo *info, u32 pkt_num, const char *tag)
2230 {
2231 RTW_PRINT_SEL(sel, "%shead:0x%02x, pkt_num:%u\n",
2232 tag ? tag : "", info->head, pkt_num);
2233 }
2234
dump_mac_qinfo(void * sel,_adapter * adapter)2235 static void dump_mac_qinfo(void *sel, _adapter *adapter)
2236 {
2237 u32 q0_info;
2238 u32 q1_info;
2239 u32 q2_info;
2240 u32 q3_info;
2241 u32 q4_info;
2242 u32 q5_info;
2243 u32 q6_info;
2244 u32 q7_info;
2245 u32 mg_q_info;
2246 u32 hi_q_info;
2247 u16 bcn_q_info;
2248 u32 q0_q1_info;
2249 u32 q2_q3_info;
2250 u32 q4_q5_info;
2251 u32 q6_q7_info;
2252 u32 mg_hi_q_info;
2253 u32 cmd_bcn_q_info;
2254
2255
2256 q0_info = rtw_read32(adapter, REG_Q0_INFO_8821C);
2257 q1_info = rtw_read32(adapter, REG_Q1_INFO_8821C);
2258 q2_info = rtw_read32(adapter, REG_Q2_INFO_8821C);
2259 q3_info = rtw_read32(adapter, REG_Q3_INFO_8821C);
2260 q4_info = rtw_read32(adapter, REG_Q4_INFO_8821C);
2261 q5_info = rtw_read32(adapter, REG_Q5_INFO_8821C);
2262 q6_info = rtw_read32(adapter, REG_Q6_INFO_8821C);
2263 q7_info = rtw_read32(adapter, REG_Q7_INFO_8821C);
2264 mg_q_info = rtw_read32(adapter, REG_MGQ_INFO_8821C);
2265 hi_q_info = rtw_read32(adapter, REG_HIQ_INFO_8821C);
2266 bcn_q_info = rtw_read16(adapter, REG_BCNQ_INFO_8821C);
2267
2268 q0_q1_info = rtw_read32(adapter, REG_Q0_Q1_INFO_8821C);
2269 q2_q3_info = rtw_read32(adapter, REG_Q2_Q3_INFO_8821C);
2270 q4_q5_info = rtw_read32(adapter, REG_Q4_Q5_INFO_8821C);
2271 q6_q7_info = rtw_read32(adapter, REG_Q6_Q7_INFO_8821C);
2272 mg_hi_q_info = rtw_read32(adapter, REG_MGQ_HIQ_INFO_8821C);
2273 cmd_bcn_q_info = rtw_read32(adapter, REG_CMDQ_BCNQ_INFO_8821C);
2274
2275 dump_qinfo(sel, (struct qinfo *)&q0_info, q0_q1_info&0xFFF, "Q0 ");
2276 dump_qinfo(sel, (struct qinfo *)&q1_info, (q0_q1_info>>15)&0xFFF, "Q1 ");
2277 dump_qinfo(sel, (struct qinfo *)&q2_info, q2_q3_info&0xFFF, "Q2 ");
2278 dump_qinfo(sel, (struct qinfo *)&q3_info, (q2_q3_info>>15)&0xFFF, "Q3 ");
2279 dump_qinfo(sel, (struct qinfo *)&q4_info, q4_q5_info&0xFFF, "Q4 ");
2280 dump_qinfo(sel, (struct qinfo *)&q5_info, (q4_q5_info>>15)&0xFFF, "Q5 ");
2281 dump_qinfo(sel, (struct qinfo *)&q6_info, q6_q7_info&0xFFF, "Q6 ");
2282 dump_qinfo(sel, (struct qinfo *)&q7_info, (q6_q7_info>>15)&0xFFF, "Q7 ");
2283 dump_qinfo(sel, (struct qinfo *)&mg_q_info, mg_hi_q_info&0xFFF, "MG ");
2284 dump_qinfo(sel, (struct qinfo *)&hi_q_info, (mg_hi_q_info>>15)&0xFFF, "HI ");
2285 dump_bcn_qinfo(sel, (struct bcn_qinfo *)&bcn_q_info, cmd_bcn_q_info&0xFFF, "BCN ");
2286
2287 }
2288
dump_mac_txfifo(void * sel,_adapter * adapter)2289 static void dump_mac_txfifo(void *sel, _adapter *adapter)
2290 {
2291 u32 hpq, lpq, npq, epq, pubq;
2292
2293 hpq = rtw_read32(adapter, REG_FIFOPAGE_INFO_1_8821C);
2294 lpq = rtw_read32(adapter, REG_FIFOPAGE_INFO_2_8821C);
2295 npq = rtw_read32(adapter, REG_FIFOPAGE_INFO_3_8821C);
2296 epq = rtw_read32(adapter, REG_FIFOPAGE_INFO_4_8821C);
2297 pubq = rtw_read32(adapter, REG_FIFOPAGE_INFO_5_8821C);
2298
2299 hpq = (hpq & 0xFFF0000)>>16;
2300 lpq = (lpq & 0xFFF0000)>>16;
2301 npq = (npq & 0xFFF0000)>>16;
2302 epq = (epq & 0xFFF0000)>>16;
2303 pubq = (pubq & 0xFFF0000)>>16;
2304
2305 RTW_PRINT_SEL(sel, "Tx: available page num: ");
2306 if ((hpq == 0xAEA) && (hpq == lpq) && (hpq == pubq))
2307 RTW_PRINT_SEL(sel, "N/A (reg val = 0xea)\n");
2308 else
2309 RTW_PRINT_SEL(sel, "HPQ: %d, LPQ: %d, NPQ: %d, EPQ: %d, PUBQ: %d\n"
2310 , hpq, lpq, npq, epq, pubq);
2311 }
2312 #endif
2313
hw_var_get_bcn_valid(PADAPTER adapter)2314 static u8 hw_var_get_bcn_valid(PADAPTER adapter)
2315 {
2316 u8 val8 = 0;
2317 u8 ret = _FALSE;
2318
2319 /* only port 0 can TX BCN */
2320 val8 = rtw_read8(adapter, REG_FIFOPAGE_CTRL_2_8821C + 1);
2321 ret = (BIT(7) & val8) ? _TRUE : _FALSE;
2322
2323 return ret;
2324 }
2325
rtl8821c_read_wmmedca_reg(PADAPTER adapter,u16 * vo_params,u16 * vi_params,u16 * be_params,u16 * bk_params)2326 void rtl8821c_read_wmmedca_reg(PADAPTER adapter, u16 *vo_params, u16 *vi_params, u16 *be_params, u16 *bk_params)
2327 {
2328 u8 vo_reg_params[4];
2329 u8 vi_reg_params[4];
2330 u8 be_reg_params[4];
2331 u8 bk_reg_params[4];
2332
2333 rtl8821c_gethwreg(adapter, HW_VAR_AC_PARAM_VO, vo_reg_params);
2334 rtl8821c_gethwreg(adapter, HW_VAR_AC_PARAM_VI, vi_reg_params);
2335 rtl8821c_gethwreg(adapter, HW_VAR_AC_PARAM_BE, be_reg_params);
2336 rtl8821c_gethwreg(adapter, HW_VAR_AC_PARAM_BK, bk_reg_params);
2337
2338 vo_params[0] = vo_reg_params[0];
2339 vo_params[1] = vo_reg_params[1] & 0x0F;
2340 vo_params[2] = (vo_reg_params[1] & 0xF0) >> 4;
2341 vo_params[3] = ((vo_reg_params[3] << 8) | (vo_reg_params[2])) * 32;
2342
2343 vi_params[0] = vi_reg_params[0];
2344 vi_params[1] = vi_reg_params[1] & 0x0F;
2345 vi_params[2] = (vi_reg_params[1] & 0xF0) >> 4;
2346 vi_params[3] = ((vi_reg_params[3] << 8) | (vi_reg_params[2])) * 32;
2347
2348 be_params[0] = be_reg_params[0];
2349 be_params[1] = be_reg_params[1] & 0x0F;
2350 be_params[2] = (be_reg_params[1] & 0xF0) >> 4;
2351 be_params[3] = ((be_reg_params[3] << 8) | (be_reg_params[2])) * 32;
2352
2353 bk_params[0] = bk_reg_params[0];
2354 bk_params[1] = bk_reg_params[1] & 0x0F;
2355 bk_params[2] = (bk_reg_params[1] & 0xF0) >> 4;
2356 bk_params[3] = ((bk_reg_params[3] << 8) | (bk_reg_params[2])) * 32;
2357
2358 vo_params[1] = (1 << vo_params[1]) - 1;
2359 vo_params[2] = (1 << vo_params[2]) - 1;
2360 vi_params[1] = (1 << vi_params[1]) - 1;
2361 vi_params[2] = (1 << vi_params[2]) - 1;
2362 be_params[1] = (1 << be_params[1]) - 1;
2363 be_params[2] = (1 << be_params[2]) - 1;
2364 bk_params[1] = (1 << bk_params[1]) - 1;
2365 bk_params[2] = (1 << bk_params[2]) - 1;
2366 }
2367
rtl8821c_gethwreg(PADAPTER adapter,u8 variable,u8 * val)2368 void rtl8821c_gethwreg(PADAPTER adapter, u8 variable, u8 *val)
2369 {
2370 PHAL_DATA_TYPE hal;
2371 u8 val8;
2372 u16 val16;
2373 u32 val32;
2374
2375
2376 hal = GET_HAL_DATA(adapter);
2377
2378 switch (variable) {
2379 /*
2380 case HW_VAR_INIT_RTS_RATE:
2381 case HW_VAR_BASIC_RATE:
2382 break;
2383 */
2384 case HW_VAR_TXPAUSE:
2385 *val = rtw_read8(adapter, REG_TXPAUSE_8821C);
2386 break;
2387 /*
2388 case HW_VAR_BCN_FUNC:
2389 case HW_VAR_MLME_DISCONNECT:
2390 case HW_VAR_MLME_SITESURVEY:
2391 case HW_VAR_MLME_JOIN:
2392 case HW_VAR_BEACON_INTERVAL:
2393 case HW_VAR_SLOT_TIME:
2394 case HW_VAR_RESP_SIFS:
2395 case HW_VAR_ACK_PREAMBLE:
2396 case HW_VAR_SEC_CFG:
2397 case HW_VAR_SEC_DK_CFG:
2398 break;
2399 */
2400 case HW_VAR_BCN_VALID:
2401 *val = hw_var_get_bcn_valid(adapter);
2402 break;
2403 /*
2404 case HW_VAR_CAM_INVALID_ALL:
2405 */
2406 case HW_VAR_AC_PARAM_VO:
2407 val32 = rtw_read32(adapter, REG_EDCA_VO_PARAM);
2408 val[0] = val32 & 0xFF;
2409 val[1] = (val32 >> 8) & 0xFF;
2410 val[2] = (val32 >> 16) & 0xFF;
2411 val[3] = (val32 >> 24) & 0x07;
2412 break;
2413
2414 case HW_VAR_AC_PARAM_VI:
2415 val32 = rtw_read32(adapter, REG_EDCA_VI_PARAM);
2416 val[0] = val32 & 0xFF;
2417 val[1] = (val32 >> 8) & 0xFF;
2418 val[2] = (val32 >> 16) & 0xFF;
2419 val[3] = (val32 >> 24) & 0x07;
2420 break;
2421
2422 case HW_VAR_AC_PARAM_BE:
2423 val32 = rtw_read32(adapter, REG_EDCA_BE_PARAM);
2424 val[0] = val32 & 0xFF;
2425 val[1] = (val32 >> 8) & 0xFF;
2426 val[2] = (val32 >> 16) & 0xFF;
2427 val[3] = (val32 >> 24) & 0x07;
2428 break;
2429
2430 case HW_VAR_AC_PARAM_BK:
2431 val32 = rtw_read32(adapter, REG_EDCA_BK_PARAM);
2432 val[0] = val32 & 0xFF;
2433 val[1] = (val32 >> 8) & 0xFF;
2434 val[2] = (val32 >> 16) & 0xFF;
2435 val[3] = (val32 >> 24) & 0x07;
2436 break;
2437 /*
2438 case HW_VAR_ACM_CTRL:
2439 case HW_VAR_AMPDU_MIN_SPACE:
2440 case HW_VAR_AMPDU_FACTOR:
2441 case HW_VAR_RXDMA_AGG_PG_TH:
2442 case HW_VAR_H2C_FW_PWRMODE:
2443 case HW_VAR_H2C_PS_TUNE_PARAM:
2444 case HW_VAR_H2C_FW_JOINBSSRPT:
2445 break;
2446 */
2447 /*
2448 case HW_VAR_H2C_FW_P2P_PS_OFFLOAD:
2449 case HW_VAR_TRIGGER_GPIO_0:
2450 case HW_VAR_BT_SET_COEXIST:
2451 case HW_VAR_BT_ISSUE_DELBA:
2452 break;
2453 */
2454
2455 /*
2456 case HW_VAR_ANTENNA_DIVERSITY_SELECT:
2457 case HW_VAR_SWITCH_EPHY_WoWLAN:
2458 case HW_VAR_EFUSE_USAGE:
2459 case HW_VAR_EFUSE_BYTES:
2460 case HW_VAR_EFUSE_BT_USAGE:
2461 case HW_VAR_EFUSE_BT_BYTES:
2462 case HW_VAR_FIFO_CLEARN_UP:
2463 case HW_VAR_RESTORE_HW_SEQ:
2464 case HW_VAR_CHECK_TXBUF:
2465 case HW_VAR_PCIE_STOP_TX_DMA:
2466 break;
2467 */
2468
2469
2470
2471 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
2472 case HW_VAR_SYS_CLKR:
2473 *val = rtw_read8(adapter, REG_SYS_CLK_CTRL_8821C);
2474 break;
2475 #endif
2476 /*
2477 case HW_VAR_NAV_UPPER:
2478 case HW_VAR_RPT_TIMER_SETTING:
2479 case HW_VAR_TX_RPT_MAX_MACID:
2480 break;
2481 */
2482 case HW_VAR_CHK_HI_QUEUE_EMPTY:
2483 val16 = rtw_read16(adapter, REG_TXPKT_EMPTY_8821C);
2484 *val = (val16 & BIT_HQQ_EMPTY_8821C) ? _TRUE : _FALSE;
2485 break;
2486 case HW_VAR_CHK_MGQ_CPU_EMPTY:
2487 val16 = rtw_read16(adapter, REG_TXPKT_EMPTY_8821C);
2488 *val = (val16 & BIT_MGQ_CPU_EMPTY_8821C) ? _TRUE : _FALSE;
2489 break;
2490 /*
2491 case HW_VAR_AMPDU_MAX_TIME:
2492 case HW_VAR_USB_MODE:
2493 case HW_VAR_DO_IQK:
2494 case HW_VAR_SOUNDING_ENTER:
2495 case HW_VAR_SOUNDING_LEAVE:
2496 case HW_VAR_SOUNDING_RATE:
2497 case HW_VAR_SOUNDING_STATUS:
2498 case HW_VAR_SOUNDING_FW_NDPA:
2499 case HW_VAR_SOUNDING_CLK:
2500 break;
2501 */
2502 case HW_VAR_FW_PS_STATE:
2503 /* driver read REG_SYS_CFG5 - BIT_LPS_STATUS REG_1070[3] to get hw ps state */
2504 *((u16 *)val) = rtw_read8(adapter, REG_SYS_CFG5);
2505 break;
2506 #ifdef CONFIG_PROC_DEBUG
2507 case HW_VAR_DUMP_MAC_QUEUE_INFO:
2508 dump_mac_qinfo(val, adapter);
2509 break;
2510
2511 case HW_VAR_DUMP_MAC_TXFIFO:
2512 dump_mac_txfifo(val, adapter);
2513 break;
2514 #endif
2515 /*
2516 case HW_VAR_ASIX_IOT:
2517 case HW_VAR_H2C_BT_MP_OPER:
2518 break;
2519 */
2520
2521 case HW_VAR_BCN_CTRL_ADDR:
2522 *((u32 *)val) = hw_bcn_ctrl_addr(adapter, adapter->hw_port);
2523 break;
2524
2525 case HW_VAR_FREECNT:
2526 *val = rtw_read8(adapter, REG_MISC_CTRL)&BIT_EN_FREECNT;
2527 break;
2528
2529 default:
2530 GetHwReg(adapter, variable, val);
2531 break;
2532 }
2533 }
2534
2535 /*
2536 * Description:
2537 * Change default setting of specified variable.
2538 */
rtl8821c_sethaldefvar(PADAPTER adapter,HAL_DEF_VARIABLE variable,void * pval)2539 u8 rtl8821c_sethaldefvar(PADAPTER adapter, HAL_DEF_VARIABLE variable, void *pval)
2540 {
2541 PHAL_DATA_TYPE hal;
2542 u8 bResult, val8;
2543
2544
2545 hal = GET_HAL_DATA(adapter);
2546 bResult = _SUCCESS;
2547
2548 switch (variable) {
2549 /*
2550 case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
2551 case HAL_DEF_IS_SUPPORT_ANT_DIV:
2552 case HAL_DEF_DRVINFO_SZ:
2553 case HAL_DEF_MAX_RECVBUF_SZ:
2554 case HAL_DEF_RX_PACKET_OFFSET:
2555 case HAL_DEF_RX_DMA_SZ_WOW:
2556 case HAL_DEF_RX_DMA_SZ:
2557 case HAL_DEF_RX_PAGE_SIZE:
2558 case HAL_DEF_DBG_DUMP_RXPKT:
2559 case HAL_DEF_RA_DECISION_RATE:
2560 case HAL_DEF_RA_SGI:
2561 case HAL_DEF_PT_PWR_STATUS:
2562 case HW_VAR_MAX_RX_AMPDU_FACTOR:
2563 case HAL_DEF_DBG_DUMP_TXPKT:
2564 case HAL_DEF_TX_PAGE_BOUNDARY:
2565 case HAL_DEF_TX_PAGE_BOUNDARY_WOWLAN:
2566 case HAL_DEF_ANT_DETECT:
2567 case HAL_DEF_PCI_SUUPORT_L1_BACKDOOR:
2568 case HAL_DEF_PCI_AMD_L1_SUPPORT:
2569 case HAL_DEF_PCI_ASPM_OSC:
2570 case HAL_DEF_EFUSE_USAGE:
2571 case HAL_DEF_EFUSE_BYTES:
2572 case HW_VAR_BEST_AMPDU_DENSITY:
2573 break;
2574 */
2575
2576 default:
2577 bResult = SetHalDefVar(adapter, variable, pval);
2578 break;
2579 }
2580
2581 return bResult;
2582 }
2583
rtl8821c_ra_info_dump(_adapter * padapter,void * sel)2584 void rtl8821c_ra_info_dump(_adapter *padapter, void *sel)
2585 {
2586 u8 mac_id;
2587 struct sta_info *psta;
2588 u32 rate_mask1, rate_mask2;
2589 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
2590 struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj);
2591
2592 for (mac_id = 0; mac_id < macid_ctl->num; mac_id++) {
2593 if (rtw_macid_is_used(macid_ctl, mac_id) && !rtw_macid_is_bmc(macid_ctl, mac_id)) {
2594 psta = macid_ctl->sta[mac_id];
2595 if (!psta)
2596 continue;
2597
2598 dump_sta_info(sel, psta);
2599 rate_mask1 = macid_ctl->rate_bmp0[mac_id];
2600 rate_mask2 = macid_ctl->rate_bmp1[mac_id];
2601 _RTW_PRINT_SEL(sel, "rate_mask2:0x%08x, rate_mask1:0x%08x\n", rate_mask2, rate_mask1);
2602 }
2603 }
2604 }
2605
2606 /*
2607 * Description:
2608 * Query setting of specified variable.
2609 */
rtl8821c_gethaldefvar(PADAPTER adapter,HAL_DEF_VARIABLE variable,void * pval)2610 u8 rtl8821c_gethaldefvar(PADAPTER adapter, HAL_DEF_VARIABLE variable, void *pval)
2611 {
2612 PHAL_DATA_TYPE hal;
2613 u8 bResult;
2614 u8 val8 = 0;
2615 u32 val32 = 0;
2616
2617
2618 hal = GET_HAL_DATA(adapter);
2619 bResult = _SUCCESS;
2620
2621 switch (variable) {
2622 /*
2623 case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
2624 break;
2625 */
2626 case HAL_DEF_IS_SUPPORT_ANT_DIV:
2627 #ifdef CONFIG_ANTENNA_DIVERSITY
2628 *(u8 *)pval = _TRUE;
2629 #else
2630 *(u8 *)pval = _FALSE;
2631 #endif
2632 break;
2633 case HAL_DEF_MAX_RECVBUF_SZ:
2634 *((u32 *)pval) = MAX_RECVBUF_SZ;
2635 break;
2636 case HAL_DEF_RX_PACKET_OFFSET:
2637 rtw_halmac_get_rx_desc_size(adapter_to_dvobj(adapter), &val32);
2638 rtw_halmac_get_rx_drv_info_sz(adapter_to_dvobj(adapter), &val8);
2639 *((u32 *)pval) = val32 + val8;
2640 break;
2641 /*
2642 case HAL_DEF_DRVINFO_SZ:
2643 rtw_halmac_get_rx_drv_info_sz(adapter_to_dvobj(adapter), &val8);
2644 *((u32 *)pval) = val8;
2645 break;
2646 case HAL_DEF_RX_DMA_SZ_WOW:
2647 case HAL_DEF_RX_DMA_SZ:
2648 case HAL_DEF_RX_PAGE_SIZE:
2649 case HAL_DEF_DBG_DUMP_RXPKT:
2650 case HAL_DEF_RA_DECISION_RATE:
2651 case HAL_DEF_RA_SGI:
2652 break;
2653 */
2654 /* only for 8188E */
2655 case HAL_DEF_PT_PWR_STATUS:
2656 break;
2657
2658 case HAL_DEF_TX_LDPC:
2659 *(u8 *)pval = ((hal->phy_spec.ldpc_cap >> 8) & 0xFF) ? _TRUE : _FALSE;
2660 break;
2661
2662 case HAL_DEF_RX_LDPC:
2663 *(u8 *)pval = (hal->phy_spec.ldpc_cap & 0xFF) ? _TRUE : _FALSE;
2664 break;
2665
2666 case HAL_DEF_TX_STBC:
2667 *(u8 *)pval = (((hal->phy_spec.stbc_cap >> 8) & 0xFF) && hal->max_tx_cnt > 1) ? _TRUE : _FALSE;
2668 break;
2669
2670 /* support 1RX for STBC */
2671 case HAL_DEF_RX_STBC:
2672 *(u8 *)pval = hal->phy_spec.stbc_cap & 0xFF;
2673 break;
2674
2675 /* support Explicit TxBF for HT/VHT */
2676 case HAL_DEF_EXPLICIT_BEAMFORMER:
2677 #ifdef CONFIG_BEAMFORMING
2678 *(u8 *)pval = ((hal->phy_spec.txbf_cap >> 20)& 0xF) ? _TRUE : _FALSE;
2679 #else
2680 *(u8 *)pval = _FALSE;
2681 #endif
2682 break;
2683
2684 case HAL_DEF_EXPLICIT_BEAMFORMEE:
2685 #ifdef CONFIG_BEAMFORMING
2686 *(u8 *)pval = ((hal->phy_spec.txbf_cap >> 16) & 0xF) ? _TRUE : _FALSE;
2687 #else
2688 *(u8 *)pval = _FALSE;
2689 #endif
2690 break;
2691
2692
2693 case HAL_DEF_VHT_MU_BEAMFORMER:
2694 #ifdef CONFIG_BEAMFORMING
2695 *(u8 *)pval = ((hal->phy_spec.txbf_cap >> 28)& 0xF) ? _TRUE : _FALSE;
2696 #else
2697 *(u8 *)pval = _FALSE;
2698 #endif
2699 break;
2700
2701 case HAL_DEF_VHT_MU_BEAMFORMEE:
2702 #ifdef CONFIG_BEAMFORMING
2703 *(u8 *)pval = ((hal->phy_spec.txbf_cap >> 24)& 0xF) ? _TRUE : _FALSE;
2704 #else
2705 *(u8 *)pval = _FALSE;
2706 #endif
2707 break;
2708
2709 case HAL_DEF_BEAMFORMER_CAP:
2710 *(u8 *)pval = (hal->phy_spec.txbf_param >> 24)& 0xFF ;
2711 break;
2712
2713 case HAL_DEF_BEAMFORMEE_CAP:
2714 *(u8 *)pval = (hal->phy_spec.txbf_param >> 16) & 0xFF ;
2715 break;
2716
2717 case HW_DEF_RA_INFO_DUMP:
2718 rtl8821c_ra_info_dump(adapter, pval);
2719 break;
2720 /*
2721 case HAL_DEF_DBG_DUMP_TXPKT:
2722 case HAL_DEF_TX_PAGE_SIZE:
2723 break;
2724 */
2725 case HAL_DEF_TX_PAGE_BOUNDARY:
2726 rtw_halmac_get_rsvd_drv_pg_bndy(adapter_to_dvobj(adapter), (u16 *)pval);
2727 break;
2728 /* case HAL_DEF_TX_PAGE_BOUNDARY_WOWLAN:
2729 case HAL_DEF_ANT_DETECT:
2730 case HAL_DEF_PCI_SUUPORT_L1_BACKDOOR:
2731 case HAL_DEF_PCI_AMD_L1_SUPPORT:
2732 case HAL_DEF_PCI_ASPM_OSC:
2733 case HAL_DEF_EFUSE_USAGE:
2734 case HAL_DEF_EFUSE_BYTES:
2735 break;
2736 */
2737 case HW_VAR_BEST_AMPDU_DENSITY:
2738 *((u32 *)pval) = AMPDU_DENSITY_VALUE_4;
2739 break;
2740
2741 default:
2742 bResult = GetHalDefVar(adapter, variable, pval);
2743 break;
2744 }
2745
2746 return bResult;
2747 }
2748
2749 /* xmit section */
rtl8821c_init_xmit_priv(_adapter * adapter)2750 void rtl8821c_init_xmit_priv(_adapter *adapter)
2751 {
2752 struct xmit_priv *pxmitpriv = &adapter->xmitpriv;
2753
2754 pxmitpriv->hw_ssn_seq_no = rtw_get_hwseq_no(adapter);
2755 pxmitpriv->nqos_ssn = 0;
2756 }
2757
2758
fill_txdesc_force_bmc_camid(struct pkt_attrib * pattrib,u8 * ptxdesc)2759 void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc)
2760 {
2761 if ((pattrib->encrypt > 0) && (!pattrib->bswenc)
2762 && (pattrib->bmc_camid != INVALID_SEC_MAC_CAM_ID)) {
2763
2764 SET_TX_DESC_EN_DESC_ID_8821C(ptxdesc, 1);
2765 SET_TX_DESC_MACID_8821C(ptxdesc, pattrib->bmc_camid);
2766 }
2767 }
2768
fill_txdesc_bmc_tx_rate(struct pkt_attrib * pattrib,u8 * ptxdesc)2769 void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc)
2770 {
2771 SET_TX_DESC_USE_RATE_8821C(ptxdesc, 1);
2772 SET_TX_DESC_DATARATE_8821C(ptxdesc, MRateToHwRate(pattrib->rate));
2773 SET_TX_DESC_DISDATAFB_8821C(ptxdesc, 1);
2774 }
2775
rtl8821c_fill_txdesc_sectype(struct pkt_attrib * pattrib,u8 * ptxdesc)2776 void rtl8821c_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc)
2777 {
2778 if ((pattrib->encrypt > 0) && !pattrib->bswenc) {
2779 /* SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES */
2780 switch (pattrib->encrypt) {
2781 case _WEP40_:
2782 case _WEP104_:
2783 case _TKIP_:
2784 case _TKIP_WTMIC_:
2785 SET_TX_DESC_SEC_TYPE_8821C(ptxdesc, 0x1);
2786 break;
2787 #ifdef CONFIG_WAPI_SUPPORT
2788 case _SMS4_:
2789 SET_TX_DESC_SEC_TYPE_8821C(ptxdesc, 0x2);
2790 break;
2791 #endif
2792 case _AES_:
2793 SET_TX_DESC_SEC_TYPE_8821C(ptxdesc, 0x3);
2794 break;
2795 case _CCMP_256_:
2796 case _GCMP_:
2797 case _GCMP_256_:
2798 SET_TX_DESC_SEC_TYPE_8821C(ptxdesc, 0x2);
2799 break;
2800 case _NO_PRIVACY_:
2801 default:
2802 SET_TX_DESC_SEC_TYPE_8821C(ptxdesc, 0x0);
2803 break;
2804 }
2805 }
2806 }
2807
rtl8821c_fill_txdesc_vcs(PADAPTER adapter,struct pkt_attrib * pattrib,u8 * ptxdesc)2808 void rtl8821c_fill_txdesc_vcs(PADAPTER adapter, struct pkt_attrib *pattrib, u8 *ptxdesc)
2809 {
2810 struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
2811 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
2812
2813
2814 if (pattrib->vcs_mode) {
2815 switch (pattrib->vcs_mode) {
2816 case RTS_CTS:
2817 SET_TX_DESC_RTSEN_8821C(ptxdesc, 1);
2818 break;
2819 case CTS_TO_SELF:
2820 SET_TX_DESC_CTS2SELF_8821C(ptxdesc, 1);
2821 break;
2822 case NONE_VCS:
2823 default:
2824 break;
2825 }
2826
2827 if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT)
2828 SET_TX_DESC_RTS_SHORT_8821C(ptxdesc, 1);
2829
2830 SET_TX_DESC_RTSRATE_8821C(ptxdesc, 0x8);/* RTS Rate=24M */
2831 SET_TX_DESC_RTS_RTY_LOWEST_RATE_8821C(ptxdesc, 0xf);
2832 }
2833 }
2834
rtl8821c_bw_mapping(PADAPTER adapter,struct pkt_attrib * pattrib)2835 u8 rtl8821c_bw_mapping(PADAPTER adapter, struct pkt_attrib *pattrib)
2836 {
2837 u8 BWSettingOfDesc = 0;
2838 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
2839
2840
2841 if (hal->current_channel_bw == CHANNEL_WIDTH_80) {
2842 if (pattrib->bwmode == CHANNEL_WIDTH_80)
2843 BWSettingOfDesc = 2;
2844 else if (pattrib->bwmode == CHANNEL_WIDTH_40)
2845 BWSettingOfDesc = 1;
2846 else
2847 BWSettingOfDesc = 0;
2848 } else if (hal->current_channel_bw == CHANNEL_WIDTH_40) {
2849 if ((pattrib->bwmode == CHANNEL_WIDTH_40) || (pattrib->bwmode == CHANNEL_WIDTH_80))
2850 BWSettingOfDesc = 1;
2851 else
2852 BWSettingOfDesc = 0;
2853 } else
2854 BWSettingOfDesc = 0;
2855
2856 return BWSettingOfDesc;
2857 }
2858
rtl8821c_sc_mapping(PADAPTER adapter,struct pkt_attrib * pattrib)2859 u8 rtl8821c_sc_mapping(PADAPTER adapter, struct pkt_attrib *pattrib)
2860 {
2861 u8 SCSettingOfDesc = 0;
2862 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
2863
2864
2865 if (hal->current_channel_bw == CHANNEL_WIDTH_80) {
2866 if (pattrib->bwmode == CHANNEL_WIDTH_80)
2867 SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
2868 else if (pattrib->bwmode == CHANNEL_WIDTH_40) {
2869 if (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
2870 SCSettingOfDesc = VHT_DATA_SC_40_LOWER_OF_80MHZ;
2871 else if (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
2872 SCSettingOfDesc = VHT_DATA_SC_40_UPPER_OF_80MHZ;
2873 else
2874 RTW_INFO("SCMapping: DONOT CARE Mode Setting\n");
2875 } else {
2876 if ((hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER))
2877 SCSettingOfDesc = VHT_DATA_SC_20_LOWEST_OF_80MHZ;
2878 else if ((hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER))
2879 SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ;
2880 else if ((hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
2881 SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ;
2882 else if ((hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
2883 SCSettingOfDesc = VHT_DATA_SC_20_UPPERST_OF_80MHZ;
2884 else
2885 RTW_INFO("SCMapping: DONOT CARE Mode Setting\n");
2886 }
2887 } else if (hal->current_channel_bw == CHANNEL_WIDTH_40) {
2888 if (pattrib->bwmode == CHANNEL_WIDTH_40)
2889 SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
2890 else if (pattrib->bwmode == CHANNEL_WIDTH_20) {
2891 if (hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
2892 SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ;
2893 else if (hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
2894 SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ;
2895 else
2896 SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
2897 }
2898 } else
2899 SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
2900
2901 return SCSettingOfDesc;
2902 }
2903
rtl8821c_fill_txdesc_phy(PADAPTER adapter,struct pkt_attrib * pattrib,u8 * ptxdesc)2904 void rtl8821c_fill_txdesc_phy(PADAPTER adapter, struct pkt_attrib *pattrib, u8 *ptxdesc)
2905 {
2906 if (pattrib->ht_en) {
2907 /* Set Bandwidth and sub-channel settings. */
2908 SET_TX_DESC_DATA_BW_8821C(ptxdesc, rtl8821c_bw_mapping(adapter, pattrib));
2909 SET_TX_DESC_DATA_SC_8821C(ptxdesc, rtl8821c_sc_mapping(adapter, pattrib));
2910 }
2911 }
2912
rtl8821c_cal_txdesc_chksum(PADAPTER adapter,u8 * ptxdesc)2913 void rtl8821c_cal_txdesc_chksum(PADAPTER adapter, u8 *ptxdesc)
2914 {
2915 struct halmac_adapter *halmac;
2916 struct halmac_api *api;
2917
2918
2919 halmac = adapter_to_halmac(adapter);
2920 api = HALMAC_GET_API(halmac);
2921
2922 api->halmac_fill_txdesc_checksum(halmac, ptxdesc);
2923 }
2924
2925
2926 #ifdef CONFIG_MP_INCLUDED
rtl8821c_prepare_mp_txdesc(PADAPTER adapter,struct mp_priv * pmp_priv)2927 void rtl8821c_prepare_mp_txdesc(PADAPTER adapter, struct mp_priv *pmp_priv)
2928 {
2929 u32 desc_size = 0;
2930 u8 *desc;
2931 struct pkt_attrib *attrib;
2932 u32 pkt_size;
2933 s32 bmcast;
2934 u8 data_rate, pwr_status, offset;
2935
2936 rtw_halmac_get_tx_desc_size(adapter_to_dvobj(adapter), &desc_size);
2937
2938 desc = pmp_priv->tx.desc;
2939 attrib = &pmp_priv->tx.attrib;
2940 pkt_size = attrib->last_txcmdsz;
2941 bmcast = IS_MCAST(attrib->ra);
2942
2943 SET_TX_DESC_LS_8821C(desc, 1);
2944 SET_TX_DESC_TXPKTSIZE_8821C(desc, pkt_size);
2945
2946 offset = desc_size;
2947 SET_TX_DESC_OFFSET_8821C(desc, offset);
2948
2949 #if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI)
2950 SET_TX_DESC_PKT_OFFSET_8821C(desc, 0); /* Don't need to set PACKET Offset bit,it's no use 512bytes of length */
2951 #else
2952 SET_TX_DESC_PKT_OFFSET_8821C(desc, 1);
2953 #endif
2954
2955 if (bmcast)
2956 SET_TX_DESC_BMC_8821C(desc, 1);
2957
2958 SET_TX_DESC_MACID_8821C(desc, attrib->mac_id);
2959 SET_TX_DESC_RATE_ID_8821C(desc, attrib->raid);
2960 SET_TX_DESC_QSEL_8821C(desc, attrib->qsel);
2961
2962 if (pmp_priv->preamble)
2963 SET_TX_DESC_DATA_SHORT_8821C(desc, 1);
2964
2965 if (!attrib->qos_en)
2966 SET_TX_DESC_EN_HWSEQ_8821C(desc, 1);
2967 else
2968 SET_TX_DESC_SW_SEQ_8821C(desc, attrib->seqnum);
2969
2970 if (pmp_priv->bandwidth <= CHANNEL_WIDTH_160)
2971 SET_TX_DESC_DATA_BW_8821C(desc, pmp_priv->bandwidth);
2972 else {
2973 RTW_INFO("%s: <ERROR> unknown bandwidth %d, use 20M\n",
2974 __FUNCTION__, pmp_priv->bandwidth);
2975 SET_TX_DESC_DATA_BW_8821C(desc, CHANNEL_WIDTH_20);
2976 }
2977
2978 SET_TX_DESC_DISDATAFB_8821C(desc, 1);
2979 SET_TX_DESC_USE_RATE_8821C(desc, 1);
2980 SET_TX_DESC_DATARATE_8821C(desc, pmp_priv->rateidx);
2981 }
2982 #endif /* CONFIG_MP_INCLUDED */
2983
2984 #define OFFSET_SZ 0
fill_default_txdesc(struct xmit_frame * pxmitframe,u8 * pbuf)2985 static void fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf)
2986 {
2987 PADAPTER adapter = pxmitframe->padapter;
2988 HAL_DATA_TYPE *phal_data = GET_HAL_DATA(adapter);
2989 struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
2990 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
2991 struct pkt_attrib *pattrib = &pxmitframe->attrib;
2992 s32 bmcst = IS_MCAST(pattrib->ra);
2993 u32 desc_size = 0;
2994 u8 offset, pkt_offset = 0;
2995 #define RA_SW_DEFINE_CONT 0x01
2996 u8 drv_fixed_reate = _FALSE;
2997 u8 hw_port = rtw_hal_get_port(adapter);
2998
2999 #if 0
3000 #ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX
3001 if (adapter->registrypriv.mp_mode == 0) {
3002 if ((PACKET_OFFSET_SZ != 0) && (!bagg_pkt) &&
3003 (rtw_usb_bulk_size_boundary(adapter, TXDESC_SIZE + pattrib->last_txcmdsz) == _FALSE)) {
3004 ptxdesc = (pmem + PACKET_OFFSET_SZ);
3005 /* RTW_INFO("==> non-agg-pkt,shift pointer...\n"); */
3006 pull = 1;
3007 }
3008 }
3009 #endif /* CONFIG_USE_USB_BUFFER_ALLOC_TX*/
3010 #endif
3011 rtw_halmac_get_tx_desc_size(adapter_to_dvobj(adapter), &desc_size);
3012
3013 _rtw_memset(pbuf, 0, desc_size);
3014
3015 /*SET_TX_DESC_LS_8821C(pbuf, 1);*/ /*for USB only*/
3016
3017 SET_TX_DESC_TXPKTSIZE_8821C(pbuf, pattrib->last_txcmdsz);
3018
3019 offset = desc_size + OFFSET_SZ;
3020
3021 #ifdef CONFIG_TX_EARLY_MODE
3022 if (pxmitframe->frame_tag == DATA_FRAMETAG)
3023 if (bagg_pkt)
3024 offset += EARLY_MODE_INFO_SIZE ;/*0x28 */
3025 pkt_offset = pxmitframe->pkt_offset = 0x01;
3026 #endif
3027 SET_TX_DESC_OFFSET_8821C(pbuf, offset);
3028
3029 if (bmcst)
3030 SET_TX_DESC_BMC_8821C(pbuf, 1);
3031
3032 #if 0
3033 #ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX
3034 if (adapter->registrypriv.mp_mode == 0) {
3035 if ((PACKET_OFFSET_SZ != 0) && (!bagg_pkt)) {
3036 if ((pull) && (pxmitframe->pkt_offset > 0)) {
3037 pxmitframe->pkt_offset = pxmitframe->pkt_offset - 1;
3038 pkt_offset = pxmitframe->pkt_offset;
3039 }
3040 }
3041 }
3042 /*RTW_INFO("%s, pkt_offset=0x%02x\n", __func__, pxmitframe->pkt_offset);*/
3043 #endif
3044 #endif
3045
3046 /* pkt_offset, unit:8 bytes padding*/
3047 if (pkt_offset > 0)
3048 SET_TX_DESC_PKT_OFFSET_8821C(pbuf, pkt_offset);
3049
3050
3051 SET_TX_DESC_MACID_8821C(pbuf, pattrib->mac_id);
3052 SET_TX_DESC_RATE_ID_8821C(pbuf, pattrib->raid);
3053 SET_TX_DESC_QSEL_8821C(pbuf, pattrib->qsel);
3054
3055 /* 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS.
3056 * (1) The sequence number of each non-Qos frame / broadcast / multicast /
3057 * mgnt frame should be controled by Hw because Fw will also send null data
3058 * which we cannot control when Fw LPS enable.
3059 * --> default enable non-Qos data sequense number. 2010.06.23. by tynli.
3060 * (2) Enable HW SEQ control for beacon packet, because we use Hw beacon.
3061 * (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets.
3062 */
3063
3064 /* HW sequence, to fix to use 0 queue. todo: 4AC packets to use auto queue select */
3065 if (!pattrib->qos_en) {
3066 SET_TX_DESC_DISQSELSEQ_8821C(pbuf, 1);
3067 SET_TX_DESC_EN_HWSEQ_8821C(pbuf, 1);
3068 SET_TX_DESC_HW_SSN_SEL_8821C(pbuf, pattrib->hw_ssn_sel);
3069 SET_TX_DESC_EN_HWEXSEQ_8821C(pbuf, 0);
3070 } else
3071 SET_TX_DESC_SW_SEQ_8821C(pbuf, pattrib->seqnum);
3072
3073 if (pxmitframe->frame_tag == DATA_FRAMETAG) {
3074
3075 rtl8821c_fill_txdesc_sectype(pattrib, pbuf);
3076
3077 if (bmcst)
3078 fill_txdesc_force_bmc_camid(pattrib, pbuf);
3079
3080 #if defined(CONFIG_USB_TX_AGGREGATION) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
3081 if (pxmitframe->agg_num > 1) {
3082 /*RTW_INFO("%s agg_num:%d\n",__func__,pxmitframe->agg_num );*/
3083 SET_TX_DESC_DMA_TXAGG_NUM_8821C(pbuf, pxmitframe->agg_num);
3084 }
3085 #endif /*CONFIG_USB_TX_AGGREGATION*/
3086
3087 rtl8821c_fill_txdesc_vcs(adapter, pattrib, pbuf);
3088
3089 #ifdef CONFIG_SUPPORT_DYNAMIC_TXPWR
3090 rtw_phydm_set_dyntxpwr(adapter, pbuf, pattrib->mac_id);
3091 #endif
3092 if ((pattrib->ether_type != 0x888e) &&
3093 (pattrib->ether_type != 0x0806) &&
3094 (pattrib->ether_type != 0x88B4) &&
3095 (pattrib->dhcp_pkt != 1)
3096 #ifdef CONFIG_AUTO_AP_MODE
3097 && (pattrib->pctrl != _TRUE)
3098 #endif
3099 ) {
3100 /* Non EAP & ARP & DHCP type data packet */
3101
3102 if (pattrib->ampdu_en == _TRUE) {
3103 SET_TX_DESC_AGG_EN_8821C(pbuf, 1);
3104 SET_TX_DESC_MAX_AGG_NUM_8821C(pbuf, 0x1F);
3105 SET_TX_DESC_AMPDU_DENSITY_8821C(pbuf, pattrib->ampdu_spacing);
3106 } else
3107 SET_TX_DESC_BK_8821C(pbuf, 1);
3108
3109 if (adapter->fix_bw != 0xFF)
3110 pattrib->bwmode = adapter->fix_bw;
3111
3112 rtl8821c_fill_txdesc_phy(adapter, pattrib, pbuf);
3113
3114 if (phal_data->current_band_type == BAND_ON_5G)/*Data Rate Fallback Limit rate*/
3115 SET_TX_DESC_DATA_RTY_LOWEST_RATE_8821C(pbuf, 4);
3116 else
3117 SET_TX_DESC_DATA_RTY_LOWEST_RATE_8821C(pbuf, 0);
3118
3119 if (bmcst) {
3120 drv_fixed_reate = _TRUE;
3121 fill_txdesc_bmc_tx_rate(pattrib, pbuf);
3122 }
3123
3124 /* modify data rate by iwpriv*/
3125 if (adapter->fix_rate != 0xFF) {
3126 drv_fixed_reate = _TRUE;
3127 SET_TX_DESC_USE_RATE_8821C(pbuf, 1);
3128
3129 if (adapter->fix_rate & BIT(7))
3130 SET_TX_DESC_DATA_SHORT_8821C(pbuf, 1);
3131 SET_TX_DESC_DATARATE_8821C(pbuf, adapter->fix_rate & 0x7F);
3132 if (!adapter->data_fb)
3133 SET_TX_DESC_DISDATAFB_8821C(pbuf, 1);
3134 }
3135
3136 if (pattrib->ldpc)
3137 SET_TX_DESC_DATA_LDPC_8821C(pbuf, 1);
3138 if (pattrib->stbc)
3139 SET_TX_DESC_DATA_STBC_8821C(pbuf, 1);
3140
3141 #ifdef CONFIG_CMCC_TEST
3142 SET_TX_DESC_DATA_SHORT_8821C(pbuf, 1); /* use cck short premble */
3143 #endif
3144
3145 #ifdef CONFIG_WMMPS_STA
3146 if (pattrib->trigger_frame)
3147 SET_TX_DESC_TRI_FRAME_8821C (pbuf, 1);
3148 #endif /* CONFIG_WMMPS_STA */
3149 } else {
3150
3151 /*
3152 * EAP data packet and ARP packet.
3153 * Use the 1M data rate to send the EAP/ARP packet.
3154 * This will maybe make the handshake smooth.
3155 */
3156 SET_TX_DESC_BK_8821C(pbuf, 1);
3157 drv_fixed_reate = _TRUE;
3158 SET_TX_DESC_USE_RATE_8821C(pbuf, 1);
3159
3160 /* HW will ignore this setting if the transmission rate is legacy OFDM.*/
3161 if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT)
3162 SET_TX_DESC_DATA_SHORT_8821C(pbuf, 1);
3163 #ifdef CONFIG_IP_R_MONITOR
3164 if((pattrib->ether_type == ETH_P_ARP) &&
3165 (IsSupportedTxOFDM(adapter->registrypriv.wireless_mode)))
3166 SET_TX_DESC_DATARATE_8821C(pbuf, MRateToHwRate(IEEE80211_OFDM_RATE_6MB));
3167 else
3168 #endif/*CONFIG_IP_R_MONITOR*/
3169 SET_TX_DESC_DATARATE_8821C(pbuf, MRateToHwRate(pmlmeext->tx_rate));
3170
3171 RTW_INFO(FUNC_ADPT_FMT ": SP Packet(0x%04X) rate=0x%x SeqNum = %d\n",
3172 FUNC_ADPT_ARG(adapter), pattrib->ether_type, MRateToHwRate(pmlmeext->tx_rate), pattrib->seqnum);
3173 }
3174 #ifdef CONFIG_TDLS
3175 #ifdef CONFIG_XMIT_ACK
3176 /* CCX-TXRPT ack for xmit mgmt frames. */
3177 if (pxmitframe->ack_report) {
3178 #ifdef DBG_CCX
3179 RTW_INFO("%s set spe_rpt\n", __func__);
3180 #endif
3181 SET_TX_DESC_SPE_RPT_8821C(pbuf, 1);
3182 }
3183 #endif /* CONFIG_XMIT_ACK */
3184 #endif
3185
3186 } else if (pxmitframe->frame_tag == MGNT_FRAMETAG) {
3187 SET_TX_DESC_MBSSID_8821C(pbuf, pattrib->mbssid & 0xF);
3188 SET_TX_DESC_USE_RATE_8821C(pbuf, 1);
3189 drv_fixed_reate = _TRUE;
3190
3191 SET_TX_DESC_DATARATE_8821C(pbuf, MRateToHwRate(pattrib->rate));
3192
3193 /* VHT NDPA or HT NDPA Packet for Beamformer.*/
3194 #ifdef CONFIG_BEAMFORMING
3195 if ((pattrib->subtype == WIFI_NDPA) ||
3196 ((pattrib->subtype == WIFI_ACTION_NOACK) && (pattrib->order == 1))) {
3197 SET_TX_DESC_NAVUSEHDR_8821C(pbuf, 1);
3198
3199 SET_TX_DESC_DATA_BW_8821C(pbuf, rtl8821c_bw_mapping(adapter, pattrib));
3200 /*SET_TX_DESC_DATA_SC_8821C(pbuf, rtl8821c_sc_mapping(adapter, pattrib));*/
3201 SET_TX_DESC_SIGNALING_TA_PKT_SC_8821C(pbuf, rtl8821c_sc_mapping(adapter,pattrib));
3202
3203 SET_TX_DESC_RTY_LMT_EN_8821C(pbuf, 1);
3204 SET_TX_DESC_RTS_DATA_RTY_LMT_8821C(pbuf, 5);
3205 SET_TX_DESC_DISDATAFB_8821C(pbuf, 1);
3206
3207 /*if(pattrib->rts_cca)
3208 SET_TX_DESC_NDPA_8821C(ptxdesc, 2);
3209 else*/
3210 SET_TX_DESC_NDPA_8821C(pbuf, 1);
3211 } else
3212 #endif
3213 {
3214 SET_TX_DESC_RTY_LMT_EN_8821C(pbuf, 1);
3215 if (pattrib->retry_ctrl == _TRUE)
3216 SET_TX_DESC_RTS_DATA_RTY_LMT_8821C(pbuf, 6);
3217 else
3218 SET_TX_DESC_RTS_DATA_RTY_LMT_8821C(pbuf, 12);
3219 }
3220
3221 #ifdef CONFIG_XMIT_ACK
3222 /* CCX-TXRPT ack for xmit mgmt frames. */
3223 if (pxmitframe->ack_report) {
3224 #ifdef DBG_CCX
3225 RTW_INFO("%s set spe_rpt\n", __func__);
3226 #endif
3227 SET_TX_DESC_SPE_RPT_8821C(pbuf, 1);
3228 }
3229 #endif /* CONFIG_XMIT_ACK */
3230 } else if (pxmitframe->frame_tag == TXAGG_FRAMETAG)
3231 RTW_INFO("%s: TXAGG_FRAMETAG\n", __func__);
3232 #ifdef CONFIG_MP_INCLUDED
3233 else if (pxmitframe->frame_tag == MP_FRAMETAG) {
3234 RTW_INFO("%s: MP_FRAMETAG\n", __func__);
3235 fill_txdesc_for_mp(adapter, pbuf);
3236 }
3237 #endif
3238 else {
3239 RTW_INFO("%s: frame_tag=0x%x\n", __func__, pxmitframe->frame_tag);
3240
3241 SET_TX_DESC_USE_RATE_8821C(pbuf, 1);
3242 drv_fixed_reate = _TRUE;
3243 SET_TX_DESC_DATARATE_8821C(pbuf, MRateToHwRate(pmlmeext->tx_rate));
3244 }
3245
3246 if (drv_fixed_reate == _TRUE)
3247 SET_TX_DESC_SW_DEFINE_8821C(pbuf, RA_SW_DEFINE_CONT);
3248
3249 if (adapter->power_offset != 0)
3250 SET_TX_DESC_TXPWR_OFSET_8821C(pbuf, adapter->power_offset);
3251
3252 #ifdef CONFIG_ANTENNA_DIVERSITY
3253 if (!bmcst && pattrib->psta)
3254 odm_set_tx_ant_by_tx_info(adapter_to_phydm(adapter), pbuf, pattrib->psta->cmn.mac_id);
3255 #endif
3256
3257 #ifdef CONFIG_BEAMFORMING
3258 SET_TX_DESC_G_ID_8821C(pbuf, pattrib->txbf_g_id);
3259 SET_TX_DESC_P_AID_8821C(pbuf, pattrib->txbf_p_aid);
3260 #endif
3261
3262 SET_TX_DESC_PORT_ID_8821C(pbuf, hw_port);
3263 SET_TX_DESC_MULTIPLE_PORT_8821C(pbuf, hw_port);
3264 }
3265
rtl8821c_dbg_dump_tx_desc(PADAPTER adapter,int frame_tag,u8 * ptxdesc)3266 void rtl8821c_dbg_dump_tx_desc(PADAPTER adapter, int frame_tag, u8 *ptxdesc)
3267 {
3268 u8 bDumpTxPkt;
3269 u8 bDumpTxDesc = _FALSE;
3270
3271
3272 rtw_hal_get_def_var(adapter, HAL_DEF_DBG_DUMP_TXPKT, &bDumpTxPkt);
3273
3274 /* 1 for data frame, 2 for mgnt frame */
3275 if (bDumpTxPkt == 1) {
3276 RTW_INFO("dump tx_desc for data frame\n");
3277 if ((frame_tag & 0x0f) == DATA_FRAMETAG)
3278 bDumpTxDesc = _TRUE;
3279 } else if (bDumpTxPkt == 2) {
3280 RTW_INFO("dump tx_desc for mgnt frame\n");
3281 if ((frame_tag & 0x0f) == MGNT_FRAMETAG)
3282 bDumpTxDesc = _TRUE;
3283 }
3284
3285 /* 8821C TX SIZE = 48(HALMAC_TX_DESC_SIZE_8821C) */
3286 if (_TRUE == bDumpTxDesc) {
3287 RTW_INFO("=====================================\n");
3288 RTW_INFO("Offset00(0x%08x)\n", *((u32 *)(ptxdesc)));
3289 RTW_INFO("Offset04(0x%08x)\n", *((u32 *)(ptxdesc + 4)));
3290 RTW_INFO("Offset08(0x%08x)\n", *((u32 *)(ptxdesc + 8)));
3291 RTW_INFO("Offset12(0x%08x)\n", *((u32 *)(ptxdesc + 12)));
3292 RTW_INFO("Offset16(0x%08x)\n", *((u32 *)(ptxdesc + 16)));
3293 RTW_INFO("Offset20(0x%08x)\n", *((u32 *)(ptxdesc + 20)));
3294 RTW_INFO("Offset24(0x%08x)\n", *((u32 *)(ptxdesc + 24)));
3295 RTW_INFO("Offset28(0x%08x)\n", *((u32 *)(ptxdesc + 28)));
3296 RTW_INFO("Offset32(0x%08x)\n", *((u32 *)(ptxdesc + 32)));
3297 RTW_INFO("Offset36(0x%08x)\n", *((u32 *)(ptxdesc + 36)));
3298 RTW_INFO("Offset40(0x%08x)\n", *((u32 *)(ptxdesc + 40)));
3299 RTW_INFO("Offset44(0x%08x)\n", *((u32 *)(ptxdesc + 44)));
3300 RTW_INFO("=====================================\n");
3301 }
3302 }
3303
3304 /*
3305 * Description:
3306 *
3307 * Parameters:
3308 * pxmitframe xmitframe
3309 * pbuf where to fill tx desc
3310 */
rtl8821c_update_txdesc(struct xmit_frame * pxmitframe,u8 * pbuf)3311 void rtl8821c_update_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf)
3312 {
3313 fill_default_txdesc(pxmitframe, pbuf);
3314 rtl8821c_cal_txdesc_chksum(pxmitframe->padapter, pbuf);
3315 rtl8821c_dbg_dump_tx_desc(pxmitframe->padapter, pxmitframe->frame_tag, pbuf);
3316 }
3317
3318 /*
3319 * Description:
3320 * In normal chip, we should send some packet to HW which will be used by FW
3321 * in FW LPS mode.
3322 * The function is to fill the Tx descriptor of this packets,
3323 * then FW can tell HW to send these packet directly.
3324 */
fill_fake_txdesc(PADAPTER adapter,u8 * pDesc,u32 BufferLen,u8 IsPsPoll,u8 IsBTQosNull,u8 bDataFrame)3325 static void fill_fake_txdesc(PADAPTER adapter, u8 *pDesc, u32 BufferLen,
3326 u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame)
3327 {
3328 struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
3329 struct xmit_priv *pxmitpriv = &adapter->xmitpriv;
3330 u32 desc_size = 0;
3331 u8 hw_port = rtw_hal_get_port(adapter);
3332
3333 rtw_halmac_get_tx_desc_size(adapter_to_dvobj(adapter), &desc_size);
3334
3335 /* Clear all status */
3336 _rtw_memset(pDesc, 0, desc_size);
3337
3338 SET_TX_DESC_LS_8821C(pDesc, 1);
3339
3340 SET_TX_DESC_OFFSET_8821C(pDesc, desc_size);
3341
3342 SET_TX_DESC_TXPKTSIZE_8821C(pDesc, BufferLen);
3343 SET_TX_DESC_QSEL_8821C(pDesc, QSLT_MGNT); /* Fixed queue of Mgnt queue */
3344
3345 if (pmlmeext->cur_wireless_mode & WIRELESS_11B)
3346 SET_TX_DESC_RATE_ID_8821C(pDesc, RATEID_IDX_B);
3347 else
3348 SET_TX_DESC_RATE_ID_8821C(pDesc, RATEID_IDX_G);
3349
3350 /* Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by HW */
3351 if (_TRUE == IsPsPoll)
3352 SET_TX_DESC_NAVUSEHDR_8821C(pDesc, 1);
3353 else {
3354 SET_TX_DESC_DISQSELSEQ_8821C(pDesc, 1);
3355 SET_TX_DESC_EN_HWSEQ_8821C(pDesc, 1);
3356 SET_TX_DESC_HW_SSN_SEL_8821C(pDesc, pxmitpriv->hw_ssn_seq_no);/*pattrib->hw_ssn_sel*/
3357 SET_TX_DESC_EN_HWEXSEQ_8821C(pDesc, 0);
3358 }
3359
3360 if (_TRUE == IsBTQosNull)
3361 SET_TX_DESC_BT_NULL_8821C(pDesc, 1);
3362
3363 SET_TX_DESC_USE_RATE_8821C(pDesc, 1);
3364 SET_TX_DESC_DATARATE_8821C(pDesc, MRateToHwRate(pmlmeext->tx_rate));
3365
3366 #ifdef CONFIG_MCC_MODE
3367 /* config Null data retry number */
3368 if (IsPsPoll == _FALSE && IsBTQosNull == _FALSE && bDataFrame == _FALSE) {
3369 if (rtw_hal_check_mcc_status(adapter, MCC_STATUS_PROCESS_MCC_START_SETTING)) {
3370 u8 rty_num = adapter->mcc_adapterpriv.null_rty_num;
3371 if (rty_num != 0) {
3372 SET_TX_DESC_RTY_LMT_EN_8821C(pDesc, 1);
3373 SET_TX_DESC_RTS_DATA_RTY_LMT_8821C(pDesc, rty_num);
3374 }
3375 }
3376 }
3377 #endif
3378
3379 /*
3380 * Encrypt the data frame if under security mode excepct null data.
3381 */
3382 if (_TRUE == bDataFrame) {
3383 u32 EncAlg;
3384
3385 EncAlg = adapter->securitypriv.dot11PrivacyAlgrthm;
3386 switch (EncAlg) {
3387 case _NO_PRIVACY_:
3388 SET_TX_DESC_SEC_TYPE_8821C(pDesc, 0x0);
3389 break;
3390 case _WEP40_:
3391 case _WEP104_:
3392 case _TKIP_:
3393 SET_TX_DESC_SEC_TYPE_8821C(pDesc, 0x1);
3394 break;
3395 case _SMS4_:
3396 SET_TX_DESC_SEC_TYPE_8821C(pDesc, 0x2);
3397 break;
3398 case _AES_:
3399 SET_TX_DESC_SEC_TYPE_8821C(pDesc, 0x3);
3400 break;
3401 case _CCMP_256_:
3402 case _GCMP_:
3403 case _GCMP_256_:
3404 SET_TX_DESC_SEC_TYPE_8821C(pDesc, 0x2);
3405 break;
3406 default:
3407 SET_TX_DESC_SEC_TYPE_8821C(pDesc, 0x0);
3408 break;
3409 }
3410 }
3411 SET_TX_DESC_PORT_ID_8821C(pDesc, hw_port);
3412 SET_TX_DESC_MULTIPLE_PORT_8821C(pDesc, hw_port);
3413
3414 #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
3415 /*
3416 * USB interface drop packet if the checksum of descriptor isn't correct.
3417 * Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.).
3418 */
3419 rtl8821c_cal_txdesc_chksum(adapter, pDesc);
3420 #endif
3421 }
3422
rtl8821c_rxdesc2attribute(struct rx_pkt_attrib * pattrib,u8 * desc)3423 void rtl8821c_rxdesc2attribute(struct rx_pkt_attrib *pattrib, u8 *desc)
3424 {
3425 /* initial value */
3426 _rtw_memset(pattrib, 0, sizeof(struct rx_pkt_attrib));
3427
3428 pattrib->pkt_len = (u16)GET_RX_DESC_PKT_LEN_8821C(desc);
3429 pattrib->pkt_rpt_type = (GET_RX_DESC_C2H_8821C(desc)) ? C2H_PACKET : NORMAL_RX;
3430
3431 if (pattrib->pkt_rpt_type == NORMAL_RX) {
3432 /* Get from RX DESC */
3433 pattrib->crc_err = (u8)GET_RX_DESC_CRC32_8821C(desc);
3434 pattrib->icv_err = (u8)GET_RX_DESC_ICV_ERR_8821C(desc);
3435
3436 pattrib->drvinfo_sz = (u8)GET_RX_DESC_DRV_INFO_SIZE_8821C(desc) << 3;
3437 pattrib->encrypt = (u8)GET_RX_DESC_SECURITY_8821C(desc);
3438 pattrib->qos = (u8)GET_RX_DESC_QOS_8821C(desc);
3439 pattrib->shift_sz = (u8)GET_RX_DESC_SHIFT_8821C(desc);
3440 pattrib->physt = (u8)GET_RX_DESC_PHYST_8821C(desc);
3441 pattrib->bdecrypted = (u8)GET_RX_DESC_SWDEC_8821C(desc) ? 0 : 1;
3442
3443 pattrib->priority = (u8)GET_RX_DESC_TID_8821C(desc);
3444 pattrib->amsdu = (u8)GET_RX_DESC_AMSDU_8821C(desc);
3445 pattrib->mdata = (u8)GET_RX_DESC_MD_8821C(desc);
3446 pattrib->mfrag = (u8)GET_RX_DESC_MF_8821C(desc);
3447
3448 pattrib->seq_num = (u16)GET_RX_DESC_SEQ_8821C(desc);
3449 pattrib->frag_num = (u8)GET_RX_DESC_FRAG_8821C(desc);
3450 pattrib->ampdu = (u8)GET_RX_DESC_PAGGR_8821C(desc);
3451 pattrib->ampdu_eof = (u8)GET_RX_DESC_RX_EOF_8821C(desc);
3452 pattrib->ppdu_cnt = (u8)GET_RX_DESC_PPDU_CNT_8821C(desc);
3453 pattrib->free_cnt = (u32)GET_RX_DESC_TSFL_8821C(desc);
3454
3455 pattrib->bw = CHANNEL_WIDTH_MAX;
3456 pattrib->data_rate = (u8)GET_RX_DESC_RX_RATE_8821C(desc);
3457 }
3458 }
3459
rtl8821c_query_rx_desc(union recv_frame * precvframe,u8 * pdesc)3460 void rtl8821c_query_rx_desc(union recv_frame *precvframe, u8 *pdesc)
3461 {
3462 rtl8821c_rxdesc2attribute(&precvframe->u.hdr.attrib, pdesc);
3463 }
3464
InitBeaconParameters(PADAPTER adapter)3465 static void InitBeaconParameters(PADAPTER adapter)
3466 {
3467 PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
3468
3469 /* TBTT setup time */
3470 rtw_write8(adapter, REG_TBTT_PROHIBIT_8821C, TBTT_PROHIBIT_SETUP_TIME);
3471
3472 /* TBTT hold time: 0x540[19:8] */
3473 rtw_write8(adapter, REG_TBTT_PROHIBIT_8821C + 1, TBTT_PROHIBIT_HOLD_TIME_STOP_BCN & 0xFF);
3474 rtw_write8(adapter, REG_TBTT_PROHIBIT_8821C + 2,
3475 (rtw_read8(adapter, REG_TBTT_PROHIBIT_8821C + 2) & 0xF0) | (TBTT_PROHIBIT_HOLD_TIME_STOP_BCN >> 8));
3476
3477 rtw_write8(adapter, REG_DRVERLYINT_8821C, DRIVER_EARLY_INT_TIME_8821C); /* 5ms */
3478 rtw_write8(adapter, REG_BCNDMATIM_8821C, BCN_DMA_ATIME_INT_TIME_8821C); /* 2ms */
3479
3480 /*
3481 * Suggested by designer timchen. Change beacon AIFS to the largest number
3482 * beacause test chip does not contension before sending beacon.
3483 */
3484 rtw_write16(adapter, REG_BCNTCFG_8821C, 0x4413);
3485 }
3486
beacon_function_enable(PADAPTER adapter,u8 Enable,u8 Linked)3487 static void beacon_function_enable(PADAPTER adapter, u8 Enable, u8 Linked)
3488 {
3489 hw_bcn_ctrl_add(adapter, get_hw_port(adapter), BIT_DIS_TSF_UDT_8821C | BIT_EN_BCN_FUNCTION_8821C);
3490 }
3491
set_beacon_related_registers(PADAPTER adapter)3492 static void set_beacon_related_registers(PADAPTER adapter)
3493 {
3494 struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
3495 struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
3496
3497 /* reset TSF, enable update TSF, correcting TSF On Beacon */
3498 #if 0
3499 /* * REG_MBSSID_BCN_SPACE */
3500 /* * REG_BCNDMATIM */
3501 /* * REG_ATIMWND */
3502 /* * REG_TBTT_PROHIBIT */
3503 /* * REG_DRVERLYINT */
3504 /* * REG_BCN_MAX_ERR */
3505 /* * REG_BCNTCFG (0x510) */
3506 /* * REG_DUAL_TSF_RST */
3507 /* * REG_BCN_CTRL (0x550) */
3508 #endif
3509
3510 /* ATIM window */
3511 rtw_write16(adapter, REG_ATIMWND_8821C, 2);
3512
3513 /* Beacon interval (in unit of TU). */
3514 rtw_hal_set_hwreg(adapter, HW_VAR_BEACON_INTERVAL, (u8 *)&pmlmeinfo->bcn_interval);
3515
3516 InitBeaconParameters(adapter);
3517
3518 rtw_write8(adapter, REG_SLOT_8821C, 0x09);
3519
3520 /* Reset TSF Timer to zero */
3521 hw_tsf_reset(adapter);
3522
3523 rtw_write8(adapter, REG_RXTSF_OFFSET_CCK_8821C, 0x50);
3524 rtw_write8(adapter, REG_RXTSF_OFFSET_OFDM_8821C, 0x50);
3525
3526 beacon_function_enable(adapter, _TRUE, _TRUE);
3527
3528 ResumeTxBeacon(adapter);
3529 }
3530
rtl8821c_set_hal_ops(PADAPTER adapter)3531 void rtl8821c_set_hal_ops(PADAPTER adapter)
3532 {
3533 struct hal_ops *ops_func = &adapter->hal_func;
3534
3535 /*** initialize section ***/
3536 ops_func->read_chip_version = read_chip_version;
3537 /*
3538 ops->init_default_value = NULL;
3539 */
3540 ops_func->read_adapter_info = rtl8821c_read_efuse;
3541 ops_func->hal_power_on = rtl8821c_power_on;
3542 ops_func->hal_power_off = rtl8821c_power_off;
3543
3544 ops_func->dm_init = rtl8821c_phy_init_dm_priv;
3545 ops_func->dm_deinit = rtl8821c_phy_deinit_dm_priv;
3546
3547 /*** xmit section ***/
3548 /*
3549 ops->init_xmit_priv = NULL;
3550 ops->free_xmit_priv = NULL;
3551 ops->hal_xmit = NULL;
3552 ops->mgnt_xmit = NULL;
3553 ops->hal_xmitframe_enqueue = NULL;
3554 #ifdef CONFIG_XMIT_THREAD_MODE
3555 ops->xmit_thread_handler = NULL;
3556 #endif
3557 */
3558 /*
3559 ops_func->run_thread = rtl8821c_run_thread;
3560 ops_func->cancel_thread = rtl8821c_cancel_thread;
3561 */
3562 /*** recv section ***/
3563 /*
3564 ops->init_recv_priv = NULL;
3565 ops->free_recv_priv = NULL;
3566 #if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
3567 ops->inirp_init = NULL;
3568 ops->inirp_deinit = NULL;
3569 #endif
3570 */
3571 /*** interrupt hdl section ***/
3572 /*
3573 ops->enable_interrupt = NULL;
3574 ops->disable_interrupt = NULL;
3575 */
3576 ops_func->check_ips_status = check_ips_status;
3577 /*
3578 #if defined(CONFIG_PCI_HCI)
3579 ops->interrupt_handler = NULL;
3580 #endif
3581 #if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT)
3582 ops->interrupt_handler = NULL;
3583 #endif
3584 #if defined(CONFIG_PCI_HCI)
3585 ops->irp_reset = NULL;
3586 #endif
3587 */
3588
3589 /*** DM section ***/
3590 ops_func->set_chnl_bw_handler = rtl8821c_set_channel_bw;
3591
3592 ops_func->set_tx_power_level_handler = rtl8821c_set_tx_power_level;
3593 ops_func->set_tx_power_index_handler = rtl8821c_set_tx_power_index;
3594 ops_func->get_tx_power_index_handler = hal_com_get_txpwr_idx;
3595
3596 ops_func->hal_dm_watchdog = rtl8821c_phy_haldm_watchdog;
3597
3598 ops_func->GetHalODMVarHandler = GetHalODMVar;
3599 ops_func->SetHalODMVarHandler = SetHalODMVar;
3600
3601 ops_func->SetBeaconRelatedRegistersHandler = set_beacon_related_registers;
3602
3603 #ifdef CONFIG_ANTENNA_DIVERSITY
3604 /*
3605 ops->AntDivBeforeLinkHandler = NULL;
3606 ops->AntDivCompareHandler = NULL;
3607 */
3608 #endif
3609 /*
3610 ops->interface_ps_func = NULL;
3611 */
3612
3613 ops_func->read_bbreg = rtl8821c_read_bb_reg;
3614 ops_func->write_bbreg = rtl8821c_write_bb_reg;
3615 ops_func->read_rfreg = rtl8821c_read_rf_reg;
3616 ops_func->write_rfreg = rtl8821c_write_rf_reg;
3617 ops_func->read_wmmedca_reg = rtl8821c_read_wmmedca_reg;
3618
3619 #ifdef CONFIG_HOSTAPD_MLME
3620 /*
3621 ops->hostap_mgnt_xmit_entry = NULL;
3622 */
3623 #endif
3624 /*
3625 ops->EfusePowerSwitch = NULL;
3626 ops->BTEfusePowerSwitch = NULL;
3627 ops->ReadEFuse = NULL;
3628 ops->EFUSEGetEfuseDefinition = NULL;
3629 ops->EfuseGetCurrentSize = NULL;
3630 ops->Efuse_PgPacketRead = NULL;
3631 ops->Efuse_PgPacketWrite = NULL;
3632 ops->Efuse_WordEnableDataWrite = NULL;
3633 ops->Efuse_PgPacketWrite_BT = NULL;
3634 */
3635 #ifdef DBG_CONFIG_ERROR_DETECT
3636 ops_func->sreset_init_value = sreset_init_value;
3637 ops_func->sreset_reset_value = sreset_reset_value;
3638 ops_func->silentreset = sreset_reset;
3639 ops_func->sreset_xmit_status_check = xmit_status_check;
3640 ops_func->sreset_linked_status_check = linked_status_check;
3641 ops_func->sreset_get_wifi_status = sreset_get_wifi_status;
3642 ops_func->sreset_inprogress = sreset_inprogress;
3643 #endif /* DBG_CONFIG_ERROR_DETECT */
3644
3645 #ifdef CONFIG_IOL
3646 /*
3647 ops->IOL_exec_cmds_sync = NULL;
3648 */
3649 #endif
3650
3651 ops_func->hal_notch_filter = rtl8821c_notch_filter_switch;
3652 ops_func->hal_mac_c2h_handler = c2h_handler_rtl8821c;
3653 ops_func->fill_h2c_cmd = rtl8821c_fillh2ccmd;
3654 ops_func->fill_fake_txdesc = fill_fake_txdesc;
3655 ops_func->fw_dl = rtl8821c_fw_dl;
3656
3657 #ifdef CONFIG_LPS_PG
3658 ops_func->fw_mem_dl = rtl8821c_fw_mem_dl;
3659 #endif
3660 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
3661 /*
3662 ops->clear_interrupt = NULL;
3663 */
3664 #endif
3665 /*
3666 ops_func->hal_get_tx_buff_rsvd_page_num = NULL;
3667 */
3668 #ifdef CONFIG_GPIO_API
3669 /*
3670 ops->update_hisr_hsisr_ind = NULL;
3671 */
3672 #endif
3673
3674 /* HALMAC related functions */
3675 ops_func->init_mac_register = rtl8821c_init_phy_parameter_mac;
3676 ops_func->init_phy = rtl8821c_phy_init;
3677
3678 }
3679